	.file	"987221.c"
	.intel_syntax noprefix
	.text
	.globl	Sbox_byte
	.data
	.align 16
	.type	Sbox_byte, @object
	.size	Sbox_byte, 16
Sbox_byte:
	.string	"\f"
	.ascii	"\017\n\002\013\t\005\b\003\r\007\001\016\006\004"
	.globl	Pi_byte
	.align 16
	.type	Pi_byte, @object
	.size	Pi_byte, 16
Pi_byte:
	.string	"\005"
	.ascii	"\001\004\007\f\003\b\r\006\t\002\017\n\013\016"
	.globl	RCON
	.align 32
	.type	RCON, @object
	.size	RCON, 35
RCON:
	.ascii	"\001\002\004\b\020 \003\006\f\0300#\005\n\024(\023&\017\036<"
	.ascii	";5)\021\"\007\016\03483%\t\022$"
	.globl	key
	.bss
	.align 8
	.type	key, @object
	.size	key, 10
key:
	.zero	10
	.globl	roundKeys
	.align 32
	.type	roundKeys, @object
	.size	roundKeys, 288
roundKeys:
	.zero	288
	.globl	block
	.data
	.align 8
	.type	block, @object
	.size	block, 8
block:
	.ascii	"\0202Tv\230\272\334\376"
	.text
	.globl	Encrypt
	.type	Encrypt, @function
Encrypt:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR r.10[rip], 0
	jmp	.L2
.L5:
	mov	BYTE PTR i.9[rip], 0
	jmp	.L3
.L4:
	movzx	eax, BYTE PTR i.9[rip]
	movzx	eax, al
	cdqe
	lea	rdx, block[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	mov	edi, eax
	movzx	eax, BYTE PTR i.9[rip]
	movzx	eax, al
	cdqe
	lea	rdx, block[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	esi, al
	movzx	eax, BYTE PTR r.10[rip]
	movzx	eax, al
	lea	edx, 0[0+rax*4]
	movzx	eax, BYTE PTR i.9[rip]
	shr	al
	movzx	eax, al
	add	eax, edx
	cdqe
	lea	rdx, roundKeys[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	edx, al
	movzx	eax, BYTE PTR i.9[rip]
	movzx	eax, al
	and	eax, 1
	sal	eax, 2
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	xor	eax, esi
	and	eax, 15
	cdqe
	lea	rdx, Sbox_byte[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 4
	xor	edi, eax
	mov	edx, edi
	movzx	eax, BYTE PTR i.9[rip]
	movzx	eax, al
	mov	ecx, edx
	cdqe
	lea	rdx, block[rip]
	mov	BYTE PTR [rax+rdx], cl
	movzx	eax, BYTE PTR i.9[rip]
	add	eax, 1
	mov	BYTE PTR i.9[rip], al
.L3:
	movzx	eax, BYTE PTR i.9[rip]
	cmp	al, 7
	jbe	.L4
	movzx	eax, BYTE PTR block[rip]
	mov	BYTE PTR tmp.8[rip], al
	movzx	eax, BYTE PTR block[rip]
	and	eax, -16
	mov	BYTE PTR block[rip], al
	movzx	edx, BYTE PTR block[rip]
	movzx	eax, BYTE PTR block[rip]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip], al
	movzx	eax, BYTE PTR block[rip]
	and	eax, 15
	mov	BYTE PTR block[rip], al
	movzx	eax, BYTE PTR block[rip]
	mov	edx, eax
	movzx	eax, BYTE PTR block[rip+1]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip], al
	movzx	eax, BYTE PTR block[rip+1]
	and	eax, -16
	mov	BYTE PTR block[rip+1], al
	movzx	edx, BYTE PTR block[rip+1]
	movzx	eax, BYTE PTR block[rip+5]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+1], al
	movzx	eax, BYTE PTR block[rip+5]
	and	eax, 15
	mov	BYTE PTR block[rip+5], al
	movzx	eax, BYTE PTR block[rip+5]
	mov	edx, eax
	movzx	eax, BYTE PTR block[rip+7]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+5], al
	movzx	eax, BYTE PTR block[rip+7]
	and	eax, -16
	mov	BYTE PTR block[rip+7], al
	movzx	edx, BYTE PTR block[rip+7]
	movzx	eax, BYTE PTR block[rip+7]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+7], al
	movzx	eax, BYTE PTR block[rip+7]
	and	eax, 15
	mov	BYTE PTR block[rip+7], al
	movzx	eax, BYTE PTR block[rip+7]
	mov	edx, eax
	movzx	eax, BYTE PTR block[rip+6]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+7], al
	movzx	eax, BYTE PTR block[rip+6]
	and	eax, -16
	mov	BYTE PTR block[rip+6], al
	movzx	edx, BYTE PTR block[rip+6]
	movzx	eax, BYTE PTR block[rip+2]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+6], al
	movzx	eax, BYTE PTR block[rip+2]
	and	eax, 15
	mov	BYTE PTR block[rip+2], al
	movzx	eax, BYTE PTR block[rip+2]
	mov	edx, eax
	movzx	eax, BYTE PTR tmp.8[rip]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+2], al
	movzx	eax, BYTE PTR block[rip+1]
	mov	BYTE PTR tmp.8[rip], al
	movzx	eax, BYTE PTR block[rip+1]
	and	eax, 15
	mov	BYTE PTR block[rip+1], al
	movzx	eax, BYTE PTR block[rip+1]
	mov	edx, eax
	movzx	eax, BYTE PTR block[rip+3]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+1], al
	movzx	eax, BYTE PTR block[rip+3]
	and	eax, -16
	mov	BYTE PTR block[rip+3], al
	movzx	edx, BYTE PTR block[rip+3]
	movzx	eax, BYTE PTR block[rip+4]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+3], al
	movzx	eax, BYTE PTR block[rip+4]
	and	eax, 15
	mov	BYTE PTR block[rip+4], al
	movzx	eax, BYTE PTR block[rip+4]
	mov	edx, eax
	movzx	eax, BYTE PTR block[rip+5]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+4], al
	movzx	eax, BYTE PTR block[rip+5]
	and	eax, -16
	mov	BYTE PTR block[rip+5], al
	movzx	edx, BYTE PTR block[rip+5]
	movzx	eax, BYTE PTR block[rip+6]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+5], al
	movzx	eax, BYTE PTR block[rip+6]
	and	eax, 15
	mov	BYTE PTR block[rip+6], al
	movzx	eax, BYTE PTR block[rip+6]
	mov	edx, eax
	movzx	eax, BYTE PTR block[rip+4]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+6], al
	movzx	eax, BYTE PTR block[rip+4]
	and	eax, -16
	mov	BYTE PTR block[rip+4], al
	movzx	edx, BYTE PTR block[rip+4]
	movzx	eax, BYTE PTR block[rip+3]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+4], al
	movzx	eax, BYTE PTR block[rip+3]
	and	eax, 15
	mov	BYTE PTR block[rip+3], al
	movzx	eax, BYTE PTR block[rip+3]
	mov	edx, eax
	movzx	eax, BYTE PTR block[rip+2]
	movzx	eax, al
	sal	eax, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+3], al
	movzx	eax, BYTE PTR block[rip+2]
	and	eax, -16
	mov	BYTE PTR block[rip+2], al
	movzx	edx, BYTE PTR block[rip+2]
	movzx	eax, BYTE PTR tmp.8[rip]
	shr	al, 4
	xor	eax, edx
	mov	BYTE PTR block[rip+2], al
	movzx	eax, BYTE PTR r.10[rip]
	add	eax, 1
	mov	BYTE PTR r.10[rip], al
.L2:
	movzx	eax, BYTE PTR r.10[rip]
	cmp	al, 34
	jbe	.L5
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	Encrypt, .-Encrypt
	.globl	Schedule
	.type	Schedule, @function
Schedule:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR i.6[rip], 0
	jmp	.L7
.L8:
	mov	rdx, QWORD PTR master_key.5[rip]
	movzx	eax, BYTE PTR i.6[rip]
	shr	al, 2
	movzx	eax, al
	add	rax, rax
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	movzx	edx, ax
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	and	eax, 3
	sal	eax, 2
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	edx, eax
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	mov	ecx, edx
	and	ecx, 15
	cdqe
	lea	rdx, KeyR.4[rip]
	mov	BYTE PTR [rax+rdx], cl
	movzx	eax, BYTE PTR i.6[rip]
	add	eax, 1
	mov	BYTE PTR i.6[rip], al
.L7:
	movzx	eax, BYTE PTR i.6[rip]
	cmp	al, 19
	jbe	.L8
	mov	BYTE PTR i.6[rip], 0
	jmp	.L9
.L10:
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	movzx	edx, BYTE PTR KeyR.4[rip+1]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	add	eax, 1
	movzx	edx, BYTE PTR KeyR.4[rip+3]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	add	eax, 2
	movzx	edx, BYTE PTR KeyR.4[rip+4]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	add	eax, 3
	movzx	edx, BYTE PTR KeyR.4[rip+6]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	add	eax, 4
	movzx	edx, BYTE PTR KeyR.4[rip+13]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	add	eax, 5
	movzx	edx, BYTE PTR KeyR.4[rip+14]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	add	eax, 6
	movzx	edx, BYTE PTR KeyR.4[rip+15]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	sal	eax, 3
	add	eax, 7
	movzx	edx, BYTE PTR KeyR.4[rip+16]
	cdqe
	lea	rcx, roundKeys[rip]
	mov	BYTE PTR [rax+rcx], dl
	movzx	ecx, BYTE PTR KeyR.4[rip+1]
	movzx	eax, BYTE PTR KeyR.4[rip]
	movzx	eax, al
	cdqe
	lea	rdx, Sbox_byte[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	xor	eax, ecx
	mov	BYTE PTR KeyR.4[rip+1], al
	movzx	ecx, BYTE PTR KeyR.4[rip+4]
	movzx	eax, BYTE PTR KeyR.4[rip+16]
	movzx	eax, al
	cdqe
	lea	rdx, Sbox_byte[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	xor	eax, ecx
	mov	BYTE PTR KeyR.4[rip+4], al
	movzx	ecx, BYTE PTR KeyR.4[rip+7]
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	cdqe
	lea	rdx, RCON[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	shr	al, 3
	xor	eax, ecx
	mov	BYTE PTR KeyR.4[rip+7], al
	movzx	eax, BYTE PTR KeyR.4[rip+19]
	mov	ecx, eax
	movzx	eax, BYTE PTR i.6[rip]
	movzx	eax, al
	cdqe
	lea	rdx, RCON[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	and	eax, 7
	xor	eax, ecx
	mov	BYTE PTR KeyR.4[rip+19], al
	movzx	eax, BYTE PTR KeyR.4[rip]
	mov	BYTE PTR temp.3[rip], al
	movzx	eax, BYTE PTR KeyR.4[rip+1]
	mov	BYTE PTR KeyR.4[rip], al
	movzx	eax, BYTE PTR KeyR.4[rip+2]
	mov	BYTE PTR KeyR.4[rip+1], al
	movzx	eax, BYTE PTR KeyR.4[rip+3]
	mov	BYTE PTR KeyR.4[rip+2], al
	movzx	eax, BYTE PTR temp.3[rip]
	mov	BYTE PTR KeyR.4[rip+3], al
	movzx	eax, BYTE PTR KeyR.4[rip]
	mov	BYTE PTR temp.3[rip], al
	movzx	eax, BYTE PTR KeyR.4[rip+1]
	mov	BYTE PTR temp1.2[rip], al
	movzx	eax, BYTE PTR KeyR.4[rip+2]
	mov	BYTE PTR temp2.1[rip], al
	movzx	eax, BYTE PTR KeyR.4[rip+3]
	mov	BYTE PTR temp3.0[rip], al
	movzx	eax, BYTE PTR KeyR.4[rip+4]
	mov	BYTE PTR KeyR.4[rip], al
	movzx	eax, BYTE PTR KeyR.4[rip+5]
	mov	BYTE PTR KeyR.4[rip+1], al
	movzx	eax, BYTE PTR KeyR.4[rip+6]
	mov	BYTE PTR KeyR.4[rip+2], al
	movzx	eax, BYTE PTR KeyR.4[rip+7]
	mov	BYTE PTR KeyR.4[rip+3], al
	movzx	eax, BYTE PTR KeyR.4[rip+8]
	mov	BYTE PTR KeyR.4[rip+4], al
	movzx	eax, BYTE PTR KeyR.4[rip+9]
	mov	BYTE PTR KeyR.4[rip+5], al
	movzx	eax, BYTE PTR KeyR.4[rip+10]
	mov	BYTE PTR KeyR.4[rip+6], al
	movzx	eax, BYTE PTR KeyR.4[rip+11]
	mov	BYTE PTR KeyR.4[rip+7], al
	movzx	eax, BYTE PTR KeyR.4[rip+12]
	mov	BYTE PTR KeyR.4[rip+8], al
	movzx	eax, BYTE PTR KeyR.4[rip+13]
	mov	BYTE PTR KeyR.4[rip+9], al
	movzx	eax, BYTE PTR KeyR.4[rip+14]
	mov	BYTE PTR KeyR.4[rip+10], al
	movzx	eax, BYTE PTR KeyR.4[rip+15]
	mov	BYTE PTR KeyR.4[rip+11], al
	movzx	eax, BYTE PTR KeyR.4[rip+16]
	mov	BYTE PTR KeyR.4[rip+12], al
	movzx	eax, BYTE PTR KeyR.4[rip+17]
	mov	BYTE PTR KeyR.4[rip+13], al
	movzx	eax, BYTE PTR KeyR.4[rip+18]
	mov	BYTE PTR KeyR.4[rip+14], al
	movzx	eax, BYTE PTR KeyR.4[rip+19]
	mov	BYTE PTR KeyR.4[rip+15], al
	movzx	eax, BYTE PTR temp.3[rip]
	mov	BYTE PTR KeyR.4[rip+16], al
	movzx	eax, BYTE PTR temp1.2[rip]
	mov	BYTE PTR KeyR.4[rip+17], al
	movzx	eax, BYTE PTR temp2.1[rip]
	mov	BYTE PTR KeyR.4[rip+18], al
	movzx	eax, BYTE PTR temp3.0[rip]
	mov	BYTE PTR KeyR.4[rip+19], al
	movzx	eax, BYTE PTR i.6[rip]
	add	eax, 1
	mov	BYTE PTR i.6[rip], al
.L9:
	movzx	eax, BYTE PTR i.6[rip]
	cmp	al, 34
	jbe	.L10
	movzx	eax, BYTE PTR KeyR.4[rip+1]
	mov	BYTE PTR roundKeys[rip+280], al
	movzx	eax, BYTE PTR KeyR.4[rip+3]
	mov	BYTE PTR roundKeys[rip+281], al
	movzx	eax, BYTE PTR KeyR.4[rip+4]
	mov	BYTE PTR roundKeys[rip+282], al
	movzx	eax, BYTE PTR KeyR.4[rip+6]
	mov	BYTE PTR roundKeys[rip+283], al
	movzx	eax, BYTE PTR KeyR.4[rip+13]
	mov	BYTE PTR roundKeys[rip+284], al
	movzx	eax, BYTE PTR KeyR.4[rip+14]
	mov	BYTE PTR roundKeys[rip+285], al
	movzx	eax, BYTE PTR KeyR.4[rip+15]
	mov	BYTE PTR roundKeys[rip+286], al
	movzx	eax, BYTE PTR KeyR.4[rip+16]
	mov	BYTE PTR roundKeys[rip+287], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	Schedule, .-Schedule
	.globl	main
	.type	main, @function
main:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	Schedule
	mov	eax, 0
	call	Encrypt
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	main, .-main
	.local	r.10
	.comm	r.10,1,1
	.local	i.9
	.comm	i.9,1,1
	.local	tmp.8
	.comm	tmp.8,1,1
	.local	j.7
	.comm	j.7,1,1
	.local	i.6
	.comm	i.6,1,1
	.section	.data.rel.local,"aw"
	.align 8
	.type	master_key.5, @object
	.size	master_key.5, 8
master_key.5:
	.quad	key
	.local	KeyR.4
	.comm	KeyR.4,20,16
	.local	temp.3
	.comm	temp.3,1,1
	.local	temp1.2
	.comm	temp1.2,1,1
	.local	temp2.1
	.comm	temp2.1,1,1
	.local	temp3.0
	.comm	temp3.0,1,1
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"987221.c"
	.text
	.global	Sbox_byte
	.data
	.align	2
	.type	Sbox_byte, %object
	.size	Sbox_byte, 16
Sbox_byte:
	.ascii	"\014\000\017\012\002\013\011\005\010\003\015\007\001"
	.ascii	"\016\006\004"
	.global	Pi_byte
	.align	2
	.type	Pi_byte, %object
	.size	Pi_byte, 16
Pi_byte:
	.ascii	"\005\000\001\004\007\014\003\010\015\006\011\002\017"
	.ascii	"\012\013\016"
	.global	RCON
	.align	2
	.type	RCON, %object
	.size	RCON, 35
RCON:
	.ascii	"\001\002\004\010\020 \003\006\014\0300#\005\012\024"
	.ascii	"(\023&\017\036<;5)\021\"\007\016\03483%\011\022$"
	.comm	key,10,4
	.comm	roundKeys,288,4
	.global	block
	.align	2
	.type	block, %object
	.size	block, 8
block:
	.ascii	"\0202Tv\230\272\334\376"
	.text
	.align	2
	.global	Encrypt
	.syntax unified
	.arm
	.fpu softvfp
	.type	Encrypt, %function
Encrypt:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L6
	mov	r2, #0
	strb	r2, [r3]
	b	.L2
.L5:
	ldr	r3, .L6+4
	mov	r2, #0
	strb	r2, [r3]
	b	.L3
.L4:
	ldr	r3, .L6+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L6+8
	ldrb	r3, [r3, r2]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, .L6+8
	ldrb	r3, [r3, r1]	@ zero_extendqisi2
	mov	r0, r3
	ldr	r3, .L6
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #2
	ldr	r1, .L6+4
	ldrb	r1, [r1]	@ zero_extendqisi2
	lsr	r1, r1, #1
	and	r1, r1, #255
	add	r3, r3, r1
	ldr	r1, .L6+12
	ldrb	r3, [r1, r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, .L6+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #1
	lsl	r3, r3, #2
	asr	r3, r1, r3
	eor	r3, r3, r0
	and	r3, r3, #15
	ldr	r1, .L6+16
	ldrb	r3, [r1, r3]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	ldr	r2, .L6+4
	ldrb	r2, [r2]	@ zero_extendqisi2
	and	r1, r3, #255
	ldr	r3, .L6+8
	strb	r1, [r3, r2]
	ldr	r3, .L6+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L6+4
	strb	r2, [r3]
.L3:
	ldr	r3, .L6+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L4
	ldr	r3, .L6+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L6+20
	strb	r2, [r3]
	ldr	r3, .L6+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3]
	ldr	r3, .L6+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L6+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3]
	ldr	r3, .L6+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3]
	ldr	r3, .L6+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+8
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #1]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	ldr	r3, .L6+8
	ldrb	r3, [r3, #5]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #1]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #5]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #5]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #5]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+8
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #5]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #7]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #7]	@ zero_extendqisi2
	ldr	r3, .L6+8
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #7]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #7]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #7]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+8
	ldrb	r3, [r3, #6]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #7]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #6]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #6]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #6]	@ zero_extendqisi2
	ldr	r3, .L6+8
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #6]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #2]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #2]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	ldr	r3, .L6+20
	strb	r2, [r3]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #1]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+8
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #1]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #3]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #3]	@ zero_extendqisi2
	ldr	r3, .L6+8
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #3]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #4]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+8
	ldrb	r3, [r3, #5]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #4]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #5]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #5]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #5]	@ zero_extendqisi2
	ldr	r3, .L6+8
	ldrb	r3, [r3, #6]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #5]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #6]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #6]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #6]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+8
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #6]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #4]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldr	r3, .L6+8
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #4]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #3]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L6+8
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	lsl	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #3]
	ldr	r3, .L6+8
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	bic	r3, r3, #15
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #2]
	ldr	r3, .L6+8
	ldrb	r2, [r3, #2]	@ zero_extendqisi2
	ldr	r3, .L6+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #4
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L6+8
	strb	r2, [r3, #2]
	ldr	r3, .L6
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L6
	strb	r2, [r3]
.L2:
	ldr	r3, .L6
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #34
	bls	.L5
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L7:
	.align	2
.L6:
	.word	r.4297
	.word	i.4295
	.word	block
	.word	roundKeys
	.word	Sbox_byte
	.word	tmp.4298
	.size	Encrypt, .-Encrypt
	.align	2
	.global	Schedule
	.syntax unified
	.arm
	.fpu softvfp
	.type	Schedule, %function
Schedule:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3]
	b	.L9
.L10:
	ldr	r3, .L13+4
	ldr	r2, [r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #2
	and	r3, r3, #255
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #3
	lsl	r3, r3, #2
	asr	r3, r2, r3
	and	r3, r3, #255
	ldr	r2, .L13
	ldrb	r2, [r2]	@ zero_extendqisi2
	and	r3, r3, #15
	and	r1, r3, #255
	ldr	r3, .L13+8
	strb	r1, [r3, r2]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L13
	strb	r2, [r3]
.L9:
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #19
	bls	.L10
	ldr	r3, .L13
	mov	r2, #0
	strb	r2, [r3]
	b	.L11
.L12:
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	ldr	r2, .L13+8
	ldrb	r1, [r2, #1]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	add	r3, r3, #1
	ldr	r2, .L13+8
	ldrb	r1, [r2, #3]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	add	r3, r3, #2
	ldr	r2, .L13+8
	ldrb	r1, [r2, #4]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	add	r3, r3, #3
	ldr	r2, .L13+8
	ldrb	r1, [r2, #6]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	add	r3, r3, #4
	ldr	r2, .L13+8
	ldrb	r1, [r2, #13]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	add	r3, r3, #5
	ldr	r2, .L13+8
	ldrb	r1, [r2, #14]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	add	r3, r3, #6
	ldr	r2, .L13+8
	ldrb	r1, [r2, #15]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	add	r3, r3, #7
	ldr	r2, .L13+8
	ldrb	r1, [r2, #16]	@ zero_extendqisi2
	ldr	r2, .L13+12
	strb	r1, [r2, r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	ldr	r3, .L13+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, .L13+16
	ldrb	r3, [r3, r1]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L13+8
	strb	r2, [r3, #1]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldr	r3, .L13+8
	ldrb	r3, [r3, #16]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, .L13+16
	ldrb	r3, [r3, r1]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L13+8
	strb	r2, [r3, #4]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #7]	@ zero_extendqisi2
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, .L13+20
	ldrb	r3, [r3, r1]	@ zero_extendqisi2
	lsr	r3, r3, #3
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, .L13+8
	strb	r2, [r3, #7]
	ldr	r3, .L13+8
	ldrb	r3, [r3, #19]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, .L13+20
	ldrb	r3, [r3, r1]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #7
	lsl	r3, r3, #24
	asr	r3, r3, #24
	eor	r3, r3, r2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L13+8
	strb	r2, [r3, #19]
	ldr	r3, .L13+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L13+24
	strb	r2, [r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #2]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #1]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #3]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #2]
	ldr	r3, .L13+24
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #3]
	ldr	r3, .L13+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L13+24
	strb	r2, [r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	ldr	r3, .L13+28
	strb	r2, [r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #2]	@ zero_extendqisi2
	ldr	r3, .L13+32
	strb	r2, [r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #3]	@ zero_extendqisi2
	ldr	r3, .L13+36
	strb	r2, [r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #5]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #1]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #6]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #2]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #7]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #3]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #8]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #4]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #9]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #5]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #10]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #6]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #11]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #7]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #12]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #8]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #13]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #9]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #14]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #10]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #15]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #11]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #16]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #12]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #17]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #13]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #18]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #14]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #19]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #15]
	ldr	r3, .L13+24
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #16]
	ldr	r3, .L13+28
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #17]
	ldr	r3, .L13+32
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #18]
	ldr	r3, .L13+36
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L13+8
	strb	r2, [r3, #19]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L13
	strb	r2, [r3]
.L11:
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #34
	bls	.L12
	ldr	r3, .L13+8
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #280]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #3]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #281]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #4]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #282]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #6]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #283]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #13]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #284]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #14]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #285]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #15]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #286]
	ldr	r3, .L13+8
	ldrb	r2, [r3, #16]	@ zero_extendqisi2
	ldr	r3, .L13+12
	strb	r2, [r3, #287]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L14:
	.align	2
.L13:
	.word	i.4312
	.word	master_key.4313
	.word	KeyR.4307
	.word	roundKeys
	.word	Sbox_byte
	.word	RCON
	.word	temp.4308
	.word	temp1.4309
	.word	temp2.4310
	.word	temp3.4311
	.size	Schedule, .-Schedule
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	Schedule
	bl	Encrypt
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
	.size	main, .-main
	.local	r.4297
	.comm	r.4297,1,1
	.local	i.4295
	.comm	i.4295,1,1
	.local	tmp.4298
	.comm	tmp.4298,1,1
	.local	j.4296
	.comm	j.4296,1,1
	.local	i.4312
	.comm	i.4312,1,1
	.data
	.align	2
	.type	master_key.4313, %object
	.size	master_key.4313, 4
master_key.4313:
	.word	key
	.local	KeyR.4307
	.comm	KeyR.4307,20,4
	.local	temp.4308
	.comm	temp.4308,1,1
	.local	temp1.4309
	.comm	temp1.4309,1,1
	.local	temp2.4310
	.comm	temp2.4310,1,1
	.local	temp3.4311
	.comm	temp3.4311,1,1
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
