	.file	"449940.c"
	.intel_syntax noprefix
	.text
	.globl	StressCheckEpsFail
	.type	StressCheckEpsFail, @function
StressCheckEpsFail:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	QWORD PTR -48[rbp], rcx
	mov	QWORD PTR -56[rbp], r8
	mov	QWORD PTR -64[rbp], r9
	movsd	QWORD PTR -72[rbp], xmm0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L2
.L5:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR 24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 16[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	comisd	xmm0, QWORD PTR -72[rbp]
	jbe	.L3
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 16[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR -72[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR [rax], xmm0
.L3:
	add	DWORD PTR -8[rbp], 1
.L2:
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR 32[rbp]
	jl	.L5
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	StressCheckEpsFail, .-StressCheckEpsFail
	.globl	StressStrainWork
	.type	StressStrainWork, @function
StressStrainWork:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -56[rbp], rdx
	mov	QWORD PTR -64[rbp], rcx
	mov	QWORD PTR -72[rbp], r8
	mov	QWORD PTR -80[rbp], r9
	movsd	QWORD PTR -88[rbp], xmm0
	movsd	xmm1, QWORD PTR -88[rbp]
	movsd	xmm0, QWORD PTR .LC2[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	mov	DWORD PTR -24[rbp], 0
	jmp	.L8
.L9:
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR 120[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 32[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movq	xmm1, QWORD PTR .LC3[rip]
	xorpd	xmm0, xmm1
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 40[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 136[rbp]
	add	rax, rdx
	movsd	xmm2, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 128[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm2
	movapd	xmm2, xmm0
	mulsd	xmm2, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm3, QWORD PTR [rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 32[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 80[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 40[rbp]
	add	rax, rdx
	movsd	xmm5, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm5
	mulsd	xmm0, xmm4
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 88[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -72[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, QWORD PTR -8[rbp]
	mulsd	xmm0, xmm4
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 96[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm4, xmm0
	addsd	xmm4, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 48[rbp]
	add	rax, rdx
	movsd	xmm5, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -80[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm5
	mulsd	xmm0, xmm4
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 104[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm4, xmm0
	addsd	xmm4, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 56[rbp]
	add	rax, rdx
	movsd	xmm5, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 16[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm5
	mulsd	xmm0, xmm4
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 112[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm4, xmm0
	addsd	xmm4, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm5, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 24[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm5
	mulsd	xmm0, xmm4
	addsd	xmm0, xmm3
	mulsd	xmm0, xmm2
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	addsd	xmm0, xmm1
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 136[rbp]
	add	rax, rdx
	movsd	xmm2, QWORD PTR [rax]
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 128[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm2
	movapd	xmm2, xmm0
	mulsd	xmm2, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm3, QWORD PTR [rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 32[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 80[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 40[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, xmm4
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 88[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, QWORD PTR -8[rbp]
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 96[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm4, xmm0
	addsd	xmm4, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 48[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, xmm4
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 104[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm4, xmm0
	addsd	xmm4, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 56[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, xmm4
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 112[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm4, xmm0
	addsd	xmm4, xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, xmm4
	addsd	xmm0, xmm3
	mulsd	xmm0, xmm2
	mov	eax, DWORD PTR -24[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	addsd	xmm0, xmm1
	movsd	QWORD PTR [rax], xmm0
	add	DWORD PTR -24[rbp], 1
.L8:
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR 144[rbp]
	jl	.L9
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	StressStrainWork, .-StressStrainWork
	.globl	StressStrainHeat
	.type	StressStrainHeat, @function
StressStrainHeat:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -56[rbp], rdx
	mov	QWORD PTR -64[rbp], rcx
	mov	QWORD PTR -72[rbp], r8
	mov	QWORD PTR -80[rbp], r9
	movsd	QWORD PTR -88[rbp], xmm0
	mov	DWORD PTR -32[rbp], 0
	jmp	.L11
.L20:
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR 104[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -72[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC4[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	jbe	.L24
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC4[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 120[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 112[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	movapd	xmm2, xmm1
	mulsd	xmm2, xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 16[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	movapd	xmm3, xmm1
	mulsd	xmm3, QWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm3
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm3, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 16[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm3
	movapd	xmm3, xmm1
	mulsd	xmm3, xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 24[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	movapd	xmm4, xmm1
	mulsd	xmm4, QWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm4
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 24[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm1
	addsd	xmm3, xmm0
	movapd	xmm1, xmm3
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 32[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm3, xmm0
	mulsd	xmm3, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, QWORD PTR -16[rbp]
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 32[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	subsd	xmm0, xmm4
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	subsd	xmm0, xmm4
	mulsd	xmm0, xmm3
	movapd	xmm3, xmm1
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 40[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 80[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mulsd	xmm1, QWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	movapd	xmm1, xmm0
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 80[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 40[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm1
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 48[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 88[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mulsd	xmm1, QWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	movapd	xmm1, xmm0
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 88[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 48[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm1
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 56[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 96[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mulsd	xmm1, QWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	movapd	xmm1, xmm0
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 96[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 56[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm1
	addsd	xmm0, xmm3
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	mulsd	xmm0, xmm2
	movsd	QWORD PTR [rax], xmm0
	jmp	.L14
.L24:
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 120[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 112[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC5[rip]
	movapd	xmm2, xmm1
	mulsd	xmm2, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm3, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 16[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm3
	mulsd	xmm1, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm3, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 24[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm3
	addsd	xmm0, xmm1
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm3, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	addsd	xmm3, xmm1
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 32[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 64[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	subsd	xmm1, xmm4
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 72[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	subsd	xmm1, xmm4
	mulsd	xmm3, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm3
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 80[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm3, xmm0
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 80[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 40[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm3
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 88[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm3, xmm0
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 88[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 48[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm3
	addsd	xmm1, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 96[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	movapd	xmm3, xmm0
	addsd	xmm3, xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 96[rbp]
	add	rax, rdx
	movsd	xmm4, QWORD PTR [rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR 56[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	addsd	xmm0, xmm4
	mulsd	xmm0, xmm3
	addsd	xmm0, xmm1
	mulsd	xmm0, xmm2
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	mulsd	xmm0, QWORD PTR -16[rbp]
	movsd	QWORD PTR [rax], xmm0
.L14:
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	subsd	xmm0, xmm1
	movsd	QWORD PTR [rax], xmm0
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC4[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -24[rbp], xmm0
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -72[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	jbe	.L15
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -72[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	movsd	xmm0, QWORD PTR .LC4[rip]
	divsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR -24[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -24[rbp], xmm0
.L15:
	movsd	xmm0, QWORD PTR -24[rbp]
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	jbe	.L25
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -80[rbp]
	add	rax, rdx
	movsd	xmm1, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	movsd	xmm0, QWORD PTR [rax]
	mulsd	xmm0, xmm1
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	divsd	xmm0, QWORD PTR -24[rbp]
	movsd	QWORD PTR [rax], xmm0
	jmp	.L19
.L25:
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	pxor	xmm0, xmm0
	movsd	QWORD PTR [rax], xmm0
.L19:
	add	DWORD PTR -32[rbp], 1
.L11:
	mov	eax, DWORD PTR -32[rbp]
	cmp	eax, DWORD PTR 128[rbp]
	jl	.L20
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	StressStrainHeat, .-StressStrainHeat
	.section	.rodata
	.align 8
.LC1:
	.long	-1030792151
	.long	1072703733
	.align 8
.LC2:
	.long	0
	.long	1070596096
	.align 16
.LC3:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.align 8
.LC4:
	.long	0
	.long	1071644672
	.align 8
.LC5:
	.long	0
	.long	-1076887552
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"449940.c"
	.text
	.global	__aeabi_dcmplt
	.global	__aeabi_dmul
	.align	2
	.global	StressCheckEpsFail
	.syntax unified
	.arm
	.fpu softvfp
	.type	StressCheckEpsFail, %function
StressCheckEpsFail:
	@ args = 32, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L2
.L5:
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r2, [fp, #28]
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #3
	ldr	r2, [fp, #12]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L3
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-24]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-28]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-32]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-36]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #3
	ldr	r2, [fp, #4]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #3
	ldr	r2, [fp, #8]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #3
	ldr	r2, [fp, #12]
	add	r4, r2, r3
	ldr	r2, .L7
	ldr	r3, .L7+4
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
.L3:
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L2:
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #32]
	cmp	r2, r3
	blt	.L5
	nop
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L8:
	.align	2
.L7:
	.word	-1030792151
	.word	1072703733
	.size	StressCheckEpsFail, .-StressCheckEpsFail
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.align	2
	.global	StressStrainWork
	.syntax unified
	.arm
	.fpu softvfp
	.type	StressStrainWork, %function
StressStrainWork:
	@ args = 88, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	str	r2, [fp, #-64]
	str	r3, [fp, #-68]
	mov	r2, #0
	ldr	r3, .L12
	add	r1, fp, #68
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r3, #0
	str	r3, [fp, #-52]
	b	.L10
.L11:
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #2
	ldr	r2, [fp, #76]
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #20]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-76]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-72]
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #24]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-56]
	add	r3, r2, r3
	ldmia	r3, {r8-r9}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #84]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #80]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r4-r5}
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #20]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-64]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #44]
	add	r3, r2, r3
	ldmia	r3, {r4-r5}
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #24]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-68]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #48]
	add	r3, r2, r3
	ldmia	r3, {r4-r5}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #52]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #28]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #8]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #56]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #32]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #12]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #60]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #16]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-56]
	add	r4, r2, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-60]
	add	r3, r2, r3
	ldmia	r3, {r6-r7}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #84]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #80]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #20]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #44]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #24]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #48]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #52]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #28]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #56]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #32]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #60]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-60]
	add	r4, r2, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	str	r3, [fp, #-52]
.L10:
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #88]
	cmp	r2, r3
	blt	.L11
	nop
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L13:
	.align	2
.L12:
	.word	1070596096
	.size	StressStrainWork, .-StressStrainWork
	.global	__aeabi_dcmpgt
	.global	__aeabi_ddiv
	.align	2
	.global	StressStrainHeat
	.syntax unified
	.arm
	.fpu softvfp
	.type	StressStrainHeat, %function
StressStrainHeat:
	@ args = 80, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #48
	str	r0, [fp, #-64]
	str	r1, [fp, #-68]
	str	r2, [fp, #-72]
	str	r3, [fp, #-76]
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L15
.L24:
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #2
	ldr	r2, [fp, #68]
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	ldr	r3, .L30
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-76]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L28
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-76]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, #0
	ldr	r1, .L30
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #76]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L30+4
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #12]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #12]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #16]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #16]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #20]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #20]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #24]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #44]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #44]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #24]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #28]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #48]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #48]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #28]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #32]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #52]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #52]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #32]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r4, r2, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	b	.L18
.L28:
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #76]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L30+8
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r4-r5}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #12]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r4-r5}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #16]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #20]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #36]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #40]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #44]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #44]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #24]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #48]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #48]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #28]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #52]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r8, r2
	mov	r9, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #52]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #32]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r4, r2, r3
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
.L18:
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-64]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	ldr	ip, [fp, #-56]
	lsl	ip, ip, #3
	ldr	lr, [fp, #-68]
	add	r4, lr, ip
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-76]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	ldr	r3, .L30
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L19
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, #0
	ldr	r1, .L30
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
.L19:
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L29
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	ldr	r2, [fp, #8]
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r4, r2, r3
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	stm	r4, {r2-r3}
	b	.L23
.L29:
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-72]
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
.L23:
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L15:
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #80]
	cmp	r2, r3
	blt	.L24
	nop
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L31:
	.align	2
.L30:
	.word	1071644672
	.word	1070596096
	.word	-1076887552
	.size	StressStrainHeat, .-StressStrainHeat
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
