	.file	"203996.c"
	.intel_syntax noprefix
	.text
	.type	EMIF_PRCM_CLK_ENABLE, @function
EMIF_PRCM_CLK_ENABLE:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	esi, 2
	mov	edi, 1155530792
	call	PUT32@PLT
	nop
.L2:
	mov	edi, 1155530792
	call	GET32@PLT
	cmp	eax, 2
	jne	.L2
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	EMIF_PRCM_CLK_ENABLE, .-EMIF_PRCM_CLK_ENABLE
	.type	VTP_Enable, @function
VTP_Enable:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	esi, 0
	mov	edi, 1155599884
	call	PUT32@PLT
	mov	esi, 6
	mov	edi, 1155599884
	call	PUT32@PLT
	mov	edi, 1155599884
	call	GET32@PLT
	or	eax, 64
	mov	esi, eax
	mov	edi, 1155599884
	call	PUT32@PLT
	mov	edi, 1155599884
	call	GET32@PLT
	and	eax, -2
	mov	esi, eax
	mov	edi, 1155599884
	call	PUT32@PLT
	mov	edi, 1155599884
	call	GET32@PLT
	or	eax, 1
	mov	esi, eax
	mov	edi, 1155599884
	call	PUT32@PLT
	nop
.L4:
	mov	edi, 1155599884
	call	GET32@PLT
	and	eax, 32
	cmp	eax, 32
	jne	.L4
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	VTP_Enable, .-VTP_Enable
	.type	PHY_Config_CMD, @function
PHY_Config_CMD:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], 0
	mov	DWORD PTR -4[rbp], 0
	jmp	.L6
.L7:
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, eax, 52
	add	eax, 1155604508
	mov	esi, 128
	mov	edi, eax
	call	PUT32@PLT
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, eax, 52
	add	eax, 1155604524
	mov	esi, 0
	mov	edi, eax
	call	PUT32@PLT
	add	DWORD PTR -4[rbp], 1
.L6:
	cmp	DWORD PTR -4[rbp], 2
	jbe	.L7
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	PHY_Config_CMD, .-PHY_Config_CMD
	.type	PHY_Config_DATA, @function
PHY_Config_DATA:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], 0
	jmp	.L9
.L10:
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, eax, 164
	add	eax, 1155604680
	mov	esi, 0
	mov	edi, eax
	call	PUT32@PLT
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, eax, 164
	add	eax, 1155604700
	mov	esi, 0
	mov	edi, eax
	call	PUT32@PLT
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, eax, 164
	add	eax, 1155604744
	mov	esi, 0
	mov	edi, eax
	call	PUT32@PLT
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, eax, 164
	add	eax, 1155604768
	mov	esi, 125
	mov	edi, eax
	call	PUT32@PLT
	add	DWORD PTR -4[rbp], 1
.L9:
	cmp	DWORD PTR -4[rbp], 1
	jbe	.L10
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	PHY_Config_DATA, .-PHY_Config_DATA
	.type	enable_SYS_CLKOUT2, @function
enable_SYS_CLKOUT2:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edi, 1155532544
	call	GET32@PLT
	mov	DWORD PTR -4[rbp], eax
	or	DWORD PTR -4[rbp], 128
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	edi, 1155532544
	call	PUT32@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	enable_SYS_CLKOUT2, .-enable_SYS_CLKOUT2
	.type	set_CLKOUT2, @function
set_CLKOUT2:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -8[rbp], 2
	mov	esi, 3
	mov	edi, 1155598772
	call	PUT32@PLT
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 1
	sal	eax, 3
	mov	esi, eax
	mov	edi, 1155532544
	call	PUT32@PLT
	mov	edi, 1155532544
	call	GET32@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	and	eax, -8
	or	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	edi, 1155532544
	call	PUT32@PLT
	mov	eax, 0
	call	enable_SYS_CLKOUT2
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	set_CLKOUT2, .-set_CLKOUT2
	.globl	OSC_32KHz
	.type	OSC_32KHz, @function
OSC_32KHz:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 0
	call	set_CLKOUT2
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	OSC_32KHz, .-OSC_32KHz
	.globl	L3_CLK
	.type	L3_CLK, @function
L3_CLK:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 1
	call	set_CLKOUT2
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	L3_CLK, .-L3_CLK
	.globl	DDR_PHY_Clock
	.type	DDR_PHY_Clock, @function
DDR_PHY_Clock:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	EMIF_PRCM_CLK_ENABLE
	mov	edi, 2
	call	set_CLKOUT2
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	DDR_PHY_Clock, .-DDR_PHY_Clock
	.globl	PER_Clock
	.type	PER_Clock, @function
PER_Clock:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 3
	call	set_CLKOUT2
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	PER_Clock, .-PER_Clock
	.globl	LCD_Clock
	.type	LCD_Clock, @function
LCD_Clock:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 4
	call	set_CLKOUT2
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	LCD_Clock, .-LCD_Clock
	.globl	Device_Type
	.type	Device_Type, @function
Device_Type:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edi, 1155596352
	call	GET32@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 8
	and	eax, 7
	mov	DWORD PTR -4[rbp], eax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	Device_Type, .-Device_Type
	.globl	EMIF_PRCM_CLK_DISABLE
	.type	EMIF_PRCM_CLK_DISABLE, @function
EMIF_PRCM_CLK_DISABLE:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	esi, 0
	mov	edi, 1155530792
	call	PUT32@PLT
	nop
.L20:
	mov	edi, 1155530792
	call	GET32@PLT
	cmp	eax, 196608
	jne	.L20
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	EMIF_PRCM_CLK_DISABLE, .-EMIF_PRCM_CLK_DISABLE
	.globl	Enter_DS0
	.type	Enter_DS0, @function
Enter_DS0:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	EMIF_PRCM_CLK_ENABLE
	mov	esi, 268435456
	mov	edi, 1155599876
	call	PUT32@PLT
	mov	esi, 0
	mov	edi, 1275072020
	call	PUT32@PLT
	mov	esi, 1048576
	mov	edi, 1275068644
	call	PUT32@PLT
	mov	esi, 1048576
	mov	edi, 1275068648
	call	PUT32@PLT
	mov	esi, 1072693251
	mov	edi, 1155601472
	call	PUT32@PLT
	mov	esi, 1072693251
	mov	edi, 1155601476
	call	PUT32@PLT
	mov	esi, -2096757
	mov	edi, 1155601412
	call	PUT32@PLT
	mov	esi, -2096757
	mov	edi, 1155601416
	call	PUT32@PLT
	mov	esi, -6289013
	mov	edi, 1155601420
	call	PUT32@PLT
	mov	esi, 672
	mov	edi, 1275068472
	call	PUT32@PLT
	mov	esi, 672
	mov	edi, 1275068476
	call	PUT32@PLT
	mov	esi, 1
	mov	edi, 1155601180
	call	PUT32@PLT
	mov	eax, 0
	call	EMIF_PRCM_CLK_DISABLE
	mov	esi, 158325
	mov	edi, 1155597424
	call	PUT32@PLT
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	Enter_DS0, .-Enter_DS0
	.globl	Exit_DS0
	.type	Exit_DS0, @function
Exit_DS0:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	Exit_DS0, .-Exit_DS0
	.globl	DDR3_EMIF_Config
	.type	DDR3_EMIF_Config, @function
DDR3_EMIF_Config:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	EMIF_PRCM_CLK_ENABLE
	mov	eax, 0
	call	VTP_Enable
	mov	eax, 0
	call	PHY_Config_CMD
	mov	eax, 0
	call	PHY_Config_DATA
	mov	esi, 395
	mov	edi, 1155601412
	call	PUT32@PLT
	mov	esi, 395
	mov	edi, 1155601416
	call	PUT32@PLT
	mov	esi, 395
	mov	edi, 1155601420
	call	PUT32@PLT
	mov	esi, 395
	mov	edi, 1155601472
	call	PUT32@PLT
	mov	esi, 395
	mov	edi, 1155601476
	call	PUT32@PLT
	mov	edi, 1155599876
	call	GET32@PLT
	and	eax, -268435457
	mov	esi, eax
	mov	edi, 1155599876
	call	PUT32@PLT
	mov	edi, 1155601180
	call	GET32@PLT
	or	eax, 1
	mov	esi, eax
	mov	edi, 1155601180
	call	PUT32@PLT
	mov	esi, 0
	mov	edi, 1275068644
	call	PUT32@PLT
	mov	esi, 0
	mov	edi, 1275068648
	call	PUT32@PLT
	mov	esi, 0
	mov	edi, 1275068652
	call	PUT32@PLT
	mov	esi, -558899537
	mov	edi, 1275068440
	call	PUT32@PLT
	mov	esi, -558899537
	mov	edi, 1275068444
	call	PUT32@PLT
	mov	esi, -267522035
	mov	edi, 1275068448
	call	PUT32@PLT
	mov	esi, -267522035
	mov	edi, 1275068452
	call	PUT32@PLT
	mov	esi, -1161905474
	mov	edi, 1275068456
	call	PUT32@PLT
	mov	esi, -1161905474
	mov	edi, 1275068460
	call	PUT32@PLT
	mov	esi, 3120
	mov	edi, 1275068432
	call	PUT32@PLT
	mov	esi, 3120
	mov	edi, 1275068436
	call	PUT32@PLT
	mov	esi, 1342655460
	mov	edi, 1275068616
	call	PUT32@PLT
	mov	esi, 1639994162
	mov	edi, 1275068424
	call	PUT32@PLT
	mov	edi, 1275068420
	call	GET32@PLT
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	DDR3_EMIF_Config, .-DDR3_EMIF_Config
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"203996.c"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	EMIF_PRCM_CLK_ENABLE, %function
EMIF_PRCM_CLK_ENABLE:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r1, #2
	ldr	r0, .L3
	bl	PUT32
	nop
.L2:
	ldr	r0, .L3
	bl	GET32
	mov	r3, r0
	cmp	r3, #2
	bne	.L2
	nop
	nop
	pop	{fp, pc}
.L4:
	.align	2
.L3:
	.word	1155530792
	.size	EMIF_PRCM_CLK_ENABLE, .-EMIF_PRCM_CLK_ENABLE
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VTP_Enable, %function
VTP_Enable:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r1, #0
	ldr	r0, .L7
	bl	PUT32
	mov	r1, #6
	ldr	r0, .L7
	bl	PUT32
	ldr	r0, .L7
	bl	GET32
	mov	r3, r0
	orr	r3, r3, #64
	mov	r1, r3
	ldr	r0, .L7
	bl	PUT32
	ldr	r0, .L7
	bl	GET32
	mov	r3, r0
	bic	r3, r3, #1
	mov	r1, r3
	ldr	r0, .L7
	bl	PUT32
	ldr	r0, .L7
	bl	GET32
	mov	r3, r0
	orr	r3, r3, #1
	mov	r1, r3
	ldr	r0, .L7
	bl	PUT32
	nop
.L6:
	ldr	r0, .L7
	bl	GET32
	mov	r3, r0
	and	r3, r3, #32
	cmp	r3, #32
	bne	.L6
	nop
	nop
	pop	{fp, pc}
.L8:
	.align	2
.L7:
	.word	1155599884
	.size	VTP_Enable, .-VTP_Enable
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	PHY_Config_CMD, %function
PHY_Config_CMD:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, #0
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L10
.L11:
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L12
	add	r3, r2, r3
	mov	r1, #128
	mov	r0, r3
	bl	PUT32
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L12+4
	add	r3, r2, r3
	mov	r1, #0
	mov	r0, r3
	bl	PUT32
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L10:
	ldr	r3, [fp, #-8]
	cmp	r3, #2
	bls	.L11
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L13:
	.align	2
.L12:
	.word	1155604508
	.word	1155604524
	.size	PHY_Config_CMD, .-PHY_Config_CMD
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	PHY_Config_DATA, %function
PHY_Config_DATA:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L15
.L16:
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L17
	add	r3, r2, r3
	mov	r1, #0
	mov	r0, r3
	bl	PUT32
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L17+4
	add	r3, r2, r3
	mov	r1, #0
	mov	r0, r3
	bl	PUT32
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L17+8
	add	r3, r2, r3
	mov	r1, #0
	mov	r0, r3
	bl	PUT32
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, .L17+12
	add	r3, r2, r3
	mov	r1, #125
	mov	r0, r3
	bl	PUT32
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L15:
	ldr	r3, [fp, #-8]
	cmp	r3, #1
	bls	.L16
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L18:
	.align	2
.L17:
	.word	1155604680
	.word	1155604700
	.word	1155604744
	.word	1155604768
	.size	PHY_Config_DATA, .-PHY_Config_DATA
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	enable_SYS_CLKOUT2, %function
enable_SYS_CLKOUT2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r0, .L20
	bl	GET32
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	orr	r3, r3, #128
	str	r3, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L20
	bl	PUT32
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L21:
	.align	2
.L20:
	.word	1155532544
	.size	enable_SYS_CLKOUT2, .-enable_SYS_CLKOUT2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	set_CLKOUT2, %function
set_CLKOUT2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, #2
	str	r3, [fp, #-12]
	mov	r1, #3
	ldr	r0, .L23
	bl	PUT32
	ldr	r3, [fp, #-12]
	sub	r3, r3, #1
	lsl	r3, r3, #3
	mov	r1, r3
	ldr	r0, .L23+4
	bl	PUT32
	ldr	r0, .L23+4
	bl	GET32
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	bic	r3, r3, #7
	ldr	r2, [fp, #-16]
	orr	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L23+4
	bl	PUT32
	bl	enable_SYS_CLKOUT2
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L24:
	.align	2
.L23:
	.word	1155598772
	.word	1155532544
	.size	set_CLKOUT2, .-set_CLKOUT2
	.align	2
	.global	OSC_32KHz
	.syntax unified
	.arm
	.fpu softvfp
	.type	OSC_32KHz, %function
OSC_32KHz:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #0
	bl	set_CLKOUT2
	nop
	pop	{fp, pc}
	.size	OSC_32KHz, .-OSC_32KHz
	.align	2
	.global	L3_CLK
	.syntax unified
	.arm
	.fpu softvfp
	.type	L3_CLK, %function
L3_CLK:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #1
	bl	set_CLKOUT2
	nop
	pop	{fp, pc}
	.size	L3_CLK, .-L3_CLK
	.align	2
	.global	DDR_PHY_Clock
	.syntax unified
	.arm
	.fpu softvfp
	.type	DDR_PHY_Clock, %function
DDR_PHY_Clock:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	EMIF_PRCM_CLK_ENABLE
	mov	r0, #2
	bl	set_CLKOUT2
	nop
	pop	{fp, pc}
	.size	DDR_PHY_Clock, .-DDR_PHY_Clock
	.align	2
	.global	PER_Clock
	.syntax unified
	.arm
	.fpu softvfp
	.type	PER_Clock, %function
PER_Clock:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #3
	bl	set_CLKOUT2
	nop
	pop	{fp, pc}
	.size	PER_Clock, .-PER_Clock
	.align	2
	.global	LCD_Clock
	.syntax unified
	.arm
	.fpu softvfp
	.type	LCD_Clock, %function
LCD_Clock:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #4
	bl	set_CLKOUT2
	nop
	pop	{fp, pc}
	.size	LCD_Clock, .-LCD_Clock
	.align	2
	.global	Device_Type
	.syntax unified
	.arm
	.fpu softvfp
	.type	Device_Type, %function
Device_Type:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r0, .L31
	bl	GET32
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #8
	and	r3, r3, #7
	str	r3, [fp, #-8]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L32:
	.align	2
.L31:
	.word	1155596352
	.size	Device_Type, .-Device_Type
	.align	2
	.global	EMIF_PRCM_CLK_DISABLE
	.syntax unified
	.arm
	.fpu softvfp
	.type	EMIF_PRCM_CLK_DISABLE, %function
EMIF_PRCM_CLK_DISABLE:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r1, #0
	ldr	r0, .L35
	bl	PUT32
	nop
.L34:
	ldr	r0, .L35
	bl	GET32
	mov	r3, r0
	cmp	r3, #196608
	bne	.L34
	nop
	nop
	pop	{fp, pc}
.L36:
	.align	2
.L35:
	.word	1155530792
	.size	EMIF_PRCM_CLK_DISABLE, .-EMIF_PRCM_CLK_DISABLE
	.align	2
	.global	Enter_DS0
	.syntax unified
	.arm
	.fpu softvfp
	.type	Enter_DS0, %function
Enter_DS0:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	EMIF_PRCM_CLK_ENABLE
	mov	r1, #268435456
	ldr	r0, .L38
	bl	PUT32
	mov	r1, #0
	ldr	r0, .L38+4
	bl	PUT32
	mov	r1, #1048576
	ldr	r0, .L38+8
	bl	PUT32
	mov	r1, #1048576
	ldr	r0, .L38+12
	bl	PUT32
	ldr	r1, .L38+16
	ldr	r0, .L38+20
	bl	PUT32
	ldr	r1, .L38+16
	ldr	r0, .L38+24
	bl	PUT32
	ldr	r1, .L38+28
	ldr	r0, .L38+32
	bl	PUT32
	ldr	r1, .L38+28
	ldr	r0, .L38+36
	bl	PUT32
	ldr	r1, .L38+40
	ldr	r0, .L38+44
	bl	PUT32
	mov	r1, #672
	ldr	r0, .L38+48
	bl	PUT32
	mov	r1, #672
	ldr	r0, .L38+52
	bl	PUT32
	mov	r1, #1
	ldr	r0, .L38+56
	bl	PUT32
	bl	EMIF_PRCM_CLK_DISABLE
	ldr	r1, .L38+60
	ldr	r0, .L38+64
	bl	PUT32
	nop
	pop	{fp, pc}
.L39:
	.align	2
.L38:
	.word	1155599876
	.word	1275072020
	.word	1275068644
	.word	1275068648
	.word	1072693251
	.word	1155601472
	.word	1155601476
	.word	-2096757
	.word	1155601412
	.word	1155601416
	.word	-6289013
	.word	1155601420
	.word	1275068472
	.word	1275068476
	.word	1155601180
	.word	158325
	.word	1155597424
	.size	Enter_DS0, .-Enter_DS0
	.align	2
	.global	Exit_DS0
	.syntax unified
	.arm
	.fpu softvfp
	.type	Exit_DS0, %function
Exit_DS0:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	Exit_DS0, .-Exit_DS0
	.align	2
	.global	DDR3_EMIF_Config
	.syntax unified
	.arm
	.fpu softvfp
	.type	DDR3_EMIF_Config, %function
DDR3_EMIF_Config:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	EMIF_PRCM_CLK_ENABLE
	bl	VTP_Enable
	bl	PHY_Config_CMD
	bl	PHY_Config_DATA
	ldr	r1, .L42
	ldr	r0, .L42+4
	bl	PUT32
	ldr	r1, .L42
	ldr	r0, .L42+8
	bl	PUT32
	ldr	r1, .L42
	ldr	r0, .L42+12
	bl	PUT32
	ldr	r1, .L42
	ldr	r0, .L42+16
	bl	PUT32
	ldr	r1, .L42
	ldr	r0, .L42+20
	bl	PUT32
	ldr	r0, .L42+24
	bl	GET32
	mov	r3, r0
	bic	r3, r3, #268435456
	mov	r1, r3
	ldr	r0, .L42+24
	bl	PUT32
	ldr	r0, .L42+28
	bl	GET32
	mov	r3, r0
	orr	r3, r3, #1
	mov	r1, r3
	ldr	r0, .L42+28
	bl	PUT32
	mov	r1, #0
	ldr	r0, .L42+32
	bl	PUT32
	mov	r1, #0
	ldr	r0, .L42+36
	bl	PUT32
	mov	r1, #0
	ldr	r0, .L42+40
	bl	PUT32
	ldr	r1, .L42+44
	ldr	r0, .L42+48
	bl	PUT32
	ldr	r1, .L42+44
	ldr	r0, .L42+52
	bl	PUT32
	ldr	r1, .L42+56
	ldr	r0, .L42+60
	bl	PUT32
	ldr	r1, .L42+56
	ldr	r0, .L42+64
	bl	PUT32
	ldr	r1, .L42+68
	ldr	r0, .L42+72
	bl	PUT32
	ldr	r1, .L42+68
	ldr	r0, .L42+76
	bl	PUT32
	mov	r1, #3120
	ldr	r0, .L42+80
	bl	PUT32
	mov	r1, #3120
	ldr	r0, .L42+84
	bl	PUT32
	ldr	r1, .L42+88
	ldr	r0, .L42+92
	bl	PUT32
	ldr	r1, .L42+96
	ldr	r0, .L42+100
	bl	PUT32
	ldr	r0, .L42+104
	bl	GET32
	nop
	pop	{fp, pc}
.L43:
	.align	2
.L42:
	.word	395
	.word	1155601412
	.word	1155601416
	.word	1155601420
	.word	1155601472
	.word	1155601476
	.word	1155599876
	.word	1155601180
	.word	1275068644
	.word	1275068648
	.word	1275068652
	.word	-558899537
	.word	1275068440
	.word	1275068444
	.word	-267522035
	.word	1275068448
	.word	1275068452
	.word	-1161905474
	.word	1275068456
	.word	1275068460
	.word	1275068432
	.word	1275068436
	.word	1342655460
	.word	1275068616
	.word	1639994162
	.word	1275068424
	.word	1275068420
	.size	DDR3_EMIF_Config, .-DDR3_EMIF_Config
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
