	.file	"450554.c"
	.intel_syntax noprefix
	.text
	.globl	glob0
	.bss
	.align 2
	.type	glob0, @object
	.size	glob0, 2
glob0:
	.zero	2
	.globl	glob1
	.align 2
	.type	glob1, @object
	.size	glob1, 2
glob1:
	.zero	2
	.text
	.globl	reg0reg1
	.type	reg0reg1, @function
reg0reg1:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	cmp	ax, WORD PTR -8[rbp]
	jg	.L2
	mov	eax, 1
	jmp	.L3
.L2:
	mov	eax, 0
.L3:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	reg0reg1, .-reg0reg1
	.globl	reg0indreg1
	.type	reg0indreg1, @function
reg0indreg1:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -4[rbp], ax
	jg	.L5
	mov	eax, 1
	jmp	.L6
.L5:
	mov	eax, 0
.L6:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	reg0indreg1, .-reg0indreg1
	.globl	reg0imm1
	.type	reg0imm1, @function
reg0imm1:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	cmp	WORD PTR -4[rbp], 33
	jg	.L8
	mov	eax, 1
	jmp	.L9
.L8:
	mov	eax, 0
.L9:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	reg0imm1, .-reg0imm1
	.globl	reg0limm1
	.type	reg0limm1, @function
reg0limm1:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	lea	rax, glob1[rip]
	cmp	WORD PTR -4[rbp], ax
	jg	.L11
	mov	eax, 1
	jmp	.L12
.L11:
	mov	eax, 0
.L12:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	reg0limm1, .-reg0limm1
	.globl	reg0adr1
	.type	reg0adr1, @function
reg0adr1:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -4[rbp], ax
	jg	.L14
	mov	eax, 1
	jmp	.L15
.L14:
	mov	eax, 0
.L15:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	reg0adr1, .-reg0adr1
	.globl	reg0adrreg1
	.type	reg0adrreg1, @function
reg0adrreg1:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -4[rbp], ax
	jg	.L17
	mov	eax, 1
	jmp	.L18
.L17:
	mov	eax, 0
.L18:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	reg0adrreg1, .-reg0adrreg1
	.globl	reg0adrx1
	.type	reg0adrx1, @function
reg0adrx1:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -4[rbp], ax
	jg	.L20
	mov	eax, 1
	jmp	.L21
.L20:
	mov	eax, 0
.L21:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	reg0adrx1, .-reg0adrx1
	.globl	reg0regx1
	.type	reg0regx1, @function
reg0regx1:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -4[rbp], ax
	jg	.L23
	mov	eax, 1
	jmp	.L24
.L23:
	mov	eax, 0
.L24:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	reg0regx1, .-reg0regx1
	.globl	indreg0reg1
	.type	indreg0reg1, @function
indreg0reg1:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -8[rbp], ax
	jl	.L26
	mov	eax, 1
	jmp	.L27
.L26:
	mov	eax, 0
.L27:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	indreg0reg1, .-indreg0reg1
	.globl	indreg0indreg1
	.type	indreg0indreg1, @function
indreg0indreg1:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L29
	mov	eax, 1
	jmp	.L30
.L29:
	mov	eax, 0
.L30:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	indreg0indreg1, .-indreg0indreg1
	.globl	indreg0imm1
	.type	indreg0imm1, @function
indreg0imm1:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	ax, 33
	jg	.L32
	mov	eax, 1
	jmp	.L33
.L32:
	mov	eax, 0
.L33:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	indreg0imm1, .-indreg0imm1
	.globl	indreg0limm1
	.type	indreg0limm1, @function
indreg0limm1:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob1[rip]
	cmp	ax, dx
	jg	.L35
	mov	eax, 1
	jmp	.L36
.L35:
	mov	eax, 0
.L36:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	indreg0limm1, .-indreg0limm1
	.globl	indreg0adr1
	.type	indreg0adr1, @function
indreg0adr1:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	edx, WORD PTR [rax]
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L38
	mov	eax, 1
	jmp	.L39
.L38:
	mov	eax, 0
.L39:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	indreg0adr1, .-indreg0adr1
	.globl	indreg0adrreg1
	.type	indreg0adrreg1, @function
indreg0adrreg1:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L41
	mov	eax, 1
	jmp	.L42
.L41:
	mov	eax, 0
.L42:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	indreg0adrreg1, .-indreg0adrreg1
	.globl	indreg0adrx1
	.type	indreg0adrx1, @function
indreg0adrx1:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L44
	mov	eax, 1
	jmp	.L45
.L44:
	mov	eax, 0
.L45:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	indreg0adrx1, .-indreg0adrx1
	.globl	indreg0regx1
	.type	indreg0regx1, @function
indreg0regx1:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L47
	mov	eax, 1
	jmp	.L48
.L47:
	mov	eax, 0
.L48:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	indreg0regx1, .-indreg0regx1
	.globl	imm0reg1
	.type	imm0reg1, @function
imm0reg1:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	cmp	WORD PTR -8[rbp], 21
	jle	.L50
	mov	eax, 1
	jmp	.L51
.L50:
	mov	eax, 0
.L51:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	imm0reg1, .-imm0reg1
	.globl	imm0indreg1
	.type	imm0indreg1, @function
imm0indreg1:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	ax, 21
	jle	.L53
	mov	eax, 1
	jmp	.L54
.L53:
	mov	eax, 0
.L54:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	imm0indreg1, .-imm0indreg1
	.globl	imm0imm1
	.type	imm0imm1, @function
imm0imm1:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	imm0imm1, .-imm0imm1
	.globl	imm0limm1
	.type	imm0limm1, @function
imm0limm1:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	lea	rax, glob1[rip]
	cmp	ax, 21
	jle	.L58
	mov	eax, 1
	jmp	.L59
.L58:
	mov	eax, 0
.L59:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	imm0limm1, .-imm0limm1
	.globl	imm0adr1
	.type	imm0adr1, @function
imm0adr1:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	ax, 21
	jle	.L61
	mov	eax, 1
	jmp	.L62
.L61:
	mov	eax, 0
.L62:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	imm0adr1, .-imm0adr1
	.globl	imm0adrreg1
	.type	imm0adrreg1, @function
imm0adrreg1:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	cmp	ax, 21
	jle	.L64
	mov	eax, 1
	jmp	.L65
.L64:
	mov	eax, 0
.L65:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	imm0adrreg1, .-imm0adrreg1
	.globl	imm0adrx1
	.type	imm0adrx1, @function
imm0adrx1:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	ax, 21
	jle	.L67
	mov	eax, 1
	jmp	.L68
.L67:
	mov	eax, 0
.L68:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	imm0adrx1, .-imm0adrx1
	.globl	imm0regx1
	.type	imm0regx1, @function
imm0regx1:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	cmp	ax, 21
	jle	.L70
	mov	eax, 1
	jmp	.L71
.L70:
	mov	eax, 0
.L71:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	imm0regx1, .-imm0regx1
	.globl	limm0reg1
	.type	limm0reg1, @function
limm0reg1:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	lea	rax, glob0[rip]
	cmp	WORD PTR -8[rbp], ax
	jl	.L73
	mov	eax, 1
	jmp	.L74
.L73:
	mov	eax, 0
.L74:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	limm0reg1, .-limm0reg1
	.globl	limm0indreg1
	.type	limm0indreg1, @function
limm0indreg1:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob0[rip]
	cmp	ax, dx
	jl	.L76
	mov	eax, 1
	jmp	.L77
.L76:
	mov	eax, 0
.L77:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	limm0indreg1, .-limm0indreg1
	.globl	limm0imm1
	.type	limm0imm1, @function
limm0imm1:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	lea	rax, glob0[rip]
	cmp	ax, 33
	jg	.L79
	mov	eax, 1
	jmp	.L80
.L79:
	mov	eax, 0
.L80:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	limm0imm1, .-limm0imm1
	.globl	limm0limm1
	.type	limm0limm1, @function
limm0limm1:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	lea	rax, glob1[rip]
	mov	edx, eax
	lea	rax, glob0[rip]
	cmp	dx, ax
	jl	.L82
	mov	eax, 1
	jmp	.L83
.L82:
	mov	eax, 0
.L83:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	limm0limm1, .-limm0limm1
	.globl	limm0adr1
	.type	limm0adr1, @function
limm0adr1:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob0[rip]
	cmp	ax, dx
	jl	.L85
	mov	eax, 1
	jmp	.L86
.L85:
	mov	eax, 0
.L86:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	limm0adr1, .-limm0adr1
	.globl	limm0adrreg1
	.type	limm0adrreg1, @function
limm0adrreg1:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob0[rip]
	cmp	ax, dx
	jl	.L88
	mov	eax, 1
	jmp	.L89
.L88:
	mov	eax, 0
.L89:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	limm0adrreg1, .-limm0adrreg1
	.globl	limm0adrx1
	.type	limm0adrx1, @function
limm0adrx1:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob0[rip]
	cmp	ax, dx
	jl	.L91
	mov	eax, 1
	jmp	.L92
.L91:
	mov	eax, 0
.L92:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	limm0adrx1, .-limm0adrx1
	.globl	limm0regx1
	.type	limm0regx1, @function
limm0regx1:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob0[rip]
	cmp	ax, dx
	jl	.L94
	mov	eax, 1
	jmp	.L95
.L94:
	mov	eax, 0
.L95:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	limm0regx1, .-limm0regx1
	.globl	adr0reg1
	.type	adr0reg1, @function
adr0reg1:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -8[rbp], ax
	jl	.L97
	mov	eax, 1
	jmp	.L98
.L97:
	mov	eax, 0
.L98:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	adr0reg1, .-adr0reg1
	.globl	adr0indreg1
	.type	adr0indreg1, @function
adr0indreg1:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L100
	mov	eax, 1
	jmp	.L101
.L100:
	mov	eax, 0
.L101:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	adr0indreg1, .-adr0indreg1
	.globl	adr0imm1
	.type	adr0imm1, @function
adr0imm1:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	eax, WORD PTR [rax]
	cmp	ax, 33
	jg	.L103
	mov	eax, 1
	jmp	.L104
.L103:
	mov	eax, 0
.L104:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	adr0imm1, .-adr0imm1
	.globl	adr0limm1
	.type	adr0limm1, @function
adr0limm1:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob1[rip]
	cmp	ax, dx
	jg	.L106
	mov	eax, 1
	jmp	.L107
.L106:
	mov	eax, 0
.L107:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	adr0limm1, .-adr0limm1
	.globl	adr0adr1
	.type	adr0adr1, @function
adr0adr1:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L109
	mov	eax, 1
	jmp	.L110
.L109:
	mov	eax, 0
.L110:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	adr0adr1, .-adr0adr1
	.globl	adr0adrreg1
	.type	adr0adrreg1, @function
adr0adrreg1:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L112
	mov	eax, 1
	jmp	.L113
.L112:
	mov	eax, 0
.L113:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	adr0adrreg1, .-adr0adrreg1
	.globl	adr0adrx1
	.type	adr0adrx1, @function
adr0adrx1:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L115
	mov	eax, 1
	jmp	.L116
.L115:
	mov	eax, 0
.L116:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	adr0adrx1, .-adr0adrx1
	.globl	adr0regx1
	.type	adr0regx1, @function
adr0regx1:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L118
	mov	eax, 1
	jmp	.L119
.L118:
	mov	eax, 0
.L119:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	adr0regx1, .-adr0regx1
	.globl	adrreg0reg1
	.type	adrreg0reg1, @function
adrreg0reg1:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -8[rbp], ax
	jl	.L121
	mov	eax, 1
	jmp	.L122
.L121:
	mov	eax, 0
.L122:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	adrreg0reg1, .-adrreg0reg1
	.globl	adrreg0indreg1
	.type	adrreg0indreg1, @function
adrreg0indreg1:
.LFB41:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L124
	mov	eax, 1
	jmp	.L125
.L124:
	mov	eax, 0
.L125:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	adrreg0indreg1, .-adrreg0indreg1
	.globl	adrreg0imm1
	.type	adrreg0imm1, @function
adrreg0imm1:
.LFB42:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	eax, WORD PTR [rax]
	cmp	ax, 33
	jg	.L127
	mov	eax, 1
	jmp	.L128
.L127:
	mov	eax, 0
.L128:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	adrreg0imm1, .-adrreg0imm1
	.globl	adrreg0limm1
	.type	adrreg0limm1, @function
adrreg0limm1:
.LFB43:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob1[rip]
	cmp	ax, dx
	jg	.L130
	mov	eax, 1
	jmp	.L131
.L130:
	mov	eax, 0
.L131:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	adrreg0limm1, .-adrreg0limm1
	.globl	adrreg0adr1
	.type	adrreg0adr1, @function
adrreg0adr1:
.LFB44:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	edx, WORD PTR [rax]
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L133
	mov	eax, 1
	jmp	.L134
.L133:
	mov	eax, 0
.L134:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	adrreg0adr1, .-adrreg0adr1
	.globl	adrreg0adrreg1
	.type	adrreg0adrreg1, @function
adrreg0adrreg1:
.LFB45:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L136
	mov	eax, 1
	jmp	.L137
.L136:
	mov	eax, 0
.L137:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	adrreg0adrreg1, .-adrreg0adrreg1
	.globl	adrreg0adrx1
	.type	adrreg0adrx1, @function
adrreg0adrx1:
.LFB46:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L139
	mov	eax, 1
	jmp	.L140
.L139:
	mov	eax, 0
.L140:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE46:
	.size	adrreg0adrx1, .-adrreg0adrx1
	.globl	adrreg0regx1
	.type	adrreg0regx1, @function
adrreg0regx1:
.LFB47:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 20000000
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L142
	mov	eax, 1
	jmp	.L143
.L142:
	mov	eax, 0
.L143:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE47:
	.size	adrreg0regx1, .-adrreg0regx1
	.globl	adrx0reg1
	.type	adrx0reg1, @function
adrx0reg1:
.LFB48:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -8[rbp], ax
	jl	.L145
	mov	eax, 1
	jmp	.L146
.L145:
	mov	eax, 0
.L146:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE48:
	.size	adrx0reg1, .-adrx0reg1
	.globl	adrx0indreg1
	.type	adrx0indreg1, @function
adrx0indreg1:
.LFB49:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L148
	mov	eax, 1
	jmp	.L149
.L148:
	mov	eax, 0
.L149:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE49:
	.size	adrx0indreg1, .-adrx0indreg1
	.globl	adrx0imm1
	.type	adrx0imm1, @function
adrx0imm1:
.LFB50:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	eax, WORD PTR [rax]
	cmp	ax, 33
	jg	.L151
	mov	eax, 1
	jmp	.L152
.L151:
	mov	eax, 0
.L152:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE50:
	.size	adrx0imm1, .-adrx0imm1
	.globl	adrx0limm1
	.type	adrx0limm1, @function
adrx0limm1:
.LFB51:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob1[rip]
	cmp	ax, dx
	jg	.L154
	mov	eax, 1
	jmp	.L155
.L154:
	mov	eax, 0
.L155:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE51:
	.size	adrx0limm1, .-adrx0limm1
	.globl	adrx0adr1
	.type	adrx0adr1, @function
adrx0adr1:
.LFB52:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L157
	mov	eax, 1
	jmp	.L158
.L157:
	mov	eax, 0
.L158:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE52:
	.size	adrx0adr1, .-adrx0adr1
	.globl	adrx0adrreg1
	.type	adrx0adrreg1, @function
adrx0adrreg1:
.LFB53:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L160
	mov	eax, 1
	jmp	.L161
.L160:
	mov	eax, 0
.L161:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE53:
	.size	adrx0adrreg1, .-adrx0adrreg1
	.globl	adrx0adrx1
	.type	adrx0adrx1, @function
adrx0adrx1:
.LFB54:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L163
	mov	eax, 1
	jmp	.L164
.L163:
	mov	eax, 0
.L164:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE54:
	.size	adrx0adrx1, .-adrx0adrx1
	.globl	adrx0regx1
	.type	adrx0regx1, @function
adrx0regx1:
.LFB55:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	add	rax, rax
	add	rax, 10000000
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L166
	mov	eax, 1
	jmp	.L167
.L166:
	mov	eax, 0
.L167:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE55:
	.size	adrx0regx1, .-adrx0regx1
	.globl	regx0reg1
	.type	regx0reg1, @function
regx0reg1:
.LFB56:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	cmp	WORD PTR -8[rbp], ax
	jl	.L169
	mov	eax, 1
	jmp	.L170
.L169:
	mov	eax, 0
.L170:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE56:
	.size	regx0reg1, .-regx0reg1
	.globl	regx0indreg1
	.type	regx0indreg1, @function
regx0indreg1:
.LFB57:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L172
	mov	eax, 1
	jmp	.L173
.L172:
	mov	eax, 0
.L173:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE57:
	.size	regx0indreg1, .-regx0indreg1
	.globl	regx0imm1
	.type	regx0imm1, @function
regx0imm1:
.LFB58:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	cmp	ax, 33
	jg	.L175
	mov	eax, 1
	jmp	.L176
.L175:
	mov	eax, 0
.L176:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE58:
	.size	regx0imm1, .-regx0imm1
	.globl	regx0limm1
	.type	regx0limm1, @function
regx0limm1:
.LFB59:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	lea	rdx, glob1[rip]
	cmp	ax, dx
	jg	.L178
	mov	eax, 1
	jmp	.L179
.L178:
	mov	eax, 0
.L179:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE59:
	.size	regx0limm1, .-regx0limm1
	.globl	regx0adr1
	.type	regx0adr1, @function
regx0adr1:
.LFB60:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR [rax]
	mov	eax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L181
	mov	eax, 1
	jmp	.L182
.L181:
	mov	eax, 0
.L182:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE60:
	.size	regx0adr1, .-regx0adr1
	.globl	regx0adrreg1
	.type	regx0adrreg1, @function
regx0adrreg1:
.LFB61:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 555554
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L184
	mov	eax, 1
	jmp	.L185
.L184:
	mov	eax, 0
.L185:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE61:
	.size	regx0adrreg1, .-regx0adrreg1
	.globl	regx0adrx1
	.type	regx0adrx1, @function
regx0adrx1:
.LFB62:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	add	rax, rax
	add	rax, 11111111
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L187
	mov	eax, 1
	jmp	.L188
.L187:
	mov	eax, 0
.L188:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE62:
	.size	regx0adrx1, .-regx0adrx1
	.globl	regx0regx1
	.type	regx0regx1, @function
regx0regx1:
.LFB63:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	mov	QWORD PTR -24[rbp], r8
	mov	QWORD PTR -32[rbp], r9
	mov	edx, edi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, [rax+rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	movzx	eax, WORD PTR [rax]
	cmp	dx, ax
	jg	.L190
	mov	eax, 1
	jmp	.L191
.L190:
	mov	eax, 0
.L191:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE63:
	.size	regx0regx1, .-regx0regx1
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"450554.c"
	.text
	.comm	glob0,2,2
	.comm	glob1,2,2
	.align	2
	.global	reg0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0reg1, %function
reg0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r2, [fp, #-8]
	ldrsh	r3, [fp, #-12]
	cmp	r2, r3
	bgt	.L2
	mov	r3, #1
	b	.L3
.L2:
	mov	r3, #0
.L3:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg0reg1, .-reg0reg1
	.align	2
	.global	reg0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0indreg1, %function
reg0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #8]
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-8]
	cmp	r2, r3
	bgt	.L5
	mov	r3, #1
	b	.L6
.L5:
	mov	r3, #0
.L6:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg0indreg1, .-reg0indreg1
	.align	2
	.global	reg0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0imm1, %function
reg0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-8]
	cmp	r3, #33
	bgt	.L8
	mov	r3, #1
	b	.L9
.L8:
	mov	r3, #0
.L9:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg0imm1, .-reg0imm1
	.align	2
	.global	reg0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0limm1, %function
reg0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L13
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldrsh	r2, [fp, #-8]
	cmp	r2, r3
	bgt	.L11
	mov	r3, #1
	b	.L12
.L11:
	mov	r3, #0
.L12:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L14:
	.align	2
.L13:
	.word	glob1
	.size	reg0limm1, .-reg0limm1
	.align	2
	.global	reg0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0adr1, %function
reg0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L18
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-8]
	cmp	r2, r3
	bgt	.L16
	mov	r3, #1
	b	.L17
.L16:
	mov	r3, #0
.L17:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L19:
	.align	2
.L18:
	.word	11111111
	.size	reg0adr1, .-reg0adr1
	.align	2
	.global	reg0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0adrreg1, %function
reg0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #8]
	ldr	r3, .L23
	add	r3, r2, r3
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-8]
	cmp	r2, r3
	bgt	.L21
	mov	r3, #1
	b	.L22
.L21:
	mov	r3, #0
.L22:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L24:
	.align	2
.L23:
	.word	555554
	.size	reg0adrreg1, .-reg0adrreg1
	.align	2
	.global	reg0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0adrx1, %function
reg0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r2, r3, #1
	ldr	r3, .L28
	add	r3, r2, r3
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-8]
	cmp	r2, r3
	bgt	.L26
	mov	r3, #1
	b	.L27
.L26:
	mov	r3, #0
.L27:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L29:
	.align	2
.L28:
	.word	11111111
	.size	reg0adrx1, .-reg0adrx1
	.align	2
	.global	reg0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg0regx1, %function
reg0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r2, [fp, #8]
	add	r3, r2, r3
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-8]
	cmp	r2, r3
	bgt	.L31
	mov	r3, #1
	b	.L32
.L31:
	mov	r3, #0
.L32:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg0regx1, .-reg0regx1
	.align	2
	.global	indreg0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0reg1, %function
indreg0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L34
	mov	r3, #1
	b	.L35
.L34:
	mov	r3, #0
.L35:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	indreg0reg1, .-indreg0reg1
	.align	2
	.global	indreg0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0indreg1, %function
indreg0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r2, [r3]
	ldr	r3, [fp, #8]
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L37
	mov	r3, #1
	b	.L38
.L37:
	mov	r3, #0
.L38:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	indreg0indreg1, .-indreg0indreg1
	.align	2
	.global	indreg0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0imm1, %function
indreg0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r3, [r3]
	cmp	r3, #33
	bgt	.L40
	mov	r3, #1
	b	.L41
.L40:
	mov	r3, #0
.L41:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	indreg0imm1, .-indreg0imm1
	.align	2
	.global	indreg0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0limm1, %function
indreg0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r2, [r3]
	ldr	r3, .L45
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	bgt	.L43
	mov	r3, #1
	b	.L44
.L43:
	mov	r3, #0
.L44:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L46:
	.align	2
.L45:
	.word	glob1
	.size	indreg0limm1, .-indreg0limm1
	.align	2
	.global	indreg0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0adr1, %function
indreg0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r2, [r3]
	ldr	r3, .L50
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L48
	mov	r3, #1
	b	.L49
.L48:
	mov	r3, #0
.L49:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L51:
	.align	2
.L50:
	.word	11111111
	.size	indreg0adr1, .-indreg0adr1
	.align	2
	.global	indreg0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0adrreg1, %function
indreg0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r2, [r3]
	ldr	r1, [fp, #8]
	ldr	r3, .L55
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L53
	mov	r3, #1
	b	.L54
.L53:
	mov	r3, #0
.L54:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L56:
	.align	2
.L55:
	.word	555554
	.size	indreg0adrreg1, .-indreg0adrreg1
	.align	2
	.global	indreg0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0adrx1, %function
indreg0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r1, r3, #1
	ldr	r3, .L60
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L58
	mov	r3, #1
	b	.L59
.L58:
	mov	r3, #0
.L59:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L61:
	.align	2
.L60:
	.word	11111111
	.size	indreg0adrx1, .-indreg0adrx1
	.align	2
	.global	indreg0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	indreg0regx1, %function
indreg0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #4]
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r1, [fp, #8]
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L63
	mov	r3, #1
	b	.L64
.L63:
	mov	r3, #0
.L64:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	indreg0regx1, .-indreg0regx1
	.align	2
	.global	imm0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0reg1, %function
imm0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldrsh	r3, [fp, #-12]
	cmp	r3, #21
	ble	.L66
	mov	r3, #1
	b	.L67
.L66:
	mov	r3, #0
.L67:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	imm0reg1, .-imm0reg1
	.align	2
	.global	imm0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0indreg1, %function
imm0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #8]
	ldrsh	r3, [r3]
	cmp	r3, #21
	ble	.L69
	mov	r3, #1
	b	.L70
.L69:
	mov	r3, #0
.L70:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	imm0indreg1, .-imm0indreg1
	.align	2
	.global	imm0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0imm1, %function
imm0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	mov	r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	imm0imm1, .-imm0imm1
	.align	2
	.global	imm0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0limm1, %function
imm0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L76
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #21
	ble	.L74
	mov	r3, #1
	b	.L75
.L74:
	mov	r3, #0
.L75:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L77:
	.align	2
.L76:
	.word	glob1
	.size	imm0limm1, .-imm0limm1
	.align	2
	.global	imm0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0adr1, %function
imm0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L81
	ldrsh	r3, [r3]
	cmp	r3, #21
	ble	.L79
	mov	r3, #1
	b	.L80
.L79:
	mov	r3, #0
.L80:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L82:
	.align	2
.L81:
	.word	11111111
	.size	imm0adr1, .-imm0adr1
	.align	2
	.global	imm0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0adrreg1, %function
imm0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #8]
	ldr	r3, .L86
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #21
	ble	.L84
	mov	r3, #1
	b	.L85
.L84:
	mov	r3, #0
.L85:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L87:
	.align	2
.L86:
	.word	555554
	.size	imm0adrreg1, .-imm0adrreg1
	.align	2
	.global	imm0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0adrx1, %function
imm0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r2, r3, #1
	ldr	r3, .L91
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #21
	ble	.L89
	mov	r3, #1
	b	.L90
.L89:
	mov	r3, #0
.L90:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L92:
	.align	2
.L91:
	.word	11111111
	.size	imm0adrx1, .-imm0adrx1
	.align	2
	.global	imm0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm0regx1, %function
imm0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r2, [fp, #8]
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #21
	ble	.L94
	mov	r3, #1
	b	.L95
.L94:
	mov	r3, #0
.L95:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	imm0regx1, .-imm0regx1
	.align	2
	.global	limm0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0reg1, %function
limm0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L99
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldrsh	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L97
	mov	r3, #1
	b	.L98
.L97:
	mov	r3, #0
.L98:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L100:
	.align	2
.L99:
	.word	glob0
	.size	limm0reg1, .-limm0reg1
	.align	2
	.global	limm0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0indreg1, %function
limm0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #8]
	ldrsh	r2, [r3]
	ldr	r3, .L104
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	blt	.L102
	mov	r3, #1
	b	.L103
.L102:
	mov	r3, #0
.L103:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L105:
	.align	2
.L104:
	.word	glob0
	.size	limm0indreg1, .-limm0indreg1
	.align	2
	.global	limm0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0imm1, %function
limm0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L109
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r3, #33
	bgt	.L107
	mov	r3, #1
	b	.L108
.L107:
	mov	r3, #0
.L108:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L110:
	.align	2
.L109:
	.word	glob0
	.size	limm0imm1, .-limm0imm1
	.align	2
	.global	limm0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0limm1, %function
limm0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L114
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, .L114+4
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	blt	.L112
	mov	r3, #1
	b	.L113
.L112:
	mov	r3, #0
.L113:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L115:
	.align	2
.L114:
	.word	glob1
	.word	glob0
	.size	limm0limm1, .-limm0limm1
	.align	2
	.global	limm0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0adr1, %function
limm0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L119
	ldrsh	r2, [r3]
	ldr	r3, .L119+4
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	blt	.L117
	mov	r3, #1
	b	.L118
.L117:
	mov	r3, #0
.L118:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L120:
	.align	2
.L119:
	.word	11111111
	.word	glob0
	.size	limm0adr1, .-limm0adr1
	.align	2
	.global	limm0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0adrreg1, %function
limm0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #8]
	ldr	r3, .L124
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L124+4
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	blt	.L122
	mov	r3, #1
	b	.L123
.L122:
	mov	r3, #0
.L123:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L125:
	.align	2
.L124:
	.word	555554
	.word	glob0
	.size	limm0adrreg1, .-limm0adrreg1
	.align	2
	.global	limm0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0adrx1, %function
limm0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r2, r3, #1
	ldr	r3, .L129
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L129+4
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	blt	.L127
	mov	r3, #1
	b	.L128
.L127:
	mov	r3, #0
.L128:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L130:
	.align	2
.L129:
	.word	11111111
	.word	glob0
	.size	limm0adrx1, .-limm0adrx1
	.align	2
	.global	limm0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	limm0regx1, %function
limm0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r2, [fp, #8]
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L134
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	blt	.L132
	mov	r3, #1
	b	.L133
.L132:
	mov	r3, #0
.L133:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L135:
	.align	2
.L134:
	.word	glob0
	.size	limm0regx1, .-limm0regx1
	.align	2
	.global	adr0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0reg1, %function
adr0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L139
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L137
	mov	r3, #1
	b	.L138
.L137:
	mov	r3, #0
.L138:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L140:
	.align	2
.L139:
	.word	10000000
	.size	adr0reg1, .-adr0reg1
	.align	2
	.global	adr0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0indreg1, %function
adr0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L144
	ldrsh	r2, [r3]
	ldr	r3, [fp, #8]
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L142
	mov	r3, #1
	b	.L143
.L142:
	mov	r3, #0
.L143:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L145:
	.align	2
.L144:
	.word	10000000
	.size	adr0indreg1, .-adr0indreg1
	.align	2
	.global	adr0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0imm1, %function
adr0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L149
	ldrsh	r3, [r3]
	cmp	r3, #33
	bgt	.L147
	mov	r3, #1
	b	.L148
.L147:
	mov	r3, #0
.L148:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L150:
	.align	2
.L149:
	.word	10000000
	.size	adr0imm1, .-adr0imm1
	.align	2
	.global	adr0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0limm1, %function
adr0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L154
	ldrsh	r2, [r3]
	ldr	r3, .L154+4
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	bgt	.L152
	mov	r3, #1
	b	.L153
.L152:
	mov	r3, #0
.L153:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L155:
	.align	2
.L154:
	.word	10000000
	.word	glob1
	.size	adr0limm1, .-adr0limm1
	.align	2
	.global	adr0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0adr1, %function
adr0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L159
	ldrsh	r2, [r3]
	ldr	r3, .L159+4
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L157
	mov	r3, #1
	b	.L158
.L157:
	mov	r3, #0
.L158:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L160:
	.align	2
.L159:
	.word	10000000
	.word	11111111
	.size	adr0adr1, .-adr0adr1
	.align	2
	.global	adr0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0adrreg1, %function
adr0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L164
	ldrsh	r2, [r3]
	ldr	r1, [fp, #8]
	ldr	r3, .L164+4
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L162
	mov	r3, #1
	b	.L163
.L162:
	mov	r3, #0
.L163:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L165:
	.align	2
.L164:
	.word	10000000
	.word	555554
	.size	adr0adrreg1, .-adr0adrreg1
	.align	2
	.global	adr0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0adrx1, %function
adr0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L169
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r1, r3, #1
	ldr	r3, .L169+4
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L167
	mov	r3, #1
	b	.L168
.L167:
	mov	r3, #0
.L168:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L170:
	.align	2
.L169:
	.word	10000000
	.word	11111111
	.size	adr0adrx1, .-adr0adrx1
	.align	2
	.global	adr0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adr0regx1, %function
adr0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, .L174
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r1, [fp, #8]
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L172
	mov	r3, #1
	b	.L173
.L172:
	mov	r3, #0
.L173:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L175:
	.align	2
.L174:
	.word	10000000
	.size	adr0regx1, .-adr0regx1
	.align	2
	.global	adrreg0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0reg1, %function
adrreg0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L179
	add	r3, r2, r3
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L177
	mov	r3, #1
	b	.L178
.L177:
	mov	r3, #0
.L178:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L180:
	.align	2
.L179:
	.word	20000000
	.size	adrreg0reg1, .-adrreg0reg1
	.align	2
	.global	adrreg0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0indreg1, %function
adrreg0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L184
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #8]
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L182
	mov	r3, #1
	b	.L183
.L182:
	mov	r3, #0
.L183:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L185:
	.align	2
.L184:
	.word	20000000
	.size	adrreg0indreg1, .-adrreg0indreg1
	.align	2
	.global	adrreg0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0imm1, %function
adrreg0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L189
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #33
	bgt	.L187
	mov	r3, #1
	b	.L188
.L187:
	mov	r3, #0
.L188:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L190:
	.align	2
.L189:
	.word	20000000
	.size	adrreg0imm1, .-adrreg0imm1
	.align	2
	.global	adrreg0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0limm1, %function
adrreg0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L194
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L194+4
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	bgt	.L192
	mov	r3, #1
	b	.L193
.L192:
	mov	r3, #0
.L193:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L195:
	.align	2
.L194:
	.word	20000000
	.word	glob1
	.size	adrreg0limm1, .-adrreg0limm1
	.align	2
	.global	adrreg0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0adr1, %function
adrreg0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L199
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L199+4
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L197
	mov	r3, #1
	b	.L198
.L197:
	mov	r3, #0
.L198:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L200:
	.align	2
.L199:
	.word	20000000
	.word	11111111
	.size	adrreg0adr1, .-adrreg0adr1
	.align	2
	.global	adrreg0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0adrreg1, %function
adrreg0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L204
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r1, [fp, #8]
	ldr	r3, .L204+4
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L202
	mov	r3, #1
	b	.L203
.L202:
	mov	r3, #0
.L203:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L205:
	.align	2
.L204:
	.word	20000000
	.word	555554
	.size	adrreg0adrreg1, .-adrreg0adrreg1
	.align	2
	.global	adrreg0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0adrx1, %function
adrreg0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L209
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r1, r3, #1
	ldr	r3, .L209+4
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L207
	mov	r3, #1
	b	.L208
.L207:
	mov	r3, #0
.L208:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L210:
	.align	2
.L209:
	.word	20000000
	.word	11111111
	.size	adrreg0adrx1, .-adrreg0adrx1
	.align	2
	.global	adrreg0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrreg0regx1, %function
adrreg0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r2, [fp, #4]
	ldr	r3, .L214
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r1, [fp, #8]
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L212
	mov	r3, #1
	b	.L213
.L212:
	mov	r3, #0
.L213:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L215:
	.align	2
.L214:
	.word	20000000
	.size	adrreg0regx1, .-adrreg0regx1
	.align	2
	.global	adrx0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0reg1, %function
adrx0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L219
	add	r3, r2, r3
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L217
	mov	r3, #1
	b	.L218
.L217:
	mov	r3, #0
.L218:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L220:
	.align	2
.L219:
	.word	10000000
	.size	adrx0reg1, .-adrx0reg1
	.align	2
	.global	adrx0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0indreg1, %function
adrx0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L224
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #8]
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L222
	mov	r3, #1
	b	.L223
.L222:
	mov	r3, #0
.L223:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L225:
	.align	2
.L224:
	.word	10000000
	.size	adrx0indreg1, .-adrx0indreg1
	.align	2
	.global	adrx0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0imm1, %function
adrx0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L229
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #33
	bgt	.L227
	mov	r3, #1
	b	.L228
.L227:
	mov	r3, #0
.L228:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L230:
	.align	2
.L229:
	.word	10000000
	.size	adrx0imm1, .-adrx0imm1
	.align	2
	.global	adrx0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0limm1, %function
adrx0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L234
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L234+4
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	bgt	.L232
	mov	r3, #1
	b	.L233
.L232:
	mov	r3, #0
.L233:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L235:
	.align	2
.L234:
	.word	10000000
	.word	glob1
	.size	adrx0limm1, .-adrx0limm1
	.align	2
	.global	adrx0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0adr1, %function
adrx0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L239
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L239+4
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L237
	mov	r3, #1
	b	.L238
.L237:
	mov	r3, #0
.L238:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L240:
	.align	2
.L239:
	.word	10000000
	.word	11111111
	.size	adrx0adr1, .-adrx0adr1
	.align	2
	.global	adrx0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0adrreg1, %function
adrx0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L244
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r1, [fp, #8]
	ldr	r3, .L244+4
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L242
	mov	r3, #1
	b	.L243
.L242:
	mov	r3, #0
.L243:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L245:
	.align	2
.L244:
	.word	10000000
	.word	555554
	.size	adrx0adrreg1, .-adrx0adrreg1
	.align	2
	.global	adrx0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0adrx1, %function
adrx0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L249
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r1, r3, #1
	ldr	r3, .L249+4
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L247
	mov	r3, #1
	b	.L248
.L247:
	mov	r3, #0
.L248:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L250:
	.align	2
.L249:
	.word	10000000
	.word	11111111
	.size	adrx0adrx1, .-adrx0adrx1
	.align	2
	.global	adrx0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	adrx0regx1, %function
adrx0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r2, r3, #1
	ldr	r3, .L254
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r1, [fp, #8]
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L252
	mov	r3, #1
	b	.L253
.L252:
	mov	r3, #0
.L253:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L255:
	.align	2
.L254:
	.word	10000000
	.size	adrx0regx1, .-adrx0regx1
	.align	2
	.global	regx0reg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0reg1, %function
regx0reg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r3, [r3]
	ldrsh	r2, [fp, #-12]
	cmp	r2, r3
	blt	.L257
	mov	r3, #1
	b	.L258
.L257:
	mov	r3, #0
.L258:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	regx0reg1, .-regx0reg1
	.align	2
	.global	regx0indreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0indreg1, %function
regx0indreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #8]
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L260
	mov	r3, #1
	b	.L261
.L260:
	mov	r3, #0
.L261:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	regx0indreg1, .-regx0indreg1
	.align	2
	.global	regx0imm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0imm1, %function
regx0imm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r3, [r3]
	cmp	r3, #33
	bgt	.L263
	mov	r3, #1
	b	.L264
.L263:
	mov	r3, #0
.L264:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	regx0imm1, .-regx0imm1
	.align	2
	.global	regx0limm1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0limm1, %function
regx0limm1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L268
	lsl	r3, r3, #16
	asr	r3, r3, #16
	cmp	r2, r3
	bgt	.L266
	mov	r3, #1
	b	.L267
.L266:
	mov	r3, #0
.L267:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L269:
	.align	2
.L268:
	.word	glob1
	.size	regx0limm1, .-regx0limm1
	.align	2
	.global	regx0adr1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0adr1, %function
regx0adr1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, .L273
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L271
	mov	r3, #1
	b	.L272
.L271:
	mov	r3, #0
.L272:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L274:
	.align	2
.L273:
	.word	11111111
	.size	regx0adr1, .-regx0adr1
	.align	2
	.global	regx0adrreg1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0adrreg1, %function
regx0adrreg1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r1, [fp, #8]
	ldr	r3, .L278
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L276
	mov	r3, #1
	b	.L277
.L276:
	mov	r3, #0
.L277:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L279:
	.align	2
.L278:
	.word	555554
	.size	regx0adrreg1, .-regx0adrreg1
	.align	2
	.global	regx0adrx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0adrx1, %function
regx0adrx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r1, r3, #1
	ldr	r3, .L283
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L281
	mov	r3, #1
	b	.L282
.L281:
	mov	r3, #0
.L282:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L284:
	.align	2
.L283:
	.word	11111111
	.size	regx0adrx1, .-regx0adrx1
	.align	2
	.global	regx0regx1
	.syntax unified
	.arm
	.fpu softvfp
	.type	regx0regx1, %function
regx0regx1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	mov	r3, r0	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-12]	@ movhi
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldrsh	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #1
	ldr	r1, [fp, #8]
	add	r3, r1, r3
	ldrsh	r3, [r3]
	cmp	r2, r3
	bgt	.L286
	mov	r3, #1
	b	.L287
.L286:
	mov	r3, #0
.L287:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	regx0regx1, .-regx0regx1
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
