	.file	"497338.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	_diverge_delta
	.bss
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	s14_l1
	.type	s14_l1, @object
	.size	s14_l1, 1
s14_l1:
	.zero	1
	.globl	_x_s14_l1
	.type	_x_s14_l1, @object
	.size	_x_s14_l1, 1
_x_s14_l1:
	.zero	1
	.globl	s14_l0
	.type	s14_l0, @object
	.size	s14_l0, 1
s14_l0:
	.zero	1
	.globl	_x_s14_l0
	.type	_x_s14_l0, @object
	.size	_x_s14_l0, 1
_x_s14_l0:
	.zero	1
	.globl	s4_evt0
	.type	s4_evt0, @object
	.size	s4_evt0, 1
s4_evt0:
	.zero	1
	.globl	_x_s4_evt0
	.type	_x_s4_evt0, @object
	.size	_x_s4_evt0, 1
_x_s4_evt0:
	.zero	1
	.globl	s13_l1
	.type	s13_l1, @object
	.size	s13_l1, 1
s13_l1:
	.zero	1
	.globl	_x_s13_l1
	.type	_x_s13_l1, @object
	.size	_x_s13_l1, 1
_x_s13_l1:
	.zero	1
	.globl	s4_x
	.align 4
	.type	s4_x, @object
	.size	s4_x, 4
s4_x:
	.zero	4
	.globl	_x_s4_x
	.align 4
	.type	_x_s4_x, @object
	.size	_x_s4_x, 4
_x_s4_x:
	.zero	4
	.globl	bus_evt2
	.type	bus_evt2, @object
	.size	bus_evt2, 1
bus_evt2:
	.zero	1
	.globl	_x_bus_evt2
	.type	_x_bus_evt2, @object
	.size	_x_bus_evt2, 1
_x_bus_evt2:
	.zero	1
	.globl	s3_evt0
	.type	s3_evt0, @object
	.size	s3_evt0, 1
s3_evt0:
	.zero	1
	.globl	_x_s3_evt0
	.type	_x_s3_evt0, @object
	.size	_x_s3_evt0, 1
_x_s3_evt0:
	.zero	1
	.globl	s12_l1
	.type	s12_l1, @object
	.size	s12_l1, 1
s12_l1:
	.zero	1
	.globl	_x_s12_l1
	.type	_x_s12_l1, @object
	.size	_x_s12_l1, 1
_x_s12_l1:
	.zero	1
	.globl	s3_x
	.align 4
	.type	s3_x, @object
	.size	s3_x, 4
s3_x:
	.zero	4
	.globl	_x_s3_x
	.align 4
	.type	_x_s3_x, @object
	.size	_x_s3_x, 4
_x_s3_x:
	.zero	4
	.globl	s5_evt2
	.type	s5_evt2, @object
	.size	s5_evt2, 1
s5_evt2:
	.zero	1
	.globl	_x_s5_evt2
	.type	_x_s5_evt2, @object
	.size	_x_s5_evt2, 1
_x_s5_evt2:
	.zero	1
	.globl	s5_evt1
	.type	s5_evt1, @object
	.size	s5_evt1, 1
s5_evt1:
	.zero	1
	.globl	_x_s5_evt1
	.type	_x_s5_evt1, @object
	.size	_x_s5_evt1, 1
_x_s5_evt1:
	.zero	1
	.globl	s2_evt2
	.type	s2_evt2, @object
	.size	s2_evt2, 1
s2_evt2:
	.zero	1
	.globl	_x_s2_evt2
	.type	_x_s2_evt2, @object
	.size	_x_s2_evt2, 1
_x_s2_evt2:
	.zero	1
	.globl	s3_l1
	.type	s3_l1, @object
	.size	s3_l1, 1
s3_l1:
	.zero	1
	.globl	_x_s3_l1
	.type	_x_s3_l1, @object
	.size	_x_s3_l1, 1
_x_s3_l1:
	.zero	1
	.globl	s6_backoff
	.align 4
	.type	s6_backoff, @object
	.size	s6_backoff, 4
s6_backoff:
	.zero	4
	.globl	_x_s6_backoff
	.align 4
	.type	_x_s6_backoff, @object
	.size	_x_s6_backoff, 4
_x_s6_backoff:
	.zero	4
	.globl	s2_evt1
	.type	s2_evt1, @object
	.size	s2_evt1, 1
s2_evt1:
	.zero	1
	.globl	_x_s2_evt1
	.type	_x_s2_evt1, @object
	.size	_x_s2_evt1, 1
_x_s2_evt1:
	.zero	1
	.globl	s14_x
	.align 4
	.type	s14_x, @object
	.size	s14_x, 4
s14_x:
	.zero	4
	.globl	_x_s14_x
	.align 4
	.type	_x_s14_x, @object
	.size	_x_s14_x, 4
_x_s14_x:
	.zero	4
	.globl	s0_lambda
	.align 4
	.type	s0_lambda, @object
	.size	s0_lambda, 4
s0_lambda:
	.zero	4
	.globl	_x_s0_lambda
	.align 4
	.type	_x_s0_lambda, @object
	.size	_x_s0_lambda, 4
_x_s0_lambda:
	.zero	4
	.globl	bus_l0
	.type	bus_l0, @object
	.size	bus_l0, 1
bus_l0:
	.zero	1
	.globl	_x_bus_l0
	.type	_x_bus_l0, @object
	.size	_x_bus_l0, 1
_x_bus_l0:
	.zero	1
	.globl	s5_x
	.align 4
	.type	s5_x, @object
	.size	s5_x, 4
s5_x:
	.zero	4
	.globl	_x_s5_x
	.align 4
	.type	_x_s5_x, @object
	.size	_x_s5_x, 4
_x_s5_x:
	.zero	4
	.globl	s0_backoff
	.align 4
	.type	s0_backoff, @object
	.size	s0_backoff, 4
s0_backoff:
	.zero	4
	.globl	_x_s0_backoff
	.align 4
	.type	_x_s0_backoff, @object
	.size	_x_s0_backoff, 4
_x_s0_backoff:
	.zero	4
	.globl	s0_x
	.align 4
	.type	s0_x, @object
	.size	s0_x, 4
s0_x:
	.zero	4
	.globl	_x_s0_x
	.align 4
	.type	_x_s0_x, @object
	.size	_x_s0_x, 4
_x_s0_x:
	.zero	4
	.globl	s14_evt2
	.type	s14_evt2, @object
	.size	s14_evt2, 1
s14_evt2:
	.zero	1
	.globl	_x_s14_evt2
	.type	_x_s14_evt2, @object
	.size	_x_s14_evt2, 1
_x_s14_evt2:
	.zero	1
	.globl	s2_evt0
	.type	s2_evt0, @object
	.size	s2_evt0, 1
s2_evt0:
	.zero	1
	.globl	_x_s2_evt0
	.type	_x_s2_evt0, @object
	.size	_x_s2_evt0, 1
_x_s2_evt0:
	.zero	1
	.globl	s4_evt1
	.type	s4_evt1, @object
	.size	s4_evt1, 1
s4_evt1:
	.zero	1
	.globl	_x_s4_evt1
	.type	_x_s4_evt1, @object
	.size	_x_s4_evt1, 1
_x_s4_evt1:
	.zero	1
	.globl	bus_evt0
	.type	bus_evt0, @object
	.size	bus_evt0, 1
bus_evt0:
	.zero	1
	.globl	_x_bus_evt0
	.type	_x_bus_evt0, @object
	.size	_x_bus_evt0, 1
_x_bus_evt0:
	.zero	1
	.globl	bus_evt1
	.type	bus_evt1, @object
	.size	bus_evt1, 1
bus_evt1:
	.zero	1
	.globl	_x_bus_evt1
	.type	_x_bus_evt1, @object
	.size	_x_bus_evt1, 1
_x_bus_evt1:
	.zero	1
	.globl	s1_l0
	.type	s1_l0, @object
	.size	s1_l0, 1
s1_l0:
	.zero	1
	.globl	_x_s1_l0
	.type	_x_s1_l0, @object
	.size	_x_s1_l0, 1
_x_s1_l0:
	.zero	1
	.globl	s4_lambda
	.align 4
	.type	s4_lambda, @object
	.size	s4_lambda, 4
s4_lambda:
	.zero	4
	.globl	_x_s4_lambda
	.align 4
	.type	_x_s4_lambda, @object
	.size	_x_s4_lambda, 4
_x_s4_lambda:
	.zero	4
	.globl	s0_evt0
	.type	s0_evt0, @object
	.size	s0_evt0, 1
s0_evt0:
	.zero	1
	.globl	_x_s0_evt0
	.type	_x_s0_evt0, @object
	.size	_x_s0_evt0, 1
_x_s0_evt0:
	.zero	1
	.globl	bus_cd_id
	.align 4
	.type	bus_cd_id, @object
	.size	bus_cd_id, 4
bus_cd_id:
	.zero	4
	.globl	_x_bus_cd_id
	.align 4
	.type	_x_bus_cd_id, @object
	.size	_x_bus_cd_id, 4
_x_bus_cd_id:
	.zero	4
	.globl	s6_evt2
	.type	s6_evt2, @object
	.size	s6_evt2, 1
s6_evt2:
	.zero	1
	.globl	_x_s6_evt2
	.type	_x_s6_evt2, @object
	.size	_x_s6_evt2, 1
_x_s6_evt2:
	.zero	1
	.globl	s1_l1
	.type	s1_l1, @object
	.size	s1_l1, 1
s1_l1:
	.zero	1
	.globl	_x_s1_l1
	.type	_x_s1_l1, @object
	.size	_x_s1_l1, 1
_x_s1_l1:
	.zero	1
	.globl	s4_backoff
	.align 4
	.type	s4_backoff, @object
	.size	s4_backoff, 4
s4_backoff:
	.zero	4
	.globl	_x_s4_backoff
	.align 4
	.type	_x_s4_backoff, @object
	.size	_x_s4_backoff, 4
_x_s4_backoff:
	.zero	4
	.globl	s0_evt1
	.type	s0_evt1, @object
	.size	s0_evt1, 1
s0_evt1:
	.zero	1
	.globl	_x_s0_evt1
	.type	_x_s0_evt1, @object
	.size	_x_s0_evt1, 1
_x_s0_evt1:
	.zero	1
	.globl	s12_x
	.align 4
	.type	s12_x, @object
	.size	s12_x, 4
s12_x:
	.zero	4
	.globl	_x_s12_x
	.align 4
	.type	_x_s12_x, @object
	.size	_x_s12_x, 4
_x_s12_x:
	.zero	4
	.globl	s12_l0
	.type	s12_l0, @object
	.size	s12_l0, 1
s12_l0:
	.zero	1
	.globl	_x_s12_l0
	.type	_x_s12_l0, @object
	.size	_x_s12_l0, 1
_x_s12_l0:
	.zero	1
	.globl	bus_j
	.align 4
	.type	bus_j, @object
	.size	bus_j, 4
bus_j:
	.zero	4
	.globl	_x_bus_j
	.align 4
	.type	_x_bus_j, @object
	.size	_x_bus_j, 4
_x_bus_j:
	.zero	4
	.globl	s5_evt0
	.type	s5_evt0, @object
	.size	s5_evt0, 1
s5_evt0:
	.zero	1
	.globl	_x_s5_evt0
	.type	_x_s5_evt0, @object
	.size	_x_s5_evt0, 1
_x_s5_evt0:
	.zero	1
	.globl	s0_evt2
	.type	s0_evt2, @object
	.size	s0_evt2, 1
s0_evt2:
	.zero	1
	.globl	_x_s0_evt2
	.type	_x_s0_evt2, @object
	.size	_x_s0_evt2, 1
_x_s0_evt2:
	.zero	1
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	s4_l1
	.type	s4_l1, @object
	.size	s4_l1, 1
s4_l1:
	.zero	1
	.globl	_x_s4_l1
	.type	_x_s4_l1, @object
	.size	_x_s4_l1, 1
_x_s4_l1:
	.zero	1
	.globl	s7_backoff
	.align 4
	.type	s7_backoff, @object
	.size	s7_backoff, 4
s7_backoff:
	.zero	4
	.globl	_x_s7_backoff
	.align 4
	.type	_x_s7_backoff, @object
	.size	_x_s7_backoff, 4
_x_s7_backoff:
	.zero	4
	.globl	s3_evt1
	.type	s3_evt1, @object
	.size	s3_evt1, 1
s3_evt1:
	.zero	1
	.globl	_x_s3_evt1
	.type	_x_s3_evt1, @object
	.size	_x_s3_evt1, 1
_x_s3_evt1:
	.zero	1
	.globl	s3_lambda
	.align 4
	.type	s3_lambda, @object
	.size	s3_lambda, 4
s3_lambda:
	.zero	4
	.globl	_x_s3_lambda
	.align 4
	.type	_x_s3_lambda, @object
	.size	_x_s3_lambda, 4
_x_s3_lambda:
	.zero	4
	.globl	s0_l0
	.type	s0_l0, @object
	.size	s0_l0, 1
s0_l0:
	.zero	1
	.globl	_x_s0_l0
	.type	_x_s0_l0, @object
	.size	_x_s0_l0, 1
_x_s0_l0:
	.zero	1
	.globl	s2_lambda
	.align 4
	.type	s2_lambda, @object
	.size	s2_lambda, 4
s2_lambda:
	.zero	4
	.globl	_x_s2_lambda
	.align 4
	.type	_x_s2_lambda, @object
	.size	_x_s2_lambda, 4
_x_s2_lambda:
	.zero	4
	.globl	s3_evt2
	.type	s3_evt2, @object
	.size	s3_evt2, 1
s3_evt2:
	.zero	1
	.globl	_x_s3_evt2
	.type	_x_s3_evt2, @object
	.size	_x_s3_evt2, 1
_x_s3_evt2:
	.zero	1
	.globl	s3_backoff
	.align 4
	.type	s3_backoff, @object
	.size	s3_backoff, 4
s3_backoff:
	.zero	4
	.globl	_x_s3_backoff
	.align 4
	.type	_x_s3_backoff, @object
	.size	_x_s3_backoff, 4
_x_s3_backoff:
	.zero	4
	.globl	s0_l1
	.type	s0_l1, @object
	.size	s0_l1, 1
s0_l1:
	.zero	1
	.globl	_x_s0_l1
	.type	_x_s0_l1, @object
	.size	_x_s0_l1, 1
_x_s0_l1:
	.zero	1
	.globl	s2_backoff
	.align 4
	.type	s2_backoff, @object
	.size	s2_backoff, 4
s2_backoff:
	.zero	4
	.globl	_x_s2_backoff
	.align 4
	.type	_x_s2_backoff, @object
	.size	_x_s2_backoff, 4
_x_s2_backoff:
	.zero	4
	.globl	s1_x
	.align 4
	.type	s1_x, @object
	.size	s1_x, 4
s1_x:
	.zero	4
	.globl	_x_s1_x
	.align 4
	.type	_x_s1_x, @object
	.size	_x_s1_x, 4
_x_s1_x:
	.zero	4
	.globl	s6_x
	.align 4
	.type	s6_x, @object
	.size	s6_x, 4
s6_x:
	.zero	4
	.globl	_x_s6_x
	.align 4
	.type	_x_s6_x, @object
	.size	_x_s6_x, 4
_x_s6_x:
	.zero	4
	.globl	s1_backoff
	.align 4
	.type	s1_backoff, @object
	.size	s1_backoff, 4
s1_backoff:
	.zero	4
	.globl	_x_s1_backoff
	.align 4
	.type	_x_s1_backoff, @object
	.size	_x_s1_backoff, 4
_x_s1_backoff:
	.zero	4
	.globl	s1_lambda
	.align 4
	.type	s1_lambda, @object
	.size	s1_lambda, 4
s1_lambda:
	.zero	4
	.globl	_x_s1_lambda
	.align 4
	.type	_x_s1_lambda, @object
	.size	_x_s1_lambda, 4
_x_s1_lambda:
	.zero	4
	.globl	s2_l0
	.type	s2_l0, @object
	.size	s2_l0, 1
s2_l0:
	.zero	1
	.globl	_x_s2_l0
	.type	_x_s2_l0, @object
	.size	_x_s2_l0, 1
_x_s2_l0:
	.zero	1
	.globl	s5_lambda
	.align 4
	.type	s5_lambda, @object
	.size	s5_lambda, 4
s5_lambda:
	.zero	4
	.globl	_x_s5_lambda
	.align 4
	.type	_x_s5_lambda, @object
	.size	_x_s5_lambda, 4
_x_s5_lambda:
	.zero	4
	.globl	s1_evt0
	.type	s1_evt0, @object
	.size	s1_evt0, 1
s1_evt0:
	.zero	1
	.globl	_x_s1_evt0
	.type	_x_s1_evt0, @object
	.size	_x_s1_evt0, 1
_x_s1_evt0:
	.zero	1
	.globl	s2_l1
	.type	s2_l1, @object
	.size	s2_l1, 1
s2_l1:
	.zero	1
	.globl	_x_s2_l1
	.type	_x_s2_l1, @object
	.size	_x_s2_l1, 1
_x_s2_l1:
	.zero	1
	.globl	s5_backoff
	.align 4
	.type	s5_backoff, @object
	.size	s5_backoff, 4
s5_backoff:
	.zero	4
	.globl	_x_s5_backoff
	.align 4
	.type	_x_s5_backoff, @object
	.size	_x_s5_backoff, 4
_x_s5_backoff:
	.zero	4
	.globl	s1_evt1
	.type	s1_evt1, @object
	.size	s1_evt1, 1
s1_evt1:
	.zero	1
	.globl	_x_s1_evt1
	.type	_x_s1_evt1, @object
	.size	_x_s1_evt1, 1
_x_s1_evt1:
	.zero	1
	.globl	s13_x
	.align 4
	.type	s13_x, @object
	.size	s13_x, 4
s13_x:
	.zero	4
	.globl	_x_s13_x
	.align 4
	.type	_x_s13_x, @object
	.size	_x_s13_x, 4
_x_s13_x:
	.zero	4
	.globl	s1_evt2
	.type	s1_evt2, @object
	.size	s1_evt2, 1
s1_evt2:
	.zero	1
	.globl	_x_s1_evt2
	.type	_x_s1_evt2, @object
	.size	_x_s1_evt2, 1
_x_s1_evt2:
	.zero	1
	.globl	s4_evt2
	.type	s4_evt2, @object
	.size	s4_evt2, 1
s4_evt2:
	.zero	1
	.globl	_x_s4_evt2
	.type	_x_s4_evt2, @object
	.size	_x_s4_evt2, 1
_x_s4_evt2:
	.zero	1
	.globl	bus_l1
	.type	bus_l1, @object
	.size	bus_l1, 1
bus_l1:
	.zero	1
	.globl	_x_bus_l1
	.type	_x_bus_l1, @object
	.size	_x_bus_l1, 1
_x_bus_l1:
	.zero	1
	.globl	s9_evt0
	.type	s9_evt0, @object
	.size	s9_evt0, 1
s9_evt0:
	.zero	1
	.globl	_x_s9_evt0
	.type	_x_s9_evt0, @object
	.size	_x_s9_evt0, 1
_x_s9_evt0:
	.zero	1
	.globl	s2_x
	.align 4
	.type	s2_x, @object
	.size	s2_x, 4
s2_x:
	.zero	4
	.globl	_x_s2_x
	.align 4
	.type	_x_s2_x, @object
	.size	_x_s2_x, 4
_x_s2_x:
	.zero	4
	.globl	s3_l0
	.type	s3_l0, @object
	.size	s3_l0, 1
s3_l0:
	.zero	1
	.globl	_x_s3_l0
	.type	_x_s3_l0, @object
	.size	_x_s3_l0, 1
_x_s3_l0:
	.zero	1
	.globl	s6_lambda
	.align 4
	.type	s6_lambda, @object
	.size	s6_lambda, 4
s6_lambda:
	.zero	4
	.globl	_x_s6_lambda
	.align 4
	.type	_x_s6_lambda, @object
	.size	_x_s6_lambda, 4
_x_s6_lambda:
	.zero	4
	.globl	s6_evt0
	.type	s6_evt0, @object
	.size	s6_evt0, 1
s6_evt0:
	.zero	1
	.globl	_x_s6_evt0
	.type	_x_s6_evt0, @object
	.size	_x_s6_evt0, 1
_x_s6_evt0:
	.zero	1
	.globl	s6_evt1
	.type	s6_evt1, @object
	.size	s6_evt1, 1
s6_evt1:
	.zero	1
	.globl	_x_s6_evt1
	.type	_x_s6_evt1, @object
	.size	_x_s6_evt1, 1
_x_s6_evt1:
	.zero	1
	.globl	s7_x
	.align 4
	.type	s7_x, @object
	.size	s7_x, 4
s7_x:
	.zero	4
	.globl	_x_s7_x
	.align 4
	.type	_x_s7_x, @object
	.size	_x_s7_x, 4
_x_s7_x:
	.zero	4
	.globl	s4_l0
	.type	s4_l0, @object
	.size	s4_l0, 1
s4_l0:
	.zero	1
	.globl	_x_s4_l0
	.type	_x_s4_l0, @object
	.size	_x_s4_l0, 1
_x_s4_l0:
	.zero	1
	.globl	s7_lambda
	.align 4
	.type	s7_lambda, @object
	.size	s7_lambda, 4
s7_lambda:
	.zero	4
	.globl	_x_s7_lambda
	.align 4
	.type	_x_s7_lambda, @object
	.size	_x_s7_lambda, 4
_x_s7_lambda:
	.zero	4
	.globl	s7_evt0
	.type	s7_evt0, @object
	.size	s7_evt0, 1
s7_evt0:
	.zero	1
	.globl	_x_s7_evt0
	.type	_x_s7_evt0, @object
	.size	_x_s7_evt0, 1
_x_s7_evt0:
	.zero	1
	.globl	s7_evt1
	.type	s7_evt1, @object
	.size	s7_evt1, 1
s7_evt1:
	.zero	1
	.globl	_x_s7_evt1
	.type	_x_s7_evt1, @object
	.size	_x_s7_evt1, 1
_x_s7_evt1:
	.zero	1
	.globl	s7_evt2
	.type	s7_evt2, @object
	.size	s7_evt2, 1
s7_evt2:
	.zero	1
	.globl	_x_s7_evt2
	.type	_x_s7_evt2, @object
	.size	_x_s7_evt2, 1
_x_s7_evt2:
	.zero	1
	.globl	s8_x
	.align 4
	.type	s8_x, @object
	.size	s8_x, 4
s8_x:
	.zero	4
	.globl	_x_s8_x
	.align 4
	.type	_x_s8_x, @object
	.size	_x_s8_x, 4
_x_s8_x:
	.zero	4
	.globl	s5_l1
	.type	s5_l1, @object
	.size	s5_l1, 1
s5_l1:
	.zero	1
	.globl	_x_s5_l1
	.type	_x_s5_l1, @object
	.size	_x_s5_l1, 1
_x_s5_l1:
	.zero	1
	.globl	s8_backoff
	.align 4
	.type	s8_backoff, @object
	.size	s8_backoff, 4
s8_backoff:
	.zero	4
	.globl	_x_s8_backoff
	.align 4
	.type	_x_s8_backoff, @object
	.size	_x_s8_backoff, 4
_x_s8_backoff:
	.zero	4
	.globl	s5_l0
	.type	s5_l0, @object
	.size	s5_l0, 1
s5_l0:
	.zero	1
	.globl	_x_s5_l0
	.type	_x_s5_l0, @object
	.size	_x_s5_l0, 1
_x_s5_l0:
	.zero	1
	.globl	s8_lambda
	.align 4
	.type	s8_lambda, @object
	.size	s8_lambda, 4
s8_lambda:
	.zero	4
	.globl	_x_s8_lambda
	.align 4
	.type	_x_s8_lambda, @object
	.size	_x_s8_lambda, 4
_x_s8_lambda:
	.zero	4
	.globl	s8_evt0
	.type	s8_evt0, @object
	.size	s8_evt0, 1
s8_evt0:
	.zero	1
	.globl	_x_s8_evt0
	.type	_x_s8_evt0, @object
	.size	_x_s8_evt0, 1
_x_s8_evt0:
	.zero	1
	.globl	s8_evt1
	.type	s8_evt1, @object
	.size	s8_evt1, 1
s8_evt1:
	.zero	1
	.globl	_x_s8_evt1
	.type	_x_s8_evt1, @object
	.size	_x_s8_evt1, 1
_x_s8_evt1:
	.zero	1
	.globl	s8_evt2
	.type	s8_evt2, @object
	.size	s8_evt2, 1
s8_evt2:
	.zero	1
	.globl	_x_s8_evt2
	.type	_x_s8_evt2, @object
	.size	_x_s8_evt2, 1
_x_s8_evt2:
	.zero	1
	.globl	s9_x
	.align 4
	.type	s9_x, @object
	.size	s9_x, 4
s9_x:
	.zero	4
	.globl	_x_s9_x
	.align 4
	.type	_x_s9_x, @object
	.size	_x_s9_x, 4
_x_s9_x:
	.zero	4
	.globl	s6_l1
	.type	s6_l1, @object
	.size	s6_l1, 1
s6_l1:
	.zero	1
	.globl	_x_s6_l1
	.type	_x_s6_l1, @object
	.size	_x_s6_l1, 1
_x_s6_l1:
	.zero	1
	.globl	s9_backoff
	.align 4
	.type	s9_backoff, @object
	.size	s9_backoff, 4
s9_backoff:
	.zero	4
	.globl	_x_s9_backoff
	.align 4
	.type	_x_s9_backoff, @object
	.size	_x_s9_backoff, 4
_x_s9_backoff:
	.zero	4
	.globl	s6_l0
	.type	s6_l0, @object
	.size	s6_l0, 1
s6_l0:
	.zero	1
	.globl	_x_s6_l0
	.type	_x_s6_l0, @object
	.size	_x_s6_l0, 1
_x_s6_l0:
	.zero	1
	.globl	s9_lambda
	.align 4
	.type	s9_lambda, @object
	.size	s9_lambda, 4
s9_lambda:
	.zero	4
	.globl	_x_s9_lambda
	.align 4
	.type	_x_s9_lambda, @object
	.size	_x_s9_lambda, 4
_x_s9_lambda:
	.zero	4
	.globl	s9_evt1
	.type	s9_evt1, @object
	.size	s9_evt1, 1
s9_evt1:
	.zero	1
	.globl	_x_s9_evt1
	.type	_x_s9_evt1, @object
	.size	_x_s9_evt1, 1
_x_s9_evt1:
	.zero	1
	.globl	s9_evt2
	.type	s9_evt2, @object
	.size	s9_evt2, 1
s9_evt2:
	.zero	1
	.globl	_x_s9_evt2
	.type	_x_s9_evt2, @object
	.size	_x_s9_evt2, 1
_x_s9_evt2:
	.zero	1
	.globl	s12_lambda
	.align 4
	.type	s12_lambda, @object
	.size	s12_lambda, 4
s12_lambda:
	.zero	4
	.globl	_x_s12_lambda
	.align 4
	.type	_x_s12_lambda, @object
	.size	_x_s12_lambda, 4
_x_s12_lambda:
	.zero	4
	.globl	s9_l0
	.type	s9_l0, @object
	.size	s9_l0, 1
s9_l0:
	.zero	1
	.globl	_x_s9_l0
	.type	_x_s9_l0, @object
	.size	_x_s9_l0, 1
_x_s9_l0:
	.zero	1
	.globl	s10_x
	.align 4
	.type	s10_x, @object
	.size	s10_x, 4
s10_x:
	.zero	4
	.globl	_x_s10_x
	.align 4
	.type	_x_s10_x, @object
	.size	_x_s10_x, 4
_x_s10_x:
	.zero	4
	.globl	s7_l1
	.type	s7_l1, @object
	.size	s7_l1, 1
s7_l1:
	.zero	1
	.globl	_x_s7_l1
	.type	_x_s7_l1, @object
	.size	_x_s7_l1, 1
_x_s7_l1:
	.zero	1
	.globl	s10_backoff
	.align 4
	.type	s10_backoff, @object
	.size	s10_backoff, 4
s10_backoff:
	.zero	4
	.globl	_x_s10_backoff
	.align 4
	.type	_x_s10_backoff, @object
	.size	_x_s10_backoff, 4
_x_s10_backoff:
	.zero	4
	.globl	s7_l0
	.type	s7_l0, @object
	.size	s7_l0, 1
s7_l0:
	.zero	1
	.globl	_x_s7_l0
	.type	_x_s7_l0, @object
	.size	_x_s7_l0, 1
_x_s7_l0:
	.zero	1
	.globl	s10_lambda
	.align 4
	.type	s10_lambda, @object
	.size	s10_lambda, 4
s10_lambda:
	.zero	4
	.globl	_x_s10_lambda
	.align 4
	.type	_x_s10_lambda, @object
	.size	_x_s10_lambda, 4
_x_s10_lambda:
	.zero	4
	.globl	bus_x
	.align 4
	.type	bus_x, @object
	.size	bus_x, 4
bus_x:
	.zero	4
	.globl	_x_bus_x
	.align 4
	.type	_x_bus_x, @object
	.size	_x_bus_x, 4
_x_bus_x:
	.zero	4
	.globl	s10_evt0
	.type	s10_evt0, @object
	.size	s10_evt0, 1
s10_evt0:
	.zero	1
	.globl	_x_s10_evt0
	.type	_x_s10_evt0, @object
	.size	_x_s10_evt0, 1
_x_s10_evt0:
	.zero	1
	.globl	s10_evt1
	.type	s10_evt1, @object
	.size	s10_evt1, 1
s10_evt1:
	.zero	1
	.globl	_x_s10_evt1
	.type	_x_s10_evt1, @object
	.size	_x_s10_evt1, 1
_x_s10_evt1:
	.zero	1
	.globl	s10_evt2
	.type	s10_evt2, @object
	.size	s10_evt2, 1
s10_evt2:
	.zero	1
	.globl	_x_s10_evt2
	.type	_x_s10_evt2, @object
	.size	_x_s10_evt2, 1
_x_s10_evt2:
	.zero	1
	.globl	s13_lambda
	.align 4
	.type	s13_lambda, @object
	.size	s13_lambda, 4
s13_lambda:
	.zero	4
	.globl	_x_s13_lambda
	.align 4
	.type	_x_s13_lambda, @object
	.size	_x_s13_lambda, 4
_x_s13_lambda:
	.zero	4
	.globl	s10_l0
	.type	s10_l0, @object
	.size	s10_l0, 1
s10_l0:
	.zero	1
	.globl	_x_s10_l0
	.type	_x_s10_l0, @object
	.size	_x_s10_l0, 1
_x_s10_l0:
	.zero	1
	.globl	s11_x
	.align 4
	.type	s11_x, @object
	.size	s11_x, 4
s11_x:
	.zero	4
	.globl	_x_s11_x
	.align 4
	.type	_x_s11_x, @object
	.size	_x_s11_x, 4
_x_s11_x:
	.zero	4
	.globl	s8_l1
	.type	s8_l1, @object
	.size	s8_l1, 1
s8_l1:
	.zero	1
	.globl	_x_s8_l1
	.type	_x_s8_l1, @object
	.size	_x_s8_l1, 1
_x_s8_l1:
	.zero	1
	.globl	s11_backoff
	.align 4
	.type	s11_backoff, @object
	.size	s11_backoff, 4
s11_backoff:
	.zero	4
	.globl	_x_s11_backoff
	.align 4
	.type	_x_s11_backoff, @object
	.size	_x_s11_backoff, 4
_x_s11_backoff:
	.zero	4
	.globl	s8_l0
	.type	s8_l0, @object
	.size	s8_l0, 1
s8_l0:
	.zero	1
	.globl	_x_s8_l0
	.type	_x_s8_l0, @object
	.size	_x_s8_l0, 1
_x_s8_l0:
	.zero	1
	.globl	s11_lambda
	.align 4
	.type	s11_lambda, @object
	.size	s11_lambda, 4
s11_lambda:
	.zero	4
	.globl	_x_s11_lambda
	.align 4
	.type	_x_s11_lambda, @object
	.size	_x_s11_lambda, 4
_x_s11_lambda:
	.zero	4
	.globl	s11_evt0
	.type	s11_evt0, @object
	.size	s11_evt0, 1
s11_evt0:
	.zero	1
	.globl	_x_s11_evt0
	.type	_x_s11_evt0, @object
	.size	_x_s11_evt0, 1
_x_s11_evt0:
	.zero	1
	.globl	s11_evt1
	.type	s11_evt1, @object
	.size	s11_evt1, 1
s11_evt1:
	.zero	1
	.globl	_x_s11_evt1
	.type	_x_s11_evt1, @object
	.size	_x_s11_evt1, 1
_x_s11_evt1:
	.zero	1
	.globl	s11_evt2
	.type	s11_evt2, @object
	.size	s11_evt2, 1
s11_evt2:
	.zero	1
	.globl	_x_s11_evt2
	.type	_x_s11_evt2, @object
	.size	_x_s11_evt2, 1
_x_s11_evt2:
	.zero	1
	.globl	s14_lambda
	.align 4
	.type	s14_lambda, @object
	.size	s14_lambda, 4
s14_lambda:
	.zero	4
	.globl	_x_s14_lambda
	.align 4
	.type	_x_s14_lambda, @object
	.size	_x_s14_lambda, 4
_x_s14_lambda:
	.zero	4
	.globl	s11_l0
	.type	s11_l0, @object
	.size	s11_l0, 1
s11_l0:
	.zero	1
	.globl	_x_s11_l0
	.type	_x_s11_l0, @object
	.size	_x_s11_l0, 1
_x_s11_l0:
	.zero	1
	.globl	s9_l1
	.type	s9_l1, @object
	.size	s9_l1, 1
s9_l1:
	.zero	1
	.globl	_x_s9_l1
	.type	_x_s9_l1, @object
	.size	_x_s9_l1, 1
_x_s9_l1:
	.zero	1
	.globl	s12_backoff
	.align 4
	.type	s12_backoff, @object
	.size	s12_backoff, 4
s12_backoff:
	.zero	4
	.globl	_x_s12_backoff
	.align 4
	.type	_x_s12_backoff, @object
	.size	_x_s12_backoff, 4
_x_s12_backoff:
	.zero	4
	.globl	s12_evt0
	.type	s12_evt0, @object
	.size	s12_evt0, 1
s12_evt0:
	.zero	1
	.globl	_x_s12_evt0
	.type	_x_s12_evt0, @object
	.size	_x_s12_evt0, 1
_x_s12_evt0:
	.zero	1
	.globl	s12_evt1
	.type	s12_evt1, @object
	.size	s12_evt1, 1
s12_evt1:
	.zero	1
	.globl	_x_s12_evt1
	.type	_x_s12_evt1, @object
	.size	_x_s12_evt1, 1
_x_s12_evt1:
	.zero	1
	.globl	s12_evt2
	.type	s12_evt2, @object
	.size	s12_evt2, 1
s12_evt2:
	.zero	1
	.globl	_x_s12_evt2
	.type	_x_s12_evt2, @object
	.size	_x_s12_evt2, 1
_x_s12_evt2:
	.zero	1
	.globl	s10_l1
	.type	s10_l1, @object
	.size	s10_l1, 1
s10_l1:
	.zero	1
	.globl	_x_s10_l1
	.type	_x_s10_l1, @object
	.size	_x_s10_l1, 1
_x_s10_l1:
	.zero	1
	.globl	s13_backoff
	.align 4
	.type	s13_backoff, @object
	.size	s13_backoff, 4
s13_backoff:
	.zero	4
	.globl	_x_s13_backoff
	.align 4
	.type	_x_s13_backoff, @object
	.size	_x_s13_backoff, 4
_x_s13_backoff:
	.zero	4
	.globl	s13_evt0
	.type	s13_evt0, @object
	.size	s13_evt0, 1
s13_evt0:
	.zero	1
	.globl	_x_s13_evt0
	.type	_x_s13_evt0, @object
	.size	_x_s13_evt0, 1
_x_s13_evt0:
	.zero	1
	.globl	s13_evt1
	.type	s13_evt1, @object
	.size	s13_evt1, 1
s13_evt1:
	.zero	1
	.globl	_x_s13_evt1
	.type	_x_s13_evt1, @object
	.size	_x_s13_evt1, 1
_x_s13_evt1:
	.zero	1
	.globl	s13_evt2
	.type	s13_evt2, @object
	.size	s13_evt2, 1
s13_evt2:
	.zero	1
	.globl	_x_s13_evt2
	.type	_x_s13_evt2, @object
	.size	_x_s13_evt2, 1
_x_s13_evt2:
	.zero	1
	.globl	s13_l0
	.type	s13_l0, @object
	.size	s13_l0, 1
s13_l0:
	.zero	1
	.globl	_x_s13_l0
	.type	_x_s13_l0, @object
	.size	_x_s13_l0, 1
_x_s13_l0:
	.zero	1
	.globl	s11_l1
	.type	s11_l1, @object
	.size	s11_l1, 1
s11_l1:
	.zero	1
	.globl	_x_s11_l1
	.type	_x_s11_l1, @object
	.size	_x_s11_l1, 1
_x_s11_l1:
	.zero	1
	.globl	s14_backoff
	.align 4
	.type	s14_backoff, @object
	.size	s14_backoff, 4
s14_backoff:
	.zero	4
	.globl	_x_s14_backoff
	.align 4
	.type	_x_s14_backoff, @object
	.size	_x_s14_backoff, 4
_x_s14_backoff:
	.zero	4
	.globl	s14_evt0
	.type	s14_evt0, @object
	.size	s14_evt0, 1
s14_evt0:
	.zero	1
	.globl	_x_s14_evt0
	.type	_x_s14_evt0, @object
	.size	_x_s14_evt0, 1
_x_s14_evt0:
	.zero	1
	.globl	s14_evt1
	.type	s14_evt1, @object
	.size	s14_evt1, 1
s14_evt1:
	.zero	1
	.globl	_x_s14_evt1
	.type	_x_s14_evt1, @object
	.size	_x_s14_evt1, 1
_x_s14_evt1:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s13_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR bus_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s14_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR bus_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_backoff[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s14_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR bus_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR bus_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_evt0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR bus_cd_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_l0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR bus_j[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_backoff[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_backoff[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s13_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR bus_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s8_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s8_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s9_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s9_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s12_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s10_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s10_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s10_lambda[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR bus_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s13_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s11_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s11_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s14_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s12_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s12_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s13_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s13_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s13_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s13_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s14_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s14_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s14_evt1[rip], al
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L6
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L7
.L8:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L10
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L7
.L10:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L4
.L7:
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	je	.L12
.L11:
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	je	.L12
.L13:
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L4
.L12:
	movss	xmm0, DWORD PTR s14_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s14_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s14_x[rip]
	movss	xmm0, DWORD PTR s14_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L15
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	je	.L4
.L15:
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L17
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L17
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L18
.L17:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L19
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L19
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L18
.L19:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L20
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L18
.L20:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L21
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L18
.L21:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L4
.L18:
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L22
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	je	.L23
.L22:
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	je	.L23
.L24:
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L4
.L23:
	movss	xmm0, DWORD PTR s13_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s13_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s13_x[rip]
	movss	xmm0, DWORD PTR s13_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L26
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	je	.L26
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	je	.L4
.L26:
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L28
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L29
.L28:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L29
.L30:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	je	.L31
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L31
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L29
.L31:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L32
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L29
.L32:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L4
.L29:
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L33
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L34
.L33:
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L35
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L34
.L35:
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L4
.L34:
	movss	xmm0, DWORD PTR s12_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s12_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s12_x[rip]
	movss	xmm0, DWORD PTR s12_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L37
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L37
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L4
.L37:
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L40
.L39:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L40
.L41:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	je	.L42
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L40
.L42:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L43
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L40
.L43:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L4
.L40:
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L45
.L44:
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L45
.L46:
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L4
.L45:
	movss	xmm0, DWORD PTR s11_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s11_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s11_x[rip]
	movss	xmm0, DWORD PTR s11_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L48
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L48
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L4
.L48:
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L51
.L50:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L52
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L52
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L51
.L52:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	je	.L53
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L51
.L53:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L54
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L51
.L54:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L4
.L51:
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L55
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L56
.L55:
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L56
.L57:
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L4
.L56:
	movss	xmm0, DWORD PTR s10_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s10_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s10_x[rip]
	movss	xmm0, DWORD PTR s10_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L59
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L59
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L4
.L59:
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L61
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L62
.L61:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L63
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L63
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L62
.L63:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L64
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L62
.L64:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L65
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L65
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L62
.L65:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L4
.L62:
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L67
.L66:
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L67
.L68:
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L4
.L67:
	movss	xmm0, DWORD PTR s9_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s9_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s9_x[rip]
	movss	xmm0, DWORD PTR s9_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L70
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L70
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L4
.L70:
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L73
.L72:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L74
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L73
.L74:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	je	.L75
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L75
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L73
.L75:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L73
.L76:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L4
.L73:
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L77
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L78
.L77:
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L79
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L78
.L79:
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L4
.L78:
	movss	xmm0, DWORD PTR s8_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s8_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s8_x[rip]
	movss	xmm0, DWORD PTR s8_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L81
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L4
.L81:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L83
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L84
.L83:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L84
.L85:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L86
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L84
.L86:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L87
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L84
.L87:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L4
.L84:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L88
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L89
.L88:
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L90
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L89
.L90:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L4
.L89:
	movss	xmm0, DWORD PTR s7_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s7_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s7_x[rip]
	movss	xmm0, DWORD PTR s7_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L92
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L4
.L92:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L95
.L94:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L95
.L96:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	je	.L97
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L97
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L95
.L97:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L98
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L95
.L98:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L4
.L95:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L100
.L99:
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L101
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L100
.L101:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L4
.L100:
	movss	xmm0, DWORD PTR s6_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s6_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s6_x[rip]
	movss	xmm0, DWORD PTR s6_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L103
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L103
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L4
.L103:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L105
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L106
.L105:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L106
.L107:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L106
.L108:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L106
.L109:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L4
.L106:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L111
.L110:
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L112
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L111
.L112:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L4
.L111:
	movss	xmm0, DWORD PTR s5_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s5_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s5_x[rip]
	movss	xmm0, DWORD PTR s5_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L114
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L4
.L114:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L116
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L117
.L116:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L118
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L117
.L118:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L119
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L117
.L119:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L120
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L117
.L120:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L4
.L117:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L122
.L121:
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L122
.L123:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L4
.L122:
	movss	xmm0, DWORD PTR s4_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s4_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s4_x[rip]
	movss	xmm0, DWORD PTR s4_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L125
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L125
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L4
.L125:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L127
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L128
.L127:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L129
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L128
.L129:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L128
.L130:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L131
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L131
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L128
.L131:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L4
.L128:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L132
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L133
.L132:
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L133
.L134:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L4
.L133:
	movss	xmm0, DWORD PTR s3_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s3_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s3_x[rip]
	movss	xmm0, DWORD PTR s3_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L136
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L4
.L136:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L138
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L139
.L138:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L140
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L139
.L140:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	je	.L141
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L141
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L139
.L141:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L139
.L142:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L4
.L139:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L143
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L144
.L143:
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L145
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L144
.L145:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L4
.L144:
	movss	xmm0, DWORD PTR s2_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s2_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s2_x[rip]
	movss	xmm0, DWORD PTR s2_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L147
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L4
.L147:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L150
.L149:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L151
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L150
.L151:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L150
.L152:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L153
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L150
.L153:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L4
.L150:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L155
.L154:
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L155
.L156:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L4
.L155:
	movss	xmm0, DWORD PTR s1_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s1_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s1_x[rip]
	movss	xmm0, DWORD PTR s1_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L158
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L4
.L158:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L160
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L160
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L161
.L160:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L162
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L161
.L162:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L161
.L163:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L164
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L164
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L161
.L164:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L4
.L161:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L165
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L166
.L165:
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L167
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L166
.L167:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L4
.L166:
	movss	xmm0, DWORD PTR s0_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L4
	movss	xmm1, DWORD PTR s0_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L4
	movss	xmm1, DWORD PTR s0_x[rip]
	movss	xmm0, DWORD PTR s0_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L169
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L169
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L4
.L169:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L171
.L170:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L172
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L171
.L172:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L173
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L171
.L173:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L171
.L174:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L4
.L171:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	jne	.L175
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L176
.L175:
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L176
.L177:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L176
.L178:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L4
.L176:
	mov	eax, DWORD PTR bus_j[rip]
	test	eax, eax
	jne	.L4
	movss	xmm0, DWORD PTR bus_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movss	xmm0, DWORD PTR bus_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L4
.L180:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1421
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L181
.L1421:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L181
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	jne	.L4
.L181:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L185
.L4:
	mov	eax, 0
.L185:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L186
.L1388:
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s14_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s13_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_bus_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s14_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_bus_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_backoff[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s14_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_bus_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_bus_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_evt0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_bus_cd_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_l0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_bus_j[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_backoff[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_backoff[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s13_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_bus_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s8_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s8_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s9_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s9_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s12_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s10_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s10_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s10_lambda[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_bus_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s13_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s11_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s8_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s11_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_evt2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s14_lambda[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s9_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s12_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s12_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s10_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s13_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s13_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s13_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s13_evt2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s13_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s11_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s14_backoff[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s14_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s14_evt1[rip], al
	movzx	eax, BYTE PTR _x_s14_evt2[rip]
	test	al, al
	jne	.L187
	movzx	eax, BYTE PTR _x_s14_evt0[rip]
	test	al, al
	je	.L187
	movzx	eax, BYTE PTR _x_s14_evt1[rip]
	test	al, al
	je	.L188
.L187:
	movzx	eax, BYTE PTR _x_s14_evt2[rip]
	test	al, al
	jne	.L189
	movzx	eax, BYTE PTR _x_s14_evt0[rip]
	test	al, al
	jne	.L189
	movzx	eax, BYTE PTR _x_s14_evt1[rip]
	test	al, al
	je	.L188
.L189:
	movzx	eax, BYTE PTR _x_s14_evt2[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR _x_s14_evt0[rip]
	test	al, al
	jne	.L190
	movzx	eax, BYTE PTR _x_s14_evt1[rip]
	test	al, al
	je	.L188
.L190:
	movzx	eax, BYTE PTR _x_s14_evt2[rip]
	test	al, al
	jne	.L191
	movzx	eax, BYTE PTR _x_s14_evt1[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR _x_s14_evt0[rip]
	test	al, al
	je	.L188
.L191:
	movzx	eax, BYTE PTR _x_s14_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s14_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s14_evt0[rip]
	test	al, al
	jne	.L192
.L188:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L194
.L193:
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L195
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L194
.L195:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	jne	.L192
.L194:
	movss	xmm0, DWORD PTR _x_s14_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s14_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s14_x[rip]
	movss	xmm0, DWORD PTR _x_s14_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L197
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L197
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L192
.L197:
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L198
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L198
	movss	xmm0, DWORD PTR s14_lambda[rip]
	movss	xmm1, DWORD PTR _x_s14_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L198
	ucomiss	xmm0, xmm1
	jne	.L198
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s14_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s14_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L198
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L198
	movss	xmm0, DWORD PTR s14_backoff[rip]
	movss	xmm1, DWORD PTR _x_s14_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L198
	ucomiss	xmm0, xmm1
	je	.L201
.L198:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L201
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L201
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L192
.L201:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L205
.L204:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L205
.L206:
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L207
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L207
.L205:
	movss	xmm0, DWORD PTR s14_backoff[rip]
	movss	xmm1, DWORD PTR _x_s14_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L207
	ucomiss	xmm0, xmm1
	jne	.L207
	movss	xmm0, DWORD PTR _x_s14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L207
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L209
.L207:
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L209
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L209
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L209
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L209
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L209:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L211
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L211
	movss	xmm0, DWORD PTR s14_lambda[rip]
	movss	xmm1, DWORD PTR _x_s14_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L211
	ucomiss	xmm0, xmm1
	je	.L212
.L211:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L212
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L212
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L212
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L212:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	je	.L214
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L215
.L214:
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L215
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L215
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L215
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L215
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L215
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L215:
	movss	xmm0, DWORD PTR s14_lambda[rip]
	movss	xmm1, DWORD PTR _x_s14_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L216
	ucomiss	xmm0, xmm1
	jne	.L216
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L218
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L219
.L218:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L216
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L219
.L216:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	jne	.L219
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L219
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L219
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L219
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L219
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L219:
	movss	xmm0, DWORD PTR s14_lambda[rip]
	movss	xmm1, DWORD PTR _x_s14_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L220
	ucomiss	xmm0, xmm1
	jne	.L220
	movss	xmm0, DWORD PTR _x_s14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L220
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L220
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L224
.L223:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L224
.L220:
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L224
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L224
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L224
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L224:
	movss	xmm1, DWORD PTR s14_lambda[rip]
	movss	xmm0, DWORD PTR s14_x[rip]
	comiss	xmm0, xmm1
	jb	.L225
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L225
	movss	xmm1, DWORD PTR _x_s14_backoff[rip]
	movss	xmm0, DWORD PTR s14_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L227
.L225:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L227
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L227
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L227
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L227:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L228
	movss	xmm0, DWORD PTR s14_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s14_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L229
.L228:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	jne	.L229
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	jne	.L229
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L229
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L229
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L229:
	movss	xmm0, DWORD PTR s14_lambda[rip]
	movss	xmm1, DWORD PTR _x_s14_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L230
	ucomiss	xmm0, xmm1
	jne	.L230
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L233
.L232:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L230
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	jne	.L230
.L233:
	movss	xmm0, DWORD PTR s14_backoff[rip]
	movss	xmm1, DWORD PTR _x_s14_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L230
	ucomiss	xmm0, xmm1
	jne	.L230
	movss	xmm0, DWORD PTR _x_s14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L230
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L235
.L230:
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	je	.L235
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L235
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L235
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L235
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L235:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L237
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L238
.L237:
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	jne	.L238
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L238
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L238
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L238
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L238:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	je	.L239
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L239
	movss	xmm1, DWORD PTR s14_backoff[rip]
	movss	xmm0, DWORD PTR s14_x[rip]
	comiss	xmm0, xmm1
	jnb	.L240
.L239:
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	test	al, al
	je	.L240
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	test	al, al
	jne	.L240
	movzx	eax, BYTE PTR s14_l0[rip]
	test	al, al
	je	.L240
	movzx	eax, BYTE PTR s14_l1[rip]
	test	al, al
	jne	.L240
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L240
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L240
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L192
.L240:
	movzx	eax, BYTE PTR _x_s13_evt2[rip]
	test	al, al
	jne	.L241
	movzx	eax, BYTE PTR _x_s13_evt0[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR _x_s13_evt1[rip]
	test	al, al
	je	.L242
.L241:
	movzx	eax, BYTE PTR _x_s13_evt2[rip]
	test	al, al
	jne	.L243
	movzx	eax, BYTE PTR _x_s13_evt0[rip]
	test	al, al
	jne	.L243
	movzx	eax, BYTE PTR _x_s13_evt1[rip]
	test	al, al
	je	.L242
.L243:
	movzx	eax, BYTE PTR _x_s13_evt2[rip]
	test	al, al
	je	.L244
	movzx	eax, BYTE PTR _x_s13_evt0[rip]
	test	al, al
	jne	.L244
	movzx	eax, BYTE PTR _x_s13_evt1[rip]
	test	al, al
	je	.L242
.L244:
	movzx	eax, BYTE PTR _x_s13_evt2[rip]
	test	al, al
	jne	.L245
	movzx	eax, BYTE PTR _x_s13_evt1[rip]
	test	al, al
	je	.L245
	movzx	eax, BYTE PTR _x_s13_evt0[rip]
	test	al, al
	je	.L242
.L245:
	movzx	eax, BYTE PTR _x_s13_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s13_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s13_evt0[rip]
	test	al, al
	jne	.L192
.L242:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L246
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L247
.L246:
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L247
.L248:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	jne	.L192
.L247:
	movss	xmm0, DWORD PTR _x_s13_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s13_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s13_x[rip]
	movss	xmm0, DWORD PTR _x_s13_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L250
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L192
.L250:
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L251
	movss	xmm0, DWORD PTR s13_lambda[rip]
	movss	xmm1, DWORD PTR _x_s13_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L251
	ucomiss	xmm0, xmm1
	jne	.L251
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s13_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s13_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L251
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L251
	movss	xmm0, DWORD PTR s13_backoff[rip]
	movss	xmm1, DWORD PTR _x_s13_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L251
	ucomiss	xmm0, xmm1
	je	.L254
.L251:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L192
.L254:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L258
.L257:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L258
.L259:
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L260
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L260
.L258:
	movss	xmm0, DWORD PTR s13_backoff[rip]
	movss	xmm1, DWORD PTR _x_s13_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L260
	ucomiss	xmm0, xmm1
	jne	.L260
	movss	xmm0, DWORD PTR _x_s13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L260
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L262
.L260:
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L262
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L262
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L262
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L262:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L264
	movss	xmm0, DWORD PTR s13_lambda[rip]
	movss	xmm1, DWORD PTR _x_s13_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L264
	ucomiss	xmm0, xmm1
	je	.L265
.L264:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L265
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	jne	.L265
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L265
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L265
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L265
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L265
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L265:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	je	.L267
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L268
.L267:
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L268
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L268
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L268
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L268
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L268:
	movss	xmm0, DWORD PTR s13_lambda[rip]
	movss	xmm1, DWORD PTR _x_s13_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L269
	ucomiss	xmm0, xmm1
	jne	.L269
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L272
.L271:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L269
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L272
.L269:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	jne	.L272
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L272
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L272
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L272
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L272
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L272:
	movss	xmm0, DWORD PTR s13_lambda[rip]
	movss	xmm1, DWORD PTR _x_s13_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L273
	ucomiss	xmm0, xmm1
	jne	.L273
	movss	xmm0, DWORD PTR _x_s13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L273
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L273
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L276
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L277
.L276:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L273
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L277
.L273:
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L277
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L277
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L277
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L277:
	movss	xmm1, DWORD PTR s13_lambda[rip]
	movss	xmm0, DWORD PTR s13_x[rip]
	comiss	xmm0, xmm1
	jb	.L278
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L278
	movss	xmm1, DWORD PTR _x_s13_backoff[rip]
	movss	xmm0, DWORD PTR s13_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L280
.L278:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L280
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	jne	.L280
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L280
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L280
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L280
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L280:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L281
	movss	xmm0, DWORD PTR s13_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s13_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L282
.L281:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	jne	.L282
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L282
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L282
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L282:
	movss	xmm0, DWORD PTR s13_lambda[rip]
	movss	xmm1, DWORD PTR _x_s13_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L283
	ucomiss	xmm0, xmm1
	jne	.L283
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L286
.L285:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	jne	.L283
.L286:
	movss	xmm0, DWORD PTR s13_backoff[rip]
	movss	xmm1, DWORD PTR _x_s13_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L283
	ucomiss	xmm0, xmm1
	jne	.L283
	movss	xmm0, DWORD PTR _x_s13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L283
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L288
.L283:
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L288
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L288
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L288
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L288:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L290
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L291
.L290:
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	jne	.L291
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L291
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L291
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L291
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L291:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	je	.L292
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L292
	movss	xmm1, DWORD PTR s13_backoff[rip]
	movss	xmm0, DWORD PTR s13_x[rip]
	comiss	xmm0, xmm1
	jnb	.L293
.L292:
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	test	al, al
	je	.L293
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	test	al, al
	jne	.L293
	movzx	eax, BYTE PTR s13_l0[rip]
	test	al, al
	je	.L293
	movzx	eax, BYTE PTR s13_l1[rip]
	test	al, al
	jne	.L293
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L293
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L293
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L192
.L293:
	movzx	eax, BYTE PTR _x_s12_evt2[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	je	.L294
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L295
.L294:
	movzx	eax, BYTE PTR _x_s12_evt2[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L295
.L296:
	movzx	eax, BYTE PTR _x_s12_evt2[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L295
.L297:
	movzx	eax, BYTE PTR _x_s12_evt2[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	je	.L295
.L298:
	movzx	eax, BYTE PTR _x_s12_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	test	al, al
	jne	.L192
.L295:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L299
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L300
.L299:
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L301
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L300
.L301:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L192
.L300:
	movss	xmm0, DWORD PTR _x_s12_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s12_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s12_x[rip]
	movss	xmm0, DWORD PTR _x_s12_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L303
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L303
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L192
.L303:
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L304
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L304
	movss	xmm0, DWORD PTR s12_lambda[rip]
	movss	xmm1, DWORD PTR _x_s12_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L304
	ucomiss	xmm0, xmm1
	jne	.L304
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s12_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s12_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L304
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L304
	movss	xmm0, DWORD PTR s12_backoff[rip]
	movss	xmm1, DWORD PTR _x_s12_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L304
	ucomiss	xmm0, xmm1
	je	.L307
.L304:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L192
.L307:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L311
.L310:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L312
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L311
.L312:
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L313
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L313
.L311:
	movss	xmm0, DWORD PTR s12_backoff[rip]
	movss	xmm1, DWORD PTR _x_s12_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L313
	ucomiss	xmm0, xmm1
	jne	.L313
	movss	xmm0, DWORD PTR _x_s12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L313
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L315
.L313:
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L315
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L315
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L315
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L315
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L315:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L317
	movss	xmm0, DWORD PTR s12_lambda[rip]
	movss	xmm1, DWORD PTR _x_s12_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L317
	ucomiss	xmm0, xmm1
	je	.L318
.L317:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L318
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L318
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L318
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L318
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L318
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L318
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L318:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L320
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L321
.L320:
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L321
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L321
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L321
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L321
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L321
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L321
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L321:
	movss	xmm0, DWORD PTR s12_lambda[rip]
	movss	xmm1, DWORD PTR _x_s12_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L322
	ucomiss	xmm0, xmm1
	jne	.L322
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L325
.L324:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L322
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L325
.L322:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L325
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L325
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L325
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L325
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L325:
	movss	xmm0, DWORD PTR s12_lambda[rip]
	movss	xmm1, DWORD PTR _x_s12_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L326
	ucomiss	xmm0, xmm1
	jne	.L326
	movss	xmm0, DWORD PTR _x_s12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L326
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L326
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L329
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L330
.L329:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L330
.L326:
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L330
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L330
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L330
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L330
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L330:
	movss	xmm1, DWORD PTR s12_lambda[rip]
	movss	xmm0, DWORD PTR s12_x[rip]
	comiss	xmm0, xmm1
	jb	.L331
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L331
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L331
	movss	xmm1, DWORD PTR _x_s12_backoff[rip]
	movss	xmm0, DWORD PTR s12_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L333
.L331:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L333
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L333
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L333:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L334
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L334
	movss	xmm0, DWORD PTR s12_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s12_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L335
.L334:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	jne	.L335
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L335
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L335
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L335:
	movss	xmm0, DWORD PTR s12_lambda[rip]
	movss	xmm1, DWORD PTR _x_s12_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L336
	ucomiss	xmm0, xmm1
	jne	.L336
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L338
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L339
.L338:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L336
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L336
.L339:
	movss	xmm0, DWORD PTR s12_backoff[rip]
	movss	xmm1, DWORD PTR _x_s12_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L336
	ucomiss	xmm0, xmm1
	jne	.L336
	movss	xmm0, DWORD PTR _x_s12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L336
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L341
.L336:
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L341
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L341
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L341
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L341:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L343
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L343
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L344
.L343:
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	je	.L344
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L344
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L344
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L344
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L344
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L344:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L345
	movss	xmm1, DWORD PTR s12_backoff[rip]
	movss	xmm0, DWORD PTR s12_x[rip]
	comiss	xmm0, xmm1
	jnb	.L346
.L345:
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	test	al, al
	je	.L346
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	test	al, al
	jne	.L346
	movzx	eax, BYTE PTR s12_l0[rip]
	test	al, al
	je	.L346
	movzx	eax, BYTE PTR s12_l1[rip]
	test	al, al
	jne	.L346
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L346
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L346
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L192
.L346:
	movzx	eax, BYTE PTR _x_s11_evt2[rip]
	test	al, al
	jne	.L347
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L348
.L347:
	movzx	eax, BYTE PTR _x_s11_evt2[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L348
.L349:
	movzx	eax, BYTE PTR _x_s11_evt2[rip]
	test	al, al
	je	.L350
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	jne	.L350
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L348
.L350:
	movzx	eax, BYTE PTR _x_s11_evt2[rip]
	test	al, al
	jne	.L351
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L351
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	je	.L348
.L351:
	movzx	eax, BYTE PTR _x_s11_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	test	al, al
	jne	.L192
.L348:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L353
.L352:
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L353
.L354:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L192
.L353:
	movss	xmm0, DWORD PTR _x_s11_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s11_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s11_x[rip]
	movss	xmm0, DWORD PTR _x_s11_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L356
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L356
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L192
.L356:
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L357
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L357
	movss	xmm0, DWORD PTR s11_lambda[rip]
	movss	xmm1, DWORD PTR _x_s11_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L357
	ucomiss	xmm0, xmm1
	jne	.L357
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s11_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s11_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L357
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L357
	movss	xmm0, DWORD PTR s11_backoff[rip]
	movss	xmm1, DWORD PTR _x_s11_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L357
	ucomiss	xmm0, xmm1
	je	.L360
.L357:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L360
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L360
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L192
.L360:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L363
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L364
.L363:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L364
.L365:
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L366
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L366
.L364:
	movss	xmm0, DWORD PTR s11_backoff[rip]
	movss	xmm1, DWORD PTR _x_s11_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L366
	ucomiss	xmm0, xmm1
	jne	.L366
	movss	xmm0, DWORD PTR _x_s11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L366
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L368
.L366:
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L368
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L368
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L368
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L368:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L370
	movss	xmm0, DWORD PTR s11_lambda[rip]
	movss	xmm1, DWORD PTR _x_s11_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L370
	ucomiss	xmm0, xmm1
	je	.L371
.L370:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L371
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L371
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L371
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L371
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L371
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L371
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L371:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	je	.L373
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L373
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L374
.L373:
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L374
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L374
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L374
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L374
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L374
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L374:
	movss	xmm0, DWORD PTR s11_lambda[rip]
	movss	xmm1, DWORD PTR _x_s11_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L375
	ucomiss	xmm0, xmm1
	jne	.L375
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L377
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L378
.L377:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L375
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L378
.L375:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L378
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L378
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L378
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L378
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L378
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L378:
	movss	xmm0, DWORD PTR s11_lambda[rip]
	movss	xmm1, DWORD PTR _x_s11_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L379
	ucomiss	xmm0, xmm1
	jne	.L379
	movss	xmm0, DWORD PTR _x_s11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L379
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L379
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L383
.L382:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L379
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L383
.L379:
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L383
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L383
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L383
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L383
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L383:
	movss	xmm1, DWORD PTR s11_lambda[rip]
	movss	xmm0, DWORD PTR s11_x[rip]
	comiss	xmm0, xmm1
	jb	.L384
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L384
	movss	xmm1, DWORD PTR _x_s11_backoff[rip]
	movss	xmm0, DWORD PTR s11_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L386
.L384:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L386
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L386
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L386
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L386
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L386
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L386
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L386:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L387
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L387
	movss	xmm0, DWORD PTR s11_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s11_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L388
.L387:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L388
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L388
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	je	.L388
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	jne	.L388
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L388
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L388
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L388:
	movss	xmm0, DWORD PTR s11_lambda[rip]
	movss	xmm1, DWORD PTR _x_s11_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L389
	ucomiss	xmm0, xmm1
	jne	.L389
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L391
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L392
.L391:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L389
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L389
.L392:
	movss	xmm0, DWORD PTR s11_backoff[rip]
	movss	xmm1, DWORD PTR _x_s11_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L389
	ucomiss	xmm0, xmm1
	jne	.L389
	movss	xmm0, DWORD PTR _x_s11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L389
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L394
.L389:
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L394
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L394
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L394
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L394
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L394:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L396
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L397
.L396:
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	jne	.L397
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L397
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L397
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L397
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L397:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L398
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L398
	movss	xmm1, DWORD PTR s11_backoff[rip]
	movss	xmm0, DWORD PTR s11_x[rip]
	comiss	xmm0, xmm1
	jnb	.L399
.L398:
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	test	al, al
	jne	.L399
	movzx	eax, BYTE PTR s11_l0[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR s11_l1[rip]
	test	al, al
	jne	.L399
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L399
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L399
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L192
.L399:
	movzx	eax, BYTE PTR _x_s10_evt2[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	je	.L400
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L401
.L400:
	movzx	eax, BYTE PTR _x_s10_evt2[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	jne	.L402
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L401
.L402:
	movzx	eax, BYTE PTR _x_s10_evt2[rip]
	test	al, al
	je	.L403
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	jne	.L403
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L401
.L403:
	movzx	eax, BYTE PTR _x_s10_evt2[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	je	.L401
.L404:
	movzx	eax, BYTE PTR _x_s10_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	test	al, al
	jne	.L192
.L401:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L405
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L406
.L405:
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L407
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L406
.L407:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L192
.L406:
	movss	xmm0, DWORD PTR _x_s10_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s10_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s10_x[rip]
	movss	xmm0, DWORD PTR _x_s10_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L409
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L409
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L192
.L409:
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L410
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L410
	movss	xmm0, DWORD PTR s10_lambda[rip]
	movss	xmm1, DWORD PTR _x_s10_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L410
	ucomiss	xmm0, xmm1
	jne	.L410
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s10_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s10_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L410
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L410
	movss	xmm0, DWORD PTR s10_backoff[rip]
	movss	xmm1, DWORD PTR _x_s10_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L410
	ucomiss	xmm0, xmm1
	je	.L413
.L410:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L413
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L192
.L413:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L416
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L417
.L416:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L417
.L418:
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L419
.L417:
	movss	xmm0, DWORD PTR s10_backoff[rip]
	movss	xmm1, DWORD PTR _x_s10_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L419
	ucomiss	xmm0, xmm1
	jne	.L419
	movss	xmm0, DWORD PTR _x_s10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L419
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L421
.L419:
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L421
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L421
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L421
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L421
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L421:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L423
	movss	xmm0, DWORD PTR s10_lambda[rip]
	movss	xmm1, DWORD PTR _x_s10_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L423
	ucomiss	xmm0, xmm1
	je	.L424
.L423:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L424
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L424
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L424
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L424:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L426
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L427
.L426:
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L427
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L427
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L427
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L427
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L427
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L427
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L427:
	movss	xmm0, DWORD PTR s10_lambda[rip]
	movss	xmm1, DWORD PTR _x_s10_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L428
	ucomiss	xmm0, xmm1
	jne	.L428
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L430
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L431
.L430:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L428
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L428
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L431
.L428:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L431
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L431
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L431
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L431
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L431
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L431
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L431:
	movss	xmm0, DWORD PTR s10_lambda[rip]
	movss	xmm1, DWORD PTR _x_s10_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L432
	ucomiss	xmm0, xmm1
	jne	.L432
	movss	xmm0, DWORD PTR _x_s10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L432
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L435
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L436
.L435:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L436
.L432:
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L436
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L436
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L436
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L436
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L436:
	movss	xmm1, DWORD PTR s10_lambda[rip]
	movss	xmm0, DWORD PTR s10_x[rip]
	comiss	xmm0, xmm1
	jb	.L437
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L437
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L437
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L437
	movss	xmm1, DWORD PTR _x_s10_backoff[rip]
	movss	xmm0, DWORD PTR s10_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L439
.L437:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L439
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L439
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L439
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L439
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L439
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L439
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L439:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L440
	movss	xmm0, DWORD PTR s10_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s10_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L441
.L440:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	jne	.L441
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L441
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L441
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L441:
	movss	xmm0, DWORD PTR s10_lambda[rip]
	movss	xmm1, DWORD PTR _x_s10_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L442
	ucomiss	xmm0, xmm1
	jne	.L442
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L444
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L445
.L444:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L442
.L445:
	movss	xmm0, DWORD PTR s10_backoff[rip]
	movss	xmm1, DWORD PTR _x_s10_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L442
	ucomiss	xmm0, xmm1
	jne	.L442
	movss	xmm0, DWORD PTR _x_s10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L442
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L447
.L442:
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L447
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L447
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L447
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L447
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L447:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L449
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L449
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L450
.L449:
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L450
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L450
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L450
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L450
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L450:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	je	.L451
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L451
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L451
	movss	xmm1, DWORD PTR s10_backoff[rip]
	movss	xmm0, DWORD PTR s10_x[rip]
	comiss	xmm0, xmm1
	jnb	.L452
.L451:
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	test	al, al
	je	.L452
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	test	al, al
	jne	.L452
	movzx	eax, BYTE PTR s10_l0[rip]
	test	al, al
	je	.L452
	movzx	eax, BYTE PTR s10_l1[rip]
	test	al, al
	jne	.L452
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L452
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L452
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L192
.L452:
	movzx	eax, BYTE PTR _x_s9_evt2[rip]
	test	al, al
	jne	.L453
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L454
.L453:
	movzx	eax, BYTE PTR _x_s9_evt2[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L454
.L455:
	movzx	eax, BYTE PTR _x_s9_evt2[rip]
	test	al, al
	je	.L456
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	jne	.L456
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L454
.L456:
	movzx	eax, BYTE PTR _x_s9_evt2[rip]
	test	al, al
	jne	.L457
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L457
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	je	.L454
.L457:
	movzx	eax, BYTE PTR _x_s9_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	test	al, al
	jne	.L192
.L454:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L458
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L459
.L458:
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L460
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L459
.L460:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L192
.L459:
	movss	xmm0, DWORD PTR _x_s9_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s9_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s9_x[rip]
	movss	xmm0, DWORD PTR _x_s9_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L462
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L462
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L192
.L462:
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L463
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L463
	movss	xmm0, DWORD PTR s9_lambda[rip]
	movss	xmm1, DWORD PTR _x_s9_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L463
	ucomiss	xmm0, xmm1
	jne	.L463
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s9_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s9_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L463
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L463
	movss	xmm0, DWORD PTR s9_backoff[rip]
	movss	xmm1, DWORD PTR _x_s9_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L463
	ucomiss	xmm0, xmm1
	je	.L466
.L463:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L192
.L466:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L469
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L470
.L469:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L470
.L471:
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L472
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L472
.L470:
	movss	xmm0, DWORD PTR s9_backoff[rip]
	movss	xmm1, DWORD PTR _x_s9_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L472
	ucomiss	xmm0, xmm1
	jne	.L472
	movss	xmm0, DWORD PTR _x_s9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L472
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L474
.L472:
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L474
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L474
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L474
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L474
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L474:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L476
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L476
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L476
	movss	xmm0, DWORD PTR s9_lambda[rip]
	movss	xmm1, DWORD PTR _x_s9_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L476
	ucomiss	xmm0, xmm1
	je	.L477
.L476:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L477
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L477
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L477
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L477:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	je	.L479
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L479
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L480
.L479:
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L480
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L480
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L480
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L480
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L480
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L480
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L480:
	movss	xmm0, DWORD PTR s9_lambda[rip]
	movss	xmm1, DWORD PTR _x_s9_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L481
	ucomiss	xmm0, xmm1
	jne	.L481
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L484
.L483:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L481
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L484
.L481:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L484
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L484
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L484
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L484
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L484
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L484:
	movss	xmm0, DWORD PTR s9_lambda[rip]
	movss	xmm1, DWORD PTR _x_s9_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L485
	ucomiss	xmm0, xmm1
	jne	.L485
	movss	xmm0, DWORD PTR _x_s9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L485
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L485
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L489
.L488:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L485
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L489
.L485:
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L489
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L489
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L489
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L489
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L489:
	movss	xmm1, DWORD PTR s9_lambda[rip]
	movss	xmm0, DWORD PTR s9_x[rip]
	comiss	xmm0, xmm1
	jb	.L490
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L490
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L490
	movss	xmm1, DWORD PTR _x_s9_backoff[rip]
	movss	xmm0, DWORD PTR s9_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L492
.L490:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L492
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L492
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L492
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L492
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L492
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L492
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L492:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L493
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L493
	movss	xmm0, DWORD PTR s9_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s9_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L494
.L493:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	jne	.L494
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L494
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L494
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L494:
	movss	xmm0, DWORD PTR s9_lambda[rip]
	movss	xmm1, DWORD PTR _x_s9_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L495
	ucomiss	xmm0, xmm1
	jne	.L495
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L497
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L498
.L497:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L495
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L495
.L498:
	movss	xmm0, DWORD PTR s9_backoff[rip]
	movss	xmm1, DWORD PTR _x_s9_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L495
	ucomiss	xmm0, xmm1
	jne	.L495
	movss	xmm0, DWORD PTR _x_s9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L495
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L500
.L495:
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L500
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L500
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L500
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L500
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L500:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L502
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L502
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L503
.L502:
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	je	.L503
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L503
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L503
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L503
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L503
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L503:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L504
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L504
	movss	xmm1, DWORD PTR s9_backoff[rip]
	movss	xmm0, DWORD PTR s9_x[rip]
	comiss	xmm0, xmm1
	jnb	.L505
.L504:
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	test	al, al
	je	.L505
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR s9_l0[rip]
	test	al, al
	je	.L505
	movzx	eax, BYTE PTR s9_l1[rip]
	test	al, al
	jne	.L505
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L505
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L505
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L192
.L505:
	movzx	eax, BYTE PTR _x_s8_evt2[rip]
	test	al, al
	jne	.L506
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	je	.L506
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L507
.L506:
	movzx	eax, BYTE PTR _x_s8_evt2[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L507
.L508:
	movzx	eax, BYTE PTR _x_s8_evt2[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L507
.L509:
	movzx	eax, BYTE PTR _x_s8_evt2[rip]
	test	al, al
	jne	.L510
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L510
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	je	.L507
.L510:
	movzx	eax, BYTE PTR _x_s8_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	test	al, al
	jne	.L192
.L507:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L512
.L511:
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L512
.L513:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L192
.L512:
	movss	xmm0, DWORD PTR _x_s8_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s8_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s8_x[rip]
	movss	xmm0, DWORD PTR _x_s8_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L515
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L515
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L192
.L515:
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L516
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L516
	movss	xmm0, DWORD PTR s8_lambda[rip]
	movss	xmm1, DWORD PTR _x_s8_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L516
	ucomiss	xmm0, xmm1
	jne	.L516
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s8_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s8_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L516
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L516
	movss	xmm0, DWORD PTR s8_backoff[rip]
	movss	xmm1, DWORD PTR _x_s8_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L516
	ucomiss	xmm0, xmm1
	je	.L519
.L516:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L519
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L192
.L519:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L522
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L523
.L522:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L524
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L523
.L524:
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L525
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L525
.L523:
	movss	xmm0, DWORD PTR s8_backoff[rip]
	movss	xmm1, DWORD PTR _x_s8_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L525
	ucomiss	xmm0, xmm1
	jne	.L525
	movss	xmm0, DWORD PTR _x_s8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L525
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L527
.L525:
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L527
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L527
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L527
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L527:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L529
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L529
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L529
	movss	xmm0, DWORD PTR s8_lambda[rip]
	movss	xmm1, DWORD PTR _x_s8_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L529
	ucomiss	xmm0, xmm1
	je	.L530
.L529:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L530
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L530
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L530
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L530:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L532
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L533
.L532:
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L533
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L533
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L533
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L533
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L533:
	movss	xmm0, DWORD PTR s8_lambda[rip]
	movss	xmm1, DWORD PTR _x_s8_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L534
	ucomiss	xmm0, xmm1
	jne	.L534
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	je	.L536
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L536
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L537
.L536:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L534
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L534
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L537
.L534:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L537
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L537
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L537
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L537:
	movss	xmm0, DWORD PTR s8_lambda[rip]
	movss	xmm1, DWORD PTR _x_s8_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L538
	ucomiss	xmm0, xmm1
	jne	.L538
	movss	xmm0, DWORD PTR _x_s8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L538
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L538
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L542
.L541:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L538
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L542
.L538:
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L542
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L542
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L542
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L542
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L542:
	movss	xmm1, DWORD PTR s8_lambda[rip]
	movss	xmm0, DWORD PTR s8_x[rip]
	comiss	xmm0, xmm1
	jb	.L543
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L543
	movss	xmm1, DWORD PTR _x_s8_backoff[rip]
	movss	xmm0, DWORD PTR s8_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L545
.L543:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L545
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L545
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L545
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L545
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L545
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L545:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L546
	movss	xmm0, DWORD PTR s8_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s8_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L547
.L546:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L547
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L547
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	je	.L547
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	jne	.L547
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L547
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L547
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L547:
	movss	xmm0, DWORD PTR s8_lambda[rip]
	movss	xmm1, DWORD PTR _x_s8_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L548
	ucomiss	xmm0, xmm1
	jne	.L548
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L550
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L551
.L550:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L548
.L551:
	movss	xmm0, DWORD PTR s8_backoff[rip]
	movss	xmm1, DWORD PTR _x_s8_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L548
	ucomiss	xmm0, xmm1
	jne	.L548
	movss	xmm0, DWORD PTR _x_s8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L548
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L553
.L548:
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L553
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L553
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L553
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L553:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L555
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L555
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L556
.L555:
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	je	.L556
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	jne	.L556
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L556
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L556
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L556
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L556
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L556:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	je	.L557
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L557
	movss	xmm1, DWORD PTR s8_backoff[rip]
	movss	xmm0, DWORD PTR s8_x[rip]
	comiss	xmm0, xmm1
	jnb	.L558
.L557:
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR s8_l0[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR s8_l1[rip]
	test	al, al
	jne	.L558
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L558
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L558
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L192
.L558:
	movzx	eax, BYTE PTR _x_s7_evt2[rip]
	test	al, al
	jne	.L559
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L560
.L559:
	movzx	eax, BYTE PTR _x_s7_evt2[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L560
.L561:
	movzx	eax, BYTE PTR _x_s7_evt2[rip]
	test	al, al
	je	.L562
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L560
.L562:
	movzx	eax, BYTE PTR _x_s7_evt2[rip]
	test	al, al
	jne	.L563
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L560
.L563:
	movzx	eax, BYTE PTR _x_s7_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	jne	.L192
.L560:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L564
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L565
.L564:
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L566
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L565
.L566:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L192
.L565:
	movss	xmm0, DWORD PTR _x_s7_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s7_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	movss	xmm0, DWORD PTR _x_s7_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L568
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L568
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L192
.L568:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L569
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L569
	movss	xmm0, DWORD PTR s7_lambda[rip]
	movss	xmm1, DWORD PTR _x_s7_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L569
	ucomiss	xmm0, xmm1
	jne	.L569
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L569
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L569
	movss	xmm0, DWORD PTR s7_backoff[rip]
	movss	xmm1, DWORD PTR _x_s7_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L569
	ucomiss	xmm0, xmm1
	je	.L572
.L569:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L192
.L572:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L575
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L576
.L575:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L577
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L576
.L577:
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L578
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L578
.L576:
	movss	xmm0, DWORD PTR s7_backoff[rip]
	movss	xmm1, DWORD PTR _x_s7_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L578
	ucomiss	xmm0, xmm1
	jne	.L578
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L578
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L580
.L578:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L580
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L580
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L580
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L580:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L582
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L582
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L582
	movss	xmm0, DWORD PTR s7_lambda[rip]
	movss	xmm1, DWORD PTR _x_s7_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L582
	ucomiss	xmm0, xmm1
	je	.L583
.L582:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L583
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L583
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L583
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L583
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L583
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L583
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L583:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	je	.L585
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L585
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L586
.L585:
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L586
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L586
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L586
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L586
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L586:
	movss	xmm0, DWORD PTR s7_lambda[rip]
	movss	xmm1, DWORD PTR _x_s7_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L587
	ucomiss	xmm0, xmm1
	jne	.L587
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L590
.L589:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L587
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L587
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L590
.L587:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L590
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L590
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L590
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L590
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L590
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L590
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L590:
	movss	xmm0, DWORD PTR s7_lambda[rip]
	movss	xmm1, DWORD PTR _x_s7_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L591
	ucomiss	xmm0, xmm1
	jne	.L591
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L591
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L591
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L595
.L594:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L591
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L595
.L591:
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L595
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L595
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L595
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L595
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L595:
	movss	xmm1, DWORD PTR s7_lambda[rip]
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, xmm1
	jb	.L596
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L596
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L596
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L596
	movss	xmm1, DWORD PTR _x_s7_backoff[rip]
	movss	xmm0, DWORD PTR s7_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L598
.L596:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L598
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L598
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L598
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L598
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L598
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L598
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L598:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L599
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L599
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L599
	movss	xmm0, DWORD PTR s7_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s7_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L600
.L599:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L600
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L600
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L600
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L600
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L600
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L600:
	movss	xmm0, DWORD PTR s7_lambda[rip]
	movss	xmm1, DWORD PTR _x_s7_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L601
	ucomiss	xmm0, xmm1
	jne	.L601
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L603
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L604
.L603:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L601
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L601
.L604:
	movss	xmm0, DWORD PTR s7_backoff[rip]
	movss	xmm1, DWORD PTR _x_s7_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L601
	ucomiss	xmm0, xmm1
	jne	.L601
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L601
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L606
.L601:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L606
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L606
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L606
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L606
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L606:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L608
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L608
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L609
.L608:
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L609
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L609
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L609
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L609
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L609:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	je	.L610
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L610
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L610
	movss	xmm1, DWORD PTR s7_backoff[rip]
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, xmm1
	jnb	.L611
.L610:
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L611
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L611
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L611
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L611
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L611
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L611
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L192
.L611:
	movzx	eax, BYTE PTR _x_s6_evt2[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L612
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L613
.L612:
	movzx	eax, BYTE PTR _x_s6_evt2[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L613
.L614:
	movzx	eax, BYTE PTR _x_s6_evt2[rip]
	test	al, al
	je	.L615
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	jne	.L615
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L613
.L615:
	movzx	eax, BYTE PTR _x_s6_evt2[rip]
	test	al, al
	jne	.L616
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L616
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L613
.L616:
	movzx	eax, BYTE PTR _x_s6_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	jne	.L192
.L613:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L618
.L617:
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L618
.L619:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L192
.L618:
	movss	xmm0, DWORD PTR _x_s6_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s6_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	movss	xmm0, DWORD PTR _x_s6_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L621
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L621
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L192
.L621:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L622
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L622
	movss	xmm0, DWORD PTR s6_lambda[rip]
	movss	xmm1, DWORD PTR _x_s6_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L622
	ucomiss	xmm0, xmm1
	jne	.L622
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L622
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L622
	movss	xmm0, DWORD PTR s6_backoff[rip]
	movss	xmm1, DWORD PTR _x_s6_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L622
	ucomiss	xmm0, xmm1
	je	.L625
.L622:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L625
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L192
.L625:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L628
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L629
.L628:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L630
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L629
.L630:
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L631
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L631
.L629:
	movss	xmm0, DWORD PTR s6_backoff[rip]
	movss	xmm1, DWORD PTR _x_s6_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L631
	ucomiss	xmm0, xmm1
	jne	.L631
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L631
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L633
.L631:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L633
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L633
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L633
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L633
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L633:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L635
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L635
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L635
	movss	xmm0, DWORD PTR s6_lambda[rip]
	movss	xmm1, DWORD PTR _x_s6_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L635
	ucomiss	xmm0, xmm1
	je	.L636
.L635:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L636
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L636
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L636
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L636:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	je	.L638
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L639
.L638:
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L639
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L639
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L639
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L639
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L639
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L639
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L639:
	movss	xmm0, DWORD PTR s6_lambda[rip]
	movss	xmm1, DWORD PTR _x_s6_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L640
	ucomiss	xmm0, xmm1
	jne	.L640
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	je	.L642
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L642
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L643
.L642:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L640
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L640
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L643
.L640:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L643
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L643
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L643
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L643
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L643
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L643
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L643:
	movss	xmm0, DWORD PTR s6_lambda[rip]
	movss	xmm1, DWORD PTR _x_s6_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L644
	ucomiss	xmm0, xmm1
	jne	.L644
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L644
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L644
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L648
.L647:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L644
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L648
.L644:
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L648
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L648
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L648
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L648
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L648:
	movss	xmm1, DWORD PTR s6_lambda[rip]
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, xmm1
	jb	.L649
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L649
	movss	xmm1, DWORD PTR _x_s6_backoff[rip]
	movss	xmm0, DWORD PTR s6_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L651
.L649:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L651
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L651
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L651
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L651
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L651:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L652
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L652
	movss	xmm0, DWORD PTR s6_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s6_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L653
.L652:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L653
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L653
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L653
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L653
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L653
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L653:
	movss	xmm0, DWORD PTR s6_lambda[rip]
	movss	xmm1, DWORD PTR _x_s6_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L654
	ucomiss	xmm0, xmm1
	jne	.L654
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L656
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L657
.L656:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L654
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L654
.L657:
	movss	xmm0, DWORD PTR s6_backoff[rip]
	movss	xmm1, DWORD PTR _x_s6_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L654
	ucomiss	xmm0, xmm1
	jne	.L654
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L654
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L659
.L654:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L659
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L659
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L659
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L659
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L659:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L661
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L661
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L662
.L661:
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L662
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L662
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L662
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L662
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L662
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L662
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L662:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	je	.L663
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L663
	movss	xmm1, DWORD PTR s6_backoff[rip]
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, xmm1
	jnb	.L664
.L663:
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L664
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L664
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L664
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L664
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L664
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L664
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L192
.L664:
	movzx	eax, BYTE PTR _x_s5_evt2[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L666
.L665:
	movzx	eax, BYTE PTR _x_s5_evt2[rip]
	test	al, al
	jne	.L667
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	jne	.L667
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L666
.L667:
	movzx	eax, BYTE PTR _x_s5_evt2[rip]
	test	al, al
	je	.L668
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	jne	.L668
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L666
.L668:
	movzx	eax, BYTE PTR _x_s5_evt2[rip]
	test	al, al
	jne	.L669
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L669
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L666
.L669:
	movzx	eax, BYTE PTR _x_s5_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	jne	.L192
.L666:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L671
.L670:
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L672
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L671
.L672:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L192
.L671:
	movss	xmm0, DWORD PTR _x_s5_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s5_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	movss	xmm0, DWORD PTR _x_s5_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L674
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L674
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L192
.L674:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L675
	movss	xmm0, DWORD PTR s5_lambda[rip]
	movss	xmm1, DWORD PTR _x_s5_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L675
	ucomiss	xmm0, xmm1
	jne	.L675
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L675
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L675
	movss	xmm0, DWORD PTR s5_backoff[rip]
	movss	xmm1, DWORD PTR _x_s5_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L675
	ucomiss	xmm0, xmm1
	je	.L678
.L675:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L678
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L192
.L678:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L682
.L681:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L682
.L683:
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L684
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L684
.L682:
	movss	xmm0, DWORD PTR s5_backoff[rip]
	movss	xmm1, DWORD PTR _x_s5_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L684
	ucomiss	xmm0, xmm1
	jne	.L684
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L684
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L686
.L684:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L686
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L686
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L686
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L686
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L686:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L688
	movss	xmm0, DWORD PTR s5_lambda[rip]
	movss	xmm1, DWORD PTR _x_s5_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L688
	ucomiss	xmm0, xmm1
	je	.L689
.L688:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L689
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L689
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L689
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L689
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L689:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	je	.L691
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L691
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L692
.L691:
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L692
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L692
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L692
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L692
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L692
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L692
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L692:
	movss	xmm0, DWORD PTR s5_lambda[rip]
	movss	xmm1, DWORD PTR _x_s5_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L693
	ucomiss	xmm0, xmm1
	jne	.L693
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L696
.L695:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L696
.L693:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L696
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L696
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L696
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L696
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L696
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L696
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L696:
	movss	xmm0, DWORD PTR s5_lambda[rip]
	movss	xmm1, DWORD PTR _x_s5_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L697
	ucomiss	xmm0, xmm1
	jne	.L697
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L697
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L697
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L701
.L700:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L697
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L701
.L697:
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L701
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L701
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L701
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L701:
	movss	xmm1, DWORD PTR s5_lambda[rip]
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, xmm1
	jb	.L702
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L702
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L702
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L702
	movss	xmm1, DWORD PTR _x_s5_backoff[rip]
	movss	xmm0, DWORD PTR s5_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L704
.L702:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L704
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L704
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L704
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L704
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L704
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L704
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L704:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L705
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L705
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L705
	movss	xmm0, DWORD PTR s5_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s5_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L706
.L705:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L706
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L706
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L706
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L706
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L706
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L706
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L706:
	movss	xmm0, DWORD PTR s5_lambda[rip]
	movss	xmm1, DWORD PTR _x_s5_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L707
	ucomiss	xmm0, xmm1
	jne	.L707
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L709
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L710
.L709:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L707
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L707
.L710:
	movss	xmm0, DWORD PTR s5_backoff[rip]
	movss	xmm1, DWORD PTR _x_s5_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L707
	ucomiss	xmm0, xmm1
	jne	.L707
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L707
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L712
.L707:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L712
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L712
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L712
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L712
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L712:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L714
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L714
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L715
.L714:
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L715
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L715
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L715
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L715
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L715
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L715
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L715:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	je	.L716
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L716
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L716
	movss	xmm1, DWORD PTR s5_backoff[rip]
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, xmm1
	jnb	.L717
.L716:
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L717
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L717
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L717
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L717
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L717
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L717
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L192
.L717:
	movzx	eax, BYTE PTR _x_s4_evt2[rip]
	test	al, al
	jne	.L718
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L718
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L719
.L718:
	movzx	eax, BYTE PTR _x_s4_evt2[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	jne	.L720
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L719
.L720:
	movzx	eax, BYTE PTR _x_s4_evt2[rip]
	test	al, al
	je	.L721
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	jne	.L721
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L719
.L721:
	movzx	eax, BYTE PTR _x_s4_evt2[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L722
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L719
.L722:
	movzx	eax, BYTE PTR _x_s4_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	jne	.L192
.L719:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L723
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L724
.L723:
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L724
.L725:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L192
.L724:
	movss	xmm0, DWORD PTR _x_s4_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s4_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	movss	xmm0, DWORD PTR _x_s4_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L727
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L727
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L192
.L727:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L728
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L728
	movss	xmm0, DWORD PTR s4_lambda[rip]
	movss	xmm1, DWORD PTR _x_s4_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L728
	ucomiss	xmm0, xmm1
	jne	.L728
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L728
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L728
	movss	xmm0, DWORD PTR s4_backoff[rip]
	movss	xmm1, DWORD PTR _x_s4_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L728
	ucomiss	xmm0, xmm1
	je	.L731
.L728:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L731
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L731
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L192
.L731:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L734
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L735
.L734:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L736
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L735
.L736:
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L737
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L737
.L735:
	movss	xmm0, DWORD PTR s4_backoff[rip]
	movss	xmm1, DWORD PTR _x_s4_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L737
	ucomiss	xmm0, xmm1
	jne	.L737
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L737
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L739
.L737:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L739
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L739
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L739
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L739
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L739:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L741
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L741
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L741
	movss	xmm0, DWORD PTR s4_lambda[rip]
	movss	xmm1, DWORD PTR _x_s4_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L741
	ucomiss	xmm0, xmm1
	je	.L742
.L741:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L742
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L742
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L742
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L742
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L742
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L742
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L742:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	je	.L744
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L744
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L745
.L744:
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L745
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L745
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L745
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L745
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L745
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L745
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L745:
	movss	xmm0, DWORD PTR s4_lambda[rip]
	movss	xmm1, DWORD PTR _x_s4_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L746
	ucomiss	xmm0, xmm1
	jne	.L746
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	je	.L748
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L748
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L749
.L748:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L746
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L746
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L749
.L746:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L749
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L749
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L749
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L749
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L749
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L749:
	movss	xmm0, DWORD PTR s4_lambda[rip]
	movss	xmm1, DWORD PTR _x_s4_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L750
	ucomiss	xmm0, xmm1
	jne	.L750
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L750
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L750
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L753
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L754
.L753:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L750
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L754
.L750:
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L754
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L754
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L754
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L754
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L754:
	movss	xmm1, DWORD PTR s4_lambda[rip]
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, xmm1
	jb	.L755
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L755
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L755
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L755
	movss	xmm1, DWORD PTR _x_s4_backoff[rip]
	movss	xmm0, DWORD PTR s4_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L757
.L755:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L757
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L757
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L757
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L757
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L757
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L757
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L757:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L758
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L758
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L758
	movss	xmm0, DWORD PTR s4_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s4_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L759
.L758:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L759
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L759
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L759
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L759
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L759
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L759:
	movss	xmm0, DWORD PTR s4_lambda[rip]
	movss	xmm1, DWORD PTR _x_s4_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L760
	ucomiss	xmm0, xmm1
	jne	.L760
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L762
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L763
.L762:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L760
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L760
.L763:
	movss	xmm0, DWORD PTR s4_backoff[rip]
	movss	xmm1, DWORD PTR _x_s4_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L760
	ucomiss	xmm0, xmm1
	jne	.L760
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L760
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L765
.L760:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L765
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L765
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L765
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L765
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L765:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L767
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L767
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L768
.L767:
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L768
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L768
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L768
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L768
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L768:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	je	.L769
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L769
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L769
	movss	xmm1, DWORD PTR s4_backoff[rip]
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, xmm1
	jnb	.L770
.L769:
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L770
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L770
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L770
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L770
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L770
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L192
.L770:
	movzx	eax, BYTE PTR _x_s3_evt2[rip]
	test	al, al
	jne	.L771
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L771
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L772
.L771:
	movzx	eax, BYTE PTR _x_s3_evt2[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	jne	.L773
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L772
.L773:
	movzx	eax, BYTE PTR _x_s3_evt2[rip]
	test	al, al
	je	.L774
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	jne	.L774
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L772
.L774:
	movzx	eax, BYTE PTR _x_s3_evt2[rip]
	test	al, al
	jne	.L775
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L775
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L772
.L775:
	movzx	eax, BYTE PTR _x_s3_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	jne	.L192
.L772:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L776
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L777
.L776:
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L778
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L777
.L778:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L192
.L777:
	movss	xmm0, DWORD PTR _x_s3_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s3_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	movss	xmm0, DWORD PTR _x_s3_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L780
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L780
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L192
.L780:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L781
	movss	xmm0, DWORD PTR s3_lambda[rip]
	movss	xmm1, DWORD PTR _x_s3_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L781
	ucomiss	xmm0, xmm1
	jne	.L781
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L781
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L781
	movss	xmm0, DWORD PTR s3_backoff[rip]
	movss	xmm1, DWORD PTR _x_s3_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L781
	ucomiss	xmm0, xmm1
	je	.L784
.L781:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L784
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L784
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L192
.L784:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L787
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L788
.L787:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L789
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L788
.L789:
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L790
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L790
.L788:
	movss	xmm0, DWORD PTR s3_backoff[rip]
	movss	xmm1, DWORD PTR _x_s3_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L790
	ucomiss	xmm0, xmm1
	jne	.L790
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L790
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L792
.L790:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L792
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L792
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L792
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L792
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L792:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L794
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L794
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L794
	movss	xmm0, DWORD PTR s3_lambda[rip]
	movss	xmm1, DWORD PTR _x_s3_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L794
	ucomiss	xmm0, xmm1
	je	.L795
.L794:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L795
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L795
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L795
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L795
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L795:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	je	.L797
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L797
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L798
.L797:
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L798
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L798
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L798
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L798
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L798
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L798:
	movss	xmm0, DWORD PTR s3_lambda[rip]
	movss	xmm1, DWORD PTR _x_s3_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L799
	ucomiss	xmm0, xmm1
	jne	.L799
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L802
.L801:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L799
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L799
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L802
.L799:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L802
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L802
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L802
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L802
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L802
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L802
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L802:
	movss	xmm0, DWORD PTR s3_lambda[rip]
	movss	xmm1, DWORD PTR _x_s3_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L803
	ucomiss	xmm0, xmm1
	jne	.L803
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L803
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L803
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L806
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L807
.L806:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L803
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L807
.L803:
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L807
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L807
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L807
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L807
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L807:
	movss	xmm1, DWORD PTR s3_lambda[rip]
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, xmm1
	jb	.L808
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L808
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L808
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L808
	movss	xmm1, DWORD PTR _x_s3_backoff[rip]
	movss	xmm0, DWORD PTR s3_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L810
.L808:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L810
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L810
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L810
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L810
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L810
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L810:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L811
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L811
	movss	xmm0, DWORD PTR s3_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s3_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L812
.L811:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L812
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L812
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L812
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L812
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L812
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L812:
	movss	xmm0, DWORD PTR s3_lambda[rip]
	movss	xmm1, DWORD PTR _x_s3_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L813
	ucomiss	xmm0, xmm1
	jne	.L813
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L815
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L816
.L815:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L813
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L813
.L816:
	movss	xmm0, DWORD PTR s3_backoff[rip]
	movss	xmm1, DWORD PTR _x_s3_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L813
	ucomiss	xmm0, xmm1
	jne	.L813
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L813
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L818
.L813:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L818
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L818
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L818
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L818:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L820
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L820
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L821
.L820:
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L821
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L821
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L821
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L821
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L821
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L821
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L821:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	je	.L822
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L822
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L822
	movss	xmm1, DWORD PTR s3_backoff[rip]
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, xmm1
	jnb	.L823
.L822:
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L823
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L823
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L823
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L823
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L823
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L823
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L192
.L823:
	movzx	eax, BYTE PTR _x_s2_evt2[rip]
	test	al, al
	jne	.L824
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L824
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L825
.L824:
	movzx	eax, BYTE PTR _x_s2_evt2[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	jne	.L826
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L825
.L826:
	movzx	eax, BYTE PTR _x_s2_evt2[rip]
	test	al, al
	je	.L827
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	jne	.L827
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L825
.L827:
	movzx	eax, BYTE PTR _x_s2_evt2[rip]
	test	al, al
	jne	.L828
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L828
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L825
.L828:
	movzx	eax, BYTE PTR _x_s2_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	jne	.L192
.L825:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L829
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L830
.L829:
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L831
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L830
.L831:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L192
.L830:
	movss	xmm0, DWORD PTR _x_s2_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s2_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	movss	xmm0, DWORD PTR _x_s2_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L833
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L833
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L192
.L833:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L834
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L834
	movss	xmm0, DWORD PTR s2_lambda[rip]
	movss	xmm1, DWORD PTR _x_s2_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L834
	ucomiss	xmm0, xmm1
	jne	.L834
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L834
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L834
	movss	xmm0, DWORD PTR s2_backoff[rip]
	movss	xmm1, DWORD PTR _x_s2_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L834
	ucomiss	xmm0, xmm1
	je	.L837
.L834:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L837
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L837
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L192
.L837:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L840
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L841
.L840:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L842
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L841
.L842:
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L843
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L843
.L841:
	movss	xmm0, DWORD PTR s2_backoff[rip]
	movss	xmm1, DWORD PTR _x_s2_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L843
	ucomiss	xmm0, xmm1
	jne	.L843
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L843
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L845
.L843:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L845
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L845
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L845
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L845
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L845:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L847
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L847
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L847
	movss	xmm0, DWORD PTR s2_lambda[rip]
	movss	xmm1, DWORD PTR _x_s2_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L847
	ucomiss	xmm0, xmm1
	je	.L848
.L847:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L848
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L848
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L848
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L848
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L848:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	je	.L850
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L850
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L851
.L850:
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L851
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L851
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L851
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L851
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L851
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L851
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L851:
	movss	xmm0, DWORD PTR s2_lambda[rip]
	movss	xmm1, DWORD PTR _x_s2_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L852
	ucomiss	xmm0, xmm1
	jne	.L852
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	je	.L854
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L854
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L855
.L854:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L852
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L852
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L855
.L852:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L855
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L855
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L855
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L855
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L855
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L855
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L855:
	movss	xmm0, DWORD PTR s2_lambda[rip]
	movss	xmm1, DWORD PTR _x_s2_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L856
	ucomiss	xmm0, xmm1
	jne	.L856
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L856
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L856
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L859
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L860
.L859:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L856
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L860
.L856:
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L860
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L860
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L860
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L860
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L860:
	movss	xmm1, DWORD PTR s2_lambda[rip]
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, xmm1
	jb	.L861
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L861
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L861
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L861
	movss	xmm1, DWORD PTR _x_s2_backoff[rip]
	movss	xmm0, DWORD PTR s2_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L863
.L861:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L863
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L863
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L863
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L863
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L863
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L863
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L863:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L864
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L864
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L864
	movss	xmm0, DWORD PTR s2_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s2_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L865
.L864:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L865
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L865
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L865
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L865
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L865
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L865:
	movss	xmm0, DWORD PTR s2_lambda[rip]
	movss	xmm1, DWORD PTR _x_s2_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L866
	ucomiss	xmm0, xmm1
	jne	.L866
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L868
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L869
.L868:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L866
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L866
.L869:
	movss	xmm0, DWORD PTR s2_backoff[rip]
	movss	xmm1, DWORD PTR _x_s2_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L866
	ucomiss	xmm0, xmm1
	jne	.L866
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L866
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L871
.L866:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L871
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L871
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L871
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L871
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L871:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L873
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L873
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L874
.L873:
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L874
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L874
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L874
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L874
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L874
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L874
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L874:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	je	.L875
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L875
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L875
	movss	xmm1, DWORD PTR s2_backoff[rip]
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, xmm1
	jnb	.L876
.L875:
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L876
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L876
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L876
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L876
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L876
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L192
.L876:
	movzx	eax, BYTE PTR _x_s1_evt2[rip]
	test	al, al
	jne	.L877
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L877
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L878
.L877:
	movzx	eax, BYTE PTR _x_s1_evt2[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	jne	.L879
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L878
.L879:
	movzx	eax, BYTE PTR _x_s1_evt2[rip]
	test	al, al
	je	.L880
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	jne	.L880
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L878
.L880:
	movzx	eax, BYTE PTR _x_s1_evt2[rip]
	test	al, al
	jne	.L881
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L881
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L878
.L881:
	movzx	eax, BYTE PTR _x_s1_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	jne	.L192
.L878:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L882
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L883
.L882:
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L884
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L883
.L884:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L192
.L883:
	movss	xmm0, DWORD PTR _x_s1_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s1_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	movss	xmm0, DWORD PTR _x_s1_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L886
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L886
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L192
.L886:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L887
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L887
	movss	xmm0, DWORD PTR s1_lambda[rip]
	movss	xmm1, DWORD PTR _x_s1_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L887
	ucomiss	xmm0, xmm1
	jne	.L887
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L887
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L887
	movss	xmm0, DWORD PTR s1_backoff[rip]
	movss	xmm1, DWORD PTR _x_s1_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L887
	ucomiss	xmm0, xmm1
	je	.L890
.L887:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L890
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L192
.L890:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L893
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L894
.L893:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L895
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L894
.L895:
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L896
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L896
.L894:
	movss	xmm0, DWORD PTR s1_backoff[rip]
	movss	xmm1, DWORD PTR _x_s1_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L896
	ucomiss	xmm0, xmm1
	jne	.L896
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L896
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L898
.L896:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L898
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L898
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L898
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L898
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L898:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L900
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L900
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L900
	movss	xmm0, DWORD PTR s1_lambda[rip]
	movss	xmm1, DWORD PTR _x_s1_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L900
	ucomiss	xmm0, xmm1
	je	.L901
.L900:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L901
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L901
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L901
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L901
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L901:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	je	.L903
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L903
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L904
.L903:
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L904
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L904
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L904
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L904
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L904
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L904:
	movss	xmm0, DWORD PTR s1_lambda[rip]
	movss	xmm1, DWORD PTR _x_s1_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L905
	ucomiss	xmm0, xmm1
	jne	.L905
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L907
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L908
.L907:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L905
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L905
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L908
.L905:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L908
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L908
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L908
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L908
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L908
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L908
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L908:
	movss	xmm0, DWORD PTR s1_lambda[rip]
	movss	xmm1, DWORD PTR _x_s1_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L909
	ucomiss	xmm0, xmm1
	jne	.L909
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L909
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L909
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L912
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L913
.L912:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L909
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L913
.L909:
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L913
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L913
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L913
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L913
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L913:
	movss	xmm1, DWORD PTR s1_lambda[rip]
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, xmm1
	jb	.L914
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L914
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L914
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L914
	movss	xmm1, DWORD PTR _x_s1_backoff[rip]
	movss	xmm0, DWORD PTR s1_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L916
.L914:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L916
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L916
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L916
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L916
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L916
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L916
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L916:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L917
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L917
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L917
	movss	xmm0, DWORD PTR s1_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s1_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L918
.L917:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L918
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L918
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L918
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L918
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L918
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L918
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L918:
	movss	xmm0, DWORD PTR s1_lambda[rip]
	movss	xmm1, DWORD PTR _x_s1_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L919
	ucomiss	xmm0, xmm1
	jne	.L919
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L921
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L922
.L921:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L919
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L919
.L922:
	movss	xmm0, DWORD PTR s1_backoff[rip]
	movss	xmm1, DWORD PTR _x_s1_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L919
	ucomiss	xmm0, xmm1
	jne	.L919
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L919
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L924
.L919:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L924
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L924
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L924
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L924
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L924:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L926
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L926
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L927
.L926:
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L927
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L927
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L927
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L927
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L927
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L927:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	je	.L928
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L928
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L928
	movss	xmm1, DWORD PTR s1_backoff[rip]
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, xmm1
	jnb	.L929
.L928:
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L929
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L929
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L929
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L929
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L929
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L929
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L192
.L929:
	movzx	eax, BYTE PTR _x_s0_evt2[rip]
	test	al, al
	jne	.L930
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L930
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L931
.L930:
	movzx	eax, BYTE PTR _x_s0_evt2[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	jne	.L932
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L931
.L932:
	movzx	eax, BYTE PTR _x_s0_evt2[rip]
	test	al, al
	je	.L933
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	jne	.L933
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L931
.L933:
	movzx	eax, BYTE PTR _x_s0_evt2[rip]
	test	al, al
	jne	.L934
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L934
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L931
.L934:
	movzx	eax, BYTE PTR _x_s0_evt2[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	jne	.L192
.L931:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L935
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L936
.L935:
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L937
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L936
.L937:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L192
.L936:
	movss	xmm0, DWORD PTR _x_s0_backoff[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L192
	movss	xmm1, DWORD PTR _x_s0_lambda[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	movss	xmm0, DWORD PTR _x_s0_lambda[rip]
	comiss	xmm0, xmm1
	jnb	.L939
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L939
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L192
.L939:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L940
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L940
	movss	xmm0, DWORD PTR s0_lambda[rip]
	movss	xmm1, DWORD PTR _x_s0_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L940
	ucomiss	xmm0, xmm1
	jne	.L940
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L940
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L940
	movss	xmm0, DWORD PTR s0_backoff[rip]
	movss	xmm1, DWORD PTR _x_s0_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L940
	ucomiss	xmm0, xmm1
	je	.L943
.L940:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L943
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L192
.L943:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L946
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L947
.L946:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L948
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L947
.L948:
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L949
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L949
.L947:
	movss	xmm0, DWORD PTR s0_backoff[rip]
	movss	xmm1, DWORD PTR _x_s0_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L949
	ucomiss	xmm0, xmm1
	jne	.L949
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L949
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L951
.L949:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L951
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L951
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L951
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L951
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L951:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L953
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L953
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L953
	movss	xmm0, DWORD PTR s0_lambda[rip]
	movss	xmm1, DWORD PTR _x_s0_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L953
	ucomiss	xmm0, xmm1
	je	.L954
.L953:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L954
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L954
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L954
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L954
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L954:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	je	.L956
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L956
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L957
.L956:
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L957
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L957
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L957
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L957
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L957
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L957
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L957:
	movss	xmm0, DWORD PTR s0_lambda[rip]
	movss	xmm1, DWORD PTR _x_s0_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L958
	ucomiss	xmm0, xmm1
	jne	.L958
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	je	.L960
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L960
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L961
.L960:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L958
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L958
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L961
.L958:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L961
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L961
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L961
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L961
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L961
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L961
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L961:
	movss	xmm0, DWORD PTR s0_lambda[rip]
	movss	xmm1, DWORD PTR _x_s0_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L962
	ucomiss	xmm0, xmm1
	jne	.L962
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L962
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L962
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L965
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L966
.L965:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L962
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L966
.L962:
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L966
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L966
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L966
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L966
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L966:
	movss	xmm1, DWORD PTR s0_lambda[rip]
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, xmm1
	jb	.L967
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L967
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L967
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L967
	movss	xmm1, DWORD PTR _x_s0_backoff[rip]
	movss	xmm0, DWORD PTR s0_backoff[rip]
	comiss	xmm0, xmm1
	jnb	.L969
.L967:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L969
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L969
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L969
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L969
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L969
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L969:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L970
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L970
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L970
	movss	xmm0, DWORD PTR s0_backoff[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm1, DWORD PTR _x_s0_backoff[rip]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jnb	.L971
.L970:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L971
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L971
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L971
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L971
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L971
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L971
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L971:
	movss	xmm0, DWORD PTR s0_lambda[rip]
	movss	xmm1, DWORD PTR _x_s0_lambda[rip]
	ucomiss	xmm0, xmm1
	jp	.L972
	ucomiss	xmm0, xmm1
	jne	.L972
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L974
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L975
.L974:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L972
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L972
.L975:
	movss	xmm0, DWORD PTR s0_backoff[rip]
	movss	xmm1, DWORD PTR _x_s0_backoff[rip]
	ucomiss	xmm0, xmm1
	jp	.L972
	ucomiss	xmm0, xmm1
	jne	.L972
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L972
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L977
.L972:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L977
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L977
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L977
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L977
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L977:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L979
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L979
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L980
.L979:
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L980
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L980
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L980
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L980
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L980
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L980:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	je	.L981
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L981
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L981
	movss	xmm1, DWORD PTR s0_backoff[rip]
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, xmm1
	jnb	.L982
.L981:
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L982
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L982
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L982
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L982
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L982
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L982
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L192
.L982:
	movzx	eax, BYTE PTR _x_bus_evt2[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_bus_evt0[rip]
	test	al, al
	jne	.L983
	movzx	eax, BYTE PTR _x_bus_evt1[rip]
	test	al, al
	je	.L984
.L983:
	movzx	eax, BYTE PTR _x_bus_evt2[rip]
	test	al, al
	je	.L985
	movzx	eax, BYTE PTR _x_bus_evt0[rip]
	test	al, al
	jne	.L985
	movzx	eax, BYTE PTR _x_bus_evt1[rip]
	test	al, al
	je	.L984
.L985:
	movzx	eax, BYTE PTR _x_bus_evt2[rip]
	test	al, al
	jne	.L986
	movzx	eax, BYTE PTR _x_bus_evt1[rip]
	test	al, al
	je	.L986
	movzx	eax, BYTE PTR _x_bus_evt0[rip]
	test	al, al
	je	.L984
.L986:
	movzx	eax, BYTE PTR _x_bus_evt2[rip]
	test	al, al
	je	.L987
	movzx	eax, BYTE PTR _x_bus_evt1[rip]
	test	al, al
	je	.L987
	movzx	eax, BYTE PTR _x_bus_evt0[rip]
	test	al, al
	je	.L984
.L987:
	movzx	eax, BYTE PTR _x_bus_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR _x_bus_evt0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_bus_evt1[rip]
	test	al, al
	jne	.L192
.L984:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	jne	.L988
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L989
.L988:
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L990
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L989
.L990:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L991
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L989
.L991:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L192
.L989:
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L992
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L992
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L192
.L992:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1589
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L993
.L1589:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L993
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	jne	.L192
.L993:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L995
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR bus_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_bus_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L192
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L192
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L192
	mov	edx, DWORD PTR bus_j[rip]
	mov	eax, DWORD PTR _x_bus_j[rip]
	cmp	edx, eax
	jne	.L192
.L995:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR bus_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_bus_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L997
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L997
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L997
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L997
	mov	edx, DWORD PTR bus_j[rip]
	mov	eax, DWORD PTR _x_bus_j[rip]
	cmp	edx, eax
	je	.L999
.L997:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L999
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L192
.L999:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	je	.L1000
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1000
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L1000
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	jne	.L1000
	mov	edx, DWORD PTR bus_j[rip]
	mov	eax, DWORD PTR _x_bus_j[rip]
	cmp	edx, eax
	jne	.L1000
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1000
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1001
.L1000:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	jne	.L1001
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	jne	.L1001
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1001
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1001
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L192
.L1001:
	mov	edx, DWORD PTR bus_j[rip]
	mov	eax, DWORD PTR _x_bus_j[rip]
	cmp	edx, eax
	jne	.L1003
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L1004
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L1005
.L1004:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	jne	.L1006
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L1005
.L1006:
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L1003
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L1005
.L1003:
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L1005
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	jne	.L1005
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1005
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1005
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L192
.L1005:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1007
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1007
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1007
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1007
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1008
.L1007:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1008
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1008
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1010
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1008
.L1010:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	jne	.L1008
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L1008
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L192
.L1008:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	je	.L1011
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1011
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1011
	movss	xmm0, DWORD PTR bus_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L1011
	movss	xmm0, DWORD PTR bus_x[rip]
	movss	xmm1, DWORD PTR _x_bus_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L1011
	ucomiss	xmm0, xmm1
	je	.L1013
.L1011:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1013
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1013
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1015
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1015
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1013
.L1015:
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	jne	.L1013
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L1013
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L192
.L1013:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	je	.L1016
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1016
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1016
	movss	xmm0, DWORD PTR bus_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1016
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1016
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L1017
.L1016:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1017
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1017
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1019
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1019
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1017
.L1019:
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L1017
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	jne	.L1017
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L1017
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L192
.L1017:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L1020
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	je	.L1020
	movss	xmm0, DWORD PTR bus_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1020
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1020
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1020
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1020
	mov	edx, DWORD PTR bus_cd_id[rip]
	mov	eax, DWORD PTR bus_j[rip]
	cmp	edx, eax
	jne	.L1020
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1020
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1020
	mov	eax, DWORD PTR bus_j[rip]
	mov	edx, DWORD PTR _x_bus_j[rip]
	sub	eax, edx
	cmp	eax, -1
	je	.L1022
.L1020:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L1022
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	jne	.L1022
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1022
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1022
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L192
.L1022:
	mov	eax, DWORD PTR bus_j[rip]
	mov	edx, DWORD PTR _x_bus_j[rip]
	sub	eax, edx
	cmp	eax, -1
	jne	.L1023
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1023
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1023
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1023
	mov	edx, DWORD PTR bus_cd_id[rip]
	mov	eax, DWORD PTR bus_j[rip]
	cmp	edx, eax
	jne	.L1023
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1023
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1023
	mov	eax, DWORD PTR bus_j[rip]
	cmp	eax, 13
	jle	.L1025
.L1023:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1025
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1025
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1026
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1026
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1025
.L1026:
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	je	.L1025
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	jne	.L192
.L1025:
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1027
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1027
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1027
	mov	eax, DWORD PTR bus_j[rip]
	cmp	eax, 14
	jne	.L1027
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1027
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L1027
	mov	edx, DWORD PTR bus_cd_id[rip]
	mov	eax, DWORD PTR bus_j[rip]
	cmp	edx, eax
	jne	.L1027
	mov	eax, DWORD PTR _x_bus_j[rip]
	test	eax, eax
	je	.L1029
.L1027:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1029
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1029
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1030
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1030
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1029
.L1030:
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	test	al, al
	jne	.L1029
	movzx	eax, BYTE PTR bus_l0[rip]
	test	al, al
	je	.L1029
	movzx	eax, BYTE PTR bus_l1[rip]
	test	al, al
	jne	.L192
.L1029:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L192
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1032
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1032
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1033
.L1032:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1034
.L1033:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1035
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1035
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1036
.L1035:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L1034
.L1036:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1037
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1037
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1038
.L1037:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L1034
.L1038:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1039
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1039
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1040
.L1039:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L1034
.L1040:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1041
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1042
.L1041:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1034
.L1042:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1043
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1044
.L1043:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1034
.L1044:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1045
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1046
.L1045:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1034
.L1046:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1047
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1047
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1048
.L1047:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1048:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1049
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1049
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1050
.L1049:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1050:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1051
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1052
.L1051:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1052:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1053
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1053
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1054
.L1053:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1054:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1055
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1056
.L1055:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1056:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1057
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1057
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1058
.L1057:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1058:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1059
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1059
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1060
.L1059:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1060:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1061
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1061
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1062
.L1061:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L1034
.L1062:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1063
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1063
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1064
.L1063:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L1034
.L1064:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1065
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1065
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1066
.L1065:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L1034
.L1066:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1067
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1068
.L1067:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1034
.L1068:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1069
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1070
.L1069:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1034
.L1070:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1071
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1072
.L1071:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1034
.L1072:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1073
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1073
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1074
.L1073:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1074:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1075
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1075
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1076
.L1075:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1076:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1077
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1077
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1078
.L1077:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1078:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1079
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1080
.L1079:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1080:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1081
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1082
.L1081:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1082:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1083
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1083
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1084
.L1083:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1084:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1085
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1086
.L1085:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1086:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1087
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1087
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1088
.L1087:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L1034
.L1088:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1089
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1090
.L1089:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L1034
.L1090:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1091
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1092
.L1091:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1034
.L1092:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1093
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1093
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1094
.L1093:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1034
.L1094:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1095
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1095
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1096
.L1095:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1034
.L1096:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1097
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1097
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1098
.L1097:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1098:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1099
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1100
.L1099:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1100:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1101
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1101
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1102
.L1101:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1102:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1103
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1104
.L1103:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1104:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1105
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1106
.L1105:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1106:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1107
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1107
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1108
.L1107:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1108:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1109
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1109
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1110
.L1109:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1110:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1111
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1111
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1112
.L1111:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L1034
.L1112:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1113
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1113
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1114
.L1113:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1034
.L1114:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1115
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1115
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1116
.L1115:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1034
.L1116:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1117
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1117
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1118
.L1117:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1034
.L1118:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1119
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1119
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1120
.L1119:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1120:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1121
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1121
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1122
.L1121:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1122:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1123
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1123
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1124
.L1123:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1124:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1125
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1125
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1126
.L1125:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1126:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1127
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1127
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1128
.L1127:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1128:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1129
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1129
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1130
.L1129:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1130:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1131
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1131
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1132
.L1131:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1132:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1133
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1133
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1134
.L1133:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1034
.L1134:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1135
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1135
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1136
.L1135:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1034
.L1136:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1137
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1138
.L1137:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1034
.L1138:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1139
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1140
.L1139:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1140:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1141
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1141
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1142
.L1141:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1142:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1143
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1143
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1144
.L1143:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1144:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1145
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1145
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1146
.L1145:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1146:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1147
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1148
.L1147:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1148:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1149
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1149
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1150
.L1149:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1150:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1151
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1151
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1152
.L1151:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1152:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1153
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1153
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1154
.L1153:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1034
.L1154:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1155
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1155
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1156
.L1155:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1034
.L1156:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1157
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1158
.L1157:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1158:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1159
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1159
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1160
.L1159:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1160:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1161
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1162
.L1161:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1162:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1163
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1163
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1164
.L1163:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1164:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1165
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1165
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1166
.L1165:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1166:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1167
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1168
.L1167:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1168:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1169
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1170
.L1169:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1170:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1171
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1171
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1172
.L1171:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1034
.L1172:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1173
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1174
.L1173:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1174:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1175
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1175
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1176
.L1175:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1176:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1177
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1177
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1178
.L1177:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1178:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1179
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1179
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1180
.L1179:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1180:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1181
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1181
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1182
.L1181:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1182:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1183
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1184
.L1183:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1184:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1185
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1185
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1186
.L1185:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1186:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1187
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1187
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1188
.L1187:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1034
.L1188:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1189
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1189
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1190
.L1189:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1190:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1191
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1191
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1192
.L1191:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1192:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1193
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1193
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1194
.L1193:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1194:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1195
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1195
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1196
.L1195:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1196:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1197
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1197
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1198
.L1197:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1198:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1199
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1199
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1200
.L1199:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1200:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1201
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1201
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1202
.L1201:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1034
.L1202:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1203
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1203
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1204
.L1203:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1204:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1205
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1205
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1206
.L1205:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1206:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1207
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1207
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1208
.L1207:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1208:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1209
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1209
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1210
.L1209:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1210:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1211
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1211
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1212
.L1211:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1212:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1213
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1213
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1214
.L1213:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1034
.L1214:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1215
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1216
.L1215:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1216:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1217
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1217
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1218
.L1217:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1218:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1219
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1219
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1220
.L1219:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1220:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1221
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1221
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1222
.L1221:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1222:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1223
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1223
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1224
.L1223:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1034
.L1224:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1225
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1225
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1226
.L1225:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1226:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1227
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1227
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1228
.L1227:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1228:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1229
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1229
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1230
.L1229:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1230:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1231
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1231
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1232
.L1231:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1034
.L1232:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1233
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1233
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1234
.L1233:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1234:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1235
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1235
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1236
.L1235:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1236:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1237
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1237
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1238
.L1237:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1034
.L1238:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1239
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1239
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1240
.L1239:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1034
.L1240:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1241
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1241
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L1242
.L1241:
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1034
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L1242
.L1034:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1242
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L192
.L1242:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1244
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1244
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1244
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L192
.L1244:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1245
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1245
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	je	.L1246
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1246
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1246
	mov	eax, 1
	jmp	.L1247
.L1246:
	mov	eax, 0
.L1247:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	je	.L1248
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	jne	.L1248
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L1249
.L1248:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	je	.L1250
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	jne	.L1250
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L1249
.L1250:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	je	.L1251
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	jne	.L1251
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1249
.L1251:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	je	.L1252
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	jne	.L1252
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1249
.L1252:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	je	.L1253
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	jne	.L1253
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1249
.L1253:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	je	.L1254
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	jne	.L1254
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1249
.L1254:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	je	.L1255
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	jne	.L1255
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1249
.L1255:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	je	.L1256
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L1256
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1249
.L1256:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	je	.L1257
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L1257
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1249
.L1257:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	je	.L1258
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L1258
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1249
.L1258:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	je	.L1259
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L1259
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1249
.L1259:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	je	.L1260
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L1260
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1249
.L1260:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	je	.L1261
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L1261
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1249
.L1261:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	je	.L1262
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L1262
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1249
.L1262:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	je	.L1263
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1263
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1263
.L1249:
	mov	eax, 1
	jmp	.L1264
.L1263:
	mov	eax, 0
.L1264:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1265
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1265
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1265
	mov	eax, 1
	jmp	.L1266
.L1265:
	mov	eax, 0
.L1266:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1267
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L1267
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L1268
.L1267:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1269
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L1269
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L1268
.L1269:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1270
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1270
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L1268
.L1270:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1271
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1271
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L1268
.L1271:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1272
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1272
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L1268
.L1272:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1273
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1273
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L1268
.L1273:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1274
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1274
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L1268
.L1274:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1275
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1275
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L1268
.L1275:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1276
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1276
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L1268
.L1276:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1277
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1277
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L1268
.L1277:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1278
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1278
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L1268
.L1278:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1279
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1279
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L1268
.L1279:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1280
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1280
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L1268
.L1280:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1281
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1281
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1268
.L1281:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1282
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1282
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1282
.L1268:
	mov	eax, 1
	jmp	.L1283
.L1282:
	mov	eax, 0
.L1283:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	je	.L1284
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	je	.L1284
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	jne	.L1284
	mov	eax, 1
	jmp	.L1285
.L1284:
	mov	eax, 0
.L1285:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	je	.L1286
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L1286
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L1287
.L1286:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	je	.L1288
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L1288
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L1287
.L1288:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	je	.L1289
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1289
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L1287
.L1289:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	je	.L1290
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1290
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L1287
.L1290:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	je	.L1291
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1291
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L1287
.L1291:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	je	.L1292
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1292
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L1287
.L1292:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	je	.L1293
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1293
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L1287
.L1293:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	je	.L1294
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1294
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L1287
.L1294:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	je	.L1295
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1295
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L1287
.L1295:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	je	.L1296
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1296
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L1287
.L1296:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	je	.L1297
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1297
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L1287
.L1297:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	je	.L1298
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1298
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L1287
.L1298:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	je	.L1299
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1299
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L1287
.L1299:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	je	.L1300
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1300
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1287
.L1300:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	je	.L1301
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L1301
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L1301
.L1287:
	mov	eax, 1
	jmp	.L1302
.L1301:
	mov	eax, 0
.L1302:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1303
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1303
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1303
	mov	eax, 1
	jmp	.L1304
.L1303:
	mov	eax, 0
.L1304:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1305
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L1305
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	je	.L1306
.L1305:
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1307
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L1307
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	je	.L1306
.L1307:
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1308
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L1308
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	je	.L1306
.L1308:
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1309
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L1309
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	je	.L1306
.L1309:
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1310
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L1310
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	je	.L1306
.L1310:
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1311
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L1311
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	je	.L1306
.L1311:
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1312
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L1312
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	je	.L1306
.L1312:
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1313
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L1313
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L1306
.L1313:
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1314
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L1314
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L1306
.L1314:
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1315
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L1315
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L1306
.L1315:
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1316
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L1316
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L1306
.L1316:
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1317
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L1317
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L1306
.L1317:
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1318
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L1318
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L1306
.L1318:
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1319
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1319
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L1306
.L1319:
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1320
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L1320
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1320
.L1306:
	mov	eax, 1
	jmp	.L1321
.L1320:
	mov	eax, 0
.L1321:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
.L1245:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L1322
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L1322
	movzx	eax, BYTE PTR s0_evt2[rip]
	test	al, al
	jne	.L1323
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L1323
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L1323
	mov	eax, 1
	jmp	.L1324
.L1323:
	mov	eax, 0
.L1324:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1325
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1325
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1325
	mov	eax, DWORD PTR bus_cd_id[rip]
	test	eax, eax
	jne	.L1325
	mov	eax, 1
	jmp	.L1326
.L1325:
	mov	eax, 0
.L1326:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s1_evt2[rip]
	test	al, al
	jne	.L1327
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L1327
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L1327
	mov	eax, 1
	jmp	.L1328
.L1327:
	mov	eax, 0
.L1328:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1329
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1329
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1329
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 1
	jne	.L1329
	mov	eax, 1
	jmp	.L1330
.L1329:
	mov	eax, 0
.L1330:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s2_evt2[rip]
	test	al, al
	jne	.L1331
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L1331
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L1331
	mov	eax, 1
	jmp	.L1332
.L1331:
	mov	eax, 0
.L1332:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1333
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1333
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1333
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 2
	jne	.L1333
	mov	eax, 1
	jmp	.L1334
.L1333:
	mov	eax, 0
.L1334:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s3_evt2[rip]
	test	al, al
	jne	.L1335
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L1335
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L1335
	mov	eax, 1
	jmp	.L1336
.L1335:
	mov	eax, 0
.L1336:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1337
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1337
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1337
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 3
	jne	.L1337
	mov	eax, 1
	jmp	.L1338
.L1337:
	mov	eax, 0
.L1338:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s4_evt2[rip]
	test	al, al
	jne	.L1339
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L1339
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L1339
	mov	eax, 1
	jmp	.L1340
.L1339:
	mov	eax, 0
.L1340:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1341
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1341
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1341
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 4
	jne	.L1341
	mov	eax, 1
	jmp	.L1342
.L1341:
	mov	eax, 0
.L1342:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s5_evt2[rip]
	test	al, al
	jne	.L1343
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L1343
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L1343
	mov	eax, 1
	jmp	.L1344
.L1343:
	mov	eax, 0
.L1344:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1345
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1345
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1345
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 5
	jne	.L1345
	mov	eax, 1
	jmp	.L1346
.L1345:
	mov	eax, 0
.L1346:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s6_evt2[rip]
	test	al, al
	jne	.L1347
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L1347
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L1347
	mov	eax, 1
	jmp	.L1348
.L1347:
	mov	eax, 0
.L1348:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1349
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1349
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1349
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 6
	jne	.L1349
	mov	eax, 1
	jmp	.L1350
.L1349:
	mov	eax, 0
.L1350:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s7_evt2[rip]
	test	al, al
	jne	.L1351
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L1351
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L1351
	mov	eax, 1
	jmp	.L1352
.L1351:
	mov	eax, 0
.L1352:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1353
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1353
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1353
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 7
	jne	.L1353
	mov	eax, 1
	jmp	.L1354
.L1353:
	mov	eax, 0
.L1354:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s8_evt2[rip]
	test	al, al
	jne	.L1355
	movzx	eax, BYTE PTR s8_evt0[rip]
	test	al, al
	je	.L1355
	movzx	eax, BYTE PTR s8_evt1[rip]
	test	al, al
	jne	.L1355
	mov	eax, 1
	jmp	.L1356
.L1355:
	mov	eax, 0
.L1356:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1357
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1357
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1357
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 8
	jne	.L1357
	mov	eax, 1
	jmp	.L1358
.L1357:
	mov	eax, 0
.L1358:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s9_evt2[rip]
	test	al, al
	jne	.L1359
	movzx	eax, BYTE PTR s9_evt0[rip]
	test	al, al
	je	.L1359
	movzx	eax, BYTE PTR s9_evt1[rip]
	test	al, al
	jne	.L1359
	mov	eax, 1
	jmp	.L1360
.L1359:
	mov	eax, 0
.L1360:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1361
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1361
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1361
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 9
	jne	.L1361
	mov	eax, 1
	jmp	.L1362
.L1361:
	mov	eax, 0
.L1362:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s10_evt2[rip]
	test	al, al
	jne	.L1363
	movzx	eax, BYTE PTR s10_evt0[rip]
	test	al, al
	je	.L1363
	movzx	eax, BYTE PTR s10_evt1[rip]
	test	al, al
	jne	.L1363
	mov	eax, 1
	jmp	.L1364
.L1363:
	mov	eax, 0
.L1364:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1365
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1365
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1365
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 10
	jne	.L1365
	mov	eax, 1
	jmp	.L1366
.L1365:
	mov	eax, 0
.L1366:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s11_evt2[rip]
	test	al, al
	jne	.L1367
	movzx	eax, BYTE PTR s11_evt0[rip]
	test	al, al
	je	.L1367
	movzx	eax, BYTE PTR s11_evt1[rip]
	test	al, al
	jne	.L1367
	mov	eax, 1
	jmp	.L1368
.L1367:
	mov	eax, 0
.L1368:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1369
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1369
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1369
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 11
	jne	.L1369
	mov	eax, 1
	jmp	.L1370
.L1369:
	mov	eax, 0
.L1370:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s12_evt2[rip]
	test	al, al
	jne	.L1371
	movzx	eax, BYTE PTR s12_evt0[rip]
	test	al, al
	je	.L1371
	movzx	eax, BYTE PTR s12_evt1[rip]
	test	al, al
	jne	.L1371
	mov	eax, 1
	jmp	.L1372
.L1371:
	mov	eax, 0
.L1372:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1373
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1373
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1373
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 12
	jne	.L1373
	mov	eax, 1
	jmp	.L1374
.L1373:
	mov	eax, 0
.L1374:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s13_evt2[rip]
	test	al, al
	jne	.L1375
	movzx	eax, BYTE PTR s13_evt0[rip]
	test	al, al
	je	.L1375
	movzx	eax, BYTE PTR s13_evt1[rip]
	test	al, al
	jne	.L1375
	mov	eax, 1
	jmp	.L1376
.L1375:
	mov	eax, 0
.L1376:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1377
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1377
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1377
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 13
	jne	.L1377
	mov	eax, 1
	jmp	.L1378
.L1377:
	mov	eax, 0
.L1378:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
	movzx	eax, BYTE PTR s14_evt2[rip]
	test	al, al
	jne	.L1379
	movzx	eax, BYTE PTR s14_evt0[rip]
	test	al, al
	je	.L1379
	movzx	eax, BYTE PTR s14_evt1[rip]
	test	al, al
	jne	.L1379
	mov	eax, 1
	jmp	.L1380
.L1379:
	mov	eax, 0
.L1380:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR bus_evt2[rip]
	test	al, al
	jne	.L1381
	movzx	eax, BYTE PTR bus_evt0[rip]
	test	al, al
	je	.L1381
	movzx	eax, BYTE PTR bus_evt1[rip]
	test	al, al
	jne	.L1381
	mov	eax, DWORD PTR bus_cd_id[rip]
	cmp	eax, 14
	jne	.L1381
	mov	eax, 1
	jmp	.L1382
.L1381:
	mov	eax, 0
.L1382:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L192
.L1322:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L1597
	ucomiss	xmm0, xmm1
	je	.L1383
.L1597:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
.L1383:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L1385
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L192
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L192
.L1385:
	mov	eax, 1
	jmp	.L1387
.L192:
	mov	eax, 0
.L1387:
	mov	DWORD PTR -4[rbp], eax
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movzx	eax, BYTE PTR _x_s14_l1[rip]
	mov	BYTE PTR s14_l1[rip], al
	movzx	eax, BYTE PTR _x_s14_l0[rip]
	mov	BYTE PTR s14_l0[rip], al
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	mov	BYTE PTR s4_evt0[rip], al
	movzx	eax, BYTE PTR _x_s13_l1[rip]
	mov	BYTE PTR s13_l1[rip], al
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	movss	DWORD PTR s4_x[rip], xmm0
	movzx	eax, BYTE PTR _x_bus_evt2[rip]
	mov	BYTE PTR bus_evt2[rip], al
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	mov	BYTE PTR s3_evt0[rip], al
	movzx	eax, BYTE PTR _x_s12_l1[rip]
	mov	BYTE PTR s12_l1[rip], al
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	movss	DWORD PTR s3_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s5_evt2[rip]
	mov	BYTE PTR s5_evt2[rip], al
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	mov	BYTE PTR s5_evt1[rip], al
	movzx	eax, BYTE PTR _x_s2_evt2[rip]
	mov	BYTE PTR s2_evt2[rip], al
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	mov	BYTE PTR s3_l1[rip], al
	movss	xmm0, DWORD PTR _x_s6_backoff[rip]
	movss	DWORD PTR s6_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	mov	BYTE PTR s2_evt1[rip], al
	movss	xmm0, DWORD PTR _x_s14_x[rip]
	movss	DWORD PTR s14_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s0_lambda[rip]
	movss	DWORD PTR s0_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_bus_l0[rip]
	mov	BYTE PTR bus_l0[rip], al
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	movss	DWORD PTR s5_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s0_backoff[rip]
	movss	DWORD PTR s0_backoff[rip], xmm0
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	movss	DWORD PTR s0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s14_evt2[rip]
	mov	BYTE PTR s14_evt2[rip], al
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	mov	BYTE PTR s2_evt0[rip], al
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	mov	BYTE PTR s4_evt1[rip], al
	movzx	eax, BYTE PTR _x_bus_evt0[rip]
	mov	BYTE PTR bus_evt0[rip], al
	movzx	eax, BYTE PTR _x_bus_evt1[rip]
	mov	BYTE PTR bus_evt1[rip], al
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	mov	BYTE PTR s1_l0[rip], al
	movss	xmm0, DWORD PTR _x_s4_lambda[rip]
	movss	DWORD PTR s4_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	mov	BYTE PTR s0_evt0[rip], al
	mov	eax, DWORD PTR _x_bus_cd_id[rip]
	mov	DWORD PTR bus_cd_id[rip], eax
	movzx	eax, BYTE PTR _x_s6_evt2[rip]
	mov	BYTE PTR s6_evt2[rip], al
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	mov	BYTE PTR s1_l1[rip], al
	movss	xmm0, DWORD PTR _x_s4_backoff[rip]
	movss	DWORD PTR s4_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	mov	BYTE PTR s0_evt1[rip], al
	movss	xmm0, DWORD PTR _x_s12_x[rip]
	movss	DWORD PTR s12_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s12_l0[rip]
	mov	BYTE PTR s12_l0[rip], al
	mov	eax, DWORD PTR _x_bus_j[rip]
	mov	DWORD PTR bus_j[rip], eax
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	mov	BYTE PTR s5_evt0[rip], al
	movzx	eax, BYTE PTR _x_s0_evt2[rip]
	mov	BYTE PTR s0_evt2[rip], al
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	mov	BYTE PTR s4_l1[rip], al
	movss	xmm0, DWORD PTR _x_s7_backoff[rip]
	movss	DWORD PTR s7_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	mov	BYTE PTR s3_evt1[rip], al
	movss	xmm0, DWORD PTR _x_s3_lambda[rip]
	movss	DWORD PTR s3_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	mov	BYTE PTR s0_l0[rip], al
	movss	xmm0, DWORD PTR _x_s2_lambda[rip]
	movss	DWORD PTR s2_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s3_evt2[rip]
	mov	BYTE PTR s3_evt2[rip], al
	movss	xmm0, DWORD PTR _x_s3_backoff[rip]
	movss	DWORD PTR s3_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	mov	BYTE PTR s0_l1[rip], al
	movss	xmm0, DWORD PTR _x_s2_backoff[rip]
	movss	DWORD PTR s2_backoff[rip], xmm0
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	movss	DWORD PTR s1_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	movss	DWORD PTR s6_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s1_backoff[rip]
	movss	DWORD PTR s1_backoff[rip], xmm0
	movss	xmm0, DWORD PTR _x_s1_lambda[rip]
	movss	DWORD PTR s1_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	mov	BYTE PTR s2_l0[rip], al
	movss	xmm0, DWORD PTR _x_s5_lambda[rip]
	movss	DWORD PTR s5_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	mov	BYTE PTR s1_evt0[rip], al
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	mov	BYTE PTR s2_l1[rip], al
	movss	xmm0, DWORD PTR _x_s5_backoff[rip]
	movss	DWORD PTR s5_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	mov	BYTE PTR s1_evt1[rip], al
	movss	xmm0, DWORD PTR _x_s13_x[rip]
	movss	DWORD PTR s13_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s1_evt2[rip]
	mov	BYTE PTR s1_evt2[rip], al
	movzx	eax, BYTE PTR _x_s4_evt2[rip]
	mov	BYTE PTR s4_evt2[rip], al
	movzx	eax, BYTE PTR _x_bus_l1[rip]
	mov	BYTE PTR bus_l1[rip], al
	movzx	eax, BYTE PTR _x_s9_evt0[rip]
	mov	BYTE PTR s9_evt0[rip], al
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	movss	DWORD PTR s2_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	mov	BYTE PTR s3_l0[rip], al
	movss	xmm0, DWORD PTR _x_s6_lambda[rip]
	movss	DWORD PTR s6_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	mov	BYTE PTR s6_evt0[rip], al
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	mov	BYTE PTR s6_evt1[rip], al
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	movss	DWORD PTR s7_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	mov	BYTE PTR s4_l0[rip], al
	movss	xmm0, DWORD PTR _x_s7_lambda[rip]
	movss	DWORD PTR s7_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	mov	BYTE PTR s7_evt0[rip], al
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	mov	BYTE PTR s7_evt1[rip], al
	movzx	eax, BYTE PTR _x_s7_evt2[rip]
	mov	BYTE PTR s7_evt2[rip], al
	movss	xmm0, DWORD PTR _x_s8_x[rip]
	movss	DWORD PTR s8_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	mov	BYTE PTR s5_l1[rip], al
	movss	xmm0, DWORD PTR _x_s8_backoff[rip]
	movss	DWORD PTR s8_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	mov	BYTE PTR s5_l0[rip], al
	movss	xmm0, DWORD PTR _x_s8_lambda[rip]
	movss	DWORD PTR s8_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s8_evt0[rip]
	mov	BYTE PTR s8_evt0[rip], al
	movzx	eax, BYTE PTR _x_s8_evt1[rip]
	mov	BYTE PTR s8_evt1[rip], al
	movzx	eax, BYTE PTR _x_s8_evt2[rip]
	mov	BYTE PTR s8_evt2[rip], al
	movss	xmm0, DWORD PTR _x_s9_x[rip]
	movss	DWORD PTR s9_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	mov	BYTE PTR s6_l1[rip], al
	movss	xmm0, DWORD PTR _x_s9_backoff[rip]
	movss	DWORD PTR s9_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	mov	BYTE PTR s6_l0[rip], al
	movss	xmm0, DWORD PTR _x_s9_lambda[rip]
	movss	DWORD PTR s9_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s9_evt1[rip]
	mov	BYTE PTR s9_evt1[rip], al
	movzx	eax, BYTE PTR _x_s9_evt2[rip]
	mov	BYTE PTR s9_evt2[rip], al
	movss	xmm0, DWORD PTR _x_s12_lambda[rip]
	movss	DWORD PTR s12_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s9_l0[rip]
	mov	BYTE PTR s9_l0[rip], al
	movss	xmm0, DWORD PTR _x_s10_x[rip]
	movss	DWORD PTR s10_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	mov	BYTE PTR s7_l1[rip], al
	movss	xmm0, DWORD PTR _x_s10_backoff[rip]
	movss	DWORD PTR s10_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	mov	BYTE PTR s7_l0[rip], al
	movss	xmm0, DWORD PTR _x_s10_lambda[rip]
	movss	DWORD PTR s10_lambda[rip], xmm0
	movss	xmm0, DWORD PTR _x_bus_x[rip]
	movss	DWORD PTR bus_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s10_evt0[rip]
	mov	BYTE PTR s10_evt0[rip], al
	movzx	eax, BYTE PTR _x_s10_evt1[rip]
	mov	BYTE PTR s10_evt1[rip], al
	movzx	eax, BYTE PTR _x_s10_evt2[rip]
	mov	BYTE PTR s10_evt2[rip], al
	movss	xmm0, DWORD PTR _x_s13_lambda[rip]
	movss	DWORD PTR s13_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s10_l0[rip]
	mov	BYTE PTR s10_l0[rip], al
	movss	xmm0, DWORD PTR _x_s11_x[rip]
	movss	DWORD PTR s11_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s8_l1[rip]
	mov	BYTE PTR s8_l1[rip], al
	movss	xmm0, DWORD PTR _x_s11_backoff[rip]
	movss	DWORD PTR s11_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s8_l0[rip]
	mov	BYTE PTR s8_l0[rip], al
	movss	xmm0, DWORD PTR _x_s11_lambda[rip]
	movss	DWORD PTR s11_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s11_evt0[rip]
	mov	BYTE PTR s11_evt0[rip], al
	movzx	eax, BYTE PTR _x_s11_evt1[rip]
	mov	BYTE PTR s11_evt1[rip], al
	movzx	eax, BYTE PTR _x_s11_evt2[rip]
	mov	BYTE PTR s11_evt2[rip], al
	movss	xmm0, DWORD PTR _x_s14_lambda[rip]
	movss	DWORD PTR s14_lambda[rip], xmm0
	movzx	eax, BYTE PTR _x_s11_l0[rip]
	mov	BYTE PTR s11_l0[rip], al
	movzx	eax, BYTE PTR _x_s9_l1[rip]
	mov	BYTE PTR s9_l1[rip], al
	movss	xmm0, DWORD PTR _x_s12_backoff[rip]
	movss	DWORD PTR s12_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s12_evt0[rip]
	mov	BYTE PTR s12_evt0[rip], al
	movzx	eax, BYTE PTR _x_s12_evt1[rip]
	mov	BYTE PTR s12_evt1[rip], al
	movzx	eax, BYTE PTR _x_s12_evt2[rip]
	mov	BYTE PTR s12_evt2[rip], al
	movzx	eax, BYTE PTR _x_s10_l1[rip]
	mov	BYTE PTR s10_l1[rip], al
	movss	xmm0, DWORD PTR _x_s13_backoff[rip]
	movss	DWORD PTR s13_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s13_evt0[rip]
	mov	BYTE PTR s13_evt0[rip], al
	movzx	eax, BYTE PTR _x_s13_evt1[rip]
	mov	BYTE PTR s13_evt1[rip], al
	movzx	eax, BYTE PTR _x_s13_evt2[rip]
	mov	BYTE PTR s13_evt2[rip], al
	movzx	eax, BYTE PTR _x_s13_l0[rip]
	mov	BYTE PTR s13_l0[rip], al
	movzx	eax, BYTE PTR _x_s11_l1[rip]
	mov	BYTE PTR s11_l1[rip], al
	movss	xmm0, DWORD PTR _x_s14_backoff[rip]
	movss	DWORD PTR s14_backoff[rip], xmm0
	movzx	eax, BYTE PTR _x_s14_evt0[rip]
	mov	BYTE PTR s14_evt0[rip], al
	movzx	eax, BYTE PTR _x_s14_evt1[rip]
	mov	BYTE PTR s14_evt1[rip], al
.L186:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L1388
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1095761920
	.align 8
.LC3:
	.long	0
	.long	-1074790400
	.align 4
.LC4:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"497338.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	s14_l1,1,1
	.comm	_x_s14_l1,1,1
	.comm	s14_l0,1,1
	.comm	_x_s14_l0,1,1
	.comm	s4_evt0,1,1
	.comm	_x_s4_evt0,1,1
	.comm	s13_l1,1,1
	.comm	_x_s13_l1,1,1
	.comm	s4_x,4,4
	.comm	_x_s4_x,4,4
	.comm	bus_evt2,1,1
	.comm	_x_bus_evt2,1,1
	.comm	s3_evt0,1,1
	.comm	_x_s3_evt0,1,1
	.comm	s12_l1,1,1
	.comm	_x_s12_l1,1,1
	.comm	s3_x,4,4
	.comm	_x_s3_x,4,4
	.comm	s5_evt2,1,1
	.comm	_x_s5_evt2,1,1
	.comm	s5_evt1,1,1
	.comm	_x_s5_evt1,1,1
	.comm	s2_evt2,1,1
	.comm	_x_s2_evt2,1,1
	.comm	s3_l1,1,1
	.comm	_x_s3_l1,1,1
	.comm	s6_backoff,4,4
	.comm	_x_s6_backoff,4,4
	.comm	s2_evt1,1,1
	.comm	_x_s2_evt1,1,1
	.comm	s14_x,4,4
	.comm	_x_s14_x,4,4
	.comm	s0_lambda,4,4
	.comm	_x_s0_lambda,4,4
	.comm	bus_l0,1,1
	.comm	_x_bus_l0,1,1
	.comm	s5_x,4,4
	.comm	_x_s5_x,4,4
	.comm	s0_backoff,4,4
	.comm	_x_s0_backoff,4,4
	.comm	s0_x,4,4
	.comm	_x_s0_x,4,4
	.comm	s14_evt2,1,1
	.comm	_x_s14_evt2,1,1
	.comm	s2_evt0,1,1
	.comm	_x_s2_evt0,1,1
	.comm	s4_evt1,1,1
	.comm	_x_s4_evt1,1,1
	.comm	bus_evt0,1,1
	.comm	_x_bus_evt0,1,1
	.comm	bus_evt1,1,1
	.comm	_x_bus_evt1,1,1
	.comm	s1_l0,1,1
	.comm	_x_s1_l0,1,1
	.comm	s4_lambda,4,4
	.comm	_x_s4_lambda,4,4
	.comm	s0_evt0,1,1
	.comm	_x_s0_evt0,1,1
	.comm	bus_cd_id,4,4
	.comm	_x_bus_cd_id,4,4
	.comm	s6_evt2,1,1
	.comm	_x_s6_evt2,1,1
	.comm	s1_l1,1,1
	.comm	_x_s1_l1,1,1
	.comm	s4_backoff,4,4
	.comm	_x_s4_backoff,4,4
	.comm	s0_evt1,1,1
	.comm	_x_s0_evt1,1,1
	.comm	s12_x,4,4
	.comm	_x_s12_x,4,4
	.comm	s12_l0,1,1
	.comm	_x_s12_l0,1,1
	.comm	bus_j,4,4
	.comm	_x_bus_j,4,4
	.comm	s5_evt0,1,1
	.comm	_x_s5_evt0,1,1
	.comm	s0_evt2,1,1
	.comm	_x_s0_evt2,1,1
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	s4_l1,1,1
	.comm	_x_s4_l1,1,1
	.comm	s7_backoff,4,4
	.comm	_x_s7_backoff,4,4
	.comm	s3_evt1,1,1
	.comm	_x_s3_evt1,1,1
	.comm	s3_lambda,4,4
	.comm	_x_s3_lambda,4,4
	.comm	s0_l0,1,1
	.comm	_x_s0_l0,1,1
	.comm	s2_lambda,4,4
	.comm	_x_s2_lambda,4,4
	.comm	s3_evt2,1,1
	.comm	_x_s3_evt2,1,1
	.comm	s3_backoff,4,4
	.comm	_x_s3_backoff,4,4
	.comm	s0_l1,1,1
	.comm	_x_s0_l1,1,1
	.comm	s2_backoff,4,4
	.comm	_x_s2_backoff,4,4
	.comm	s1_x,4,4
	.comm	_x_s1_x,4,4
	.comm	s6_x,4,4
	.comm	_x_s6_x,4,4
	.comm	s1_backoff,4,4
	.comm	_x_s1_backoff,4,4
	.comm	s1_lambda,4,4
	.comm	_x_s1_lambda,4,4
	.comm	s2_l0,1,1
	.comm	_x_s2_l0,1,1
	.comm	s5_lambda,4,4
	.comm	_x_s5_lambda,4,4
	.comm	s1_evt0,1,1
	.comm	_x_s1_evt0,1,1
	.comm	s2_l1,1,1
	.comm	_x_s2_l1,1,1
	.comm	s5_backoff,4,4
	.comm	_x_s5_backoff,4,4
	.comm	s1_evt1,1,1
	.comm	_x_s1_evt1,1,1
	.comm	s13_x,4,4
	.comm	_x_s13_x,4,4
	.comm	s1_evt2,1,1
	.comm	_x_s1_evt2,1,1
	.comm	s4_evt2,1,1
	.comm	_x_s4_evt2,1,1
	.comm	bus_l1,1,1
	.comm	_x_bus_l1,1,1
	.comm	s9_evt0,1,1
	.comm	_x_s9_evt0,1,1
	.comm	s2_x,4,4
	.comm	_x_s2_x,4,4
	.comm	s3_l0,1,1
	.comm	_x_s3_l0,1,1
	.comm	s6_lambda,4,4
	.comm	_x_s6_lambda,4,4
	.comm	s6_evt0,1,1
	.comm	_x_s6_evt0,1,1
	.comm	s6_evt1,1,1
	.comm	_x_s6_evt1,1,1
	.comm	s7_x,4,4
	.comm	_x_s7_x,4,4
	.comm	s4_l0,1,1
	.comm	_x_s4_l0,1,1
	.comm	s7_lambda,4,4
	.comm	_x_s7_lambda,4,4
	.comm	s7_evt0,1,1
	.comm	_x_s7_evt0,1,1
	.comm	s7_evt1,1,1
	.comm	_x_s7_evt1,1,1
	.comm	s7_evt2,1,1
	.comm	_x_s7_evt2,1,1
	.comm	s8_x,4,4
	.comm	_x_s8_x,4,4
	.comm	s5_l1,1,1
	.comm	_x_s5_l1,1,1
	.comm	s8_backoff,4,4
	.comm	_x_s8_backoff,4,4
	.comm	s5_l0,1,1
	.comm	_x_s5_l0,1,1
	.comm	s8_lambda,4,4
	.comm	_x_s8_lambda,4,4
	.comm	s8_evt0,1,1
	.comm	_x_s8_evt0,1,1
	.comm	s8_evt1,1,1
	.comm	_x_s8_evt1,1,1
	.comm	s8_evt2,1,1
	.comm	_x_s8_evt2,1,1
	.comm	s9_x,4,4
	.comm	_x_s9_x,4,4
	.comm	s6_l1,1,1
	.comm	_x_s6_l1,1,1
	.comm	s9_backoff,4,4
	.comm	_x_s9_backoff,4,4
	.comm	s6_l0,1,1
	.comm	_x_s6_l0,1,1
	.comm	s9_lambda,4,4
	.comm	_x_s9_lambda,4,4
	.comm	s9_evt1,1,1
	.comm	_x_s9_evt1,1,1
	.comm	s9_evt2,1,1
	.comm	_x_s9_evt2,1,1
	.comm	s12_lambda,4,4
	.comm	_x_s12_lambda,4,4
	.comm	s9_l0,1,1
	.comm	_x_s9_l0,1,1
	.comm	s10_x,4,4
	.comm	_x_s10_x,4,4
	.comm	s7_l1,1,1
	.comm	_x_s7_l1,1,1
	.comm	s10_backoff,4,4
	.comm	_x_s10_backoff,4,4
	.comm	s7_l0,1,1
	.comm	_x_s7_l0,1,1
	.comm	s10_lambda,4,4
	.comm	_x_s10_lambda,4,4
	.comm	bus_x,4,4
	.comm	_x_bus_x,4,4
	.comm	s10_evt0,1,1
	.comm	_x_s10_evt0,1,1
	.comm	s10_evt1,1,1
	.comm	_x_s10_evt1,1,1
	.comm	s10_evt2,1,1
	.comm	_x_s10_evt2,1,1
	.comm	s13_lambda,4,4
	.comm	_x_s13_lambda,4,4
	.comm	s10_l0,1,1
	.comm	_x_s10_l0,1,1
	.comm	s11_x,4,4
	.comm	_x_s11_x,4,4
	.comm	s8_l1,1,1
	.comm	_x_s8_l1,1,1
	.comm	s11_backoff,4,4
	.comm	_x_s11_backoff,4,4
	.comm	s8_l0,1,1
	.comm	_x_s8_l0,1,1
	.comm	s11_lambda,4,4
	.comm	_x_s11_lambda,4,4
	.comm	s11_evt0,1,1
	.comm	_x_s11_evt0,1,1
	.comm	s11_evt1,1,1
	.comm	_x_s11_evt1,1,1
	.comm	s11_evt2,1,1
	.comm	_x_s11_evt2,1,1
	.comm	s14_lambda,4,4
	.comm	_x_s14_lambda,4,4
	.comm	s11_l0,1,1
	.comm	_x_s11_l0,1,1
	.comm	s9_l1,1,1
	.comm	_x_s9_l1,1,1
	.comm	s12_backoff,4,4
	.comm	_x_s12_backoff,4,4
	.comm	s12_evt0,1,1
	.comm	_x_s12_evt0,1,1
	.comm	s12_evt1,1,1
	.comm	_x_s12_evt1,1,1
	.comm	s12_evt2,1,1
	.comm	_x_s12_evt2,1,1
	.comm	s10_l1,1,1
	.comm	_x_s10_l1,1,1
	.comm	s13_backoff,4,4
	.comm	_x_s13_backoff,4,4
	.comm	s13_evt0,1,1
	.comm	_x_s13_evt0,1,1
	.comm	s13_evt1,1,1
	.comm	_x_s13_evt1,1,1
	.comm	s13_evt2,1,1
	.comm	_x_s13_evt2,1,1
	.comm	s13_l0,1,1
	.comm	_x_s13_l0,1,1
	.comm	s11_l1,1,1
	.comm	_x_s11_l1,1,1
	.comm	s14_backoff,4,4
	.comm	_x_s14_backoff,4,4
	.comm	s14_evt0,1,1
	.comm	_x_s14_evt0,1,1
	.comm	s14_evt1,1,1
	.comm	_x_s14_evt1,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmpge
	.global	__aeabi_fcmple
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.global	__aeabi_dcmple
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+20
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+28
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+36
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+44
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+56
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+64
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+68
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+76
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+80
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+84
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+112
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1563+120
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+464
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+128
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+136
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1563+140
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+504
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+144
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+148
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+536
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+444
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+156
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+160
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+164
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+172
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+180
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+480
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+188
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+520
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+508
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+212
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+484
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+472
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+468
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+448
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+532
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+452
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+440
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+432
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+416
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+524
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+412
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+528
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+420
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+384
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+380
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+492
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+388
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+236
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+352
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+348
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+460
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+356
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+244
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+320
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+424
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+316
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+324
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+248
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+252
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+268
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1563+288
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1563+296
	strb	r2, [r3]
	ldr	r3, .L1563+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L1563+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L1563+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L1563+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1563+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1563+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L8:
	ldr	r3, .L1563+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L1563+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L1563+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L1563+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L1563+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L1563+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L10:
	ldr	r3, .L1563+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L7:
	ldr	r3, .L1563+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L1563+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
.L11:
	ldr	r3, .L1563+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L1563+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
.L13:
	ldr	r3, .L1563+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L12:
	ldr	r3, .L1563+288
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+248
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L15
	mov	r3, #0
	mov	r4, r3
.L15:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+248
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L1563+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L16
	ldr	r3, .L1563+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L16:
	ldr	r3, .L1563+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+212
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1563+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L1563+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L18:
	ldr	r3, .L1563+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1563+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1563+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L20:
	ldr	r3, .L1563+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L1563+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
	ldr	r3, .L1563+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L21:
	ldr	r3, .L1563+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L1563+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L1563+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L22:
	ldr	r3, .L1563+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L19:
	ldr	r3, .L1563+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L23
	ldr	r3, .L1563+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
.L23:
	ldr	r3, .L1563+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L1563+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
.L25:
	ldr	r3, .L1563+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L24:
	ldr	r3, .L1563+268
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+244
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	mov	r3, #0
	mov	r4, r3
.L27:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+212
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+244
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1563+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L28
	ldr	r3, .L1563+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L28:
	ldr	r3, .L1563+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1563+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L30
	ldr	r3, .L1563+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L30:
	ldr	r3, .L1563+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L32
	ldr	r3, .L1563+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L32
	ldr	r3, .L1563+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L32:
	ldr	r3, .L1563+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L33
	ldr	r3, .L1563+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L33
	ldr	r3, .L1563+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L33:
	ldr	r3, .L1563+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1563+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L1563+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L34:
	ldr	r3, .L1563+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L31:
	ldr	r3, .L1563+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
	ldr	r3, .L1563+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
.L35:
	ldr	r3, .L1563+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L1563+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
.L37:
	ldr	r3, .L1563+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L36:
	ldr	r3, .L1563+252
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+236
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L39
	mov	r3, #0
	mov	r4, r3
.L39:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+236
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L1563+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	b	.L1564
.L1565:
	.align	2
.L1563:
	.word	_diverge_delta
	.word	s14_l1
	.word	s14_l0
	.word	s4_evt0
	.word	s13_l1
	.word	s4_x
	.word	bus_evt2
	.word	s3_evt0
	.word	s12_l1
	.word	s3_x
	.word	s5_evt2
	.word	s5_evt1
	.word	s2_evt2
	.word	s3_l1
	.word	s6_backoff
	.word	s2_evt1
	.word	s14_x
	.word	s0_lambda
	.word	bus_l0
	.word	s5_x
	.word	s0_backoff
	.word	s0_x
	.word	s14_evt2
	.word	s2_evt0
	.word	s4_evt1
	.word	bus_evt0
	.word	bus_evt1
	.word	s1_l0
	.word	s4_lambda
	.word	s0_evt0
	.word	bus_cd_id
	.word	s1_l1
	.word	s4_backoff
	.word	s0_evt1
	.word	s12_x
	.word	bus_j
	.word	s0_evt2
	.word	delta
	.word	s3_evt1
	.word	s3_lambda
	.word	s0_l0
	.word	s2_lambda
	.word	s3_evt2
	.word	s3_backoff
	.word	s0_l1
	.word	s2_backoff
	.word	s1_x
	.word	s1_backoff
	.word	s1_lambda
	.word	s2_l0
	.word	s1_evt0
	.word	s2_l1
	.word	s1_evt1
	.word	s13_x
	.word	s1_evt2
	.word	s4_evt2
	.word	bus_l1
	.word	s2_x
	.word	s3_l0
	.word	s12_lambda
	.word	bus_x
	.word	s13_lambda
	.word	s14_lambda
	.word	s12_backoff
	.word	s12_evt0
	.word	s12_evt1
	.word	s12_evt2
	.word	s13_backoff
	.word	s13_evt0
	.word	s13_evt1
	.word	s13_evt2
	.word	s13_l0
	.word	s14_backoff
	.word	s14_evt0
	.word	s14_evt1
	.word	s12_l0
	.word	s11_evt2
	.word	s11_evt1
	.word	s11_evt0
	.word	s11_backoff
	.word	s11_x
	.word	s11_lambda
	.word	s11_l1
	.word	s11_l0
	.word	s10_evt2
	.word	s10_evt1
	.word	s10_evt0
	.word	s10_backoff
	.word	s10_x
	.word	s10_lambda
	.word	s10_l1
	.word	s10_l0
	.word	s9_evt2
	.word	s9_evt1
	.word	s9_evt0
	.word	s9_backoff
	.word	s9_x
	.word	s9_lambda
	.word	s9_l1
	.word	s9_l0
	.word	s8_evt2
	.word	s8_evt1
	.word	s8_evt0
	.word	s8_backoff
	.word	s8_x
	.word	s8_lambda
	.word	s8_l1
	.word	s8_l0
	.word	s7_evt2
	.word	s7_evt1
	.word	s7_evt0
	.word	s7_backoff
	.word	s7_x
	.word	s7_lambda
	.word	s7_l1
	.word	s7_l0
	.word	s6_evt2
	.word	s6_evt1
	.word	s6_evt0
	.word	s6_backoff
	.word	s6_x
	.word	s6_lambda
	.word	s6_l1
	.word	s6_l0
	.word	s5_evt2
	.word	s5_evt1
	.word	s5_evt0
	.word	s5_backoff
	.word	1095761920
	.word	s5_x
	.word	s5_lambda
	.word	s5_l1
	.word	s5_l0
	.word	s4_l0
	.word	s4_l1
	.word	s4_x
.L1564:
	ldr	r3, .L1563+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L40:
	ldr	r3, .L1563+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+320
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L1563+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
	ldr	r3, .L1563+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L42:
	ldr	r3, .L1563+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1563+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1563+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L44:
	ldr	r3, .L1563+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L1563+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L1563+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L45:
	ldr	r3, .L1563+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L1563+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L1563+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L46:
	ldr	r3, .L1563+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+312
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L43:
	ldr	r3, .L1563+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L47
	ldr	r3, .L1563+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L47:
	ldr	r3, .L1563+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
	ldr	r3, .L1563+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
.L49:
	ldr	r3, .L1563+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L48:
	ldr	r3, .L1563+316
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+324
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L51
	mov	r3, #0
	mov	r4, r3
.L51:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+320
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+324
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L1563+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1563+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L52:
	ldr	r3, .L1563+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+352
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L1563+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
	ldr	r3, .L1563+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L54:
	ldr	r3, .L1563+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1563+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L56
	ldr	r3, .L1563+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L56:
	ldr	r3, .L1563+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L1563+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1563+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L57:
	ldr	r3, .L1563+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L1563+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
	ldr	r3, .L1563+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L58:
	ldr	r3, .L1563+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+340
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+344
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L55:
	ldr	r3, .L1563+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L1563+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
.L59:
	ldr	r3, .L1563+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L1563+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
.L61:
	ldr	r3, .L1563+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L60:
	ldr	r3, .L1563+348
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+356
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	mov	r3, #0
	mov	r4, r3
.L63:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+352
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+356
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L64
	ldr	r3, .L1563+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L1563+364
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L64:
	ldr	r3, .L1563+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+384
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1563+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L1563+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L66:
	ldr	r3, .L1563+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1563+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1563+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L68:
	ldr	r3, .L1563+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
	ldr	r3, .L1563+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L1563+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L69:
	ldr	r3, .L1563+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L1563+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
	ldr	r3, .L1563+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L70:
	ldr	r3, .L1563+368
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+372
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+376
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L67:
	ldr	r3, .L1563+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L1563+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
.L71:
	ldr	r3, .L1563+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L1563+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
.L73:
	ldr	r3, .L1563+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L72:
	ldr	r3, .L1563+380
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+388
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L75
	mov	r3, #0
	mov	r4, r3
.L75:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+384
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+388
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L1563+392
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L1563+396
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L76:
	ldr	r3, .L1563+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+416
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L1563+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L1563+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L78:
	ldr	r3, .L1563+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L80
	ldr	r3, .L1563+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L80
	ldr	r3, .L1563+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L80:
	ldr	r3, .L1563+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L1563+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L81
	ldr	r3, .L1563+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L81:
	ldr	r3, .L1563+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1563+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L1563+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L82:
	ldr	r3, .L1563+400
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+404
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+408
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L79:
	ldr	r3, .L1563+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1563+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
.L83:
	ldr	r3, .L1563+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
	ldr	r3, .L1563+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
.L85:
	ldr	r3, .L1563+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L84:
	ldr	r3, .L1563+412
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+420
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L87
	mov	r3, #0
	mov	r4, r3
.L87:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+416
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+420
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L88
	ldr	r3, .L1563+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L1563+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L88:
	ldr	r3, .L1563+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+448
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L1563+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
	ldr	r3, .L1563+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L90:
	ldr	r3, .L1563+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L1563+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L1563+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L92:
	ldr	r3, .L1563+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1563+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L1563+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L1563+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L1563+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L1563+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L94:
	ldr	r3, .L1563+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+436
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+440
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L91:
	ldr	r3, .L1563+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L95
	ldr	r3, .L1563+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
.L95:
	ldr	r3, .L1563+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
	ldr	r3, .L1563+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
.L97:
	ldr	r3, .L1563+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L96:
	ldr	r3, .L1563+444
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+452
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	mov	r3, #0
	mov	r4, r3
.L99:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+448
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+452
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L1563+456
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L1563+460
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L100:
	ldr	r3, .L1563+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+480
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L1563+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L1563+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L102:
	ldr	r3, .L1563+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L1563+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L104
	ldr	r3, .L1563+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L104:
	ldr	r3, .L1563+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L1563+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L1563+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L105:
	ldr	r3, .L1563+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L1563+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L1563+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L106:
	ldr	r3, .L1563+464
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+468
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+472
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L103:
	ldr	r3, .L1563+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L1563+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
.L107:
	ldr	r3, .L1563+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L1563+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
.L109:
	ldr	r3, .L1563+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L108:
	ldr	r3, .L1563+476
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+484
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L111
	mov	r3, #0
	mov	r4, r3
.L111:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+480
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+484
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L112
	ldr	r3, .L1563+488
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L112
	ldr	r3, .L1563+492
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L112:
	ldr	r3, .L1563+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+524
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+516
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1563+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
	ldr	r3, .L1563+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L114:
	ldr	r3, .L1563+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L1563+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L1563+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L116:
	ldr	r3, .L1563+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L1563+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L1563+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L117:
	ldr	r3, .L1563+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L1563+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
	ldr	r3, .L1563+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
.L118:
	ldr	r3, .L1563+496
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+500
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+504
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L115:
	ldr	r3, .L1563+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L119
	ldr	r3, .L1563+524
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
.L119:
	ldr	r3, .L1563+524
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L121
	ldr	r3, .L1563+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
.L121:
	ldr	r3, .L1563+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+524
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L120:
	ldr	r3, .L1563+508
	ldr	r3, [r3]	@ float
	ldr	r1, .L1563+512
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+520
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L123
	mov	r3, #0
	mov	r4, r3
.L123:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1563+516
	ldr	r3, [r3]	@ float
	ldr	r2, .L1563+520
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L1563+524
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L1563+528
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L124:
	ldr	r3, .L1563+532
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+536
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1563+540
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1566+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L126
	ldr	r3, .L1566+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L126:
	ldr	r3, .L1566
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L1566+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L1566+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L128:
	ldr	r3, .L1566
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L1566+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L1566+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L129:
	ldr	r3, .L1566
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1566+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L1566+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
.L130:
	ldr	r3, .L1566
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L127:
	ldr	r3, .L1566+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L1566+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L131:
	ldr	r3, .L1566+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L133
	ldr	r3, .L1566+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
.L133:
	ldr	r3, .L1566+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L132:
	ldr	r3, .L1566+20
	ldr	r3, [r3]	@ float
	ldr	r1, .L1566+692
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	mov	r3, #0
	mov	r4, r3
.L135:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L1566+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L1566+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L136:
	ldr	r3, .L1566+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L1566+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L1566+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L138:
	ldr	r3, .L1566+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1566+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L140
	ldr	r3, .L1566+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L140:
	ldr	r3, .L1566+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L1566+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L1566+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L141:
	ldr	r3, .L1566+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L142
	ldr	r3, .L1566+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L1566+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
.L142:
	ldr	r3, .L1566+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L139:
	ldr	r3, .L1566+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L143
	ldr	r3, .L1566+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
.L143:
	ldr	r3, .L1566+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
	ldr	r3, .L1566+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
.L145:
	ldr	r3, .L1566+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L144:
	ldr	r3, .L1566+56
	ldr	r3, [r3]	@ float
	ldr	r1, .L1566+692
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L147
	mov	r3, #0
	mov	r4, r3
.L147:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L148
	ldr	r3, .L1566+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1566+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L148:
	ldr	r3, .L1566+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L1566+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L1566+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L150:
	ldr	r3, .L1566+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L1566+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L1566+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L152:
	ldr	r3, .L1566+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L1566+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1566+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L153:
	ldr	r3, .L1566+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1566+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
	ldr	r3, .L1566+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L154:
	ldr	r3, .L1566+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L151:
	ldr	r3, .L1566+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1566+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
.L155:
	ldr	r3, .L1566+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L1566+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
.L157:
	ldr	r3, .L1566+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L156:
	ldr	r3, .L1566+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1566+692
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L159
	mov	r3, #0
	mov	r4, r3
.L159:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L160
	ldr	r3, .L1566+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L160
	ldr	r3, .L1566+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L160:
	ldr	r3, .L1566+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L162
	ldr	r3, .L1566+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L1566+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L162:
	ldr	r3, .L1566+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L1566+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L164
	ldr	r3, .L1566+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L164:
	ldr	r3, .L1566+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L1566+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L1566+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L165:
	ldr	r3, .L1566+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L1566+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L166
	ldr	r3, .L1566+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L163
.L166:
	ldr	r3, .L1566+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L163:
	ldr	r3, .L1566+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L1566+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
.L167:
	ldr	r3, .L1566+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L1566+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L168
.L169:
	ldr	r3, .L1566+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L168:
	ldr	r3, .L1566+120
	ldr	r3, [r3]	@ float
	ldr	r1, .L1566+692
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+124
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	mov	r3, #0
	mov	r4, r3
.L171:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L1566+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L1566+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L172:
	ldr	r3, .L1566+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+136
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r3, .L1566+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L1566+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L174:
	ldr	r3, .L1566+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L1566+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L1566+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L176:
	ldr	r3, .L1566+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1566+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L1566+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L177:
	ldr	r3, .L1566+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L1566+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L1566+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L175
.L178:
	ldr	r3, .L1566+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L175:
	ldr	r3, .L1566+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L1566+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
.L179:
	ldr	r3, .L1566+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L1566+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
.L181:
	ldr	r3, .L1566+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L180:
	ldr	r3, .L1566+152
	ldr	r3, [r3]	@ float
	ldr	r1, .L1566+692
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+156
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L183
	mov	r3, #0
	mov	r4, r3
.L183:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1566+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L1566+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L184:
	ldr	r3, .L1566+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1566+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1566+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L185:
	ldr	r3, .L1566+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L187
	ldr	r3, .L1566+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L187
	ldr	r3, .L1566+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L187:
	ldr	r3, .L1566+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L1566+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L1566+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L188:
	ldr	r3, .L1566+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L1566+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L1566+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
.L189:
	ldr	r3, .L1566+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L186:
	ldr	r3, .L1566+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L1566+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
.L190:
	ldr	r3, .L1566+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L1566+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
.L192:
	ldr	r3, .L1566+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L1566+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L191
.L193:
	ldr	r3, .L1566+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L191:
	ldr	r3, .L1566+180
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1566+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+184
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1566+692
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L195
	mov	r3, #0
	mov	r4, r3
.L195:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L196
	ldr	r3, .L1566+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
	ldr	r3, .L1566+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L196:
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L197
	ldr	r3, .L1566+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L1566+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
.L197:
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+188
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L200
.L4:
	mov	r3, #0
.L200:
	str	r3, [fp, #-24]
	b	.L201
.L1567:
	.align	2
.L1566:
	.word	s4_evt2
	.word	s4_evt0
	.word	s4_evt1
	.word	s4_l0
	.word	s4_l1
	.word	s4_backoff
	.word	s4_lambda
	.word	s4_x
	.word	s3_l0
	.word	s3_l1
	.word	s3_x
	.word	s3_evt2
	.word	s3_evt0
	.word	s3_evt1
	.word	s3_backoff
	.word	s3_lambda
	.word	s2_l0
	.word	s2_l1
	.word	s2_x
	.word	s2_evt2
	.word	s2_evt0
	.word	s2_evt1
	.word	s2_backoff
	.word	s2_lambda
	.word	s1_l0
	.word	s1_l1
	.word	s1_x
	.word	s1_evt2
	.word	s1_evt0
	.word	s1_evt1
	.word	s1_backoff
	.word	s1_lambda
	.word	s0_l0
	.word	s0_l1
	.word	s0_x
	.word	s0_evt2
	.word	s0_evt0
	.word	s0_evt1
	.word	s0_backoff
	.word	s0_lambda
	.word	bus_l0
	.word	bus_l1
	.word	bus_evt2
	.word	bus_evt0
	.word	bus_evt1
	.word	bus_j
	.word	bus_x
	.word	_diverge_delta
	.word	_x__diverge_delta
	.word	_x_s4_evt0
	.word	_x_s13_l1
	.word	_x_s4_x
	.word	_x_bus_evt2
	.word	_x_s3_evt0
	.word	_x_s12_l1
	.word	_x_s3_x
	.word	_x_s5_evt2
	.word	_x_s5_evt1
	.word	_x_s2_evt2
	.word	_x_s3_l1
	.word	_x_s6_backoff
	.word	_x_s2_evt1
	.word	_x_s0_lambda
	.word	_x_bus_l0
	.word	_x_s5_x
	.word	_x_s0_backoff
	.word	_x_s0_x
	.word	_x_s2_evt0
	.word	_x_s4_evt1
	.word	_x_bus_evt0
	.word	_x_bus_evt1
	.word	_x_s1_l0
	.word	_x_s4_lambda
	.word	_x_s0_evt0
	.word	_x_bus_cd_id
	.word	_x_s6_evt2
	.word	_x_s1_l1
	.word	_x_s4_backoff
	.word	_x_s0_evt1
	.word	_x_s12_x
	.word	_x_s12_l0
	.word	_x_bus_j
	.word	_x_s5_evt0
	.word	_x_s0_evt2
	.word	_x_delta
	.word	_x_s4_l1
	.word	_x_s7_backoff
	.word	_x_s3_evt1
	.word	_x_s3_lambda
	.word	_x_s0_l0
	.word	_x_s2_lambda
	.word	_x_s3_evt2
	.word	_x_s3_backoff
	.word	_x_s0_l1
	.word	_x_s2_backoff
	.word	_x_s1_x
	.word	_x_s6_x
	.word	_x_s1_backoff
	.word	_x_s1_lambda
	.word	_x_s2_l0
	.word	_x_s5_lambda
	.word	_x_s1_evt0
	.word	_x_s2_l1
	.word	_x_s5_backoff
	.word	_x_s1_evt1
	.word	_x_s13_x
	.word	_x_s1_evt2
	.word	_x_s4_evt2
	.word	_x_bus_l1
	.word	_x_s9_evt0
	.word	_x_s2_x
	.word	_x_s3_l0
	.word	_x_s6_lambda
	.word	_x_s6_evt0
	.word	_x_s6_evt1
	.word	_x_s7_x
	.word	_x_s4_l0
	.word	_x_s7_lambda
	.word	_x_s7_evt0
	.word	_x_s7_evt1
	.word	_x_s7_evt2
	.word	_x_s8_x
	.word	_x_s5_l1
	.word	_x_s8_backoff
	.word	_x_s5_l0
	.word	_x_s8_lambda
	.word	_x_s8_evt0
	.word	_x_s8_evt1
	.word	_x_s8_evt2
	.word	_x_s9_x
	.word	_x_s6_l1
	.word	_x_s9_backoff
	.word	_x_s6_l0
	.word	_x_s9_lambda
	.word	_x_s9_evt1
	.word	_x_s9_evt2
	.word	_x_s12_lambda
	.word	_x_s9_l0
	.word	_x_s10_x
	.word	_x_s7_l1
	.word	_x_s10_backoff
	.word	_x_s7_l0
	.word	_x_s10_lambda
	.word	_x_bus_x
	.word	_x_s10_evt0
	.word	_x_s10_evt1
	.word	_x_s10_evt2
	.word	_x_s13_lambda
	.word	_x_s10_l0
	.word	_x_s11_x
	.word	_x_s8_l1
	.word	_x_s11_backoff
	.word	_x_s8_l0
	.word	_x_s11_lambda
	.word	_x_s11_evt0
	.word	_x_s11_evt1
	.word	_x_s11_evt2
	.word	_x_s11_l0
	.word	_x_s9_l1
	.word	_x_s12_backoff
	.word	_x_s12_evt0
	.word	_x_s12_evt1
	.word	_x_s12_evt2
	.word	_x_s10_l1
	.word	_x_s13_backoff
	.word	_x_s13_evt0
	.word	_x_s13_evt1
	.word	_x_s13_evt2
	.word	_x_s13_l0
	.word	_x_s11_l1
	.word	_x_s14_evt2
	.word	_x_s14_evt1
	.word	_x_s14_evt0
	.word	1095761920
	.word	s14_x
	.word	s14_backoff
	.word	_x_s14_backoff
	.word	_x_s14_x
	.word	_x_s14_l1
	.word	_x_s14_l0
	.word	s14_l0
	.word	s14_l1
	.word	delta
	.word	s14_evt2
	.word	s14_evt0
	.word	s14_evt1
	.word	s14_lambda
	.word	_x_s14_lambda
.L1356:
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+192
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+712
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+716
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+204
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+220
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+708
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+248
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+252
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+256
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+264
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+680
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+284
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+288
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1566+296
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+308
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+312
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+316
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1566+324
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+332
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+336
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+344
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+352
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+356
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+360
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+364
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+368
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+376
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+380
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+384
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+388
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+392
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+400
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+412
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+416
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+420
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+424
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+432
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+436
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+440
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+444
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+448
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+452
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+456
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+460
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+464
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+468
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+472
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+476
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+480
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+484
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+488
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+492
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+496
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+500
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+504
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+508
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+512
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+516
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+520
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+524
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+528
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+532
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+536
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+540
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+544
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+548
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+552
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+556
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+560
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+564
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+568
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+572
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+576
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+580
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+584
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+588
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+592
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+596
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+600
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+604
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+608
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+612
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+616
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+620
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+624
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+748
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+628
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+632
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+636
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+640
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+644
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+648
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+652
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+656
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+660
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+664
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+668
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+672
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+676
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1566+704
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+688
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1566+684
	strb	r2, [r3]
	ldr	r3, .L1566+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L202
	ldr	r3, .L1566+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
	ldr	r3, .L1566+684
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L202:
	ldr	r3, .L1566+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L1566+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L1566+684
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L204:
	ldr	r3, .L1566+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1566+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L205
	ldr	r3, .L1566+684
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L205:
	ldr	r3, .L1566+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L206
	ldr	r3, .L1566+684
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L206
	ldr	r3, .L1566+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L206:
	ldr	r3, .L1566+680
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1566+684
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1566+688
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L203:
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
.L208:
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
.L210:
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L209:
	ldr	r3, .L1566+704
	ldr	r3, [r3]	@ float
	ldr	r1, .L1566+692
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1566+748
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L212
	mov	r3, #0
	mov	r4, r3
.L212:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1566+708
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+748
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L213:
	ldr	r3, .L1566+720
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1566+724
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1566+744
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+748
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1566+696
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1566+708
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L214
	ldr	r3, .L1566+700
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+704
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L217
.L214:
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1566+732
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L217
	ldr	r3, .L1566+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L217
	ldr	r3, .L1566+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L217:
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
.L219:
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
.L221:
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
.L220:
	ldr	r3, .L1566+700
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+704
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L1566+708
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L224
.L222:
	ldr	r3, .L1566+720
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1566+724
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L224
	ldr	r3, .L1566+732
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1566+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1566+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L224:
	ldr	r3, .L1566+732
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1566+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L1566+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1566+744
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+748
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L226
.L225:
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1566+720
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1566+724
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L1566+732
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1566+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1566+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L226:
	ldr	r3, .L1566+732
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L1566+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L1566+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
.L227:
	ldr	r3, .L1566+712
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L1566+716
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L1566+720
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L1566+724
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
	ldr	r3, .L1566+728
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L1566+732
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1566+736
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1566+740
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L228:
	ldr	r3, .L1566+744
	ldr	r3, [r3]	@ float
	ldr	r2, .L1566+748
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
.L231:
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L229
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
.L229:
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L1568+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L1568+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L232:
	ldr	r3, .L1568+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1568+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
.L236:
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
.L233:
	ldr	r3, .L1568+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L1568+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L237:
	ldr	r3, .L1568+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1568+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L240
.L238:
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1568+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L1568+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L240
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L240:
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L1568+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1568+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1568+140
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L242
.L241:
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L1568+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L1568+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L242:
	ldr	r3, .L1568+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
.L245:
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L243
.L246:
	ldr	r3, .L1568+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L1568+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L248
.L243:
	ldr	r3, .L1568+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L1568+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L248:
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L249
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
.L249:
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1568+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1568+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L250:
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L251
	ldr	r3, .L1568+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L252
.L251:
	ldr	r3, .L1568+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1568+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1568+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1568+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1568
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L252:
	ldr	r3, .L1568+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L1568+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L1568+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
.L253:
	ldr	r3, .L1568+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1568+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
	ldr	r3, .L1568+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
.L255:
	ldr	r3, .L1568+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L1568+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L256
	ldr	r3, .L1568+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
.L256:
	ldr	r3, .L1568+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1568+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1568+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
.L257:
	ldr	r3, .L1568+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L254:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L258:
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
.L260:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L259:
	ldr	r3, .L1568+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1568+132
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+68
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L262
	mov	r3, #0
	mov	r4, r3
.L262:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L263
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L263:
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1568+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1568+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1568+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L1568+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L267
.L264:
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L267:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
.L269:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
.L271:
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
.L270:
	ldr	r3, .L1568+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L272
	ldr	r3, .L1568+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L274
.L272:
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L274
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L274:
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1568+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L276
.L275:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L276
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L276:
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
.L277:
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L278
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L278:
	ldr	r3, .L1568+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L282
.L281:
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L282
.L279:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L282
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L282
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L282:
	ldr	r3, .L1568+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1568+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L286:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L283:
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L287
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L287:
	ldr	r3, .L1568+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L1568+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L290
.L288:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1569
.L1570:
	.align	2
.L1568:
	.word	s14_evt2
	.word	s14_evt1
	.word	s14_evt0
	.word	_x_s14_l0
	.word	_x_s14_l1
	.word	s14_l0
	.word	s14_l1
	.word	s14_lambda
	.word	_x_s14_lambda
	.word	_x_s14_x
	.word	s14_x
	.word	_x_s14_backoff
	.word	s14_backoff
	.word	_x_s13_evt2
	.word	_x_s13_evt0
	.word	_x_s13_evt1
	.word	s13_lambda
	.word	_x_s13_lambda
	.word	_x_s13_backoff
	.word	_x_s13_x
	.word	s13_backoff
	.word	s13_x
	.word	_x_s13_l1
	.word	_x_s13_l0
	.word	s13_l0
	.word	s13_l1
	.word	delta
	.word	s13_evt2
	.word	s13_evt0
	.word	s13_evt1
	.word	_x_s12_evt2
	.word	_x_s12_evt1
	.word	_x_s12_evt0
	.word	1095761920
	.word	s12_x
	.word	-1074790400
	.word	s12_evt2
	.word	s12_evt0
	.word	s12_evt1
	.word	s12_lambda
	.word	_x_s12_lambda
	.word	_x_s12_l0
	.word	_x_s12_l1
	.word	s12_backoff
	.word	_x_s12_backoff
	.word	_x_s12_x
	.word	s12_l0
	.word	s12_l1
	.word	delta
.L1569:
	bne	.L290
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L290:
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1568+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1568+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1568+140
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L292
.L291:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L292:
	ldr	r3, .L1568+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L295
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L296
.L295:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
.L296:
	ldr	r3, .L1568+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1568+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L298
.L293:
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L298
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L298
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L298:
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L299
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
.L299:
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L300:
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L1568+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L302
.L301:
	ldr	r3, .L1568+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1568+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1568+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1568+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1568+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L1568+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L302:
	ldr	r3, .L1568+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L1568+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1568+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
.L303:
	ldr	r3, .L1568+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L1568+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L305
	ldr	r3, .L1568+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
.L305:
	ldr	r3, .L1568+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L1568+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1568+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
.L306:
	ldr	r3, .L1568+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1568+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L1568+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
.L307:
	ldr	r3, .L1568+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L304:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L308
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
.L308:
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L310
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
.L310:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L309:
	ldr	r3, .L1568+176
	ldr	r3, [r3]	@ float
	ldr	r1, .L1568+132
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+160
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L312
	mov	r3, #0
	mov	r4, r3
.L312:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+180
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L313
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L313:
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L314
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L314
	ldr	r3, .L1568+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L314
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1568+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1568+180
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L314
	ldr	r3, .L1568+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L317
.L314:
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L317:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
.L319:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L321
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
.L321:
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
.L320:
	ldr	r3, .L1568+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1568+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L324
.L322:
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L324
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L324:
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1568+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L326
.L325:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L326:
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
.L327:
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L328:
	ldr	r3, .L1568+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L331:
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L329
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L329:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L332
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L332:
	ldr	r3, .L1568+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L1568+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L336
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
.L336:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
.L333:
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L337
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L337
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L337:
	ldr	r3, .L1568+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L1568+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+172
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L340
.L338:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L340:
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L341
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L341
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L341
	ldr	r3, .L1568+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1568+176
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1568+140
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L342
.L341:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L342
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L1568+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1568+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L342:
	ldr	r3, .L1568+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
.L345:
	ldr	r3, .L1568+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1568+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
.L346:
	ldr	r3, .L1568+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1568+176
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1568+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L348
.L343:
	ldr	r3, .L1568+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L1568+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L348
	ldr	r3, .L1568+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L348
	ldr	r3, .L1571
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L348:
	ldr	r3, .L1571
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1571+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1571+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
.L349:
	ldr	r3, .L1571+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1571+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1571+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1571+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L1571
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L350:
	ldr	r3, .L1571
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L1571+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1571+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L1571+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L352
.L351:
	ldr	r3, .L1571+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L1571+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L1571+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L1571+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L352
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L1571
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L352:
	ldr	r3, .L1571+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L353
	ldr	r3, .L1571+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L1571+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L353:
	ldr	r3, .L1571+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1571+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L1571+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L355:
	ldr	r3, .L1571+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L1571+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L1571+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L356:
	ldr	r3, .L1571+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1571+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L1571+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
.L357:
	ldr	r3, .L1571+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L354:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
.L358:
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
.L360:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L359:
	ldr	r3, .L1571+56
	ldr	r3, [r3]	@ float
	ldr	r1, .L1571+188
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+60
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L362
	mov	r3, #0
	mov	r4, r3
.L362:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L363:
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1571+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1571+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1571+64
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L364
	ldr	r3, .L1571+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L367
.L364:
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L367:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L369
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L369:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
.L371:
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
.L370:
	ldr	r3, .L1571+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L1571+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L374
.L372:
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L374:
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1571+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L376
.L375:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L376
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L376
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L376:
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
.L377:
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L378
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L378:
	ldr	r3, .L1571+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
.L381:
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L379
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
.L379:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L382
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L382:
	ldr	r3, .L1571+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1571+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
.L386:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
.L383:
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L387
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L387:
	ldr	r3, .L1571+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1571+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L390
.L388:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L390:
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L391
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L391
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L391
	ldr	r3, .L1571+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1571+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1571+116
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L392
.L391:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L392:
	ldr	r3, .L1571+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L395
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L396
.L395:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
.L396:
	ldr	r3, .L1571+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1571+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L398
.L393:
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L398:
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
.L399:
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L400
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L400:
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L401
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L401
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L401
	ldr	r3, .L1571+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L402
.L401:
	ldr	r3, .L1571+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1571+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1571+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1571+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L402
	ldr	r3, .L1571+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L402:
	ldr	r3, .L1571+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1571+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L1571+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
.L403:
	ldr	r3, .L1571+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L1571+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L405
	ldr	r3, .L1571+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
.L405:
	ldr	r3, .L1571+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L406
	ldr	r3, .L1571+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L406
	ldr	r3, .L1571+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
.L406:
	ldr	r3, .L1571+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L1571+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1572
.L1573:
	.align	2
.L1571:
	.word	s12_evt2
	.word	s12_evt0
	.word	s12_evt1
	.word	_x_s12_l0
	.word	_x_s12_l1
	.word	s12_l0
	.word	s12_l1
	.word	s12_backoff
	.word	s12_x
	.word	_x_s11_evt2
	.word	_x_s11_evt0
	.word	_x_s11_evt1
	.word	_x_s11_l0
	.word	_x_s11_l1
	.word	_x_s11_backoff
	.word	_x_s11_lambda
	.word	_x_s11_x
	.word	s11_l0
	.word	s11_l1
	.word	s11_lambda
	.word	s11_x
	.word	s11_backoff
	.word	s11_evt2
	.word	s11_evt0
	.word	s11_evt1
	.word	_x_s10_evt2
	.word	_x_s10_evt1
	.word	_x_s10_evt0
	.word	delta
	.word	-1074790400
	.word	s10_lambda
	.word	_x_s10_lambda
	.word	_x_s10_backoff
	.word	_x_s10_x
	.word	s10_backoff
	.word	s10_x
	.word	_x_s10_l1
	.word	_x_s10_l0
	.word	s10_l0
	.word	s10_l1
	.word	s10_evt2
	.word	s10_evt0
	.word	s10_evt1
	.word	_x_s9_evt2
	.word	_x_s9_evt1
	.word	_x_s9_evt0
	.word	_x_s9_backoff
	.word	1095761920
	.word	s9_l0
	.word	_x_s9_l0
	.word	s9_l1
	.word	_x_s9_l1
	.word	s9_lambda
	.word	_x_s9_lambda
	.word	delta
	.word	s9_x
	.word	_x_s9_x
.L1572:
	beq	.L407
	ldr	r3, .L1571+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
.L407:
	ldr	r3, .L1571+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L404:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
.L408:
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
.L410:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L409:
	ldr	r3, .L1571+128
	ldr	r3, [r3]	@ float
	ldr	r1, .L1571+188
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+124
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L412
	mov	r3, #0
	mov	r4, r3
.L412:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+132
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L413:
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1571+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1571+112
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1571+140
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1571+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L1571+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L417
.L414:
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L417
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L417
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L417:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
.L419:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
.L421:
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
.L420:
	ldr	r3, .L1571+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L422
	ldr	r3, .L1571+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L424
.L422:
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L424:
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L1571+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L426
.L425:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L426:
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
.L427:
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L428:
	ldr	r3, .L1571+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L432
.L431:
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L432
.L429:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L432:
	ldr	r3, .L1571+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L1571+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
.L436:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L433
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
.L433:
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L437:
	ldr	r3, .L1571+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L438
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L438
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L1571+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+136
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L440
.L438:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L440:
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L1571+136
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1571+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1571+116
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L442
.L441:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L442:
	ldr	r3, .L1571+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L446
.L445:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
.L446:
	ldr	r3, .L1571+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1571+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L448
.L443:
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L448:
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L449
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
.L449:
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L450
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L450:
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L1571+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L452
.L451:
	ldr	r3, .L1571+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1571+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1571+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1571+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1571+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1571+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L452:
	ldr	r3, .L1571+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L1571+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L1571+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L453:
	ldr	r3, .L1571+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1571+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L455
	ldr	r3, .L1571+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L455:
	ldr	r3, .L1571+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L1571+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L1571+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L456:
	ldr	r3, .L1571+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L1571+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L457
	ldr	r3, .L1571+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
.L457:
	ldr	r3, .L1571+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L454:
	ldr	r3, .L1571+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1571+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L459
.L458:
	ldr	r3, .L1571+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L460
	ldr	r3, .L1571+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L459
.L460:
	ldr	r3, .L1571+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L459:
	ldr	r3, .L1571+184
	ldr	r3, [r3]	@ float
	ldr	r1, .L1571+188
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+212
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L462
	mov	r3, #0
	mov	r4, r3
.L462:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1571+224
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+212
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L1571+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L463
	ldr	r3, .L1571+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L463:
	ldr	r3, .L1571+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1571+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1571+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1571+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1571+208
	ldr	r3, [r3]	@ float
	ldr	r2, .L1571+212
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1571+216
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1571+220
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1571+224
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L1574
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L467
.L464:
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L467
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L467:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L469
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
.L469:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L470
.L471:
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
.L470:
	ldr	r3, .L1574
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1574+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L474
.L472:
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L474:
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1574+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L476
.L475:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L476
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L476:
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L477
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
.L477:
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L478:
	ldr	r3, .L1574+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L481:
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
.L479:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L482
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L482:
	ldr	r3, .L1574+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1574+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
.L486:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L483
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
.L483:
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L487
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L487:
	ldr	r3, .L1574+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L488
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L488
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L488
	ldr	r3, .L1574+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L490
.L488:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L490
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L490:
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
	ldr	r3, .L1574
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1574+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1574+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L492
.L491:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L492:
	ldr	r3, .L1574+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L496
.L495:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
.L496:
	ldr	r3, .L1574
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+4
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1574+32
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L498
.L493:
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L498:
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L499
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
.L499:
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L500:
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L1574
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L502
.L501:
	ldr	r3, .L1574+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1574+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1574+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1574+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L1574+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L502:
	ldr	r3, .L1574+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L503
	ldr	r3, .L1574+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1574+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
.L503:
	ldr	r3, .L1574+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L1574+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L1574+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
.L505:
	ldr	r3, .L1574+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L506
	ldr	r3, .L1574+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L1574+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
.L506:
	ldr	r3, .L1574+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1574+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1574+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L504
.L507:
	ldr	r3, .L1574+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L504:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L509
.L508:
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L509
.L510:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L509:
	ldr	r3, .L1574+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1574+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L512
	mov	r3, #0
	mov	r4, r3
.L512:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L513:
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1574+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1574+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1574+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L514
	ldr	r3, .L1574+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L517
.L514:
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L517:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L519
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
.L519:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
.L521:
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
.L520:
	ldr	r3, .L1574+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L1574+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L524
.L522:
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L524:
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L525
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1574+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L526
.L525:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1574+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L526:
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1575
.L1576:
	.align	2
.L1574:
	.word	s9_backoff
	.word	_x_s9_backoff
	.word	delta
	.word	s9_evt2
	.word	s9_evt0
	.word	s9_evt1
	.word	_x_s9_l0
	.word	_x_s9_l1
	.word	_x_s9_x
	.word	s9_l0
	.word	s9_l1
	.word	s9_lambda
	.word	_x_s9_lambda
	.word	s9_x
	.word	_x_s8_evt2
	.word	_x_s8_evt0
	.word	_x_s8_evt1
	.word	-1074790400
	.word	s8_lambda
	.word	_x_s8_lambda
	.word	_x_s8_backoff
	.word	_x_s8_x
	.word	s8_backoff
	.word	s8_x
	.word	_x_s8_l1
	.word	_x_s8_l0
	.word	s8_l0
	.word	s8_l1
	.word	s8_evt2
	.word	s8_evt0
	.word	s8_evt1
	.word	_x_s7_evt2
	.word	_x_s7_evt1
	.word	_x_s7_evt0
	.word	1095761920
	.word	s7_x
	.word	s7_backoff
	.word	_x_s7_backoff
	.word	s7_evt2
	.word	s7_evt0
	.word	s7_evt1
	.word	s7_lambda
	.word	_x_s7_lambda
	.word	_x_s7_x
	.word	_x_s7_l0
	.word	_x_s7_l1
	.word	s7_l1
	.word	s7_l0
	.word	delta
.L1575:
	beq	.L527
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
.L527:
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L528:
	ldr	r3, .L1574+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L531
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
.L531:
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L529
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
.L529:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L532:
	ldr	r3, .L1574+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L1574+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
.L536:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
.L533:
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L537
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L537
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L537:
	ldr	r3, .L1574+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L538
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1574+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L540
.L538:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L540:
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L541
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L1574+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1574+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1574+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L542
.L541:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L542
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L542:
	ldr	r3, .L1574+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L546
.L545:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
.L546:
	ldr	r3, .L1574+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1574+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L548
.L543:
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L548:
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
.L549:
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L550:
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L1574+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L552
.L551:
	ldr	r3, .L1574+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1574+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1574+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1574+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L552
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L552
	ldr	r3, .L1574+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L552:
	ldr	r3, .L1574+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L1574+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1574+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
.L553:
	ldr	r3, .L1574+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1574+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L555
	ldr	r3, .L1574+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
.L555:
	ldr	r3, .L1574+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L556
	ldr	r3, .L1574+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L1574+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
.L556:
	ldr	r3, .L1574+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L557
	ldr	r3, .L1574+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L557
	ldr	r3, .L1574+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
.L557:
	ldr	r3, .L1574+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L554:
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
.L558:
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
.L560:
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L559:
	ldr	r3, .L1574+148
	ldr	r3, [r3]	@ float
	ldr	r1, .L1574+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+168
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L562
	mov	r3, #0
	mov	r4, r3
.L562:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+172
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L563:
	ldr	r3, .L1574+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1574+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1574+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1574+140
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1574+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1574+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+148
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
.L564:
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L567:
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L569
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
.L569:
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
.L571:
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L572
.L570:
	ldr	r3, .L1574+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+148
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L572
	ldr	r3, .L1574+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L574
.L572:
	ldr	r3, .L1574+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1574+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L574:
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1574+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L576
.L575:
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1574+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1574+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L576
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L576
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L576:
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L577
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
.L577:
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1574+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1574+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L578:
	ldr	r3, .L1574+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L581
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L581
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
.L581:
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
.L579:
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L1574+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L1574+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L582
	ldr	r3, .L1574+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1574+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L582:
	ldr	r3, .L1574+164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1574+168
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1574+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L586
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
.L586:
	ldr	r3, .L1574+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L583
	ldr	r3, .L1574+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
.L583:
	ldr	r3, .L1574+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1574+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L587
	ldr	r3, .L1574+192
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L587
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L587:
	ldr	r3, .L1577+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L588
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L588
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	ldr	r3, .L1577+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L590
.L588:
	ldr	r3, .L1577+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1577+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1577+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1577+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L590:
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L591
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L591
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L591
	ldr	r3, .L1577+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1577+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1577+132
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L592
.L591:
	ldr	r3, .L1577+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1577+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1577+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1577+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L592:
	ldr	r3, .L1577+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1577+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L595
	ldr	r3, .L1577+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L596
.L595:
	ldr	r3, .L1577+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1577+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
.L596:
	ldr	r3, .L1577+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L593
	ldr	r3, .L1577+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L598
.L593:
	ldr	r3, .L1577+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1577+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L598
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L598:
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L599
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L599
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
.L599:
	ldr	r3, .L1577+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1577+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1577+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1577+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L600
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L600
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L600:
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L1577+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L602
.L601:
	ldr	r3, .L1577+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1577+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1577+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1577+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L602
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1577
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L602:
	ldr	r3, .L1577+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L603
	ldr	r3, .L1577+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L603
	ldr	r3, .L1577+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
.L603:
	ldr	r3, .L1577+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L1577+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L605
	ldr	r3, .L1577+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
.L605:
	ldr	r3, .L1577+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L606
	ldr	r3, .L1577+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1577+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
.L606:
	ldr	r3, .L1577+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L607
	ldr	r3, .L1577+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1577+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L604
.L607:
	ldr	r3, .L1577+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L604:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L609
.L608:
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L610
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L609
.L610:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L609:
	ldr	r3, .L1577+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1577+128
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+64
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L612
	mov	r3, #0
	mov	r4, r3
.L612:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L613:
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1577+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1577+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1577+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L614
	ldr	r3, .L1577+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L617
.L614:
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L617:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L619
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L620
.L619:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L620
.L621:
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L622
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
.L620:
	ldr	r3, .L1577+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L622
	ldr	r3, .L1577+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L624
.L622:
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L624
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L624:
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L625
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L625
	ldr	r3, .L1577+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L626
.L625:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L626
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L626:
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
.L627:
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L628:
	ldr	r3, .L1577+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L632
.L631:
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L632
.L629:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L632:
	ldr	r3, .L1577+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L1577+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L636
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
.L636:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
.L633:
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L637
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L637
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L637:
	ldr	r3, .L1577+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L638
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L638
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L638
	ldr	r3, .L1577+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L640
.L638:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L640
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L640
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L640:
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L641
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L641
	ldr	r3, .L1577+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1577+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1577+132
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L642
.L641:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L642
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L642:
	ldr	r3, .L1577+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	b	.L1578
.L1579:
	.align	2
.L1577:
	.word	s7_evt2
	.word	s7_evt0
	.word	s7_evt1
	.word	s7_lambda
	.word	s7_x
	.word	_x_s7_backoff
	.word	s7_backoff
	.word	_x_s7_l0
	.word	_x_s7_l1
	.word	s7_l1
	.word	s7_l0
	.word	_x_s7_lambda
	.word	_x_s7_x
	.word	_x_s6_evt2
	.word	_x_s6_evt0
	.word	_x_s6_evt1
	.word	_x_s6_lambda
	.word	s6_lambda
	.word	_x_s6_backoff
	.word	_x_s6_x
	.word	s6_backoff
	.word	s6_x
	.word	_x_s6_l1
	.word	_x_s6_l0
	.word	s6_l0
	.word	s6_l1
	.word	s6_evt2
	.word	s6_evt0
	.word	s6_evt1
	.word	_x_s5_evt2
	.word	_x_s5_evt1
	.word	_x_s5_evt0
	.word	1095761920
	.word	-1074790400
	.word	s5_lambda
	.word	_x_s5_lambda
	.word	_x_s5_backoff
	.word	_x_s5_x
	.word	s5_evt0
	.word	s5_evt1
	.word	s5_backoff
	.word	s5_x
	.word	_x_s5_l1
	.word	_x_s5_l0
	.word	s5_l0
	.word	s5_l1
	.word	delta
	.word	s5_evt2
.L1578:
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L645
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L646
.L645:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
.L646:
	ldr	r3, .L1577+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1577+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L648
.L643:
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L648
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L648
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L648
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L648:
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L650
.L649:
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L650
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L650
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L650:
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L651
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L651
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L651
	ldr	r3, .L1577+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L652
.L651:
	ldr	r3, .L1577+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1577+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L1577+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1577+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1577+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L652:
	ldr	r3, .L1577+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L653
	ldr	r3, .L1577+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L653
	ldr	r3, .L1577+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L654
.L653:
	ldr	r3, .L1577+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1577+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L655
	ldr	r3, .L1577+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L654
.L655:
	ldr	r3, .L1577+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1577+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1577+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L654
.L656:
	ldr	r3, .L1577+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L1577+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L657
	ldr	r3, .L1577+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L654
.L657:
	ldr	r3, .L1577+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L654:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L659
.L658:
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L659
.L660:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L659:
	ldr	r3, .L1577+144
	ldr	r3, [r3]	@ float
	ldr	r1, .L1577+128
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+140
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L662
	mov	r3, #0
	mov	r4, r3
.L662:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L663
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L663
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L663:
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1577+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1577+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1577+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L664
	ldr	r3, .L1577+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+144
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L667
.L664:
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L667
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L667:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
.L669:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L671
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
.L671:
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L672
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L672
.L670:
	ldr	r3, .L1577+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+144
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L672
	ldr	r3, .L1577+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L674
.L672:
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L674
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L674:
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1577+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L676
.L675:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L676:
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L677
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L677
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
.L677:
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L678
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L678
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L678:
	ldr	r3, .L1577+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
.L681:
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
.L679:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L682
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L682
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L682:
	ldr	r3, .L1577+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1577+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L686
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
.L686:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
.L683:
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L687
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L687
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L687:
	ldr	r3, .L1577+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+164
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L688
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L688
	ldr	r3, .L1577+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L690
.L688:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L690
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L690:
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L691
	ldr	r3, .L1577+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1577+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1577+132
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L692
.L691:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L692
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L692:
	ldr	r3, .L1577+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L695
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L696
.L695:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L693
.L696:
	ldr	r3, .L1577+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+144
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L693
	ldr	r3, .L1577+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L698
.L693:
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L698
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L698
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L698:
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L700
.L699:
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L700
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L700
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L700
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L700
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L700
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L700:
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1577+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1577+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L701
	ldr	r3, .L1577+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1577+164
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L702
.L701:
	ldr	r3, .L1577+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L1577+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L1577+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L1577+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L1577+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L702
	ldr	r3, .L1577+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L702:
	ldr	r3, .L1580+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L703
	ldr	r3, .L1580+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L703
	ldr	r3, .L1580+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
.L703:
	ldr	r3, .L1580+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L705
	ldr	r3, .L1580+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L705
	ldr	r3, .L1580+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
.L705:
	ldr	r3, .L1580+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L706
	ldr	r3, .L1580+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1580+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
.L706:
	ldr	r3, .L1580+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1580+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L707
	ldr	r3, .L1580+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
.L707:
	ldr	r3, .L1580+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L704:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
.L708:
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L710
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
.L710:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L709:
	ldr	r3, .L1580+28
	ldr	r3, [r3]	@ float
	ldr	r1, .L1580+152
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L712
	mov	r3, #0
	mov	r4, r3
.L712:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L713
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L713
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L713:
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1580+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1580+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1580+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1580+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L717
.L714:
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L717
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L717
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L717:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
.L719:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L721
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
.L721:
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
.L720:
	ldr	r3, .L1580+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L1580+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L724
.L722:
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L724
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L724
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L724
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L724:
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	ldr	r3, .L1580+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L726
.L725:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L726
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L726
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L726:
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
.L727:
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L728
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L728
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L728
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L728
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L728:
	ldr	r3, .L1580+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L731
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
.L731:
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L729
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
.L729:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L732:
	ldr	r3, .L1580+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1580+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L736
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
.L736:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L733
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
.L733:
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L737:
	ldr	r3, .L1580+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L738
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L738
	ldr	r3, .L1580+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L740
.L738:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L740
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L740:
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L741
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L741
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L741
	ldr	r3, .L1580+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1580+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1580+84
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L742
.L741:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L742:
	ldr	r3, .L1580+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L746
.L745:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L743
.L746:
	ldr	r3, .L1580+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L743
	ldr	r3, .L1580+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L748
.L743:
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L748
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L748
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L748
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L748:
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L749
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
.L749:
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L750
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L750:
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L751
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L751
	ldr	r3, .L1580+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L752
.L751:
	ldr	r3, .L1580+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L1580+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L752
	ldr	r3, .L1580+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L1580+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L752
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L1580+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L752:
	ldr	r3, .L1580+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L753
	ldr	r3, .L1580+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L753
	ldr	r3, .L1580+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
.L753:
	ldr	r3, .L1580+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L1580+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	ldr	r3, .L1580+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
.L755:
	ldr	r3, .L1580+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L756
	ldr	r3, .L1580+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L756
	ldr	r3, .L1580+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
.L756:
	ldr	r3, .L1580+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L757
	ldr	r3, .L1580+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L757
	ldr	r3, .L1580+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L754
.L757:
	ldr	r3, .L1580+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L754:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L758
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
.L758:
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L759
.L760:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L759:
	ldr	r3, .L1580+96
	ldr	r3, [r3]	@ float
	ldr	r1, .L1580+152
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L762
	mov	r3, #0
	mov	r4, r3
.L762:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+100
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L763
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L763
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L763:
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	b	.L1581
.L1582:
	.align	2
.L1580:
	.word	s5_evt0
	.word	s5_evt1
	.word	_x_s4_evt2
	.word	_x_s4_evt0
	.word	_x_s4_evt1
	.word	_x_s4_l0
	.word	_x_s4_l1
	.word	_x_s4_backoff
	.word	_x_s4_lambda
	.word	_x_s4_x
	.word	s4_l0
	.word	s4_l1
	.word	s4_lambda
	.word	s4_x
	.word	s4_backoff
	.word	s4_evt2
	.word	s4_evt0
	.word	s4_evt1
	.word	_x_s3_evt2
	.word	_x_s3_evt0
	.word	_x_s3_evt1
	.word	-1074790400
	.word	s3_lambda
	.word	_x_s3_lambda
	.word	_x_s3_backoff
	.word	_x_s3_x
	.word	s3_backoff
	.word	s3_x
	.word	_x_s3_l1
	.word	_x_s3_l0
	.word	s3_l0
	.word	s3_l1
	.word	s3_evt2
	.word	s3_evt0
	.word	s3_evt1
	.word	_x_s2_evt2
	.word	_x_s2_evt1
	.word	_x_s2_evt0
	.word	1095761920
	.word	s2_lambda
	.word	_x_s2_lambda
	.word	s2_x
	.word	_x_s2_l1
	.word	_x_s2_l0
	.word	s2_backoff
	.word	_x_s2_backoff
	.word	_x_s2_x
	.word	s2_l0
	.word	s2_l1
	.word	delta
	.word	s2_evt1
	.word	s2_evt2
	.word	s2_evt0
.L1581:
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1580+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1580+108
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1580+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1580+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L767
.L764:
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L767:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L769
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L769:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L771
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
.L771:
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
.L770:
	ldr	r3, .L1580+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L1580+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L774
.L772:
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L774
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L774
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L774:
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	ldr	r3, .L1580+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L776
.L775:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L776
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L776
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L776:
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
.L777:
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L778
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L778
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L778:
	ldr	r3, .L1580+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L781
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L781
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
.L781:
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L779
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
.L779:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L782:
	ldr	r3, .L1580+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L1580+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L786
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
.L786:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L783
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
.L783:
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L787:
	ldr	r3, .L1580+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+108
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L788
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L788
	ldr	r3, .L1580+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+104
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L790
.L788:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L790
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L790:
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L791
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L791
	ldr	r3, .L1580+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1580+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1580+84
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L792
.L791:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L792:
	ldr	r3, .L1580+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L793
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L795
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L796
.L795:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L793
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L793
.L796:
	ldr	r3, .L1580+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L793
	ldr	r3, .L1580+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L798
.L793:
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L798
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L798
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L798:
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L799
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L799
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
.L799:
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L800
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L800
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L800:
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L801
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L801
	ldr	r3, .L1580+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+108
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L802
.L801:
	ldr	r3, .L1580+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L1580+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L802
	ldr	r3, .L1580+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L1580+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L802
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L802
	ldr	r3, .L1580+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L802:
	ldr	r3, .L1580+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L803
	ldr	r3, .L1580+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L803
	ldr	r3, .L1580+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
.L803:
	ldr	r3, .L1580+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1580+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L805
	ldr	r3, .L1580+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
.L805:
	ldr	r3, .L1580+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L806
	ldr	r3, .L1580+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L806
	ldr	r3, .L1580+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
.L806:
	ldr	r3, .L1580+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L807
	ldr	r3, .L1580+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L807
	ldr	r3, .L1580+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L804
.L807:
	ldr	r3, .L1580+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L804:
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L808
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L809
.L808:
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L810
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L809
.L810:
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L809:
	ldr	r3, .L1580+180
	ldr	r3, [r3]	@ float
	ldr	r1, .L1580+152
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+160
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L812
	mov	r3, #0
	mov	r4, r3
.L812:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+184
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L813
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L813
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L813:
	ldr	r3, .L1580+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1580+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1580+156
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+160
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1580+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1580+184
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L814
	ldr	r3, .L1580+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L817
.L814:
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1580+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L817
	ldr	r3, .L1580+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L817
	ldr	r3, .L1580+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L817:
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L819
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L820
.L819:
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L821
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L820
.L821:
	ldr	r3, .L1580+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L822
	ldr	r3, .L1580+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L822
.L820:
	ldr	r3, .L1580+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L1580+180
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L822
	ldr	r3, .L1580+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L824
.L822:
	ldr	r3, .L1580+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L824
	ldr	r3, .L1580+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L824
	ldr	r3, .L1580+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L824
	ldr	r3, .L1580+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1580+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L824:
	ldr	r3, .L1580+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L825
	ldr	r3, .L1580+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L825
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L825
	ldr	r3, .L1583+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L826
.L825:
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L826
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L826
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L826
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L826
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L826
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L826:
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L827
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L827
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L828
.L827:
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L828
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L828
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L828
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L828:
	ldr	r3, .L1583+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L831
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L832
.L831:
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L829
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L829
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L832
.L829:
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L832
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L832
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L832
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L832
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L832:
	ldr	r3, .L1583+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1583+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L836
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
.L836:
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L833
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
.L833:
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L837
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L837
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L837:
	ldr	r3, .L1583+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L838
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L838
	ldr	r3, .L1583+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L840
.L838:
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L840
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L840
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L840:
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L841
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L841
	ldr	r3, .L1583+52
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1583+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1583+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L842
.L841:
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L842
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L842
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L842:
	ldr	r3, .L1583+4
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L845
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L846
.L845:
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L843
.L846:
	ldr	r3, .L1583+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L843
	ldr	r3, .L1583+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L848
.L843:
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L848
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L848
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L848
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L848:
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L849
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L849
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
.L849:
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L850
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L850
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L850:
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L851
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L851
	ldr	r3, .L1583+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L852
.L851:
	ldr	r3, .L1583+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L852
	ldr	r3, .L1583+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L1583+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L852
	ldr	r3, .L1583+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L852
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L852
	ldr	r3, .L1583+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L852:
	ldr	r3, .L1583+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L853
	ldr	r3, .L1583+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L853
	ldr	r3, .L1583+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
.L853:
	ldr	r3, .L1583+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1583+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L855
	ldr	r3, .L1583+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
.L855:
	ldr	r3, .L1583+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L856
	ldr	r3, .L1583+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L856
	ldr	r3, .L1583+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
.L856:
	ldr	r3, .L1583+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L857
	ldr	r3, .L1583+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L857
	ldr	r3, .L1583+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L854
.L857:
	ldr	r3, .L1583+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L854:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L858
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L859
.L858:
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L860
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L859
.L860:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L859:
	ldr	r3, .L1583+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1583+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L862
	mov	r3, #0
	mov	r4, r3
.L862:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L863
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L863
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L863:
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1583+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1583+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1583+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L864
	ldr	r3, .L1583+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L867
.L864:
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L867
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L867:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L869
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
.L869:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L871
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L870
.L871:
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L872
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L872
.L870:
	ldr	r3, .L1583+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L872
	ldr	r3, .L1583+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L874
.L872:
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L874
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L874
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L874:
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L875
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L875
	ldr	r3, .L1583+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L876
.L875:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L876
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L876
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L876:
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L877
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L877
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
.L877:
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L878
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L878
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L878:
	ldr	r3, .L1583+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L879
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L881
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
.L881:
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L879
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L879
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
.L879:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L882
	ldr	r3, .L1583+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L882
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	b	.L1584
.L1585:
	.align	2
.L1583:
	.word	s2_evt1
	.word	s2_lambda
	.word	_x_s2_lambda
	.word	_x_s2_l0
	.word	_x_s2_l1
	.word	s2_l0
	.word	s2_l1
	.word	delta
	.word	s2_evt2
	.word	s2_evt0
	.word	_x_s2_x
	.word	s2_x
	.word	_x_s2_backoff
	.word	s2_backoff
	.word	_x_s1_evt2
	.word	_x_s1_evt0
	.word	_x_s1_evt1
	.word	-1074790400
	.word	s1_lambda
	.word	_x_s1_lambda
	.word	_x_s1_backoff
	.word	_x_s1_x
	.word	s1_backoff
	.word	s1_x
	.word	_x_s1_l1
	.word	_x_s1_l0
	.word	s1_l0
	.word	s1_l1
	.word	s1_evt2
	.word	s1_evt0
	.word	s1_evt1
	.word	_x_s0_evt2
	.word	_x_s0_evt1
	.word	_x_s0_evt0
	.word	1095761920
	.word	_x_s0_lambda
	.word	_x_s0_x
	.word	s0_lambda
	.word	s0_x
	.word	_x_s0_l0
	.word	_x_s0_l1
	.word	s0_l1
	.word	s0_l0
	.word	delta
	.word	s0_evt2
	.word	s0_evt0
	.word	s0_evt1
	.word	s0_backoff
	.word	_x_s0_backoff
.L1584:
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L882:
	ldr	r3, .L1583+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L883
	ldr	r3, .L1583+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L883
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L886
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
.L886:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L883
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
.L883:
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L887
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L887
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L887:
	ldr	r3, .L1583+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L888
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L888
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L888
	ldr	r3, .L1583+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L890
.L888:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L890
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L890
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L890:
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L891
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L891
	ldr	r3, .L1583+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1583+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1583+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L892
.L891:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L892
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L892
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L892:
	ldr	r3, .L1583+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L893
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L895
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L896
.L895:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L893
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L893
.L896:
	ldr	r3, .L1583+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L893
	ldr	r3, .L1583+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L898
.L893:
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L898
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L898
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L898
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L898:
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L899
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L899
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L900
.L899:
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L900
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L900
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L900
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L900
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L900
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L900:
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L901
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L901
	ldr	r3, .L1583+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L902
.L901:
	ldr	r3, .L1583+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1583+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1583+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1583+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L902
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L902
	ldr	r3, .L1583+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L902:
	ldr	r3, .L1583+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L903
	ldr	r3, .L1583+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L903
	ldr	r3, .L1583+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L904
.L903:
	ldr	r3, .L1583+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1583+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L905
	ldr	r3, .L1583+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L904
.L905:
	ldr	r3, .L1583+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L906
	ldr	r3, .L1583+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L906
	ldr	r3, .L1583+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L904
.L906:
	ldr	r3, .L1583+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L907
	ldr	r3, .L1583+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L907
	ldr	r3, .L1583+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L904
.L907:
	ldr	r3, .L1583+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L904:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L908
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
.L908:
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L910
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L909
.L910:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L909:
	ldr	r3, .L1583+192
	ldr	r3, [r3]	@ float
	ldr	r1, .L1583+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+140
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L912
	mov	r3, #0
	mov	r4, r3
.L912:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+144
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L913
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L913
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L913:
	ldr	r3, .L1583+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1583+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1583+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1583+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1583+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L914
	ldr	r3, .L1583+188
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+192
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L917
.L914:
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L917
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L917:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L919
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L920
.L919:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L921
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L920
.L921:
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L922
.L920:
	ldr	r3, .L1583+188
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+192
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L922
	ldr	r3, .L1583+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L924
.L922:
	ldr	r3, .L1583+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L1583+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L924
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L924
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L924:
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L925
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L925
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L925
	ldr	r3, .L1583+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L926
.L925:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1583+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1583+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L926
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L926
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L926:
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L927
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L927
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
.L927:
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L1583+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L1583+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L928
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L928
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L928:
	ldr	r3, .L1583+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L929
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L931
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L932
.L931:
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L929
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L929
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L932
.L929:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L932
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L932
	ldr	r3, .L1583+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L932
	ldr	r3, .L1583+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L932
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L932
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L932:
	ldr	r3, .L1583+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+140
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1583+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L936
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
.L936:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L933
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
.L933:
	ldr	r3, .L1583+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1583+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L937
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L937
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L937:
	ldr	r3, .L1583+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+152
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L938
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L938
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L938
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L938
	ldr	r3, .L1583+192
	ldr	r3, [r3]	@ float
	ldr	r2, .L1583+188
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L940
.L938:
	ldr	r3, .L1583+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1583+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1583+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1583+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L940
	ldr	r3, .L1583+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L940
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L940:
	ldr	r3, .L1583+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L941
	ldr	r3, .L1583+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L941
	ldr	r3, .L1583+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L941
	ldr	r3, .L1583+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1583+192
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1586
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L942
.L941:
	ldr	r3, .L1586+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1586+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1586+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1586+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L942
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L942
	ldr	r3, .L1586+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L942:
	ldr	r3, .L1586+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1586+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1586+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L945
	ldr	r3, .L1586+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L946
.L945:
	ldr	r3, .L1586+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1586+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L943
.L946:
	ldr	r3, .L1586+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1586+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L943
	ldr	r3, .L1586+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L948
.L943:
	ldr	r3, .L1586+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L948
	ldr	r3, .L1586+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L948
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L948
	ldr	r3, .L1586+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L948:
	ldr	r3, .L1586+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L949
	ldr	r3, .L1586+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L949
	ldr	r3, .L1586+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
.L949:
	ldr	r3, .L1586+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1586+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1586+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1586+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L950
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L950
	ldr	r3, .L1586+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L950:
	ldr	r3, .L1586+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L951
	ldr	r3, .L1586+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1586+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L951
	ldr	r3, .L1586+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1586+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L952
.L951:
	ldr	r3, .L1586+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L952
	ldr	r3, .L1586+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L952
	ldr	r3, .L1586+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L952
	ldr	r3, .L1586+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L952
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L952
	ldr	r3, .L1586+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L952:
	ldr	r3, .L1586+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L953
	ldr	r3, .L1586+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L953
	ldr	r3, .L1586+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
.L953:
	ldr	r3, .L1586+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L955
	ldr	r3, .L1586+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L955
	ldr	r3, .L1586+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
.L955:
	ldr	r3, .L1586+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L956
	ldr	r3, .L1586+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L956
	ldr	r3, .L1586+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
.L956:
	ldr	r3, .L1586+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L1586+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L957
	ldr	r3, .L1586+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L954
.L957:
	ldr	r3, .L1586+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1586+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L954:
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L958
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
.L958:
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L960
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
.L960:
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L961
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L959
.L961:
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L959:
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1586+72
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L962
	mov	r3, #0
	mov	r4, r3
.L962:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L963
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L963
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L963:
	ldr	r3, .L1586+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L964
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L964
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L964:
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L965
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1586+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1586+80
	ldr	r2, [r3]
	ldr	r3, .L1586+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L207
.L965:
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1586+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L967
	ldr	r3, .L1586+80
	ldr	r2, [r3]
	ldr	r3, .L1586+88
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L969
.L967:
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L969
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L969:
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L970
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L970
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L970
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L970
	ldr	r3, .L1586+80
	ldr	r2, [r3]
	ldr	r3, .L1586+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L970
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L971
.L970:
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L971
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L971
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L971:
	ldr	r3, .L1586+80
	ldr	r2, [r3]
	ldr	r3, .L1586+88
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L972
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L973
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
.L973:
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L975
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
.L975:
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L972
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
.L972:
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L974
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L974
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L974
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L974:
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L976
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L976
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L976
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L977
.L976:
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L978
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L977
.L978:
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L977
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L977
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L977:
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L979
	ldr	r3, .L1586+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1586+72
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L979
	ldr	r3, .L1586+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1586+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L981
.L979:
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L981
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L982
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L982
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L981
.L982:
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L981
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L981
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L981
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L981:
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L983
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L983
	ldr	r3, .L1586+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1586+72
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L984
	mov	r3, #0
	mov	r4, r3
.L984:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L983
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L985
.L983:
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L985
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L986
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L985
.L986:
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L985
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L985
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L985
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L985:
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1586+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1586+72
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L988
	mov	r3, #0
	mov	r4, r3
.L988:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L987
	ldr	r3, .L1586+84
	ldr	r2, [r3]
	ldr	r3, .L1586+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L987
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L987
	ldr	r3, .L1586+80
	ldr	r2, [r3]
	ldr	r3, .L1586+88
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	beq	.L990
.L987:
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L990
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L990
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L990:
	ldr	r3, .L1586+80
	ldr	r2, [r3]
	ldr	r3, .L1586+88
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	bne	.L991
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L991
	ldr	r3, .L1586+84
	ldr	r2, [r3]
	ldr	r3, .L1586+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L991
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L991
	ldr	r3, .L1586+80
	ldr	r3, [r3]
	cmp	r3, #13
	ble	.L993
.L991:
	ldr	r3, .L1586+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L994
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L993
.L994:
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L993
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L993:
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L995
	ldr	r3, .L1586+80
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L995
	ldr	r3, .L1586+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L995
	ldr	r3, .L1586+84
	ldr	r2, [r3]
	ldr	r3, .L1586+80
	ldr	r3, [r3]
	cmp	r2, r3
	b	.L1587
.L1588:
	.align	2
.L1586:
	.word	-1074790400
	.word	_x_s0_l0
	.word	_x_s0_l1
	.word	s0_l1
	.word	s0_l0
	.word	delta
	.word	s0_evt2
	.word	s0_evt0
	.word	s0_lambda
	.word	_x_s0_lambda
	.word	s0_backoff
	.word	_x_s0_backoff
	.word	_x_s0_x
	.word	s0_x
	.word	_x_bus_evt2
	.word	_x_bus_evt0
	.word	_x_bus_evt1
	.word	_x_bus_x
	.word	1095761920
	.word	bus_x
	.word	bus_j
	.word	bus_cd_id
	.word	_x_bus_j
	.word	delta
	.word	bus_evt2
	.word	bus_evt0
	.word	bus_evt1
	.word	_x_bus_l0
	.word	_x_bus_l1
	.word	bus_l0
	.word	bus_l1
	.word	_x_delta
	.word	s0_evt1
	.word	s0_evt2
	.word	s0_evt0
	.word	s0_evt1
	.word	s1_evt2
	.word	s1_evt0
	.word	s1_evt1
	.word	s5_evt2
	.word	s5_evt0
	.word	s5_evt1
	.word	s6_evt2
	.word	s6_evt0
	.word	s6_evt1
	.word	s7_evt2
	.word	s7_evt0
	.word	s7_evt1
	.word	s8_evt2
	.word	s8_evt0
	.word	s8_evt1
	.word	s9_evt2
	.word	s9_evt0
	.word	s9_evt1
	.word	s10_evt2
	.word	s10_evt0
	.word	s10_evt1
	.word	s11_evt2
	.word	s11_evt0
	.word	s11_evt1
	.word	s12_evt2
	.word	s12_evt0
	.word	s12_evt1
	.word	s13_evt2
	.word	s13_evt0
	.word	s13_evt1
	.word	s2_evt2
	.word	s2_evt0
	.word	s2_evt1
	.word	s14_evt2
	.word	s14_evt0
	.word	s14_evt1
	.word	s4_evt2
	.word	s4_evt0
	.word	s4_evt1
	.word	s3_evt2
	.word	s3_evt0
	.word	s3_evt1
.L1587:
	bne	.L995
	ldr	r3, .L1586+88
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L997
.L995:
	ldr	r3, .L1586+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L997
	ldr	r3, .L1586+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1586+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L998
	ldr	r3, .L1586+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L997
.L998:
	ldr	r3, .L1586+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L1586+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L997
	ldr	r3, .L1586+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L997
	ldr	r3, .L1586+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
.L997:
	ldr	r3, .L1586+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1000
	ldr	r3, .L1586+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1001
.L1000:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1001:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1003
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1004
.L1003:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1004:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1005
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1006
.L1005:
	ldr	r3, .L1586+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1006:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1007
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1008
.L1007:
	ldr	r3, .L1586+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1008:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1009
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1010
.L1009:
	ldr	r3, .L1586+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1010:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1011
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1012
.L1011:
	ldr	r3, .L1586+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1012:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1013
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1014
.L1013:
	ldr	r3, .L1586+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1014:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1015
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1015
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1016
.L1015:
	ldr	r3, .L1586+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1016:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1017
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1018
.L1017:
	ldr	r3, .L1586+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1018:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1019
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1020
.L1019:
	ldr	r3, .L1586+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1020:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1021
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1022
.L1021:
	ldr	r3, .L1586+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1022:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1023
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1024
.L1023:
	ldr	r3, .L1586+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1024:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1025
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1025
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1026
.L1025:
	ldr	r3, .L1586+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1026:
	ldr	r3, .L1586+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1586+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1027
	ldr	r3, .L1586+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1028
.L1027:
	ldr	r3, .L1586+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1028:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1029
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1029
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1030
.L1029:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1030:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1031
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1031
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1032
.L1031:
	ldr	r3, .L1586+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1032:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1033
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1033
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1034
.L1033:
	ldr	r3, .L1586+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1034:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1035
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1036
.L1035:
	ldr	r3, .L1586+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1036:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1037
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1038
.L1037:
	ldr	r3, .L1586+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1038:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1039
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1039
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1040
.L1039:
	ldr	r3, .L1586+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1040:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1041
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1041
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1042
.L1041:
	ldr	r3, .L1586+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1042:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1043
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1043
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1044
.L1043:
	ldr	r3, .L1586+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1044:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1045
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1045
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1046
.L1045:
	ldr	r3, .L1586+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1046:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1047
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1048
.L1047:
	ldr	r3, .L1586+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1048:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1049
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1049
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1050
.L1049:
	ldr	r3, .L1586+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1050:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1051
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1052
.L1051:
	ldr	r3, .L1586+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1052:
	ldr	r3, .L1586+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1053
	ldr	r3, .L1586+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1053
	ldr	r3, .L1586+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1054
.L1053:
	ldr	r3, .L1586+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1054:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1055
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1056
.L1055:
	ldr	r3, .L1586+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1056:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1058
.L1057:
	ldr	r3, .L1586+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1058:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1059
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1059
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1060
.L1059:
	ldr	r3, .L1586+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1060:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1061
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1061
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1062
.L1061:
	ldr	r3, .L1586+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1062:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1063
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1064
.L1063:
	ldr	r3, .L1586+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1064:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1065
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1066
.L1065:
	ldr	r3, .L1586+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1066:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1067
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1067
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1068
.L1067:
	ldr	r3, .L1586+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1068:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1069
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1069
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1070
.L1069:
	ldr	r3, .L1586+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1070:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1071
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1071
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1072
.L1071:
	ldr	r3, .L1586+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1072:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1073
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1074
.L1073:
	ldr	r3, .L1586+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+244
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1074:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1075
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1075
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1076
.L1075:
	ldr	r3, .L1586+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1076:
	ldr	r3, .L1586+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1077
	ldr	r3, .L1586+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1077
	ldr	r3, .L1586+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1078
.L1077:
	ldr	r3, .L1586+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+280
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+284
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1078:
	ldr	r3, .L1586+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1079
	ldr	r3, .L1586+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1079
	ldr	r3, .L1586+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1080
.L1079:
	ldr	r3, .L1586+288
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1586+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1080:
	ldr	r3, .L1586+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1081
	ldr	r3, .L1586+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1081
	ldr	r3, .L1586+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1082
.L1081:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1082:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1083
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1083
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1084
.L1083:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1084:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1085
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1085
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1086
.L1085:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1086:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1087
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1087
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1088
.L1087:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1088:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1089
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1089
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1090
.L1089:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1090:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1091
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1091
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1092
.L1091:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1092:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1093
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1094
.L1093:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1094:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1095
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1095
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1096
.L1095:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1096:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1097
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1097
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1098
.L1097:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1098:
	ldr	r3, .L1589+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1099
	ldr	r3, .L1589+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1099
	ldr	r3, .L1589+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1100
.L1099:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1100:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1101
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1101
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1102
.L1101:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1102:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1103
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1104
.L1103:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1104:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1105
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1106
.L1105:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1106:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1107
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1107
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1108
.L1107:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1108:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1109
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1109
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1110
.L1109:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1110:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1111
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1111
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1112
.L1111:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1112:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1113
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1113
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1114
.L1113:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1114:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1115
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1115
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1116
.L1115:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1116:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1117
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1117
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1118
.L1117:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1118:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1119
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1120
.L1119:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1120:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1121
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1121
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1122
.L1121:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1122:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1123
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1124
.L1123:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1124:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1125
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1125
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1126
.L1125:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1126:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1127
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1127
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1128
.L1127:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1128:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1129
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1130
.L1129:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1130:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1131
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1131
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1132
.L1131:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1132:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1133
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1133
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1134
.L1133:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1134:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1135
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1135
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1136
.L1135:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1136:
	ldr	r3, .L1589
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L1589+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	ldr	r3, .L1589+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1138
.L1137:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1138:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1139
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1139
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1140
.L1139:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1140:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1141
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1141
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1142
.L1141:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1142:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1143
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1143
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1144
.L1143:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1144:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1145
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1146
.L1145:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1146:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1147
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1147
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1148
.L1147:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1148:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1149
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1149
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1150
.L1149:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1150:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1151
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1152
.L1151:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1152:
	ldr	r3, .L1589+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1153
	ldr	r3, .L1589+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1153
	ldr	r3, .L1589+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1154
.L1153:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1154:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1155
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1155
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1156
.L1155:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1156:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1157
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1157
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1158
.L1157:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1158:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1159
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1159
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1160
.L1159:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1160:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1161
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1161
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1162
.L1161:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1162:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1163
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1163
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1164
.L1163:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1164:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1165
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1165
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1166
.L1165:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1166:
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L1590
.L1591:
	.align	2
.L1589:
	.word	s5_evt2
	.word	s5_evt0
	.word	s5_evt1
	.word	s3_evt2
	.word	s3_evt0
	.word	s3_evt1
	.word	s6_evt2
	.word	s6_evt0
	.word	s6_evt1
	.word	s7_evt2
	.word	s7_evt0
	.word	s7_evt1
	.word	delta
	.word	s10_evt0
	.word	s9_evt2
	.word	s9_evt0
	.word	s9_evt1
	.word	s8_evt2
	.word	s8_evt0
	.word	s8_evt1
	.word	s7_evt2
	.word	s7_evt0
	.word	s7_evt1
	.word	s6_evt2
	.word	s6_evt0
	.word	s6_evt1
	.word	s5_evt2
	.word	s5_evt0
	.word	s5_evt1
	.word	s4_evt2
	.word	s4_evt0
	.word	s4_evt1
	.word	s3_evt2
	.word	s3_evt0
	.word	s3_evt1
	.word	s2_evt2
	.word	s2_evt0
	.word	s2_evt1
	.word	s0_evt2
	.word	s0_evt0
	.word	s0_evt1
	.word	s1_evt2
	.word	s1_evt0
	.word	s1_evt1
	.word	bus_evt2
	.word	bus_evt1
	.word	bus_evt0
	.word	s14_evt2
	.word	s14_evt1
	.word	s14_evt0
	.word	s13_evt2
	.word	s13_evt1
	.word	s13_evt0
	.word	s12_evt2
	.word	s12_evt1
	.word	s12_evt0
	.word	s11_evt2
	.word	s11_evt1
	.word	s11_evt0
	.word	s10_evt2
	.word	s10_evt1
.L1590:
	bne	.L1167
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1167
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1168
.L1167:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1168:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1169
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1169
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1170
.L1169:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1170:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1171
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1171
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1172
.L1171:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1172:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1173
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1173
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1174
.L1173:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1174:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1175
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1175
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1176
.L1175:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1176:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1177
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1177
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1178
.L1177:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1178:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1179
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1179
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1180
.L1179:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1180:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1181
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1181
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1182
.L1181:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1182:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1183
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1183
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1184
.L1183:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1184:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1185
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1185
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1186
.L1185:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1186:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1187
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1187
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1188
.L1187:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1188:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1189
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1189
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1190
.L1189:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1190:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1191
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1191
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1192
.L1191:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1192:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1193
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1193
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1194
.L1193:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1194:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1195
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1195
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1196
.L1195:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1196:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1197
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1197
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1198
.L1197:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1198:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1199
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1199
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1200
.L1199:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1200:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1201
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1201
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1202
.L1201:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1202:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1203
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1203
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1204
.L1203:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1204:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1205
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1205
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1206
.L1205:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1206:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1207
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1207
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1208
.L1207:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
.L1208:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1209
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1209
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1210
.L1209:
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1002
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1210
.L1002:
	ldr	r3, .L1589+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
.L1210:
	ldr	r3, .L1589+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1212
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1212
	ldr	r3, .L1589+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L1212:
	ldr	r3, .L1589+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1213
	ldr	r3, .L1589+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1214
	ldr	r3, .L1589+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1214
	ldr	r3, .L1589+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1214
	mov	r3, #1
	b	.L1215
.L1214:
	mov	r3, #0
.L1215:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1216
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1216
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1216:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1218
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1218
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1218:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1219
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1219
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1219:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1220
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1220
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1220:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1221
	ldr	r3, .L1589+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1221
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1221:
	ldr	r3, .L1589+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1222
	ldr	r3, .L1589+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1222
	ldr	r3, .L1589+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1222:
	ldr	r3, .L1589+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1223
	ldr	r3, .L1589+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1223
	ldr	r3, .L1589+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1223:
	ldr	r3, .L1589+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1224
	ldr	r3, .L1589+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1224
	ldr	r3, .L1589+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1224:
	ldr	r3, .L1589+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1225
	ldr	r3, .L1589+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1225
	ldr	r3, .L1589+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1225:
	ldr	r3, .L1589+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1226
	ldr	r3, .L1589+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1226
	ldr	r3, .L1589+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1226:
	ldr	r3, .L1589+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1227
	ldr	r3, .L1589+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1227
	ldr	r3, .L1589+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1227:
	ldr	r3, .L1589+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1228
	ldr	r3, .L1589+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1228
	ldr	r3, .L1589+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1228:
	ldr	r3, .L1589+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1229
	ldr	r3, .L1589+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1229
	ldr	r3, .L1589+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1229:
	ldr	r3, .L1589+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1230
	ldr	r3, .L1589+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1230
	ldr	r3, .L1589+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1217
.L1230:
	ldr	r3, .L1589+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1231
	ldr	r3, .L1589+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1231
	ldr	r3, .L1589+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1231
.L1217:
	mov	r3, #1
	b	.L1232
.L1231:
	mov	r3, #0
.L1232:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1589+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1233
	ldr	r3, .L1589+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1233
	ldr	r3, .L1589+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1233
	mov	r3, #1
	b	.L1234
.L1233:
	mov	r3, #0
.L1234:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1589+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1235
	ldr	r3, .L1589+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1235
	ldr	r3, .L1589+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1235:
	ldr	r3, .L1589+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1237
	ldr	r3, .L1589+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1237
	ldr	r3, .L1589+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1237:
	ldr	r3, .L1589+212
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1238
	ldr	r3, .L1589+216
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1238
	ldr	r3, .L1589+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1238:
	ldr	r3, .L1589+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1239
	ldr	r3, .L1589+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1239
	ldr	r3, .L1589+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1239:
	ldr	r3, .L1589+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1240
	ldr	r3, .L1589+240
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1240
	ldr	r3, .L1592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1240:
	ldr	r3, .L1592+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1241
	ldr	r3, .L1592+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1241
	ldr	r3, .L1592+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1241:
	ldr	r3, .L1592+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1242
	ldr	r3, .L1592+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1242
	ldr	r3, .L1592+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1242:
	ldr	r3, .L1592+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1243
	ldr	r3, .L1592+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1243
	ldr	r3, .L1592+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1243:
	ldr	r3, .L1592+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1244
	ldr	r3, .L1592+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1244
	ldr	r3, .L1592+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1244:
	ldr	r3, .L1592+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1245
	ldr	r3, .L1592+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1245
	ldr	r3, .L1592+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1245:
	ldr	r3, .L1592+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1246
	ldr	r3, .L1592+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1246
	ldr	r3, .L1592+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1246:
	ldr	r3, .L1592+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1247
	ldr	r3, .L1592+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1247
	ldr	r3, .L1592+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1247:
	ldr	r3, .L1592+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1248
	ldr	r3, .L1592+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1248
	ldr	r3, .L1592+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1248:
	ldr	r3, .L1592+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1249
	ldr	r3, .L1592+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1249
	ldr	r3, .L1592+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1236
.L1249:
	ldr	r3, .L1592+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1250
	ldr	r3, .L1592+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1250
	ldr	r3, .L1592+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1250
.L1236:
	mov	r3, #1
	b	.L1251
.L1250:
	mov	r3, #0
.L1251:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1252
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1252
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1252
	mov	r3, #1
	b	.L1253
.L1252:
	mov	r3, #0
.L1253:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1254
	ldr	r3, .L1592+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1254
	ldr	r3, .L1592+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1254:
	ldr	r3, .L1592+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1256
	ldr	r3, .L1592+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1256
	ldr	r3, .L1592+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1256:
	ldr	r3, .L1592+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1257
	ldr	r3, .L1592+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1257
	ldr	r3, .L1592+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1257:
	ldr	r3, .L1592+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1258
	ldr	r3, .L1592+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1258
	ldr	r3, .L1592+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1258:
	ldr	r3, .L1592+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1259
	ldr	r3, .L1592+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1259
	ldr	r3, .L1592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1259:
	ldr	r3, .L1592+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1260
	ldr	r3, .L1592+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1260
	ldr	r3, .L1592+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1260:
	ldr	r3, .L1592+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1261
	ldr	r3, .L1592+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1261
	ldr	r3, .L1592+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1261:
	ldr	r3, .L1592+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1262
	ldr	r3, .L1592+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1262
	ldr	r3, .L1592+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1262:
	ldr	r3, .L1592+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1263
	ldr	r3, .L1592+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1263
	ldr	r3, .L1592+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1263:
	ldr	r3, .L1592+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1264
	ldr	r3, .L1592+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1264
	ldr	r3, .L1592+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1264:
	ldr	r3, .L1592+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1265
	ldr	r3, .L1592+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1265
	ldr	r3, .L1592+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1265:
	ldr	r3, .L1592+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1266
	ldr	r3, .L1592+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1266
	ldr	r3, .L1592+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1266:
	ldr	r3, .L1592+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1267
	ldr	r3, .L1592+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1267
	ldr	r3, .L1592+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1267:
	ldr	r3, .L1592+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1268
	ldr	r3, .L1592+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1268
	ldr	r3, .L1592+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1255
.L1268:
	ldr	r3, .L1592+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1269
	ldr	r3, .L1592+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1269
	ldr	r3, .L1592+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1269
.L1255:
	mov	r3, #1
	b	.L1270
.L1269:
	mov	r3, #0
.L1270:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1271
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1271
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1271
	mov	r3, #1
	b	.L1272
.L1271:
	mov	r3, #0
.L1272:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1273
	ldr	r3, .L1592+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1273
	ldr	r3, .L1592+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1273:
	ldr	r3, .L1592+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1275
	ldr	r3, .L1592+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1275
	ldr	r3, .L1592+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1275:
	ldr	r3, .L1592+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1276
	ldr	r3, .L1592+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1276
	ldr	r3, .L1592+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1276:
	ldr	r3, .L1592+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1277
	ldr	r3, .L1592+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1277
	ldr	r3, .L1592+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1277:
	ldr	r3, .L1592+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1278
	ldr	r3, .L1592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1278
	ldr	r3, .L1592+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1278:
	ldr	r3, .L1592+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1279
	ldr	r3, .L1592+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1279
	ldr	r3, .L1592+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1279:
	ldr	r3, .L1592+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1280
	ldr	r3, .L1592+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1280
	ldr	r3, .L1592+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1280:
	ldr	r3, .L1592+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1281
	ldr	r3, .L1592+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1281
	ldr	r3, .L1592+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1281:
	ldr	r3, .L1592+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1282
	ldr	r3, .L1592+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1282
	ldr	r3, .L1592+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1282:
	ldr	r3, .L1592+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1283
	ldr	r3, .L1592+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1283
	ldr	r3, .L1592+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1283:
	ldr	r3, .L1592+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1284
	ldr	r3, .L1592+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1284
	ldr	r3, .L1592+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1284:
	ldr	r3, .L1592+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1285
	ldr	r3, .L1592+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1285
	ldr	r3, .L1592+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1285:
	ldr	r3, .L1592+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1286
	ldr	r3, .L1592+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1286
	ldr	r3, .L1592+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1286:
	ldr	r3, .L1592+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1287
	ldr	r3, .L1592+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1287
	ldr	r3, .L1592+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1274
.L1287:
	ldr	r3, .L1592+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1288
	ldr	r3, .L1592+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1288
	ldr	r3, .L1592+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1288
.L1274:
	mov	r3, #1
	b	.L1289
.L1288:
	mov	r3, #0
.L1289:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
.L1213:
	ldr	r3, .L1592+472
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L1290
	ldr	r3, .L1592+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1291
	ldr	r3, .L1592+384
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1291
	ldr	r3, .L1592+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1291
	mov	r3, #1
	b	.L1292
.L1291:
	mov	r3, #0
.L1292:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1293
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1293
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1293
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1293
	mov	r3, #1
	b	.L1294
.L1293:
	mov	r3, #0
.L1294:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1295
	ldr	r3, .L1592+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1295
	ldr	r3, .L1592+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1295
	mov	r3, #1
	b	.L1296
.L1295:
	mov	r3, #0
.L1296:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1297
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1297
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1297
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L1297
	mov	r3, #1
	b	.L1298
.L1297:
	mov	r3, #0
.L1298:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+248
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1299
	ldr	r3, .L1592+336
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1299
	ldr	r3, .L1592+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1299
	mov	r3, #1
	b	.L1300
.L1299:
	mov	r3, #0
.L1300:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1301
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1301
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1301
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L1301
	mov	r3, #1
	b	.L1302
.L1301:
	mov	r3, #0
.L1302:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1303
	ldr	r3, .L1592+208
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1303
	ldr	r3, .L1592+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1303
	mov	r3, #1
	b	.L1304
.L1303:
	mov	r3, #0
.L1304:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1305
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1305
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1305
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L1305
	mov	r3, #1
	b	.L1306
.L1305:
	mov	r3, #0
.L1306:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1307
	ldr	r3, .L1592+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1307
	ldr	r3, .L1592+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1307
	mov	r3, #1
	b	.L1308
.L1307:
	mov	r3, #0
.L1308:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1309
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1309
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1309
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L1309
	mov	r3, #1
	b	.L1310
.L1309:
	mov	r3, #0
.L1310:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1311
	ldr	r3, .L1592+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1311
	ldr	r3, .L1592+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1311
	mov	r3, #1
	b	.L1312
.L1311:
	mov	r3, #0
.L1312:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1313
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1313
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1313
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L1313
	mov	r3, #1
	b	.L1314
.L1313:
	mov	r3, #0
.L1314:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1315
	ldr	r3, .L1592+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1315
	ldr	r3, .L1592+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1315
	mov	r3, #1
	b	.L1316
.L1315:
	mov	r3, #0
.L1316:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1317
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1317
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1317
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L1317
	mov	r3, #1
	b	.L1318
.L1317:
	mov	r3, #0
.L1318:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1319
	ldr	r3, .L1592+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1319
	ldr	r3, .L1592+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1319
	mov	r3, #1
	b	.L1320
.L1319:
	mov	r3, #0
.L1320:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1321
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1321
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1321
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L1321
	mov	r3, #1
	b	.L1322
.L1321:
	mov	r3, #0
.L1322:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1323
	ldr	r3, .L1592+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1323
	ldr	r3, .L1592+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1323
	mov	r3, #1
	b	.L1324
.L1323:
	mov	r3, #0
.L1324:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1325
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1325
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1325
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L1325
	mov	r3, #1
	b	.L1326
.L1325:
	mov	r3, #0
.L1326:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1327
	ldr	r3, .L1592+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1327
	ldr	r3, .L1592+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1327
	mov	r3, #1
	b	.L1328
.L1327:
	mov	r3, #0
.L1328:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1329
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1329
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1329
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L1329
	mov	r3, #1
	b	.L1330
.L1329:
	mov	r3, #0
.L1330:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1331
	ldr	r3, .L1592
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1331
	ldr	r3, .L1592+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1331
	mov	r3, #1
	b	.L1332
.L1593:
	.align	2
.L1592:
	.word	s10_evt0
	.word	s9_evt2
	.word	s9_evt1
	.word	s9_evt0
	.word	s8_evt2
	.word	s8_evt1
	.word	s8_evt0
	.word	s7_evt2
	.word	s7_evt1
	.word	s7_evt0
	.word	s6_evt2
	.word	s6_evt1
	.word	s6_evt0
	.word	s5_evt2
	.word	s5_evt1
	.word	s5_evt0
	.word	s4_evt2
	.word	s4_evt1
	.word	s3_evt2
	.word	s3_evt1
	.word	s0_evt2
	.word	s1_evt2
	.word	s1_evt1
	.word	s1_evt0
	.word	s10_evt2
	.word	s10_evt1
	.word	s11_evt2
	.word	s11_evt0
	.word	s11_evt1
	.word	s12_evt2
	.word	s12_evt0
	.word	s12_evt1
	.word	s13_evt2
	.word	s13_evt0
	.word	s13_evt1
	.word	s14_evt0
	.word	s14_evt1
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_s14_l1
	.word	s14_l1
	.word	_x_s14_l0
	.word	s14_l0
	.word	_x_s4_evt0
	.word	s4_evt0
	.word	_x_s13_l1
	.word	s13_l1
	.word	_x_s4_x
	.word	s4_x
	.word	_x_bus_evt2
	.word	bus_evt2
	.word	_x_s3_evt0
	.word	s3_evt0
	.word	_x_s12_l1
	.word	s12_l1
	.word	_x_s3_x
	.word	s3_x
	.word	_x_s5_evt2
	.word	s5_evt2
	.word	_x_s5_evt1
	.word	s5_evt1
	.word	_x_s2_evt2
	.word	s2_evt2
	.word	_x_s3_l1
	.word	s3_l1
	.word	_x_s6_backoff
	.word	s6_backoff
	.word	_x_s2_evt1
	.word	s2_evt1
	.word	_x_s14_x
	.word	s14_x
	.word	_x_s0_lambda
	.word	s0_lambda
	.word	_x_bus_l0
	.word	bus_l0
	.word	_x_s5_x
	.word	s5_x
	.word	_x_s0_backoff
	.word	s0_backoff
	.word	_x_s0_x
	.word	s0_x
	.word	_x_s14_evt2
	.word	s14_evt2
	.word	_x_s2_evt0
	.word	s2_evt0
	.word	_x_s4_evt1
	.word	s4_evt1
	.word	_x_bus_evt0
	.word	bus_evt0
	.word	_x_bus_evt1
	.word	bus_evt1
	.word	_x_s1_l0
	.word	s1_l0
	.word	_x_s4_lambda
	.word	s4_lambda
	.word	_x_s0_evt0
	.word	s0_evt0
	.word	_x_bus_cd_id
	.word	bus_cd_id
	.word	_x_s6_evt2
	.word	s6_evt2
	.word	_x_s1_l1
	.word	s1_l1
	.word	_x_s4_backoff
	.word	s4_backoff
	.word	_x_s0_evt1
	.word	s0_evt1
	.word	_x_s12_x
	.word	s12_x
	.word	_x_s12_l0
	.word	s12_l0
	.word	_x_bus_j
	.word	bus_j
	.word	_x_s5_evt0
	.word	s5_evt0
	.word	_x_s0_evt2
	.word	s0_evt2
	.word	_x_delta
	.word	delta
	.word	_x_s4_l1
	.word	s4_l1
	.word	_x_s7_backoff
	.word	s7_backoff
	.word	_x_s3_evt1
	.word	s3_evt1
	.word	_x_s3_lambda
	.word	s3_lambda
	.word	_x_s0_l0
	.word	s0_l0
	.word	_x_s2_lambda
	.word	s2_lambda
	.word	_x_s3_evt2
	.word	s3_evt2
	.word	_x_s3_backoff
	.word	s3_backoff
	.word	_x_s0_l1
	.word	s0_l1
	.word	_x_s2_backoff
	.word	s2_backoff
	.word	_x_s1_x
	.word	s1_x
	.word	_x_s6_x
	.word	s6_x
	.word	_x_s1_backoff
	.word	s1_backoff
	.word	_x_s1_lambda
	.word	s1_lambda
	.word	_x_s2_l0
	.word	s2_l0
	.word	_x_s5_lambda
	.word	s5_lambda
	.word	_x_s1_evt0
	.word	s1_evt0
	.word	_x_s2_l1
	.word	s2_l1
	.word	_x_s5_backoff
	.word	s5_backoff
	.word	_x_s1_evt1
	.word	s1_evt1
	.word	_x_s13_x
	.word	s13_x
	.word	_x_s1_evt2
	.word	s1_evt2
	.word	_x_s4_evt2
	.word	s4_evt2
	.word	_x_bus_l1
	.word	bus_l1
	.word	_x_s9_evt0
	.word	s9_evt0
	.word	_x_s2_x
	.word	s2_x
	.word	_x_s3_l0
	.word	s3_l0
	.word	_x_s6_lambda
	.word	s6_lambda
	.word	_x_s6_evt0
	.word	s6_evt0
	.word	_x_s6_evt1
	.word	s6_evt1
	.word	_x_s7_x
	.word	s7_x
	.word	_x_s4_l0
	.word	s4_l0
	.word	_x_s7_lambda
	.word	s7_lambda
	.word	_x_s7_evt0
	.word	s7_evt0
	.word	_x_s7_evt1
	.word	s7_evt1
	.word	_x_s7_evt2
	.word	s7_evt2
	.word	_x_s8_x
	.word	s8_x
	.word	_x_s5_l1
	.word	s5_l1
	.word	_x_s8_backoff
	.word	s8_backoff
	.word	_x_s5_l0
	.word	s5_l0
	.word	_x_s8_lambda
	.word	s8_lambda
	.word	_x_s8_evt0
	.word	s8_evt0
	.word	_x_s8_evt1
	.word	s8_evt1
	.word	_x_s8_evt2
	.word	s8_evt2
	.word	_x_s9_x
	.word	s9_x
	.word	_x_s6_l1
	.word	s6_l1
	.word	_x_s9_backoff
	.word	s9_backoff
	.word	_x_s6_l0
	.word	s6_l0
	.word	_x_s9_lambda
	.word	s9_lambda
	.word	_x_s9_evt1
	.word	s9_evt1
	.word	_x_s9_evt2
	.word	s9_evt2
	.word	_x_s12_lambda
	.word	s12_lambda
	.word	_x_s9_l0
	.word	s9_l0
	.word	_x_s10_x
	.word	s10_x
	.word	_x_s7_l1
	.word	s7_l1
	.word	_x_s10_backoff
	.word	s10_backoff
	.word	_x_s7_l0
	.word	s7_l0
	.word	_x_s10_lambda
	.word	s10_lambda
	.word	_x_bus_x
	.word	bus_x
	.word	_x_s10_evt0
	.word	s10_evt0
	.word	_x_s10_evt1
	.word	s10_evt1
	.word	_x_s10_evt2
	.word	s10_evt2
	.word	_x_s13_lambda
	.word	s13_lambda
	.word	_x_s10_l0
	.word	s10_l0
	.word	_x_s11_x
	.word	s11_x
	.word	_x_s8_l1
	.word	s8_l1
	.word	_x_s11_backoff
	.word	s11_backoff
	.word	_x_s8_l0
	.word	s8_l0
	.word	_x_s11_lambda
	.word	s11_lambda
	.word	_x_s11_evt0
	.word	s11_evt0
	.word	_x_s11_evt1
	.word	s11_evt1
	.word	_x_s11_evt2
	.word	s11_evt2
	.word	_x_s14_lambda
	.word	s14_lambda
	.word	_x_s11_l0
	.word	s11_l0
	.word	_x_s9_l1
	.word	s9_l1
	.word	_x_s12_backoff
	.word	s12_backoff
	.word	_x_s12_evt0
	.word	s12_evt0
	.word	_x_s12_evt1
	.word	s12_evt1
	.word	_x_s12_evt2
	.word	s12_evt2
	.word	_x_s10_l1
	.word	s10_l1
	.word	_x_s13_backoff
	.word	s13_backoff
	.word	_x_s13_evt0
	.word	s13_evt0
	.word	_x_s13_evt1
	.word	s13_evt1
	.word	_x_s13_evt2
	.word	s13_evt2
	.word	_x_s13_l0
	.word	s13_l0
	.word	_x_s11_l1
	.word	s11_l1
	.word	_x_s14_backoff
	.word	s14_backoff
	.word	_x_s14_evt0
	.word	s14_evt0
	.word	_x_s14_evt1
	.word	s14_evt1
.L1331:
	mov	r3, #0
.L1332:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1333
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1333
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1333
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L1333
	mov	r3, #1
	b	.L1334
.L1333:
	mov	r3, #0
.L1334:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1335
	ldr	r3, .L1592+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1335
	ldr	r3, .L1592+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1335
	mov	r3, #1
	b	.L1336
.L1335:
	mov	r3, #0
.L1336:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1337
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1337
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1337
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L1337
	mov	r3, #1
	b	.L1338
.L1337:
	mov	r3, #0
.L1338:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1339
	ldr	r3, .L1592+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1339
	ldr	r3, .L1592+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1339
	mov	r3, #1
	b	.L1340
.L1339:
	mov	r3, #0
.L1340:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1341
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1341
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1341
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L1341
	mov	r3, #1
	b	.L1342
.L1341:
	mov	r3, #0
.L1342:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1343
	ldr	r3, .L1592+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1343
	ldr	r3, .L1592+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1343
	mov	r3, #1
	b	.L1344
.L1343:
	mov	r3, #0
.L1344:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1345
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1345
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L1345
	mov	r3, #1
	b	.L1346
.L1345:
	mov	r3, #0
.L1346:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1592+328
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1347
	ldr	r3, .L1592+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1347
	ldr	r3, .L1592+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1347
	mov	r3, #1
	b	.L1348
.L1347:
	mov	r3, #0
.L1348:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1592+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1349
	ldr	r3, .L1592+352
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1349
	ldr	r3, .L1592+360
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1349
	ldr	r3, .L1592+392
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L1349
	mov	r3, #1
	b	.L1350
.L1349:
	mov	r3, #0
.L1350:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
.L1290:
	ldr	r3, .L1592+472
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+148
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L1351
	ldr	r3, .L1592+152
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1352
	mov	r3, #0
	mov	r4, r3
.L1352:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L207
.L1351:
	ldr	r3, .L1592+152
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L1353
	ldr	r3, .L1592+472
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1592+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1592+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
.L1353:
	mov	r3, #1
	b	.L1355
.L207:
	mov	r3, #0
.L1355:
	str	r3, [fp, #-24]
	ldr	r3, .L1592+148
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+152
	str	r3, [r2]	@ float
	ldr	r3, .L1592+156
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+160
	strb	r2, [r3]
	ldr	r3, .L1592+164
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+168
	strb	r2, [r3]
	ldr	r3, .L1592+172
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+176
	strb	r2, [r3]
	ldr	r3, .L1592+180
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+184
	strb	r2, [r3]
	ldr	r3, .L1592+188
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+192
	str	r3, [r2]	@ float
	ldr	r3, .L1592+196
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+200
	strb	r2, [r3]
	ldr	r3, .L1592+204
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+208
	strb	r2, [r3]
	ldr	r3, .L1592+212
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+216
	strb	r2, [r3]
	ldr	r3, .L1592+220
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+224
	str	r3, [r2]	@ float
	ldr	r3, .L1592+228
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+232
	strb	r2, [r3]
	ldr	r3, .L1592+236
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+240
	strb	r2, [r3]
	ldr	r3, .L1592+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+248
	strb	r2, [r3]
	ldr	r3, .L1592+252
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+256
	strb	r2, [r3]
	ldr	r3, .L1592+260
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+264
	str	r3, [r2]	@ float
	ldr	r3, .L1592+268
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+272
	strb	r2, [r3]
	ldr	r3, .L1592+276
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+280
	str	r3, [r2]	@ float
	ldr	r3, .L1592+284
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+288
	str	r3, [r2]	@ float
	ldr	r3, .L1592+292
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+296
	strb	r2, [r3]
	ldr	r3, .L1592+300
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+304
	str	r3, [r2]	@ float
	ldr	r3, .L1592+308
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+312
	str	r3, [r2]	@ float
	ldr	r3, .L1592+316
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+320
	str	r3, [r2]	@ float
	ldr	r3, .L1592+324
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+328
	strb	r2, [r3]
	ldr	r3, .L1592+332
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+336
	strb	r2, [r3]
	ldr	r3, .L1592+340
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+344
	strb	r2, [r3]
	ldr	r3, .L1592+348
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+352
	strb	r2, [r3]
	ldr	r3, .L1592+356
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+360
	strb	r2, [r3]
	ldr	r3, .L1592+364
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+368
	strb	r2, [r3]
	ldr	r3, .L1592+372
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+376
	str	r3, [r2]	@ float
	ldr	r3, .L1592+380
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+384
	strb	r2, [r3]
	ldr	r3, .L1592+388
	ldr	r3, [r3]
	ldr	r2, .L1592+392
	str	r3, [r2]
	ldr	r3, .L1592+396
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+400
	strb	r2, [r3]
	ldr	r3, .L1592+404
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+408
	strb	r2, [r3]
	ldr	r3, .L1592+412
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+416
	str	r3, [r2]	@ float
	ldr	r3, .L1592+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+424
	strb	r2, [r3]
	ldr	r3, .L1592+428
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+432
	str	r3, [r2]	@ float
	ldr	r3, .L1592+436
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+440
	strb	r2, [r3]
	ldr	r3, .L1592+444
	ldr	r3, [r3]
	ldr	r2, .L1592+448
	str	r3, [r2]
	ldr	r3, .L1592+452
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+456
	strb	r2, [r3]
	ldr	r3, .L1592+460
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+464
	strb	r2, [r3]
	ldr	r3, .L1592+468
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+472
	str	r3, [r2]	@ float
	ldr	r3, .L1592+476
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+480
	strb	r2, [r3]
	ldr	r3, .L1592+484
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+488
	str	r3, [r2]	@ float
	ldr	r3, .L1592+492
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+496
	strb	r2, [r3]
	ldr	r3, .L1592+500
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+504
	str	r3, [r2]	@ float
	ldr	r3, .L1592+508
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+512
	strb	r2, [r3]
	ldr	r3, .L1592+516
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+520
	str	r3, [r2]	@ float
	ldr	r3, .L1592+524
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+528
	strb	r2, [r3]
	ldr	r3, .L1592+532
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+536
	str	r3, [r2]	@ float
	ldr	r3, .L1592+540
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+544
	strb	r2, [r3]
	ldr	r3, .L1592+548
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+552
	str	r3, [r2]	@ float
	ldr	r3, .L1592+556
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+560
	str	r3, [r2]	@ float
	ldr	r3, .L1592+564
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+568
	str	r3, [r2]	@ float
	ldr	r3, .L1592+572
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+576
	str	r3, [r2]	@ float
	ldr	r3, .L1592+580
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+584
	str	r3, [r2]	@ float
	ldr	r3, .L1592+588
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+592
	strb	r2, [r3]
	ldr	r3, .L1592+596
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+600
	str	r3, [r2]	@ float
	ldr	r3, .L1592+604
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+608
	strb	r2, [r3]
	ldr	r3, .L1592+612
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+616
	strb	r2, [r3]
	ldr	r3, .L1592+620
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+624
	str	r3, [r2]	@ float
	ldr	r3, .L1592+628
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+632
	strb	r2, [r3]
	ldr	r3, .L1592+636
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+640
	str	r3, [r2]	@ float
	ldr	r3, .L1592+644
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+648
	strb	r2, [r3]
	ldr	r3, .L1592+652
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+656
	strb	r2, [r3]
	ldr	r3, .L1592+660
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+664
	strb	r2, [r3]
	ldr	r3, .L1592+668
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+672
	strb	r2, [r3]
	ldr	r3, .L1592+676
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+680
	str	r3, [r2]	@ float
	ldr	r3, .L1592+684
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+688
	strb	r2, [r3]
	ldr	r3, .L1592+692
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+696
	str	r3, [r2]	@ float
	ldr	r3, .L1592+700
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+704
	strb	r2, [r3]
	ldr	r3, .L1592+708
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+712
	strb	r2, [r3]
	ldr	r3, .L1592+716
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+720
	str	r3, [r2]	@ float
	ldr	r3, .L1592+724
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+728
	strb	r2, [r3]
	ldr	r3, .L1592+732
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+736
	str	r3, [r2]	@ float
	ldr	r3, .L1592+740
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+744
	strb	r2, [r3]
	ldr	r3, .L1592+748
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+752
	strb	r2, [r3]
	ldr	r3, .L1592+756
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+760
	strb	r2, [r3]
	ldr	r3, .L1592+764
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+768
	str	r3, [r2]	@ float
	ldr	r3, .L1592+772
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+776
	strb	r2, [r3]
	ldr	r3, .L1592+780
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+784
	str	r3, [r2]	@ float
	ldr	r3, .L1592+788
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+792
	strb	r2, [r3]
	ldr	r3, .L1592+796
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+800
	str	r3, [r2]	@ float
	ldr	r3, .L1592+804
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+808
	strb	r2, [r3]
	ldr	r3, .L1592+812
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+816
	strb	r2, [r3]
	ldr	r3, .L1592+820
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+824
	strb	r2, [r3]
	ldr	r3, .L1592+828
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+832
	str	r3, [r2]	@ float
	ldr	r3, .L1592+836
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+840
	strb	r2, [r3]
	ldr	r3, .L1592+844
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+848
	str	r3, [r2]	@ float
	ldr	r3, .L1592+852
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+856
	strb	r2, [r3]
	ldr	r3, .L1592+860
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+864
	str	r3, [r2]	@ float
	ldr	r3, .L1592+868
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+872
	strb	r2, [r3]
	ldr	r3, .L1592+876
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+880
	strb	r2, [r3]
	ldr	r3, .L1592+884
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+888
	str	r3, [r2]	@ float
	ldr	r3, .L1592+892
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+896
	strb	r2, [r3]
	ldr	r3, .L1592+900
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+904
	str	r3, [r2]	@ float
	ldr	r3, .L1592+908
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+912
	strb	r2, [r3]
	ldr	r3, .L1592+916
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+920
	str	r3, [r2]	@ float
	ldr	r3, .L1592+924
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+928
	strb	r2, [r3]
	ldr	r3, .L1592+932
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+936
	str	r3, [r2]	@ float
	ldr	r3, .L1592+940
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+944
	str	r3, [r2]	@ float
	ldr	r3, .L1592+948
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+952
	strb	r2, [r3]
	ldr	r3, .L1592+956
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+960
	strb	r2, [r3]
	ldr	r3, .L1592+964
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+968
	strb	r2, [r3]
	ldr	r3, .L1592+972
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+976
	str	r3, [r2]	@ float
	ldr	r3, .L1592+980
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+984
	strb	r2, [r3]
	ldr	r3, .L1592+988
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+992
	str	r3, [r2]	@ float
	ldr	r3, .L1592+996
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1000
	strb	r2, [r3]
	ldr	r3, .L1592+1004
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+1008
	str	r3, [r2]	@ float
	ldr	r3, .L1592+1012
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1016
	strb	r2, [r3]
	ldr	r3, .L1592+1020
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+1024
	str	r3, [r2]	@ float
	ldr	r3, .L1592+1028
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1032
	strb	r2, [r3]
	ldr	r3, .L1592+1036
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1040
	strb	r2, [r3]
	ldr	r3, .L1592+1044
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1048
	strb	r2, [r3]
	ldr	r3, .L1592+1052
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+1056
	str	r3, [r2]	@ float
	ldr	r3, .L1592+1060
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1064
	strb	r2, [r3]
	ldr	r3, .L1592+1068
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1072
	strb	r2, [r3]
	ldr	r3, .L1592+1076
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+1080
	str	r3, [r2]	@ float
	ldr	r3, .L1592+1084
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1088
	strb	r2, [r3]
	ldr	r3, .L1592+1092
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1096
	strb	r2, [r3]
	ldr	r3, .L1592+1100
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1104
	strb	r2, [r3]
	ldr	r3, .L1592+1108
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1112
	strb	r2, [r3]
	ldr	r3, .L1592+1116
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+1120
	str	r3, [r2]	@ float
	ldr	r3, .L1592+1124
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1128
	strb	r2, [r3]
	ldr	r3, .L1592+1132
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1136
	strb	r2, [r3]
	ldr	r3, .L1592+1140
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1144
	strb	r2, [r3]
	ldr	r3, .L1592+1148
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1152
	strb	r2, [r3]
	ldr	r3, .L1592+1156
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1160
	strb	r2, [r3]
	ldr	r3, .L1592+1164
	ldr	r3, [r3]	@ float
	ldr	r2, .L1592+1168
	str	r3, [r2]	@ float
	ldr	r3, .L1592+1172
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1176
	strb	r2, [r3]
	ldr	r3, .L1592+1180
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1592+1184
	strb	r2, [r3]
.L201:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L1356
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
