	.file	"508631.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_assert
	.type	__VERIFIER_assert, @function
__VERIFIER_assert:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 0
	jne	.L5
	nop
.L3:
	mov	eax, 0
	call	__VERIFIER_error@PLT
.L5:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.globl	a
	.bss
	.align 32
	.type	a, @object
	.size	a, 20000
a:
	.zero	20000
	.globl	b
	.align 32
	.type	b, @object
	.size	b, 400
b:
	.zero	400
	.globl	x
	.align 32
	.type	x, @object
	.size	x, 400
x:
	.zero	400
	.text
	.type	fabs, @function
fabs:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm0, QWORD PTR -24[rbp]
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	jb	.L12
	movsd	xmm0, QWORD PTR -24[rbp]
	movsd	QWORD PTR -8[rbp], xmm0
	jmp	.L9
.L12:
	movsd	xmm0, QWORD PTR -24[rbp]
	movq	xmm1, QWORD PTR .LC1[rip]
	xorpd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
.L9:
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	fabs, .-fabs
	.globl	main
	.type	main, @function
main:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -28[rbp], 50
	mov	DWORD PTR -24[rbp], 5
	movsd	xmm0, QWORD PTR .LC2[rip]
	movsd	QWORD PTR -8[rbp], xmm0
	mov	DWORD PTR -36[rbp], 0
	jmp	.L14
.L18:
	pxor	xmm0, xmm0
	movsd	QWORD PTR -16[rbp], xmm0
	mov	DWORD PTR -32[rbp], 0
	jmp	.L15
.L17:
	mov	eax, DWORD PTR -36[rbp]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR -32[rbp]
	add	eax, 1
	add	eax, edx
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	mov	eax, DWORD PTR -32[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	QWORD PTR [rdx+rax], xmm0
	mov	eax, DWORD PTR -36[rbp]
	cmp	eax, DWORD PTR -32[rbp]
	jne	.L16
	mov	eax, DWORD PTR -32[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	movsd	xmm0, QWORD PTR .LC3[rip]
	mulsd	xmm0, xmm1
	mov	eax, DWORD PTR -32[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	QWORD PTR [rdx+rax], xmm0
.L16:
	mov	eax, DWORD PTR -32[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movsd	xmm1, QWORD PTR -16[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	add	DWORD PTR -32[rbp], 1
.L15:
	mov	eax, DWORD PTR -32[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jle	.L17
	cmp	DWORD PTR -36[rbp], 2
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, b[rip]
	movsd	xmm0, QWORD PTR -16[rbp]
	movsd	QWORD PTR [rdx+rax], xmm0
	add	DWORD PTR -36[rbp], 1
.L14:
	mov	eax, DWORD PTR -36[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jle	.L18
	mov	rcx, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -28[rbp]
	movq	xmm0, rcx
	mov	esi, edx
	mov	edi, eax
	call	ludcmp
	mov	DWORD PTR -20[rbp], eax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	main, .-main
	.globl	ludcmp
	.type	ludcmp, @function
ludcmp:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 864
	mov	DWORD PTR -852[rbp], edi
	mov	DWORD PTR -856[rbp], esi
	movsd	QWORD PTR -864[rbp], xmm0
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	cmp	DWORD PTR -856[rbp], 99
	jg	.L20
	pxor	xmm0, xmm0
	comisd	xmm0, QWORD PTR -864[rbp]
	jb	.L48
.L20:
	mov	eax, 999
	jmp	.L45
.L48:
	mov	DWORD PTR -836[rbp], 0
	jmp	.L24
.L36:
	mov	eax, DWORD PTR -836[rbp]
	cdqe
	imul	rax, rax, 408
	lea	rdx, a[rip]
	mov	rax, QWORD PTR [rax+rdx]
	movq	xmm0, rax
	call	fabs
	movsd	xmm1, QWORD PTR -864[rbp]
	comisd	xmm1, xmm0
	jb	.L49
	mov	eax, 1
	jmp	.L45
.L49:
	mov	eax, DWORD PTR -836[rbp]
	add	eax, 1
	mov	DWORD PTR -832[rbp], eax
	jmp	.L27
.L31:
	mov	eax, DWORD PTR -836[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -832[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movsd	QWORD PTR -824[rbp], xmm0
	cmp	DWORD PTR -836[rbp], 0
	je	.L28
	mov	DWORD PTR -828[rbp], 0
	jmp	.L29
.L30:
	mov	eax, DWORD PTR -828[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -832[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -836[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -828[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	mulsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR -824[rbp]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -824[rbp], xmm0
	add	DWORD PTR -828[rbp], 1
.L29:
	mov	eax, DWORD PTR -828[rbp]
	cmp	eax, DWORD PTR -836[rbp]
	jl	.L30
.L28:
	mov	eax, DWORD PTR -836[rbp]
	cdqe
	imul	rax, rax, 408
	lea	rdx, a[rip]
	movsd	xmm1, QWORD PTR [rax+rdx]
	movsd	xmm0, QWORD PTR -824[rbp]
	divsd	xmm0, xmm1
	mov	eax, DWORD PTR -836[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -832[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	QWORD PTR [rdx+rax], xmm0
	add	DWORD PTR -832[rbp], 1
.L27:
	mov	eax, DWORD PTR -832[rbp]
	cmp	eax, DWORD PTR -856[rbp]
	jle	.L31
	mov	eax, DWORD PTR -836[rbp]
	add	eax, 1
	mov	DWORD PTR -832[rbp], eax
	jmp	.L32
.L35:
	mov	eax, DWORD PTR -836[rbp]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR -832[rbp]
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movsd	QWORD PTR -824[rbp], xmm0
	mov	DWORD PTR -828[rbp], 0
	jmp	.L33
.L34:
	mov	eax, DWORD PTR -836[rbp]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR -828[rbp]
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -832[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -828[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	mulsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR -824[rbp]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -824[rbp], xmm0
	add	DWORD PTR -828[rbp], 1
.L33:
	mov	eax, DWORD PTR -828[rbp]
	cmp	eax, DWORD PTR -836[rbp]
	jle	.L34
	mov	eax, DWORD PTR -836[rbp]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR -832[rbp]
	movsx	rcx, eax
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm0, QWORD PTR -824[rbp]
	movsd	QWORD PTR [rdx+rax], xmm0
	add	DWORD PTR -832[rbp], 1
.L32:
	mov	eax, DWORD PTR -832[rbp]
	cmp	eax, DWORD PTR -856[rbp]
	jle	.L35
	add	DWORD PTR -836[rbp], 1
.L24:
	mov	eax, DWORD PTR -836[rbp]
	cmp	eax, DWORD PTR -856[rbp]
	jl	.L36
	movsd	xmm0, QWORD PTR b[rip]
	movsd	QWORD PTR -816[rbp], xmm0
	mov	DWORD PTR -836[rbp], 1
	jmp	.L37
.L40:
	mov	eax, DWORD PTR -836[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, b[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movsd	QWORD PTR -824[rbp], xmm0
	mov	DWORD PTR -832[rbp], 0
	jmp	.L38
.L39:
	mov	eax, DWORD PTR -832[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -836[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -832[rbp]
	cdqe
	movsd	xmm0, QWORD PTR -816[rbp+rax*8]
	mulsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR -824[rbp]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -824[rbp], xmm0
	add	DWORD PTR -832[rbp], 1
.L38:
	mov	eax, DWORD PTR -832[rbp]
	cmp	eax, DWORD PTR -836[rbp]
	jl	.L39
	mov	eax, DWORD PTR -836[rbp]
	cdqe
	movsd	xmm0, QWORD PTR -824[rbp]
	movsd	QWORD PTR -816[rbp+rax*8], xmm0
	add	DWORD PTR -836[rbp], 1
.L37:
	mov	eax, DWORD PTR -836[rbp]
	cmp	eax, DWORD PTR -856[rbp]
	jle	.L40
	mov	eax, DWORD PTR -856[rbp]
	cdqe
	movsd	xmm0, QWORD PTR -816[rbp+rax*8]
	mov	eax, DWORD PTR -856[rbp]
	cdqe
	imul	rax, rax, 408
	lea	rdx, a[rip]
	movsd	xmm1, QWORD PTR [rax+rdx]
	divsd	xmm0, xmm1
	mov	eax, DWORD PTR -856[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, x[rip]
	movsd	QWORD PTR [rdx+rax], xmm0
	mov	eax, DWORD PTR -856[rbp]
	sub	eax, 1
	mov	DWORD PTR -836[rbp], eax
	jmp	.L41
.L44:
	mov	eax, DWORD PTR -836[rbp]
	cdqe
	movsd	xmm0, QWORD PTR -816[rbp+rax*8]
	movsd	QWORD PTR -824[rbp], xmm0
	mov	eax, DWORD PTR -836[rbp]
	add	eax, 1
	mov	DWORD PTR -832[rbp], eax
	jmp	.L42
.L43:
	mov	eax, DWORD PTR -832[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -836[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	add	rax, rdx
	add	rax, rax
	add	rax, rcx
	lea	rdx, 0[0+rax*8]
	lea	rax, a[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -832[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, x[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	mulsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR -824[rbp]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -824[rbp], xmm0
	add	DWORD PTR -832[rbp], 1
.L42:
	mov	eax, DWORD PTR -832[rbp]
	cmp	eax, DWORD PTR -856[rbp]
	jle	.L43
	mov	eax, DWORD PTR -836[rbp]
	cdqe
	imul	rax, rax, 408
	lea	rdx, a[rip]
	movsd	xmm1, QWORD PTR [rax+rdx]
	movsd	xmm0, QWORD PTR -824[rbp]
	divsd	xmm0, xmm1
	mov	eax, DWORD PTR -836[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, x[rip]
	movsd	QWORD PTR [rdx+rax], xmm0
	sub	DWORD PTR -836[rbp], 1
.L41:
	cmp	DWORD PTR -836[rbp], 0
	jns	.L44
	mov	eax, 0
.L45:
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	ludcmp, .-ludcmp
	.section	.rodata
	.align 16
.LC1:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.align 8
.LC2:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC3:
	.long	0
	.long	1076101120
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"508631.c"
	.text
	.align	2
	.global	__VERIFIER_assert
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_assert, %function
__VERIFIER_assert:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L5
	nop
.L3:
	bl	__VERIFIER_error
.L5:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.comm	a,20000,8
	.comm	b,400,8
	.comm	x,400,8
	.global	__aeabi_dcmpge
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	fabs, %function
fabs:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	b	.L9
.L12:
	ldr	r4, [fp, #-28]
	ldr	r3, [fp, #-24]
	eor	r5, r3, #-2147483648
	str	r4, [fp, #-20]
	str	r5, [fp, #-16]
.L9:
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	fabs, .-fabs
	.global	__aeabi_i2d
	.global	__aeabi_dmul
	.global	__aeabi_dadd
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	mov	r3, #50
	str	r3, [fp, #-32]
	mov	r3, #5
	str	r3, [fp, #-28]
	ldr	r2, .L19
	ldr	r3, .L19+4
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-40]
	b	.L14
.L18:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L15
.L17:
	ldr	r3, [fp, #-40]
	add	r2, r3, #1
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	add	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	ldr	ip, .L19+8
	ldr	r2, [fp, #-40]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-36]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, ip, r3
	stm	r3, {r0-r1}
	ldr	r2, [fp, #-40]
	ldr	r3, [fp, #-36]
	cmp	r2, r3
	bne	.L16
	ldr	r1, .L19+8
	ldr	r2, [fp, #-40]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-36]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	ldr	r3, .L19+12
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	ip, .L19+8
	ldr	r2, [fp, #-40]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-36]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, ip, r3
	stm	r3, {r0-r1}
.L16:
	ldr	r1, .L19+8
	ldr	r2, [fp, #-40]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-36]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L15:
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-28]
	cmp	r2, r3
	ble	.L17
	ldr	r3, [fp, #-40]
	cmp	r3, #2
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r2, .L19+16
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	add	r1, r2, r3
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	str	r3, [fp, #-40]
.L14:
	ldr	r2, [fp, #-40]
	ldr	r3, [fp, #-28]
	cmp	r2, r3
	ble	.L18
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-28]
	ldr	r0, [fp, #-32]
	bl	ludcmp
	str	r0, [fp, #-24]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L20:
	.align	2
.L19:
	.word	-1598689907
	.word	1051772663
	.word	a
	.word	1076101120
	.word	b
	.size	main, .-main
	.global	__aeabi_dcmple
	.global	__aeabi_dsub
	.global	__aeabi_ddiv
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	ludcmp
	.syntax unified
	.arm
	.fpu softvfp
	.type	ludcmp, %function
ludcmp:
	@ args = 0, pretend = 0, frame = 848
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #848
	str	r0, [fp, #-840]
	str	r1, [fp, #-844]
	str	r2, [fp, #-852]
	str	r3, [fp, #-848]
	ldr	r3, .L52
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-844]
	cmp	r3, #99
	bgt	.L22
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #852
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L50
.L22:
	ldr	r3, .L52+4
	b	.L47
.L50:
	mov	r3, #0
	str	r3, [fp, #-832]
	b	.L26
.L38:
	ldr	r1, .L52+8
	ldr	r2, [fp, #-832]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	fabs
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #852
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L51
	mov	r3, #1
	b	.L47
.L51:
	ldr	r3, [fp, #-832]
	add	r3, r3, #1
	str	r3, [fp, #-828]
	b	.L29
.L33:
	ldr	r1, .L52+8
	ldr	r2, [fp, #-828]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-832]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-832]
	cmp	r3, #0
	beq	.L30
	mov	r3, #0
	str	r3, [fp, #-824]
	b	.L31
.L32:
	ldr	r1, .L52+8
	ldr	r2, [fp, #-828]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-824]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r0-r1}
	ldr	ip, .L52+8
	ldr	r2, [fp, #-824]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-832]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, ip, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #820
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-824]
	add	r3, r3, #1
	str	r3, [fp, #-824]
.L31:
	ldr	r2, [fp, #-824]
	ldr	r3, [fp, #-832]
	cmp	r2, r3
	blt	.L32
.L30:
	ldr	r1, .L52+8
	ldr	r2, [fp, #-832]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #820
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	ip, .L52+8
	ldr	r2, [fp, #-828]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-832]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, ip, r3
	stm	r3, {r0-r1}
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
.L29:
	ldr	r2, [fp, #-828]
	ldr	r3, [fp, #-844]
	cmp	r2, r3
	ble	.L33
	ldr	r3, [fp, #-832]
	add	r3, r3, #1
	str	r3, [fp, #-828]
	b	.L34
.L37:
	ldr	r3, [fp, #-832]
	add	r2, r3, #1
	ldr	r1, .L52+8
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-828]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	mov	r3, #0
	str	r3, [fp, #-824]
	b	.L35
.L36:
	ldr	r3, [fp, #-832]
	add	r2, r3, #1
	ldr	r1, .L52+8
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-824]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r0-r1}
	ldr	ip, .L52+8
	ldr	r2, [fp, #-824]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-828]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, ip, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #820
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-824]
	add	r3, r3, #1
	str	r3, [fp, #-824]
.L35:
	ldr	r2, [fp, #-824]
	ldr	r3, [fp, #-832]
	cmp	r2, r3
	ble	.L36
	ldr	r3, [fp, #-832]
	add	r2, r3, #1
	ldr	r1, .L52+8
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-828]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r1, r1, r3
	sub	r3, fp, #820
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
.L34:
	ldr	r2, [fp, #-828]
	ldr	r3, [fp, #-844]
	cmp	r2, r3
	ble	.L37
	ldr	r3, [fp, #-832]
	add	r3, r3, #1
	str	r3, [fp, #-832]
.L26:
	ldr	r2, [fp, #-832]
	ldr	r3, [fp, #-844]
	cmp	r2, r3
	blt	.L38
	ldr	r3, .L52+12
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-812]
	str	r3, [fp, #-808]
	mov	r3, #1
	str	r3, [fp, #-832]
	b	.L39
.L42:
	ldr	r2, .L52+12
	ldr	r3, [fp, #-832]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	mov	r3, #0
	str	r3, [fp, #-828]
	b	.L40
.L41:
	ldr	r1, .L52+8
	ldr	r2, [fp, #-832]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-828]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #3
	sub	r2, fp, #4
	add	r3, r2, r3
	sub	r3, r3, #808
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #820
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
.L40:
	ldr	r2, [fp, #-828]
	ldr	r3, [fp, #-832]
	cmp	r2, r3
	blt	.L41
	ldr	r3, [fp, #-832]
	lsl	r3, r3, #3
	sub	r2, fp, #4
	add	r3, r2, r3
	sub	r1, r3, #808
	sub	r3, fp, #820
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-832]
	add	r3, r3, #1
	str	r3, [fp, #-832]
.L39:
	ldr	r2, [fp, #-832]
	ldr	r3, [fp, #-844]
	cmp	r2, r3
	ble	.L42
	ldr	r3, [fp, #-844]
	lsl	r3, r3, #3
	sub	r2, fp, #4
	add	r3, r2, r3
	sub	r3, r3, #808
	ldmia	r3, {r0-r1}
	ldr	ip, .L52+8
	ldr	r2, [fp, #-844]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, ip, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L52+16
	ldr	r1, [fp, #-844]
	lsl	r1, r1, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-844]
	sub	r3, r3, #1
	str	r3, [fp, #-832]
	b	.L43
.L46:
	ldr	r3, [fp, #-832]
	lsl	r3, r3, #3
	sub	r2, fp, #4
	add	r3, r2, r3
	sub	r3, r3, #808
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-832]
	add	r3, r3, #1
	str	r3, [fp, #-828]
	b	.L44
.L45:
	ldr	r1, .L52+8
	ldr	r2, [fp, #-832]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	ldr	r2, [fp, #-828]
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r0-r1}
	ldr	r2, .L52+16
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #820
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-820]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
.L44:
	ldr	r2, [fp, #-828]
	ldr	r3, [fp, #-844]
	cmp	r2, r3
	ble	.L45
	ldr	r1, .L52+8
	ldr	r2, [fp, #-832]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r2, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldmia	r3, {r2-r3}
	sub	r1, fp, #820
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L52+16
	ldr	r1, [fp, #-832]
	lsl	r1, r1, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-832]
	sub	r3, r3, #1
	str	r3, [fp, #-832]
.L43:
	ldr	r3, [fp, #-832]
	cmp	r3, #0
	bge	.L46
	mov	r3, #0
.L47:
	ldr	r2, .L52
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L48
	bl	__stack_chk_fail
.L48:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L53:
	.align	2
.L52:
	.word	.LC0
	.word	999
	.word	a
	.word	b
	.word	x
	.size	ludcmp, .-ludcmp
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
