	.file	"738900.c"
	.intel_syntax noprefix
	.text
	.section	.rodata
	.align 16
	.type	s_box, @object
	.size	s_box, 16
s_box:
	.string	"\001\n\004\f\006\017\003\t\002\r\013\007\005"
	.ascii	"\b\016"
	.align 16
	.type	inv_s_box, @object
	.size	inv_s_box, 16
inv_s_box:
	.string	"\r"
	.ascii	"\b\006\002\f\004\013\016\007\001\n\003\t\017\005"
	.align 32
	.type	PermTable, @object
	.size	PermTable, 64
PermTable:
	.string	""
	.ascii	"\021\"30\001\022# 1\002\023\020!2\003\004\025&74\005\026'$5\006"
	.ascii	"\027\024%6\007\b\031*;8\t\032+(9\n\033\030):\013\f\035.?<\r\036"
	.ascii	"/,=\016\037\034->\017"
	.align 32
	.type	InvPermTable, @object
	.size	InvPermTable, 64
InvPermTable:
	.string	""
	.ascii	"\005\n\017\020\025\032\037 %*/05:?\f\001\006\013\034\021\026"
	.ascii	"\033,!&+<16;\b\r\002\007\030\035\022\027(-\"'8=27\004\t\016\003"
	.ascii	"\024\031\036\023$).#49>3"
	.align 32
	.type	Constant, @object
	.size	Constant, 49
Constant:
	.string	""
	.ascii	"\001\003\007\017\037>=;7/\036<93'\016\035:5+\026,\0300!\002\005"
	.ascii	"\013\027.\03481#\006\r\0336-\0324)\022$\b\021\"\004"
	.text
	.type	convert64bittoBinary, @function
convert64bittoBinary:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -8[rbp], 0
	mov	DWORD PTR -12[rbp], 63
	jmp	.L2
.L6:
	mov	eax, DWORD PTR -12[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	and	eax, 1
	test	eax, eax
	je	.L3
	mov	edi, 49
	call	putchar@PLT
	jmp	.L4
.L3:
	mov	edi, 48
	call	putchar@PLT
	add	DWORD PTR -8[rbp], 1
.L4:
	mov	eax, DWORD PTR -12[rbp]
	and	eax, 1
	test	eax, eax
	jne	.L5
	mov	edi, 32
	call	putchar@PLT
.L5:
	sub	DWORD PTR -12[rbp], 1
.L2:
	cmp	DWORD PTR -12[rbp], 0
	jns	.L6
	mov	edi, 10
	call	putchar@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	convert64bittoBinary, .-convert64bittoBinary
	.type	SubCells, @function
SubCells:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -24[rbp], 0
	mov	DWORD PTR -28[rbp], 0
	jmp	.L8
.L9:
	mov	eax, DWORD PTR -28[rbp]
	sal	eax, 2
	mov	rdx, QWORD PTR -40[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	and	eax, 15
	mov	QWORD PTR -16[rbp], rax
	lea	rdx, s_box[rip]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	sal	eax, 2
	mov	rdx, QWORD PTR -8[rbp]
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	xor	QWORD PTR -24[rbp], rax
	add	DWORD PTR -28[rbp], 1
.L8:
	cmp	DWORD PTR -28[rbp], 15
	jle	.L9
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	SubCells, .-SubCells
	.type	InvSubCells, @function
InvSubCells:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -24[rbp], 0
	mov	DWORD PTR -28[rbp], 0
	jmp	.L12
.L13:
	mov	eax, DWORD PTR -28[rbp]
	sal	eax, 2
	mov	rdx, QWORD PTR -40[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	and	eax, 15
	mov	QWORD PTR -16[rbp], rax
	lea	rdx, inv_s_box[rip]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	sal	eax, 2
	mov	rdx, QWORD PTR -8[rbp]
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	xor	QWORD PTR -24[rbp], rax
	add	DWORD PTR -28[rbp], 1
.L12:
	cmp	DWORD PTR -28[rbp], 15
	jle	.L13
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	InvSubCells, .-InvSubCells
	.type	PermBits, @function
PermBits:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	add	rsp, -128
	mov	QWORD PTR -120[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -108[rbp], 0
	jmp	.L16
.L17:
	mov	eax, DWORD PTR -108[rbp]
	mov	rdx, QWORD PTR -120[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	and	eax, 1
	mov	edx, eax
	mov	eax, DWORD PTR -108[rbp]
	cdqe
	mov	BYTE PTR -80[rbp+rax], dl
	add	DWORD PTR -108[rbp], 1
.L16:
	cmp	DWORD PTR -108[rbp], 63
	jle	.L17
	mov	QWORD PTR -104[rbp], 0
	mov	DWORD PTR -108[rbp], 0
	jmp	.L18
.L19:
	mov	eax, DWORD PTR -108[rbp]
	cdqe
	lea	rdx, PermTable[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	mov	BYTE PTR -109[rbp], al
	mov	eax, DWORD PTR -108[rbp]
	cdqe
	movzx	eax, BYTE PTR -80[rbp+rax]
	movzx	eax, al
	mov	QWORD PTR -96[rbp], rax
	movzx	eax, BYTE PTR -109[rbp]
	mov	rdx, QWORD PTR -96[rbp]
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	mov	QWORD PTR -88[rbp], rax
	mov	rax, QWORD PTR -88[rbp]
	xor	QWORD PTR -104[rbp], rax
	add	DWORD PTR -108[rbp], 1
.L18:
	cmp	DWORD PTR -108[rbp], 63
	jle	.L19
	mov	rax, QWORD PTR -104[rbp]
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	PermBits, .-PermBits
	.type	InvPermBits, @function
InvPermBits:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	add	rsp, -128
	mov	QWORD PTR -120[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -108[rbp], 0
	jmp	.L23
.L24:
	mov	eax, DWORD PTR -108[rbp]
	mov	rdx, QWORD PTR -120[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	and	eax, 1
	mov	edx, eax
	mov	eax, DWORD PTR -108[rbp]
	cdqe
	mov	BYTE PTR -80[rbp+rax], dl
	add	DWORD PTR -108[rbp], 1
.L23:
	cmp	DWORD PTR -108[rbp], 63
	jle	.L24
	mov	QWORD PTR -104[rbp], 0
	mov	DWORD PTR -108[rbp], 0
	jmp	.L25
.L26:
	mov	eax, DWORD PTR -108[rbp]
	cdqe
	lea	rdx, InvPermTable[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	mov	BYTE PTR -109[rbp], al
	mov	eax, DWORD PTR -108[rbp]
	cdqe
	movzx	eax, BYTE PTR -80[rbp+rax]
	movzx	eax, al
	mov	QWORD PTR -96[rbp], rax
	movzx	eax, BYTE PTR -109[rbp]
	mov	rdx, QWORD PTR -96[rbp]
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	mov	QWORD PTR -88[rbp], rax
	mov	rax, QWORD PTR -88[rbp]
	xor	QWORD PTR -104[rbp], rax
	add	DWORD PTR -108[rbp], 1
.L25:
	cmp	DWORD PTR -108[rbp], 63
	jle	.L26
	mov	rax, QWORD PTR -104[rbp]
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	InvPermBits, .-InvPermBits
	.type	BitRotation, @function
BitRotation:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	DWORD PTR -24[rbp], esi
	mov	WORD PTR -20[rbp], ax
	movzx	eax, WORD PTR -20[rbp]
	mov	WORD PTR -6[rbp], ax
	mov	DWORD PTR -4[rbp], 1
	jmp	.L30
.L31:
	movzx	eax, WORD PTR -6[rbp]
	and	eax, 1
	mov	BYTE PTR -7[rbp], al
	movzx	eax, WORD PTR -6[rbp]
	shr	ax
	mov	edx, eax
	movzx	eax, BYTE PTR -7[rbp]
	sal	eax, 15
	or	eax, edx
	mov	WORD PTR -6[rbp], ax
	add	DWORD PTR -4[rbp], 1
.L30:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jle	.L31
	movzx	eax, WORD PTR -6[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	BitRotation, .-BitRotation
	.type	KeySchedule, @function
KeySchedule:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	QWORD PTR -40[rbp], rdi
	mov	edi, 224
	call	malloc@PLT
	mov	QWORD PTR -24[rbp], rax
	mov	edi, 16
	call	malloc@PLT
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	QWORD PTR [rax], rdx
	mov	DWORD PTR -28[rbp], 1
	jmp	.L34
.L35:
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -24[rbp]
	lea	rbx, [rdx+rax]
	mov	edi, 16
	call	malloc@PLT
	mov	QWORD PTR [rbx], rax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	add	rax, 14
	movzx	eax, WORD PTR [rax]
	movzx	eax, ax
	mov	esi, 12
	mov	edi, eax
	call	BitRotation
	mov	WORD PTR -32[rbp], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	add	rax, 12
	movzx	eax, WORD PTR [rax]
	movzx	eax, ax
	mov	esi, 2
	mov	edi, eax
	call	BitRotation
	mov	WORD PTR -30[rbp], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	mov	rdx, QWORD PTR [rdx]
	add	rdx, 14
	movzx	eax, WORD PTR 10[rax]
	mov	WORD PTR [rdx], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	mov	rdx, QWORD PTR [rdx]
	add	rdx, 12
	movzx	eax, WORD PTR 8[rax]
	mov	WORD PTR [rdx], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	mov	rdx, QWORD PTR [rdx]
	add	rdx, 10
	movzx	eax, WORD PTR 6[rax]
	mov	WORD PTR [rdx], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	mov	rdx, QWORD PTR [rdx]
	add	rdx, 8
	movzx	eax, WORD PTR 4[rax]
	mov	WORD PTR [rdx], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	mov	rdx, QWORD PTR [rdx]
	add	rdx, 6
	movzx	eax, WORD PTR 2[rax]
	mov	WORD PTR [rdx], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	edx, DWORD PTR -28[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	mov	rdx, QWORD PTR [rdx]
	add	rdx, 4
	movzx	eax, WORD PTR [rax]
	mov	WORD PTR [rdx], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	lea	rdx, 2[rax]
	movzx	eax, WORD PTR -32[rbp]
	mov	WORD PTR [rdx], ax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	movzx	edx, WORD PTR -30[rbp]
	mov	WORD PTR [rax], dx
	add	DWORD PTR -28[rbp], 1
.L34:
	cmp	DWORD PTR -28[rbp], 27
	jle	.L35
	mov	rax, QWORD PTR -24[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	KeySchedule, .-KeySchedule
	.type	AddRoundKey, @function
AddRoundKey:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -104[rbp], rdi
	mov	QWORD PTR -112[rbp], rsi
	mov	DWORD PTR -116[rbp], edx
	mov	rax, QWORD PTR -112[rbp]
	movzx	eax, WORD PTR 12[rax]
	mov	WORD PTR -88[rbp], ax
	mov	rax, QWORD PTR -112[rbp]
	movzx	eax, WORD PTR 14[rax]
	mov	WORD PTR -86[rbp], ax
	mov	DWORD PTR -84[rbp], 0
	jmp	.L38
.L39:
	movzx	edx, WORD PTR -88[rbp]
	mov	eax, DWORD PTR -84[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	cdqe
	and	eax, 1
	mov	QWORD PTR -16[rbp], rax
	movzx	edx, WORD PTR -86[rbp]
	mov	eax, DWORD PTR -84[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	cdqe
	and	eax, 1
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -84[rbp]
	sal	eax, 2
	add	eax, 1
	mov	rdx, QWORD PTR -16[rbp]
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	xor	QWORD PTR -104[rbp], rax
	mov	eax, DWORD PTR -84[rbp]
	sal	eax, 2
	mov	rdx, QWORD PTR -8[rbp]
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	xor	QWORD PTR -104[rbp], rax
	add	DWORD PTR -84[rbp], 1
.L38:
	cmp	DWORD PTR -84[rbp], 15
	jle	.L39
	mov	eax, DWORD PTR -116[rbp]
	cdqe
	lea	rdx, Constant[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	QWORD PTR -80[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	and	eax, 1
	mov	QWORD PTR -72[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	shr	rax
	and	eax, 1
	mov	QWORD PTR -64[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	shr	rax, 2
	and	eax, 1
	mov	QWORD PTR -56[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	shr	rax, 3
	and	eax, 1
	mov	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	shr	rax, 4
	and	eax, 1
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	shr	rax, 5
	and	eax, 1
	mov	QWORD PTR -32[rbp], rax
	mov	QWORD PTR -24[rbp], 1
	mov	rax, QWORD PTR -24[rbp]
	sal	rax, 63
	xor	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	sal	rax, 23
	xor	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 19
	xor	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	sal	rax, 15
	xor	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 11
	xor	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	sal	rax, 7
	xor	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -72[rbp]
	sal	rax, 3
	xor	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -104[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	AddRoundKey, .-AddRoundKey
	.section	.rodata
.LC0:
	.string	"%d: after SubCells: %lx\n"
.LC1:
	.string	"%d: after PermBits : %lx\n"
.LC2:
	.string	"%d: after AddRoundKeys: %lx\n"
.LC3:
	.string	"%d current key: "
.LC4:
	.string	"%x "
	.text
	.globl	GIFT64_Encryption
	.type	GIFT64_Encryption, @function
GIFT64_Encryption:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	mov	rdi, rax
	call	KeySchedule
	mov	QWORD PTR -16[rbp], rax
	mov	DWORD PTR -32[rbp], 1
	jmp	.L42
.L45:
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	SubCells
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -32[rbp]
	lea	ecx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	mov	esi, ecx
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	PermBits
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -32[rbp]
	lea	ecx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	mov	esi, ecx
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
	mov	edx, DWORD PTR -32[rbp]
	mov	rcx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	AddRoundKey
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -32[rbp]
	lea	ecx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	mov	esi, ecx
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -28[rbp], 0
	jmp	.L43
.L44:
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	mov	rdx, QWORD PTR [rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	add	rax, rax
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	movzx	eax, ax
	mov	esi, eax
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -28[rbp], 1
.L43:
	cmp	DWORD PTR -28[rbp], 7
	jle	.L44
	mov	edi, 10
	call	putchar@PLT
	add	DWORD PTR -32[rbp], 1
.L42:
	cmp	DWORD PTR -32[rbp], 28
	jle	.L45
	mov	rax, QWORD PTR -24[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	GIFT64_Encryption, .-GIFT64_Encryption
	.section	.rodata
	.align 8
.LC5:
	.string	"%d: after inverse AddRoundKeys: %lx\n"
	.align 8
.LC6:
	.string	"%d: after inverse PermBits: %lx \n"
	.align 8
.LC7:
	.string	"%d: after inverse SubCells: %lx\n"
	.text
	.globl	GIFT64_Decryption
	.type	GIFT64_Decryption, @function
GIFT64_Decryption:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	mov	rdi, rax
	call	KeySchedule
	mov	QWORD PTR -16[rbp], rax
	mov	DWORD PTR -28[rbp], 28
	jmp	.L48
.L49:
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 3
	lea	rdx, -8[rax]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
	mov	edx, DWORD PTR -28[rbp]
	mov	rcx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	AddRoundKey
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	ecx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	mov	esi, ecx
	lea	rdi, .LC5[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	InvPermBits
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	ecx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	mov	esi, ecx
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	InvSubCells
	mov	QWORD PTR -24[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	ecx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	mov	esi, ecx
	lea	rdi, .LC7[rip]
	mov	eax, 0
	call	printf@PLT
	sub	DWORD PTR -28[rbp], 1
.L48:
	cmp	DWORD PTR -28[rbp], 0
	jg	.L49
	mov	rax, QWORD PTR -24[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	GIFT64_Decryption, .-GIFT64_Decryption
	.section	.rodata
.LC8:
	.string	"Plaintext: %lx\n"
.LC9:
	.string	"masterkey: "
.LC10:
	.string	"CipherText: %lx\n"
.LC11:
	.string	"DecryptedValue: %lx\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	movabs	rax, -4300718349641610627
	mov	QWORD PTR -56[rbp], rax
	mov	WORD PTR -32[rbp], -17007
	mov	WORD PTR -30[rbp], 29470
	mov	WORD PTR -28[rbp], -18756
	mov	WORD PTR -26[rbp], 10003
	mov	WORD PTR -24[rbp], -24071
	mov	WORD PTR -22[rbp], -2305
	mov	WORD PTR -20[rbp], -14512
	mov	WORD PTR -18[rbp], 17639
	mov	rax, QWORD PTR -56[rbp]
	mov	rsi, rax
	lea	rdi, .LC8[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC9[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -60[rbp], 0
	jmp	.L52
.L53:
	mov	eax, DWORD PTR -60[rbp]
	cdqe
	movzx	eax, WORD PTR -32[rbp+rax*2]
	movzx	eax, ax
	mov	esi, eax
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -60[rbp], 1
.L52:
	cmp	DWORD PTR -60[rbp], 7
	jle	.L53
	mov	edi, 10
	call	putchar@PLT
	lea	rdx, -32[rbp]
	mov	rax, QWORD PTR -56[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	GIFT64_Encryption
	mov	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	mov	rsi, rax
	lea	rdi, .LC10[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdx, -32[rbp]
	mov	rax, QWORD PTR -48[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	GIFT64_Decryption
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rax
	lea	rdi, .LC11[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"738900.c"
	.text
	.section	.rodata
	.align	2
	.type	s_box, %object
	.size	s_box, 16
s_box:
	.ascii	"\001\012\004\014\006\017\003\011\002\015\013\007\005"
	.ascii	"\000\010\016"
	.align	2
	.type	inv_s_box, %object
	.size	inv_s_box, 16
inv_s_box:
	.ascii	"\015\000\010\006\002\014\004\013\016\007\001\012\003"
	.ascii	"\011\017\005"
	.align	2
	.type	PermTable, %object
	.size	PermTable, 64
PermTable:
	.ascii	"\000\021\"30\001\022# 1\002\023\020!2\003\004\025&7"
	.ascii	"4\005\026'$5\006\027\024%6\007\010\031*;8\011\032+("
	.ascii	"9\012\033\030):\013\014\035.?<\015\036/,=\016\037\034"
	.ascii	"->\017"
	.align	2
	.type	InvPermTable, %object
	.size	InvPermTable, 64
InvPermTable:
	.ascii	"\000\005\012\017\020\025\032\037 %*/05:?\014\001\006"
	.ascii	"\013\034\021\026\033,!&+<16;\010\015\002\007\030\035"
	.ascii	"\022\027(-\"'8=27\004\011\016\003\024\031\036\023$)"
	.ascii	".#49>3"
	.align	2
	.type	Constant, %object
	.size	Constant, 49
Constant:
	.ascii	"\000\001\003\007\017\037>=;7/\036<93'\016\035:5+\026"
	.ascii	",\0300!\002\005\013\027.\03481#\006\015\0336-\0324)"
	.ascii	"\022$\010\021\"\004"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	convert64bittoBinary, %function
convert64bittoBinary:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #24
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	mov	r3, #0
	str	r3, [fp, #-20]
	mov	r3, #63
	str	r3, [fp, #-24]
	b	.L2
.L6:
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-24]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	mov	r3, r4
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L3
	mov	r0, #49
	bl	putchar
	b	.L4
.L3:
	mov	r0, #48
	bl	putchar
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L4:
	ldr	r3, [fp, #-24]
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L5
	mov	r0, #32
	bl	putchar
.L5:
	ldr	r3, [fp, #-24]
	sub	r3, r3, #1
	str	r3, [fp, #-24]
.L2:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bge	.L6
	mov	r0, #10
	bl	putchar
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	convert64bittoBinary, .-convert64bittoBinary
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SubCells, %function
SubCells:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #44
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	mov	r0, #0
	mov	r1, #0
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	mov	r1, #0
	str	r1, [fp, #-64]
	b	.L8
.L9:
	ldr	r1, [fp, #-64]
	lsl	ip, r1, #2
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	rsb	r10, ip, #32
	sub	lr, ip, #32
	lsr	r2, r0, ip
	orr	r2, r2, r1, lsl r10
	orr	r2, r2, r1, lsr lr
	lsr	r3, r1, ip
	mov	r0, #15
	mov	r1, #0
	and	r6, r2, r0
	and	r7, r3, r1
	str	r6, [fp, #-52]
	str	r7, [fp, #-48]
	ldr	r0, .L11
	ldr	r1, [fp, #-52]
	add	r1, r0, r1
	ldrb	r1, [r1]	@ zero_extendqisi2
	and	r0, r1, #255
	mov	r1, #0
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	ldr	r1, [fp, #-64]
	lsl	ip, r1, #2
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	sub	r10, ip, #32
	rsb	lr, ip, #32
	lsl	r5, r1, ip
	orr	r5, r5, r0, lsl r10
	orr	r5, r5, r0, lsr lr
	lsl	r4, r0, ip
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	eor	r8, r0, r4
	eor	r9, r1, r5
	str	r8, [fp, #-60]
	str	r9, [fp, #-56]
	ldr	r1, [fp, #-64]
	add	r1, r1, #1
	str	r1, [fp, #-64]
.L8:
	ldr	r1, [fp, #-64]
	cmp	r1, #15
	ble	.L9
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L12:
	.align	2
.L11:
	.word	s_box
	.size	SubCells, .-SubCells
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	InvSubCells, %function
InvSubCells:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #44
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	mov	r0, #0
	mov	r1, #0
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	mov	r1, #0
	str	r1, [fp, #-64]
	b	.L14
.L15:
	ldr	r1, [fp, #-64]
	lsl	ip, r1, #2
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	rsb	r10, ip, #32
	sub	lr, ip, #32
	lsr	r2, r0, ip
	orr	r2, r2, r1, lsl r10
	orr	r2, r2, r1, lsr lr
	lsr	r3, r1, ip
	mov	r0, #15
	mov	r1, #0
	and	r6, r2, r0
	and	r7, r3, r1
	str	r6, [fp, #-52]
	str	r7, [fp, #-48]
	ldr	r0, .L17
	ldr	r1, [fp, #-52]
	add	r1, r0, r1
	ldrb	r1, [r1]	@ zero_extendqisi2
	and	r0, r1, #255
	mov	r1, #0
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	ldr	r1, [fp, #-64]
	lsl	ip, r1, #2
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	sub	r10, ip, #32
	rsb	lr, ip, #32
	lsl	r5, r1, ip
	orr	r5, r5, r0, lsl r10
	orr	r5, r5, r0, lsr lr
	lsl	r4, r0, ip
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	eor	r8, r0, r4
	eor	r9, r1, r5
	str	r8, [fp, #-60]
	str	r9, [fp, #-56]
	ldr	r1, [fp, #-64]
	add	r1, r1, #1
	str	r1, [fp, #-64]
.L14:
	ldr	r1, [fp, #-64]
	cmp	r1, #15
	ble	.L15
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L18:
	.align	2
.L17:
	.word	inv_s_box
	.size	InvSubCells, .-InvSubCells
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	PermBits, %function
PermBits:
	@ args = 0, pretend = 0, frame = 112
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #116
	str	r0, [fp, #-140]
	str	r1, [fp, #-136]
	ldr	r1, .L26
	ldr	r1, [r1]
	str	r1, [fp, #-32]
	mov	r1,#0
	mov	r1, #0
	str	r1, [fp, #-128]
	b	.L20
.L21:
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	ldr	ip, [fp, #-128]
	rsb	r8, ip, #32
	sub	lr, ip, #32
	lsr	r4, r0, ip
	orr	r4, r4, r1, lsl r8
	orr	r4, r4, r1, lsr lr
	lsr	r5, r1, ip
	and	r1, r4, #255
	and	r1, r1, #1
	and	ip, r1, #255
	sub	r0, fp, #96
	ldr	r1, [fp, #-128]
	add	r1, r0, r1
	mov	r0, ip
	strb	r0, [r1]
	ldr	r1, [fp, #-128]
	add	r1, r1, #1
	str	r1, [fp, #-128]
.L20:
	ldr	r1, [fp, #-128]
	cmp	r1, #63
	ble	.L21
	mov	r0, #0
	mov	r1, #0
	str	r0, [fp, #-124]
	str	r1, [fp, #-120]
	mov	r1, #0
	str	r1, [fp, #-128]
	b	.L22
.L23:
	ldr	r0, .L26+4
	ldr	r1, [fp, #-128]
	add	r1, r0, r1
	ldrb	r1, [r1]
	strb	r1, [fp, #-129]
	sub	r0, fp, #96
	ldr	r1, [fp, #-128]
	add	r1, r0, r1
	ldrb	r1, [r1]	@ zero_extendqisi2
	and	r0, r1, #255
	mov	r1, #0
	str	r0, [fp, #-116]
	str	r1, [fp, #-112]
	ldrb	ip, [fp, #-129]	@ zero_extendqisi2
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	sub	r4, ip, #32
	rsb	lr, ip, #32
	lsl	r3, r1, ip
	orr	r3, r3, r0, lsl r4
	orr	r3, r3, r0, lsr lr
	lsl	r2, r0, ip
	str	r2, [fp, #-108]
	str	r3, [fp, #-104]
	sub	r5, fp, #124
	ldmia	r5, {r4-r5}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	eor	r6, r4, r0
	eor	r7, r5, r1
	str	r6, [fp, #-124]
	str	r7, [fp, #-120]
	ldr	r1, [fp, #-128]
	add	r1, r1, #1
	str	r1, [fp, #-128]
.L22:
	ldr	r1, [fp, #-128]
	cmp	r1, #63
	ble	.L23
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	ldr	r1, .L26
	ldr	r0, [r1]
	ldr	r1, [fp, #-32]
	eors	r0, r1, r0
	mov	r1, #0
	beq	.L25
	bl	__stack_chk_fail
.L25:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
.L27:
	.align	2
.L26:
	.word	.LC1
	.word	PermTable
	.size	PermBits, .-PermBits
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	InvPermBits, %function
InvPermBits:
	@ args = 0, pretend = 0, frame = 112
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #116
	str	r0, [fp, #-140]
	str	r1, [fp, #-136]
	ldr	r1, .L35
	ldr	r1, [r1]
	str	r1, [fp, #-32]
	mov	r1,#0
	mov	r1, #0
	str	r1, [fp, #-128]
	b	.L29
.L30:
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	ldr	ip, [fp, #-128]
	rsb	r8, ip, #32
	sub	lr, ip, #32
	lsr	r4, r0, ip
	orr	r4, r4, r1, lsl r8
	orr	r4, r4, r1, lsr lr
	lsr	r5, r1, ip
	and	r1, r4, #255
	and	r1, r1, #1
	and	ip, r1, #255
	sub	r0, fp, #96
	ldr	r1, [fp, #-128]
	add	r1, r0, r1
	mov	r0, ip
	strb	r0, [r1]
	ldr	r1, [fp, #-128]
	add	r1, r1, #1
	str	r1, [fp, #-128]
.L29:
	ldr	r1, [fp, #-128]
	cmp	r1, #63
	ble	.L30
	mov	r0, #0
	mov	r1, #0
	str	r0, [fp, #-124]
	str	r1, [fp, #-120]
	mov	r1, #0
	str	r1, [fp, #-128]
	b	.L31
.L32:
	ldr	r0, .L35+4
	ldr	r1, [fp, #-128]
	add	r1, r0, r1
	ldrb	r1, [r1]
	strb	r1, [fp, #-129]
	sub	r0, fp, #96
	ldr	r1, [fp, #-128]
	add	r1, r0, r1
	ldrb	r1, [r1]	@ zero_extendqisi2
	and	r0, r1, #255
	mov	r1, #0
	str	r0, [fp, #-116]
	str	r1, [fp, #-112]
	ldrb	ip, [fp, #-129]	@ zero_extendqisi2
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	sub	r4, ip, #32
	rsb	lr, ip, #32
	lsl	r3, r1, ip
	orr	r3, r3, r0, lsl r4
	orr	r3, r3, r0, lsr lr
	lsl	r2, r0, ip
	str	r2, [fp, #-108]
	str	r3, [fp, #-104]
	sub	r5, fp, #124
	ldmia	r5, {r4-r5}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	eor	r6, r4, r0
	eor	r7, r5, r1
	str	r6, [fp, #-124]
	str	r7, [fp, #-120]
	ldr	r1, [fp, #-128]
	add	r1, r1, #1
	str	r1, [fp, #-128]
.L31:
	ldr	r1, [fp, #-128]
	cmp	r1, #63
	ble	.L32
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	ldr	r1, .L35
	ldr	r0, [r1]
	ldr	r1, [fp, #-32]
	eors	r0, r1, r0
	mov	r1, #0
	beq	.L34
	bl	__stack_chk_fail
.L34:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
.L36:
	.align	2
.L35:
	.word	.LC2
	.word	InvPermTable
	.size	InvPermBits, .-InvPermBits
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	BitRotation, %function
BitRotation:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	mov	r3, r0
	str	r1, [fp, #-20]
	strh	r3, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-14]	@ movhi
	strh	r3, [fp, #-10]	@ movhi
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L38
.L39:
	ldrh	r3, [fp, #-10]	@ movhi
	and	r3, r3, #255
	and	r3, r3, #1
	strb	r3, [fp, #-11]
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldrb	r3, [fp, #-11]	@ zero_extendqisi2
	lsl	r3, r3, #15
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L38:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	ble	.L39
	ldrh	r3, [fp, #-10]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	BitRotation, .-BitRotation
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	KeySchedule, %function
KeySchedule:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	str	r0, [fp, #-32]
	mov	r0, #112
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-16]
	mov	r0, #16
	bl	malloc
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-32]
	str	r2, [r3]
	mov	r3, #1
	str	r3, [fp, #-20]
	b	.L42
.L43:
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r4, r2, r3
	mov	r0, #16
	bl	malloc
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	r3, r3, #14
	ldrh	r3, [r3]
	mov	r1, #12
	mov	r0, r3
	bl	BitRotation
	mov	r3, r0
	strh	r3, [fp, #-24]	@ movhi
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	r3, r3, #12
	ldrh	r3, [r3]
	mov	r1, #2
	mov	r0, r3
	bl	BitRotation
	mov	r3, r0
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldr	r3, [r3]
	add	r3, r3, #14
	ldrh	r2, [r2, #10]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldr	r3, [r3]
	add	r3, r3, #12
	ldrh	r2, [r2, #8]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldr	r3, [r3]
	add	r3, r3, #10
	ldrh	r2, [r2, #6]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldr	r3, [r3]
	add	r3, r3, #8
	ldrh	r2, [r2, #4]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldr	r3, [r3]
	add	r3, r3, #6
	ldrh	r2, [r2, #2]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldr	r3, [r3]
	add	r3, r3, #4
	ldrh	r2, [r2]
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	r3, r3, #2
	ldrh	r2, [fp, #-24]	@ movhi
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldr	r3, [r3]
	ldrh	r2, [fp, #-22]	@ movhi
	strh	r2, [r3]	@ movhi
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L42:
	ldr	r3, [fp, #-20]
	cmp	r3, #27
	ble	.L43
	ldr	r3, [fp, #-16]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	KeySchedule, .-KeySchedule
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AddRoundKey, %function
AddRoundKey:
	@ args = 0, pretend = 0, frame = 232
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #236
	str	r0, [fp, #-124]
	str	r1, [fp, #-120]
	str	r2, [fp, #-128]
	str	r3, [fp, #-132]
	ldr	r3, [fp, #-128]
	ldrh	r3, [r3, #12]	@ movhi
	strh	r3, [fp, #-116]	@ movhi
	ldr	r3, [fp, #-128]
	ldrh	r3, [r3, #14]	@ movhi
	strh	r3, [fp, #-114]	@ movhi
	mov	r3, #0
	str	r3, [fp, #-112]
	b	.L46
.L47:
	ldrh	r2, [fp, #-116]
	ldr	r3, [fp, #-112]
	asr	r3, r2, r3
	mov	r0, r3
	asr	r1, r0, #31
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldrh	r2, [fp, #-114]
	ldr	r3, [fp, #-112]
	asr	r3, r2, r3
	mov	r0, r3
	asr	r1, r0, #31
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #148
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-112]
	lsl	r3, r3, #2
	add	r1, r3, #1
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r7, r3, r1
	orr	r7, r7, r2, lsl ip
	orr	r7, r7, r2, lsr r0
	lsl	r6, r2, r1
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	eor	r1, r2, r6
	str	r1, [fp, #-156]
	eor	r3, r3, r7
	str	r3, [fp, #-152]
	sub	r3, fp, #156
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-124]
	str	r3, [fp, #-120]
	ldr	r3, [fp, #-112]
	lsl	r1, r3, #2
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	eor	r8, r2, r4
	eor	r9, r3, r5
	str	r8, [fp, #-124]
	str	r9, [fp, #-120]
	ldr	r3, [fp, #-112]
	add	r3, r3, #1
	str	r3, [fp, #-112]
.L46:
	ldr	r3, [fp, #-112]
	cmp	r3, #15
	ble	.L47
	ldr	r2, .L49
	ldr	r3, [fp, #-132]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	str	r2, [fp, #-108]
	str	r3, [fp, #-104]
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-100]
	str	r4, [fp, #-96]
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #1
	orr	r0, r0, r3, lsl #31
	lsr	r1, r3, #1
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-172]
	and	r3, r1, r3
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-92]
	str	r4, [fp, #-88]
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #2
	orr	r0, r0, r3, lsl #30
	lsr	r1, r3, #2
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-180]
	and	r3, r1, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-84]
	str	r4, [fp, #-80]
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #3
	orr	r0, r0, r3, lsl #29
	lsr	r1, r3, #3
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-188]
	and	r3, r1, r3
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-76]
	str	r4, [fp, #-72]
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #4
	orr	r0, r0, r3, lsl #28
	lsr	r1, r3, #4
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-68]
	str	r4, [fp, #-64]
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #5
	orr	r0, r0, r3, lsl #27
	lsr	r1, r3, #5
	mov	r2, #1
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-204]
	and	r3, r1, r3
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #31
	mov	r0, #0
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	eor	ip, r2, r0
	str	ip, [fp, #-212]
	eor	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-124]
	str	r4, [fp, #-120]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #23
	orr	r1, r1, r2, lsr #9
	lsl	r0, r2, #23
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	eor	ip, r2, r0
	str	ip, [fp, #-220]
	eor	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-124]
	str	r4, [fp, #-120]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #19
	orr	r1, r1, r2, lsr #13
	lsl	r0, r2, #19
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	eor	ip, r2, r0
	str	ip, [fp, #-228]
	eor	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-124]
	str	r4, [fp, #-120]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #15
	orr	r3, r3, r0, lsr #17
	lsl	r2, r0, #15
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	eor	ip, r0, r2
	str	ip, [fp, #-236]
	eor	r3, r1, r3
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-124]
	str	r4, [fp, #-120]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #11
	orr	r3, r3, r0, lsr #21
	lsl	r2, r0, #11
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	eor	ip, r0, r2
	str	ip, [fp, #-244]
	eor	r3, r1, r3
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-124]
	str	r4, [fp, #-120]
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	eor	ip, r0, r2
	str	ip, [fp, #-252]
	eor	r3, r1, r3
	str	r3, [fp, #-248]
	sub	r4, fp, #252
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-124]
	str	r4, [fp, #-120]
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #3
	orr	r3, r3, r0, lsr #29
	lsl	r2, r0, #3
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	eor	ip, r0, r2
	str	ip, [fp, #-260]
	eor	r3, r1, r3
	str	r3, [fp, #-256]
	sub	r4, fp, #260
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-124]
	str	r4, [fp, #-120]
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L50:
	.align	2
.L49:
	.word	Constant
	.size	AddRoundKey, .-AddRoundKey
	.section	.rodata
	.align	2
.LC3:
	.ascii	"%d: after SubCells: %llx\012\000"
	.align	2
.LC4:
	.ascii	"%d: after PermBits : %llx\012\000"
	.align	2
.LC5:
	.ascii	"%d: after AddRoundKeys: %llx\012\000"
	.align	2
.LC6:
	.ascii	"%d current key: \000"
	.align	2
.LC7:
	.ascii	"%x \000"
	.text
	.align	2
	.global	GIFT64_Encryption
	.syntax unified
	.arm
	.fpu softvfp
	.type	GIFT64_Encryption, %function
GIFT64_Encryption:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-40]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r0, [fp, #-40]
	bl	KeySchedule
	str	r0, [fp, #-20]
	mov	r3, #1
	str	r3, [fp, #-28]
	b	.L52
.L55:
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	SubCells
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-28]
	sub	r1, r3, #1
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r0, .L57
	bl	printf
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	PermBits
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-28]
	sub	r1, r3, #1
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r0, .L57+4
	bl	printf
	ldr	r3, [fp, #-28]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-16]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	AddRoundKey
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-28]
	sub	r1, r3, #1
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r0, .L57+8
	bl	printf
	ldr	r0, .L57+12
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L53
.L54:
	ldr	r3, [fp, #-28]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]
	mov	r1, r3
	ldr	r0, .L57+16
	bl	printf
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L53:
	ldr	r3, [fp, #-24]
	cmp	r3, #7
	ble	.L54
	mov	r0, #10
	bl	putchar
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L52:
	ldr	r3, [fp, #-28]
	cmp	r3, #28
	ble	.L55
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L58:
	.align	2
.L57:
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.size	GIFT64_Encryption, .-GIFT64_Encryption
	.section	.rodata
	.align	2
.LC8:
	.ascii	"%d: after inverse AddRoundKeys: %llx\012\000"
	.align	2
.LC9:
	.ascii	"%d: after inverse PermBits: %llx \012\000"
	.align	2
.LC10:
	.ascii	"%d: after inverse SubCells: %llx\012\000"
	.text
	.align	2
	.global	GIFT64_Decryption
	.syntax unified
	.arm
	.fpu softvfp
	.type	GIFT64_Decryption, %function
GIFT64_Decryption:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-40]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r0, [fp, #-40]
	bl	KeySchedule
	str	r0, [fp, #-20]
	mov	r3, #28
	str	r3, [fp, #-24]
	b	.L60
.L61:
	ldr	r3, [fp, #-24]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-16]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	AddRoundKey
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-24]
	sub	r1, r3, #1
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r0, .L63
	bl	printf
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	InvPermBits
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-24]
	sub	r1, r3, #1
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r0, .L63+4
	bl	printf
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	InvSubCells
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-24]
	sub	r1, r3, #1
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r0, .L63+8
	bl	printf
	ldr	r3, [fp, #-24]
	sub	r3, r3, #1
	str	r3, [fp, #-24]
.L60:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bgt	.L61
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L64:
	.align	2
.L63:
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.size	GIFT64_Decryption, .-GIFT64_Decryption
	.section	.rodata
	.align	2
.LC11:
	.ascii	"Plaintext: %llx\012\000"
	.align	2
.LC12:
	.ascii	"masterkey: \000"
	.align	2
.LC13:
	.ascii	"CipherText: %llx\012\000"
	.align	2
.LC14:
	.ascii	"DecryptedValue: %llx\012\000"
	.align	2
.LC0:
	.short	-17007
	.short	29470
	.short	-18756
	.short	10003
	.short	-24071
	.short	-2305
	.short	-14512
	.short	17639
	.align	2
.LC15:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	ldr	r3, .L70+8
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	adr	r3, .L70
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	ldr	r3, .L70+12
	sub	ip, fp, #24
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	ldr	r0, .L70+16
	bl	printf
	ldr	r0, .L70+20
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-56]
	b	.L66
.L67:
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #1
	sub	r2, fp, #4
	add	r3, r2, r3
	sub	r3, r3, #20
	ldrh	r3, [r3]
	mov	r1, r3
	ldr	r0, .L70+24
	bl	printf
	ldr	r3, [fp, #-56]
	add	r3, r3, #1
	str	r3, [fp, #-56]
.L66:
	ldr	r3, [fp, #-56]
	cmp	r3, #7
	ble	.L67
	mov	r0, #10
	bl	putchar
	sub	r3, fp, #24
	mov	r2, r3
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	GIFT64_Encryption
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r0, .L70+28
	bl	printf
	sub	r3, fp, #24
	mov	r2, r3
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	GIFT64_Decryption
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	ldr	r0, .L70+32
	bl	printf
	mov	r3, #0
	ldr	r2, .L70+8
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L69
	bl	__stack_chk_fail
.L69:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L71:
	.align	3
.L70:
	.word	2057013885
	.word	-1001339022
	.word	.LC15
	.word	.LC0
	.word	.LC11
	.word	.LC12
	.word	.LC7
	.word	.LC13
	.word	.LC14
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
