	.file	"867085.c"
	.intel_syntax noprefix
	.text
	.globl	max_loop
	.bss
	.align 4
	.type	max_loop, @object
	.size	max_loop, 4
max_loop:
	.zero	4
	.globl	num
	.align 4
	.type	num, @object
	.size	num, 4
num:
	.zero	4
	.globl	i
	.align 4
	.type	i, @object
	.size	i, 4
i:
	.zero	4
	.globl	e
	.align 4
	.type	e, @object
	.size	e, 4
e:
	.zero	4
	.globl	timer
	.align 4
	.type	timer, @object
	.size	timer, 4
timer:
	.zero	4
	.globl	data_0
	.type	data_0, @object
	.size	data_0, 1
data_0:
	.zero	1
	.globl	data_1
	.type	data_1, @object
	.size	data_1, 1
data_1:
	.zero	1
	.text
	.globl	read_data
	.type	read_data, @function
read_data:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	cmp	DWORD PTR -20[rbp], 0
	jne	.L2
	movzx	eax, BYTE PTR data_0[rip]
	mov	BYTE PTR -2[rbp], al
	jmp	.L3
.L2:
	cmp	DWORD PTR -20[rbp], 1
	jne	.L4
	movzx	eax, BYTE PTR data_1[rip]
	mov	BYTE PTR -2[rbp], al
	jmp	.L3
.L4:
	mov	edi, 0
	mov	eax, 0
	call	assert@PLT
	movzx	eax, BYTE PTR -1[rbp]
	mov	BYTE PTR -2[rbp], al
.L3:
	movzx	eax, BYTE PTR -2[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	read_data, .-read_data
	.globl	write_data
	.type	write_data, @function
write_data:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, esi
	mov	BYTE PTR -8[rbp], al
	cmp	DWORD PTR -4[rbp], 0
	jne	.L7
	movzx	eax, BYTE PTR -8[rbp]
	mov	BYTE PTR data_0[rip], al
	jmp	.L6
.L7:
	cmp	DWORD PTR -4[rbp], 1
	jne	.L9
	movzx	eax, BYTE PTR -8[rbp]
	mov	BYTE PTR data_1[rip], al
	jmp	.L6
.L9:
	mov	edi, 0
	mov	eax, 0
	call	assert@PLT
	nop
.L6:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	write_data, .-write_data
	.globl	P_1_pc
	.bss
	.align 4
	.type	P_1_pc, @object
	.size	P_1_pc, 4
P_1_pc:
	.zero	4
	.globl	P_1_st
	.align 4
	.type	P_1_st, @object
	.size	P_1_st, 4
P_1_st:
	.zero	4
	.globl	P_1_i
	.align 4
	.type	P_1_i, @object
	.size	P_1_i, 4
P_1_i:
	.zero	4
	.globl	P_1_ev
	.align 4
	.type	P_1_ev, @object
	.size	P_1_ev, 4
P_1_ev:
	.zero	4
	.text
	.globl	P_1
	.type	P_1, @function
P_1:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR P_1_pc[rip]
	test	eax, eax
	je	.L20
	mov	eax, DWORD PTR P_1_pc[rip]
	cmp	eax, 1
	je	.L21
	jmp	.L13
.L20:
	nop
.L13:
	jmp	.L15
.L22:
	nop
.L16:
	mov	eax, DWORD PTR num[rip]
	mov	esi, 65
	mov	edi, eax
	call	write_data
	mov	eax, DWORD PTR num[rip]
	add	eax, 1
	mov	DWORD PTR num[rip], eax
	mov	DWORD PTR P_1_pc[rip], 1
	mov	DWORD PTR P_1_st[rip], 2
	jmp	.L17
.L14:
.L21:
	nop
.L15:
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR max_loop[rip]
	cmp	edx, eax
	jl	.L22
	nop
.L18:
	mov	DWORD PTR P_1_st[rip], 2
.L17:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	P_1, .-P_1
	.globl	is_P_1_triggered
	.type	is_P_1_triggered, @function
is_P_1_triggered:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR P_1_pc[rip]
	cmp	eax, 1
	jne	.L24
	mov	eax, DWORD PTR P_1_ev[rip]
	cmp	eax, 1
	jne	.L24
	mov	DWORD PTR -4[rbp], 1
	jmp	.L25
.L24:
	mov	DWORD PTR -4[rbp], 0
.L25:
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	is_P_1_triggered, .-is_P_1_triggered
	.globl	C_1_pc
	.bss
	.align 4
	.type	C_1_pc, @object
	.size	C_1_pc, 4
C_1_pc:
	.zero	4
	.globl	C_1_st
	.align 4
	.type	C_1_st, @object
	.size	C_1_st, 4
C_1_st:
	.zero	4
	.globl	C_1_i
	.align 4
	.type	C_1_i, @object
	.size	C_1_i, 4
C_1_i:
	.zero	4
	.globl	C_1_ev
	.align 4
	.type	C_1_ev, @object
	.size	C_1_ev, 4
C_1_ev:
	.zero	4
	.globl	C_1_pr
	.align 4
	.type	C_1_pr, @object
	.size	C_1_pr, 4
C_1_pr:
	.zero	4
	.text
	.globl	C_1
	.type	C_1, @function
C_1:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, DWORD PTR C_1_pc[rip]
	test	eax, eax
	je	.L40
	mov	eax, DWORD PTR C_1_pc[rip]
	cmp	eax, 1
	je	.L41
	mov	eax, DWORD PTR C_1_pc[rip]
	cmp	eax, 2
	je	.L42
	jmp	.L29
.L40:
	nop
.L29:
	jmp	.L33
.L43:
	nop
.L34:
	mov	eax, DWORD PTR num[rip]
	test	eax, eax
	jne	.L35
	mov	DWORD PTR timer[rip], 1
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
	mov	DWORD PTR C_1_pc[rip], 1
	mov	DWORD PTR C_1_st[rip], 2
	jmp	.L36
.L31:
.L41:
	nop
.L35:
	mov	eax, DWORD PTR num[rip]
	sub	eax, 1
	mov	DWORD PTR num[rip], eax
	mov	eax, DWORD PTR num[rip]
	test	eax, eax
	jns	.L37
	mov	edi, 0
	mov	eax, 0
	call	assert@PLT
.L37:
	mov	eax, DWORD PTR num[rip]
	mov	edi, eax
	call	read_data
	mov	BYTE PTR -1[rbp], al
	mov	eax, DWORD PTR i[rip]
	add	eax, 1
	mov	DWORD PTR i[rip], eax
	mov	DWORD PTR C_1_pc[rip], 2
	mov	DWORD PTR C_1_st[rip], 2
	jmp	.L36
.L32:
.L42:
	nop
.L33:
	mov	edx, DWORD PTR i[rip]
	mov	eax, DWORD PTR max_loop[rip]
	cmp	edx, eax
	jl	.L43
	nop
.L38:
	mov	DWORD PTR C_1_st[rip], 2
.L36:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	C_1, .-C_1
	.globl	is_C_1_triggered
	.type	is_C_1_triggered, @function
is_C_1_triggered:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR C_1_pc[rip]
	cmp	eax, 1
	jne	.L45
	mov	eax, DWORD PTR e[rip]
	cmp	eax, 1
	jne	.L45
	mov	DWORD PTR -4[rbp], 1
	jmp	.L46
.L45:
	mov	eax, DWORD PTR C_1_pc[rip]
	cmp	eax, 2
	jne	.L47
	mov	eax, DWORD PTR C_1_ev[rip]
	cmp	eax, 1
	jne	.L47
	mov	DWORD PTR -4[rbp], 1
	jmp	.L46
.L47:
	mov	DWORD PTR -4[rbp], 0
.L46:
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	is_C_1_triggered, .-is_C_1_triggered
	.globl	update_channels
	.type	update_channels, @function
update_channels:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	update_channels, .-update_channels
	.globl	init_threads
	.type	init_threads, @function
init_threads:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR P_1_i[rip]
	cmp	eax, 1
	jne	.L52
	mov	DWORD PTR P_1_st[rip], 0
	jmp	.L53
.L52:
	mov	DWORD PTR P_1_st[rip], 2
.L53:
	mov	eax, DWORD PTR C_1_i[rip]
	cmp	eax, 1
	jne	.L54
	mov	DWORD PTR C_1_st[rip], 0
	jmp	.L51
.L54:
	mov	DWORD PTR C_1_st[rip], 2
	nop
.L51:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	init_threads, .-init_threads
	.globl	exists_runnable_thread
	.type	exists_runnable_thread, @function
exists_runnable_thread:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR P_1_st[rip]
	test	eax, eax
	jne	.L58
	mov	DWORD PTR -4[rbp], 1
	jmp	.L59
.L58:
	mov	eax, DWORD PTR C_1_st[rip]
	test	eax, eax
	jne	.L60
	mov	DWORD PTR -4[rbp], 1
	jmp	.L59
.L60:
	mov	DWORD PTR -4[rbp], 0
.L59:
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	exists_runnable_thread, .-exists_runnable_thread
	.globl	eval
	.type	eval, @function
eval:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
.L63:
	call	exists_runnable_thread
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	je	.L70
	mov	eax, DWORD PTR P_1_st[rip]
	test	eax, eax
	jne	.L66
	mov	eax, 0
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -8[rbp], eax
	cmp	DWORD PTR -8[rbp], 0
	je	.L66
	mov	DWORD PTR P_1_st[rip], 1
	call	P_1
.L66:
	mov	eax, DWORD PTR C_1_st[rip]
	test	eax, eax
	jne	.L63
	mov	eax, 0
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	je	.L63
	mov	DWORD PTR C_1_st[rip], 1
	call	C_1
	jmp	.L63
.L70:
	nop
.L65:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	eval, .-eval
	.globl	fire_delta_events
	.type	fire_delta_events, @function
fire_delta_events:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	fire_delta_events, .-fire_delta_events
	.globl	reset_delta_events
	.type	reset_delta_events, @function
reset_delta_events:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	reset_delta_events, .-reset_delta_events
	.globl	fire_time_events
	.type	fire_time_events, @function
fire_time_events:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR C_1_ev[rip], 1
	mov	DWORD PTR P_1_ev[rip], 1
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	fire_time_events, .-fire_time_events
	.globl	reset_time_events
	.type	reset_time_events, @function
reset_time_events:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR P_1_ev[rip]
	cmp	eax, 1
	jne	.L78
	mov	DWORD PTR P_1_ev[rip], 2
.L78:
	mov	eax, DWORD PTR C_1_ev[rip]
	cmp	eax, 1
	jne	.L81
	mov	DWORD PTR C_1_ev[rip], 2
	nop
.L81:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	reset_time_events, .-reset_time_events
	.globl	activate_threads
	.type	activate_threads, @function
activate_threads:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	is_P_1_triggered
	mov	DWORD PTR -8[rbp], eax
	cmp	DWORD PTR -8[rbp], 0
	je	.L83
	mov	DWORD PTR P_1_st[rip], 0
.L83:
	call	is_C_1_triggered
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	je	.L86
	mov	DWORD PTR C_1_st[rip], 0
	nop
.L86:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	activate_threads, .-activate_threads
	.globl	immediate_notify
	.type	immediate_notify, @function
immediate_notify:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	activate_threads
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	immediate_notify, .-immediate_notify
	.globl	stop_simulation
	.type	stop_simulation, @function
stop_simulation:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	exists_runnable_thread
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	je	.L90
	mov	DWORD PTR -8[rbp], 0
	jmp	.L91
.L90:
	mov	DWORD PTR -8[rbp], 1
.L91:
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	stop_simulation, .-stop_simulation
	.globl	start_simulation
	.type	start_simulation, @function
start_simulation:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -12[rbp], 0
	call	update_channels
	call	init_threads
	call	fire_delta_events
	call	activate_threads
	call	reset_delta_events
.L94:
	mov	DWORD PTR -12[rbp], 1
	call	eval
	mov	DWORD PTR -12[rbp], 2
	call	update_channels
	mov	DWORD PTR -12[rbp], 3
	call	fire_delta_events
	call	activate_threads
	call	reset_delta_events
	call	exists_runnable_thread
	mov	DWORD PTR -8[rbp], eax
	cmp	DWORD PTR -8[rbp], 0
	jne	.L95
	mov	DWORD PTR -12[rbp], 4
	call	fire_time_events
	call	activate_threads
	call	reset_time_events
.L95:
	call	stop_simulation
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L100
	jmp	.L94
.L100:
	nop
.L97:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	start_simulation, .-start_simulation
	.globl	init_model
	.type	init_model, @function
init_model:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR P_1_i[rip], 1
	mov	DWORD PTR C_1_i[rip], 1
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	init_model, .-init_model
	.globl	main
	.type	main, @function
main:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR num[rip], 0
	mov	DWORD PTR i[rip], 0
	mov	DWORD PTR max_loop[rip], 2
	mov	DWORD PTR timer[rip], 0
	mov	DWORD PTR P_1_pc[rip], 0
	mov	DWORD PTR C_1_pc[rip], 0
	mov	DWORD PTR -8[rbp], 0
	call	init_model
	call	start_simulation
	mov	DWORD PTR -4[rbp], 0
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"867085.c"
	.text
	.comm	max_loop,4,4
	.comm	num,4,4
	.comm	i,4,4
	.comm	e,4,4
	.comm	timer,4,4
	.comm	data_0,1,1
	.comm	data_1,1,1
	.align	2
	.global	read_data
	.syntax unified
	.arm
	.fpu softvfp
	.type	read_data, %function
read_data:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L2
	ldr	r3, .L6
	ldrb	r3, [r3]
	strb	r3, [fp, #-6]
	b	.L3
.L2:
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	bne	.L4
	ldr	r3, .L6+4
	ldrb	r3, [r3]
	strb	r3, [fp, #-6]
	b	.L3
.L4:
	mov	r0, #0
	bl	assert
	ldrb	r3, [fp, #-5]
	strb	r3, [fp, #-6]
.L3:
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L7:
	.align	2
.L6:
	.word	data_0
	.word	data_1
	.size	read_data, .-read_data
	.align	2
	.global	write_data
	.syntax unified
	.arm
	.fpu softvfp
	.type	write_data, %function
write_data:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L9
	ldr	r2, .L13
	ldrb	r3, [fp, #-9]
	strb	r3, [r2]
	b	.L8
.L9:
	ldr	r3, [fp, #-8]
	cmp	r3, #1
	bne	.L11
	ldr	r2, .L13+4
	ldrb	r3, [fp, #-9]
	strb	r3, [r2]
	b	.L8
.L11:
	mov	r0, #0
	bl	assert
	nop
.L8:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L14:
	.align	2
.L13:
	.word	data_0
	.word	data_1
	.size	write_data, .-write_data
	.comm	P_1_pc,4,4
	.comm	P_1_st,4,4
	.comm	P_1_i,4,4
	.comm	P_1_ev,4,4
	.align	2
	.global	P_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	P_1, %function
P_1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L26
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L26
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L24
	b	.L17
.L23:
	nop
.L17:
	b	.L18
.L25:
	nop
.L19:
	ldr	r3, .L26+4
	ldr	r3, [r3]
	mov	r1, #65
	mov	r0, r3
	bl	write_data
	ldr	r3, .L26+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L26+4
	str	r3, [r2]
	ldr	r3, .L26
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L26+8
	mov	r2, #2
	str	r2, [r3]
	b	.L20
.L24:
	nop
.L18:
	ldr	r3, .L26+12
	ldr	r2, [r3]
	ldr	r3, .L26+16
	ldr	r3, [r3]
	cmp	r2, r3
	blt	.L25
	nop
.L21:
	ldr	r3, .L26+8
	mov	r2, #2
	str	r2, [r3]
.L20:
	nop
	pop	{fp, pc}
.L27:
	.align	2
.L26:
	.word	P_1_pc
	.word	num
	.word	P_1_st
	.word	i
	.word	max_loop
	.size	P_1, .-P_1
	.align	2
	.global	is_P_1_triggered
	.syntax unified
	.arm
	.fpu softvfp
	.type	is_P_1_triggered, %function
is_P_1_triggered:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L32
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L29
	ldr	r3, .L32+4
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L29
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L30
.L29:
	mov	r3, #0
	str	r3, [fp, #-8]
.L30:
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L33:
	.align	2
.L32:
	.word	P_1_pc
	.word	P_1_ev
	.size	is_P_1_triggered, .-is_P_1_triggered
	.comm	C_1_pc,4,4
	.comm	C_1_st,4,4
	.comm	C_1_i,4,4
	.comm	C_1_ev,4,4
	.comm	C_1_pr,4,4
	.align	2
	.global	C_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	C_1, %function
C_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L50
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L50
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L47
	ldr	r3, .L50
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L48
	b	.L36
.L46:
	nop
.L36:
	b	.L39
.L49:
	nop
.L40:
	ldr	r3, .L50+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L50+8
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L50+12
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L50+12
	str	r3, [r2]
	ldr	r3, .L50
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L50+16
	mov	r2, #2
	str	r2, [r3]
	b	.L42
.L38:
.L47:
	nop
.L41:
	ldr	r3, .L50+4
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L50+4
	str	r3, [r2]
	ldr	r3, .L50+4
	ldr	r3, [r3]
	cmp	r3, #0
	bge	.L43
	mov	r0, #0
	bl	assert
.L43:
	ldr	r3, .L50+4
	ldr	r3, [r3]
	mov	r0, r3
	bl	read_data
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldr	r3, .L50+12
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L50+12
	str	r3, [r2]
	ldr	r3, .L50
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L50+16
	mov	r2, #2
	str	r2, [r3]
	b	.L42
.L48:
	nop
.L39:
	ldr	r3, .L50+12
	ldr	r2, [r3]
	ldr	r3, .L50+20
	ldr	r3, [r3]
	cmp	r2, r3
	blt	.L49
	nop
.L44:
	ldr	r3, .L50+16
	mov	r2, #2
	str	r2, [r3]
.L42:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L51:
	.align	2
.L50:
	.word	C_1_pc
	.word	num
	.word	timer
	.word	i
	.word	C_1_st
	.word	max_loop
	.size	C_1, .-C_1
	.align	2
	.global	is_C_1_triggered
	.syntax unified
	.arm
	.fpu softvfp
	.type	is_C_1_triggered, %function
is_C_1_triggered:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L57
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L53
	ldr	r3, .L57+4
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L53
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L54
.L53:
	ldr	r3, .L57
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L55
	ldr	r3, .L57+8
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L55
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L54
.L55:
	mov	r3, #0
	str	r3, [fp, #-8]
.L54:
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L58:
	.align	2
.L57:
	.word	C_1_pc
	.word	e
	.word	C_1_ev
	.size	is_C_1_triggered, .-is_C_1_triggered
	.align	2
	.global	update_channels
	.syntax unified
	.arm
	.fpu softvfp
	.type	update_channels, %function
update_channels:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	update_channels, .-update_channels
	.align	2
	.global	init_threads
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_threads, %function
init_threads:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L67
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L62
	ldr	r3, .L67+4
	mov	r2, #0
	str	r2, [r3]
	b	.L63
.L62:
	ldr	r3, .L67+4
	mov	r2, #2
	str	r2, [r3]
.L63:
	ldr	r3, .L67+8
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L64
	ldr	r3, .L67+12
	mov	r2, #0
	str	r2, [r3]
	b	.L61
.L64:
	ldr	r3, .L67+12
	mov	r2, #2
	str	r2, [r3]
	nop
.L61:
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L68:
	.align	2
.L67:
	.word	P_1_i
	.word	P_1_st
	.word	C_1_i
	.word	C_1_st
	.size	init_threads, .-init_threads
	.align	2
	.global	exists_runnable_thread
	.syntax unified
	.arm
	.fpu softvfp
	.type	exists_runnable_thread, %function
exists_runnable_thread:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L74
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L70
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L71
.L70:
	ldr	r3, .L74+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L72
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L71
.L72:
	mov	r3, #0
	str	r3, [fp, #-8]
.L71:
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L75:
	.align	2
.L74:
	.word	P_1_st
	.word	C_1_st
	.size	exists_runnable_thread, .-exists_runnable_thread
	.align	2
	.global	eval
	.syntax unified
	.arm
	.fpu softvfp
	.type	eval, %function
eval:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
.L77:
	bl	exists_runnable_thread
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L85
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L80
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L85
	mov	r2, #1
	str	r2, [r3]
	bl	P_1
.L80:
	ldr	r3, .L85+4
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L77
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	beq	.L77
	ldr	r3, .L85+4
	mov	r2, #1
	str	r2, [r3]
	bl	C_1
	b	.L77
.L84:
	nop
.L79:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L86:
	.align	2
.L85:
	.word	P_1_st
	.word	C_1_st
	.size	eval, .-eval
	.align	2
	.global	fire_delta_events
	.syntax unified
	.arm
	.fpu softvfp
	.type	fire_delta_events, %function
fire_delta_events:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fire_delta_events, .-fire_delta_events
	.align	2
	.global	reset_delta_events
	.syntax unified
	.arm
	.fpu softvfp
	.type	reset_delta_events, %function
reset_delta_events:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reset_delta_events, .-reset_delta_events
	.align	2
	.global	fire_time_events
	.syntax unified
	.arm
	.fpu softvfp
	.type	fire_time_events, %function
fire_time_events:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L93
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L93+4
	mov	r2, #1
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L94:
	.align	2
.L93:
	.word	C_1_ev
	.word	P_1_ev
	.size	fire_time_events, .-fire_time_events
	.align	2
	.global	reset_time_events
	.syntax unified
	.arm
	.fpu softvfp
	.type	reset_time_events, %function
reset_time_events:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L100
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L96
	ldr	r3, .L100
	mov	r2, #2
	str	r2, [r3]
.L96:
	ldr	r3, .L100+4
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L99
	ldr	r3, .L100+4
	mov	r2, #2
	str	r2, [r3]
	nop
.L99:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L101:
	.align	2
.L100:
	.word	P_1_ev
	.word	C_1_ev
	.size	reset_time_events, .-reset_time_events
	.align	2
	.global	activate_threads
	.syntax unified
	.arm
	.fpu softvfp
	.type	activate_threads, %function
activate_threads:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	is_P_1_triggered
	str	r0, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	beq	.L103
	ldr	r3, .L107
	mov	r2, #0
	str	r2, [r3]
.L103:
	bl	is_C_1_triggered
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L107+4
	mov	r2, #0
	str	r2, [r3]
	nop
.L106:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L108:
	.align	2
.L107:
	.word	P_1_st
	.word	C_1_st
	.size	activate_threads, .-activate_threads
	.align	2
	.global	immediate_notify
	.syntax unified
	.arm
	.fpu softvfp
	.type	immediate_notify, %function
immediate_notify:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	activate_threads
	nop
	pop	{fp, pc}
	.size	immediate_notify, .-immediate_notify
	.align	2
	.global	stop_simulation
	.syntax unified
	.arm
	.fpu softvfp
	.type	stop_simulation, %function
stop_simulation:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	exists_runnable_thread
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	beq	.L112
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L113
.L112:
	mov	r3, #1
	str	r3, [fp, #-12]
.L113:
	ldr	r3, [fp, #-12]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	stop_simulation, .-stop_simulation
	.align	2
	.global	start_simulation
	.syntax unified
	.arm
	.fpu softvfp
	.type	start_simulation, %function
start_simulation:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	mov	r3, #0
	str	r3, [fp, #-16]
	bl	update_channels
	bl	init_threads
	bl	fire_delta_events
	bl	activate_threads
	bl	reset_delta_events
.L116:
	mov	r3, #1
	str	r3, [fp, #-16]
	bl	eval
	mov	r3, #2
	str	r3, [fp, #-16]
	bl	update_channels
	mov	r3, #3
	str	r3, [fp, #-16]
	bl	fire_delta_events
	bl	activate_threads
	bl	reset_delta_events
	bl	exists_runnable_thread
	str	r0, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L117
	mov	r3, #4
	str	r3, [fp, #-16]
	bl	fire_time_events
	bl	activate_threads
	bl	reset_time_events
.L117:
	bl	stop_simulation
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L122
	b	.L116
.L122:
	nop
.L119:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	start_simulation, .-start_simulation
	.align	2
	.global	init_model
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_model, %function
init_model:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L125
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L125+4
	mov	r2, #1
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L126:
	.align	2
.L125:
	.word	P_1_i
	.word	C_1_i
	.size	init_model, .-init_model
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L129
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L129+4
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L129+8
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L129+12
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L129+16
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L129+20
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-12]
	bl	init_model
	bl	start_simulation
	mov	r3, #0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L130:
	.align	2
.L129:
	.word	num
	.word	i
	.word	max_loop
	.word	timer
	.word	P_1_pc
	.word	C_1_pc
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
