	.file	"835923.c"
	.intel_syntax noprefix
	.text
	.section	.rodata
	.align 4
	.type	PRIME32_1, @object
	.size	PRIME32_1, 4
PRIME32_1:
	.long	-1640531535
	.align 4
	.type	PRIME32_2, @object
	.size	PRIME32_2, 4
PRIME32_2:
	.long	-2048144777
	.align 4
	.type	PRIME32_3, @object
	.size	PRIME32_3, 4
PRIME32_3:
	.long	-1028477379
	.align 4
	.type	PRIME32_4, @object
	.size	PRIME32_4, 4
PRIME32_4:
	.long	668265263
	.align 4
	.type	PRIME32_5, @object
	.size	PRIME32_5, 4
PRIME32_5:
	.long	374761393
	.text
	.type	XXH_rotl32, @function
XXH_rotl32:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -8[rbp]
	and	eax, 31
	mov	edx, DWORD PTR -4[rbp]
	mov	ecx, eax
	rol	edx, cl
	mov	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	XXH_rotl32, .-XXH_rotl32
	.type	XXH_read32, @function
XXH_read32:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 2[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 16
	or	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	lea	rcx, 3[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 24
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	XXH_read32, .-XXH_read32
	.type	XXH32_round, @function
XXH32_round:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, -2048144777
	imul	eax, DWORD PTR -8[rbp]
	add	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, 13
	mov	edi, eax
	call	XXH_rotl32
	mov	DWORD PTR -4[rbp], eax
	mov	edx, -1640531535
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	XXH32_round, .-XXH32_round
	.type	XXH32_avalanche, @function
XXH32_avalanche:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 15
	xor	DWORD PTR -4[rbp], eax
	mov	edx, -2048144777
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 13
	xor	DWORD PTR -4[rbp], eax
	mov	edx, -1028477379
	mov	eax, DWORD PTR -4[rbp]
	imul	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	shr	eax, 16
	xor	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	XXH32_avalanche, .-XXH32_avalanche
	.globl	XXH32_createState
	.type	XXH32_createState, @function
XXH32_createState:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 44
	call	malloc@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	XXH32_createState, .-XXH32_createState
	.globl	XXH32_freeState
	.type	XXH32_freeState, @function
XXH32_freeState:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	XXH32_freeState, .-XXH32_freeState
	.globl	XXH32_copyState
	.type	XXH32_copyState, @function
XXH32_copyState:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rcx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 44
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	XXH32_copyState, .-XXH32_copyState
	.globl	XXH32_reset
	.type	XXH32_reset, @function
XXH32_reset:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	cmp	QWORD PTR -8[rbp], 0
	jne	.L15
	mov	eax, 1
	jmp	.L16
.L15:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 44
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	edx, -1640531535
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	mov	edx, -2048144777
	add	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], edx
	mov	edx, -2048144777
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 4[rax], edx
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	DWORD PTR 8[rax], edx
	mov	ecx, -1640531535
	mov	eax, DWORD PTR -12[rbp]
	sub	eax, ecx
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 12[rax], edx
	mov	eax, 0
.L16:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	XXH32_reset, .-XXH32_reset
	.globl	XXH32_update
	.type	XXH32_update, @function
XXH32_update:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -56[rbp], rdx
	mov	rax, QWORD PTR -48[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	QWORD PTR -16[rbp], 0
	cmp	QWORD PTR -40[rbp], 0
	je	.L18
	cmp	QWORD PTR -48[rbp], 0
	jne	.L19
.L18:
	mov	eax, 1
	jmp	.L20
.L19:
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR 40[rax]
	mov	rax, QWORD PTR -56[rbp]
	add	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR 40[rax], edx
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 36[rax]
	test	eax, eax
	jne	.L21
	cmp	QWORD PTR -56[rbp], 15
	ja	.L22
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 40[rax]
	cmp	eax, 15
	jbe	.L21
.L22:
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR 36[rax], 1
.L21:
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 32[rax]
	mov	edx, eax
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	cmp	rax, 15
	ja	.L23
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 32[rax]
	mov	eax, eax
	lea	rdx, 16[rax]
	mov	rax, QWORD PTR -40[rbp]
	lea	rcx, [rdx+rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, QWORD PTR -48[rbp]
	mov	rsi, rax
	mov	rdi, rcx
	call	memcpy@PLT
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR 32[rax]
	mov	rax, QWORD PTR -56[rbp]
	add	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR 32[rax], edx
	mov	eax, 0
	jmp	.L20
.L23:
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 32[rax]
	mov	edx, eax
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	jmp	.L24
.L25:
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 32[rax]
	mov	edx, 16
	sub	edx, eax
	mov	edx, edx
	mov	rcx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rcx, rax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 32[rax]
	mov	eax, eax
	lea	rsi, 16[rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rsi
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 16
	mov	esi, 0
	mov	rdi, rax
	call	XXH_read32
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR [rax]
	mov	esi, edx
	mov	edi, eax
	call	XXH32_round
	mov	rdx, QWORD PTR -40[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 16
	mov	esi, 4
	mov	rdi, rax
	call	XXH_read32
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	esi, edx
	mov	edi, eax
	call	XXH32_round
	mov	rdx, QWORD PTR -40[rbp]
	mov	DWORD PTR 4[rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 16
	mov	esi, 8
	mov	rdi, rax
	call	XXH_read32
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	esi, edx
	mov	edi, eax
	call	XXH32_round
	mov	rdx, QWORD PTR -40[rbp]
	mov	DWORD PTR 8[rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 16
	mov	esi, 12
	mov	rdi, rax
	call	XXH_read32
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	esi, edx
	mov	edi, eax
	call	XXH32_round
	mov	rdx, QWORD PTR -40[rbp]
	mov	DWORD PTR 12[rdx], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 32[rax]
	mov	edx, 16
	sub	edx, eax
	mov	eax, edx
	add	QWORD PTR -16[rbp], rax
	sub	QWORD PTR -24[rbp], 16
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR 32[rax], 0
.L24:
	cmp	QWORD PTR -24[rbp], 15
	ja	.L25
	cmp	QWORD PTR -24[rbp], 0
	je	.L26
	mov	rdx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, [rdx+rax]
	mov	rax, QWORD PTR -40[rbp]
	lea	rcx, 16[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	mov	rdi, rcx
	call	memcpy@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR 32[rax], edx
.L26:
	mov	eax, 0
.L20:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	XXH32_update, .-XXH32_update
	.globl	XXH32_digest
	.type	XXH32_digest, @function
XXH32_digest:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	QWORD PTR -32[rbp], rdi
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 32[rax]
	mov	DWORD PTR -16[rbp], eax
	mov	DWORD PTR -12[rbp], 0
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 36[rax]
	cmp	eax, 1
	jne	.L28
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	mov	esi, 1
	mov	edi, eax
	call	XXH_rotl32
	mov	ebx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 4[rax]
	mov	esi, 7
	mov	edi, eax
	call	XXH_rotl32
	add	ebx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	esi, 12
	mov	edi, eax
	call	XXH_rotl32
	add	ebx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 12[rax]
	mov	esi, 18
	mov	edi, eax
	call	XXH_rotl32
	add	eax, ebx
	mov	DWORD PTR -20[rbp], eax
	jmp	.L29
.L28:
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	edx, 374761393
	add	eax, edx
	mov	DWORD PTR -20[rbp], eax
.L29:
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 40[rax]
	add	DWORD PTR -20[rbp], eax
	jmp	.L30
.L31:
	mov	eax, DWORD PTR -12[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	add	rdx, 16
	mov	rsi, rax
	mov	rdi, rdx
	call	XXH_read32
	mov	edx, -1028477379
	imul	eax, edx
	add	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, 17
	mov	edi, eax
	call	XXH_rotl32
	mov	DWORD PTR -20[rbp], eax
	mov	edx, 668265263
	mov	eax, DWORD PTR -20[rbp]
	imul	eax, edx
	mov	DWORD PTR -20[rbp], eax
	add	DWORD PTR -12[rbp], 4
	sub	DWORD PTR -16[rbp], 4
.L30:
	cmp	DWORD PTR -16[rbp], 3
	ja	.L31
	jmp	.L32
.L33:
	mov	rdx, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR -12[rbp]
	movzx	eax, BYTE PTR 16[rdx+rax]
	movzx	eax, al
	mov	edx, 374761393
	imul	eax, edx
	add	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, 11
	mov	edi, eax
	call	XXH_rotl32
	mov	DWORD PTR -20[rbp], eax
	mov	edx, -1640531535
	mov	eax, DWORD PTR -20[rbp]
	imul	eax, edx
	mov	DWORD PTR -20[rbp], eax
	sub	DWORD PTR -16[rbp], 1
	add	DWORD PTR -12[rbp], 1
.L32:
	cmp	DWORD PTR -16[rbp], 0
	jne	.L33
	mov	eax, DWORD PTR -20[rbp]
	mov	edi, eax
	call	XXH32_avalanche
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	XXH32_digest, .-XXH32_digest
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"835923.c"
	.text
	.section	.rodata
	.align	2
	.type	PRIME32_1, %object
	.size	PRIME32_1, 4
PRIME32_1:
	.word	-1640531535
	.align	2
	.type	PRIME32_2, %object
	.size	PRIME32_2, 4
PRIME32_2:
	.word	-2048144777
	.align	2
	.type	PRIME32_3, %object
	.size	PRIME32_3, 4
PRIME32_3:
	.word	-1028477379
	.align	2
	.type	PRIME32_4, %object
	.size	PRIME32_4, 4
PRIME32_4:
	.word	668265263
	.align	2
	.type	PRIME32_5, %object
	.size	PRIME32_5, 4
PRIME32_5:
	.word	374761393
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH_rotl32, %function
XXH_rotl32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-12]
	and	r3, r3, #31
	ldr	r2, [fp, #-8]
	rsb	r3, r3, #32
	ror	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	XXH_rotl32, .-XXH_rotl32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH_read32, %function
XXH_read32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	orr	r2, r1, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	orr	r2, r2, r3
	ldr	r3, [fp, #-12]
	add	r3, r3, #3
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	XXH_read32, .-XXH_read32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_round, %function
XXH32_round:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, .L7
	ldr	r3, [fp, #-12]
	mul	r3, r2, r3
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	mov	r1, #13
	ldr	r0, [fp, #-8]
	bl	XXH_rotl32
	str	r0, [fp, #-8]
	ldr	r2, .L7+4
	ldr	r3, [fp, #-8]
	mul	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L8:
	.align	2
.L7:
	.word	-2048144777
	.word	-1640531535
	.size	XXH32_round, .-XXH32_round
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_avalanche, %function
XXH32_avalanche:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #15
	ldr	r2, [fp, #-8]
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r2, .L11
	ldr	r3, [fp, #-8]
	mul	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #13
	ldr	r2, [fp, #-8]
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r2, .L11+4
	ldr	r3, [fp, #-8]
	mul	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	lsr	r3, r3, #16
	ldr	r2, [fp, #-8]
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L12:
	.align	2
.L11:
	.word	-2048144777
	.word	-1028477379
	.size	XXH32_avalanche, .-XXH32_avalanche
	.align	2
	.global	XXH32_createState
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_createState, %function
XXH32_createState:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #44
	bl	malloc
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
	.size	XXH32_createState, .-XXH32_createState
	.align	2
	.global	XXH32_freeState
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_freeState, %function
XXH32_freeState:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	free
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	XXH32_freeState, .-XXH32_freeState
	.align	2
	.global	XXH32_copyState
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_copyState, %function
XXH32_copyState:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r2, #44
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	memcpy
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	XXH32_copyState, .-XXH32_copyState
	.align	2
	.global	XXH32_reset
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_reset, %function
XXH32_reset:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L19
	mov	r3, #1
	b	.L20
.L19:
	mov	r2, #44
	mov	r1, #0
	ldr	r0, [fp, #-8]
	bl	memset
	ldr	r2, .L21
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldr	r2, .L21+4
	add	r2, r3, r2
	ldr	r3, [fp, #-8]
	str	r2, [r3]
	ldr	r2, .L21+4
	ldr	r3, [fp, #-12]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	str	r2, [r3, #4]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	str	r2, [r3, #8]
	ldr	r2, .L21
	ldr	r3, [fp, #-12]
	sub	r2, r3, r2
	ldr	r3, [fp, #-8]
	str	r2, [r3, #12]
	mov	r3, #0
.L20:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L22:
	.align	2
.L21:
	.word	-1640531535
	.word	-2048144777
	.size	XXH32_reset, .-XXH32_reset
	.align	2
	.global	XXH32_update
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_update, %function
XXH32_update:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	str	r2, [fp, #-40]
	ldr	r3, [fp, #-36]
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-32]
	cmp	r3, #0
	beq	.L24
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bne	.L25
.L24:
	mov	r3, #1
	b	.L26
.L25:
	ldr	r3, [fp, #-32]
	ldr	r2, [r3, #40]
	ldr	r3, [fp, #-40]
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3, #40]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #36]
	cmp	r3, #0
	bne	.L27
	ldr	r3, [fp, #-40]
	cmp	r3, #15
	bhi	.L28
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #40]
	cmp	r3, #15
	bls	.L27
.L28:
	ldr	r3, [fp, #-32]
	mov	r2, #1
	str	r2, [r3, #36]
.L27:
	ldr	r3, [fp, #-32]
	ldr	r2, [r3, #32]
	ldr	r3, [fp, #-40]
	add	r3, r2, r3
	cmp	r3, #15
	bhi	.L29
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #32]
	add	r3, r3, #16
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldr	r2, [fp, #-40]
	ldr	r1, [fp, #-36]
	mov	r0, r3
	bl	memcpy
	ldr	r3, [fp, #-32]
	ldr	r2, [r3, #32]
	ldr	r3, [fp, #-40]
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3, #32]
	mov	r3, #0
	b	.L26
.L29:
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #32]
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	b	.L30
.L31:
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #32]
	add	r3, r3, #16
	ldr	r2, [fp, #-32]
	add	r0, r2, r3
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r1, r2, r3
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #32]
	rsb	r3, r3, #16
	mov	r2, r3
	bl	memcpy
	ldr	r3, [fp, #-32]
	ldr	r4, [r3]
	ldr	r3, [fp, #-32]
	add	r3, r3, #16
	mov	r1, #0
	mov	r0, r3
	bl	XXH_read32
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	XXH32_round
	mov	r2, r0
	ldr	r3, [fp, #-32]
	str	r2, [r3]
	ldr	r3, [fp, #-32]
	ldr	r4, [r3, #4]
	ldr	r3, [fp, #-32]
	add	r3, r3, #16
	mov	r1, #4
	mov	r0, r3
	bl	XXH_read32
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	XXH32_round
	mov	r2, r0
	ldr	r3, [fp, #-32]
	str	r2, [r3, #4]
	ldr	r3, [fp, #-32]
	ldr	r4, [r3, #8]
	ldr	r3, [fp, #-32]
	add	r3, r3, #16
	mov	r1, #8
	mov	r0, r3
	bl	XXH_read32
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	XXH32_round
	mov	r2, r0
	ldr	r3, [fp, #-32]
	str	r2, [r3, #8]
	ldr	r3, [fp, #-32]
	ldr	r4, [r3, #12]
	ldr	r3, [fp, #-32]
	add	r3, r3, #16
	mov	r1, #12
	mov	r0, r3
	bl	XXH_read32
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	XXH32_round
	mov	r2, r0
	ldr	r3, [fp, #-32]
	str	r2, [r3, #12]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #32]
	ldr	r2, [fp, #-20]
	sub	r3, r2, r3
	add	r3, r3, #16
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	sub	r3, r3, #16
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	mov	r2, #0
	str	r2, [r3, #32]
.L30:
	ldr	r3, [fp, #-24]
	cmp	r3, #15
	bhi	.L31
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	beq	.L32
	ldr	r3, [fp, #-32]
	add	r0, r3, #16
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldr	r2, [fp, #-24]
	mov	r1, r3
	bl	memcpy
	ldr	r3, [fp, #-32]
	ldr	r2, [fp, #-24]
	str	r2, [r3, #32]
.L32:
	mov	r3, #0
.L26:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	XXH32_update, .-XXH32_update
	.align	2
	.global	XXH32_digest
	.syntax unified
	.arm
	.fpu softvfp
	.type	XXH32_digest, %function
XXH32_digest:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #32]
	str	r3, [fp, #-20]
	mov	r3, #0
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #36]
	cmp	r3, #1
	bne	.L34
	ldr	r3, [fp, #-32]
	ldr	r3, [r3]
	mov	r1, #1
	mov	r0, r3
	bl	XXH_rotl32
	mov	r4, r0
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	mov	r1, #7
	mov	r0, r3
	bl	XXH_rotl32
	mov	r3, r0
	add	r4, r4, r3
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #8]
	mov	r1, #12
	mov	r0, r3
	bl	XXH_rotl32
	mov	r3, r0
	add	r4, r4, r3
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #12]
	mov	r1, #18
	mov	r0, r3
	bl	XXH_rotl32
	mov	r3, r0
	add	r3, r4, r3
	str	r3, [fp, #-24]
	b	.L35
.L34:
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #8]
	ldr	r2, .L41
	add	r3, r3, r2
	str	r3, [fp, #-24]
.L35:
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #40]
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	b	.L36
.L37:
	ldr	r3, [fp, #-32]
	add	r3, r3, #16
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	XXH_read32
	mov	r3, r0
	ldr	r2, .L41+4
	mul	r3, r2, r3
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	mov	r1, #17
	ldr	r0, [fp, #-24]
	bl	XXH_rotl32
	str	r0, [fp, #-24]
	ldr	r2, .L41+8
	ldr	r3, [fp, #-24]
	mul	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #4
	str	r3, [fp, #-20]
.L36:
	ldr	r3, [fp, #-20]
	cmp	r3, #3
	bhi	.L37
	b	.L38
.L39:
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	add	r3, r3, #16
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L41
	mul	r3, r2, r3
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	mov	r1, #11
	ldr	r0, [fp, #-24]
	bl	XXH_rotl32
	str	r0, [fp, #-24]
	ldr	r2, .L41+12
	ldr	r3, [fp, #-24]
	mul	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L38:
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bne	.L39
	ldr	r0, [fp, #-24]
	bl	XXH32_avalanche
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L42:
	.align	2
.L41:
	.word	374761393
	.word	-1028477379
	.word	668265263
	.word	-1640531535
	.size	XXH32_digest, .-XXH32_digest
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
