	.file	"299962.c"
	.intel_syntax noprefix
	.text
	.globl	a
	.bss
	.align 32
	.type	a, @object
	.size	a, 4000000
a:
	.zero	4000000
	.globl	b
	.align 32
	.type	b, @object
	.size	b, 4000000
b:
	.zero	4000000
	.globl	one_d
	.align 32
	.type	one_d, @object
	.size	one_d, 4000000
one_d:
	.zero	4000000
	.globl	reduce
	.align 32
	.type	reduce, @object
	.size	reduce, 4000000
reduce:
	.zero	4000000
	.globl	transpose_reduce
	.align 32
	.type	transpose_reduce, @object
	.size	transpose_reduce, 4000000
transpose_reduce:
	.zero	4000000
	.text
	.globl	cal_time
	.type	cal_time, @function
cal_time:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR [rax]
	sub	rdx, rax
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, rdx
	movsd	xmm0, QWORD PTR .LC0[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR 8[rax]
	sub	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	movsd	xmm1, QWORD PTR .LC1[rip]
	divsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR -8[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	cal_time, .-cal_time
	.section	.rodata
.LC2:
	.string	"Sequential time: %lf ms\n"
.LC3:
	.string	"Parallel time: %lf ms\n"
	.align 8
.LC5:
	.string	"Parallel reduce + 1d time: %lf ms\n"
.LC6:
	.string	"Parallel reduce time: %lf ms\n"
	.align 8
.LC7:
	.string	"Parallel transpose_reduce time: %lf ms\n"
.LC8:
	.string	"Test pass!!!"
	.text
	.globl	test
	.type	test, @function
test:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	r11, -7999488[rsp]
.LPSRL0:
	sub	rsp, 4096
	or	DWORD PTR [rsp], 0
	cmp	rsp, r11
	jne	.LPSRL0
	sub	rsp, 672
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -8000152[rbp], 0
	jmp	.L4
.L7:
	mov	DWORD PTR -8000148[rbp], 0
	jmp	.L5
.L6:
	call	rand@PLT
	mov	ecx, eax
	movsx	rax, ecx
	imul	rax, rax, 1717986919
	shr	rax, 32
	sar	eax, 2
	mov	esi, ecx
	sar	esi, 31
	sub	eax, esi
	mov	edx, eax
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	add	eax, eax
	sub	ecx, eax
	mov	edx, ecx
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, a[rip]
	mov	DWORD PTR [rcx+rax], edx
	call	rand@PLT
	mov	ecx, eax
	movsx	rax, ecx
	imul	rax, rax, 1717986919
	shr	rax, 32
	sar	eax, 2
	mov	esi, ecx
	sar	esi, 31
	sub	eax, esi
	mov	edx, eax
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	add	eax, eax
	sub	ecx, eax
	mov	edx, ecx
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	DWORD PTR [rcx+rax], edx
	add	DWORD PTR -8000148[rbp], 1
.L5:
	cmp	DWORD PTR -8000148[rbp], 999
	jle	.L6
	add	DWORD PTR -8000152[rbp], 1
.L4:
	cmp	DWORD PTR -8000152[rbp], 999
	jle	.L7
	lea	rax, -8000048[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	mov	DWORD PTR -8000152[rbp], 0
	jmp	.L8
.L13:
	mov	DWORD PTR -8000148[rbp], 0
	jmp	.L9
.L12:
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	DWORD PTR -8000016[rbp+rax*4], 0
	mov	DWORD PTR -8000144[rbp], 0
	jmp	.L10
.L11:
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	esi, DWORD PTR -8000016[rbp+rax*4]
	mov	eax, DWORD PTR -8000144[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, a[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000144[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	eax, edx
	lea	edx, [rsi+rax]
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	mov	DWORD PTR -8000016[rbp+rax*4], edx
	add	DWORD PTR -8000144[rbp], 1
.L10:
	cmp	DWORD PTR -8000144[rbp], 999
	jle	.L11
	add	DWORD PTR -8000148[rbp], 1
.L9:
	cmp	DWORD PTR -8000148[rbp], 999
	jle	.L12
	add	DWORD PTR -8000152[rbp], 1
.L8:
	cmp	DWORD PTR -8000152[rbp], 999
	jle	.L13
	lea	rax, -8000032[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	lea	rdx, -8000048[rbp]
	lea	rax, -8000032[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	cal_time
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -8000072[rbp], xmm0
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8000072[rbp]
	movq	rax, xmm2
	movq	xmm0, rax
	lea	rdi, .LC2[rip]
	mov	eax, 1
	call	printf@PLT
	lea	rax, -8000048[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	mov	DWORD PTR -8000140[rbp], 0
	jmp	.L14
.L19:
	mov	DWORD PTR -8000136[rbp], 0
	jmp	.L15
.L18:
	mov	eax, DWORD PTR -8000136[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000140[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	DWORD PTR -4000016[rbp+rax*4], 0
	mov	DWORD PTR -8000132[rbp], 0
	jmp	.L16
.L17:
	mov	eax, DWORD PTR -8000136[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000140[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	esi, DWORD PTR -4000016[rbp+rax*4]
	mov	eax, DWORD PTR -8000132[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000140[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, a[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8000136[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000132[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	eax, edx
	lea	edx, [rsi+rax]
	mov	eax, DWORD PTR -8000136[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000140[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	mov	DWORD PTR -4000016[rbp+rax*4], edx
	add	DWORD PTR -8000132[rbp], 1
.L16:
	cmp	DWORD PTR -8000132[rbp], 999
	jle	.L17
	add	DWORD PTR -8000136[rbp], 1
.L15:
	cmp	DWORD PTR -8000136[rbp], 999
	jle	.L18
	add	DWORD PTR -8000140[rbp], 1
.L14:
	cmp	DWORD PTR -8000140[rbp], 999
	jle	.L19
	lea	rax, -8000032[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	lea	rdx, -8000048[rbp]
	lea	rax, -8000032[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	cal_time
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -8000068[rbp], xmm0
	pxor	xmm3, xmm3
	cvtss2sd	xmm3, DWORD PTR -8000068[rbp]
	movq	rax, xmm3
	movq	xmm0, rax
	lea	rdi, .LC3[rip]
	mov	eax, 1
	call	printf@PLT
	lea	rax, -8000048[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	mov	DWORD PTR -8000128[rbp], 0
	jmp	.L20
.L25:
	mov	DWORD PTR -8000124[rbp], 0
	jmp	.L21
.L24:
	pxor	xmm0, xmm0
	movss	DWORD PTR -8000120[rbp], xmm0
	mov	eax, DWORD PTR -8000128[rbp]
	imul	edx, eax, 1000
	mov	eax, DWORD PTR -8000124[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, one_d[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8000116[rbp], 0
	jmp	.L22
.L23:
	mov	eax, DWORD PTR -8000116[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000128[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, a[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8000124[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000116[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	eax, edx
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	xmm1, DWORD PTR -8000120[rbp]
	addss	xmm0, xmm1
	movss	DWORD PTR -8000120[rbp], xmm0
	add	DWORD PTR -8000116[rbp], 1
.L22:
	cmp	DWORD PTR -8000116[rbp], 999
	jle	.L23
	mov	eax, DWORD PTR -8000128[rbp]
	imul	edx, eax, 1000
	mov	eax, DWORD PTR -8000124[rbp]
	add	edx, eax
	movss	xmm0, DWORD PTR -8000120[rbp]
	cvttss2si	eax, xmm0
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, one_d[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -8000124[rbp], 1
.L21:
	cmp	DWORD PTR -8000124[rbp], 999
	jle	.L24
	add	DWORD PTR -8000128[rbp], 1
.L20:
	cmp	DWORD PTR -8000128[rbp], 999
	jle	.L25
	lea	rax, -8000032[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	lea	rdx, -8000048[rbp]
	lea	rax, -8000032[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	cal_time
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -8000064[rbp], xmm0
	pxor	xmm4, xmm4
	cvtss2sd	xmm4, DWORD PTR -8000064[rbp]
	movq	rax, xmm4
	movq	xmm0, rax
	lea	rdi, .LC5[rip]
	mov	eax, 1
	call	printf@PLT
	lea	rax, -8000048[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	mov	DWORD PTR -8000112[rbp], 0
	jmp	.L26
.L31:
	mov	DWORD PTR -8000108[rbp], 0
	jmp	.L27
.L30:
	pxor	xmm0, xmm0
	movss	DWORD PTR -8000104[rbp], xmm0
	mov	DWORD PTR -8000100[rbp], 0
	jmp	.L28
.L29:
	mov	eax, DWORD PTR -8000100[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000112[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, a[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8000108[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000100[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	eax, edx
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	xmm1, DWORD PTR -8000104[rbp]
	addss	xmm0, xmm1
	movss	DWORD PTR -8000104[rbp], xmm0
	add	DWORD PTR -8000100[rbp], 1
.L28:
	cmp	DWORD PTR -8000100[rbp], 999
	jle	.L29
	movss	xmm0, DWORD PTR -8000104[rbp]
	cvttss2si	eax, xmm0
	mov	edx, DWORD PTR -8000108[rbp]
	movsx	rcx, edx
	mov	edx, DWORD PTR -8000112[rbp]
	movsx	rdx, edx
	imul	rdx, rdx, 1000
	add	rdx, rcx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, reduce[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -8000108[rbp], 1
.L27:
	cmp	DWORD PTR -8000108[rbp], 999
	jle	.L30
	add	DWORD PTR -8000112[rbp], 1
.L26:
	cmp	DWORD PTR -8000112[rbp], 999
	jle	.L31
	lea	rax, -8000032[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	lea	rdx, -8000048[rbp]
	lea	rax, -8000032[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	cal_time
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -8000060[rbp], xmm0
	pxor	xmm5, xmm5
	cvtss2sd	xmm5, DWORD PTR -8000060[rbp]
	movq	rax, xmm5
	movq	xmm0, rax
	lea	rdi, .LC6[rip]
	mov	eax, 1
	call	printf@PLT
	lea	rax, -8000048[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	mov	DWORD PTR -8000096[rbp], 0
	jmp	.L32
.L35:
	mov	eax, DWORD PTR -8000096[rbp]
	add	eax, 1
	mov	DWORD PTR -8000092[rbp], eax
	jmp	.L33
.L34:
	mov	eax, DWORD PTR -8000092[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000096[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	eax, DWORD PTR [rdx+rax]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	DWORD PTR -8000052[rbp], xmm0
	mov	eax, DWORD PTR -8000096[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000092[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8000092[rbp]
	movsx	rcx, edx
	mov	edx, DWORD PTR -8000096[rbp]
	movsx	rdx, edx
	imul	rdx, rdx, 1000
	add	rdx, rcx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, b[rip]
	mov	DWORD PTR [rcx+rdx], eax
	movss	xmm0, DWORD PTR -8000052[rbp]
	cvttss2si	eax, xmm0
	mov	edx, DWORD PTR -8000096[rbp]
	movsx	rcx, edx
	mov	edx, DWORD PTR -8000092[rbp]
	movsx	rdx, edx
	imul	rdx, rdx, 1000
	add	rdx, rcx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, b[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -8000092[rbp], 1
.L33:
	cmp	DWORD PTR -8000092[rbp], 999
	jle	.L34
	add	DWORD PTR -8000096[rbp], 1
.L32:
	cmp	DWORD PTR -8000096[rbp], 999
	jle	.L35
	mov	DWORD PTR -8000088[rbp], 0
	jmp	.L36
.L41:
	mov	DWORD PTR -8000084[rbp], 0
	jmp	.L37
.L40:
	pxor	xmm0, xmm0
	movss	DWORD PTR -8000080[rbp], xmm0
	mov	eax, DWORD PTR -8000084[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000088[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, transpose_reduce[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8000076[rbp], 0
	jmp	.L38
.L39:
	mov	eax, DWORD PTR -8000076[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000088[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	lea	rdx, 0[0+rax*4]
	lea	rax, a[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8000076[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000084[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, b[rip]
	mov	eax, DWORD PTR [rcx+rax]
	imul	eax, edx
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	movss	xmm1, DWORD PTR -8000080[rbp]
	addss	xmm0, xmm1
	movss	DWORD PTR -8000080[rbp], xmm0
	add	DWORD PTR -8000076[rbp], 1
.L38:
	cmp	DWORD PTR -8000076[rbp], 999
	jle	.L39
	movss	xmm0, DWORD PTR -8000080[rbp]
	cvttss2si	eax, xmm0
	mov	edx, DWORD PTR -8000084[rbp]
	movsx	rcx, edx
	mov	edx, DWORD PTR -8000088[rbp]
	movsx	rdx, edx
	imul	rdx, rdx, 1000
	add	rdx, rcx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, transpose_reduce[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -8000084[rbp], 1
.L37:
	cmp	DWORD PTR -8000084[rbp], 999
	jle	.L40
	add	DWORD PTR -8000088[rbp], 1
.L36:
	cmp	DWORD PTR -8000088[rbp], 999
	jle	.L41
	lea	rax, -8000032[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	lea	rdx, -8000048[rbp]
	lea	rax, -8000032[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	cal_time
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -8000056[rbp], xmm0
	pxor	xmm6, xmm6
	cvtss2sd	xmm6, DWORD PTR -8000056[rbp]
	movq	rax, xmm6
	movq	xmm0, rax
	lea	rdi, .LC7[rip]
	mov	eax, 1
	call	printf@PLT
	mov	DWORD PTR -8000152[rbp], 0
	jmp	.L42
.L46:
	mov	DWORD PTR -8000148[rbp], 0
	jmp	.L43
.L45:
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	edx, DWORD PTR -8000016[rbp+rax*4]
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	mov	eax, DWORD PTR -4000016[rbp+rax*4]
	cmp	edx, eax
	jne	.L44
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	edx, DWORD PTR -8000016[rbp+rax*4]
	mov	eax, DWORD PTR -8000152[rbp]
	imul	ecx, eax, 1000
	mov	eax, DWORD PTR -8000148[rbp]
	add	eax, ecx
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, one_d[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cmp	edx, eax
	jne	.L44
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	edx, DWORD PTR -8000016[rbp+rax*4]
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, reduce[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cmp	edx, eax
	jne	.L44
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rdx
	mov	edx, DWORD PTR -8000016[rbp+rax*4]
	mov	eax, DWORD PTR -8000148[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8000152[rbp]
	cdqe
	imul	rax, rax, 1000
	add	rax, rcx
	lea	rcx, 0[0+rax*4]
	lea	rax, transpose_reduce[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cmp	edx, eax
	jne	.L44
	add	DWORD PTR -8000148[rbp], 1
.L43:
	cmp	DWORD PTR -8000148[rbp], 999
	jle	.L45
.L44:
	add	DWORD PTR -8000152[rbp], 1
.L42:
	cmp	DWORD PTR -8000152[rbp], 999
	jle	.L46
	cmp	DWORD PTR -8000152[rbp], 1000
	jne	.L47
	cmp	DWORD PTR -8000148[rbp], 1000
	jne	.L47
	lea	rdi, .LC8[rip]
	call	puts@PLT
	movss	xmm0, DWORD PTR -8000072[rbp]
	comiss	xmm0, DWORD PTR -8000068[rbp]
	seta	al
	movzx	eax, al
	jmp	.L49
.L47:
	mov	eax, -1
.L49:
	mov	rdi, QWORD PTR -8[rbp]
	sub	rdi, QWORD PTR fs:40
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	test, .-test
	.section	.rodata
.LC10:
	.string	"Total of Parallel: %f\n"
.LC11:
	.string	"Total of Sequence: %f\n"
.LC12:
	.string	"Parallel / Sequence = %f\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	pxor	xmm0, xmm0
	movss	DWORD PTR -20[rbp], xmm0
	pxor	xmm0, xmm0
	movss	DWORD PTR -16[rbp], xmm0
	mov	DWORD PTR -12[rbp], 0
	jmp	.L52
.L55:
	mov	eax, 0
	call	test
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L53
	movss	xmm1, DWORD PTR -16[rbp]
	movss	xmm0, DWORD PTR .LC9[rip]
	addss	xmm0, xmm1
	movss	DWORD PTR -16[rbp], xmm0
	jmp	.L54
.L53:
	movss	xmm1, DWORD PTR -20[rbp]
	movss	xmm0, DWORD PTR .LC9[rip]
	addss	xmm0, xmm1
	movss	DWORD PTR -20[rbp], xmm0
.L54:
	add	DWORD PTR -12[rbp], 1
.L52:
	cmp	DWORD PTR -12[rbp], 0
	jle	.L55
	movss	xmm0, DWORD PTR -20[rbp]
	divss	xmm0, DWORD PTR -16[rbp]
	movss	DWORD PTR -8[rbp], xmm0
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movq	rax, xmm2
	movq	xmm0, rax
	lea	rdi, .LC10[rip]
	mov	eax, 1
	call	printf@PLT
	pxor	xmm3, xmm3
	cvtss2sd	xmm3, DWORD PTR -16[rbp]
	movq	rax, xmm3
	movq	xmm0, rax
	lea	rdi, .LC11[rip]
	mov	eax, 1
	call	printf@PLT
	pxor	xmm4, xmm4
	cvtss2sd	xmm4, DWORD PTR -8[rbp]
	movq	rax, xmm4
	movq	xmm0, rax
	lea	rdi, .LC12[rip]
	mov	eax, 1
	call	printf@PLT
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	1083129856
	.align 8
.LC1:
	.long	0
	.long	1093567616
	.align 4
.LC9:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"299962.c"
	.text
	.comm	a,4000000,4
	.comm	b,4000000,4
	.comm	one_d,4000000,4
	.comm	reduce,4000000,4
	.comm	transpose_reduce,4000000,4
	.global	__aeabi_i2d
	.global	__aeabi_dmul
	.global	__aeabi_ddiv
	.global	__aeabi_dadd
	.align	2
	.global	cal_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	cal_time, %function
cal_time:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L3
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #4]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L3+4
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L4:
	.align	2
.L3:
	.word	1083129856
	.word	1093567616
	.size	cal_time, .-cal_time
	.global	__aeabi_d2f
	.global	__aeabi_f2d
	.section	.rodata
	.align	2
.LC0:
	.ascii	"Sequential time: %lf ms\012\000"
	.align	2
.LC1:
	.ascii	"Parallel time: %lf ms\012\000"
	.global	__aeabi_i2f
	.global	__aeabi_fadd
	.global	__aeabi_f2iz
	.align	2
.LC2:
	.ascii	"Parallel reduce + 1d time: %lf ms\012\000"
	.align	2
.LC3:
	.ascii	"Parallel reduce time: %lf ms\012\000"
	.align	2
.LC4:
	.ascii	"Parallel transpose_reduce time: %lf ms\012\000"
	.align	2
.LC5:
	.ascii	"Test pass!!!\000"
	.global	__aeabi_fcmpgt
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	test
	.syntax unified
	.arm
	.fpu softvfp
	.type	test, %function
test:
	@ args = 0, pretend = 0, frame = 8000128
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #7995392
	sub	sp, sp, #4736
	sub	sp, sp, #4
	ldr	r3, .L54+56
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-636]
	b	.L6
.L9:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-632]
	b	.L7
.L8:
	bl	rand
	mov	r1, r0
	ldr	r3, .L54
	smull	r2, r3, r1, r3
	asr	r2, r3, #2
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	sub	r2, r1, r3
	ldr	r0, .L54+20
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r1, [r3, #-636]
	mov	r3, r1
	lsl	r3, r3, #5
	sub	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #3
	sub	r1, fp, #7995392
	sub	r1, r1, #12
	sub	r1, r1, #4096
	ldr	r1, [r1, #-632]
	add	r3, r3, r1
	str	r2, [r0, r3, lsl #2]
	bl	rand
	mov	r1, r0
	ldr	r3, .L54
	smull	r2, r3, r1, r3
	asr	r2, r3, #2
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	sub	r2, r1, r3
	ldr	r0, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r1, [r3, #-636]
	mov	r3, r1
	lsl	r3, r3, #5
	sub	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #3
	sub	r1, fp, #7995392
	sub	r1, r1, #12
	sub	r1, r1, #4096
	ldr	r1, [r1, #-632]
	add	r3, r3, r1
	str	r2, [r0, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	add	r3, r3, #1
	str	r3, [r2, #-632]
.L7:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	cmp	r3, #1000
	blt	.L8
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-636]
	add	r3, r3, #1
	str	r3, [r2, #-636]
.L6:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-636]
	cmp	r3, #1000
	blt	.L9
	ldr	r3, .L54+28
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-636]
	b	.L10
.L15:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-632]
	b	.L11
.L14:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	mov	r2, #0
	str	r2, [r3, #-516]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-628]
	b	.L12
.L13:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-516]
	ldr	r0, .L54+20
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-628]
	add	r3, r3, r2
	ldr	r0, [r0, r3, lsl #2]
	ldr	ip, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-628]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	ldr	r3, [ip, r3, lsl #2]
	mul	r3, r0, r3
	add	r1, r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r0, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	str	r1, [r3, #-516]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-628]
	add	r3, r3, #1
	str	r3, [r2, #-628]
.L12:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-628]
	cmp	r3, #1000
	blt	.L13
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	add	r3, r3, #1
	str	r3, [r2, #-632]
.L11:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	cmp	r3, #1000
	blt	.L14
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-636]
	add	r3, r3, #1
	str	r3, [r2, #-636]
.L10:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-636]
	cmp	r3, #1000
	blt	.L15
	ldr	r3, .L54+32
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	ldr	r2, .L54+28
	sub	r3, fp, #12
	add	r2, r3, r2
	ldr	r3, .L54+32
	sub	r1, fp, #12
	add	r3, r1, r3
	mov	r1, r2
	mov	r0, r3
	bl	cal_time
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r4, #-556]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-556]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L54+4
	bl	printf
	ldr	r3, .L54+28
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-624]
	b	.L16
.L21:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-620]
	b	.L17
.L20:
	sub	r3, fp, #3997696
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-624]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-620]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	mov	r2, #0
	str	r2, [r3, #-2308]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-616]
	b	.L18
.L19:
	sub	r3, fp, #3997696
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-624]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-620]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-2308]
	ldr	r0, .L54+20
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-624]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-616]
	add	r3, r3, r2
	ldr	r0, [r0, r3, lsl #2]
	ldr	ip, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-616]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-620]
	add	r3, r3, r2
	ldr	r3, [ip, r3, lsl #2]
	mul	r3, r0, r3
	add	r1, r1, r3
	sub	r3, fp, #3997696
	sub	r3, r3, #12
	mov	r0, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-624]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-620]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	str	r1, [r3, #-2308]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-616]
	add	r3, r3, #1
	str	r3, [r2, #-616]
.L18:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-616]
	cmp	r3, #1000
	blt	.L19
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-620]
	add	r3, r3, #1
	str	r3, [r2, #-620]
.L17:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-620]
	cmp	r3, #1000
	blt	.L20
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-624]
	add	r3, r3, #1
	str	r3, [r2, #-624]
.L16:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-624]
	cmp	r3, #1000
	blt	.L21
	ldr	r3, .L54+32
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	ldr	r2, .L54+28
	sub	r3, fp, #12
	add	r2, r3, r2
	ldr	r3, .L54+32
	sub	r1, fp, #12
	add	r3, r1, r3
	mov	r1, r2
	mov	r0, r3
	bl	cal_time
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r4, #-552]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-552]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L54+8
	bl	printf
	ldr	r3, .L54+28
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-612]
	b	.L22
.L27:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-608]
	b	.L23
.L26:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-604]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-612]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-608]
	add	r3, r2, r3
	ldr	r2, .L54+40
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-600]
	b	.L24
.L25:
	ldr	r1, .L54+20
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-612]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-600]
	add	r3, r3, r2
	ldr	r1, [r1, r3, lsl #2]
	ldr	r0, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-600]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-608]
	add	r3, r3, r2
	ldr	r3, [r0, r3, lsl #2]
	mul	r3, r1, r3
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r2, r0
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r2
	ldr	r0, [r3, #-604]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r4, #-604]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-600]
	add	r3, r3, #1
	str	r3, [r2, #-600]
.L24:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-600]
	cmp	r3, #1000
	blt	.L25
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-612]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-608]
	add	r4, r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-604]	@ float
	bl	__aeabi_f2iz
	mov	r3, r0
	ldr	r2, .L54+40
	str	r3, [r2, r4, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-608]
	add	r3, r3, #1
	str	r3, [r2, #-608]
.L23:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-608]
	cmp	r3, #1000
	blt	.L26
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-612]
	add	r3, r3, #1
	str	r3, [r2, #-612]
.L22:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-612]
	cmp	r3, #1000
	blt	.L27
	ldr	r3, .L54+32
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	ldr	r2, .L54+28
	sub	r3, fp, #12
	add	r2, r3, r2
	ldr	r3, .L54+32
	sub	r1, fp, #12
	add	r3, r1, r3
	mov	r1, r2
	mov	r0, r3
	bl	cal_time
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r4, #-548]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-548]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L54+12
	bl	printf
	ldr	r3, .L54+28
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-596]
	b	.L28
.L33:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-592]
	b	.L29
.L32:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-588]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-584]
	b	.L30
.L31:
	ldr	r1, .L54+20
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-596]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-584]
	add	r3, r3, r2
	ldr	r1, [r1, r3, lsl #2]
	ldr	r0, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-584]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-592]
	add	r3, r3, r2
	ldr	r3, [r0, r3, lsl #2]
	mul	r3, r1, r3
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r2, r0
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r2
	ldr	r0, [r3, #-588]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r4, #-588]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-584]
	add	r3, r3, #1
	str	r3, [r2, #-584]
.L30:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-584]
	cmp	r3, #1000
	blt	.L31
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-588]	@ float
	bl	__aeabi_f2iz
	mov	r1, r0
	ldr	r0, .L54+44
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-596]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-592]
	add	r3, r3, r2
	str	r1, [r0, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-592]
	add	r3, r3, #1
	str	r3, [r2, #-592]
.L29:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-592]
	cmp	r3, #1000
	blt	.L32
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-596]
	add	r3, r3, #1
	str	r3, [r2, #-596]
.L28:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-596]
	cmp	r3, #1000
	blt	.L33
	ldr	r3, .L54+32
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	ldr	r2, .L54+28
	sub	r3, fp, #12
	add	r2, r3, r2
	ldr	r3, .L54+32
	sub	r1, fp, #12
	add	r3, r1, r3
	mov	r1, r2
	mov	r0, r3
	bl	cal_time
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r4, #-544]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-544]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L54+16
	bl	printf
	ldr	r3, .L54+28
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-580]
	b	.L34
.L37:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-580]
	add	r3, r3, #1
	str	r3, [r2, #-576]
	b	.L35
.L55:
	.align	2
.L54:
	.word	1717986919
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	a
	.word	b
	.word	-8000020
	.word	-8000012
	.word	.LC4
	.word	one_d
	.word	reduce
	.word	transpose_reduce
	.word	.LC5
	.word	.LC6
.L36:
	ldr	r1, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-580]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-576]
	add	r3, r3, r2
	ldr	r2, [r1, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	mov	r0, r2
	bl	__aeabi_i2f
	mov	r3, r0
	str	r3, [r4, #-536]	@ float
	ldr	r1, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-576]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-580]
	add	r3, r3, r2
	ldr	r1, [r1, r3, lsl #2]
	ldr	r0, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-580]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-576]
	add	r3, r3, r2
	str	r1, [r0, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-536]	@ float
	bl	__aeabi_f2iz
	mov	r1, r0
	ldr	r0, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-576]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-580]
	add	r3, r3, r2
	str	r1, [r0, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-576]
	add	r3, r3, #1
	str	r3, [r2, #-576]
.L35:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-576]
	cmp	r3, #1000
	blt	.L36
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-580]
	add	r3, r3, #1
	str	r3, [r2, #-580]
.L34:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-580]
	cmp	r3, #1000
	blt	.L37
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-572]
	b	.L38
.L43:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-568]
	b	.L39
.L42:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-564]	@ float
	ldr	r1, .L54+48
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-572]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-568]
	add	r3, r3, r2
	mov	r2, #0
	str	r2, [r1, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-560]
	b	.L40
.L41:
	ldr	r1, .L54+20
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-572]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-560]
	add	r3, r3, r2
	ldr	r1, [r1, r3, lsl #2]
	ldr	r0, .L54+24
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-568]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-560]
	add	r3, r3, r2
	ldr	r3, [r0, r3, lsl #2]
	mul	r3, r1, r3
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r2, r0
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r2
	ldr	r0, [r3, #-564]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r4, #-564]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-560]
	add	r3, r3, #1
	str	r3, [r2, #-560]
.L40:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-560]
	cmp	r3, #1000
	blt	.L41
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-564]	@ float
	bl	__aeabi_f2iz
	mov	r1, r0
	ldr	r0, .L54+48
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-572]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-568]
	add	r3, r3, r2
	str	r1, [r0, r3, lsl #2]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-568]
	add	r3, r3, #1
	str	r3, [r2, #-568]
.L39:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-568]
	cmp	r3, #1000
	blt	.L42
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-572]
	add	r3, r3, #1
	str	r3, [r2, #-572]
.L38:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-572]
	cmp	r3, #1000
	blt	.L43
	ldr	r3, .L54+32
	sub	r2, fp, #12
	add	r3, r2, r3
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	ldr	r2, .L54+28
	sub	r3, fp, #12
	add	r2, r3, r2
	ldr	r3, .L54+32
	sub	r1, fp, #12
	add	r3, r1, r3
	mov	r1, r2
	mov	r0, r3
	bl	cal_time
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r4, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r4, #-540]	@ float
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r0, [r3, #-540]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L54+36
	bl	printf
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-636]
	b	.L44
.L48:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-632]
	b	.L45
.L47:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-516]
	sub	r3, fp, #3997696
	sub	r3, r3, #12
	mov	r0, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r3, [r3, #-2308]
	cmp	r1, r3
	bne	.L46
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-516]
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	add	r3, r2, r3
	ldr	r2, .L54+40
	ldr	r3, [r2, r3, lsl #2]
	cmp	r1, r3
	bne	.L46
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-516]
	ldr	r0, .L54+44
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	ldr	r3, [r0, r3, lsl #2]
	cmp	r1, r3
	bne	.L46
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r1, [r3, #-516]
	ldr	r0, .L54+48
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r2, [r3, #-636]
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #7995392
	sub	r2, r2, #12
	sub	r2, r2, #4096
	ldr	r2, [r2, #-632]
	add	r3, r3, r2
	ldr	r3, [r0, r3, lsl #2]
	cmp	r1, r3
	bne	.L46
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	add	r3, r3, #1
	str	r3, [r2, #-632]
.L45:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	cmp	r3, #1000
	blt	.L47
.L46:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-636]
	add	r3, r3, #1
	str	r3, [r2, #-636]
.L44:
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-636]
	cmp	r3, #1000
	blt	.L48
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-636]
	cmp	r3, #1000
	bne	.L49
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	ldr	r3, [r3, #-632]
	cmp	r3, #1000
	bne	.L49
	ldr	r0, .L54+52
	bl	puts
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r2, r3
	sub	r3, fp, #7995392
	sub	r3, r3, #12
	sub	r3, r3, #4096
	mov	r1, #1
	mov	r4, r1
	ldr	r1, [r3, #-552]	@ float
	ldr	r0, [r2, #-556]	@ float
	bl	__aeabi_fcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L50
	mov	r3, #0
	mov	r4, r3
.L50:
	and	r3, r4, #255
	b	.L52
.L49:
	mvn	r3, #0
.L52:
	ldr	r2, .L54+56
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L53
	bl	__stack_chk_fail
.L53:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	test, .-test
	.global	__aeabi_fdiv
	.section	.rodata
	.align	2
.LC7:
	.ascii	"Total of Parallel: %f\012\000"
	.align	2
.LC8:
	.ascii	"Total of Sequence: %f\012\000"
	.align	2
.LC9:
	.ascii	"Parallel / Sequence = %f\012\000"
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	mov	r3, #0
	str	r3, [fp, #-24]	@ float
	mov	r3, #0
	str	r3, [fp, #-20]	@ float
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L57
.L60:
	bl	test
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L58
	mov	r1, #1065353216
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [fp, #-20]	@ float
	b	.L59
.L58:
	mov	r1, #1065353216
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [fp, #-24]	@ float
.L59:
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L57:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	ble	.L60
	ldr	r1, [fp, #-20]	@ float
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_fdiv
	mov	r3, r0
	str	r3, [fp, #-12]	@ float
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L62
	bl	printf
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L62+4
	bl	printf
	ldr	r0, [fp, #-12]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L62+8
	bl	printf
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L63:
	.align	2
.L62:
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
