	.file	"112891.c"
	.intel_syntax noprefix
	.text
	.globl	pc
	.bss
	.align 2
	.type	pc, @object
	.size	pc, 2
pc:
	.zero	2
	.globl	sp
	.type	sp, @object
	.size	sp, 1
sp:
	.zero	1
	.globl	a
	.type	a, @object
	.size	a, 1
a:
	.zero	1
	.globl	x
	.type	x, @object
	.size	x, 1
x:
	.zero	1
	.globl	y
	.type	y, @object
	.size	y, 1
y:
	.zero	1
	.globl	status
	.type	status, @object
	.size	status, 1
status:
	.zero	1
	.globl	instructions
	.align 4
	.type	instructions, @object
	.size	instructions, 4
instructions:
	.zero	4
	.globl	clockticks6502
	.align 4
	.type	clockticks6502, @object
	.size	clockticks6502, 4
clockticks6502:
	.zero	4
	.globl	clockgoal6502
	.align 4
	.type	clockgoal6502, @object
	.size	clockgoal6502, 4
clockgoal6502:
	.zero	4
	.globl	oldpc
	.align 2
	.type	oldpc, @object
	.size	oldpc, 2
oldpc:
	.zero	2
	.globl	ea
	.align 2
	.type	ea, @object
	.size	ea, 2
ea:
	.zero	2
	.globl	reladdr
	.align 2
	.type	reladdr, @object
	.size	reladdr, 2
reladdr:
	.zero	2
	.globl	value
	.align 2
	.type	value, @object
	.size	value, 2
value:
	.zero	2
	.globl	result
	.align 2
	.type	result, @object
	.size	result, 2
result:
	.zero	2
	.globl	opcode
	.type	opcode, @object
	.size	opcode, 1
opcode:
	.zero	1
	.globl	oldstatus
	.type	oldstatus, @object
	.size	oldstatus, 1
oldstatus:
	.zero	1
	.text
	.globl	push16
	.type	push16, @function
push16:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	shr	ax, 8
	movzx	edx, al
	movzx	eax, BYTE PTR sp[rip]
	movzx	eax, al
	add	ax, 256
	movzx	eax, ax
	mov	esi, edx
	mov	edi, eax
	call	write6502@PLT
	movzx	eax, WORD PTR -4[rbp]
	movzx	edx, al
	movzx	eax, BYTE PTR sp[rip]
	movzx	eax, al
	sub	eax, 1
	movzx	eax, al
	add	ax, 256
	movzx	eax, ax
	mov	esi, edx
	mov	edi, eax
	call	write6502@PLT
	movzx	eax, BYTE PTR sp[rip]
	sub	eax, 2
	mov	BYTE PTR sp[rip], al
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	push16, .-push16
	.globl	push8
	.type	push8, @function
push8:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	edx, BYTE PTR -4[rbp]
	movzx	eax, BYTE PTR sp[rip]
	lea	ecx, -1[rax]
	mov	BYTE PTR sp[rip], cl
	movzx	eax, al
	add	ax, 256
	movzx	eax, ax
	mov	esi, edx
	mov	edi, eax
	call	write6502@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	push8, .-push8
	.globl	pull16
	.type	pull16, @function
pull16:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	movzx	eax, BYTE PTR sp[rip]
	movzx	eax, al
	add	eax, 1
	movzx	eax, al
	add	ax, 256
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, BYTE PTR sp[rip]
	movzx	eax, al
	add	eax, 2
	movzx	eax, al
	add	ax, 256
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR -18[rbp], ax
	movzx	eax, BYTE PTR sp[rip]
	add	eax, 2
	mov	BYTE PTR sp[rip], al
	movzx	eax, WORD PTR -18[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	pull16, .-pull16
	.globl	pull8
	.type	pull8, @function
pull8:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR sp[rip]
	add	eax, 1
	mov	BYTE PTR sp[rip], al
	movzx	eax, BYTE PTR sp[rip]
	movzx	eax, al
	add	ax, 256
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	pull8, .-pull8
	.globl	reset6502
	.type	reset6502, @function
reset6502:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	mov	edi, 65532
	call	read6502@PLT
	movzx	ebx, al
	mov	edi, 65533
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR pc[rip], ax
	mov	BYTE PTR a[rip], 0
	mov	BYTE PTR x[rip], 0
	mov	BYTE PTR y[rip], 0
	mov	BYTE PTR sp[rip], -3
	movzx	eax, BYTE PTR status[rip]
	or	eax, 32
	mov	BYTE PTR status[rip], al
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	reset6502, .-reset6502
	.section	.data.rel.local,"aw"
	.align 32
	.type	addrtable, @object
	.size	addrtable, 2048
addrtable:
	.quad	imp
	.quad	indx
	.quad	imp
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	acc
	.quad	imm
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	abso
	.quad	indx
	.quad	imp
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	acc
	.quad	imm
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	imp
	.quad	indx
	.quad	imp
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	acc
	.quad	imm
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	imp
	.quad	indx
	.quad	imp
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	acc
	.quad	imm
	.quad	ind
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	imm
	.quad	indx
	.quad	imm
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	imp
	.quad	imm
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpy
	.quad	zpy
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absy
	.quad	absy
	.quad	imm
	.quad	indx
	.quad	imm
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	imp
	.quad	imm
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpy
	.quad	zpy
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absy
	.quad	absy
	.quad	imm
	.quad	indx
	.quad	imm
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	imp
	.quad	imm
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	imm
	.quad	indx
	.quad	imm
	.quad	indx
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	zp
	.quad	imp
	.quad	imm
	.quad	imp
	.quad	imm
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	abso
	.quad	rel
	.quad	indy
	.quad	imp
	.quad	indy
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	zpx
	.quad	imp
	.quad	absy
	.quad	imp
	.quad	absy
	.quad	absx
	.quad	absx
	.quad	absx
	.quad	absx
	.align 32
	.type	optable, @object
	.size	optable, 2048
optable:
	.quad	brk6502
	.quad	ora
	.quad	nop
	.quad	slo
	.quad	nop
	.quad	ora
	.quad	asl
	.quad	slo
	.quad	php
	.quad	ora
	.quad	asl
	.quad	nop
	.quad	nop
	.quad	ora
	.quad	asl
	.quad	slo
	.quad	bpl
	.quad	ora
	.quad	nop
	.quad	slo
	.quad	nop
	.quad	ora
	.quad	asl
	.quad	slo
	.quad	clc
	.quad	ora
	.quad	nop
	.quad	slo
	.quad	nop
	.quad	ora
	.quad	asl
	.quad	slo
	.quad	jsr
	.quad	and
	.quad	nop
	.quad	rla
	.quad	bit
	.quad	and
	.quad	rol
	.quad	rla
	.quad	plp
	.quad	and
	.quad	rol
	.quad	nop
	.quad	bit
	.quad	and
	.quad	rol
	.quad	rla
	.quad	bmi
	.quad	and
	.quad	nop
	.quad	rla
	.quad	nop
	.quad	and
	.quad	rol
	.quad	rla
	.quad	sec
	.quad	and
	.quad	nop
	.quad	rla
	.quad	nop
	.quad	and
	.quad	rol
	.quad	rla
	.quad	rti
	.quad	eor
	.quad	nop
	.quad	sre
	.quad	nop
	.quad	eor
	.quad	lsr
	.quad	sre
	.quad	pha
	.quad	eor
	.quad	lsr
	.quad	nop
	.quad	jmp
	.quad	eor
	.quad	lsr
	.quad	sre
	.quad	bvc
	.quad	eor
	.quad	nop
	.quad	sre
	.quad	nop
	.quad	eor
	.quad	lsr
	.quad	sre
	.quad	cli
	.quad	eor
	.quad	nop
	.quad	sre
	.quad	nop
	.quad	eor
	.quad	lsr
	.quad	sre
	.quad	rts
	.quad	adc
	.quad	nop
	.quad	rra
	.quad	nop
	.quad	adc
	.quad	ror
	.quad	rra
	.quad	pla
	.quad	adc
	.quad	ror
	.quad	nop
	.quad	jmp
	.quad	adc
	.quad	ror
	.quad	rra
	.quad	bvs
	.quad	adc
	.quad	nop
	.quad	rra
	.quad	nop
	.quad	adc
	.quad	ror
	.quad	rra
	.quad	sei
	.quad	adc
	.quad	nop
	.quad	rra
	.quad	nop
	.quad	adc
	.quad	ror
	.quad	rra
	.quad	nop
	.quad	sta
	.quad	nop
	.quad	sax
	.quad	sty
	.quad	sta
	.quad	stx
	.quad	sax
	.quad	dey
	.quad	nop
	.quad	txa
	.quad	nop
	.quad	sty
	.quad	sta
	.quad	stx
	.quad	sax
	.quad	bcc
	.quad	sta
	.quad	nop
	.quad	nop
	.quad	sty
	.quad	sta
	.quad	stx
	.quad	sax
	.quad	tya
	.quad	sta
	.quad	txs
	.quad	nop
	.quad	nop
	.quad	sta
	.quad	nop
	.quad	nop
	.quad	ldy
	.quad	lda
	.quad	ldx
	.quad	lax
	.quad	ldy
	.quad	lda
	.quad	ldx
	.quad	lax
	.quad	tay
	.quad	lda
	.quad	tax
	.quad	nop
	.quad	ldy
	.quad	lda
	.quad	ldx
	.quad	lax
	.quad	bcs
	.quad	lda
	.quad	nop
	.quad	lax
	.quad	ldy
	.quad	lda
	.quad	ldx
	.quad	lax
	.quad	clv
	.quad	lda
	.quad	tsx
	.quad	lax
	.quad	ldy
	.quad	lda
	.quad	ldx
	.quad	lax
	.quad	cpy
	.quad	cmp
	.quad	nop
	.quad	dcp
	.quad	cpy
	.quad	cmp
	.quad	dec
	.quad	dcp
	.quad	iny
	.quad	cmp
	.quad	dex
	.quad	nop
	.quad	cpy
	.quad	cmp
	.quad	dec
	.quad	dcp
	.quad	bne
	.quad	cmp
	.quad	nop
	.quad	dcp
	.quad	nop
	.quad	cmp
	.quad	dec
	.quad	dcp
	.quad	cld
	.quad	cmp
	.quad	nop
	.quad	dcp
	.quad	nop
	.quad	cmp
	.quad	dec
	.quad	dcp
	.quad	cpx
	.quad	sbc
	.quad	nop
	.quad	isb
	.quad	cpx
	.quad	sbc
	.quad	inc
	.quad	isb
	.quad	inx
	.quad	sbc
	.quad	nop
	.quad	sbc
	.quad	cpx
	.quad	sbc
	.quad	inc
	.quad	isb
	.quad	beq
	.quad	sbc
	.quad	nop
	.quad	isb
	.quad	nop
	.quad	sbc
	.quad	inc
	.quad	isb
	.quad	sed
	.quad	sbc
	.quad	nop
	.quad	isb
	.quad	nop
	.quad	sbc
	.quad	inc
	.quad	isb
	.globl	penaltyop
	.bss
	.type	penaltyop, @object
	.size	penaltyop, 1
penaltyop:
	.zero	1
	.globl	penaltyaddr
	.type	penaltyaddr, @object
	.size	penaltyaddr, 1
penaltyaddr:
	.zero	1
	.text
	.type	imp, @function
imp:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	imp, .-imp
	.type	acc, @function
acc:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	acc, .-acc
	.type	imm, @function
imm:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	mov	WORD PTR ea[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	imm, .-imm
	.type	zp, @function
zp:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	mov	WORD PTR ea[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	zp, .-zp
	.type	zpx, @function
zpx:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	edx, BYTE PTR x[rip]
	add	eax, edx
	movzx	eax, al
	mov	WORD PTR ea[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	zpx, .-zpx
	.type	zpy, @function
zpy:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	edx, BYTE PTR y[rip]
	add	eax, edx
	movzx	eax, al
	mov	WORD PTR ea[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	zpy, .-zpy
	.type	rel, @function
rel:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	mov	WORD PTR reladdr[rip], ax
	movzx	eax, WORD PTR reladdr[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L16
	movzx	eax, WORD PTR reladdr[rip]
	or	ax, -256
	mov	WORD PTR reladdr[rip], ax
.L16:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	rel, .-rel
	.type	abso, @function
abso:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR pc[rip]
	add	eax, 1
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR pc[rip]
	add	eax, 2
	mov	WORD PTR pc[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	abso, .-abso
	.type	absx, @function
absx:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR pc[rip]
	add	eax, 1
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR ea[rip]
	mov	al, 0
	mov	WORD PTR -18[rbp], ax
	movzx	eax, BYTE PTR x[rip]
	movzx	edx, al
	movzx	eax, WORD PTR ea[rip]
	add	eax, edx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR -18[rbp]
	movzx	edx, WORD PTR ea[rip]
	movzx	edx, dx
	and	edx, 65280
	cmp	eax, edx
	je	.L19
	mov	BYTE PTR penaltyaddr[rip], 1
.L19:
	movzx	eax, WORD PTR pc[rip]
	add	eax, 2
	mov	WORD PTR pc[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	absx, .-absx
	.type	absy, @function
absy:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR pc[rip]
	add	eax, 1
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR ea[rip]
	mov	al, 0
	mov	WORD PTR -18[rbp], ax
	movzx	eax, BYTE PTR y[rip]
	movzx	edx, al
	movzx	eax, WORD PTR ea[rip]
	add	eax, edx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR -18[rbp]
	movzx	edx, WORD PTR ea[rip]
	movzx	edx, dx
	and	edx, 65280
	cmp	eax, edx
	je	.L21
	mov	BYTE PTR penaltyaddr[rip], 1
.L21:
	movzx	eax, WORD PTR pc[rip]
	add	eax, 2
	mov	WORD PTR pc[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	absy, .-absy
	.type	ind, @function
ind:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR pc[rip]
	add	eax, 1
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR -20[rbp], ax
	movzx	eax, WORD PTR -20[rbp]
	mov	al, 0
	mov	edx, eax
	movzx	eax, WORD PTR -20[rbp]
	add	eax, 1
	movzx	eax, al
	or	eax, edx
	mov	WORD PTR -18[rbp], ax
	movzx	eax, WORD PTR -20[rbp]
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR -18[rbp]
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR pc[rip]
	add	eax, 2
	mov	WORD PTR pc[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	ind, .-ind
	.type	indx, @function
indx:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	edx, al
	movzx	eax, BYTE PTR x[rip]
	movzx	eax, al
	add	eax, edx
	and	ax, 255
	mov	WORD PTR -18[rbp], ax
	movzx	eax, WORD PTR -18[rbp]
	movzx	eax, al
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR -18[rbp]
	add	eax, 1
	movzx	eax, ax
	movzx	eax, al
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR ea[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	indx, .-indx
	.type	indy, @function
indy:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	mov	WORD PTR -22[rbp], ax
	movzx	eax, WORD PTR -22[rbp]
	mov	al, 0
	mov	edx, eax
	movzx	eax, WORD PTR -22[rbp]
	add	eax, 1
	movzx	eax, al
	or	eax, edx
	mov	WORD PTR -20[rbp], ax
	movzx	eax, WORD PTR -22[rbp]
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR -20[rbp]
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR ea[rip]
	mov	al, 0
	mov	WORD PTR -18[rbp], ax
	movzx	eax, BYTE PTR y[rip]
	movzx	edx, al
	movzx	eax, WORD PTR ea[rip]
	add	eax, edx
	mov	WORD PTR ea[rip], ax
	movzx	eax, WORD PTR -18[rbp]
	movzx	edx, WORD PTR ea[rip]
	movzx	edx, dx
	and	edx, 65280
	cmp	eax, edx
	je	.L26
	mov	BYTE PTR penaltyaddr[rip], 1
.L26:
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	indy, .-indy
	.type	getvalue, @function
getvalue:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, addrtable[rip]
	mov	rax, QWORD PTR [rdx+rax]
	lea	rdx, acc[rip]
	cmp	rax, rdx
	jne	.L28
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	jmp	.L29
.L28:
	movzx	eax, WORD PTR ea[rip]
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
.L29:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	getvalue, .-getvalue
	.type	getvalue16, @function
getvalue16:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	movzx	eax, WORD PTR ea[rip]
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	ebx, al
	movzx	eax, WORD PTR ea[rip]
	add	eax, 1
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	getvalue16, .-getvalue16
	.type	putvalue, @function
putvalue:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, addrtable[rip]
	mov	rax, QWORD PTR [rdx+rax]
	lea	rdx, acc[rip]
	cmp	rax, rdx
	jne	.L33
	movzx	eax, WORD PTR -4[rbp]
	mov	BYTE PTR a[rip], al
	jmp	.L35
.L33:
	movzx	eax, WORD PTR -4[rbp]
	movzx	edx, al
	movzx	eax, WORD PTR ea[rip]
	movzx	eax, ax
	mov	esi, edx
	mov	edi, eax
	call	write6502@PLT
.L35:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	putvalue, .-putvalue
	.type	adc, @function
adc:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR a[rip]
	movzx	edx, al
	movzx	eax, WORD PTR value[rip]
	add	edx, eax
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 1
	add	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L37
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L38
.L37:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L38:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L39
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L40
.L39:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L40:
	movzx	eax, WORD PTR result[rip]
	movzx	edx, ax
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	mov	ecx, edx
	xor	ecx, eax
	movzx	edx, WORD PTR result[rip]
	movzx	eax, WORD PTR value[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, ecx
	and	eax, 128
	test	eax, eax
	je	.L41
	movzx	eax, BYTE PTR status[rip]
	or	eax, 64
	mov	BYTE PTR status[rip], al
	jmp	.L42
.L41:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -65
	mov	BYTE PTR status[rip], al
.L42:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L43
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L44
.L43:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L44:
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 8
	test	eax, eax
	je	.L45
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	and	eax, 15
	cmp	eax, 9
	jle	.L46
	movzx	eax, BYTE PTR a[rip]
	add	eax, 6
	mov	BYTE PTR a[rip], al
.L46:
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	and	eax, 240
	cmp	eax, 144
	jle	.L47
	movzx	eax, BYTE PTR a[rip]
	add	eax, 96
	mov	BYTE PTR a[rip], al
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
.L47:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L45:
	movzx	eax, WORD PTR result[rip]
	mov	BYTE PTR a[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	adc, .-adc
	.type	and, @function
and:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR a[rip]
	movzx	edx, al
	movzx	eax, WORD PTR value[rip]
	and	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L49
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L50
.L49:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L50:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L51
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L52
.L51:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L52:
	movzx	eax, WORD PTR result[rip]
	mov	BYTE PTR a[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	and, .-and
	.type	asl, @function
asl:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	add	eax, eax
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L54
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L55
.L54:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L55:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L56
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L57
.L56:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L57:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L58
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L59
.L58:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L59:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	asl, .-asl
	.type	bcc, @function
bcc:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 1
	test	eax, eax
	jne	.L63
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L62
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L63
.L62:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L63:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	bcc, .-bcc
	.type	bcs, @function
bcs:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 1
	test	eax, eax
	je	.L67
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L66
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L67
.L66:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L67:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	bcs, .-bcs
	.type	beq, @function
beq:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 2
	test	eax, eax
	je	.L71
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L70
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L71
.L70:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L71:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	beq, .-beq
	.type	bit, @function
bit:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR a[rip]
	movzx	edx, al
	movzx	eax, WORD PTR value[rip]
	and	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L73
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L74
.L73:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L74:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 63
	mov	edx, eax
	movzx	eax, WORD PTR value[rip]
	and	eax, -64
	or	eax, edx
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	bit, .-bit
	.type	bmi, @function
bmi:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	test	al, al
	jns	.L78
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L77
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L78
.L77:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L78:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	bmi, .-bmi
	.type	bne, @function
bne:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 2
	test	eax, eax
	jne	.L82
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L81
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L82
.L81:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L82:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	bne, .-bne
	.type	bpl, @function
bpl:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	test	al, al
	js	.L86
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L85
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L86
.L85:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L86:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	bpl, .-bpl
	.type	brk6502, @function
brk6502:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	add	eax, 1
	mov	WORD PTR pc[rip], ax
	movzx	eax, WORD PTR pc[rip]
	movzx	eax, ax
	mov	edi, eax
	call	push16
	movzx	eax, BYTE PTR status[rip]
	or	eax, 16
	movzx	eax, al
	mov	edi, eax
	call	push8
	movzx	eax, BYTE PTR status[rip]
	or	eax, 4
	mov	BYTE PTR status[rip], al
	mov	edi, 65534
	call	read6502@PLT
	movzx	ebx, al
	mov	edi, 65535
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR pc[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	brk6502, .-brk6502
	.type	bvc, @function
bvc:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 64
	test	eax, eax
	jne	.L91
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L90
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L91
.L90:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L91:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	bvc, .-bvc
	.type	bvs, @function
bvs:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 64
	test	eax, eax
	je	.L95
	movzx	eax, WORD PTR pc[rip]
	mov	WORD PTR oldpc[rip], ax
	movzx	edx, WORD PTR pc[rip]
	movzx	eax, WORD PTR reladdr[rip]
	add	eax, edx
	mov	WORD PTR pc[rip], ax
	movzx	edx, WORD PTR oldpc[rip]
	movzx	eax, WORD PTR pc[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L94
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 2
	mov	DWORD PTR clockticks6502[rip], eax
	jmp	.L95
.L94:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L95:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	bvs, .-bvs
	.type	clc, @function
clc:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	clc, .-clc
	.type	cld, @function
cld:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	and	eax, -9
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	cld, .-cld
	.type	cli, @function
cli:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	and	eax, -5
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	cli, .-cli
	.type	clv, @function
clv:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	and	eax, -65
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	clv, .-clv
	.type	cmp, @function
cmp:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	movzx	edx, WORD PTR value[rip]
	sub	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR value[rip]
	mov	edx, eax
	movzx	eax, BYTE PTR a[rip]
	cmp	dl, al
	ja	.L101
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L102
.L101:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L102:
	movzx	eax, WORD PTR value[rip]
	mov	edx, eax
	movzx	eax, BYTE PTR a[rip]
	cmp	dl, al
	jne	.L103
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
	jmp	.L104
.L103:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
.L104:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L105
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L107
.L105:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L107:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	cmp, .-cmp
	.type	cpx, @function
cpx:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR x[rip]
	movzx	eax, al
	movzx	edx, WORD PTR value[rip]
	sub	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR value[rip]
	mov	edx, eax
	movzx	eax, BYTE PTR x[rip]
	cmp	dl, al
	ja	.L109
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L110
.L109:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L110:
	movzx	eax, WORD PTR value[rip]
	mov	edx, eax
	movzx	eax, BYTE PTR x[rip]
	cmp	dl, al
	jne	.L111
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
	jmp	.L112
.L111:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
.L112:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L113
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L115
.L113:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L115:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	cpx, .-cpx
	.type	cpy, @function
cpy:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR y[rip]
	movzx	eax, al
	movzx	edx, WORD PTR value[rip]
	sub	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR value[rip]
	mov	edx, eax
	movzx	eax, BYTE PTR y[rip]
	cmp	dl, al
	ja	.L117
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L118
.L117:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L118:
	movzx	eax, WORD PTR value[rip]
	mov	edx, eax
	movzx	eax, BYTE PTR y[rip]
	cmp	dl, al
	jne	.L119
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
	jmp	.L120
.L119:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
.L120:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L121
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L123
.L121:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L123:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	cpy, .-cpy
	.type	dec, @function
dec:
.LFB41:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	sub	eax, 1
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L125
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L126
.L125:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L126:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L127
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L128
.L127:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L128:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	dec, .-dec
	.type	dex, @function
dex:
.LFB42:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR x[rip]
	sub	eax, 1
	mov	BYTE PTR x[rip], al
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L131
.L130:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L131:
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	jns	.L132
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L134
.L132:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L134:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	dex, .-dex
	.type	dey, @function
dey:
.LFB43:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR y[rip]
	sub	eax, 1
	mov	BYTE PTR y[rip], al
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L137
.L136:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L137:
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	jns	.L138
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L140
.L138:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L140:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	dey, .-dey
	.type	eor, @function
eor:
.LFB44:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR a[rip]
	movzx	edx, al
	movzx	eax, WORD PTR value[rip]
	xor	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L142
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L143
.L142:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L143:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L144
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L145
.L144:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L145:
	movzx	eax, WORD PTR result[rip]
	mov	BYTE PTR a[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	eor, .-eor
	.type	inc, @function
inc:
.LFB45:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	add	eax, 1
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L147
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L148
.L147:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L148:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L149
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L150
.L149:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L150:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	inc, .-inc
	.type	inx, @function
inx:
.LFB46:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR x[rip]
	add	eax, 1
	mov	BYTE PTR x[rip], al
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L153
.L152:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L153:
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	jns	.L154
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L156
.L154:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L156:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE46:
	.size	inx, .-inx
	.type	iny, @function
iny:
.LFB47:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR y[rip]
	add	eax, 1
	mov	BYTE PTR y[rip], al
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L159
.L158:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L159:
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	jns	.L160
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L162
.L160:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L162:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE47:
	.size	iny, .-iny
	.type	jmp, @function
jmp:
.LFB48:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR ea[rip]
	mov	WORD PTR pc[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE48:
	.size	jmp, .-jmp
	.type	jsr, @function
jsr:
.LFB49:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR pc[rip]
	sub	eax, 1
	movzx	eax, ax
	mov	edi, eax
	call	push16
	movzx	eax, WORD PTR ea[rip]
	mov	WORD PTR pc[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE49:
	.size	jsr, .-jsr
	.type	lda, @function
lda:
.LFB50:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	mov	BYTE PTR a[rip], al
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L167
.L166:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L167:
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	jns	.L168
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L170
.L168:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L170:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE50:
	.size	lda, .-lda
	.type	ldx, @function
ldx:
.LFB51:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	mov	BYTE PTR x[rip], al
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L173
.L172:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L173:
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	jns	.L174
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L176
.L174:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L176:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE51:
	.size	ldx, .-ldx
	.type	ldy, @function
ldy:
.LFB52:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	mov	BYTE PTR y[rip], al
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L179
.L178:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L179:
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	jns	.L180
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L182
.L180:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L182:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE52:
	.size	ldy, .-ldy
	.type	lsr, @function
lsr:
.LFB53:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	shr	ax
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR value[rip]
	movzx	eax, ax
	and	eax, 1
	test	eax, eax
	je	.L184
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L185
.L184:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L185:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L186
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L187
.L186:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L187:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L188
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L189
.L188:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L189:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE53:
	.size	lsr, .-lsr
	.type	nop, @function
nop:
.LFB54:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cmp	eax, 252
	je	.L191
	cmp	eax, 252
	jg	.L193
	cmp	eax, 220
	je	.L191
	cmp	eax, 220
	jg	.L193
	cmp	eax, 124
	je	.L191
	cmp	eax, 124
	jg	.L193
	cmp	eax, 92
	je	.L191
	cmp	eax, 92
	jg	.L193
	cmp	eax, 28
	je	.L191
	cmp	eax, 60
	jne	.L193
.L191:
	mov	BYTE PTR penaltyop[rip], 1
	nop
.L193:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE54:
	.size	nop, .-nop
	.type	ora, @function
ora:
.LFB55:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR a[rip]
	movzx	edx, al
	movzx	eax, WORD PTR value[rip]
	or	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L195
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L196
.L195:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L196:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L197
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L198
.L197:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L198:
	movzx	eax, WORD PTR result[rip]
	mov	BYTE PTR a[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE55:
	.size	ora, .-ora
	.type	pha, @function
pha:
.LFB56:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	mov	edi, eax
	call	push8
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE56:
	.size	pha, .-pha
	.type	php, @function
php:
.LFB57:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	or	eax, 16
	movzx	eax, al
	mov	edi, eax
	call	push8
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE57:
	.size	php, .-php
	.type	pla, @function
pla:
.LFB58:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	pull8
	mov	BYTE PTR a[rip], al
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	je	.L202
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L203
.L202:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L203:
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	jns	.L204
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L206
.L204:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L206:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE58:
	.size	pla, .-pla
	.type	plp, @function
plp:
.LFB59:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	pull8
	or	eax, 32
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE59:
	.size	plp, .-plp
	.type	rol, @function
rol:
.LFB60:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	movzx	eax, ax
	add	eax, eax
	mov	edx, eax
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 1
	or	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L209
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L210
.L209:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L210:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L211
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L212
.L211:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L212:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L213
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L214
.L213:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L214:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE60:
	.size	rol, .-rol
	.type	ror, @function
ror:
.LFB61:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	getvalue
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	shr	ax
	mov	edx, eax
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	sal	eax, 7
	movzx	eax, al
	or	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR value[rip]
	movzx	eax, ax
	and	eax, 1
	test	eax, eax
	je	.L216
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L217
.L216:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L217:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L218
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L219
.L218:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L219:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L220
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L221
.L220:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L221:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE61:
	.size	ror, .-ror
	.type	rti, @function
rti:
.LFB62:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	pull8
	mov	BYTE PTR status[rip], al
	mov	eax, 0
	call	pull16
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	mov	WORD PTR pc[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE62:
	.size	rti, .-rti
	.type	rts, @function
rts:
.LFB63:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	pull16
	mov	WORD PTR value[rip], ax
	movzx	eax, WORD PTR value[rip]
	add	eax, 1
	mov	WORD PTR pc[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE63:
	.size	rts, .-rts
	.type	sbc, @function
sbc:
.LFB64:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	BYTE PTR penaltyop[rip], 1
	mov	eax, 0
	call	getvalue
	xor	al, -1
	mov	WORD PTR value[rip], ax
	movzx	eax, BYTE PTR a[rip]
	movzx	edx, al
	movzx	eax, WORD PTR value[rip]
	add	edx, eax
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 1
	add	eax, edx
	mov	WORD PTR result[rip], ax
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 65280
	test	eax, eax
	je	.L225
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	jmp	.L226
.L225:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
.L226:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	movzx	eax, al
	test	eax, eax
	je	.L227
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L228
.L227:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L228:
	movzx	eax, WORD PTR result[rip]
	movzx	edx, ax
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	mov	ecx, edx
	xor	ecx, eax
	movzx	edx, WORD PTR result[rip]
	movzx	eax, WORD PTR value[rip]
	xor	eax, edx
	movzx	eax, ax
	and	eax, ecx
	and	eax, 128
	test	eax, eax
	je	.L229
	movzx	eax, BYTE PTR status[rip]
	or	eax, 64
	mov	BYTE PTR status[rip], al
	jmp	.L230
.L229:
	movzx	eax, BYTE PTR status[rip]
	and	eax, -65
	mov	BYTE PTR status[rip], al
.L230:
	movzx	eax, WORD PTR result[rip]
	movzx	eax, ax
	and	eax, 128
	test	eax, eax
	je	.L231
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L232
.L231:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L232:
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	and	eax, 8
	test	eax, eax
	je	.L233
	movzx	eax, BYTE PTR status[rip]
	and	eax, -2
	mov	BYTE PTR status[rip], al
	movzx	eax, BYTE PTR a[rip]
	sub	eax, 102
	mov	BYTE PTR a[rip], al
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	and	eax, 15
	cmp	eax, 9
	jle	.L234
	movzx	eax, BYTE PTR a[rip]
	add	eax, 6
	mov	BYTE PTR a[rip], al
.L234:
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	and	eax, 240
	cmp	eax, 144
	jle	.L235
	movzx	eax, BYTE PTR a[rip]
	add	eax, 96
	mov	BYTE PTR a[rip], al
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
.L235:
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L233:
	movzx	eax, WORD PTR result[rip]
	mov	BYTE PTR a[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE64:
	.size	sbc, .-sbc
	.type	sec, @function
sec:
.LFB65:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	or	eax, 1
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE65:
	.size	sec, .-sec
	.type	sed, @function
sed:
.LFB66:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	or	eax, 8
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE66:
	.size	sed, .-sed
	.type	sei, @function
sei:
.LFB67:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR status[rip]
	or	eax, 4
	mov	BYTE PTR status[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE67:
	.size	sei, .-sei
	.type	sta, @function
sta:
.LFB68:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR a[rip]
	movzx	eax, al
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE68:
	.size	sta, .-sta
	.type	stx, @function
stx:
.LFB69:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR x[rip]
	movzx	eax, al
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE69:
	.size	stx, .-stx
	.type	sty, @function
sty:
.LFB70:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR y[rip]
	movzx	eax, al
	mov	edi, eax
	call	putvalue
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE70:
	.size	sty, .-sty
	.type	tax, @function
tax:
.LFB71:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR a[rip]
	mov	BYTE PTR x[rip], al
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L244
.L243:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L244:
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	jns	.L245
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L247
.L245:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L247:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE71:
	.size	tax, .-tax
	.type	tay, @function
tay:
.LFB72:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR a[rip]
	mov	BYTE PTR y[rip], al
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L250
.L249:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L250:
	movzx	eax, BYTE PTR y[rip]
	test	al, al
	jns	.L251
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L253
.L251:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L253:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE72:
	.size	tay, .-tay
	.type	tsx, @function
tsx:
.LFB73:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR sp[rip]
	mov	BYTE PTR x[rip], al
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L256
.L255:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L256:
	movzx	eax, BYTE PTR x[rip]
	test	al, al
	jns	.L257
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L259
.L257:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L259:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE73:
	.size	tsx, .-tsx
	.type	txa, @function
txa:
.LFB74:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR x[rip]
	mov	BYTE PTR a[rip], al
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L262
.L261:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L262:
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	jns	.L263
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L265
.L263:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L265:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE74:
	.size	txa, .-txa
	.type	txs, @function
txs:
.LFB75:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR x[rip]
	mov	BYTE PTR sp[rip], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE75:
	.size	txs, .-txs
	.type	tya, @function
tya:
.LFB76:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, BYTE PTR y[rip]
	mov	BYTE PTR a[rip], al
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	je	.L268
	movzx	eax, BYTE PTR status[rip]
	and	eax, -3
	mov	BYTE PTR status[rip], al
	jmp	.L269
.L268:
	movzx	eax, BYTE PTR status[rip]
	or	eax, 2
	mov	BYTE PTR status[rip], al
.L269:
	movzx	eax, BYTE PTR a[rip]
	test	al, al
	jns	.L270
	movzx	eax, BYTE PTR status[rip]
	or	eax, -128
	mov	BYTE PTR status[rip], al
	jmp	.L272
.L270:
	movzx	eax, BYTE PTR status[rip]
	and	eax, 127
	mov	BYTE PTR status[rip], al
.L272:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE76:
	.size	tya, .-tya
	.type	lax, @function
lax:
.LFB77:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	lda
	mov	eax, 0
	call	ldx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE77:
	.size	lax, .-lax
	.type	sax, @function
sax:
.LFB78:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sta
	mov	eax, 0
	call	stx
	movzx	edx, BYTE PTR a[rip]
	movzx	eax, BYTE PTR x[rip]
	and	eax, edx
	movzx	eax, al
	mov	edi, eax
	call	putvalue
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L276
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L276
	mov	eax, DWORD PTR clockticks6502[rip]
	sub	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L276:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE78:
	.size	sax, .-sax
	.type	dcp, @function
dcp:
.LFB79:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	dec
	mov	eax, 0
	call	cmp
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L279
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L279
	mov	eax, DWORD PTR clockticks6502[rip]
	sub	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L279:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE79:
	.size	dcp, .-dcp
	.type	isb, @function
isb:
.LFB80:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	inc
	mov	eax, 0
	call	sbc
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L282
	mov	eax, DWORD PTR clockticks6502[rip]
	sub	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L282:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE80:
	.size	isb, .-isb
	.type	slo, @function
slo:
.LFB81:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	asl
	mov	eax, 0
	call	ora
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L285
	mov	eax, DWORD PTR clockticks6502[rip]
	sub	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L285:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE81:
	.size	slo, .-slo
	.type	rla, @function
rla:
.LFB82:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	rol
	mov	eax, 0
	call	and
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L288
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L288
	mov	eax, DWORD PTR clockticks6502[rip]
	sub	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L288:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE82:
	.size	rla, .-rla
	.type	sre, @function
sre:
.LFB83:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	lsr
	mov	eax, 0
	call	eor
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L291
	mov	eax, DWORD PTR clockticks6502[rip]
	sub	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L291:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE83:
	.size	sre, .-sre
	.type	rra, @function
rra:
.LFB84:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	ror
	mov	eax, 0
	call	adc
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L294
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L294
	mov	eax, DWORD PTR clockticks6502[rip]
	sub	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L294:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE84:
	.size	rra, .-rra
	.section	.rodata
	.align 32
	.type	ticktable, @object
	.size	ticktable, 1024
ticktable:
	.long	7
	.long	6
	.long	2
	.long	8
	.long	3
	.long	3
	.long	5
	.long	5
	.long	3
	.long	2
	.long	2
	.long	2
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	5
	.long	2
	.long	8
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	4
	.long	2
	.long	7
	.long	4
	.long	4
	.long	7
	.long	7
	.long	6
	.long	6
	.long	2
	.long	8
	.long	3
	.long	3
	.long	5
	.long	5
	.long	4
	.long	2
	.long	2
	.long	2
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	5
	.long	2
	.long	8
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	4
	.long	2
	.long	7
	.long	4
	.long	4
	.long	7
	.long	7
	.long	6
	.long	6
	.long	2
	.long	8
	.long	3
	.long	3
	.long	5
	.long	5
	.long	3
	.long	2
	.long	2
	.long	2
	.long	3
	.long	4
	.long	6
	.long	6
	.long	2
	.long	5
	.long	2
	.long	8
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	4
	.long	2
	.long	7
	.long	4
	.long	4
	.long	7
	.long	7
	.long	6
	.long	6
	.long	2
	.long	8
	.long	3
	.long	3
	.long	5
	.long	5
	.long	4
	.long	2
	.long	2
	.long	2
	.long	5
	.long	4
	.long	6
	.long	6
	.long	2
	.long	5
	.long	2
	.long	8
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	4
	.long	2
	.long	7
	.long	4
	.long	4
	.long	7
	.long	7
	.long	2
	.long	6
	.long	2
	.long	6
	.long	3
	.long	3
	.long	3
	.long	3
	.long	2
	.long	2
	.long	2
	.long	2
	.long	4
	.long	4
	.long	4
	.long	4
	.long	2
	.long	6
	.long	2
	.long	6
	.long	4
	.long	4
	.long	4
	.long	4
	.long	2
	.long	5
	.long	2
	.long	5
	.long	5
	.long	5
	.long	5
	.long	5
	.long	2
	.long	6
	.long	2
	.long	6
	.long	3
	.long	3
	.long	3
	.long	3
	.long	2
	.long	2
	.long	2
	.long	2
	.long	4
	.long	4
	.long	4
	.long	4
	.long	2
	.long	5
	.long	2
	.long	5
	.long	4
	.long	4
	.long	4
	.long	4
	.long	2
	.long	4
	.long	2
	.long	4
	.long	4
	.long	4
	.long	4
	.long	4
	.long	2
	.long	6
	.long	2
	.long	8
	.long	3
	.long	3
	.long	5
	.long	5
	.long	2
	.long	2
	.long	2
	.long	2
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	5
	.long	2
	.long	8
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	4
	.long	2
	.long	7
	.long	4
	.long	4
	.long	7
	.long	7
	.long	2
	.long	6
	.long	2
	.long	8
	.long	3
	.long	3
	.long	5
	.long	5
	.long	2
	.long	2
	.long	2
	.long	2
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	5
	.long	2
	.long	8
	.long	4
	.long	4
	.long	6
	.long	6
	.long	2
	.long	4
	.long	2
	.long	7
	.long	4
	.long	4
	.long	7
	.long	7
	.text
	.globl	nmi6502
	.type	nmi6502, @function
nmi6502:
.LFB85:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	movzx	eax, ax
	mov	edi, eax
	call	push16
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	mov	edi, eax
	call	push8
	movzx	eax, BYTE PTR status[rip]
	or	eax, 4
	mov	BYTE PTR status[rip], al
	mov	edi, 65530
	call	read6502@PLT
	movzx	ebx, al
	mov	edi, 65531
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR pc[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE85:
	.size	nmi6502, .-nmi6502
	.globl	irq6502
	.type	irq6502, @function
irq6502:
.LFB86:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	movzx	eax, WORD PTR pc[rip]
	movzx	eax, ax
	mov	edi, eax
	call	push16
	movzx	eax, BYTE PTR status[rip]
	movzx	eax, al
	mov	edi, eax
	call	push8
	movzx	eax, BYTE PTR status[rip]
	or	eax, 4
	mov	BYTE PTR status[rip], al
	mov	edi, 65534
	call	read6502@PLT
	movzx	ebx, al
	mov	edi, 65535
	call	read6502@PLT
	movzx	eax, al
	sal	eax, 8
	or	eax, ebx
	mov	WORD PTR pc[rip], ax
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE86:
	.size	irq6502, .-irq6502
	.globl	callexternal
	.bss
	.type	callexternal, @object
	.size	callexternal, 1
callexternal:
	.zero	1
	.globl	loopexternal
	.align 8
	.type	loopexternal, @object
	.size	loopexternal, 8
loopexternal:
	.zero	8
	.text
	.globl	exec6502
	.type	exec6502, @function
exec6502:
.LFB87:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	edx, DWORD PTR clockgoal6502[rip]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	mov	DWORD PTR clockgoal6502[rip], eax
	jmp	.L298
.L300:
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	mov	BYTE PTR opcode[rip], al
	movzx	eax, BYTE PTR status[rip]
	or	eax, 32
	mov	BYTE PTR status[rip], al
	mov	BYTE PTR penaltyop[rip], 0
	mov	BYTE PTR penaltyaddr[rip], 0
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, addrtable[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	rdx
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, optable[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	rdx
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ticktable[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, edx
	mov	DWORD PTR clockticks6502[rip], eax
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L299
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L299:
	mov	eax, DWORD PTR instructions[rip]
	add	eax, 1
	mov	DWORD PTR instructions[rip], eax
	movzx	eax, BYTE PTR callexternal[rip]
	test	al, al
	je	.L298
	mov	rdx, QWORD PTR loopexternal[rip]
	mov	eax, 0
	call	rdx
.L298:
	mov	edx, DWORD PTR clockticks6502[rip]
	mov	eax, DWORD PTR clockgoal6502[rip]
	cmp	edx, eax
	jb	.L300
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE87:
	.size	exec6502, .-exec6502
	.globl	step6502
	.type	step6502, @function
step6502:
.LFB88:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movzx	eax, WORD PTR pc[rip]
	lea	edx, 1[rax]
	mov	WORD PTR pc[rip], dx
	movzx	eax, ax
	mov	edi, eax
	call	read6502@PLT
	mov	BYTE PTR opcode[rip], al
	movzx	eax, BYTE PTR status[rip]
	or	eax, 32
	mov	BYTE PTR status[rip], al
	mov	BYTE PTR penaltyop[rip], 0
	mov	BYTE PTR penaltyaddr[rip], 0
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, addrtable[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	rdx
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, optable[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	rdx
	movzx	eax, BYTE PTR opcode[rip]
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ticktable[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, edx
	mov	DWORD PTR clockticks6502[rip], eax
	movzx	eax, BYTE PTR penaltyop[rip]
	test	al, al
	je	.L302
	movzx	eax, BYTE PTR penaltyaddr[rip]
	test	al, al
	je	.L302
	mov	eax, DWORD PTR clockticks6502[rip]
	add	eax, 1
	mov	DWORD PTR clockticks6502[rip], eax
.L302:
	mov	eax, DWORD PTR clockticks6502[rip]
	mov	DWORD PTR clockgoal6502[rip], eax
	mov	eax, DWORD PTR instructions[rip]
	add	eax, 1
	mov	DWORD PTR instructions[rip], eax
	movzx	eax, BYTE PTR callexternal[rip]
	test	al, al
	je	.L304
	mov	rdx, QWORD PTR loopexternal[rip]
	mov	eax, 0
	call	rdx
.L304:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE88:
	.size	step6502, .-step6502
	.globl	hookexternal
	.type	hookexternal, @function
hookexternal:
.LFB89:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	cmp	QWORD PTR -8[rbp], 0
	je	.L306
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR loopexternal[rip], rax
	mov	BYTE PTR callexternal[rip], 1
	jmp	.L308
.L306:
	mov	BYTE PTR callexternal[rip], 0
.L308:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE89:
	.size	hookexternal, .-hookexternal
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"112891.c"
	.text
	.comm	pc,2,2
	.comm	sp,1,1
	.comm	a,1,1
	.comm	x,1,1
	.comm	y,1,1
	.comm	status,1,1
	.global	instructions
	.bss
	.align	2
	.type	instructions, %object
	.size	instructions, 4
instructions:
	.space	4
	.global	clockticks6502
	.align	2
	.type	clockticks6502, %object
	.size	clockticks6502, 4
clockticks6502:
	.space	4
	.global	clockgoal6502
	.align	2
	.type	clockgoal6502, %object
	.size	clockgoal6502, 4
clockgoal6502:
	.space	4
	.comm	oldpc,2,2
	.comm	ea,2,2
	.comm	reladdr,2,2
	.comm	value,2,2
	.comm	result,2,2
	.comm	opcode,1,1
	.comm	oldstatus,1,1
	.text
	.align	2
	.global	push16
	.syntax unified
	.arm
	.fpu softvfp
	.type	push16, %function
push16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldr	r3, .L2
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #256
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-6]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	write6502
	ldr	r3, .L2
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #256
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-6]	@ movhi
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	write6502
	ldr	r3, .L2
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L2
	strb	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L3:
	.align	2
.L2:
	.word	sp
	.size	push16, .-push16
	.align	2
	.global	push8
	.syntax unified
	.arm
	.fpu softvfp
	.type	push8, %function
push8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldr	r3, .L5
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r2, r3, #1
	and	r1, r2, #255
	ldr	r2, .L5
	strb	r1, [r2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #256
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	write6502
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L6:
	.align	2
.L5:
	.word	sp
	.size	push8, .-push8
	.align	2
	.global	pull16
	.syntax unified
	.arm
	.fpu softvfp
	.type	pull16, %function
pull16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r3, .L9
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #256
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r3, .L9
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #256
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-14]	@ movhi
	ldr	r3, .L9
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L9
	strb	r2, [r3]
	ldrh	r3, [fp, #-14]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L10:
	.align	2
.L9:
	.word	sp
	.size	pull16, .-pull16
	.align	2
	.global	pull8
	.syntax unified
	.arm
	.fpu softvfp
	.type	pull8, %function
pull8:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L13
	strb	r2, [r3]
	ldr	r3, .L13
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #256
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L14:
	.align	2
.L13:
	.word	sp
	.size	pull8, .-pull8
	.align	2
	.global	reset6502
	.syntax unified
	.arm
	.fpu softvfp
	.type	reset6502, %function
reset6502:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r0, .L16
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r0, .L16+4
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L16+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L16+12
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L16+16
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L16+20
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L16+24
	mvn	r2, #2
	strb	r2, [r3]
	ldr	r3, .L16+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #32
	and	r2, r3, #255
	ldr	r3, .L16+28
	strb	r2, [r3]
	nop
	pop	{r4, r5, fp, pc}
.L17:
	.align	2
.L16:
	.word	65532
	.word	65533
	.word	pc
	.word	a
	.word	x
	.word	y
	.word	sp
	.word	status
	.size	reset6502, .-reset6502
	.data
	.align	2
	.type	addrtable, %object
	.size	addrtable, 1024
addrtable:
	.word	imp
	.word	indx
	.word	imp
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	acc
	.word	imm
	.word	abso
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpx
	.word	zpx
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absx
	.word	absx
	.word	abso
	.word	indx
	.word	imp
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	acc
	.word	imm
	.word	abso
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpx
	.word	zpx
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absx
	.word	absx
	.word	imp
	.word	indx
	.word	imp
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	acc
	.word	imm
	.word	abso
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpx
	.word	zpx
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absx
	.word	absx
	.word	imp
	.word	indx
	.word	imp
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	acc
	.word	imm
	.word	ind
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpx
	.word	zpx
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absx
	.word	absx
	.word	imm
	.word	indx
	.word	imm
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	imp
	.word	imm
	.word	abso
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpy
	.word	zpy
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absy
	.word	absy
	.word	imm
	.word	indx
	.word	imm
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	imp
	.word	imm
	.word	abso
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpy
	.word	zpy
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absy
	.word	absy
	.word	imm
	.word	indx
	.word	imm
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	imp
	.word	imm
	.word	abso
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpx
	.word	zpx
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absx
	.word	absx
	.word	imm
	.word	indx
	.word	imm
	.word	indx
	.word	zp
	.word	zp
	.word	zp
	.word	zp
	.word	imp
	.word	imm
	.word	imp
	.word	imm
	.word	abso
	.word	abso
	.word	abso
	.word	abso
	.word	rel
	.word	indy
	.word	imp
	.word	indy
	.word	zpx
	.word	zpx
	.word	zpx
	.word	zpx
	.word	imp
	.word	absy
	.word	imp
	.word	absy
	.word	absx
	.word	absx
	.word	absx
	.word	absx
	.align	2
	.type	optable, %object
	.size	optable, 1024
optable:
	.word	brk6502
	.word	ora
	.word	nop
	.word	slo
	.word	nop
	.word	ora
	.word	asl
	.word	slo
	.word	php
	.word	ora
	.word	asl
	.word	nop
	.word	nop
	.word	ora
	.word	asl
	.word	slo
	.word	bpl
	.word	ora
	.word	nop
	.word	slo
	.word	nop
	.word	ora
	.word	asl
	.word	slo
	.word	clc
	.word	ora
	.word	nop
	.word	slo
	.word	nop
	.word	ora
	.word	asl
	.word	slo
	.word	jsr
	.word	and
	.word	nop
	.word	rla
	.word	bit
	.word	and
	.word	rol
	.word	rla
	.word	plp
	.word	and
	.word	rol
	.word	nop
	.word	bit
	.word	and
	.word	rol
	.word	rla
	.word	bmi
	.word	and
	.word	nop
	.word	rla
	.word	nop
	.word	and
	.word	rol
	.word	rla
	.word	sec
	.word	and
	.word	nop
	.word	rla
	.word	nop
	.word	and
	.word	rol
	.word	rla
	.word	rti
	.word	eor
	.word	nop
	.word	sre
	.word	nop
	.word	eor
	.word	lsr
	.word	sre
	.word	pha
	.word	eor
	.word	lsr
	.word	nop
	.word	jmp
	.word	eor
	.word	lsr
	.word	sre
	.word	bvc
	.word	eor
	.word	nop
	.word	sre
	.word	nop
	.word	eor
	.word	lsr
	.word	sre
	.word	cli
	.word	eor
	.word	nop
	.word	sre
	.word	nop
	.word	eor
	.word	lsr
	.word	sre
	.word	rts
	.word	adc
	.word	nop
	.word	rra
	.word	nop
	.word	adc
	.word	ror
	.word	rra
	.word	pla
	.word	adc
	.word	ror
	.word	nop
	.word	jmp
	.word	adc
	.word	ror
	.word	rra
	.word	bvs
	.word	adc
	.word	nop
	.word	rra
	.word	nop
	.word	adc
	.word	ror
	.word	rra
	.word	sei
	.word	adc
	.word	nop
	.word	rra
	.word	nop
	.word	adc
	.word	ror
	.word	rra
	.word	nop
	.word	sta
	.word	nop
	.word	sax
	.word	sty
	.word	sta
	.word	stx
	.word	sax
	.word	dey
	.word	nop
	.word	txa
	.word	nop
	.word	sty
	.word	sta
	.word	stx
	.word	sax
	.word	bcc
	.word	sta
	.word	nop
	.word	nop
	.word	sty
	.word	sta
	.word	stx
	.word	sax
	.word	tya
	.word	sta
	.word	txs
	.word	nop
	.word	nop
	.word	sta
	.word	nop
	.word	nop
	.word	ldy
	.word	lda
	.word	ldx
	.word	lax
	.word	ldy
	.word	lda
	.word	ldx
	.word	lax
	.word	tay
	.word	lda
	.word	tax
	.word	nop
	.word	ldy
	.word	lda
	.word	ldx
	.word	lax
	.word	bcs
	.word	lda
	.word	nop
	.word	lax
	.word	ldy
	.word	lda
	.word	ldx
	.word	lax
	.word	clv
	.word	lda
	.word	tsx
	.word	lax
	.word	ldy
	.word	lda
	.word	ldx
	.word	lax
	.word	cpy
	.word	cmp
	.word	nop
	.word	dcp
	.word	cpy
	.word	cmp
	.word	dec
	.word	dcp
	.word	iny
	.word	cmp
	.word	dex
	.word	nop
	.word	cpy
	.word	cmp
	.word	dec
	.word	dcp
	.word	bne
	.word	cmp
	.word	nop
	.word	dcp
	.word	nop
	.word	cmp
	.word	dec
	.word	dcp
	.word	cld
	.word	cmp
	.word	nop
	.word	dcp
	.word	nop
	.word	cmp
	.word	dec
	.word	dcp
	.word	cpx
	.word	sbc
	.word	nop
	.word	isb
	.word	cpx
	.word	sbc
	.word	inc
	.word	isb
	.word	inx
	.word	sbc
	.word	nop
	.word	sbc
	.word	cpx
	.word	sbc
	.word	inc
	.word	isb
	.word	beq
	.word	sbc
	.word	nop
	.word	isb
	.word	nop
	.word	sbc
	.word	inc
	.word	isb
	.word	sed
	.word	sbc
	.word	nop
	.word	isb
	.word	nop
	.word	sbc
	.word	inc
	.word	isb
	.comm	penaltyop,1,1
	.comm	penaltyaddr,1,1
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	imp, %function
imp:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	imp, .-imp
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	acc, %function
acc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	acc, .-acc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	imm, %function
imm:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L21
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L21
	strh	r2, [r1]	@ movhi
	ldr	r2, .L21+4
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L22:
	.align	2
.L21:
	.word	pc
	.word	ea
	.size	imm, .-imm
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	zp, %function
zp:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L24
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L24
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L24+4
	strh	r3, [r2]	@ movhi
	nop
	pop	{fp, pc}
.L25:
	.align	2
.L24:
	.word	pc
	.word	ea
	.size	zp, .-zp
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	zpx, %function
zpx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L27
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L27
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L27+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L27+8
	strh	r3, [r2]	@ movhi
	nop
	pop	{fp, pc}
.L28:
	.align	2
.L27:
	.word	pc
	.word	x
	.word	ea
	.size	zpx, .-zpx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	zpy, %function
zpy:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L30
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L30
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L30+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r2, r3
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L30+8
	strh	r3, [r2]	@ movhi
	nop
	pop	{fp, pc}
.L31:
	.align	2
.L30:
	.word	pc
	.word	y
	.word	ea
	.size	zpy, .-zpy
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rel, %function
rel:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L35
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L35
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L35+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L35+4
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L35+4
	ldrh	r3, [r3]
	mvn	r3, r3, lsl #24
	mvn	r3, r3, lsr #24
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L35+4
	strh	r3, [r2]	@ movhi
.L34:
	nop
	pop	{fp, pc}
.L36:
	.align	2
.L35:
	.word	pc
	.word	reladdr
	.size	rel, .-rel
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	abso, %function
abso:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L38
	ldrh	r3, [r3]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r3, .L38
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L38+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L38
	ldrh	r3, [r3]
	add	r3, r3, #2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L38
	strh	r3, [r2]	@ movhi
	nop
	pop	{r4, r5, fp, pc}
.L39:
	.align	2
.L38:
	.word	pc
	.word	ea
	.size	abso, .-abso
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	absx, %function
absx:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r3, .L42
	ldrh	r3, [r3]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r3, .L42
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L42+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L42+4
	ldrh	r3, [r3]
	bic	r3, r3, #255
	strh	r3, [fp, #-14]	@ movhi
	ldr	r3, .L42+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L42+4
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L42+4
	strh	r3, [r2]	@ movhi
	ldrh	r2, [fp, #-14]
	ldr	r3, .L42+4
	ldrh	r3, [r3]
	and	r3, r3, #65280
	cmp	r2, r3
	beq	.L41
	ldr	r3, .L42+12
	mov	r2, #1
	strb	r2, [r3]
.L41:
	ldr	r3, .L42
	ldrh	r3, [r3]
	add	r3, r3, #2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L42
	strh	r3, [r2]	@ movhi
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L43:
	.align	2
.L42:
	.word	pc
	.word	ea
	.word	x
	.word	penaltyaddr
	.size	absx, .-absx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	absy, %function
absy:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r3, .L46
	ldrh	r3, [r3]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r3, .L46
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L46+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L46+4
	ldrh	r3, [r3]
	bic	r3, r3, #255
	strh	r3, [fp, #-14]	@ movhi
	ldr	r3, .L46+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L46+4
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L46+4
	strh	r3, [r2]	@ movhi
	ldrh	r2, [fp, #-14]
	ldr	r3, .L46+4
	ldrh	r3, [r3]
	and	r3, r3, #65280
	cmp	r2, r3
	beq	.L45
	ldr	r3, .L46+12
	mov	r2, #1
	strb	r2, [r3]
.L45:
	ldr	r3, .L46
	ldrh	r3, [r3]
	add	r3, r3, #2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L46
	strh	r3, [r2]	@ movhi
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L47:
	.align	2
.L46:
	.word	pc
	.word	ea
	.word	y
	.word	penaltyaddr
	.size	absy, .-absy
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ind, %function
ind:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r3, .L49
	ldrh	r3, [r3]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r4, r3, #16
	ldr	r3, .L49
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	orr	r3, r4, r3
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r3, [fp, #-16]
	bic	r3, r3, #255
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldrh	r3, [fp, #-16]	@ movhi
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-16]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldrh	r3, [fp, #-14]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L49+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L49
	ldrh	r3, [r3]
	add	r3, r3, #2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L49
	strh	r3, [r2]	@ movhi
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L50:
	.align	2
.L49:
	.word	pc
	.word	ea
	.size	ind, .-ind
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	indx, %function
indx:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r3, .L52
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L52
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L52+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	strh	r3, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-14]	@ movhi
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldrh	r3, [fp, #-14]	@ movhi
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L52+8
	strh	r3, [r2]	@ movhi
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L53:
	.align	2
.L52:
	.word	pc
	.word	x
	.word	ea
	.size	indx, .-indx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	indy, %function
indy:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r3, .L57
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L57
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	r3, [fp, #-18]
	bic	r3, r3, #255
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldrh	r3, [fp, #-18]	@ movhi
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	strh	r3, [fp, #-16]	@ movhi
	ldrh	r3, [fp, #-18]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldrh	r3, [fp, #-16]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L57+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L57+4
	ldrh	r3, [r3]
	bic	r3, r3, #255
	strh	r3, [fp, #-14]	@ movhi
	ldr	r3, .L57+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L57+4
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L57+4
	strh	r3, [r2]	@ movhi
	ldrh	r2, [fp, #-14]
	ldr	r3, .L57+4
	ldrh	r3, [r3]
	and	r3, r3, #65280
	cmp	r2, r3
	beq	.L56
	ldr	r3, .L57+12
	mov	r2, #1
	strb	r2, [r3]
.L56:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L58:
	.align	2
.L57:
	.word	pc
	.word	ea
	.word	y
	.word	penaltyaddr
	.size	indy, .-indy
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	getvalue, %function
getvalue:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L62
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L62+4
	ldr	r3, [r3, r2, lsl #2]
	ldr	r2, .L62+8
	cmp	r3, r2
	bne	.L60
	ldr	r3, .L62+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	b	.L61
.L60:
	ldr	r3, .L62+16
	ldrh	r3, [r3]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
.L61:
	mov	r0, r3
	pop	{fp, pc}
.L63:
	.align	2
.L62:
	.word	opcode
	.word	addrtable
	.word	acc
	.word	a
	.word	ea
	.size	getvalue, .-getvalue
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	getvalue16, %function
getvalue16:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L66
	ldrh	r3, [r3]
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r3, .L66
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	pop	{r4, r5, fp, pc}
.L67:
	.align	2
.L66:
	.word	ea
	.size	getvalue16, .-getvalue16
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	putvalue, %function
putvalue:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldr	r3, .L72
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L72+4
	ldr	r3, [r3, r2, lsl #2]
	ldr	r2, .L72+8
	cmp	r3, r2
	bne	.L69
	ldrh	r3, [fp, #-6]	@ movhi
	and	r2, r3, #255
	ldr	r3, .L72+12
	strb	r2, [r3]
	b	.L71
.L69:
	ldr	r3, .L72+16
	ldrh	r2, [r3]
	ldrh	r3, [fp, #-6]	@ movhi
	and	r3, r3, #255
	mov	r1, r3
	mov	r0, r2
	bl	write6502
.L71:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L73:
	.align	2
.L72:
	.word	opcode
	.word	addrtable
	.word	acc
	.word	a
	.word	ea
	.size	putvalue, .-putvalue
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	adc, %function
adc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L86
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L86+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L86+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L86+4
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L86+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L86+16
	ldrh	r3, [r3]
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L75
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
	b	.L76
.L75:
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
.L76:
	ldr	r3, .L86+16
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L77
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
	b	.L78
.L77:
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
.L78:
	ldr	r3, .L86+16
	ldrh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L86+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	ldr	r2, .L86+16
	ldrh	r1, [r2]
	ldr	r2, .L86+4
	ldrh	r2, [r2]
	eor	r2, r2, r1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	and	r3, r3, r2
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L79
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #64
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
	b	.L80
.L79:
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #64
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
.L80:
	ldr	r3, .L86+16
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
	b	.L82
.L81:
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
.L82:
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #8
	cmp	r3, #0
	beq	.L83
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
	ldr	r3, .L86+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #15
	cmp	r3, #9
	ble	.L84
	ldr	r3, .L86+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #6
	and	r2, r3, #255
	ldr	r3, .L86+8
	strb	r2, [r3]
.L84:
	ldr	r3, .L86+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #240
	cmp	r3, #144
	ble	.L85
	ldr	r3, .L86+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #96
	and	r2, r3, #255
	ldr	r3, .L86+8
	strb	r2, [r3]
	ldr	r3, .L86+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L86+12
	strb	r2, [r3]
.L85:
	ldr	r3, .L86+20
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L86+20
	str	r3, [r2]
.L83:
	ldr	r3, .L86+16
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L86+8
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L87:
	.align	2
.L86:
	.word	penaltyop
	.word	value
	.word	a
	.word	status
	.word	result
	.word	clockticks6502
	.size	adc, .-adc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	and, %function
and:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L93
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L93+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L93+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L93+4
	ldrh	r3, [r3]
	and	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L93+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L93+12
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	ldr	r3, .L93+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L93+16
	strb	r2, [r3]
	b	.L90
.L89:
	ldr	r3, .L93+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L93+16
	strb	r2, [r3]
.L90:
	ldr	r3, .L93+12
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L91
	ldr	r3, .L93+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L93+16
	strb	r2, [r3]
	b	.L92
.L91:
	ldr	r3, .L93+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L93+16
	strb	r2, [r3]
.L92:
	ldr	r3, .L93+12
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L93+8
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L94:
	.align	2
.L93:
	.word	penaltyop
	.word	value
	.word	a
	.word	result
	.word	status
	.size	and, .-and
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	asl, %function
asl:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L102
	strh	r2, [r3]	@ movhi
	ldr	r3, .L102
	ldrh	r3, [r3]
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L102+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L102+4
	ldrh	r3, [r3]
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L102+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L102+8
	strb	r2, [r3]
	b	.L97
.L96:
	ldr	r3, .L102+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L102+8
	strb	r2, [r3]
.L97:
	ldr	r3, .L102+4
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L98
	ldr	r3, .L102+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L102+8
	strb	r2, [r3]
	b	.L99
.L98:
	ldr	r3, .L102+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L102+8
	strb	r2, [r3]
.L99:
	ldr	r3, .L102+4
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L102+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L102+8
	strb	r2, [r3]
	b	.L101
.L100:
	ldr	r3, .L102+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L102+8
	strb	r2, [r3]
.L101:
	ldr	r3, .L102+4
	ldrh	r3, [r3]
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L103:
	.align	2
.L102:
	.word	value
	.word	result
	.word	status
	.size	asl, .-asl
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bcc, %function
bcc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L108
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L108+4
	ldrh	r3, [r3]
	ldr	r2, .L108+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L108+4
	ldrh	r2, [r3]
	ldr	r3, .L108+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L108+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L108+8
	ldrh	r2, [r3]
	ldr	r3, .L108+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L108+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L108+16
	str	r3, [r2]
	b	.L107
.L106:
	ldr	r3, .L108+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L108+16
	str	r3, [r2]
.L107:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L109:
	.align	2
.L108:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	bcc, .-bcc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bcs, %function
bcs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L114
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L114+4
	ldrh	r3, [r3]
	ldr	r2, .L114+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L114+4
	ldrh	r2, [r3]
	ldr	r3, .L114+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L114+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L114+8
	ldrh	r2, [r3]
	ldr	r3, .L114+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L112
	ldr	r3, .L114+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L114+16
	str	r3, [r2]
	b	.L113
.L112:
	ldr	r3, .L114+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L114+16
	str	r3, [r2]
.L113:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L115:
	.align	2
.L114:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	bcs, .-bcs
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	beq, %function
beq:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L120
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #2
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L120+4
	ldrh	r3, [r3]
	ldr	r2, .L120+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L120+4
	ldrh	r2, [r3]
	ldr	r3, .L120+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L120+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L120+8
	ldrh	r2, [r3]
	ldr	r3, .L120+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L118
	ldr	r3, .L120+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L120+16
	str	r3, [r2]
	b	.L119
.L118:
	ldr	r3, .L120+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L120+16
	str	r3, [r2]
.L119:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L121:
	.align	2
.L120:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	beq, .-beq
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bit, %function
bit:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L125
	strh	r2, [r3]	@ movhi
	ldr	r3, .L125+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L125
	ldrh	r3, [r3]
	and	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L125+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L125+8
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L125+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L125+12
	strb	r2, [r3]
	b	.L124
.L123:
	ldr	r3, .L125+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L125+12
	strb	r2, [r3]
.L124:
	ldr	r3, .L125+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #63
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, .L125
	ldrh	r3, [r3]
	lsl	r3, r3, #24
	asr	r3, r3, #24
	bic	r3, r3, #63
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L125+12
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L126:
	.align	2
.L125:
	.word	value
	.word	a
	.word	result
	.word	status
	.size	bit, .-bit
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bmi, %function
bmi:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L131
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L130
	ldr	r3, .L131+4
	ldrh	r3, [r3]
	ldr	r2, .L131+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L131+4
	ldrh	r2, [r3]
	ldr	r3, .L131+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L131+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L131+8
	ldrh	r2, [r3]
	ldr	r3, .L131+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L131+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L131+16
	str	r3, [r2]
	b	.L130
.L129:
	ldr	r3, .L131+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L131+16
	str	r3, [r2]
.L130:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L132:
	.align	2
.L131:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	bmi, .-bmi
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bne, %function
bne:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L137
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #2
	cmp	r3, #0
	bne	.L136
	ldr	r3, .L137+4
	ldrh	r3, [r3]
	ldr	r2, .L137+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L137+4
	ldrh	r2, [r3]
	ldr	r3, .L137+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L137+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L137+8
	ldrh	r2, [r3]
	ldr	r3, .L137+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L137+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L137+16
	str	r3, [r2]
	b	.L136
.L135:
	ldr	r3, .L137+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L137+16
	str	r3, [r2]
.L136:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L138:
	.align	2
.L137:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	bne, .-bne
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bpl, %function
bpl:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L143
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	blt	.L142
	ldr	r3, .L143+4
	ldrh	r3, [r3]
	ldr	r2, .L143+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L143+4
	ldrh	r2, [r3]
	ldr	r3, .L143+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L143+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L143+8
	ldrh	r2, [r3]
	ldr	r3, .L143+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L141
	ldr	r3, .L143+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L143+16
	str	r3, [r2]
	b	.L142
.L141:
	ldr	r3, .L143+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L143+16
	str	r3, [r2]
.L142:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L144:
	.align	2
.L143:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	bpl, .-bpl
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	brk6502, %function
brk6502:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L146
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L146
	strh	r3, [r2]	@ movhi
	ldr	r3, .L146
	ldrh	r3, [r3]
	mov	r0, r3
	bl	push16
	ldr	r3, .L146+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #16
	and	r3, r3, #255
	mov	r0, r3
	bl	push8
	ldr	r3, .L146+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #4
	and	r2, r3, #255
	ldr	r3, .L146+4
	strb	r2, [r3]
	ldr	r0, .L146+8
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r0, .L146+12
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L146
	strh	r3, [r2]	@ movhi
	nop
	pop	{r4, r5, fp, pc}
.L147:
	.align	2
.L146:
	.word	pc
	.word	status
	.word	65534
	.word	65535
	.size	brk6502, .-brk6502
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bvc, %function
bvc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L152
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #64
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L152+4
	ldrh	r3, [r3]
	ldr	r2, .L152+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L152+4
	ldrh	r2, [r3]
	ldr	r3, .L152+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L152+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L152+8
	ldrh	r2, [r3]
	ldr	r3, .L152+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L152+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L152+16
	str	r3, [r2]
	b	.L151
.L150:
	ldr	r3, .L152+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L152+16
	str	r3, [r2]
.L151:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L153:
	.align	2
.L152:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	bvc, .-bvc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	bvs, %function
bvs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L158
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #64
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L158+4
	ldrh	r3, [r3]
	ldr	r2, .L158+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L158+4
	ldrh	r2, [r3]
	ldr	r3, .L158+12
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L158+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L158+8
	ldrh	r2, [r3]
	ldr	r3, .L158+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L158+16
	ldr	r3, [r3]
	add	r3, r3, #2
	ldr	r2, .L158+16
	str	r3, [r2]
	b	.L157
.L156:
	ldr	r3, .L158+16
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L158+16
	str	r3, [r2]
.L157:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L159:
	.align	2
.L158:
	.word	status
	.word	pc
	.word	oldpc
	.word	reladdr
	.word	clockticks6502
	.size	bvs, .-bvs
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	clc, %function
clc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L161
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L161
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L162:
	.align	2
.L161:
	.word	status
	.size	clc, .-clc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	cld, %function
cld:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L164
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #8
	and	r2, r3, #255
	ldr	r3, .L164
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L165:
	.align	2
.L164:
	.word	status
	.size	cld, .-cld
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	cli, %function
cli:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L167
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #4
	and	r2, r3, #255
	ldr	r3, .L167
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L168:
	.align	2
.L167:
	.word	status
	.size	cli, .-cli
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	clv, %function
clv:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L170
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #64
	and	r2, r3, #255
	ldr	r3, .L170
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L171:
	.align	2
.L170:
	.word	status
	.size	clv, .-clv
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	cmp, %function
cmp:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L180
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L180+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L180+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L180+4
	ldrh	r3, [r3]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L180+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L180+4
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L180+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	bhi	.L173
	ldr	r3, .L180+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L180+16
	strb	r2, [r3]
	b	.L174
.L173:
	ldr	r3, .L180+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L180+16
	strb	r2, [r3]
.L174:
	ldr	r3, .L180+4
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L180+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	bne	.L175
	ldr	r3, .L180+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L180+16
	strb	r2, [r3]
	b	.L176
.L175:
	ldr	r3, .L180+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L180+16
	strb	r2, [r3]
.L176:
	ldr	r3, .L180+12
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L180+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L180+16
	strb	r2, [r3]
	b	.L179
.L177:
	ldr	r3, .L180+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L180+16
	strb	r2, [r3]
.L179:
	nop
	pop	{fp, pc}
.L181:
	.align	2
.L180:
	.word	penaltyop
	.word	value
	.word	a
	.word	result
	.word	status
	.size	cmp, .-cmp
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	cpx, %function
cpx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L190
	strh	r2, [r3]	@ movhi
	ldr	r3, .L190+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L190
	ldrh	r3, [r3]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L190+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L190
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L190+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	bhi	.L183
	ldr	r3, .L190+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L190+12
	strb	r2, [r3]
	b	.L184
.L183:
	ldr	r3, .L190+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L190+12
	strb	r2, [r3]
.L184:
	ldr	r3, .L190
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L190+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	bne	.L185
	ldr	r3, .L190+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L190+12
	strb	r2, [r3]
	b	.L186
.L185:
	ldr	r3, .L190+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L190+12
	strb	r2, [r3]
.L186:
	ldr	r3, .L190+8
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L187
	ldr	r3, .L190+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L190+12
	strb	r2, [r3]
	b	.L189
.L187:
	ldr	r3, .L190+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L190+12
	strb	r2, [r3]
.L189:
	nop
	pop	{fp, pc}
.L191:
	.align	2
.L190:
	.word	value
	.word	x
	.word	result
	.word	status
	.size	cpx, .-cpx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	cpy, %function
cpy:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L200
	strh	r2, [r3]	@ movhi
	ldr	r3, .L200+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L200
	ldrh	r3, [r3]
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L200+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L200
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L200+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	bhi	.L193
	ldr	r3, .L200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L200+12
	strb	r2, [r3]
	b	.L194
.L193:
	ldr	r3, .L200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L200+12
	strb	r2, [r3]
.L194:
	ldr	r3, .L200
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L200+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r2, r3
	bne	.L195
	ldr	r3, .L200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L200+12
	strb	r2, [r3]
	b	.L196
.L195:
	ldr	r3, .L200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L200+12
	strb	r2, [r3]
.L196:
	ldr	r3, .L200+8
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L200+12
	strb	r2, [r3]
	b	.L199
.L197:
	ldr	r3, .L200+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L200+12
	strb	r2, [r3]
.L199:
	nop
	pop	{fp, pc}
.L201:
	.align	2
.L200:
	.word	value
	.word	y
	.word	result
	.word	status
	.size	cpy, .-cpy
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	dec, %function
dec:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L207
	strh	r2, [r3]	@ movhi
	ldr	r3, .L207
	ldrh	r3, [r3]
	sub	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L207+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L207+4
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L207+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L207+8
	strb	r2, [r3]
	b	.L204
.L203:
	ldr	r3, .L207+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L207+8
	strb	r2, [r3]
.L204:
	ldr	r3, .L207+4
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L207+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L207+8
	strb	r2, [r3]
	b	.L206
.L205:
	ldr	r3, .L207+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L207+8
	strb	r2, [r3]
.L206:
	ldr	r3, .L207+4
	ldrh	r3, [r3]
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L208:
	.align	2
.L207:
	.word	value
	.word	result
	.word	status
	.size	dec, .-dec
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	dex, %function
dex:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L215
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L215
	strb	r2, [r3]
	ldr	r3, .L215
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L215+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L215+4
	strb	r2, [r3]
	b	.L211
.L210:
	ldr	r3, .L215+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L215+4
	strb	r2, [r3]
.L211:
	ldr	r3, .L215
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L212
	ldr	r3, .L215+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L215+4
	strb	r2, [r3]
	b	.L214
.L212:
	ldr	r3, .L215+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L215+4
	strb	r2, [r3]
.L214:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L216:
	.align	2
.L215:
	.word	x
	.word	status
	.size	dex, .-dex
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	dey, %function
dey:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L223
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L223
	strb	r2, [r3]
	ldr	r3, .L223
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	ldr	r3, .L223+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L223+4
	strb	r2, [r3]
	b	.L219
.L218:
	ldr	r3, .L223+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L223+4
	strb	r2, [r3]
.L219:
	ldr	r3, .L223
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L220
	ldr	r3, .L223+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L223+4
	strb	r2, [r3]
	b	.L222
.L220:
	ldr	r3, .L223+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L223+4
	strb	r2, [r3]
.L222:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L224:
	.align	2
.L223:
	.word	y
	.word	status
	.size	dey, .-dey
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	eor, %function
eor:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L230
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L230+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L230+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L230+4
	ldrh	r3, [r3]
	eor	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L230+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L230+12
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L230+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L230+16
	strb	r2, [r3]
	b	.L227
.L226:
	ldr	r3, .L230+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L230+16
	strb	r2, [r3]
.L227:
	ldr	r3, .L230+12
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L228
	ldr	r3, .L230+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L230+16
	strb	r2, [r3]
	b	.L229
.L228:
	ldr	r3, .L230+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L230+16
	strb	r2, [r3]
.L229:
	ldr	r3, .L230+12
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L230+8
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L231:
	.align	2
.L230:
	.word	penaltyop
	.word	value
	.word	a
	.word	result
	.word	status
	.size	eor, .-eor
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	inc, %function
inc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L237
	strh	r2, [r3]	@ movhi
	ldr	r3, .L237
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L237+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L237+4
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L237+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L237+8
	strb	r2, [r3]
	b	.L234
.L233:
	ldr	r3, .L237+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L237+8
	strb	r2, [r3]
.L234:
	ldr	r3, .L237+4
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L237+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L237+8
	strb	r2, [r3]
	b	.L236
.L235:
	ldr	r3, .L237+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L237+8
	strb	r2, [r3]
.L236:
	ldr	r3, .L237+4
	ldrh	r3, [r3]
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L238:
	.align	2
.L237:
	.word	value
	.word	result
	.word	status
	.size	inc, .-inc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	inx, %function
inx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L245
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L245
	strb	r2, [r3]
	ldr	r3, .L245
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L245+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L245+4
	strb	r2, [r3]
	b	.L241
.L240:
	ldr	r3, .L245+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L245+4
	strb	r2, [r3]
.L241:
	ldr	r3, .L245
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L242
	ldr	r3, .L245+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L245+4
	strb	r2, [r3]
	b	.L244
.L242:
	ldr	r3, .L245+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L245+4
	strb	r2, [r3]
.L244:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L246:
	.align	2
.L245:
	.word	x
	.word	status
	.size	inx, .-inx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	iny, %function
iny:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L253
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L253
	strb	r2, [r3]
	ldr	r3, .L253
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L253+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L253+4
	strb	r2, [r3]
	b	.L249
.L248:
	ldr	r3, .L253+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L253+4
	strb	r2, [r3]
.L249:
	ldr	r3, .L253
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L250
	ldr	r3, .L253+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L253+4
	strb	r2, [r3]
	b	.L252
.L250:
	ldr	r3, .L253+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L253+4
	strb	r2, [r3]
.L252:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L254:
	.align	2
.L253:
	.word	y
	.word	status
	.size	iny, .-iny
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	jmp, %function
jmp:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L256
	ldrh	r3, [r3]
	ldr	r2, .L256+4
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L257:
	.align	2
.L256:
	.word	ea
	.word	pc
	.size	jmp, .-jmp
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	jsr, %function
jsr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L259
	ldrh	r3, [r3]
	sub	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	push16
	ldr	r3, .L259+4
	ldrh	r3, [r3]
	ldr	r2, .L259
	strh	r3, [r2]	@ movhi
	nop
	pop	{fp, pc}
.L260:
	.align	2
.L259:
	.word	pc
	.word	ea
	.size	jsr, .-jsr
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	lda, %function
lda:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L267
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L267+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L267+4
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L267+8
	strb	r2, [r3]
	ldr	r3, .L267+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L267+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L267+12
	strb	r2, [r3]
	b	.L263
.L262:
	ldr	r3, .L267+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L267+12
	strb	r2, [r3]
.L263:
	ldr	r3, .L267+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L264
	ldr	r3, .L267+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L267+12
	strb	r2, [r3]
	b	.L266
.L264:
	ldr	r3, .L267+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L267+12
	strb	r2, [r3]
.L266:
	nop
	pop	{fp, pc}
.L268:
	.align	2
.L267:
	.word	penaltyop
	.word	value
	.word	a
	.word	status
	.size	lda, .-lda
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ldx, %function
ldx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L275
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L275+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L275+4
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L275+8
	strb	r2, [r3]
	ldr	r3, .L275+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L275+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L275+12
	strb	r2, [r3]
	b	.L271
.L270:
	ldr	r3, .L275+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L275+12
	strb	r2, [r3]
.L271:
	ldr	r3, .L275+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L272
	ldr	r3, .L275+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L275+12
	strb	r2, [r3]
	b	.L274
.L272:
	ldr	r3, .L275+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L275+12
	strb	r2, [r3]
.L274:
	nop
	pop	{fp, pc}
.L276:
	.align	2
.L275:
	.word	penaltyop
	.word	value
	.word	x
	.word	status
	.size	ldx, .-ldx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ldy, %function
ldy:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L283
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L283+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L283+4
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L283+8
	strb	r2, [r3]
	ldr	r3, .L283+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L283+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L283+12
	strb	r2, [r3]
	b	.L279
.L278:
	ldr	r3, .L283+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L283+12
	strb	r2, [r3]
.L279:
	ldr	r3, .L283+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L280
	ldr	r3, .L283+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L283+12
	strb	r2, [r3]
	b	.L282
.L280:
	ldr	r3, .L283+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L283+12
	strb	r2, [r3]
.L282:
	nop
	pop	{fp, pc}
.L284:
	.align	2
.L283:
	.word	penaltyop
	.word	value
	.word	y
	.word	status
	.size	ldy, .-ldy
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	lsr, %function
lsr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L292
	strh	r2, [r3]	@ movhi
	ldr	r3, .L292
	ldrh	r3, [r3]
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L292+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L292
	ldrh	r3, [r3]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L292+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L292+8
	strb	r2, [r3]
	b	.L287
.L286:
	ldr	r3, .L292+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L292+8
	strb	r2, [r3]
.L287:
	ldr	r3, .L292+4
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L292+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L292+8
	strb	r2, [r3]
	b	.L289
.L288:
	ldr	r3, .L292+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L292+8
	strb	r2, [r3]
.L289:
	ldr	r3, .L292+4
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L292+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L292+8
	strb	r2, [r3]
	b	.L291
.L290:
	ldr	r3, .L292+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L292+8
	strb	r2, [r3]
.L291:
	ldr	r3, .L292+4
	ldrh	r3, [r3]
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L293:
	.align	2
.L292:
	.word	value
	.word	result
	.word	status
	.size	lsr, .-lsr
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nop, %function
nop:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L298
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #252
	beq	.L295
	cmp	r3, #252
	bgt	.L297
	cmp	r3, #220
	beq	.L295
	cmp	r3, #220
	bgt	.L297
	cmp	r3, #124
	beq	.L295
	cmp	r3, #124
	bgt	.L297
	cmp	r3, #92
	beq	.L295
	cmp	r3, #92
	bgt	.L297
	cmp	r3, #28
	beq	.L295
	cmp	r3, #60
	bne	.L297
.L295:
	ldr	r3, .L298+4
	mov	r2, #1
	strb	r2, [r3]
	nop
.L297:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L299:
	.align	2
.L298:
	.word	opcode
	.word	penaltyop
	.size	nop, .-nop
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ora, %function
ora:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L305
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L305+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L305+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L305+4
	ldrh	r3, [r3]
	orr	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L305+12
	strh	r3, [r2]	@ movhi
	ldr	r3, .L305+12
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L305+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L305+16
	strb	r2, [r3]
	b	.L302
.L301:
	ldr	r3, .L305+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L305+16
	strb	r2, [r3]
.L302:
	ldr	r3, .L305+12
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L305+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L305+16
	strb	r2, [r3]
	b	.L304
.L303:
	ldr	r3, .L305+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L305+16
	strb	r2, [r3]
.L304:
	ldr	r3, .L305+12
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L305+8
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L306:
	.align	2
.L305:
	.word	penaltyop
	.word	value
	.word	a
	.word	result
	.word	status
	.size	ora, .-ora
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pha, %function
pha:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L308
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r3
	bl	push8
	nop
	pop	{fp, pc}
.L309:
	.align	2
.L308:
	.word	a
	.size	pha, .-pha
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	php, %function
php:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L311
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #16
	and	r3, r3, #255
	mov	r0, r3
	bl	push8
	nop
	pop	{fp, pc}
.L312:
	.align	2
.L311:
	.word	status
	.size	php, .-php
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	pla, %function
pla:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	pull8
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L319
	strb	r2, [r3]
	ldr	r3, .L319
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L314
	ldr	r3, .L319+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L319+4
	strb	r2, [r3]
	b	.L315
.L314:
	ldr	r3, .L319+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L319+4
	strb	r2, [r3]
.L315:
	ldr	r3, .L319
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L316
	ldr	r3, .L319+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L319+4
	strb	r2, [r3]
	b	.L318
.L316:
	ldr	r3, .L319+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L319+4
	strb	r2, [r3]
.L318:
	nop
	pop	{fp, pc}
.L320:
	.align	2
.L319:
	.word	a
	.word	status
	.size	pla, .-pla
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	plp, %function
plp:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	pull8
	mov	r3, r0
	orr	r3, r3, #32
	and	r2, r3, #255
	ldr	r3, .L322
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L323:
	.align	2
.L322:
	.word	status
	.size	plp, .-plp
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rol, %function
rol:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L331
	strh	r2, [r3]	@ movhi
	ldr	r3, .L331
	ldrh	r3, [r3]
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, .L331+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L331+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L331+8
	ldrh	r3, [r3]
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L331+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L331+4
	strb	r2, [r3]
	b	.L326
.L325:
	ldr	r3, .L331+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L331+4
	strb	r2, [r3]
.L326:
	ldr	r3, .L331+8
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L331+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L331+4
	strb	r2, [r3]
	b	.L328
.L327:
	ldr	r3, .L331+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L331+4
	strb	r2, [r3]
.L328:
	ldr	r3, .L331+8
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L331+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L331+4
	strb	r2, [r3]
	b	.L330
.L329:
	ldr	r3, .L331+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L331+4
	strb	r2, [r3]
.L330:
	ldr	r3, .L331+8
	ldrh	r3, [r3]
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L332:
	.align	2
.L331:
	.word	value
	.word	status
	.word	result
	.size	rol, .-rol
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ror, %function
ror:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	getvalue
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L340
	strh	r2, [r3]	@ movhi
	ldr	r3, .L340
	ldrh	r3, [r3]
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, .L340+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #7
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L340+8
	strh	r3, [r2]	@ movhi
	ldr	r3, .L340
	ldrh	r3, [r3]
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L340+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L340+4
	strb	r2, [r3]
	b	.L335
.L334:
	ldr	r3, .L340+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L340+4
	strb	r2, [r3]
.L335:
	ldr	r3, .L340+8
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L336
	ldr	r3, .L340+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L340+4
	strb	r2, [r3]
	b	.L337
.L336:
	ldr	r3, .L340+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L340+4
	strb	r2, [r3]
.L337:
	ldr	r3, .L340+8
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L340+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L340+4
	strb	r2, [r3]
	b	.L339
.L338:
	ldr	r3, .L340+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L340+4
	strb	r2, [r3]
.L339:
	ldr	r3, .L340+8
	ldrh	r3, [r3]
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L341:
	.align	2
.L340:
	.word	value
	.word	status
	.word	result
	.size	ror, .-ror
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rti, %function
rti:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	pull8
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L343
	strb	r2, [r3]
	bl	pull16
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L343+4
	strh	r2, [r3]	@ movhi
	ldr	r3, .L343+4
	ldrh	r3, [r3]
	ldr	r2, .L343+8
	strh	r3, [r2]	@ movhi
	nop
	pop	{fp, pc}
.L344:
	.align	2
.L343:
	.word	status
	.word	value
	.word	pc
	.size	rti, .-rti
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rts, %function
rts:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	pull16
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L346
	strh	r2, [r3]	@ movhi
	ldr	r3, .L346
	ldrh	r3, [r3]
	add	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L346+4
	strh	r3, [r2]	@ movhi
	nop
	pop	{fp, pc}
.L347:
	.align	2
.L346:
	.word	value
	.word	pc
	.size	rts, .-rts
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sbc, %function
sbc:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L360
	mov	r2, #1
	strb	r2, [r3]
	bl	getvalue
	mov	r3, r0
	eor	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L360+4
	strh	r3, [r2]	@ movhi
	ldr	r3, .L360+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L360+4
	ldrh	r3, [r3]
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L360+16
	strh	r3, [r2]	@ movhi
	ldr	r3, .L360+16
	ldrh	r3, [r3]
	and	r3, r3, #65280
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
	b	.L350
.L349:
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
.L350:
	ldr	r3, .L360+16
	ldrh	r3, [r3]
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
	b	.L352
.L351:
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
.L352:
	ldr	r3, .L360+16
	ldrh	r3, [r3]
	mov	r2, r3
	ldr	r3, .L360+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	ldr	r2, .L360+16
	ldrh	r1, [r2]
	ldr	r2, .L360+4
	ldrh	r2, [r2]
	eor	r2, r2, r1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	and	r3, r3, r2
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #64
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
	b	.L354
.L353:
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #64
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
.L354:
	ldr	r3, .L360+16
	ldrh	r3, [r3]
	and	r3, r3, #128
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
	b	.L356
.L355:
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
.L356:
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #8
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
	ldr	r3, .L360+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #102
	and	r2, r3, #255
	ldr	r3, .L360+8
	strb	r2, [r3]
	ldr	r3, .L360+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #15
	cmp	r3, #9
	ble	.L358
	ldr	r3, .L360+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #6
	and	r2, r3, #255
	ldr	r3, .L360+8
	strb	r2, [r3]
.L358:
	ldr	r3, .L360+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #240
	cmp	r3, #144
	ble	.L359
	ldr	r3, .L360+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #96
	and	r2, r3, #255
	ldr	r3, .L360+8
	strb	r2, [r3]
	ldr	r3, .L360+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L360+12
	strb	r2, [r3]
.L359:
	ldr	r3, .L360+20
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L360+20
	str	r3, [r2]
.L357:
	ldr	r3, .L360+16
	ldrh	r3, [r3]
	and	r2, r3, #255
	ldr	r3, .L360+8
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L361:
	.align	2
.L360:
	.word	penaltyop
	.word	value
	.word	a
	.word	status
	.word	result
	.word	clockticks6502
	.size	sbc, .-sbc
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sec, %function
sec:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L363
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L363
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L364:
	.align	2
.L363:
	.word	status
	.size	sec, .-sec
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sed, %function
sed:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L366
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #8
	and	r2, r3, #255
	ldr	r3, .L366
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L367:
	.align	2
.L366:
	.word	status
	.size	sed, .-sed
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sei, %function
sei:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L369
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #4
	and	r2, r3, #255
	ldr	r3, .L369
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L370:
	.align	2
.L369:
	.word	status
	.size	sei, .-sei
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sta, %function
sta:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L372
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L373:
	.align	2
.L372:
	.word	a
	.size	sta, .-sta
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	stx, %function
stx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L375
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L376:
	.align	2
.L375:
	.word	x
	.size	stx, .-stx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sty, %function
sty:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L378
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	putvalue
	nop
	pop	{fp, pc}
.L379:
	.align	2
.L378:
	.word	y
	.size	sty, .-sty
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tax, %function
tax:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L386
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L386+4
	strb	r2, [r3]
	ldr	r3, .L386+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L386+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L386+8
	strb	r2, [r3]
	b	.L382
.L381:
	ldr	r3, .L386+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L386+8
	strb	r2, [r3]
.L382:
	ldr	r3, .L386+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L383
	ldr	r3, .L386+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L386+8
	strb	r2, [r3]
	b	.L385
.L383:
	ldr	r3, .L386+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L386+8
	strb	r2, [r3]
.L385:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L387:
	.align	2
.L386:
	.word	a
	.word	x
	.word	status
	.size	tax, .-tax
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tay, %function
tay:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L394
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L394+4
	strb	r2, [r3]
	ldr	r3, .L394+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L394+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L394+8
	strb	r2, [r3]
	b	.L390
.L389:
	ldr	r3, .L394+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L394+8
	strb	r2, [r3]
.L390:
	ldr	r3, .L394+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L391
	ldr	r3, .L394+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L394+8
	strb	r2, [r3]
	b	.L393
.L391:
	ldr	r3, .L394+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L394+8
	strb	r2, [r3]
.L393:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L395:
	.align	2
.L394:
	.word	a
	.word	y
	.word	status
	.size	tay, .-tay
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tsx, %function
tsx:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L402
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L402+4
	strb	r2, [r3]
	ldr	r3, .L402+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L402+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L402+8
	strb	r2, [r3]
	b	.L398
.L397:
	ldr	r3, .L402+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L402+8
	strb	r2, [r3]
.L398:
	ldr	r3, .L402+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L399
	ldr	r3, .L402+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L402+8
	strb	r2, [r3]
	b	.L401
.L399:
	ldr	r3, .L402+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L402+8
	strb	r2, [r3]
.L401:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L403:
	.align	2
.L402:
	.word	sp
	.word	x
	.word	status
	.size	tsx, .-tsx
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	txa, %function
txa:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L410
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L410+4
	strb	r2, [r3]
	ldr	r3, .L410+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L410+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L410+8
	strb	r2, [r3]
	b	.L406
.L405:
	ldr	r3, .L410+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L410+8
	strb	r2, [r3]
.L406:
	ldr	r3, .L410+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L407
	ldr	r3, .L410+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L410+8
	strb	r2, [r3]
	b	.L409
.L407:
	ldr	r3, .L410+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L410+8
	strb	r2, [r3]
.L409:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L411:
	.align	2
.L410:
	.word	x
	.word	a
	.word	status
	.size	txa, .-txa
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	txs, %function
txs:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L413
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L413+4
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L414:
	.align	2
.L413:
	.word	x
	.word	sp
	.size	txs, .-txs
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	tya, %function
tya:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L421
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L421+4
	strb	r2, [r3]
	ldr	r3, .L421+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L421+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L421+8
	strb	r2, [r3]
	b	.L417
.L416:
	ldr	r3, .L421+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r2, r3, #255
	ldr	r3, .L421+8
	strb	r2, [r3]
.L417:
	ldr	r3, .L421+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	cmp	r3, #0
	bge	.L418
	ldr	r3, .L421+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r2, r3, #255
	ldr	r3, .L421+8
	strb	r2, [r3]
	b	.L420
.L418:
	ldr	r3, .L421+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #127
	and	r2, r3, #255
	ldr	r3, .L421+8
	strb	r2, [r3]
.L420:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L422:
	.align	2
.L421:
	.word	y
	.word	a
	.word	status
	.size	tya, .-tya
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	lax, %function
lax:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	lda
	bl	ldx
	nop
	pop	{fp, pc}
	.size	lax, .-lax
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sax, %function
sax:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sta
	bl	stx
	ldr	r3, .L427
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L427+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, r2
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	bl	putvalue
	ldr	r3, .L427+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L427+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L427+16
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L427+16
	str	r3, [r2]
.L426:
	nop
	pop	{fp, pc}
.L428:
	.align	2
.L427:
	.word	a
	.word	x
	.word	penaltyop
	.word	penaltyaddr
	.word	clockticks6502
	.size	sax, .-sax
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	dcp, %function
dcp:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	dec
	bl	cmp
	ldr	r3, .L432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L432+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L432+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L432+8
	str	r3, [r2]
.L431:
	nop
	pop	{fp, pc}
.L433:
	.align	2
.L432:
	.word	penaltyop
	.word	penaltyaddr
	.word	clockticks6502
	.size	dcp, .-dcp
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	isb, %function
isb:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	inc
	bl	sbc
	ldr	r3, .L437
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L437+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L436
	ldr	r3, .L437+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L437+8
	str	r3, [r2]
.L436:
	nop
	pop	{fp, pc}
.L438:
	.align	2
.L437:
	.word	penaltyop
	.word	penaltyaddr
	.word	clockticks6502
	.size	isb, .-isb
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	slo, %function
slo:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	asl
	bl	ora
	ldr	r3, .L442
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L442+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L442+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L442+8
	str	r3, [r2]
.L441:
	nop
	pop	{fp, pc}
.L443:
	.align	2
.L442:
	.word	penaltyop
	.word	penaltyaddr
	.word	clockticks6502
	.size	slo, .-slo
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rla, %function
rla:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	rol
	bl	and
	ldr	r3, .L447
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L447+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L447+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L447+8
	str	r3, [r2]
.L446:
	nop
	pop	{fp, pc}
.L448:
	.align	2
.L447:
	.word	penaltyop
	.word	penaltyaddr
	.word	clockticks6502
	.size	rla, .-rla
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sre, %function
sre:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	lsr
	bl	eor
	ldr	r3, .L452
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L452+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L452+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L452+8
	str	r3, [r2]
.L451:
	nop
	pop	{fp, pc}
.L453:
	.align	2
.L452:
	.word	penaltyop
	.word	penaltyaddr
	.word	clockticks6502
	.size	sre, .-sre
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rra, %function
rra:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	ror
	bl	adc
	ldr	r3, .L457
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L457+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L457+8
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L457+8
	str	r3, [r2]
.L456:
	nop
	pop	{fp, pc}
.L458:
	.align	2
.L457:
	.word	penaltyop
	.word	penaltyaddr
	.word	clockticks6502
	.size	rra, .-rra
	.section	.rodata
	.align	2
	.type	ticktable, %object
	.size	ticktable, 1024
ticktable:
	.word	7
	.word	6
	.word	2
	.word	8
	.word	3
	.word	3
	.word	5
	.word	5
	.word	3
	.word	2
	.word	2
	.word	2
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	5
	.word	2
	.word	8
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	4
	.word	2
	.word	7
	.word	4
	.word	4
	.word	7
	.word	7
	.word	6
	.word	6
	.word	2
	.word	8
	.word	3
	.word	3
	.word	5
	.word	5
	.word	4
	.word	2
	.word	2
	.word	2
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	5
	.word	2
	.word	8
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	4
	.word	2
	.word	7
	.word	4
	.word	4
	.word	7
	.word	7
	.word	6
	.word	6
	.word	2
	.word	8
	.word	3
	.word	3
	.word	5
	.word	5
	.word	3
	.word	2
	.word	2
	.word	2
	.word	3
	.word	4
	.word	6
	.word	6
	.word	2
	.word	5
	.word	2
	.word	8
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	4
	.word	2
	.word	7
	.word	4
	.word	4
	.word	7
	.word	7
	.word	6
	.word	6
	.word	2
	.word	8
	.word	3
	.word	3
	.word	5
	.word	5
	.word	4
	.word	2
	.word	2
	.word	2
	.word	5
	.word	4
	.word	6
	.word	6
	.word	2
	.word	5
	.word	2
	.word	8
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	4
	.word	2
	.word	7
	.word	4
	.word	4
	.word	7
	.word	7
	.word	2
	.word	6
	.word	2
	.word	6
	.word	3
	.word	3
	.word	3
	.word	3
	.word	2
	.word	2
	.word	2
	.word	2
	.word	4
	.word	4
	.word	4
	.word	4
	.word	2
	.word	6
	.word	2
	.word	6
	.word	4
	.word	4
	.word	4
	.word	4
	.word	2
	.word	5
	.word	2
	.word	5
	.word	5
	.word	5
	.word	5
	.word	5
	.word	2
	.word	6
	.word	2
	.word	6
	.word	3
	.word	3
	.word	3
	.word	3
	.word	2
	.word	2
	.word	2
	.word	2
	.word	4
	.word	4
	.word	4
	.word	4
	.word	2
	.word	5
	.word	2
	.word	5
	.word	4
	.word	4
	.word	4
	.word	4
	.word	2
	.word	4
	.word	2
	.word	4
	.word	4
	.word	4
	.word	4
	.word	4
	.word	2
	.word	6
	.word	2
	.word	8
	.word	3
	.word	3
	.word	5
	.word	5
	.word	2
	.word	2
	.word	2
	.word	2
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	5
	.word	2
	.word	8
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	4
	.word	2
	.word	7
	.word	4
	.word	4
	.word	7
	.word	7
	.word	2
	.word	6
	.word	2
	.word	8
	.word	3
	.word	3
	.word	5
	.word	5
	.word	2
	.word	2
	.word	2
	.word	2
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	5
	.word	2
	.word	8
	.word	4
	.word	4
	.word	6
	.word	6
	.word	2
	.word	4
	.word	2
	.word	7
	.word	4
	.word	4
	.word	7
	.word	7
	.text
	.align	2
	.global	nmi6502
	.syntax unified
	.arm
	.fpu softvfp
	.type	nmi6502, %function
nmi6502:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L460
	ldrh	r3, [r3]
	mov	r0, r3
	bl	push16
	ldr	r3, .L460+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r3
	bl	push8
	ldr	r3, .L460+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #4
	and	r2, r3, #255
	ldr	r3, .L460+4
	strb	r2, [r3]
	ldr	r0, .L460+8
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r0, .L460+12
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L460
	strh	r3, [r2]	@ movhi
	nop
	pop	{r4, r5, fp, pc}
.L461:
	.align	2
.L460:
	.word	pc
	.word	status
	.word	65530
	.word	65531
	.size	nmi6502, .-nmi6502
	.align	2
	.global	irq6502
	.syntax unified
	.arm
	.fpu softvfp
	.type	irq6502, %function
irq6502:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L463
	ldrh	r3, [r3]
	mov	r0, r3
	bl	push16
	ldr	r3, .L463+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r3
	bl	push8
	ldr	r3, .L463+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #4
	and	r2, r3, #255
	ldr	r3, .L463+4
	strb	r2, [r3]
	ldr	r0, .L463+8
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r4, r3, #16
	ldr	r0, .L463+12
	bl	read6502
	mov	r3, r0
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r4, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L463
	strh	r3, [r2]	@ movhi
	nop
	pop	{r4, r5, fp, pc}
.L464:
	.align	2
.L463:
	.word	pc
	.word	status
	.word	65534
	.word	65535
	.size	irq6502, .-irq6502
	.global	callexternal
	.bss
	.type	callexternal, %object
	.size	callexternal, 1
callexternal:
	.space	1
	.comm	loopexternal,4,4
	.text
	.align	2
	.global	exec6502
	.syntax unified
	.arm
	.fpu softvfp
	.type	exec6502, %function
exec6502:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L469
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L469
	str	r3, [r2]
	b	.L466
.L468:
	ldr	r3, .L469+4
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L469+4
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L469+8
	strb	r2, [r3]
	ldr	r3, .L469+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #32
	and	r2, r3, #255
	ldr	r3, .L469+12
	strb	r2, [r3]
	ldr	r3, .L469+16
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L469+20
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L469+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L469+24
	ldr	r3, [r3, r2, lsl #2]
	blx	r3
	ldr	r3, .L469+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L469+28
	ldr	r3, [r3, r2, lsl #2]
	blx	r3
	ldr	r3, .L469+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L469+32
	ldr	r2, [r3, r2, lsl #2]
	ldr	r3, .L469+36
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L469+36
	str	r3, [r2]
	ldr	r3, .L469+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L469+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L469+36
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L469+36
	str	r3, [r2]
.L467:
	ldr	r3, .L469+40
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L469+40
	str	r3, [r2]
	ldr	r3, .L469+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L469+48
	ldr	r3, [r3]
	blx	r3
.L466:
	ldr	r3, .L469+36
	ldr	r2, [r3]
	ldr	r3, .L469
	ldr	r3, [r3]
	cmp	r2, r3
	bcc	.L468
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L470:
	.align	2
.L469:
	.word	clockgoal6502
	.word	pc
	.word	opcode
	.word	status
	.word	penaltyop
	.word	penaltyaddr
	.word	addrtable
	.word	optable
	.word	ticktable
	.word	clockticks6502
	.word	instructions
	.word	callexternal
	.word	loopexternal
	.size	exec6502, .-exec6502
	.align	2
	.global	step6502
	.syntax unified
	.arm
	.fpu softvfp
	.type	step6502, %function
step6502:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L475
	ldrh	r3, [r3]
	add	r2, r3, #1
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	ldr	r1, .L475
	strh	r2, [r1]	@ movhi
	mov	r0, r3
	bl	read6502
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L475+4
	strb	r2, [r3]
	ldr	r3, .L475+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #32
	and	r2, r3, #255
	ldr	r3, .L475+8
	strb	r2, [r3]
	ldr	r3, .L475+12
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L475+16
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L475+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L475+20
	ldr	r3, [r3, r2, lsl #2]
	blx	r3
	ldr	r3, .L475+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L475+24
	ldr	r3, [r3, r2, lsl #2]
	blx	r3
	ldr	r3, .L475+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L475+28
	ldr	r2, [r3, r2, lsl #2]
	ldr	r3, .L475+32
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L475+32
	str	r3, [r2]
	ldr	r3, .L475+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L475+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L475+32
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L475+32
	str	r3, [r2]
.L472:
	ldr	r3, .L475+32
	ldr	r3, [r3]
	ldr	r2, .L475+36
	str	r3, [r2]
	ldr	r3, .L475+40
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L475+40
	str	r3, [r2]
	ldr	r3, .L475+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L475+48
	ldr	r3, [r3]
	blx	r3
.L474:
	nop
	pop	{fp, pc}
.L476:
	.align	2
.L475:
	.word	pc
	.word	opcode
	.word	status
	.word	penaltyop
	.word	penaltyaddr
	.word	addrtable
	.word	optable
	.word	ticktable
	.word	clockticks6502
	.word	clockgoal6502
	.word	instructions
	.word	callexternal
	.word	loopexternal
	.size	step6502, .-step6502
	.align	2
	.global	hookexternal
	.syntax unified
	.arm
	.fpu softvfp
	.type	hookexternal, %function
hookexternal:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	beq	.L478
	ldr	r3, [fp, #-8]
	ldr	r2, .L481
	str	r3, [r2]
	ldr	r3, .L481+4
	mov	r2, #1
	strb	r2, [r3]
	b	.L480
.L478:
	ldr	r3, .L481+4
	mov	r2, #0
	strb	r2, [r3]
.L480:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L482:
	.align	2
.L481:
	.word	loopexternal
	.word	callexternal
	.size	hookexternal, .-hookexternal
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
