	.file	"650159.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -36[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -64[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -60[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -56[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -52[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -48[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -44[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -40[rbp], eax
	cmp	DWORD PTR -60[rbp], 0
	je	.L4
	cmp	DWORD PTR -64[rbp], 0
	jne	.L5
.L4:
	mov	eax, 1
	jmp	.L6
.L5:
	mov	eax, 0
.L6:
	mov	DWORD PTR -32[rbp], eax
	jmp	.L7
.L40:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -40[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC0[rip]
	jnb	.L8
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -40[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC0[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L9
	cmp	DWORD PTR -48[rbp], 0
	jne	.L9
.L8:
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -36[rbp], eax
	jmp	.L10
.L9:
	sub	DWORD PTR -36[rbp], 1
.L10:
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -28[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -24[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -20[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -16[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -12[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -8[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -4[rbp], eax
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -56[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC1[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -44[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -56[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	jp	.L44
	ucomisd	xmm0, QWORD PTR .LC1[rip]
	je	.L14
.L44:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -44[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L11
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jne	.L11
.L14:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -56[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -40[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -56[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L47
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L19
.L47:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -40[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L11
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jne	.L11
.L19:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -52[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -40[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -52[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L50
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L24
.L50:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -40[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L11
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jne	.L11
.L24:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -52[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -56[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L11
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -52[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L53
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L29
.L53:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -56[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L11
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jne	.L11
.L29:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -4[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	setnb	al
	movzx	eax, al
	cmp	DWORD PTR -64[rbp], eax
	jne	.L11
	cmp	DWORD PTR -12[rbp], 0
	jne	.L32
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -4[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC0[rip]
	jb	.L54
.L32:
	mov	edx, 1
	jmp	.L35
.L54:
	mov	edx, 0
.L35:
	mov	eax, DWORD PTR -48[rbp]
	cmp	edx, eax
	jne	.L11
	cmp	DWORD PTR -12[rbp], 0
	jne	.L36
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -4[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC0[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L36
	mov	edx, 1
	jmp	.L37
.L36:
	mov	edx, 0
.L37:
	mov	eax, DWORD PTR -60[rbp]
	cmp	edx, eax
	jne	.L11
	mov	eax, 1
	jmp	.L38
.L11:
	mov	eax, 0
.L38:
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR -64[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -60[rbp], eax
	movss	xmm0, DWORD PTR -20[rbp]
	movss	DWORD PTR -56[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	movss	DWORD PTR -52[rbp], xmm0
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -48[rbp], eax
	movss	xmm0, DWORD PTR -8[rbp]
	movss	DWORD PTR -44[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	movss	DWORD PTR -40[rbp], xmm0
.L7:
	cmp	DWORD PTR -36[rbp], 0
	js	.L39
	cmp	DWORD PTR -32[rbp], 0
	jne	.L40
.L39:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	1076101120
	.align 8
.LC1:
	.long	0
	.long	-1071120384
	.align 8
.LC2:
	.long	0
	.long	-1071382528
	.align 8
.LC3:
	.long	0
	.long	-1071251456
	.align 8
.LC4:
	.long	0
	.long	-1070858240
	.align 8
.LC5:
	.long	0
	.long	-1072168960
	.align 8
.LC6:
	.long	0
	.long	-1070727168
	.align 8
.LC7:
	.long	0
	.long	-1070530560
	.align 8
.LC8:
	.long	0
	.long	-1074790400
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"650159.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dcmpge
	.global	__aeabi_dcmple
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 64
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #64
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-48]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-76]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-72]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-68]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-64]	@ float
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-60]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-56]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-52]	@ float
	ldr	r3, [fp, #-72]
	cmp	r3, #0
	beq	.L4
	ldr	r3, [fp, #-76]
	cmp	r3, #0
	bne	.L5
.L4:
	mov	r3, #1
	b	.L6
.L5:
	mov	r3, #0
.L6:
	str	r3, [fp, #-44]
	b	.L7
.L39:
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L8
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L50
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L9
	mov	r3, #0
	mov	r4, r3
.L9:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L10
	ldr	r3, [fp, #-60]
	cmp	r3, #0
	bne	.L10
.L8:
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-48]
	b	.L11
.L10:
	ldr	r3, [fp, #-48]
	sub	r3, r3, #1
	str	r3, [fp, #-48]
.L11:
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-40]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-36]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-32]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-28]	@ float
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-24]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-20]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-16]	@ float
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L15
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
.L15:
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L19
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
.L19:
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L23
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
.L23:
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
.L27:
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L50+32
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L29
	mov	r3, #0
	mov	r4, r3
.L29:
	and	r3, r4, #255
	mov	r2, r3
	ldr	r3, [fp, #-76]
	cmp	r3, r2
	bne	.L12
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L30
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L50
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L49
.L30:
	mov	r2, #1
	b	.L33
.L49:
	mov	r2, #0
.L33:
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	bne	.L12
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L34
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L50
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L35
	mov	r3, #0
	mov	r4, r3
.L35:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L34
	mov	r2, #1
	b	.L36
.L34:
	mov	r2, #0
.L36:
	ldr	r3, [fp, #-72]
	cmp	r2, r3
	bne	.L12
	mov	r3, #1
	b	.L37
.L12:
	mov	r3, #0
.L37:
	str	r3, [fp, #-44]
	ldr	r3, [fp, #-40]
	str	r3, [fp, #-76]
	ldr	r3, [fp, #-36]
	str	r3, [fp, #-72]
	ldr	r3, [fp, #-32]	@ float
	str	r3, [fp, #-68]	@ float
	ldr	r3, [fp, #-28]	@ float
	str	r3, [fp, #-64]	@ float
	ldr	r3, [fp, #-24]
	str	r3, [fp, #-60]
	ldr	r3, [fp, #-20]	@ float
	str	r3, [fp, #-56]	@ float
	ldr	r3, [fp, #-16]	@ float
	str	r3, [fp, #-52]	@ float
.L7:
	ldr	r3, [fp, #-48]
	cmp	r3, #0
	blt	.L38
	ldr	r3, [fp, #-44]
	cmp	r3, #0
	bne	.L39
.L38:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L51:
	.align	2
.L50:
	.word	1076101120
	.word	-1071120384
	.word	-1071382528
	.word	-1071251456
	.word	-1070858240
	.word	-1072168960
	.word	-1070727168
	.word	-1070530560
	.word	-1074790400
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
