	.file	"938074.c"
	.intel_syntax noprefix
	.text
	.globl	NUM_SCLK_RANGE
	.bss
	.align 8
	.type	NUM_SCLK_RANGE, @object
	.size	NUM_SCLK_RANGE, 8
NUM_SCLK_RANGE:
	.zero	8
	.globl	Range_Table
	.align 8
	.type	Range_Table, @object
	.size	Range_Table, 8
Range_Table:
	.zero	8
	.text
	.type	polaris10_get_sclk_range_table, @function
polaris10_get_sclk_range_table:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 80
	mov	QWORD PTR -72[rbp], rdi
	mov	QWORD PTR -80[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rax, QWORD PTR -72[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	QWORD PTR -48[rbp], rax
	mov	QWORD PTR -32[rbp], 0
	mov	QWORD PTR -24[rbp], 0
	mov	rax, QWORD PTR -72[rbp]
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	amdgpu_asic_get_xclk@PLT
	mov	QWORD PTR -40[rbp], rax
	lea	rdx, -32[rbp]
	mov	rax, QWORD PTR -72[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	atomctrl_get_smc_sclk_range_table@PLT
	test	rax, rax
	jne	.L2
	mov	QWORD PTR -56[rbp], 0
	jmp	.L3
.L4:
	mov	rcx, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	eax, DWORD PTR 32[rcx]
	mov	DWORD PTR 32[rdx], eax
	mov	rcx, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR [rcx]
	mov	QWORD PTR [rdx], rax
	mov	rcx, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR 8[rcx]
	mov	QWORD PTR 8[rdx], rax
	mov	rcx, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR 16[rcx]
	mov	QWORD PTR 16[rdx], rax
	mov	rcx, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR 24[rcx]
	mov	QWORD PTR 24[rdx], rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 8[rax]
	mov	rdi, rax
	call	CONVERT_FROM_HOST_TO_SMC_US@PLT
	mov	rax, QWORD PTR -80[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 16[rax]
	mov	rdi, rax
	call	CONVERT_FROM_HOST_TO_SMC_US@PLT
	mov	rax, QWORD PTR -80[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 24[rax]
	mov	rdi, rax
	call	CONVERT_FROM_HOST_TO_SMC_US@PLT
	add	QWORD PTR -56[rbp], 1
.L3:
	mov	rax, QWORD PTR NUM_SCLK_RANGE[rip]
	cmp	QWORD PTR -56[rbp], rax
	jb	.L4
	jmp	.L1
.L2:
	mov	QWORD PTR -56[rbp], 0
	jmp	.L6
.L7:
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR [rax]
	imul	rax, QWORD PTR -40[rbp]
	mov	rsi, rax
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 8[rax]
	mov	edx, eax
	mov	rax, QWORD PTR -48[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 4
	add	rax, rcx
	mov	ecx, edx
	shr	rsi, cl
	mov	rdx, rsi
	mov	QWORD PTR [rax], rdx
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 16[rax]
	imul	rax, QWORD PTR -40[rbp]
	mov	rsi, rax
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 8[rax]
	mov	edx, eax
	mov	rax, QWORD PTR -48[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 4
	add	rax, rcx
	mov	ecx, edx
	shr	rsi, cl
	mov	rdx, rsi
	mov	QWORD PTR 8[rax], rdx
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	eax, DWORD PTR 32[rcx]
	mov	DWORD PTR 32[rdx], eax
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR 8[rcx]
	mov	QWORD PTR [rdx], rax
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR 24[rcx]
	mov	QWORD PTR 8[rdx], rax
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR 16[rcx]
	mov	QWORD PTR 16[rdx], rax
	mov	rcx, QWORD PTR Range_Table[rip]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rsi, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	lea	rdx, [rsi+rax]
	mov	rax, QWORD PTR [rcx]
	mov	QWORD PTR 24[rdx], rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 8[rax]
	mov	rdi, rax
	call	CONVERT_FROM_HOST_TO_SMC_US@PLT
	mov	rax, QWORD PTR -80[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 16[rax]
	mov	rdi, rax
	call	CONVERT_FROM_HOST_TO_SMC_US@PLT
	mov	rax, QWORD PTR -80[rbp]
	mov	rcx, QWORD PTR [rax]
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rcx
	mov	rax, QWORD PTR 24[rax]
	mov	rdi, rax
	call	CONVERT_FROM_HOST_TO_SMC_US@PLT
	add	QWORD PTR -56[rbp], 1
.L6:
	mov	rax, QWORD PTR NUM_SCLK_RANGE[rip]
	cmp	QWORD PTR -56[rbp], rax
	jb	.L7
.L1:
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	polaris10_get_sclk_range_table, .-polaris10_get_sclk_range_table
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"938074.c"
	.text
	.comm	NUM_SCLK_RANGE,4,4
	.comm	Range_Table,4,4
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	polaris10_get_sclk_range_table, %function
polaris10_get_sclk_range_table:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r3, .L9
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-24]
	sub	r3, fp, #16
	mov	r2, #0
	str	r2, [r3]
	str	r2, [r3, #4]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3]
	mov	r0, r3
	bl	amdgpu_asic_get_xclk
	str	r0, [fp, #-20]
	sub	r3, fp, #16
	mov	r1, r3
	ldr	r0, [fp, #-32]
	bl	atomctrl_get_smc_sclk_range_table
	mov	r3, r0
	cmp	r3, #0
	bne	.L2
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L3
.L4:
	ldr	r1, [fp, #-16]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #16]
	str	r2, [r3, #16]
	ldr	r1, [fp, #-16]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1]
	str	r2, [r3]
	ldr	r1, [fp, #-16]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #4]
	str	r2, [r3, #4]
	ldr	r1, [fp, #-16]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #8]
	str	r2, [r3, #8]
	ldr	r1, [fp, #-16]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #12]
	str	r2, [r3, #12]
	ldr	r3, [fp, #-36]
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	mov	r0, r3
	bl	CONVERT_FROM_HOST_TO_SMC_US
	ldr	r3, [fp, #-36]
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #8]
	mov	r0, r3
	bl	CONVERT_FROM_HOST_TO_SMC_US
	ldr	r3, [fp, #-36]
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #12]
	mov	r0, r3
	bl	CONVERT_FROM_HOST_TO_SMC_US
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L3:
	ldr	r3, .L9+4
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	bcc	.L4
	b	.L1
.L2:
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L6
.L7:
	ldr	r3, .L9+8
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	mul	r1, r2, r3
	ldr	r3, .L9+8
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-24]
	ldr	r0, [r3]
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #3
	add	r3, r0, r3
	lsr	r2, r1, r2
	str	r2, [r3]
	ldr	r3, .L9+8
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #8]
	ldr	r2, [fp, #-20]
	mul	r1, r2, r3
	ldr	r3, .L9+8
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-24]
	ldr	r0, [r3]
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #3
	add	r3, r0, r3
	lsr	r2, r1, r2
	str	r2, [r3, #4]
	ldr	r3, .L9+8
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #16]
	str	r2, [r3, #16]
	ldr	r3, .L9+8
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #4]
	str	r2, [r3]
	ldr	r3, .L9+8
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #12]
	str	r2, [r3, #4]
	ldr	r3, .L9+8
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1, #8]
	str	r2, [r3, #8]
	ldr	r3, .L9+8
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r1, r1, r3
	ldr	r3, [fp, #-36]
	ldr	r0, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	ldr	r2, [r1]
	str	r2, [r3, #12]
	ldr	r3, [fp, #-36]
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	mov	r0, r3
	bl	CONVERT_FROM_HOST_TO_SMC_US
	ldr	r3, [fp, #-36]
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #8]
	mov	r0, r3
	bl	CONVERT_FROM_HOST_TO_SMC_US
	ldr	r3, [fp, #-36]
	ldr	r1, [r3]
	ldr	r2, [fp, #-28]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #12]
	mov	r0, r3
	bl	CONVERT_FROM_HOST_TO_SMC_US
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L6:
	ldr	r3, .L9+4
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	bcc	.L7
.L1:
	ldr	r3, .L9
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L8
	bl	__stack_chk_fail
.L8:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L10:
	.align	2
.L9:
	.word	.LC0
	.word	NUM_SCLK_RANGE
	.word	Range_Table
	.size	polaris10_get_sclk_range_table, .-polaris10_get_sclk_range_table
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
