	.file	"585202.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 304
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -152[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -296[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -292[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -288[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -284[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -280[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -276[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -272[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -268[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -264[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -260[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -256[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -252[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -248[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -244[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -240[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -236[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -232[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -228[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -224[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -220[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -216[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -212[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -208[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -204[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -200[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -196[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -192[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -188[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -184[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -180[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -176[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -172[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -168[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -164[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -160[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -156[rbp], eax
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -260[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jnb	.L4
	cmp	DWORD PTR -264[rbp], 0
	jne	.L5
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -280[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC1[rip]
	jnb	.L4
	cmp	DWORD PTR -284[rbp], 0
	je	.L5
.L4:
	cmp	DWORD PTR -288[rbp], 0
	jne	.L5
	cmp	DWORD PTR -292[rbp], 0
	jne	.L5
	mov	eax, 1
	jmp	.L6
.L5:
	mov	eax, 0
.L6:
	mov	DWORD PTR -148[rbp], eax
	jmp	.L7
.L1089:
	cmp	DWORD PTR -288[rbp], 0
	je	.L8
	cmp	DWORD PTR -292[rbp], 0
	je	.L8
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR -152[rbp], eax
	jmp	.L9
.L8:
	sub	DWORD PTR -152[rbp], 1
.L9:
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -144[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -140[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -136[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -132[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -128[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -124[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -120[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -116[rbp], eax
	call	__VERIFIER_nondet_bool
	mov	DWORD PTR -112[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -108[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -104[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -100[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -96[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -92[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -88[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -84[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -80[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -76[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -72[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -68[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -64[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -60[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -56[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -52[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -48[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -44[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -40[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -36[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -32[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -28[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -24[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -20[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -16[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -12[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -8[rbp], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR -4[rbp], eax
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -92[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1107
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L27
.L1107:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1108
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L27
.L1108:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1109
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L27
.L1109:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1110
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L27
.L1110:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1111
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L27
.L1111:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1112
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L27
.L1112:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1113
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L27
.L1113:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1114
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L27
.L1114:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1115
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L27
.L1115:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1116
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L27
.L1116:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1117
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L27
.L1117:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1118
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L27
.L1118:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1119
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L27
.L1119:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1120
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L27
.L1120:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1121
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L27
.L1121:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -92[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jne	.L10
.L27:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -72[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1138
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L60
.L1138:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1139
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L60
.L1139:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1140
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L60
.L1140:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1141
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L60
.L1141:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1142
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L60
.L1142:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1143
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L60
.L1143:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1144
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L60
.L1144:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1145
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L60
.L1145:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1146
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L60
.L1146:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1147
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L60
.L1147:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1148
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L60
.L1148:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1149
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L60
.L1149:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1150
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L60
.L1150:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1151
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L60
.L1151:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1152
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L60
.L1152:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -72[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L10
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jne	.L10
.L60:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -104[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1169
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L93
.L1169:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1170
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L93
.L1170:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1171
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L93
.L1171:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1172
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L93
.L1172:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1173
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L93
.L1173:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1174
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L93
.L1174:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1175
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L93
.L1175:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1176
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L93
.L1176:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1177
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L93
.L1177:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1178
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L93
.L1178:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1179
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L93
.L1179:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1180
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L93
.L1180:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1181
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L93
.L1181:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1182
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L93
.L1182:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1183
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L93
.L1183:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L10
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jne	.L10
.L93:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -80[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1200
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L126
.L1200:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1201
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L126
.L1201:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1202
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L126
.L1202:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1203
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L126
.L1203:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1204
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L126
.L1204:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1205
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L126
.L1205:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1206
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L126
.L1206:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1207
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L126
.L1207:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1208
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L126
.L1208:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1209
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L126
.L1209:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1210
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L126
.L1210:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1211
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L126
.L1211:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1212
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L126
.L1212:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1213
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L126
.L1213:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1214
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L126
.L1214:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jne	.L10
.L126:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -84[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1231
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L159
.L1231:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1232
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L159
.L1232:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1233
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L159
.L1233:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1234
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L159
.L1234:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1235
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L159
.L1235:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1236
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L159
.L1236:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1237
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L159
.L1237:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1238
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L159
.L1238:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1239
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L159
.L1239:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1240
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L159
.L1240:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1241
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L159
.L1241:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1242
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L159
.L1242:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1243
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L159
.L1243:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1244
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L159
.L1244:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1245
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L159
.L1245:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -84[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jne	.L10
.L159:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -68[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1262
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L192
.L1262:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1263
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L192
.L1263:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1264
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L192
.L1264:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1265
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L192
.L1265:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1266
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L192
.L1266:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1267
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L192
.L1267:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1268
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L192
.L1268:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1269
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L192
.L1269:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1270
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L192
.L1270:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1271
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L192
.L1271:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1272
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L192
.L1272:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1273
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L192
.L1273:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1274
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L192
.L1274:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1275
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L192
.L1275:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1276
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L192
.L1276:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -68[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jne	.L10
.L192:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -88[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1293
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L225
.L1293:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1294
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L225
.L1294:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1295
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L225
.L1295:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1296
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L225
.L1296:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1297
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L225
.L1297:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1298
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L225
.L1298:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1299
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L225
.L1299:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1300
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L225
.L1300:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1301
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L225
.L1301:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1302
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L225
.L1302:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1303
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L225
.L1303:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1304
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L225
.L1304:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1305
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L225
.L1305:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1306
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L225
.L1306:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1307
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L225
.L1307:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -88[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L225:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -144[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1324
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L258
.L1324:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1325
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L258
.L1325:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1326
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L258
.L1326:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1327
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L258
.L1327:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1328
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L258
.L1328:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1329
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L258
.L1329:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1330
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L258
.L1330:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1331
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L258
.L1331:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1332
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L258
.L1332:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1333
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L258
.L1333:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1334
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L258
.L1334:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1335
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L258
.L1335:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1336
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L258
.L1336:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1337
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L258
.L1337:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1338
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L258
.L1338:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -144[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jne	.L10
.L258:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -108[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1355
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L291
.L1355:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1356
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L291
.L1356:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1357
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L291
.L1357:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1358
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L291
.L1358:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1359
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L291
.L1359:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1360
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L291
.L1360:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1361
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L291
.L1361:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1362
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L291
.L1362:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1363
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L291
.L1363:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1364
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L291
.L1364:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1365
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L291
.L1365:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1366
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L291
.L1366:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1367
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L291
.L1367:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1368
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L291
.L1368:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1369
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L291
.L1369:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jne	.L10
.L291:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1386
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L324
.L1386:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1387
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L324
.L1387:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1388
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L324
.L1388:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1389
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L324
.L1389:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1390
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L324
.L1390:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1391
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L324
.L1391:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1392
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L324
.L1392:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1393
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L324
.L1393:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1394
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L324
.L1394:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1395
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L324
.L1395:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1396
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L324
.L1396:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1397
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L324
.L1397:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1398
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L324
.L1398:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1399
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L324
.L1399:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1400
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L324
.L1400:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -52[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jne	.L10
.L324:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1417
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L357
.L1417:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1418
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L357
.L1418:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1419
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L357
.L1419:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1420
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L357
.L1420:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1421
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L357
.L1421:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1422
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L357
.L1422:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1423
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L357
.L1423:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1424
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L357
.L1424:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1425
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L357
.L1425:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1426
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L357
.L1426:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1427
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L357
.L1427:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1428
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L357
.L1428:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1429
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L357
.L1429:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1430
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L357
.L1430:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1431
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L357
.L1431:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -48[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jne	.L10
.L357:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -60[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1448
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L390
.L1448:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1449
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L390
.L1449:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1450
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L390
.L1450:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1451
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L390
.L1451:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1452
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L390
.L1452:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1453
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L390
.L1453:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1454
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L390
.L1454:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1455
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L390
.L1455:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1456
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L390
.L1456:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1457
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L390
.L1457:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1458
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L390
.L1458:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1459
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L390
.L1459:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1460
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L390
.L1460:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1461
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L390
.L1461:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1462
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L390
.L1462:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -60[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jne	.L10
.L390:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -124[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1479
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L423
.L1479:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1480
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L423
.L1480:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1481
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L423
.L1481:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1482
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L423
.L1482:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1483
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L423
.L1483:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1484
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L423
.L1484:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1485
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L423
.L1485:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1486
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L423
.L1486:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1487
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L423
.L1487:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1488
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L423
.L1488:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1489
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L423
.L1489:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1490
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L423
.L1490:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1491
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L423
.L1491:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1492
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L423
.L1492:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1493
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L423
.L1493:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -124[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jne	.L10
.L423:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -40[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1510
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L456
.L1510:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1511
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L456
.L1511:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1512
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L456
.L1512:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1513
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L456
.L1513:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1514
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L456
.L1514:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1515
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L456
.L1515:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1516
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L456
.L1516:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1517
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L456
.L1517:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1518
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L456
.L1518:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1519
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L456
.L1519:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1520
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L456
.L1520:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1521
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L456
.L1521:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1522
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L456
.L1522:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1523
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L456
.L1523:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1524
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L456
.L1524:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -40[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jne	.L10
.L456:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -36[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1541
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L489
.L1541:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1542
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L489
.L1542:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1543
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L489
.L1543:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1544
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L489
.L1544:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1545
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L489
.L1545:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1546
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L489
.L1546:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1547
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L489
.L1547:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1548
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L489
.L1548:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1549
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L489
.L1549:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1550
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L489
.L1550:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1551
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L489
.L1551:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1552
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L489
.L1552:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1553
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L489
.L1553:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1554
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L489
.L1554:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1555
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L489
.L1555:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -36[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L10
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jne	.L10
.L489:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -28[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1572
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L522
.L1572:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1573
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L522
.L1573:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1574
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L522
.L1574:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1575
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L522
.L1575:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1576
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L522
.L1576:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1577
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L522
.L1577:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1578
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L522
.L1578:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1579
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L522
.L1579:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1580
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L522
.L1580:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1581
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L522
.L1581:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1582
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L522
.L1582:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1583
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L522
.L1583:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1584
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L522
.L1584:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1585
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L522
.L1585:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1586
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L522
.L1586:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -28[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jne	.L10
.L522:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -116[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1603
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L555
.L1603:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1604
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L555
.L1604:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1605
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L555
.L1605:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1606
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L555
.L1606:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1607
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L555
.L1607:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1608
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L555
.L1608:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1609
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L555
.L1609:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1610
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L555
.L1610:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1611
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L555
.L1611:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1612
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L555
.L1612:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1613
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L555
.L1613:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1614
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L555
.L1614:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1615
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L555
.L1615:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1616
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L555
.L1616:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1617
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L555
.L1617:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -116[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L555:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -64[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1634
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L588
.L1634:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1635
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L588
.L1635:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1636
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L588
.L1636:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1637
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L588
.L1637:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1638
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L588
.L1638:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1639
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L588
.L1639:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1640
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L588
.L1640:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1641
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L588
.L1641:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1642
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L588
.L1642:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1643
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L588
.L1643:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1644
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L588
.L1644:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1645
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L588
.L1645:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1646
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L588
.L1646:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1647
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L588
.L1647:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1648
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L588
.L1648:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -64[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jne	.L10
.L588:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -24[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1665
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L621
.L1665:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1666
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L621
.L1666:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1667
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L621
.L1667:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1668
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L621
.L1668:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1669
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L621
.L1669:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1670
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L621
.L1670:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1671
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L621
.L1671:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1672
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L621
.L1672:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1673
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L621
.L1673:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1674
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L621
.L1674:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1675
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L621
.L1675:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1676
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L621
.L1676:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1677
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L621
.L1677:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1678
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L621
.L1678:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1679
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L621
.L1679:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -24[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jne	.L10
.L621:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -20[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1696
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L654
.L1696:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1697
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L654
.L1697:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1698
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L654
.L1698:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1699
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L654
.L1699:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1700
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L654
.L1700:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1701
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L654
.L1701:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1702
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L654
.L1702:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1703
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L654
.L1703:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1704
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L654
.L1704:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1705
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L654
.L1705:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1706
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L654
.L1706:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1707
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L654
.L1707:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1708
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L654
.L1708:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1709
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L654
.L1709:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1710
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L654
.L1710:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -20[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jne	.L10
.L654:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -16[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1727
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L687
.L1727:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1728
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L687
.L1728:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1729
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L687
.L1729:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1730
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L687
.L1730:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1731
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L687
.L1731:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1732
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L687
.L1732:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1733
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L687
.L1733:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1734
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L687
.L1734:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1735
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L687
.L1735:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1736
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L687
.L1736:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1737
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L687
.L1737:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1738
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L687
.L1738:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1739
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L687
.L1739:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1740
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L687
.L1740:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1741
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L687
.L1741:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -16[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jne	.L10
.L687:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -96[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1758
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L720
.L1758:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1759
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L720
.L1759:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1760
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L720
.L1760:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1761
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L720
.L1761:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1762
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L720
.L1762:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1763
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L720
.L1763:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1764
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L720
.L1764:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1765
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L720
.L1765:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1766
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L720
.L1766:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1767
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L720
.L1767:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1768
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L720
.L1768:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1769
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L720
.L1769:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1770
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L720
.L1770:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1771
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L720
.L1771:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1772
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L720
.L1772:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -96[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jne	.L10
.L720:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -100[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1789
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L753
.L1789:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1790
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L753
.L1790:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1791
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L753
.L1791:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1792
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L753
.L1792:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1793
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L753
.L1793:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1794
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L753
.L1794:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1795
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L753
.L1795:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1796
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L753
.L1796:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1797
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L753
.L1797:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1798
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L753
.L1798:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1799
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L753
.L1799:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1800
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L753
.L1800:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1801
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L753
.L1801:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1802
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L753
.L1802:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1803
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L753
.L1803:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -100[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jne	.L10
.L753:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1820
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L786
.L1820:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1821
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L786
.L1821:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1822
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L786
.L1822:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1823
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L786
.L1823:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1824
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L786
.L1824:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1825
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L786
.L1825:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1826
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L786
.L1826:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1827
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L786
.L1827:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1828
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L786
.L1828:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1829
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L786
.L1829:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1830
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L786
.L1830:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1831
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L786
.L1831:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1832
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L786
.L1832:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1833
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L786
.L1833:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1834
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L786
.L1834:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -56[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jne	.L10
.L786:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -120[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1851
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L819
.L1851:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1852
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L819
.L1852:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1853
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L819
.L1853:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1854
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L819
.L1854:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1855
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L819
.L1855:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1856
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L819
.L1856:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1857
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L819
.L1857:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1858
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L819
.L1858:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1859
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L819
.L1859:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1860
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L819
.L1860:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L1861
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L819
.L1861:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1862
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L819
.L1862:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1863
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L819
.L1863:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1864
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L819
.L1864:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1865
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L819
.L1865:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -120[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jne	.L10
.L819:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -12[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1882
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L852
.L1882:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1883
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L852
.L1883:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1884
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L852
.L1884:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1885
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L852
.L1885:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1886
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L852
.L1886:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1887
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L852
.L1887:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1888
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L852
.L1888:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1889
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L852
.L1889:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1890
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L852
.L1890:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1891
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L852
.L1891:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1892
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L852
.L1892:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1893
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L852
.L1893:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1894
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L852
.L1894:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1895
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L852
.L1895:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1896
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L852
.L1896:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -12[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jne	.L10
.L852:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC5[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -8[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1913
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L885
.L1913:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1914
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L885
.L1914:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1915
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L885
.L1915:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -252[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1916
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L885
.L1916:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1917
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L885
.L1917:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1918
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L885
.L1918:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1919
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L885
.L1919:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1920
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L885
.L1920:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1921
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L885
.L1921:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L1922
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L885
.L1922:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1923
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L885
.L1923:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	jp	.L1924
	ucomisd	xmm0, QWORD PTR .LC5[rip]
	je	.L885
.L1924:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1925
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L885
.L1925:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1926
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L885
.L1926:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L1927
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L885
.L1927:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jne	.L10
.L885:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -44[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1944
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L918
.L1944:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1945
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L918
.L1945:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1946
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L918
.L1946:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1947
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L918
.L1947:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L1948
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L918
.L1948:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L1949
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L918
.L1949:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1950
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L918
.L1950:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1951
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L918
.L1951:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1952
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L918
.L1952:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L1953
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L918
.L1953:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -212[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1954
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L918
.L1954:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L1955
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L918
.L1955:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L1956
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L918
.L1956:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L1957
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L918
.L1957:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -232[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1958
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L918
.L1958:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -44[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jne	.L10
.L918:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC2[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L1975
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L951
.L1975:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1976
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L951
.L1976:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L1977
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L951
.L1977:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L1978
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L951
.L1978:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	jp	.L1979
	ucomisd	xmm0, QWORD PTR .LC2[rip]
	je	.L951
.L1979:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1980
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L951
.L1980:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1981
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L951
.L1981:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1982
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L951
.L1982:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1983
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L951
.L1983:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L1984
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L951
.L1984:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L1985
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L951
.L1985:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L1986
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L951
.L1986:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L1987
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L951
.L1987:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L1988
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L951
.L1988:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L1989
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L951
.L1989:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -4[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jne	.L10
.L951:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC18[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -128[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -228[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L2006
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L984
.L2006:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	jp	.L2007
	ucomisd	xmm0, QWORD PTR .LC10[rip]
	je	.L984
.L2007:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2008
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L984
.L2008:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2009
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L984
.L2009:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -248[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2010
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L984
.L2010:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2011
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L984
.L2011:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L2012
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	je	.L984
.L2012:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -268[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2013
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L984
.L2013:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2014
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L984
.L2014:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -276[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2015
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L984
.L2015:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	jp	.L2016
	ucomisd	xmm0, QWORD PTR .LC18[rip]
	je	.L984
.L2016:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -296[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2017
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L984
.L2017:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2018
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L984
.L2018:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2019
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L984
.L2019:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2020
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L984
.L2020:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jne	.L10
.L984:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC0[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC12[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC4[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -32[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC20[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -184[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	jp	.L2037
	ucomisd	xmm0, QWORD PTR .LC0[rip]
	je	.L1017
.L2037:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -280[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	jp	.L2038
	ucomisd	xmm0, QWORD PTR .LC12[rip]
	je	.L1017
.L2038:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2039
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1017
.L2039:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -196[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2040
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1017
.L2040:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	jp	.L2041
	ucomisd	xmm0, QWORD PTR .LC4[rip]
	je	.L1017
.L2041:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2042
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1017
.L2042:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -208[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2043
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1017
.L2043:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2044
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1017
.L2044:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -216[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2045
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1017
.L2045:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2046
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1017
.L2046:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2047
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1017
.L2047:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2048
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1017
.L2048:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -240[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2049
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1017
.L2049:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2050
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1017
.L2050:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -244[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2051
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1017
.L2051:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -256[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -32[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC20[rip]
	jne	.L10
.L1017:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC16[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC7[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC17[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC14[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC15[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC8[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC6[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC11[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC19[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, DWORD PTR -76[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC9[rip]
	comisd	xmm0, xmm1
	jb	.L10
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -156[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	jp	.L2068
	movsd	xmm1, QWORD PTR .LC16[rip]
	ucomisd	xmm0, xmm1
	je	.L1050
.L2068:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -160[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	jp	.L2069
	ucomisd	xmm0, QWORD PTR .LC7[rip]
	je	.L1050
.L2069:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -164[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	jp	.L2070
	ucomisd	xmm0, QWORD PTR .LC13[rip]
	je	.L1050
.L2070:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2071
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1050
.L2071:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -168[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2072
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1050
.L2072:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -172[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2073
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1050
.L2073:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -176[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L2074
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	je	.L1050
.L2074:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -180[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	jp	.L2075
	ucomisd	xmm0, QWORD PTR .LC17[rip]
	je	.L1050
.L2075:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -188[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	jp	.L2076
	ucomisd	xmm0, QWORD PTR .LC3[rip]
	je	.L1050
.L2076:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -192[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	jp	.L2077
	ucomisd	xmm0, QWORD PTR .LC14[rip]
	je	.L1050
.L2077:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -200[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	jp	.L2078
	ucomisd	xmm0, QWORD PTR .LC15[rip]
	je	.L1050
.L2078:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -204[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	jp	.L2079
	ucomisd	xmm0, QWORD PTR .LC8[rip]
	je	.L1050
.L2079:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -260[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	jp	.L2080
	ucomisd	xmm0, QWORD PTR .LC6[rip]
	je	.L1050
.L2080:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -220[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	jp	.L2081
	ucomisd	xmm0, QWORD PTR .LC11[rip]
	je	.L1050
.L2081:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -224[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	jp	.L2082
	ucomisd	xmm0, QWORD PTR .LC19[rip]
	je	.L1050
.L2082:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -236[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -76[rbp]
	subsd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jp	.L10
	ucomisd	xmm0, QWORD PTR .LC9[rip]
	jne	.L10
.L1050:
	cmp	DWORD PTR -132[rbp], 0
	jne	.L1067
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -120[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC1[rip]
	jb	.L2083
.L1067:
	mov	edx, 1
	jmp	.L1070
.L2083:
	mov	edx, 0
.L1070:
	mov	eax, DWORD PTR -284[rbp]
	cmp	edx, eax
	jne	.L10
	cmp	DWORD PTR -112[rbp], 0
	jne	.L1071
	cmp	DWORD PTR -132[rbp], 0
	jne	.L1072
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -120[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC1[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1072
.L1071:
	mov	edx, 1
	jmp	.L1073
.L1072:
	mov	edx, 0
.L1073:
	mov	eax, DWORD PTR -264[rbp]
	cmp	edx, eax
	jne	.L10
	cmp	DWORD PTR -288[rbp], 0
	je	.L1074
	cmp	DWORD PTR -292[rbp], 0
	jne	.L1075
.L1074:
	cmp	DWORD PTR -288[rbp], 0
	je	.L1076
	cmp	DWORD PTR -292[rbp], 0
	jne	.L1077
.L1076:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -280[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC1[rip]
	jnb	.L1077
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -280[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC1[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1078
	cmp	DWORD PTR -284[rbp], 0
	je	.L1077
.L1078:
	cmp	DWORD PTR -288[rbp], 0
	je	.L1075
.L1077:
	mov	edx, 1
	jmp	.L1079
.L1075:
	mov	edx, 0
.L1079:
	mov	eax, DWORD PTR -136[rbp]
	cmp	edx, eax
	jne	.L10
	cmp	DWORD PTR -288[rbp], 0
	je	.L1080
	cmp	DWORD PTR -292[rbp], 0
	jne	.L1081
.L1080:
	cmp	DWORD PTR -288[rbp], 0
	je	.L1082
	cmp	DWORD PTR -292[rbp], 0
	jne	.L1083
.L1082:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -280[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC1[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L1084
	cmp	DWORD PTR -284[rbp], 0
	je	.L1083
.L1084:
	cmp	DWORD PTR -264[rbp], 0
	jne	.L1085
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -272[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -280[rbp]
	subsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC1[rip]
	jnb	.L1083
	cmp	DWORD PTR -284[rbp], 0
	jne	.L1083
.L1085:
	cmp	DWORD PTR -292[rbp], 0
	je	.L1081
.L1083:
	mov	edx, 1
	jmp	.L1086
.L1081:
	mov	edx, 0
.L1086:
	mov	eax, DWORD PTR -140[rbp]
	cmp	edx, eax
	jne	.L10
	mov	eax, 1
	jmp	.L1087
.L10:
	mov	eax, 0
.L1087:
	mov	DWORD PTR -148[rbp], eax
	movss	xmm0, DWORD PTR -144[rbp]
	movss	DWORD PTR -296[rbp], xmm0
	mov	eax, DWORD PTR -140[rbp]
	mov	DWORD PTR -292[rbp], eax
	mov	eax, DWORD PTR -136[rbp]
	mov	DWORD PTR -288[rbp], eax
	mov	eax, DWORD PTR -132[rbp]
	mov	DWORD PTR -284[rbp], eax
	movss	xmm0, DWORD PTR -128[rbp]
	movss	DWORD PTR -280[rbp], xmm0
	movss	xmm0, DWORD PTR -124[rbp]
	movss	DWORD PTR -276[rbp], xmm0
	movss	xmm0, DWORD PTR -120[rbp]
	movss	DWORD PTR -272[rbp], xmm0
	movss	xmm0, DWORD PTR -116[rbp]
	movss	DWORD PTR -268[rbp], xmm0
	mov	eax, DWORD PTR -112[rbp]
	mov	DWORD PTR -264[rbp], eax
	movss	xmm0, DWORD PTR -108[rbp]
	movss	DWORD PTR -260[rbp], xmm0
	movss	xmm0, DWORD PTR -104[rbp]
	movss	DWORD PTR -256[rbp], xmm0
	movss	xmm0, DWORD PTR -100[rbp]
	movss	DWORD PTR -252[rbp], xmm0
	movss	xmm0, DWORD PTR -96[rbp]
	movss	DWORD PTR -248[rbp], xmm0
	movss	xmm0, DWORD PTR -92[rbp]
	movss	DWORD PTR -244[rbp], xmm0
	movss	xmm0, DWORD PTR -88[rbp]
	movss	DWORD PTR -240[rbp], xmm0
	movss	xmm0, DWORD PTR -84[rbp]
	movss	DWORD PTR -236[rbp], xmm0
	movss	xmm0, DWORD PTR -80[rbp]
	movss	DWORD PTR -232[rbp], xmm0
	movss	xmm0, DWORD PTR -76[rbp]
	movss	DWORD PTR -228[rbp], xmm0
	movss	xmm0, DWORD PTR -72[rbp]
	movss	DWORD PTR -224[rbp], xmm0
	movss	xmm0, DWORD PTR -68[rbp]
	movss	DWORD PTR -220[rbp], xmm0
	movss	xmm0, DWORD PTR -64[rbp]
	movss	DWORD PTR -216[rbp], xmm0
	movss	xmm0, DWORD PTR -60[rbp]
	movss	DWORD PTR -212[rbp], xmm0
	movss	xmm0, DWORD PTR -56[rbp]
	movss	DWORD PTR -208[rbp], xmm0
	movss	xmm0, DWORD PTR -52[rbp]
	movss	DWORD PTR -204[rbp], xmm0
	movss	xmm0, DWORD PTR -48[rbp]
	movss	DWORD PTR -200[rbp], xmm0
	movss	xmm0, DWORD PTR -44[rbp]
	movss	DWORD PTR -196[rbp], xmm0
	movss	xmm0, DWORD PTR -40[rbp]
	movss	DWORD PTR -192[rbp], xmm0
	movss	xmm0, DWORD PTR -36[rbp]
	movss	DWORD PTR -188[rbp], xmm0
	movss	xmm0, DWORD PTR -32[rbp]
	movss	DWORD PTR -184[rbp], xmm0
	movss	xmm0, DWORD PTR -28[rbp]
	movss	DWORD PTR -180[rbp], xmm0
	movss	xmm0, DWORD PTR -24[rbp]
	movss	DWORD PTR -176[rbp], xmm0
	movss	xmm0, DWORD PTR -20[rbp]
	movss	DWORD PTR -172[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	movss	DWORD PTR -168[rbp], xmm0
	movss	xmm0, DWORD PTR -12[rbp]
	movss	DWORD PTR -164[rbp], xmm0
	movss	xmm0, DWORD PTR -8[rbp]
	movss	DWORD PTR -160[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	movss	DWORD PTR -156[rbp], xmm0
.L7:
	cmp	DWORD PTR -152[rbp], 0
	js	.L1088
	cmp	DWORD PTR -148[rbp], 0
	jne	.L1089
.L1088:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	-1070858240
	.align 8
.LC1:
	.long	0
	.long	1076887552
	.align 8
.LC2:
	.long	0
	.long	-1071513600
	.align 8
.LC3:
	.long	0
	.long	-1070530560
	.align 8
.LC4:
	.long	0
	.long	-1071251456
	.align 8
.LC5:
	.long	0
	.long	-1070465024
	.align 8
.LC6:
	.long	0
	.long	-1071120384
	.align 8
.LC7:
	.long	0
	.long	-1073741824
	.align 8
.LC8:
	.long	0
	.long	-1072693248
	.align 8
.LC9:
	.long	0
	.long	-1073217536
	.align 8
.LC10:
	.long	0
	.long	-1070989312
	.align 8
.LC11:
	.long	0
	.long	-1071906816
	.align 8
.LC12:
	.long	0
	.long	-1070333952
	.align 8
.LC13:
	.long	0
	.long	-1070399488
	.align 8
.LC14:
	.long	0
	.long	-1071382528
	.align 8
.LC15:
	.long	0
	.long	-1070596096
	.align 8
.LC16:
	.long	0
	.long	-1074790400
	.align 8
.LC17:
	.long	0
	.long	-1072431104
	.align 8
.LC18:
	.long	0
	.long	-1070727168
	.align 8
.LC19:
	.long	0
	.long	-1071644672
	.align 8
.LC20:
	.long	0
	.long	-1072168960
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"585202.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dcmple
	.global	__aeabi_dcmpge
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 296
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #296
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-164]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-308]	@ float
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-304]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-300]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-296]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-292]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-288]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-284]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-280]	@ float
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-276]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-272]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-268]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-264]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-260]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-256]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-252]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-248]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-244]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-240]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-236]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-232]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-228]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-224]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-220]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-216]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-212]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-208]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-204]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-200]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-196]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-192]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-188]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-184]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-180]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-176]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-172]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-168]	@ float
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L4
	ldr	r3, [fp, #-276]
	cmp	r3, #0
	bne	.L5
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L4
	ldr	r3, [fp, #-296]
	cmp	r3, #0
	beq	.L5
.L4:
	ldr	r3, [fp, #-300]
	cmp	r3, #0
	bne	.L5
	ldr	r3, [fp, #-304]
	cmp	r3, #0
	bne	.L5
	mov	r3, #1
	b	.L6
.L5:
	mov	r3, #0
.L6:
	str	r3, [fp, #-160]
	b	.L7
.L612:
	ldr	r3, [fp, #-300]
	cmp	r3, #0
	beq	.L8
	ldr	r3, [fp, #-304]
	cmp	r3, #0
	beq	.L8
	bl	__VERIFIER_nondet_int
	str	r0, [fp, #-164]
	b	.L9
.L1128:
	.align	2
.L1127:
	.word	1076887552
	.word	-1071251456
	.word	-1071120384
	.word	-1071513600
	.word	-1072693248
	.word	-1073217536
	.word	-1071906816
	.word	-1070465024
	.word	-1070989312
	.word	-1071382528
	.word	-1070530560
	.word	-1070333952
	.word	-1070858240
	.word	-1070399488
.L8:
	ldr	r3, [fp, #-164]
	sub	r3, r3, #1
	str	r3, [fp, #-164]
.L9:
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-156]	@ float
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-152]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-148]
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-144]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-140]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-136]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-132]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-128]	@ float
	bl	__VERIFIER_nondet_bool
	str	r0, [fp, #-124]
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-120]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-116]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-112]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-108]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-104]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-100]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-96]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-92]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-88]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-84]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-80]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-76]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-72]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-68]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-64]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-60]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-56]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-52]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-48]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-44]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-40]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-36]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-32]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-28]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-24]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-20]	@ float
	bl	__VERIFIER_nondet_float
	str	r0, [fp, #-16]	@ float
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L27
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-104]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L27:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1127+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L45
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-84]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L45:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	b	.L1130
.L1131:
	.align	2
.L1129:
	.word	-1070596096
	.word	-1070333952
	.word	-1071382528
	.word	-1072431104
	.word	-1070727168
	.word	-1071120384
	.word	-1070858240
	.word	-1072693248
	.word	-1070530560
	.word	-1074790400
	.word	-1071906816
	.word	-1071251456
	.word	-1070465024
	.word	-1071644672
	.word	-1070399488
	.word	-1071513600
	.word	-1073217536
	.word	-1070989312
.L1130:
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L63
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L63:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L81:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1129+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L99:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	b	.L1133
.L1134:
	.align	2
.L1132:
	.word	-1070530560
	.word	-1071644672
	.word	-1070465024
	.word	-1070989312
	.word	-1071120384
	.word	-1070596096
	.word	-1070727168
	.word	-1071906816
	.word	-1073217536
	.word	-1070530560
	.word	-1074790400
	.word	-1072693248
	.word	-1070333952
	.word	-1072431104
	.word	-1071513600
	.word	-1071382528
	.word	-1071251456
	.word	-1070399488
	.word	-1072168960
.L1133:
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-80]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L117:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L135
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-100]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L135:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1132+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L153
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-156]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L153:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L171
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1136
.L1137:
	.align	2
.L1135:
	.word	-1070596096
	.word	-1071513600
	.word	-1074790400
	.word	-1070333952
	.word	-1071382528
	.word	-1071251456
	.word	-1070727168
	.word	-1070465024
	.word	-1072431104
	.word	-1072693248
	.word	-1070989312
	.word	-1070596096
	.word	-1072168960
	.word	-1071120384
	.word	-1070399488
	.word	-1073217536
	.word	-1071644672
	.word	-1071906816
	.word	-1070530560
	.word	-1070858240
.L1136:
.L171:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-64]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L189:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1135+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-60]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L207:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-72]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L225:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1139
.L1140:
	.align	2
.L1138:
	.word	-1070465024
	.word	-1073217536
	.word	-1071120384
	.word	-1070399488
	.word	-1070333952
	.word	-1071906816
	.word	-1072693248
	.word	-1071382528
	.word	-1070596096
	.word	-1070989312
	.word	-1070727168
	.word	-1074790400
	.word	-1071644672
	.word	-1071513600
	.word	-1072168960
	.word	-1072431104
	.word	-1071251456
	.word	-1070530560
	.word	-1070858240
.L1139:
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L243
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-136]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L243:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1138+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-52]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L261:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L279
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-48]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L279:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1142
.L1143:
	.align	2
.L1141:
	.word	-1071251456
	.word	-1074790400
	.word	-1070465024
	.word	-1070858240
	.word	-1071906816
	.word	-1070727168
	.word	-1071251456
	.word	-1070530560
	.word	-1070989312
	.word	-1070333952
	.word	-1070596096
	.word	-1071644672
	.word	-1072431104
	.word	-1072168960
	.word	-1070399488
	.word	-1071120384
	.word	-1071513600
.L1142:
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L297
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L297:
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1141+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L315:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L333
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-76]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L333:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1145
.L1146:
	.align	2
.L1144:
	.word	-1070727168
	.word	-1070333952
	.word	-1070530560
	.word	-1070596096
	.word	-1070465024
	.word	-1074790400
	.word	-1071644672
	.word	-1070989312
	.word	-1071251456
	.word	-1072693248
	.word	-1072168960
	.word	-1070858240
	.word	-1071382528
	.word	-1070399488
	.word	-1071120384
	.word	-1072431104
	.word	-1071513600
	.word	-1070727168
.L1145:
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L351
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-36]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L351:
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1144+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L369
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L369:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L387
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-28]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L387:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1148
.L1149:
	.align	2
.L1147:
	.word	-1071513600
	.word	-1072168960
	.word	-1070858240
	.word	-1070399488
	.word	-1070727168
	.word	-1071382528
	.word	-1072693248
	.word	-1074790400
	.word	-1071120384
	.word	-1070596096
	.word	-1072431104
	.word	-1070530560
	.word	-1071513600
	.word	-1070989312
	.word	-1070465024
	.word	-1073217536
	.word	-1071906816
	.word	-1071251456
	.word	-1071644672
	.word	-1070333952
.L1148:
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L405
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L405:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+76
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1147+76
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L423
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L423:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L441
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-68]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L441:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1151
.L1152:
	.align	2
.L1150:
	.word	-1071251456
	.word	-1070727168
	.word	-1074790400
	.word	-1070858240
	.word	-1070530560
	.word	-1072168960
	.word	-1071120384
	.word	-1071644672
	.word	-1070465024
	.word	-1071906816
	.word	-1070989312
	.word	-1070333952
	.word	-1073217536
	.word	-1071513600
	.word	-1072693248
	.word	-1071251456
	.word	-1072431104
	.word	-1070596096
	.word	-1070399488
.L1151:
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L459
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L459:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1150+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L477
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-24]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L477:
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-264]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L495
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-20]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L495:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1154
.L1155:
	.align	2
.L1153:
	.word	-1070596096
	.word	-1070465024
	.word	-1072431104
	.word	-1070989312
	.word	-1071382528
	.word	-1074790400
	.word	-1072693248
	.word	-1071906816
	.word	-1070399488
	.word	-1071120384
	.word	-1070596096
	.word	-1071251456
	.word	-1070530560
	.word	-1070727168
	.word	-1070333952
	.word	-1070858240
	.word	-1073217536
	.word	-1071513600
	.word	-1071644672
.L1154:
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-224]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-244]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L513
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L513:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+72
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1153+72
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L531
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L531:
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+4
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+8
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-240]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-260]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-280]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-288]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-308]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+44
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L549
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L549:
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+12
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+16
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+20
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	b	.L1157
.L1158:
	.align	2
.L1156:
	.word	-1071644672
	.word	-1070989312
	.word	-1070727168
	.word	-1070858240
	.word	-1070333952
	.word	-1071251456
	.word	-1072168960
	.word	-1072431104
	.word	-1070530560
	.word	-1071382528
	.word	-1070596096
	.word	-1072693248
	.word	-1071644672
	.word	-1074790400
	.word	-1070399488
	.word	-1071906816
	.word	-1071120384
	.word	-1073217536
.L1157:
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-196]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-208]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-220]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-228]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-252]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-256]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+36
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r0, [fp, #-268]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-44]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L567:
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+52
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+56
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+28
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+32
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+36
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+40
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+44
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+48
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+68
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
	ldr	r0, [fp, #-168]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+52
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-172]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-176]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-180]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+60
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-184]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-188]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1156+68
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-192]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-200]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+4
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-204]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+8
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-212]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+12
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-216]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+16
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-272]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+20
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-232]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+24
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-236]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+28
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r0, [fp, #-248]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-88]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L10
.L585:
	ldr	r3, [fp, #-144]
	cmp	r3, #0
	bne	.L587
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+36
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1126
.L587:
	mov	r2, #1
	b	.L590
.L1126:
	mov	r2, #0
.L590:
	ldr	r3, [fp, #-296]
	cmp	r2, r3
	bne	.L10
	ldr	r3, [fp, #-124]
	cmp	r3, #0
	bne	.L591
	ldr	r3, [fp, #-144]
	cmp	r3, #0
	bne	.L592
	ldr	r0, [fp, #-132]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-140]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L1159+36
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L593
	mov	r3, #0
	mov	r4, r3
.L593:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L592
.L591:
	mov	r2, #1
	b	.L594
.L592:
	mov	r2, #0
.L594:
	ldr	r3, [fp, #-276]
	cmp	r2, r3
	bne	.L10
	ldr	r3, [fp, #-300]
	cmp	r3, #0
	beq	.L595
	ldr	r3, [fp, #-304]
	cmp	r3, #0
	bne	.L596
.L595:
	ldr	r3, [fp, #-300]
	cmp	r3, #0
	beq	.L597
	ldr	r3, [fp, #-304]
	cmp	r3, #0
	bne	.L598
.L597:
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+36
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L598
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L1159+36
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L599
	mov	r3, #0
	mov	r4, r3
.L599:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L600
	ldr	r3, [fp, #-296]
	cmp	r3, #0
	beq	.L598
.L600:
	ldr	r3, [fp, #-300]
	cmp	r3, #0
	beq	.L596
.L598:
	mov	r2, #1
	b	.L601
.L596:
	mov	r2, #0
.L601:
	ldr	r3, [fp, #-148]
	cmp	r2, r3
	bne	.L10
	ldr	r3, [fp, #-300]
	cmp	r3, #0
	beq	.L602
	ldr	r3, [fp, #-304]
	cmp	r3, #0
	bne	.L603
.L602:
	ldr	r3, [fp, #-300]
	cmp	r3, #0
	beq	.L604
	ldr	r3, [fp, #-304]
	cmp	r3, #0
	bne	.L605
.L604:
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r3, #1
	mov	r4, r3
	mov	r2, #0
	ldr	r3, .L1159+36
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L606
	mov	r3, #0
	mov	r4, r3
.L606:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L607
	ldr	r3, [fp, #-296]
	cmp	r3, #0
	beq	.L605
.L607:
	ldr	r3, [fp, #-276]
	cmp	r3, #0
	bne	.L608
	ldr	r0, [fp, #-284]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-292]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L1159+36
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L605
	ldr	r3, [fp, #-296]
	cmp	r3, #0
	bne	.L605
.L608:
	ldr	r3, [fp, #-304]
	cmp	r3, #0
	beq	.L603
.L605:
	mov	r2, #1
	b	.L609
.L603:
	mov	r2, #0
.L609:
	ldr	r3, [fp, #-152]
	cmp	r2, r3
	bne	.L10
	mov	r3, #1
	b	.L610
.L10:
	mov	r3, #0
.L610:
	str	r3, [fp, #-160]
	ldr	r3, [fp, #-156]	@ float
	str	r3, [fp, #-308]	@ float
	ldr	r3, [fp, #-152]
	str	r3, [fp, #-304]
	ldr	r3, [fp, #-148]
	str	r3, [fp, #-300]
	ldr	r3, [fp, #-144]
	str	r3, [fp, #-296]
	ldr	r3, [fp, #-140]	@ float
	str	r3, [fp, #-292]	@ float
	ldr	r3, [fp, #-136]	@ float
	str	r3, [fp, #-288]	@ float
	ldr	r3, [fp, #-132]	@ float
	str	r3, [fp, #-284]	@ float
	ldr	r3, [fp, #-128]	@ float
	str	r3, [fp, #-280]	@ float
	ldr	r3, [fp, #-124]
	str	r3, [fp, #-276]
	ldr	r3, [fp, #-120]	@ float
	str	r3, [fp, #-272]	@ float
	ldr	r3, [fp, #-116]	@ float
	str	r3, [fp, #-268]	@ float
	ldr	r3, [fp, #-112]	@ float
	str	r3, [fp, #-264]	@ float
	ldr	r3, [fp, #-108]	@ float
	str	r3, [fp, #-260]	@ float
	ldr	r3, [fp, #-104]	@ float
	str	r3, [fp, #-256]	@ float
	ldr	r3, [fp, #-100]	@ float
	str	r3, [fp, #-252]	@ float
	ldr	r3, [fp, #-96]	@ float
	str	r3, [fp, #-248]	@ float
	ldr	r3, [fp, #-92]	@ float
	str	r3, [fp, #-244]	@ float
	ldr	r3, [fp, #-88]	@ float
	str	r3, [fp, #-240]	@ float
	ldr	r3, [fp, #-84]	@ float
	str	r3, [fp, #-236]	@ float
	ldr	r3, [fp, #-80]	@ float
	str	r3, [fp, #-232]	@ float
	ldr	r3, [fp, #-76]	@ float
	str	r3, [fp, #-228]	@ float
	ldr	r3, [fp, #-72]	@ float
	str	r3, [fp, #-224]	@ float
	ldr	r3, [fp, #-68]	@ float
	str	r3, [fp, #-220]	@ float
	ldr	r3, [fp, #-64]	@ float
	str	r3, [fp, #-216]	@ float
	ldr	r3, [fp, #-60]	@ float
	str	r3, [fp, #-212]	@ float
	ldr	r3, [fp, #-56]	@ float
	str	r3, [fp, #-208]	@ float
	ldr	r3, [fp, #-52]	@ float
	str	r3, [fp, #-204]	@ float
	ldr	r3, [fp, #-48]	@ float
	str	r3, [fp, #-200]	@ float
	ldr	r3, [fp, #-44]	@ float
	str	r3, [fp, #-196]	@ float
	ldr	r3, [fp, #-40]	@ float
	str	r3, [fp, #-192]	@ float
	ldr	r3, [fp, #-36]	@ float
	str	r3, [fp, #-188]	@ float
	ldr	r3, [fp, #-32]	@ float
	str	r3, [fp, #-184]	@ float
	ldr	r3, [fp, #-28]	@ float
	str	r3, [fp, #-180]	@ float
	ldr	r3, [fp, #-24]	@ float
	str	r3, [fp, #-176]	@ float
	ldr	r3, [fp, #-20]	@ float
	str	r3, [fp, #-172]	@ float
	ldr	r3, [fp, #-16]	@ float
	str	r3, [fp, #-168]	@ float
.L7:
	ldr	r3, [fp, #-164]
	cmp	r3, #0
	blt	.L611
	ldr	r3, [fp, #-160]
	cmp	r3, #0
	bne	.L612
.L611:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L1160:
	.align	2
.L1159:
	.word	-1072431104
	.word	-1070530560
	.word	-1071382528
	.word	-1070596096
	.word	-1072693248
	.word	-1071120384
	.word	-1071906816
	.word	-1071644672
	.word	-1073217536
	.word	1076887552
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
