	.file	"715019.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	s7_z
	.bss
	.align 4
	.type	s7_z, @object
	.size	s7_z, 4
s7_z:
	.zero	4
	.globl	_x_s7_z
	.align 4
	.type	_x_s7_z, @object
	.size	_x_s7_z, 4
_x_s7_z:
	.zero	4
	.globl	s7_y
	.align 4
	.type	s7_y, @object
	.size	s7_y, 4
s7_y:
	.zero	4
	.globl	_x_s7_y
	.align 4
	.type	_x_s7_y, @object
	.size	_x_s7_y, 4
_x_s7_y:
	.zero	4
	.globl	s7_x
	.align 4
	.type	s7_x, @object
	.size	s7_x, 4
s7_x:
	.zero	4
	.globl	_x_s7_x
	.align 4
	.type	_x_s7_x, @object
	.size	_x_s7_x, 4
_x_s7_x:
	.zero	4
	.globl	s2_evt0
	.type	s2_evt0, @object
	.size	s2_evt0, 1
s2_evt0:
	.zero	1
	.globl	_x_s2_evt0
	.type	_x_s2_evt0, @object
	.size	_x_s2_evt0, 1
_x_s2_evt0:
	.zero	1
	.globl	r_event0
	.type	r_event0, @object
	.size	r_event0, 1
r_event0:
	.zero	1
	.globl	_x_r_event0
	.type	_x_r_event0, @object
	.size	_x_r_event0, 1
_x_r_event0:
	.zero	1
	.globl	s5_y
	.align 4
	.type	s5_y, @object
	.size	s5_y, 4
s5_y:
	.zero	4
	.globl	_x_s5_y
	.align 4
	.type	_x_s5_y, @object
	.size	_x_s5_y, 4
_x_s5_y:
	.zero	4
	.globl	s1_l2
	.type	s1_l2, @object
	.size	s1_l2, 1
s1_l2:
	.zero	1
	.globl	_x_s1_l2
	.type	_x_s1_l2, @object
	.size	_x_s1_l2, 1
_x_s1_l2:
	.zero	1
	.globl	s7_evt1
	.type	s7_evt1, @object
	.size	s7_evt1, 1
s7_evt1:
	.zero	1
	.globl	_x_s7_evt1
	.type	_x_s7_evt1, @object
	.size	_x_s7_evt1, 1
_x_s7_evt1:
	.zero	1
	.globl	s4_l1
	.type	s4_l1, @object
	.size	s4_l1, 1
s4_l1:
	.zero	1
	.globl	_x_s4_l1
	.type	_x_s4_l1, @object
	.size	_x_s4_l1, 1
_x_s4_l1:
	.zero	1
	.globl	s7_evt0
	.type	s7_evt0, @object
	.size	s7_evt0, 1
s7_evt0:
	.zero	1
	.globl	_x_s7_evt0
	.type	_x_s7_evt0, @object
	.size	_x_s7_evt0, 1
_x_s7_evt0:
	.zero	1
	.globl	s4_l0
	.type	s4_l0, @object
	.size	s4_l0, 1
s4_l0:
	.zero	1
	.globl	_x_s4_l0
	.type	_x_s4_l0, @object
	.size	_x_s4_l0, 1
_x_s4_l0:
	.zero	1
	.globl	_diverge_delta
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	s2_evt1
	.type	s2_evt1, @object
	.size	s2_evt1, 1
s2_evt1:
	.zero	1
	.globl	_x_s2_evt1
	.type	_x_s2_evt1, @object
	.size	_x_s2_evt1, 1
_x_s2_evt1:
	.zero	1
	.globl	s2_l0
	.type	s2_l0, @object
	.size	s2_l0, 1
s2_l0:
	.zero	1
	.globl	_x_s2_l0
	.type	_x_s2_l0, @object
	.size	_x_s2_l0, 1
_x_s2_l0:
	.zero	1
	.globl	s5_evt0
	.type	s5_evt0, @object
	.size	s5_evt0, 1
s5_evt0:
	.zero	1
	.globl	_x_s5_evt0
	.type	_x_s5_evt0, @object
	.size	_x_s5_evt0, 1
_x_s5_evt0:
	.zero	1
	.globl	s6_z
	.align 4
	.type	s6_z, @object
	.size	s6_z, 4
s6_z:
	.zero	4
	.globl	_x_s6_z
	.align 4
	.type	_x_s6_z, @object
	.size	_x_s6_z, 4
_x_s6_z:
	.zero	4
	.globl	s1_evt0
	.type	s1_evt0, @object
	.size	s1_evt0, 1
s1_evt0:
	.zero	1
	.globl	_x_s1_evt0
	.type	_x_s1_evt0, @object
	.size	_x_s1_evt0, 1
_x_s1_evt0:
	.zero	1
	.globl	s7_l2
	.type	s7_l2, @object
	.size	s7_l2, 1
s7_l2:
	.zero	1
	.globl	_x_s7_l2
	.type	_x_s7_l2, @object
	.size	_x_s7_l2, 1
_x_s7_l2:
	.zero	1
	.globl	s1_z
	.align 4
	.type	s1_z, @object
	.size	s1_z, 4
s1_z:
	.zero	4
	.globl	_x_s1_z
	.align 4
	.type	_x_s1_z, @object
	.size	_x_s1_z, 4
_x_s1_z:
	.zero	4
	.globl	s4_y
	.align 4
	.type	s4_y, @object
	.size	s4_y, 4
s4_y:
	.zero	4
	.globl	_x_s4_y
	.align 4
	.type	_x_s4_y, @object
	.size	_x_s4_y, 4
_x_s4_y:
	.zero	4
	.globl	s7_l1
	.type	s7_l1, @object
	.size	s7_l1, 1
s7_l1:
	.zero	1
	.globl	_x_s7_l1
	.type	_x_s7_l1, @object
	.size	_x_s7_l1, 1
_x_s7_l1:
	.zero	1
	.globl	s1_y
	.align 4
	.type	s1_y, @object
	.size	s1_y, 4
s1_y:
	.zero	4
	.globl	_x_s1_y
	.align 4
	.type	_x_s1_y, @object
	.size	_x_s1_y, 4
_x_s1_y:
	.zero	4
	.globl	s4_x
	.align 4
	.type	s4_x, @object
	.size	s4_x, 4
s4_x:
	.zero	4
	.globl	_x_s4_x
	.align 4
	.type	_x_s4_x, @object
	.size	_x_s4_x, 4
_x_s4_x:
	.zero	4
	.globl	s7_l0
	.type	s7_l0, @object
	.size	s7_l0, 1
s7_l0:
	.zero	1
	.globl	_x_s7_l0
	.type	_x_s7_l0, @object
	.size	_x_s7_l0, 1
_x_s7_l0:
	.zero	1
	.globl	s1_x
	.align 4
	.type	s1_x, @object
	.size	s1_x, 4
s1_x:
	.zero	4
	.globl	_x_s1_x
	.align 4
	.type	_x_s1_x, @object
	.size	_x_s1_x, 4
_x_s1_x:
	.zero	4
	.globl	s2_y
	.align 4
	.type	s2_y, @object
	.size	s2_y, 4
s2_y:
	.zero	4
	.globl	_x_s2_y
	.align 4
	.type	_x_s2_y, @object
	.size	_x_s2_y, 4
_x_s2_y:
	.zero	4
	.globl	s5_x
	.align 4
	.type	s5_x, @object
	.size	s5_x, 4
s5_x:
	.zero	4
	.globl	_x_s5_x
	.align 4
	.type	_x_s5_x, @object
	.size	_x_s5_x, 4
_x_s5_x:
	.zero	4
	.globl	s0_l2
	.type	s0_l2, @object
	.size	s0_l2, 1
s0_l2:
	.zero	1
	.globl	_x_s0_l2
	.type	_x_s0_l2, @object
	.size	_x_s0_l2, 1
_x_s0_l2:
	.zero	1
	.globl	s6_evt1
	.type	s6_evt1, @object
	.size	s6_evt1, 1
s6_evt1:
	.zero	1
	.globl	_x_s6_evt1
	.type	_x_s6_evt1, @object
	.size	_x_s6_evt1, 1
_x_s6_evt1:
	.zero	1
	.globl	s3_l1
	.type	s3_l1, @object
	.size	s3_l1, 1
s3_l1:
	.zero	1
	.globl	_x_s3_l1
	.type	_x_s3_l1, @object
	.size	_x_s3_l1, 1
_x_s3_l1:
	.zero	1
	.globl	s2_x
	.align 4
	.type	s2_x, @object
	.size	s2_x, 4
s2_x:
	.zero	4
	.globl	_x_s2_x
	.align 4
	.type	_x_s2_x, @object
	.size	_x_s2_x, 4
_x_s2_x:
	.zero	4
	.globl	r_evt_id
	.align 4
	.type	r_evt_id, @object
	.size	r_evt_id, 4
r_evt_id:
	.zero	4
	.globl	_x_r_evt_id
	.align 4
	.type	_x_r_evt_id, @object
	.size	_x_r_evt_id, 4
_x_r_evt_id:
	.zero	4
	.globl	s6_l0
	.type	s6_l0, @object
	.size	s6_l0, 1
s6_l0:
	.zero	1
	.globl	_x_s6_l0
	.type	_x_s6_l0, @object
	.size	_x_s6_l0, 1
_x_s6_l0:
	.zero	1
	.globl	s0_x
	.align 4
	.type	s0_x, @object
	.size	s0_x, 4
s0_x:
	.zero	4
	.globl	_x_s0_x
	.align 4
	.type	_x_s0_x, @object
	.size	_x_s0_x, 4
_x_s0_x:
	.zero	4
	.globl	s6_l1
	.type	s6_l1, @object
	.size	s6_l1, 1
s6_l1:
	.zero	1
	.globl	_x_s6_l1
	.type	_x_s6_l1, @object
	.size	_x_s6_l1, 1
_x_s6_l1:
	.zero	1
	.globl	s0_y
	.align 4
	.type	s0_y, @object
	.size	s0_y, 4
s0_y:
	.zero	4
	.globl	_x_s0_y
	.align 4
	.type	_x_s0_y, @object
	.size	_x_s0_y, 4
_x_s0_y:
	.zero	4
	.globl	s3_x
	.align 4
	.type	s3_x, @object
	.size	s3_x, 4
s3_x:
	.zero	4
	.globl	_x_s3_x
	.align 4
	.type	_x_s3_x, @object
	.size	_x_s3_x, 4
_x_s3_x:
	.zero	4
	.globl	s2_z
	.align 4
	.type	s2_z, @object
	.size	s2_z, 4
s2_z:
	.zero	4
	.globl	_x_s2_z
	.align 4
	.type	_x_s2_z, @object
	.size	_x_s2_z, 4
_x_s2_z:
	.zero	4
	.globl	r_l
	.type	r_l, @object
	.size	r_l, 1
r_l:
	.zero	1
	.globl	_x_r_l
	.type	_x_r_l, @object
	.size	_x_r_l, 1
_x_r_l:
	.zero	1
	.globl	s6_l2
	.type	s6_l2, @object
	.size	s6_l2, 1
s6_l2:
	.zero	1
	.globl	_x_s6_l2
	.type	_x_s6_l2, @object
	.size	_x_s6_l2, 1
_x_s6_l2:
	.zero	1
	.globl	s0_z
	.align 4
	.type	s0_z, @object
	.size	s0_z, 4
s0_z:
	.zero	4
	.globl	_x_s0_z
	.align 4
	.type	_x_s0_z, @object
	.size	_x_s0_z, 4
_x_s0_z:
	.zero	4
	.globl	s3_y
	.align 4
	.type	s3_y, @object
	.size	s3_y, 4
s3_y:
	.zero	4
	.globl	_x_s3_y
	.align 4
	.type	_x_s3_y, @object
	.size	_x_s3_y, 4
_x_s3_y:
	.zero	4
	.globl	s6_x
	.align 4
	.type	s6_x, @object
	.size	s6_x, 4
s6_x:
	.zero	4
	.globl	_x_s6_x
	.align 4
	.type	_x_s6_x, @object
	.size	_x_s6_x, 4
_x_s6_x:
	.zero	4
	.globl	r_counter
	.align 4
	.type	r_counter, @object
	.size	r_counter, 4
r_counter:
	.zero	4
	.globl	_x_r_counter
	.align 4
	.type	_x_r_counter, @object
	.size	_x_r_counter, 4
_x_r_counter:
	.zero	4
	.globl	s0_evt0
	.type	s0_evt0, @object
	.size	s0_evt0, 1
s0_evt0:
	.zero	1
	.globl	_x_s0_evt0
	.type	_x_s0_evt0, @object
	.size	_x_s0_evt0, 1
_x_s0_evt0:
	.zero	1
	.globl	r_event1
	.type	r_event1, @object
	.size	r_event1, 1
r_event1:
	.zero	1
	.globl	_x_r_event1
	.type	_x_r_event1, @object
	.size	_x_r_event1, 1
_x_r_event1:
	.zero	1
	.globl	s5_z
	.align 4
	.type	s5_z, @object
	.size	s5_z, 4
s5_z:
	.zero	4
	.globl	_x_s5_z
	.align 4
	.type	_x_s5_z, @object
	.size	_x_s5_z, 4
_x_s5_z:
	.zero	4
	.globl	r_x
	.align 4
	.type	r_x, @object
	.size	r_x, 4
r_x:
	.zero	4
	.globl	_x_r_x
	.align 4
	.type	_x_r_x, @object
	.size	_x_r_x, 4
_x_r_x:
	.zero	4
	.globl	s0_evt1
	.type	s0_evt1, @object
	.size	s0_evt1, 1
s0_evt1:
	.zero	1
	.globl	_x_s0_evt1
	.type	_x_s0_evt1, @object
	.size	_x_s0_evt1, 1
_x_s0_evt1:
	.zero	1
	.globl	s0_l0
	.type	s0_l0, @object
	.size	s0_l0, 1
s0_l0:
	.zero	1
	.globl	_x_s0_l0
	.type	_x_s0_l0, @object
	.size	_x_s0_l0, 1
_x_s0_l0:
	.zero	1
	.globl	s3_evt0
	.type	s3_evt0, @object
	.size	s3_evt0, 1
s3_evt0:
	.zero	1
	.globl	_x_s3_evt0
	.type	_x_s3_evt0, @object
	.size	_x_s3_evt0, 1
_x_s3_evt0:
	.zero	1
	.globl	s1_evt1
	.type	s1_evt1, @object
	.size	s1_evt1, 1
s1_evt1:
	.zero	1
	.globl	_x_s1_evt1
	.type	_x_s1_evt1, @object
	.size	_x_s1_evt1, 1
_x_s1_evt1:
	.zero	1
	.globl	s1_l0
	.type	s1_l0, @object
	.size	s1_l0, 1
s1_l0:
	.zero	1
	.globl	_x_s1_l0
	.type	_x_s1_l0, @object
	.size	_x_s1_l0, 1
_x_s1_l0:
	.zero	1
	.globl	s4_evt0
	.type	s4_evt0, @object
	.size	s4_evt0, 1
s4_evt0:
	.zero	1
	.globl	_x_s4_evt0
	.type	_x_s4_evt0, @object
	.size	_x_s4_evt0, 1
_x_s4_evt0:
	.zero	1
	.globl	s5_l0
	.type	s5_l0, @object
	.size	s5_l0, 1
s5_l0:
	.zero	1
	.globl	_x_s5_l0
	.type	_x_s5_l0, @object
	.size	_x_s5_l0, 1
_x_s5_l0:
	.zero	1
	.globl	s2_l2
	.type	s2_l2, @object
	.size	s2_l2, 1
s2_l2:
	.zero	1
	.globl	_x_s2_l2
	.type	_x_s2_l2, @object
	.size	_x_s2_l2, 1
_x_s2_l2:
	.zero	1
	.globl	s5_l1
	.type	s5_l1, @object
	.size	s5_l1, 1
s5_l1:
	.zero	1
	.globl	_x_s5_l1
	.type	_x_s5_l1, @object
	.size	_x_s5_l1, 1
_x_s5_l1:
	.zero	1
	.globl	s3_z
	.align 4
	.type	s3_z, @object
	.size	s3_z, 4
s3_z:
	.zero	4
	.globl	_x_s3_z
	.align 4
	.type	_x_s3_z, @object
	.size	_x_s3_z, 4
_x_s3_z:
	.zero	4
	.globl	s6_y
	.align 4
	.type	s6_y, @object
	.size	s6_y, 4
s6_y:
	.zero	4
	.globl	_x_s6_y
	.align 4
	.type	_x_s6_y, @object
	.size	_x_s6_y, 4
_x_s6_y:
	.zero	4
	.globl	s0_l1
	.type	s0_l1, @object
	.size	s0_l1, 1
s0_l1:
	.zero	1
	.globl	_x_s0_l1
	.type	_x_s0_l1, @object
	.size	_x_s0_l1, 1
_x_s0_l1:
	.zero	1
	.globl	s3_evt1
	.type	s3_evt1, @object
	.size	s3_evt1, 1
s3_evt1:
	.zero	1
	.globl	_x_s3_evt1
	.type	_x_s3_evt1, @object
	.size	_x_s3_evt1, 1
_x_s3_evt1:
	.zero	1
	.globl	s3_l0
	.type	s3_l0, @object
	.size	s3_l0, 1
s3_l0:
	.zero	1
	.globl	_x_s3_l0
	.type	_x_s3_l0, @object
	.size	_x_s3_l0, 1
_x_s3_l0:
	.zero	1
	.globl	s6_evt0
	.type	s6_evt0, @object
	.size	s6_evt0, 1
s6_evt0:
	.zero	1
	.globl	_x_s6_evt0
	.type	_x_s6_evt0, @object
	.size	_x_s6_evt0, 1
_x_s6_evt0:
	.zero	1
	.globl	s3_l2
	.type	s3_l2, @object
	.size	s3_l2, 1
s3_l2:
	.zero	1
	.globl	_x_s3_l2
	.type	_x_s3_l2, @object
	.size	_x_s3_l2, 1
_x_s3_l2:
	.zero	1
	.globl	s4_z
	.align 4
	.type	s4_z, @object
	.size	s4_z, 4
s4_z:
	.zero	4
	.globl	_x_s4_z
	.align 4
	.type	_x_s4_z, @object
	.size	_x_s4_z, 4
_x_s4_z:
	.zero	4
	.globl	s1_l1
	.type	s1_l1, @object
	.size	s1_l1, 1
s1_l1:
	.zero	1
	.globl	_x_s1_l1
	.type	_x_s1_l1, @object
	.size	_x_s1_l1, 1
_x_s1_l1:
	.zero	1
	.globl	s4_evt1
	.type	s4_evt1, @object
	.size	s4_evt1, 1
s4_evt1:
	.zero	1
	.globl	_x_s4_evt1
	.type	_x_s4_evt1, @object
	.size	_x_s4_evt1, 1
_x_s4_evt1:
	.zero	1
	.globl	s4_l2
	.type	s4_l2, @object
	.size	s4_l2, 1
s4_l2:
	.zero	1
	.globl	_x_s4_l2
	.type	_x_s4_l2, @object
	.size	_x_s4_l2, 1
_x_s4_l2:
	.zero	1
	.globl	s2_l1
	.type	s2_l1, @object
	.size	s2_l1, 1
s2_l1:
	.zero	1
	.globl	_x_s2_l1
	.type	_x_s2_l1, @object
	.size	_x_s2_l1, 1
_x_s2_l1:
	.zero	1
	.globl	s5_evt1
	.type	s5_evt1, @object
	.size	s5_evt1, 1
s5_evt1:
	.zero	1
	.globl	_x_s5_evt1
	.type	_x_s5_evt1, @object
	.size	_x_s5_evt1, 1
_x_s5_evt1:
	.zero	1
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	s5_l2
	.type	s5_l2, @object
	.size	s5_l2, 1
s5_l2:
	.zero	1
	.globl	_x_s5_l2
	.type	_x_s5_l2, @object
	.size	_x_s5_l2, 1
_x_s5_l2:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR r_event0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s1_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR r_evt_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s2_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR r_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s0_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR r_counter[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR r_event1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s5_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR r_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s3_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s6_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s3_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR s4_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR s5_l2[rip], al
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L5
.L4:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L6
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L5
.L6:
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L7
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L5
.L7:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L8
.L5:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L9
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L10
.L9:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L11
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L11
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L10
.L11:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L12
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L10
.L12:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L13
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L10
.L13:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L14
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L14
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L10
.L14:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L8
.L10:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s7_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s7_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L18
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L18
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L8
.L18:
	movss	xmm1, DWORD PTR s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L19
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L19
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L19
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L8
.L19:
	movss	xmm1, DWORD PTR s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L20
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L8
.L20:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L21
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L22
.L21:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L22
.L23:
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L24
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L22
.L24:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L8
.L22:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L25
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L26
.L25:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L27
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L26
.L27:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L28
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L28
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L26
.L28:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L29
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L29
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L26
.L29:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L30
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L26
.L30:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L8
.L26:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s6_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s6_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L34
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L34
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L8
.L34:
	movss	xmm1, DWORD PTR s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L35
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L35
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L35
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L8
.L35:
	movss	xmm1, DWORD PTR s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L36
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L8
.L36:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L37
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L38
.L37:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L38
.L39:
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L38
.L40:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L8
.L38:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L41
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L42
.L41:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L43
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L43
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L42
.L43:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L44
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L42
.L44:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L45
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L42
.L45:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L42
.L46:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L8
.L42:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s5_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s5_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L50
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L50
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L8
.L50:
	movss	xmm1, DWORD PTR s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L51
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L51
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L8
.L51:
	movss	xmm1, DWORD PTR s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L52
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L8
.L52:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L53
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L54
.L53:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L55
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L54
.L55:
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L56
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L54
.L56:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L8
.L54:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L58
.L57:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L59
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L59
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L58
.L59:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L60
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L58
.L60:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L61
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L58
.L61:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L62
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L62
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L58
.L62:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L8
.L58:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s4_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s4_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L66
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L8
.L66:
	movss	xmm1, DWORD PTR s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L67
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L67
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L67
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L8
.L67:
	movss	xmm1, DWORD PTR s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L68
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L8
.L68:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L69
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L70
.L69:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L71
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L70
.L71:
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L70
.L72:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L8
.L70:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L73
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L74
.L73:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L75
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L75
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L74
.L75:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L74
.L76:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L77
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L77
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L74
.L77:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L74
.L78:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L8
.L74:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s3_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s3_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L82
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L82
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L82
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L8
.L82:
	movss	xmm1, DWORD PTR s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L83
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L83
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L83
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L8
.L83:
	movss	xmm1, DWORD PTR s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L84
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L84
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L84
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L8
.L84:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L85
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L86
.L85:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L86
.L87:
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L86
.L88:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L8
.L86:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L89
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L90
.L89:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L91
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L91
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L90
.L91:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L92
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L90
.L92:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L93
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L90
.L93:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L94
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L90
.L94:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L8
.L90:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s2_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s2_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L98
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L98
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L98
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L8
.L98:
	movss	xmm1, DWORD PTR s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L99
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L99
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L8
.L99:
	movss	xmm1, DWORD PTR s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L100
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L8
.L100:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L101
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L102
.L101:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L103
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L102
.L103:
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L102
.L104:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L8
.L102:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L105
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L105
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L106
.L105:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L107
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L106
.L107:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L108
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L108
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L106
.L108:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L109
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L106
.L109:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L110
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L110
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L106
.L110:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L8
.L106:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s1_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s1_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L114
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L114
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L114
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L8
.L114:
	movss	xmm1, DWORD PTR s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L115
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L115
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L115
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L8
.L115:
	movss	xmm1, DWORD PTR s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L116
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L8
.L116:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L117
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L118
.L117:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L118
.L119:
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L120
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L118
.L120:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L8
.L118:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L122
.L121:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L123
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L122
.L123:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L124
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L122
.L124:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L125
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L125
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L122
.L125:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L126
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L126
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L122
.L126:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L8
.L122:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L8
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L8
	movss	xmm0, DWORD PTR s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s0_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm0, DWORD PTR s0_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movss	xmm1, DWORD PTR s0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L130
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L130
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L8
.L130:
	movss	xmm1, DWORD PTR s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L131
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L131
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L131
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L8
.L131:
	movss	xmm1, DWORD PTR s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L132
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L8
.L132:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	je	.L8
	mov	eax, DWORD PTR r_counter[rip]
	test	eax, eax
	jne	.L8
	movss	xmm0, DWORD PTR r_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L8
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L8
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L134
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L135
.L134:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L135
.L136:
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L8
.L135:
	mov	eax, DWORD PTR r_evt_id[rip]
	test	eax, eax
	je	.L137
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 1
	je	.L137
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 2
	je	.L137
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 3
	je	.L137
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 4
	je	.L137
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 5
	je	.L137
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 6
	je	.L137
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 7
	jne	.L8
.L137:
	mov	eax, DWORD PTR r_counter[rip]
	test	eax, eax
	je	.L138
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 1
	je	.L138
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 2
	je	.L138
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 3
	je	.L138
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 4
	je	.L138
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 5
	je	.L138
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 6
	je	.L138
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 7
	jne	.L8
.L138:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	je	.L139
	movss	xmm1, DWORD PTR r_x[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L8
.L139:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L8
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L8
	ucomiss	xmm0, xmm1
	jne	.L8
	mov	eax, 1
	jmp	.L143
.L8:
	mov	eax, 0
.L143:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L144
.L825:
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_r_event0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_evt0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s7_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s1_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_r_evt_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s2_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_r_l[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s0_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_y[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_x[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_r_counter[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_r_event1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s5_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_r_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s3_z[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s6_y[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s0_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s6_evt0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s3_l2[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_s4_z[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s1_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_evt1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s4_l2[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s2_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_evt1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_s5_l2[rip], al
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	jne	.L145
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L146
.L145:
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L146
.L147:
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L146
.L148:
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	test	al, al
	je	.L149
.L146:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L150
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L150
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L151
.L150:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L152
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L151
.L152:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L153
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L153
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L151
.L153:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L154
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L154
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L151
.L154:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L155
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L155
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L151
.L155:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L149
.L151:
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L156
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L156
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L156
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L149
.L156:
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L157
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L149
.L157:
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L158
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L149
.L158:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L159
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L159:
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L163
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L163
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L163
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L163
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L163
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s7_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s7_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L163
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L166
.L163:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L149
.L166:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L168
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L168
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L168
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L168
	movss	xmm0, DWORD PTR _x_s7_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L168
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L168
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L168
	ucomiss	xmm0, xmm1
	je	.L171
.L168:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L171
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L171
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L171
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L171
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L149
.L171:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L173
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L174
.L173:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L175
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L175
.L174:
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L175
	ucomiss	xmm0, xmm1
	jne	.L175
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L175
	ucomiss	xmm0, xmm1
	jne	.L175
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L175
	ucomiss	xmm0, xmm1
	je	.L178
.L175:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L178
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L178
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L178
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L178
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L178
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L149
.L178:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L180
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L180
	movss	xmm0, DWORD PTR s7_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L182
.L180:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L182
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L182
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L183
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L182
.L183:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L182
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L182
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L182
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L149
.L182:
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L184
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L184
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L184
	movss	xmm0, DWORD PTR s7_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L186
.L184:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L186
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L186
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L187
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L186
.L187:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L149
.L186:
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L188
	ucomiss	xmm0, xmm1
	jne	.L188
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L188
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L188
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L188
	ucomiss	xmm0, xmm1
	jne	.L188
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L188
	ucomiss	xmm0, xmm1
	je	.L191
.L188:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L191
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L191
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L191
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L191
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L149
.L191:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L193
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L193
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L193
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L193
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L193
	ucomiss	xmm0, xmm1
	jne	.L193
	movss	xmm0, DWORD PTR _x_s7_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L193
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L196
.L193:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	jne	.L196
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L196
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L196
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L196
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L196
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L149
.L196:
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L198
	ucomiss	xmm0, xmm1
	jne	.L198
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L198
	ucomiss	xmm0, xmm1
	jne	.L198
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L198
	ucomiss	xmm0, xmm1
	jne	.L198
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L202
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L202
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L203
.L202:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L198
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L198
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L203
.L198:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L203
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L203
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L203
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L203
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L149
.L203:
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L204
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L204
	movss	xmm0, DWORD PTR s7_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L206
.L204:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L206
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L206
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L207
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L206
.L207:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L206
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	je	.L206
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L149
.L206:
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L208
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L208
	movss	xmm0, DWORD PTR s7_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L208
	movss	xmm0, DWORD PTR s7_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L210
.L208:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L210
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L210
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L211
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L210
.L211:
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L210
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	jne	.L210
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	je	.L149
.L210:
	movss	xmm0, DWORD PTR s7_z[rip]
	movss	xmm1, DWORD PTR _x_s7_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L212
	ucomiss	xmm0, xmm1
	jne	.L212
	movss	xmm0, DWORD PTR s7_x[rip]
	movss	xmm1, DWORD PTR _x_s7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L212
	ucomiss	xmm0, xmm1
	jne	.L212
	movss	xmm0, DWORD PTR s7_y[rip]
	movss	xmm1, DWORD PTR _x_s7_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L212
	ucomiss	xmm0, xmm1
	jne	.L212
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L212
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	test	al, al
	jne	.L212
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	test	al, al
	je	.L216
.L212:
	movzx	eax, BYTE PTR s7_l2[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR s7_l0[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR s7_l1[rip]
	test	al, al
	jne	.L216
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L216
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L216
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L149
.L216:
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	jne	.L217
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L218
.L217:
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L218
.L219:
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L220
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L218
.L220:
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	test	al, al
	je	.L149
.L218:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L221
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L221
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L222
.L221:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L223
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L222
.L223:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L224
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L222
.L224:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L225
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L222
.L225:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L226
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L222
.L226:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L149
.L222:
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L227
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L227
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L149
.L227:
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L228
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L228
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L149
.L228:
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L229
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L149
.L229:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L230
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L230:
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L234
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L234
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L234
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L234
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L234
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s6_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s6_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L234
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L237
.L234:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L237
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L149
.L237:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L239
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L239
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L239
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L239
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L239
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L239
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L239
	movss	xmm0, DWORD PTR _x_s6_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L239
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L239
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L239
	ucomiss	xmm0, xmm1
	je	.L242
.L239:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L242
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L242
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L242
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L149
.L242:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L244
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L244
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L245
.L244:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L246
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L246
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L246
.L245:
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L246
	ucomiss	xmm0, xmm1
	jne	.L246
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L246
	ucomiss	xmm0, xmm1
	jne	.L246
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L246
	ucomiss	xmm0, xmm1
	je	.L249
.L246:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L249
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L249
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L249
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L249
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L249
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L149
.L249:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L251
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L251
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L251
	movss	xmm0, DWORD PTR s6_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L253
.L251:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L253
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L253
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L253
.L254:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L253
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L253
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L149
.L253:
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L255
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L255
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L255
	movss	xmm0, DWORD PTR s6_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L257
.L255:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L257
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L257
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L258
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L257
.L258:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L257
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L149
.L257:
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L259
	ucomiss	xmm0, xmm1
	jne	.L259
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L259
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L259
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L259
	ucomiss	xmm0, xmm1
	jne	.L259
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L259
	ucomiss	xmm0, xmm1
	je	.L262
.L259:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L262
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L262
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L262
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L262
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L262
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L149
.L262:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L264
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L264
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L264
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L264
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L264
	ucomiss	xmm0, xmm1
	jne	.L264
	movss	xmm0, DWORD PTR _x_s6_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L264
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L267
.L264:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	jne	.L267
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L267
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L267
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L267
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L267
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L149
.L267:
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L269
	ucomiss	xmm0, xmm1
	jne	.L269
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L269
	ucomiss	xmm0, xmm1
	jne	.L269
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L269
	ucomiss	xmm0, xmm1
	jne	.L269
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L273
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L274
.L273:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L274
.L269:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L274
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L274
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L274
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L274
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L274
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L149
.L274:
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L275
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L275
	movss	xmm0, DWORD PTR s6_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L277
.L275:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L277
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L277
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L277
.L278:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L277
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	je	.L277
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L149
.L277:
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L279
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L279
	movss	xmm0, DWORD PTR s6_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L279
	movss	xmm0, DWORD PTR s6_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L281
.L279:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L281
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L281
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L281
.L282:
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L281
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	jne	.L281
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	je	.L149
.L281:
	movss	xmm0, DWORD PTR s6_z[rip]
	movss	xmm1, DWORD PTR _x_s6_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L283
	ucomiss	xmm0, xmm1
	jne	.L283
	movss	xmm0, DWORD PTR s6_x[rip]
	movss	xmm1, DWORD PTR _x_s6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L283
	ucomiss	xmm0, xmm1
	jne	.L283
	movss	xmm0, DWORD PTR s6_y[rip]
	movss	xmm1, DWORD PTR _x_s6_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L283
	ucomiss	xmm0, xmm1
	jne	.L283
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L283
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	test	al, al
	jne	.L283
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	test	al, al
	je	.L287
.L283:
	movzx	eax, BYTE PTR s6_l2[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR s6_l0[rip]
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR s6_l1[rip]
	test	al, al
	jne	.L287
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L287
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L287
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L149
.L287:
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	jne	.L288
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L289
.L288:
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L290
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L289
.L290:
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L289
.L291:
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	test	al, al
	je	.L149
.L289:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L293
.L292:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L294
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L294
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L293
.L294:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L295
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L295
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L293
.L295:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L296
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L296
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L293
.L296:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L297
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L293
.L297:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L149
.L293:
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L298
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L298
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L149
.L298:
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L299
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L299
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L149
.L299:
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L300
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L300
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L300
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L149
.L300:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L301
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L301:
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L305
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L305
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L305
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L305
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L305
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s5_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s5_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L305
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L308
.L305:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L308
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L149
.L308:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L310
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L310
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L310
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L310
	movss	xmm0, DWORD PTR _x_s5_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L310
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L310
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L310
	ucomiss	xmm0, xmm1
	je	.L313
.L310:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L313
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L313
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L313
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L313
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L313
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L149
.L313:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L315
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L315
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L316
.L315:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L317
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L317
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L317
.L316:
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L317
	ucomiss	xmm0, xmm1
	jne	.L317
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L317
	ucomiss	xmm0, xmm1
	jne	.L317
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L317
	ucomiss	xmm0, xmm1
	je	.L320
.L317:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L320
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L320
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L320
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L320
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L149
.L320:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L322
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L322
	movss	xmm0, DWORD PTR s5_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L324
.L322:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L324
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L324
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L324
.L325:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L324
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L149
.L324:
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L326
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L326
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L326
	movss	xmm0, DWORD PTR s5_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L328
.L326:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L328
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L328
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L329
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L328
.L329:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L328
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L328
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L328
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L149
.L328:
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L330
	ucomiss	xmm0, xmm1
	jne	.L330
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L330
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L330
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L330
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L330
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L330
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L330
	ucomiss	xmm0, xmm1
	jne	.L330
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L330
	ucomiss	xmm0, xmm1
	je	.L333
.L330:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L333
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L333
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L333
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L333
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L149
.L333:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L335
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L335
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L335
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L335
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L335
	ucomiss	xmm0, xmm1
	jne	.L335
	movss	xmm0, DWORD PTR _x_s5_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L335
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L338
.L335:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	jne	.L338
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L338
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L338
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L338
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L338
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L149
.L338:
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L340
	ucomiss	xmm0, xmm1
	jne	.L340
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L340
	ucomiss	xmm0, xmm1
	jne	.L340
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L340
	ucomiss	xmm0, xmm1
	jne	.L340
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L344
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L345
.L344:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L345
.L340:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L345
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L345
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L345
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L345
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L149
.L345:
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L346
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L346
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L346
	movss	xmm0, DWORD PTR s5_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L348
.L346:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L348
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L348
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L349
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L348
.L349:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	je	.L348
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L149
.L348:
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L350
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L350
	movss	xmm0, DWORD PTR s5_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L350
	movss	xmm0, DWORD PTR s5_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L352
.L350:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L352
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L352
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L353
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L352
.L353:
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L352
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	jne	.L352
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	je	.L149
.L352:
	movss	xmm0, DWORD PTR s5_z[rip]
	movss	xmm1, DWORD PTR _x_s5_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L354
	ucomiss	xmm0, xmm1
	jne	.L354
	movss	xmm0, DWORD PTR s5_x[rip]
	movss	xmm1, DWORD PTR _x_s5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L354
	ucomiss	xmm0, xmm1
	jne	.L354
	movss	xmm0, DWORD PTR s5_y[rip]
	movss	xmm1, DWORD PTR _x_s5_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L354
	ucomiss	xmm0, xmm1
	jne	.L354
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L354
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	test	al, al
	je	.L358
.L354:
	movzx	eax, BYTE PTR s5_l2[rip]
	test	al, al
	je	.L358
	movzx	eax, BYTE PTR s5_l0[rip]
	test	al, al
	je	.L358
	movzx	eax, BYTE PTR s5_l1[rip]
	test	al, al
	jne	.L358
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L358
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L358
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L149
.L358:
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L360
.L359:
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L361
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L360
.L361:
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L362
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L360
.L362:
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	test	al, al
	je	.L149
.L360:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L364
.L363:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L365
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L365
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L364
.L365:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L366
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L366
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L364
.L366:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L367
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L367
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L364
.L367:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L368
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L364
.L368:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L149
.L364:
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L369
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L369
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L149
.L369:
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L370
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L370
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L149
.L370:
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L371
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L149
.L371:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L372
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L372:
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L376
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L376
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L376
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L376
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L376
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L376
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s4_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s4_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L376
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L379
.L376:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L379
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L149
.L379:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L381
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L381
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L381
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L381
	movss	xmm0, DWORD PTR _x_s4_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L381
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L381
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L381
	ucomiss	xmm0, xmm1
	je	.L384
.L381:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L384
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L384
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L384
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L384
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L149
.L384:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L386
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L386
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L387
.L386:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L388
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L388
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L388
.L387:
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L388
	ucomiss	xmm0, xmm1
	jne	.L388
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L388
	ucomiss	xmm0, xmm1
	jne	.L388
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L388
	ucomiss	xmm0, xmm1
	je	.L391
.L388:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L391
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L391
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L391
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L391
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L149
.L391:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L393
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L393
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L393
	movss	xmm0, DWORD PTR s4_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L395
.L393:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L395
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L395
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L396
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L395
.L396:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L395
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L395
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L149
.L395:
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L397
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L397
	movss	xmm0, DWORD PTR s4_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L399
.L397:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L399
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L399
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L400
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L399
.L400:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L399
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L399
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L399
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L149
.L399:
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L401
	ucomiss	xmm0, xmm1
	jne	.L401
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L401
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L401
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L401
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L401
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L401
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L401
	ucomiss	xmm0, xmm1
	jne	.L401
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L401
	ucomiss	xmm0, xmm1
	je	.L404
.L401:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L404
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L404
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L404
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L404
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L149
.L404:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L406
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L406
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L406
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L406
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L406
	ucomiss	xmm0, xmm1
	jne	.L406
	movss	xmm0, DWORD PTR _x_s4_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L406
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L409
.L406:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	jne	.L409
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L409
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L409
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L409
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L409
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L149
.L409:
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L411
	ucomiss	xmm0, xmm1
	jne	.L411
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L411
	ucomiss	xmm0, xmm1
	jne	.L411
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L411
	ucomiss	xmm0, xmm1
	jne	.L411
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L416
.L415:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L411
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L411
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L416
.L411:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L416
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L416
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L416
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L416
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L416
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L149
.L416:
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L417
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L417
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L417
	movss	xmm0, DWORD PTR s4_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L419
.L417:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L419
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L419
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L420
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L419
.L420:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	je	.L419
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L149
.L419:
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L421
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L421
	movss	xmm0, DWORD PTR s4_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L421
	movss	xmm0, DWORD PTR s4_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L423
.L421:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L423
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L423
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L424
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L423
.L424:
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L423
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	jne	.L423
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	je	.L149
.L423:
	movss	xmm0, DWORD PTR s4_z[rip]
	movss	xmm1, DWORD PTR _x_s4_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L425
	ucomiss	xmm0, xmm1
	jne	.L425
	movss	xmm0, DWORD PTR s4_x[rip]
	movss	xmm1, DWORD PTR _x_s4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L425
	ucomiss	xmm0, xmm1
	jne	.L425
	movss	xmm0, DWORD PTR s4_y[rip]
	movss	xmm1, DWORD PTR _x_s4_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L425
	ucomiss	xmm0, xmm1
	jne	.L425
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	test	al, al
	jne	.L425
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	test	al, al
	je	.L429
.L425:
	movzx	eax, BYTE PTR s4_l2[rip]
	test	al, al
	je	.L429
	movzx	eax, BYTE PTR s4_l0[rip]
	test	al, al
	je	.L429
	movzx	eax, BYTE PTR s4_l1[rip]
	test	al, al
	jne	.L429
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L429
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L429
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L149
.L429:
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	jne	.L430
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L431
.L430:
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L432
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L431
.L432:
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L433
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L431
.L433:
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	test	al, al
	je	.L149
.L431:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L434
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L435
.L434:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L436
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L436
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L435
.L436:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L437
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L437
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L435
.L437:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L438
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L435
.L438:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L439
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L439
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L435
.L439:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L149
.L435:
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L440
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L440
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L149
.L440:
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L441
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L441
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L441
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L149
.L441:
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L442
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L442
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L149
.L442:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L443
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L443:
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L447
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L447
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L447
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L447
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L447
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L447
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L447
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s3_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s3_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L447
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L450
.L447:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L149
.L450:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L452
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L452
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L452
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L452
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L452
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L452
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L452
	movss	xmm0, DWORD PTR _x_s3_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L452
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L452
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L452
	ucomiss	xmm0, xmm1
	je	.L455
.L452:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L455
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L455
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L455
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L455
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L149
.L455:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L457
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L457
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L458
.L457:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L459
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L459
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L459
.L458:
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L459
	ucomiss	xmm0, xmm1
	jne	.L459
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L459
	ucomiss	xmm0, xmm1
	jne	.L459
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L459
	ucomiss	xmm0, xmm1
	je	.L462
.L459:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L462
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L462
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L462
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L462
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L462
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L149
.L462:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L464
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L464
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L464
	movss	xmm0, DWORD PTR s3_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L466
.L464:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L466
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L466
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L467
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L466
.L467:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L466
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L466
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L149
.L466:
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L468
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L468
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L468
	movss	xmm0, DWORD PTR s3_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L470
.L468:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L470
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L470
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L470
.L471:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L470
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L470
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L470
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L149
.L470:
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L472
	ucomiss	xmm0, xmm1
	jne	.L472
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L472
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L472
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L472
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L472
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L472
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L472
	ucomiss	xmm0, xmm1
	jne	.L472
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L472
	ucomiss	xmm0, xmm1
	je	.L475
.L472:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L475
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L475
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L475
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L475
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L149
.L475:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L477
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L477
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L477
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L477
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L477
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L477
	ucomiss	xmm0, xmm1
	jne	.L477
	movss	xmm0, DWORD PTR _x_s3_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L477
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L480
.L477:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	jne	.L480
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L480
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L480
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L480
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L480
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L149
.L480:
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L482
	ucomiss	xmm0, xmm1
	jne	.L482
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L482
	ucomiss	xmm0, xmm1
	jne	.L482
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L482
	ucomiss	xmm0, xmm1
	jne	.L482
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L486
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L487
.L486:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L487
.L482:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L487
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L487
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L487
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L487
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L487
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L149
.L487:
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L488
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L488
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L488
	movss	xmm0, DWORD PTR s3_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L490
.L488:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L490
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L490
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L491
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L490
.L491:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L490
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L490
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L149
.L490:
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L492
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L492
	movss	xmm0, DWORD PTR s3_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L492
	movss	xmm0, DWORD PTR s3_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L494
.L492:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L494
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L494
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L495
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L494
.L495:
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L494
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	je	.L149
.L494:
	movss	xmm0, DWORD PTR s3_z[rip]
	movss	xmm1, DWORD PTR _x_s3_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L496
	ucomiss	xmm0, xmm1
	jne	.L496
	movss	xmm0, DWORD PTR s3_x[rip]
	movss	xmm1, DWORD PTR _x_s3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L496
	ucomiss	xmm0, xmm1
	jne	.L496
	movss	xmm0, DWORD PTR s3_y[rip]
	movss	xmm1, DWORD PTR _x_s3_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L496
	ucomiss	xmm0, xmm1
	jne	.L496
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L496
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L496
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	test	al, al
	jne	.L496
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	test	al, al
	jne	.L496
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	test	al, al
	je	.L500
.L496:
	movzx	eax, BYTE PTR s3_l2[rip]
	test	al, al
	je	.L500
	movzx	eax, BYTE PTR s3_l0[rip]
	test	al, al
	je	.L500
	movzx	eax, BYTE PTR s3_l1[rip]
	test	al, al
	jne	.L500
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L500
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L500
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L149
.L500:
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	jne	.L501
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L502
.L501:
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L503
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L502
.L503:
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L502
.L504:
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	test	al, al
	je	.L149
.L502:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L505
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L506
.L505:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L507
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L507
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L506
.L507:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L508
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L508
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L506
.L508:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L509
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L506
.L509:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L510
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L510
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L506
.L510:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L149
.L506:
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L511
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L511
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L149
.L511:
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L512
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L512
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L512
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L149
.L512:
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L513
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L513
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L149
.L513:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L514
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L514:
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L518
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L518
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L518
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L518
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L518
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L518
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L518
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s2_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s2_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L518
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L521
.L518:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L521
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L149
.L521:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L523
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L523
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L523
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L523
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L523
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L523
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L523
	movss	xmm0, DWORD PTR _x_s2_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L523
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L523
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L523
	ucomiss	xmm0, xmm1
	je	.L526
.L523:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L526
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L526
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L526
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L526
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L149
.L526:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L528
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L528
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L529
.L528:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L530
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L530
.L529:
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L530
	ucomiss	xmm0, xmm1
	jne	.L530
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L530
	ucomiss	xmm0, xmm1
	jne	.L530
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L530
	ucomiss	xmm0, xmm1
	je	.L533
.L530:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L533
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L533
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L533
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L533
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L533
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L149
.L533:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L535
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L535
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L535
	movss	xmm0, DWORD PTR s2_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L537
.L535:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L537
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L537
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L538
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L537
.L538:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L537
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L149
.L537:
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L539
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L539
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L539
	movss	xmm0, DWORD PTR s2_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L541
.L539:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L541
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L541
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L542
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L541
.L542:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L541
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L541
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L149
.L541:
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L543
	ucomiss	xmm0, xmm1
	jne	.L543
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L543
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L543
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L543
	ucomiss	xmm0, xmm1
	jne	.L543
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L543
	ucomiss	xmm0, xmm1
	je	.L546
.L543:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L546
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L546
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L546
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L546
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L149
.L546:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L548
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L548
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L548
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L548
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L548
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L548
	ucomiss	xmm0, xmm1
	jne	.L548
	movss	xmm0, DWORD PTR _x_s2_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L548
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L551
.L548:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	jne	.L551
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L551
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L551
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L551
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L149
.L551:
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L553
	ucomiss	xmm0, xmm1
	jne	.L553
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L553
	ucomiss	xmm0, xmm1
	jne	.L553
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L553
	ucomiss	xmm0, xmm1
	jne	.L553
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L557
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L558
.L557:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L553
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L558
.L553:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L558
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L558
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L558
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L149
.L558:
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L559
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L559
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L559
	movss	xmm0, DWORD PTR s2_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L561
.L559:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L561
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L561
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L561
.L562:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L561
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	je	.L561
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L149
.L561:
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L563
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L563
	movss	xmm0, DWORD PTR s2_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L563
	movss	xmm0, DWORD PTR s2_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L565
.L563:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L565
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L565
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L566
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L565
.L566:
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L565
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L565
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	jne	.L565
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	jne	.L565
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	je	.L149
.L565:
	movss	xmm0, DWORD PTR s2_z[rip]
	movss	xmm1, DWORD PTR _x_s2_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L567
	ucomiss	xmm0, xmm1
	jne	.L567
	movss	xmm0, DWORD PTR s2_x[rip]
	movss	xmm1, DWORD PTR _x_s2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L567
	ucomiss	xmm0, xmm1
	jne	.L567
	movss	xmm0, DWORD PTR s2_y[rip]
	movss	xmm1, DWORD PTR _x_s2_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L567
	ucomiss	xmm0, xmm1
	jne	.L567
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L567
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	test	al, al
	jne	.L567
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	test	al, al
	je	.L571
.L567:
	movzx	eax, BYTE PTR s2_l2[rip]
	test	al, al
	je	.L571
	movzx	eax, BYTE PTR s2_l0[rip]
	test	al, al
	je	.L571
	movzx	eax, BYTE PTR s2_l1[rip]
	test	al, al
	jne	.L571
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L571
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L571
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L149
.L571:
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	jne	.L572
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L573
.L572:
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L574
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L573
.L574:
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L575
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L573
.L575:
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	test	al, al
	je	.L149
.L573:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L576
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L577
.L576:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L578
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L578
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L577
.L578:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L579
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L579
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L577
.L579:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L580
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L577
.L580:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L581
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L581
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L577
.L581:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L149
.L577:
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L582
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L582
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L582
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L149
.L582:
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L583
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L583
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L583
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L149
.L583:
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L584
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L584
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L584
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L149
.L584:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L585
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L585:
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L589
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L589
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L589
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s1_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s1_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L592
.L589:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L592
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L149
.L592:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L594
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L594
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L594
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L594
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L594
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L594
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L594
	movss	xmm0, DWORD PTR _x_s1_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L594
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L594
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L594
	ucomiss	xmm0, xmm1
	je	.L597
.L594:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L597
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L597
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L597
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L597
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L149
.L597:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L599
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L599
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L600
.L599:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L601
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L601
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L601
.L600:
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L601
	ucomiss	xmm0, xmm1
	jne	.L601
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L601
	ucomiss	xmm0, xmm1
	jne	.L601
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L601
	ucomiss	xmm0, xmm1
	je	.L604
.L601:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L604
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L604
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L604
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L604
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L604
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L149
.L604:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L606
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L606
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L606
	movss	xmm0, DWORD PTR s1_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L608
.L606:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L608
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L608
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L609
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L608
.L609:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L608
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L608
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L608
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L608
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L608
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L149
.L608:
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L610
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L610
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L610
	movss	xmm0, DWORD PTR s1_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L612
.L610:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L612
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L612
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L613
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L612
.L613:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L612
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L612
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L612
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L149
.L612:
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L614
	ucomiss	xmm0, xmm1
	jne	.L614
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L614
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L614
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L614
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L614
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L614
	ucomiss	xmm0, xmm1
	jne	.L614
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L614
	ucomiss	xmm0, xmm1
	je	.L617
.L614:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L617
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L617
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L617
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L617
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L617
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L149
.L617:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L619
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L619
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L619
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L619
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L619
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L619
	ucomiss	xmm0, xmm1
	jne	.L619
	movss	xmm0, DWORD PTR _x_s1_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L619
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L622
.L619:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	jne	.L622
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L622
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L622
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L622
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L622
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L149
.L622:
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L624
	ucomiss	xmm0, xmm1
	jne	.L624
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L624
	ucomiss	xmm0, xmm1
	jne	.L624
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L624
	ucomiss	xmm0, xmm1
	jne	.L624
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L628
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L628
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L629
.L628:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L624
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L624
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L629
.L624:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L629
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L629
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L629
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L629
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L629
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L149
.L629:
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L630
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L630
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L630
	movss	xmm0, DWORD PTR s1_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L632
.L630:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L632
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L632
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L633
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L632
.L633:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L632
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	je	.L632
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L149
.L632:
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L634
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L634
	movss	xmm0, DWORD PTR s1_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L634
	movss	xmm0, DWORD PTR s1_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L636
.L634:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L636
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L636
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L637
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L636
.L637:
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L636
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	jne	.L636
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	je	.L149
.L636:
	movss	xmm0, DWORD PTR s1_z[rip]
	movss	xmm1, DWORD PTR _x_s1_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L638
	ucomiss	xmm0, xmm1
	jne	.L638
	movss	xmm0, DWORD PTR s1_x[rip]
	movss	xmm1, DWORD PTR _x_s1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L638
	ucomiss	xmm0, xmm1
	jne	.L638
	movss	xmm0, DWORD PTR s1_y[rip]
	movss	xmm1, DWORD PTR _x_s1_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L638
	ucomiss	xmm0, xmm1
	jne	.L638
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L638
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	test	al, al
	jne	.L638
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	test	al, al
	je	.L642
.L638:
	movzx	eax, BYTE PTR s1_l2[rip]
	test	al, al
	je	.L642
	movzx	eax, BYTE PTR s1_l0[rip]
	test	al, al
	je	.L642
	movzx	eax, BYTE PTR s1_l1[rip]
	test	al, al
	jne	.L642
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L642
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L642
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L149
.L642:
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	jne	.L643
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L644
.L643:
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L645
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L644
.L645:
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L646
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L644
.L646:
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	test	al, al
	je	.L149
.L644:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L647
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L648
.L647:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L649
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L649
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L648
.L649:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L650
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L650
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L648
.L650:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L651
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L651
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L648
.L651:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L652
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L652
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L648
.L652:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L149
.L648:
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L653
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L653
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L653
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L149
.L653:
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L654
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L654
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L654
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L149
.L654:
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	movss	xmm0, DWORD PTR .LC2[rip]
	comiss	xmm0, xmm1
	jnb	.L655
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L655
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L655
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L149
.L655:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L656
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L656:
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L660
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L660
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L660
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L660
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L660
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_y[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_y[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L660
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L660
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR s0_z[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_s0_z[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L660
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L663
.L660:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L663
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L149
.L663:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L665
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L665
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L665
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L665
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L665
	movss	xmm0, DWORD PTR _x_s0_y[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L665
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L665
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L665
	ucomiss	xmm0, xmm1
	je	.L668
.L665:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L668
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L668
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L668
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L668
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L668
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L149
.L668:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L670
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L670
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L671
.L670:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L672
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L672
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L672
.L671:
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L672
	ucomiss	xmm0, xmm1
	jne	.L672
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L672
	ucomiss	xmm0, xmm1
	jne	.L672
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L672
	ucomiss	xmm0, xmm1
	je	.L675
.L672:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L675
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L675
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L675
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L675
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L675
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L149
.L675:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L677
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L677
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L677
	movss	xmm0, DWORD PTR s0_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L679
.L677:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L679
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L679
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L680
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L679
.L680:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L679
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L679
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L679
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L149
.L679:
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L681
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L681
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L681
	movss	xmm0, DWORD PTR s0_z[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L683
.L681:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L683
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L683
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L684
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L683
.L684:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L683
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L683
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L683
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L149
.L683:
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L685
	ucomiss	xmm0, xmm1
	jne	.L685
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L685
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L685
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L685
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L685
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L685
	ucomiss	xmm0, xmm1
	jne	.L685
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L685
	ucomiss	xmm0, xmm1
	je	.L688
.L685:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L688
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L688
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L688
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L688
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L688
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L149
.L688:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L690
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L690
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L690
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L690
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L690
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L690
	ucomiss	xmm0, xmm1
	jne	.L690
	movss	xmm0, DWORD PTR _x_s0_z[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L690
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L693
.L690:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	jne	.L693
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L693
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L693
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L693
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L693
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L149
.L693:
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L695
	ucomiss	xmm0, xmm1
	jne	.L695
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L695
	ucomiss	xmm0, xmm1
	jne	.L695
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L695
	ucomiss	xmm0, xmm1
	jne	.L695
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L699
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L699
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L700
.L699:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L695
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L700
.L695:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L700
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L700
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L700
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L700
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L700
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L149
.L700:
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L701
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L701
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L701
	movss	xmm0, DWORD PTR s0_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	setnb	al
	xor	eax, 1
	test	al, al
	jne	.L703
.L701:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L703
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L703
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L704
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L703
.L704:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L703
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	je	.L703
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L149
.L703:
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L705
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L705
	movss	xmm0, DWORD PTR s0_x[rip]
	comiss	xmm0, DWORD PTR .LC1[rip]
	jb	.L705
	movss	xmm0, DWORD PTR s0_y[rip]
	comiss	xmm0, DWORD PTR .LC2[rip]
	jnb	.L707
.L705:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L707
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L707
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L708
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L707
.L708:
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L707
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	jne	.L707
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	je	.L149
.L707:
	movss	xmm0, DWORD PTR s0_z[rip]
	movss	xmm1, DWORD PTR _x_s0_z[rip]
	ucomiss	xmm0, xmm1
	jp	.L709
	ucomiss	xmm0, xmm1
	jne	.L709
	movss	xmm0, DWORD PTR s0_x[rip]
	movss	xmm1, DWORD PTR _x_s0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L709
	ucomiss	xmm0, xmm1
	jne	.L709
	movss	xmm0, DWORD PTR s0_y[rip]
	movss	xmm1, DWORD PTR _x_s0_y[rip]
	ucomiss	xmm0, xmm1
	jp	.L709
	ucomiss	xmm0, xmm1
	jne	.L709
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L709
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	test	al, al
	jne	.L709
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	test	al, al
	je	.L713
.L709:
	movzx	eax, BYTE PTR s0_l2[rip]
	test	al, al
	je	.L713
	movzx	eax, BYTE PTR s0_l0[rip]
	test	al, al
	je	.L713
	movzx	eax, BYTE PTR s0_l1[rip]
	test	al, al
	jne	.L713
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L713
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L713
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L149
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L149
.L713:
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	test	eax, eax
	je	.L714
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 1
	je	.L714
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 2
	je	.L714
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 3
	je	.L714
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 4
	je	.L714
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 5
	je	.L714
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 6
	je	.L714
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	cmp	eax, 7
	jne	.L149
.L714:
	mov	eax, DWORD PTR _x_r_counter[rip]
	test	eax, eax
	je	.L715
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 1
	je	.L715
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 2
	je	.L715
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 3
	je	.L715
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 4
	je	.L715
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 5
	je	.L715
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 6
	je	.L715
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	eax, 7
	jne	.L149
.L715:
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	je	.L716
	movss	xmm1, DWORD PTR _x_r_x[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L149
.L716:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L718
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR r_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_r_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L149
	mov	edx, DWORD PTR r_counter[rip]
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	edx, eax
	jne	.L149
.L718:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L720
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR r_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_r_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L720
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L720
	mov	edx, DWORD PTR r_counter[rip]
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	edx, eax
	je	.L722
.L720:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L722
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L149
.L722:
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L723
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L723
	movss	xmm1, DWORD PTR r_x[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L723
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	jne	.L723
	mov	edx, DWORD PTR r_evt_id[rip]
	mov	eax, DWORD PTR r_counter[rip]
	cmp	edx, eax
	jne	.L723
	mov	edx, DWORD PTR r_counter[rip]
	mov	eax, DWORD PTR _x_r_counter[rip]
	cmp	edx, eax
	jne	.L723
	movss	xmm0, DWORD PTR r_x[rip]
	movss	xmm1, DWORD PTR _x_r_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L723
	ucomiss	xmm0, xmm1
	je	.L725
.L723:
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	je	.L725
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L727
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L725
.L727:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L725
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L149
.L725:
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	je	.L729
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L729
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L729
	mov	edx, DWORD PTR r_evt_id[rip]
	mov	eax, DWORD PTR r_counter[rip]
	cmp	edx, eax
	jne	.L729
	movss	xmm0, DWORD PTR _x_r_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L729
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L729
	mov	eax, DWORD PTR r_counter[rip]
	mov	edx, DWORD PTR _x_r_counter[rip]
	sub	eax, edx
	cmp	eax, -1
	je	.L731
.L729:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L732
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L731
.L732:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L731
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L731
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	jne	.L731
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 6
	jle	.L149
.L731:
	movzx	eax, BYTE PTR _x_r_l[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L733
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L733
	mov	edx, DWORD PTR r_evt_id[rip]
	mov	eax, DWORD PTR r_counter[rip]
	cmp	edx, eax
	jne	.L733
	mov	eax, DWORD PTR _x_r_counter[rip]
	test	eax, eax
	jne	.L733
	movss	xmm0, DWORD PTR _x_r_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L733
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L734
.L733:
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L736
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L734
.L736:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L734
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L734
	movzx	eax, BYTE PTR r_l[rip]
	test	al, al
	jne	.L734
	mov	eax, DWORD PTR r_counter[rip]
	cmp	eax, 7
	je	.L149
.L734:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L149
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L738
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	jne	.L738
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L738
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L149
.L738:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L740
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L740
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L741
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	jne	.L741
	mov	eax, 1
	jmp	.L742
.L741:
	mov	eax, 0
.L742:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L743
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L743
	mov	eax, DWORD PTR r_evt_id[rip]
	test	eax, eax
	jne	.L743
	mov	eax, 1
	jmp	.L744
.L743:
	mov	eax, 0
.L744:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L740:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L745
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L745
	movzx	eax, BYTE PTR s0_evt0[rip]
	test	al, al
	je	.L746
	movzx	eax, BYTE PTR s0_evt1[rip]
	test	al, al
	je	.L746
	mov	eax, 1
	jmp	.L747
.L746:
	mov	eax, 0
.L747:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L748
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L748
	mov	eax, DWORD PTR r_evt_id[rip]
	test	eax, eax
	jne	.L748
	mov	eax, 1
	jmp	.L749
.L748:
	mov	eax, 0
.L749:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L745:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L750
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L750
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L751
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	jne	.L751
	mov	eax, 1
	jmp	.L752
.L751:
	mov	eax, 0
.L752:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L753
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L753
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 1
	jne	.L753
	mov	eax, 1
	jmp	.L754
.L753:
	mov	eax, 0
.L754:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L750:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L755
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L755
	movzx	eax, BYTE PTR s1_evt0[rip]
	test	al, al
	je	.L756
	movzx	eax, BYTE PTR s1_evt1[rip]
	test	al, al
	je	.L756
	mov	eax, 1
	jmp	.L757
.L756:
	mov	eax, 0
.L757:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L758
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L758
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 1
	jne	.L758
	mov	eax, 1
	jmp	.L759
.L758:
	mov	eax, 0
.L759:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L755:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L760
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L760
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L761
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	jne	.L761
	mov	eax, 1
	jmp	.L762
.L761:
	mov	eax, 0
.L762:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L763
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L763
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 2
	jne	.L763
	mov	eax, 1
	jmp	.L764
.L763:
	mov	eax, 0
.L764:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L760:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L765
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L765
	movzx	eax, BYTE PTR s2_evt0[rip]
	test	al, al
	je	.L766
	movzx	eax, BYTE PTR s2_evt1[rip]
	test	al, al
	je	.L766
	mov	eax, 1
	jmp	.L767
.L766:
	mov	eax, 0
.L767:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L768
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L768
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 2
	jne	.L768
	mov	eax, 1
	jmp	.L769
.L768:
	mov	eax, 0
.L769:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L765:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L770
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L770
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L771
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	jne	.L771
	mov	eax, 1
	jmp	.L772
.L771:
	mov	eax, 0
.L772:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L773
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L773
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 3
	jne	.L773
	mov	eax, 1
	jmp	.L774
.L773:
	mov	eax, 0
.L774:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L770:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L775
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L775
	movzx	eax, BYTE PTR s3_evt0[rip]
	test	al, al
	je	.L776
	movzx	eax, BYTE PTR s3_evt1[rip]
	test	al, al
	je	.L776
	mov	eax, 1
	jmp	.L777
.L776:
	mov	eax, 0
.L777:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L778
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L778
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 3
	jne	.L778
	mov	eax, 1
	jmp	.L779
.L778:
	mov	eax, 0
.L779:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L775:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L780
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L780
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L781
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	jne	.L781
	mov	eax, 1
	jmp	.L782
.L781:
	mov	eax, 0
.L782:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L783
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L783
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 4
	jne	.L783
	mov	eax, 1
	jmp	.L784
.L783:
	mov	eax, 0
.L784:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L780:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L785
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L785
	movzx	eax, BYTE PTR s4_evt0[rip]
	test	al, al
	je	.L786
	movzx	eax, BYTE PTR s4_evt1[rip]
	test	al, al
	je	.L786
	mov	eax, 1
	jmp	.L787
.L786:
	mov	eax, 0
.L787:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L788
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L788
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 4
	jne	.L788
	mov	eax, 1
	jmp	.L789
.L788:
	mov	eax, 0
.L789:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L785:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L790
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L790
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L791
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	jne	.L791
	mov	eax, 1
	jmp	.L792
.L791:
	mov	eax, 0
.L792:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L793
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L793
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 5
	jne	.L793
	mov	eax, 1
	jmp	.L794
.L793:
	mov	eax, 0
.L794:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L790:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L795
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L795
	movzx	eax, BYTE PTR s5_evt0[rip]
	test	al, al
	je	.L796
	movzx	eax, BYTE PTR s5_evt1[rip]
	test	al, al
	je	.L796
	mov	eax, 1
	jmp	.L797
.L796:
	mov	eax, 0
.L797:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L798
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L798
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 5
	jne	.L798
	mov	eax, 1
	jmp	.L799
.L798:
	mov	eax, 0
.L799:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L795:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L800
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L800
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L801
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	jne	.L801
	mov	eax, 1
	jmp	.L802
.L801:
	mov	eax, 0
.L802:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L803
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L803
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 6
	jne	.L803
	mov	eax, 1
	jmp	.L804
.L803:
	mov	eax, 0
.L804:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L800:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L805
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L805
	movzx	eax, BYTE PTR s6_evt0[rip]
	test	al, al
	je	.L806
	movzx	eax, BYTE PTR s6_evt1[rip]
	test	al, al
	je	.L806
	mov	eax, 1
	jmp	.L807
.L806:
	mov	eax, 0
.L807:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L808
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L808
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 6
	jne	.L808
	mov	eax, 1
	jmp	.L809
.L808:
	mov	eax, 0
.L809:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L805:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L810
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L810
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L811
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	jne	.L811
	mov	eax, 1
	jmp	.L812
.L811:
	mov	eax, 0
.L812:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	je	.L813
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	jne	.L813
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 7
	jne	.L813
	mov	eax, 1
	jmp	.L814
.L813:
	mov	eax, 0
.L814:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L810:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L815
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L815
	movzx	eax, BYTE PTR s7_evt0[rip]
	test	al, al
	je	.L816
	movzx	eax, BYTE PTR s7_evt1[rip]
	test	al, al
	je	.L816
	mov	eax, 1
	jmp	.L817
.L816:
	mov	eax, 0
.L817:
	and	eax, 1
	xor	eax, 1
	mov	edx, eax
	movzx	eax, BYTE PTR r_event1[rip]
	test	al, al
	je	.L818
	movzx	eax, BYTE PTR r_event0[rip]
	test	al, al
	jne	.L818
	mov	eax, DWORD PTR r_evt_id[rip]
	cmp	eax, 7
	jne	.L818
	mov	eax, 1
	jmp	.L819
.L818:
	mov	eax, 0
.L819:
	and	eax, 1
	xor	eax, edx
	test	al, al
	je	.L149
.L815:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L1035
	ucomiss	xmm0, xmm1
	je	.L820
.L1035:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L149
.L820:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC4[rip]
	comiss	xmm0, xmm1
	jnb	.L822
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L149
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L149
.L822:
	mov	eax, 1
	jmp	.L824
.L149:
	mov	eax, 0
.L824:
	mov	DWORD PTR -4[rbp], eax
	movss	xmm0, DWORD PTR _x_s7_z[rip]
	movss	DWORD PTR s7_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s7_y[rip]
	movss	DWORD PTR s7_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s7_x[rip]
	movss	DWORD PTR s7_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s2_evt0[rip]
	mov	BYTE PTR s2_evt0[rip], al
	movzx	eax, BYTE PTR _x_r_event0[rip]
	mov	BYTE PTR r_event0[rip], al
	movss	xmm0, DWORD PTR _x_s5_y[rip]
	movss	DWORD PTR s5_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s1_l2[rip]
	mov	BYTE PTR s1_l2[rip], al
	movzx	eax, BYTE PTR _x_s7_evt1[rip]
	mov	BYTE PTR s7_evt1[rip], al
	movzx	eax, BYTE PTR _x_s4_l1[rip]
	mov	BYTE PTR s4_l1[rip], al
	movzx	eax, BYTE PTR _x_s7_evt0[rip]
	mov	BYTE PTR s7_evt0[rip], al
	movzx	eax, BYTE PTR _x_s4_l0[rip]
	mov	BYTE PTR s4_l0[rip], al
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movzx	eax, BYTE PTR _x_s2_evt1[rip]
	mov	BYTE PTR s2_evt1[rip], al
	movzx	eax, BYTE PTR _x_s2_l0[rip]
	mov	BYTE PTR s2_l0[rip], al
	movzx	eax, BYTE PTR _x_s5_evt0[rip]
	mov	BYTE PTR s5_evt0[rip], al
	movss	xmm0, DWORD PTR _x_s6_z[rip]
	movss	DWORD PTR s6_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s1_evt0[rip]
	mov	BYTE PTR s1_evt0[rip], al
	movzx	eax, BYTE PTR _x_s7_l2[rip]
	mov	BYTE PTR s7_l2[rip], al
	movss	xmm0, DWORD PTR _x_s1_z[rip]
	movss	DWORD PTR s1_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s4_y[rip]
	movss	DWORD PTR s4_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s7_l1[rip]
	mov	BYTE PTR s7_l1[rip], al
	movss	xmm0, DWORD PTR _x_s1_y[rip]
	movss	DWORD PTR s1_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s4_x[rip]
	movss	DWORD PTR s4_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s7_l0[rip]
	mov	BYTE PTR s7_l0[rip], al
	movss	xmm0, DWORD PTR _x_s1_x[rip]
	movss	DWORD PTR s1_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s2_y[rip]
	movss	DWORD PTR s2_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s5_x[rip]
	movss	DWORD PTR s5_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_l2[rip]
	mov	BYTE PTR s0_l2[rip], al
	movzx	eax, BYTE PTR _x_s6_evt1[rip]
	mov	BYTE PTR s6_evt1[rip], al
	movzx	eax, BYTE PTR _x_s3_l1[rip]
	mov	BYTE PTR s3_l1[rip], al
	movss	xmm0, DWORD PTR _x_s2_x[rip]
	movss	DWORD PTR s2_x[rip], xmm0
	mov	eax, DWORD PTR _x_r_evt_id[rip]
	mov	DWORD PTR r_evt_id[rip], eax
	movzx	eax, BYTE PTR _x_s6_l0[rip]
	mov	BYTE PTR s6_l0[rip], al
	movss	xmm0, DWORD PTR _x_s0_x[rip]
	movss	DWORD PTR s0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s6_l1[rip]
	mov	BYTE PTR s6_l1[rip], al
	movss	xmm0, DWORD PTR _x_s0_y[rip]
	movss	DWORD PTR s0_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s3_x[rip]
	movss	DWORD PTR s3_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_s2_z[rip]
	movss	DWORD PTR s2_z[rip], xmm0
	movzx	eax, BYTE PTR _x_r_l[rip]
	mov	BYTE PTR r_l[rip], al
	movzx	eax, BYTE PTR _x_s6_l2[rip]
	mov	BYTE PTR s6_l2[rip], al
	movss	xmm0, DWORD PTR _x_s0_z[rip]
	movss	DWORD PTR s0_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s3_y[rip]
	movss	DWORD PTR s3_y[rip], xmm0
	movss	xmm0, DWORD PTR _x_s6_x[rip]
	movss	DWORD PTR s6_x[rip], xmm0
	mov	eax, DWORD PTR _x_r_counter[rip]
	mov	DWORD PTR r_counter[rip], eax
	movzx	eax, BYTE PTR _x_s0_evt0[rip]
	mov	BYTE PTR s0_evt0[rip], al
	movzx	eax, BYTE PTR _x_r_event1[rip]
	mov	BYTE PTR r_event1[rip], al
	movss	xmm0, DWORD PTR _x_s5_z[rip]
	movss	DWORD PTR s5_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_r_x[rip]
	movss	DWORD PTR r_x[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_evt1[rip]
	mov	BYTE PTR s0_evt1[rip], al
	movzx	eax, BYTE PTR _x_s0_l0[rip]
	mov	BYTE PTR s0_l0[rip], al
	movzx	eax, BYTE PTR _x_s3_evt0[rip]
	mov	BYTE PTR s3_evt0[rip], al
	movzx	eax, BYTE PTR _x_s1_evt1[rip]
	mov	BYTE PTR s1_evt1[rip], al
	movzx	eax, BYTE PTR _x_s1_l0[rip]
	mov	BYTE PTR s1_l0[rip], al
	movzx	eax, BYTE PTR _x_s4_evt0[rip]
	mov	BYTE PTR s4_evt0[rip], al
	movzx	eax, BYTE PTR _x_s5_l0[rip]
	mov	BYTE PTR s5_l0[rip], al
	movzx	eax, BYTE PTR _x_s2_l2[rip]
	mov	BYTE PTR s2_l2[rip], al
	movzx	eax, BYTE PTR _x_s5_l1[rip]
	mov	BYTE PTR s5_l1[rip], al
	movss	xmm0, DWORD PTR _x_s3_z[rip]
	movss	DWORD PTR s3_z[rip], xmm0
	movss	xmm0, DWORD PTR _x_s6_y[rip]
	movss	DWORD PTR s6_y[rip], xmm0
	movzx	eax, BYTE PTR _x_s0_l1[rip]
	mov	BYTE PTR s0_l1[rip], al
	movzx	eax, BYTE PTR _x_s3_evt1[rip]
	mov	BYTE PTR s3_evt1[rip], al
	movzx	eax, BYTE PTR _x_s3_l0[rip]
	mov	BYTE PTR s3_l0[rip], al
	movzx	eax, BYTE PTR _x_s6_evt0[rip]
	mov	BYTE PTR s6_evt0[rip], al
	movzx	eax, BYTE PTR _x_s3_l2[rip]
	mov	BYTE PTR s3_l2[rip], al
	movss	xmm0, DWORD PTR _x_s4_z[rip]
	movss	DWORD PTR s4_z[rip], xmm0
	movzx	eax, BYTE PTR _x_s1_l1[rip]
	mov	BYTE PTR s1_l1[rip], al
	movzx	eax, BYTE PTR _x_s4_evt1[rip]
	mov	BYTE PTR s4_evt1[rip], al
	movzx	eax, BYTE PTR _x_s4_l2[rip]
	mov	BYTE PTR s4_l2[rip], al
	movzx	eax, BYTE PTR _x_s2_l1[rip]
	mov	BYTE PTR s2_l1[rip], al
	movzx	eax, BYTE PTR _x_s5_evt1[rip]
	mov	BYTE PTR s5_evt1[rip], al
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movzx	eax, BYTE PTR _x_s5_l2[rip]
	mov	BYTE PTR s5_l2[rip], al
.L144:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L825
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1101004800
	.align 4
.LC2:
	.long	1123024896
	.align 4
.LC4:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"715019.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	s7_z,4,4
	.comm	_x_s7_z,4,4
	.comm	s7_y,4,4
	.comm	_x_s7_y,4,4
	.comm	s7_x,4,4
	.comm	_x_s7_x,4,4
	.comm	s2_evt0,1,1
	.comm	_x_s2_evt0,1,1
	.comm	r_event0,1,1
	.comm	_x_r_event0,1,1
	.comm	s5_y,4,4
	.comm	_x_s5_y,4,4
	.comm	s1_l2,1,1
	.comm	_x_s1_l2,1,1
	.comm	s7_evt1,1,1
	.comm	_x_s7_evt1,1,1
	.comm	s4_l1,1,1
	.comm	_x_s4_l1,1,1
	.comm	s7_evt0,1,1
	.comm	_x_s7_evt0,1,1
	.comm	s4_l0,1,1
	.comm	_x_s4_l0,1,1
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	s2_evt1,1,1
	.comm	_x_s2_evt1,1,1
	.comm	s2_l0,1,1
	.comm	_x_s2_l0,1,1
	.comm	s5_evt0,1,1
	.comm	_x_s5_evt0,1,1
	.comm	s6_z,4,4
	.comm	_x_s6_z,4,4
	.comm	s1_evt0,1,1
	.comm	_x_s1_evt0,1,1
	.comm	s7_l2,1,1
	.comm	_x_s7_l2,1,1
	.comm	s1_z,4,4
	.comm	_x_s1_z,4,4
	.comm	s4_y,4,4
	.comm	_x_s4_y,4,4
	.comm	s7_l1,1,1
	.comm	_x_s7_l1,1,1
	.comm	s1_y,4,4
	.comm	_x_s1_y,4,4
	.comm	s4_x,4,4
	.comm	_x_s4_x,4,4
	.comm	s7_l0,1,1
	.comm	_x_s7_l0,1,1
	.comm	s1_x,4,4
	.comm	_x_s1_x,4,4
	.comm	s2_y,4,4
	.comm	_x_s2_y,4,4
	.comm	s5_x,4,4
	.comm	_x_s5_x,4,4
	.comm	s0_l2,1,1
	.comm	_x_s0_l2,1,1
	.comm	s6_evt1,1,1
	.comm	_x_s6_evt1,1,1
	.comm	s3_l1,1,1
	.comm	_x_s3_l1,1,1
	.comm	s2_x,4,4
	.comm	_x_s2_x,4,4
	.comm	r_evt_id,4,4
	.comm	_x_r_evt_id,4,4
	.comm	s6_l0,1,1
	.comm	_x_s6_l0,1,1
	.comm	s0_x,4,4
	.comm	_x_s0_x,4,4
	.comm	s6_l1,1,1
	.comm	_x_s6_l1,1,1
	.comm	s0_y,4,4
	.comm	_x_s0_y,4,4
	.comm	s3_x,4,4
	.comm	_x_s3_x,4,4
	.comm	s2_z,4,4
	.comm	_x_s2_z,4,4
	.comm	r_l,1,1
	.comm	_x_r_l,1,1
	.comm	s6_l2,1,1
	.comm	_x_s6_l2,1,1
	.comm	s0_z,4,4
	.comm	_x_s0_z,4,4
	.comm	s3_y,4,4
	.comm	_x_s3_y,4,4
	.comm	s6_x,4,4
	.comm	_x_s6_x,4,4
	.comm	r_counter,4,4
	.comm	_x_r_counter,4,4
	.comm	s0_evt0,1,1
	.comm	_x_s0_evt0,1,1
	.comm	r_event1,1,1
	.comm	_x_r_event1,1,1
	.comm	s5_z,4,4
	.comm	_x_s5_z,4,4
	.comm	r_x,4,4
	.comm	_x_r_x,4,4
	.comm	s0_evt1,1,1
	.comm	_x_s0_evt1,1,1
	.comm	s0_l0,1,1
	.comm	_x_s0_l0,1,1
	.comm	s3_evt0,1,1
	.comm	_x_s3_evt0,1,1
	.comm	s1_evt1,1,1
	.comm	_x_s1_evt1,1,1
	.comm	s1_l0,1,1
	.comm	_x_s1_l0,1,1
	.comm	s4_evt0,1,1
	.comm	_x_s4_evt0,1,1
	.comm	s5_l0,1,1
	.comm	_x_s5_l0,1,1
	.comm	s2_l2,1,1
	.comm	_x_s2_l2,1,1
	.comm	s5_l1,1,1
	.comm	_x_s5_l1,1,1
	.comm	s3_z,4,4
	.comm	_x_s3_z,4,4
	.comm	s6_y,4,4
	.comm	_x_s6_y,4,4
	.comm	s0_l1,1,1
	.comm	_x_s0_l1,1,1
	.comm	s3_evt1,1,1
	.comm	_x_s3_evt1,1,1
	.comm	s3_l0,1,1
	.comm	_x_s3_l0,1,1
	.comm	s6_evt0,1,1
	.comm	_x_s6_evt0,1,1
	.comm	s3_l2,1,1
	.comm	_x_s3_l2,1,1
	.comm	s4_z,4,4
	.comm	_x_s4_z,4,4
	.comm	s1_l1,1,1
	.comm	_x_s1_l1,1,1
	.comm	s4_evt1,1,1
	.comm	_x_s4_evt1,1,1
	.comm	s4_l2,1,1
	.comm	_x_s4_l2,1,1
	.comm	s2_l1,1,1
	.comm	_x_s2_l1,1,1
	.comm	s5_evt1,1,1
	.comm	_x_s5_evt1,1,1
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	s5_l2,1,1
	.comm	_x_s5_l2,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+4
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+8
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+12
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+20
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+28
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+44
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+52
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+60
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+64
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+244
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+144
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+152
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+248
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+208
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+80
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+216
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1009+312
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+284
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+272
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+212
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+320
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+276
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+176
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+100
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1009+316
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+104
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+324
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+112
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+116
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+180
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+120
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+300
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+148
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1009+136
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1009+140
	strb	r2, [r3]
	ldr	r3, .L1009+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L1009+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L4:
	ldr	r3, .L1009+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L1009+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L6:
	ldr	r3, .L1009+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
	ldr	r3, .L1009+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L5
.L7:
	ldr	r3, .L1009+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L5:
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L9
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L9:
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L11
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L11:
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L12
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L12:
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L10
.L13:
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L14
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
.L14:
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L10:
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L18
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L18:
	ldr	r3, .L1009+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L19
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L19
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L19:
	ldr	r3, .L1009+8
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L20
	ldr	r3, .L1009+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L1009+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L1009+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L20:
	ldr	r3, .L1009+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
	ldr	r3, .L1009+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
.L21:
	ldr	r3, .L1009+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L1009+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
.L23:
	ldr	r3, .L1009+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L24
	ldr	r3, .L1009+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
.L24:
	ldr	r3, .L1009+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L22:
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L25
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L25:
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L27
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L27:
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L28
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L28:
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L29
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L29
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
.L29:
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L30
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
.L30:
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L26:
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+120
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L34:
	ldr	r3, .L1009+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L35
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L35
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L35
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L35:
	ldr	r3, .L1009+100
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L1009+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1009+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L1009+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L36:
	ldr	r3, .L1009+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
	ldr	r3, .L1009+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
.L37:
	ldr	r3, .L1009+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L1009+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
.L39:
	ldr	r3, .L1009+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L1009+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
.L40:
	ldr	r3, .L1009+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L38:
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L41:
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L43:
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L44:
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L45
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
.L45:
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L46:
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L42:
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L50:
	ldr	r3, .L1009+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L51:
	ldr	r3, .L1009+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L1009+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1009+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L1009+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L52:
	ldr	r3, .L1009+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L53
	ldr	r3, .L1009+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
.L53:
	ldr	r3, .L1009+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L1009+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
.L55:
	ldr	r3, .L1009+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L1009+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
.L56:
	ldr	r3, .L1009+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L54:
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1009+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L57
	ldr	r3, .L1009+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L57:
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L1009+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
	ldr	r3, .L1009+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L59:
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L1009+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L60
	ldr	r3, .L1009+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L60:
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L61
	ldr	r3, .L1009+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
	ldr	r3, .L1009+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L58
.L61:
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L1009+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L62
	ldr	r3, .L1009+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
.L62:
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1010
.L1011:
	.align	2
.L1009:
	.word	s7_z
	.word	s7_y
	.word	s7_x
	.word	s2_evt0
	.word	r_event0
	.word	s5_y
	.word	s1_l2
	.word	s7_evt1
	.word	s4_l1
	.word	s7_evt0
	.word	s4_l0
	.word	_diverge_delta
	.word	s2_evt1
	.word	s2_l0
	.word	s5_evt0
	.word	s6_z
	.word	s1_evt0
	.word	s7_l2
	.word	s7_l1
	.word	s7_l0
	.word	s5_x
	.word	s6_evt1
	.word	s6_l0
	.word	s6_l1
	.word	s6_l2
	.word	s6_x
	.word	s5_z
	.word	s4_evt0
	.word	s5_l0
	.word	s5_l1
	.word	s6_y
	.word	s6_evt0
	.word	s4_evt1
	.word	s5_evt1
	.word	delta
	.word	s5_l2
	.word	s4_y
	.word	s4_z
	.word	s4_x
	.word	s4_l2
	.word	s4_l0
	.word	s4_l1
	.word	s3_evt0
	.word	s3_evt1
	.word	s3_y
	.word	s3_z
	.word	s3_x
	.word	s3_l2
	.word	s3_l0
	.word	s3_l1
	.word	s2_evt0
	.word	s2_evt1
	.word	s2_y
	.word	s2_z
	.word	s2_x
	.word	s2_l2
	.word	s2_l0
	.word	s2_l1
	.word	s1_evt0
	.word	s1_evt1
	.word	s1_y
	.word	s1_z
	.word	s1_x
	.word	s1_l2
	.word	s1_l0
	.word	s1_l1
	.word	s0_evt0
	.word	s0_evt1
	.word	s0_y
	.word	s0_z
	.word	1101004800
	.word	s0_x
	.word	1123024896
	.word	s0_l2
	.word	s0_l0
	.word	s0_l1
	.word	r_event1
	.word	r_event0
	.word	r_evt_id
	.word	r_counter
	.word	r_l
	.word	r_x
.L1010:
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L58:
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+152
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L1009+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L1009+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L66:
	ldr	r3, .L1009+152
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L1009+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
	ldr	r3, .L1009+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L67:
	ldr	r3, .L1009+152
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L68
	ldr	r3, .L1009+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L1009+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L1009+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L68:
	ldr	r3, .L1009+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L1009+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
.L69:
	ldr	r3, .L1009+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L71
	ldr	r3, .L1009+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
.L71:
	ldr	r3, .L1009+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
	ldr	r3, .L1009+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
.L72:
	ldr	r3, .L1009+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L70:
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L73
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L73:
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L75
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L75:
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L76:
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L77
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
.L77:
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
.L78:
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L74:
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+184
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L82:
	ldr	r3, .L1009+184
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L83
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L83:
	ldr	r3, .L1009+184
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L1009+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L1009+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L1009+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L84:
	ldr	r3, .L1009+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L85
	ldr	r3, .L1009+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L85:
	ldr	r3, .L1009+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L1009+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L87:
	ldr	r3, .L1009+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L1009+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
.L88:
	ldr	r3, .L1009+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L86:
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L89:
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L91
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L91:
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L92
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L92:
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L93
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
.L93:
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
.L94:
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L90:
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+216
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+208
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+212
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+216
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L98
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L98
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L98:
	ldr	r3, .L1009+216
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L99:
	ldr	r3, .L1009+216
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L1009+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L1009+224
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L1009+228
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L100:
	ldr	r3, .L1009+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L101
	ldr	r3, .L1009+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
.L101:
	ldr	r3, .L1009+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
	ldr	r3, .L1009+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
.L103:
	ldr	r3, .L1009+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L1009+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
.L104:
	ldr	r3, .L1009+232
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+236
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L102:
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L105:
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L107:
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L108
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L108:
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L109
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L106
.L109:
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L110
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
.L110:
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L106:
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+248
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+240
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+244
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+248
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L114
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L114:
	ldr	r3, .L1009+248
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L115:
	ldr	r3, .L1009+248
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L116
	ldr	r3, .L1009+252
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1009+256
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L1009+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L116:
	ldr	r3, .L1009+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
	ldr	r3, .L1009+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L117:
	ldr	r3, .L1009+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L1009+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L119:
	ldr	r3, .L1009+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L120
	ldr	r3, .L1009+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
.L120:
	ldr	r3, .L1009+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L118:
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L121
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L121:
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L123:
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L124:
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L125
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
.L125:
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L126
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
.L126:
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L122:
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+284
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+272
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+276
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+284
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+280
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L130
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L130:
	ldr	r3, .L1009+284
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L131:
	ldr	r3, .L1009+284
	ldr	r3, [r3]	@ float
	ldr	r1, .L1009+288
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L132
	ldr	r3, .L1009+292
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L1009+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L132
	ldr	r3, .L1009+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
.L132:
	ldr	r3, .L1009+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L8
	ldr	r3, .L1009+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L1009+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
.L134:
	ldr	r3, .L1009+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L136
	ldr	r3, .L1009+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L135
.L136:
	ldr	r3, .L1009+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1009+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L8
.L135:
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L137
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L137
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L137
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L137
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L137
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L137
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L137
	ldr	r3, .L1009+312
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L8
.L137:
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L138
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L138
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L138
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L138
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L138
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L138
	ldr	r3, .L1009+316
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L8
.L138:
	ldr	r3, .L1009+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L139
	ldr	r3, .L1009+324
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
.L139:
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	ldr	r2, .L1012
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L8
	mov	r3, #1
	b	.L143
.L8:
	mov	r3, #0
.L143:
	str	r3, [fp, #-24]
	b	.L144
.L1013:
	.align	2
.L1012:
	.word	_diverge_delta
	.word	_x_s2_evt0
	.word	_x_r_event0
	.word	_x_s5_y
	.word	_x_s1_l2
	.word	_x_s4_l1
	.word	_x_s4_l0
	.word	_x__diverge_delta
	.word	_x_s2_evt1
	.word	_x_s2_l0
	.word	_x_s5_evt0
	.word	_x_s6_z
	.word	_x_s1_evt0
	.word	_x_s1_z
	.word	_x_s4_y
	.word	_x_s1_y
	.word	_x_s4_x
	.word	_x_s1_x
	.word	_x_s2_y
	.word	_x_s5_x
	.word	_x_s0_l2
	.word	_x_s6_evt1
	.word	_x_s3_l1
	.word	_x_s2_x
	.word	_x_r_evt_id
	.word	_x_s6_l0
	.word	_x_s0_x
	.word	_x_s6_l1
	.word	_x_s0_y
	.word	_x_s3_x
	.word	_x_s2_z
	.word	_x_r_l
	.word	_x_s6_l2
	.word	_x_s0_z
	.word	_x_s3_y
	.word	_x_s6_x
	.word	_x_r_counter
	.word	_x_s0_evt0
	.word	_x_r_event1
	.word	_x_s5_z
	.word	_x_r_x
	.word	_x_s0_evt1
	.word	_x_s0_l0
	.word	_x_s3_evt0
	.word	_x_s1_evt1
	.word	_x_s1_l0
	.word	_x_s4_evt0
	.word	_x_s5_l0
	.word	_x_s2_l2
	.word	_x_s5_l1
	.word	_x_s3_z
	.word	_x_s6_y
	.word	_x_s0_l1
	.word	_x_s3_evt1
	.word	_x_s3_l0
	.word	_x_s6_evt0
	.word	_x_s3_l2
	.word	_x_s4_z
	.word	_x_s1_l1
	.word	_x_s4_evt1
	.word	_x_s4_l2
	.word	_x_s2_l1
	.word	_x_s5_evt1
	.word	_x_delta
	.word	_x_s5_l2
	.word	_x_s7_evt0
	.word	_x_s7_evt1
	.word	_x_s7_l2
	.word	_x_s7_l0
	.word	_x_s7_l1
	.word	_x_s7_x
	.word	_x_s7_z
	.word	s7_y
	.word	_x_s7_y
	.word	s7_l2
	.word	s7_l0
	.word	s7_l1
	.word	s7_evt1
	.word	s7_x
	.word	1101004800
	.word	s7_z
	.word	1123024896
	.word	delta
	.word	s7_evt0
.L799:
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+284
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+292
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+280
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+4
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+8
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+12
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+20
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+260
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+40
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+44
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+52
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+56
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+276
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+60
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+64
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+68
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+72
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+76
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+92
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1012+96
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+100
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+104
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+112
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+116
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+120
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+132
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+136
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+140
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L1012+144
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+148
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+156
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+160
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+172
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+176
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+184
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+196
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+200
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+204
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+208
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+212
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+216
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+220
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+224
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+228
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+232
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+240
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+248
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L1012+252
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1012+256
	strb	r2, [r3]
	ldr	r3, .L1012+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L145
	ldr	r3, .L1012+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L145:
	ldr	r3, .L1012+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L147
	ldr	r3, .L1012+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L147:
	ldr	r3, .L1012+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L1012+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L146
.L148:
	ldr	r3, .L1012+260
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+264
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L146:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L150:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L152
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L152:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L153
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L153:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
.L154:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L155
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
.L155:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L151:
	ldr	r3, .L1012+280
	ldr	r3, [r3]	@ float
	ldr	r1, .L1012+316
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L156:
	ldr	r3, .L1012+280
	ldr	r3, [r3]	@ float
	ldr	r1, .L1012+324
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L157:
	ldr	r3, .L1012+280
	ldr	r3, [r3]	@ float
	ldr	r1, .L1012+324
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L158
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L158:
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L159
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1012+312
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1012+280
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1012+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1012+292
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1012+320
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1012+284
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L159:
	ldr	r3, .L1012+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1012+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1012+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1012+312
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1012+280
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1012+288
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1012+292
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L163
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1012+320
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1012+284
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L166
.L163:
	ldr	r3, .L1012+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L1012+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L166:
	ldr	r3, .L1012+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1012+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L167
	ldr	r3, .L1012+280
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1012+292
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L1012+320
	ldr	r3, [r3]	@ float
	ldr	r2, .L1012+284
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L170
.L167:
	ldr	r3, .L1012+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1012+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1012+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L170
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L1012+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1012+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L170:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
.L171:
	ldr	r3, .L1012+268
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L173
	ldr	r3, .L1012+272
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L1012+276
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L173
.L172:
	ldr	r3, .L1012+312
	ldr	r3, [r3]	@ float
	ldr	r2, .L1012+280
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L1012+320
	ldr	r3, [r3]	@ float
	ldr	r2, .L1012+284
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L1012+288
	ldr	r3, [r3]	@ float
	ldr	r2, .L1012+292
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L176
.L173:
	ldr	r3, .L1012+296
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L1012+300
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L1012+304
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L1012+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1012+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L176:
	ldr	r3, .L1012+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1012+308
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L1012+312
	ldr	r3, [r3]	@ float
	ldr	r1, .L1012+316
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L1012+320
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1012+324
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L179
	mov	r3, #0
	mov	r4, r3
.L179:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L180
.L177:
	ldr	r3, .L1012+328
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1012+332
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
.L181:
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L180
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L180:
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L182
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L1014+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L182
	ldr	r3, .L1014+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L184
.L182:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L185
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
.L185:
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L184:
	ldr	r3, .L1014+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L186
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L186
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1014+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L1014+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L189
.L186:
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L189
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L189:
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L1014+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1014+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L190
	ldr	r3, .L1014+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L193
.L190:
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L193
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L193:
	ldr	r3, .L1014+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1014+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1014+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
.L198:
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
.L194:
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L199:
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L200
	ldr	r3, .L1014+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L1014+48
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L202
	mov	r3, #0
	mov	r4, r3
.L202:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L203
.L200:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
.L204:
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L203:
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L205
	ldr	r3, .L1014+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L1014+48
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L207
.L205:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
.L208:
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L207
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L207:
	ldr	r3, .L1014+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L1014+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L1014+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L209
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L1014+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L1014+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L1014+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
.L209:
	ldr	r3, .L1014+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L1014+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L1014+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L213
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L1014+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L213:
	ldr	r3, .L1014+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L214
	ldr	r3, .L1014+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L214:
	ldr	r3, .L1014+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L1014+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L216:
	ldr	r3, .L1014+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L1014+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
.L217:
	ldr	r3, .L1014+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L215:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
.L218:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L220
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
.L220:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L221
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
.L221:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
.L222:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
.L223:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L219:
	ldr	r3, .L1014+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L224
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L224
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L224:
	ldr	r3, .L1014+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L225
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L225:
	ldr	r3, .L1014+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L226:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L227
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L227:
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	b	.L1015
.L1016:
	.align	2
.L1014:
	.word	s7_evt1
	.word	s7_l2
	.word	s7_l0
	.word	s7_l1
	.word	_x_s7_l2
	.word	_x_s7_l1
	.word	_x_s7_l0
	.word	s7_evt0
	.word	s7_x
	.word	s7_z
	.word	_x_s7_z
	.word	_x_s7_x
	.word	s7_y
	.word	_x_s7_y
	.word	_x_s6_evt0
	.word	_x_s6_evt1
	.word	1101004800
	.word	s6_z
	.word	_x_s6_z
	.word	s6_x
	.word	_x_s6_x
	.word	s6_y
	.word	_x_s6_y
	.word	_x_s6_l2
	.word	_x_s6_l0
	.word	_x_s6_l1
	.word	s6_l2
	.word	s6_l0
	.word	s6_l1
	.word	s6_evt0
	.word	s6_evt1
	.word	_x_s5_evt0
	.word	_x_s5_evt1
	.word	1101004800
	.word	1123024896
	.word	_x_s5_l2
	.word	s5_x
	.word	_x_s5_x
	.word	delta
	.word	s5_y
	.word	_x_s5_y
	.word	s5_l0
	.word	_x_s5_l0
	.word	s5_l1
	.word	_x_s5_l1
.L1015:
	cmp	r3, #0
	bne	.L234
.L231:
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L234:
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L1014+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L1014+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L238
.L235:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L238:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L239
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
.L239:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L241
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L241
.L240:
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L241
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L244
.L241:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L244
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L244
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L244:
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L245
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L245
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L247
	mov	r3, #0
	mov	r4, r3
.L247:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L248
.L245:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L249
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
.L249:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L248
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L248:
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L250
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L252
.L250:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
.L253:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L252
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L252:
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L254
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L257
.L254:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L257:
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L1014+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L1014+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L261
.L258:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L261
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L261
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L261:
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
.L266:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
.L262:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L267
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L267:
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L268
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L268
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L270
	mov	r3, #0
	mov	r4, r3
.L270:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L271
.L268:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L272
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
.L272:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L271
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L271
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L271:
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+64
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L275
.L273:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
.L276:
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L275
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L275:
	ldr	r3, .L1014+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1014+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1014+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1014+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L1014+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L1014+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L277
	ldr	r3, .L1014+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
.L277:
	ldr	r3, .L1014+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1014+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1014+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L281
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L1014+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1014+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L281:
	ldr	r3, .L1014+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L282
	ldr	r3, .L1014+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L282:
	ldr	r3, .L1014+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L1014+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L284:
	ldr	r3, .L1014+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L1014+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
.L285:
	ldr	r3, .L1014+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L283:
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L286:
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L288
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L288:
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L289:
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L287
.L290:
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L287
.L291:
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L287:
	ldr	r3, .L1014+148
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+132
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L292
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L292:
	ldr	r3, .L1014+148
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L293
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L293:
	ldr	r3, .L1014+148
	ldr	r3, [r3]	@ float
	ldr	r1, .L1014+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L294
	ldr	r3, .L1014+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L294:
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+148
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1014+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1014+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1014+172
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1014+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L295:
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+40
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+48
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L302
.L299:
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L302
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L302:
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L1017+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1017+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L306
.L303:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L306:
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L308
.L307:
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L309
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L309
.L308:
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L309
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L312
.L309:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L312:
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L313
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L315
	mov	r3, #0
	mov	r4, r3
.L315:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L316
.L313:
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
.L317:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L316:
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L320
.L318:
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L321
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
.L321:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L320
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L320:
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L322
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L325
.L322:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L325
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L325:
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L326
	ldr	r3, .L1017+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L1017+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L329
.L326:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L329
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L329:
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
.L334:
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
.L330:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L335
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L335:
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L336
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L336
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L338
	mov	r3, #0
	mov	r4, r3
.L338:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L339
.L336:
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L339
.L340:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L339:
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L341
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L341
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L341
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L343
.L341:
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
.L344:
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L343:
	ldr	r3, .L1017+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+16
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1017+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+40
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1017+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L1017+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L1017+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L1017+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
.L345:
	ldr	r3, .L1017
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1017+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1017+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L349
	ldr	r3, .L1017+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L1017+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L349:
	ldr	r3, .L1017+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L1017+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
.L350:
	ldr	r3, .L1017+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L1017+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
.L352:
	ldr	r3, .L1017+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L1017+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L351
.L353:
	ldr	r3, .L1017+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L351:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L354:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L356
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L356:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	b	.L1018
.L1019:
	.align	2
.L1017:
	.word	s5_l2
	.word	_x_s5_l2
	.word	delta
	.word	s5_z
	.word	_x_s5_z
	.word	s5_l0
	.word	_x_s5_l0
	.word	s5_l1
	.word	_x_s5_l1
	.word	s5_x
	.word	_x_s5_x
	.word	s5_y
	.word	_x_s5_y
	.word	s5_evt0
	.word	s5_evt1
	.word	_x_s4_evt0
	.word	_x_s4_evt1
	.word	_x_s4_x
	.word	_x_s4_y
	.word	s4_z
	.word	_x_s4_z
	.word	_x_s4_l1
	.word	s4_x
	.word	1101004800
	.word	s4_y
	.word	1123024896
	.word	delta
	.word	s4_evt0
	.word	s4_evt1
	.word	s4_l2
	.word	s4_l0
	.word	s4_l1
	.word	_x_s4_l2
	.word	_x_s4_l0
.L1018:
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L357:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L358
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
.L358:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
.L359:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L355:
	ldr	r3, .L1017+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L360
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L360:
	ldr	r3, .L1017+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L361:
	ldr	r3, .L1017+68
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L362
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L362:
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L363
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L363:
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1017+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L370
.L367:
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L370:
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L1017+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1017+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L374
.L371:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L374
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L374:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L375
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L375
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L376
.L375:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L377
.L376:
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L1017+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L380
.L377:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L380
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L380
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L380
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L380:
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
	mov	r3, #0
	mov	r4, r3
.L383:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L384
.L381:
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L384
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L385
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L384
.L385:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L384
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L384
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L384:
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L386
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L388
.L386:
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L389
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
.L389:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L388:
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L390
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L390
	ldr	r3, .L1017+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L393
.L390:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L393:
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L1017+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L1017+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L1017+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L397
.L394:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L397:
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1017+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1017+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1017+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L402
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
.L402:
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L398
	ldr	r3, .L1017+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
.L398:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L403
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L403
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L403:
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L1017+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1017+92
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L1017+96
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1017+100
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L406
	mov	r3, #0
	mov	r4, r3
.L406:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L407
.L404:
	ldr	r3, .L1017+104
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1017+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L1017+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
.L408:
	ldr	r3, .L1017+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1017+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L1017+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L407
	ldr	r3, .L1017+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1017+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L407
	ldr	r3, .L1020
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L407:
	ldr	r3, .L1020+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1020+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L1020+12
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+16
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L409
	ldr	r3, .L1020+20
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+24
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L411
.L409:
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L1020+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L412
	ldr	r3, .L1020+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L411
.L412:
	ldr	r3, .L1020+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1020+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1020
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1020+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L411
	ldr	r3, .L1020+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L1020+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L411:
	ldr	r3, .L1020+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+56
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1020+12
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1020+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+64
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1020+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L1020+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1020+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1020+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L1020
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
.L413:
	ldr	r3, .L1020+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L1020+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L1020+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L417
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L417
	ldr	r3, .L1020+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L417:
	ldr	r3, .L1020+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L1020+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
.L418:
	ldr	r3, .L1020+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L1020+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
.L420:
	ldr	r3, .L1020+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L1020+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
.L421:
	ldr	r3, .L1020+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L419:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
.L422:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
.L424:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L425
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
.L425:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L423
.L426:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L427
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L423
.L427:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L423:
	ldr	r3, .L1020+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+16
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L428:
	ldr	r3, .L1020+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L429
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L429:
	ldr	r3, .L1020+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+24
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L430
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L430:
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L431:
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L438
.L435:
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L438:
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L439
	ldr	r3, .L1020+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1020+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L439
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L442
.L439:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L442:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L443
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L444
.L443:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L445
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L445
.L444:
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L445
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L448
.L445:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L448:
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L449
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+16
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L449
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1020+24
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L451
	mov	r3, #0
	mov	r4, r3
.L451:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L452
.L449:
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
.L453:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L452
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L452:
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+16
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+24
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L456
.L454:
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
.L457:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L456
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L456:
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L461
.L458:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L1020+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L461
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L461:
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1021
.L1022:
	.align	2
.L1020:
	.word	_x_s4_l1
	.word	s4_evt1
	.word	s4_evt0
	.word	s4_x
	.word	1101004800
	.word	s4_y
	.word	1123024896
	.word	delta
	.word	_x_s4_l2
	.word	_x_s4_l0
	.word	s4_l2
	.word	s4_l0
	.word	s4_l1
	.word	s4_z
	.word	_x_s4_z
	.word	_x_s4_x
	.word	_x_s4_y
	.word	_x_s3_evt0
	.word	_x_s3_evt1
	.word	s3_z
	.word	_x_s3_z
	.word	s3_x
	.word	_x_s3_x
	.word	s3_y
	.word	_x_s3_y
	.word	_x_s3_l2
	.word	_x_s3_l0
	.word	_x_s3_l1
	.word	s3_l2
	.word	s3_l0
	.word	s3_l1
	.word	s3_evt0
	.word	s3_evt1
	.word	_x_s2_evt0
	.word	_x_s2_evt1
	.word	1123024896
	.word	_x_s2_l2
	.word	_x_s2_l0
	.word	_x_s2_l1
	.word	_x_s2_x
	.word	s2_z
	.word	_x_s2_z
	.word	s2_y
	.word	_x_s2_y
	.word	s2_l2
	.word	s2_l0
	.word	s2_l1
	.word	delta
	.word	s2_evt0
	.word	s2_evt1
	.word	s2_x
	.word	1101004800
.L1021:
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L1020+88
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L1020+80
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L465
.L462:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L465
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L465:
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
.L470:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
.L466:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L471
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L471
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L471:
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+204
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L472
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1020+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L474
	mov	r3, #0
	mov	r4, r3
.L474:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L475
.L472:
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L476
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
.L476:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L475:
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L477
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+204
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L477
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L479
.L477:
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
.L480:
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L479
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L479:
	ldr	r3, .L1020+76
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+80
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L1020+84
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+88
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L1020+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L481
	ldr	r3, .L1020+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L481
	ldr	r3, .L1020+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L481
	ldr	r3, .L1020+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
.L481:
	ldr	r3, .L1020+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L1020+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L1020+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L1020+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L485:
	ldr	r3, .L1020+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L1020+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
.L486:
	ldr	r3, .L1020+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L488
	ldr	r3, .L1020+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
.L488:
	ldr	r3, .L1020+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L1020+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L487
.L489:
	ldr	r3, .L1020+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L487:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
.L490:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
.L492:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
.L493:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L494
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L494
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L491
.L494:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
.L495:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L491:
	ldr	r3, .L1020+156
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+204
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L496:
	ldr	r3, .L1020+156
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L497
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L497
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L497:
	ldr	r3, .L1020+156
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L498
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L498:
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+200
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L499:
	ldr	r3, .L1020+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1020+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1020+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+200
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L503
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1020+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1020+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L506
.L503:
	ldr	r3, .L1020+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L1020+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L506:
	ldr	r3, .L1020+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1020+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L1020+156
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1020+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L1020+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+164
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L510
.L507:
	ldr	r3, .L1020+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1020+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1020+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L510
	ldr	r3, .L1020+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L510:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L511
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
.L511:
	ldr	r3, .L1020+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L1020+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1020+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L513
.L512:
	ldr	r3, .L1020+200
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+156
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1020+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+164
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L1020+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L1020+172
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L516
.L513:
	ldr	r3, .L1020+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L1020+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L1020+184
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L1020+188
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L1020+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1020+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L516:
	ldr	r3, .L1020+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1020+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L1020+200
	ldr	r3, [r3]	@ float
	ldr	r1, .L1020+204
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L517
	ldr	r3, .L1023
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1023+4
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L519
	mov	r3, #0
	mov	r4, r3
.L519:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L520
.L517:
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L521
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
.L521:
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L520:
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L1023+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L1023
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+4
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L524
.L522:
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L525
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
.L525:
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L524:
	ldr	r3, .L1023
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1023+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L526
	ldr	r3, .L1023+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L529
.L526:
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L529
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L529
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L529:
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L1023+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1023+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L530
	ldr	r3, .L1023+48
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L533
.L530:
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L533
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L533:
	ldr	r3, .L1023+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1023+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1023
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
.L538:
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
.L534:
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L539:
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L540
	ldr	r3, .L1023+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L1023+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1023+4
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L542
	mov	r3, #0
	mov	r4, r3
.L542:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L543
.L540:
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
.L544:
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L543:
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L1023+44
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L1023+56
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+4
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L547
.L545:
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L548:
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L547:
	ldr	r3, .L1023
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+48
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L1023+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+52
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L1023+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+60
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L1023+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L1023+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L549
	ldr	r3, .L1023+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
.L549:
	ldr	r3, .L1023+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1023+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1023+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L553
	ldr	r3, .L1023+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L553:
	ldr	r3, .L1023+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L1023+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
.L554:
	ldr	r3, .L1023+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L556
	ldr	r3, .L1023+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
.L556:
	ldr	r3, .L1023+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L557
	ldr	r3, .L1023+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L555
.L557:
	ldr	r3, .L1023+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L555:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
.L558:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L560
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
.L560:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
.L561:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L562
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L559
.L562:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L563
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L559
.L563:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L559:
	ldr	r3, .L1023+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L564:
	ldr	r3, .L1023+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+4
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L565:
	ldr	r3, .L1023+84
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+4
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L566
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L566
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L566
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L566:
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L567
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L567:
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+84
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L1023+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	b	.L1024
.L1025:
	.align	2
.L1023:
	.word	s2_z
	.word	1123024896
	.word	delta
	.word	s2_evt0
	.word	s2_evt1
	.word	s2_l2
	.word	s2_l0
	.word	s2_l1
	.word	_x_s2_l2
	.word	_x_s2_l1
	.word	_x_s2_l0
	.word	s2_x
	.word	_x_s2_z
	.word	_x_s2_x
	.word	s2_y
	.word	_x_s2_y
	.word	_x_s1_evt0
	.word	_x_s1_evt1
	.word	s1_z
	.word	_x_s1_z
	.word	s1_x
	.word	_x_s1_x
	.word	s1_y
	.word	_x_s1_y
	.word	_x_s1_l2
	.word	_x_s1_l0
	.word	_x_s1_l1
	.word	s1_l2
	.word	s1_l0
	.word	s1_l1
	.word	s1_evt0
	.word	s1_evt1
	.word	_x_s0_evt0
	.word	_x_s0_evt1
	.word	1101004800
	.word	1123024896
	.word	_x_s0_l2
	.word	_x_s0_l0
	.word	_x_s0_l1
	.word	s0_x
	.word	_x_s0_x
	.word	delta
	.word	s0_y
	.word	_x_s0_y
.L1024:
	mov	r5, r1
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L574
.L571:
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L574:
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L1023+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1023+92
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L578
.L575:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L578
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L578
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L578:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L580
.L579:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L581
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L581
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L581
.L580:
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L581
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L581
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L584
.L581:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L584
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L584
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L584
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L584:
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L585
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L585
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1023+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L587
	mov	r3, #0
	mov	r4, r3
.L587:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L588
.L585:
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L588
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L589
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L588
.L589:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L588
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L588
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L588:
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L590
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L590
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L592
.L590:
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L593
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
.L593:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L592
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L592
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L592:
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L594
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L594
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L594
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L597
.L594:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L597
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L597
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L597:
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L598
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L598
	ldr	r3, .L1023+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L598
	ldr	r3, .L1023+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L601
.L598:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L601
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L601
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L601:
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L606
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
.L606:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L602
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
.L602:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L607
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L607
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L607
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L607:
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L608
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L608
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L608
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1023+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L610
	mov	r3, #0
	mov	r4, r3
.L610:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L611
.L608:
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L612
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
.L612:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L611
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L611
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L611:
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L613
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L613
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+140
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L615
.L613:
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L616
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
.L616:
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L615
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L615
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L615:
	ldr	r3, .L1023+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1023+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+84
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1023+88
	ldr	r3, [r3]	@ float
	ldr	r2, .L1023+92
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L617
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1023+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1023+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L617
	ldr	r3, .L1023+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
.L617:
	ldr	r3, .L1023+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1023+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1023+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L621
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L621
	ldr	r3, .L1023+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1023+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L621:
	ldr	r3, .L1023+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L622
	ldr	r3, .L1023+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L622:
	ldr	r3, .L1023+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L624
	ldr	r3, .L1023+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L624:
	ldr	r3, .L1023+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L625
	ldr	r3, .L1023+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L623
.L625:
	ldr	r3, .L1023+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L623:
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L626
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
.L626:
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L628
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L628
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
.L628:
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L629
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L629
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
.L629:
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L630
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L630
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L627
.L630:
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L631
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L631
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L627
.L631:
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L627:
	ldr	r3, .L1023+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+136
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L632
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L632
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L632:
	ldr	r3, .L1023+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L633
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L633
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L633
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L633:
	ldr	r3, .L1023+160
	ldr	r3, [r3]	@ float
	ldr	r1, .L1023+140
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L634
	ldr	r3, .L1023+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1023+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L634
	ldr	r3, .L1023+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L634:
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L635
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1023+156
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1023+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1023+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1023+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1026+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L635:
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1026+36
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1026+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L639
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1026+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L642
.L639:
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L642
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L642:
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L643
	ldr	r3, .L1026+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1026+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L643
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L646
.L643:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L646
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L646
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L646:
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L647
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L647
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L648
.L647:
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L649
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L649
.L648:
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L649
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L652
.L649:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L652
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L652
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L652:
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L653
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L653
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1026+48
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L653
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1026+52
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L655
	mov	r3, #0
	mov	r4, r3
.L655:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L656
.L653:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L657
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
.L657:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L656
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L656
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L656:
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L658
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1026+48
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L658
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	ldr	r1, .L1026+52
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L660
.L658:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L661
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
.L661:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L660
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L660
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L660:
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L662
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L662
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L665
.L662:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L665
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L665
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L665
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L665:
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L666
	ldr	r3, .L1026+36
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L666
	ldr	r3, .L1026+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L669
.L666:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L669
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L669
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L669:
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L674
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
.L674:
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L670
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
.L670:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L675
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L675
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L675:
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L676
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1026+48
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L676
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	ldr	r1, .L1026+52
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L678
	mov	r3, #0
	mov	r4, r3
.L678:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L679
.L676:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L680
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
.L680:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L679
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L679
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L679:
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L681
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r1, .L1026+48
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L681
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	ldr	r1, .L1026+52
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L683
.L681:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L684
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L683
.L684:
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L683
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L683
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L683:
	ldr	r3, .L1026+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L1026+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+36
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L1026+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L685
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L685
	ldr	r3, .L1026+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L685
	ldr	r3, .L1026+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L685
	ldr	r3, .L1026+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
.L685:
	ldr	r3, .L1026+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L1026
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L1026+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L689
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L689
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
.L689:
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L690
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L690
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L690
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L690
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L690
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L690
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L690
	ldr	r3, .L1026+56
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L149
	b	.L1027
.L1028:
	.align	2
.L1026:
	.word	s0_l0
	.word	_x_s0_l0
	.word	s0_l1
	.word	_x_s0_l1
	.word	s0_l2
	.word	_x_s0_l2
	.word	s0_z
	.word	_x_s0_z
	.word	s0_x
	.word	_x_s0_x
	.word	s0_y
	.word	_x_s0_y
	.word	1101004800
	.word	1123024896
	.word	_x_r_evt_id
	.word	r_x
	.word	_x_r_l
	.word	_x_r_counter
	.word	_x_r_x
	.word	r_l
	.word	r_counter
	.word	_x_delta
	.word	s7_evt0
	.word	s7_evt1
	.word	s0_evt0
	.word	s0_evt1
	.word	s1_evt0
	.word	s1_evt1
	.word	s2_evt0
	.word	s2_evt1
	.word	s3_evt0
	.word	s3_evt1
	.word	s4_evt0
	.word	s4_evt1
	.word	s5_evt0
	.word	s5_evt1
	.word	s6_evt1
	.word	r_event0
	.word	r_event1
	.word	r_evt_id
	.word	delta
	.word	s6_evt0
.L1027:
.L690:
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L691
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L691
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L691
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L691
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L691
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L691
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L691
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L149
.L691:
	ldr	r3, .L1026+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L692
	ldr	r3, .L1026+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L692:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L694
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1026+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1026+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1026+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1026+80
	ldr	r2, [r3]
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L149
.L694:
	ldr	r3, .L1026+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L1026+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L696
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1026+60
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1026+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L696
	ldr	r3, .L1026+80
	ldr	r2, [r3]
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L698
.L696:
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L698
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
.L698:
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1026+60
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L699
	ldr	r3, .L1026+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L699
	ldr	r3, .L1026+156
	ldr	r2, [r3]
	ldr	r3, .L1026+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L699
	ldr	r3, .L1026+80
	ldr	r2, [r3]
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L699
	ldr	r3, .L1026+60
	ldr	r3, [r3]	@ float
	ldr	r2, .L1026+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L701
.L699:
	ldr	r3, .L1026+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L702
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L701
.L702:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L149
.L701:
	ldr	r3, .L1026+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L704
	ldr	r3, .L1026+156
	ldr	r2, [r3]
	ldr	r3, .L1026+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L704
	ldr	r3, .L1026+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L704
	ldr	r3, .L1026+80
	ldr	r2, [r3]
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	sub	r3, r2, r3
	cmn	r3, #1
	beq	.L706
.L704:
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L707
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L706
.L707:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L706
	ldr	r3, .L1026+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L706
	ldr	r3, .L1026+80
	ldr	r3, [r3]
	cmp	r3, #6
	ble	.L149
.L706:
	ldr	r3, .L1026+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L708
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1026+156
	ldr	r2, [r3]
	ldr	r3, .L1026+80
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L708
	ldr	r3, .L1026+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L708
	ldr	r3, .L1026+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L709
.L708:
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L710
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L709
.L710:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L709
	ldr	r3, .L1026+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L709
	ldr	r3, .L1026+80
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L149
.L709:
	ldr	r3, .L1026+84
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L1026+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L712
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L149
.L712:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L714
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L715
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L715
	mov	r3, #1
	b	.L716
.L715:
	mov	r3, #0
.L716:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L717
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L717
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L717
	mov	r3, #1
	b	.L718
.L717:
	mov	r3, #0
.L718:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L714:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L719
	ldr	r3, .L1026+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	ldr	r3, .L1026+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L720
	mov	r3, #1
	b	.L721
.L720:
	mov	r3, #0
.L721:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L722
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L722
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L722
	mov	r3, #1
	b	.L723
.L722:
	mov	r3, #0
.L723:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L719:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L724
	ldr	r3, .L1026+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L725
	ldr	r3, .L1026+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L725
	mov	r3, #1
	b	.L726
.L725:
	mov	r3, #0
.L726:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L727
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L727
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L727
	mov	r3, #1
	b	.L728
.L727:
	mov	r3, #0
.L728:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L724:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L729
	ldr	r3, .L1026+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L730
	ldr	r3, .L1026+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L730
	mov	r3, #1
	b	.L731
.L730:
	mov	r3, #0
.L731:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L732
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L732
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L732
	mov	r3, #1
	b	.L733
.L732:
	mov	r3, #0
.L733:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L729:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L734
	ldr	r3, .L1026+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L735
	ldr	r3, .L1026+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L735
	mov	r3, #1
	b	.L736
.L735:
	mov	r3, #0
.L736:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L737
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L737
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L737
	mov	r3, #1
	b	.L738
.L737:
	mov	r3, #0
.L738:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L734:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L739
	ldr	r3, .L1026+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	ldr	r3, .L1026+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L740
	mov	r3, #1
	b	.L741
.L740:
	mov	r3, #0
.L741:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L742
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L742
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L742
	mov	r3, #1
	b	.L743
.L742:
	mov	r3, #0
.L743:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L739:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L744
	ldr	r3, .L1026+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L745
	ldr	r3, .L1026+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L745
	mov	r3, #1
	b	.L746
.L745:
	mov	r3, #0
.L746:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L747
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L747
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L747
	mov	r3, #1
	b	.L748
.L747:
	mov	r3, #0
.L748:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L744:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L749
	ldr	r3, .L1026+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	ldr	r3, .L1026+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L750
	mov	r3, #1
	b	.L751
.L750:
	mov	r3, #0
.L751:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L752
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L752
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L752
	mov	r3, #1
	b	.L753
.L752:
	mov	r3, #0
.L753:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L749:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L754
	ldr	r3, .L1026+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L755
	ldr	r3, .L1026+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L755
	mov	r3, #1
	b	.L756
.L755:
	mov	r3, #0
.L756:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L757
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L757
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L757
	mov	r3, #1
	b	.L758
.L757:
	mov	r3, #0
.L758:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L754:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L759
	ldr	r3, .L1026+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	ldr	r3, .L1026+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L760
	mov	r3, #1
	b	.L761
.L760:
	mov	r3, #0
.L761:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L762
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L762
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L762
	mov	r3, #1
	b	.L763
.L762:
	mov	r3, #0
.L763:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L759:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L764
	ldr	r3, .L1026+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L765
	ldr	r3, .L1026+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L765
	mov	r3, #1
	b	.L766
.L765:
	mov	r3, #0
.L766:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L767
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L767
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L767
	mov	r3, #1
	b	.L768
.L767:
	mov	r3, #0
.L768:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L764:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L769
	ldr	r3, .L1026+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	ldr	r3, .L1026+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L770
	mov	r3, #1
	b	.L771
.L770:
	mov	r3, #0
.L771:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L772
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L772
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L772
	mov	r3, #1
	b	.L773
.L772:
	mov	r3, #0
.L773:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L769:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L774
	ldr	r3, .L1026+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L775
	ldr	r3, .L1026+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L775
	mov	r3, #1
	b	.L776
.L775:
	mov	r3, #0
.L776:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1026+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L777
	ldr	r3, .L1026+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L777
	ldr	r3, .L1026+156
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L777
	mov	r3, #1
	b	.L778
.L777:
	mov	r3, #0
.L778:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L774:
	ldr	r3, .L1026+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L779
	ldr	r3, .L1026+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
	ldr	r3, .L1029
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L780
	mov	r3, #1
	b	.L781
.L780:
	mov	r3, #0
.L781:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1029+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L782
	ldr	r3, .L1029+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L782
	ldr	r3, .L1029+12
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L782
	mov	r3, #1
	b	.L783
.L782:
	mov	r3, #0
.L783:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L779:
	ldr	r3, .L1029+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L784
	ldr	r3, .L1029+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L785
	ldr	r3, .L1029+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L785
	mov	r3, #1
	b	.L786
.L785:
	mov	r3, #0
.L786:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1029+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L787
	ldr	r3, .L1029+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L787
	ldr	r3, .L1029+12
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L787
	mov	r3, #1
	b	.L788
.L787:
	mov	r3, #0
.L788:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L784:
	ldr	r3, .L1029+16
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L789
	ldr	r3, .L1029+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	ldr	r3, .L1029+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L790
	mov	r3, #1
	b	.L791
.L790:
	mov	r3, #0
.L791:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L1029+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L792
	ldr	r3, .L1029+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L792
	ldr	r3, .L1029+12
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L792
	mov	r3, #1
	b	.L793
.L792:
	mov	r3, #0
.L793:
	and	r3, r3, #1
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L789:
	ldr	r3, .L1029+16
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L794
	ldr	r3, .L1029+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L795
	mov	r3, #0
	mov	r4, r3
.L795:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L149
.L794:
	ldr	r3, .L1029+32
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L796
	ldr	r3, .L1029+16
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L1029+32
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L1029+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L149
.L796:
	mov	r3, #1
	b	.L798
.L149:
	mov	r3, #0
.L798:
	str	r3, [fp, #-24]
	ldr	r3, .L1029+36
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+40
	str	r3, [r2]	@ float
	ldr	r3, .L1029+44
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+48
	str	r3, [r2]	@ float
	ldr	r3, .L1029+52
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+56
	str	r3, [r2]	@ float
	ldr	r3, .L1029+60
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+64
	strb	r2, [r3]
	ldr	r3, .L1029+68
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+8
	strb	r2, [r3]
	ldr	r3, .L1029+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+76
	str	r3, [r2]	@ float
	ldr	r3, .L1029+80
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+84
	strb	r2, [r3]
	ldr	r3, .L1029+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+20
	strb	r2, [r3]
	ldr	r3, .L1029+92
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+96
	strb	r2, [r3]
	ldr	r3, .L1029+100
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+24
	strb	r2, [r3]
	ldr	r3, .L1029+104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+108
	strb	r2, [r3]
	ldr	r3, .L1029+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+32
	str	r3, [r2]	@ float
	ldr	r3, .L1029+112
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+116
	strb	r2, [r3]
	ldr	r3, .L1029+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+124
	strb	r2, [r3]
	ldr	r3, .L1029+128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+132
	strb	r2, [r3]
	ldr	r3, .L1029+136
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+140
	str	r3, [r2]	@ float
	ldr	r3, .L1029+144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+148
	strb	r2, [r3]
	ldr	r3, .L1029+152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+156
	strb	r2, [r3]
	ldr	r3, .L1029+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+164
	str	r3, [r2]	@ float
	ldr	r3, .L1029+168
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+172
	str	r3, [r2]	@ float
	ldr	r3, .L1029+176
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+180
	strb	r2, [r3]
	ldr	r3, .L1029+184
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+188
	str	r3, [r2]	@ float
	ldr	r3, .L1029+192
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+196
	str	r3, [r2]	@ float
	ldr	r3, .L1029+200
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+204
	strb	r2, [r3]
	ldr	r3, .L1029+208
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+212
	str	r3, [r2]	@ float
	ldr	r3, .L1029+216
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+220
	str	r3, [r2]	@ float
	ldr	r3, .L1029+224
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+228
	str	r3, [r2]	@ float
	ldr	r3, .L1029+232
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+236
	strb	r2, [r3]
	ldr	r3, .L1029+240
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029
	strb	r2, [r3]
	ldr	r3, .L1029+244
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+248
	strb	r2, [r3]
	ldr	r3, .L1029+252
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+256
	str	r3, [r2]	@ float
	ldr	r3, .L1029+260
	ldr	r3, [r3]
	ldr	r2, .L1029+12
	str	r3, [r2]
	ldr	r3, .L1029+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+268
	strb	r2, [r3]
	ldr	r3, .L1029+272
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+276
	str	r3, [r2]	@ float
	ldr	r3, .L1029+280
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+284
	strb	r2, [r3]
	ldr	r3, .L1029+288
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+292
	str	r3, [r2]	@ float
	ldr	r3, .L1029+296
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+300
	str	r3, [r2]	@ float
	ldr	r3, .L1029+304
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+308
	str	r3, [r2]	@ float
	ldr	r3, .L1029+312
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+316
	strb	r2, [r3]
	ldr	r3, .L1029+320
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+324
	strb	r2, [r3]
	ldr	r3, .L1029+328
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+332
	str	r3, [r2]	@ float
	ldr	r3, .L1029+336
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+340
	str	r3, [r2]	@ float
	ldr	r3, .L1029+344
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+348
	str	r3, [r2]	@ float
	ldr	r3, .L1029+352
	ldr	r3, [r3]
	ldr	r2, .L1029+356
	str	r3, [r2]
	ldr	r3, .L1029+360
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+364
	strb	r2, [r3]
	ldr	r3, .L1029+368
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+4
	strb	r2, [r3]
	ldr	r3, .L1029+372
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+376
	str	r3, [r2]	@ float
	ldr	r3, .L1029+380
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+384
	str	r3, [r2]	@ float
	ldr	r3, .L1029+388
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+392
	strb	r2, [r3]
	ldr	r3, .L1029+396
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+400
	strb	r2, [r3]
	ldr	r3, .L1029+404
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+408
	strb	r2, [r3]
	ldr	r3, .L1029+412
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+416
	strb	r2, [r3]
	ldr	r3, .L1029+420
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+424
	strb	r2, [r3]
	ldr	r3, .L1029+428
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+432
	strb	r2, [r3]
	ldr	r3, .L1029+436
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+440
	strb	r2, [r3]
	ldr	r3, .L1029+444
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+448
	strb	r2, [r3]
	ldr	r3, .L1029+452
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+456
	strb	r2, [r3]
	ldr	r3, .L1029+460
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+464
	str	r3, [r2]	@ float
	ldr	r3, .L1029+468
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+472
	str	r3, [r2]	@ float
	ldr	r3, .L1029+476
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+480
	strb	r2, [r3]
	ldr	r3, .L1029+484
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+488
	strb	r2, [r3]
	ldr	r3, .L1029+492
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+496
	strb	r2, [r3]
	ldr	r3, .L1029+500
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+504
	strb	r2, [r3]
	ldr	r3, .L1029+508
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+512
	strb	r2, [r3]
	ldr	r3, .L1029+516
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+520
	str	r3, [r2]	@ float
	ldr	r3, .L1029+524
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+528
	strb	r2, [r3]
	ldr	r3, .L1029+532
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+536
	strb	r2, [r3]
	ldr	r3, .L1029+540
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+544
	strb	r2, [r3]
	ldr	r3, .L1029+548
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+552
	strb	r2, [r3]
	ldr	r3, .L1029+556
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+560
	strb	r2, [r3]
	ldr	r3, .L1029+564
	ldr	r3, [r3]	@ float
	ldr	r2, .L1029+16
	str	r3, [r2]	@ float
	ldr	r3, .L1029+568
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L1029+572
	strb	r2, [r3]
.L144:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L799
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L1030:
	.align	2
.L1029:
	.word	s6_evt1
	.word	r_event1
	.word	r_event0
	.word	r_evt_id
	.word	delta
	.word	s7_evt1
	.word	s7_evt0
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_s7_z
	.word	s7_z
	.word	_x_s7_y
	.word	s7_y
	.word	_x_s7_x
	.word	s7_x
	.word	_x_s2_evt0
	.word	s2_evt0
	.word	_x_r_event0
	.word	_x_s5_y
	.word	s5_y
	.word	_x_s1_l2
	.word	s1_l2
	.word	_x_s7_evt1
	.word	_x_s4_l1
	.word	s4_l1
	.word	_x_s7_evt0
	.word	_x_s4_l0
	.word	s4_l0
	.word	_x_s2_evt1
	.word	s2_evt1
	.word	_x_s2_l0
	.word	s2_l0
	.word	_x_s5_evt0
	.word	s5_evt0
	.word	_x_s6_z
	.word	s6_z
	.word	_x_s1_evt0
	.word	s1_evt0
	.word	_x_s7_l2
	.word	s7_l2
	.word	_x_s1_z
	.word	s1_z
	.word	_x_s4_y
	.word	s4_y
	.word	_x_s7_l1
	.word	s7_l1
	.word	_x_s1_y
	.word	s1_y
	.word	_x_s4_x
	.word	s4_x
	.word	_x_s7_l0
	.word	s7_l0
	.word	_x_s1_x
	.word	s1_x
	.word	_x_s2_y
	.word	s2_y
	.word	_x_s5_x
	.word	s5_x
	.word	_x_s0_l2
	.word	s0_l2
	.word	_x_s6_evt1
	.word	_x_s3_l1
	.word	s3_l1
	.word	_x_s2_x
	.word	s2_x
	.word	_x_r_evt_id
	.word	_x_s6_l0
	.word	s6_l0
	.word	_x_s0_x
	.word	s0_x
	.word	_x_s6_l1
	.word	s6_l1
	.word	_x_s0_y
	.word	s0_y
	.word	_x_s3_x
	.word	s3_x
	.word	_x_s2_z
	.word	s2_z
	.word	_x_r_l
	.word	r_l
	.word	_x_s6_l2
	.word	s6_l2
	.word	_x_s0_z
	.word	s0_z
	.word	_x_s3_y
	.word	s3_y
	.word	_x_s6_x
	.word	s6_x
	.word	_x_r_counter
	.word	r_counter
	.word	_x_s0_evt0
	.word	s0_evt0
	.word	_x_r_event1
	.word	_x_s5_z
	.word	s5_z
	.word	_x_r_x
	.word	r_x
	.word	_x_s0_evt1
	.word	s0_evt1
	.word	_x_s0_l0
	.word	s0_l0
	.word	_x_s3_evt0
	.word	s3_evt0
	.word	_x_s1_evt1
	.word	s1_evt1
	.word	_x_s1_l0
	.word	s1_l0
	.word	_x_s4_evt0
	.word	s4_evt0
	.word	_x_s5_l0
	.word	s5_l0
	.word	_x_s2_l2
	.word	s2_l2
	.word	_x_s5_l1
	.word	s5_l1
	.word	_x_s3_z
	.word	s3_z
	.word	_x_s6_y
	.word	s6_y
	.word	_x_s0_l1
	.word	s0_l1
	.word	_x_s3_evt1
	.word	s3_evt1
	.word	_x_s3_l0
	.word	s3_l0
	.word	_x_s6_evt0
	.word	s6_evt0
	.word	_x_s3_l2
	.word	s3_l2
	.word	_x_s4_z
	.word	s4_z
	.word	_x_s1_l1
	.word	s1_l1
	.word	_x_s4_evt1
	.word	s4_evt1
	.word	_x_s4_l2
	.word	s4_l2
	.word	_x_s2_l1
	.word	s2_l1
	.word	_x_s5_evt1
	.word	s5_evt1
	.word	_x_delta
	.word	_x_s5_l2
	.word	s5_l2
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
