	.file	"538337.c"
	.intel_syntax noprefix
	.text
	.local	errors
	.comm	errors,4,4
	.section	.rodata
.LC0:
	.string	"Failure: %s\n"
	.text
	.type	check, @function
check:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	cmp	DWORD PTR -12[rbp], 0
	jne	.L3
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR errors[rip]
	add	eax, 1
	mov	DWORD PTR errors[rip], eax
.L3:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	check, .-check
	.section	.rodata
.LC5:
	.string	"float isinf (inf) == 1"
.LC7:
	.string	"float isinf (-inf) == -1"
.LC8:
	.string	"float !isinf (1)"
.LC9:
	.string	"float !isinf (NaN)"
.LC10:
	.string	"float isnan (NaN)"
.LC11:
	.string	"float isnan (-NaN)"
.LC12:
	.string	"float !isnan (1)"
.LC13:
	.string	"float !isnan (inf)"
.LC14:
	.string	"float inf == inf"
.LC15:
	.string	"float -inf == -inf"
.LC16:
	.string	"float inf != -inf"
.LC17:
	.string	"float NaN != NaN"
.LC18:
	.string	"float isnan (NAN)"
.LC19:
	.string	"float isnan (-NAN)"
.LC20:
	.string	"float !isinf (NAN)"
.LC21:
	.string	"float !isinf (-NAN)"
.LC22:
	.string	"float NAN != NAN"
.LC24:
	.string	"float 1 != 1+EPSILON"
.LC25:
	.string	"float 1 != 1-EPSILON"
.LC27:
	.string	"float isinf (HUGE_VALx) == +1"
	.align 8
.LC29:
	.string	"float isinf (-HUGE_VALx) == -1"
	.text
	.type	float_test, @function
float_test:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	pxor	xmm0, xmm0
	movss	DWORD PTR -24[rbp], xmm0
	movss	xmm0, DWORD PTR .LC2[rip]
	movss	DWORD PTR -20[rbp], xmm0
	movss	xmm0, DWORD PTR -24[rbp]
	movss	xmm1, DWORD PTR -24[rbp]
	divss	xmm0, xmm1
	movss	DWORD PTR -28[rbp], xmm0
	movss	xmm0, DWORD PTR -20[rbp]
	movss	xmm1, DWORD PTR -24[rbp]
	divss	xmm0, xmm1
	movss	DWORD PTR -32[rbp], xmm0
	movss	xmm1, DWORD PTR -32[rbp]
	movss	xmm0, DWORD PTR .LC3[rip]
	andps	xmm0, xmm1
	ucomiss	xmm0, DWORD PTR .LC4[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L5
	movd	eax, xmm1
	and	eax, -2147483648
	test	eax, eax
	jne	.L5
	mov	eax, 1
	jmp	.L6
.L5:
	mov	eax, 0
.L6:
	mov	esi, eax
	lea	rdi, .LC5[rip]
	call	check
	movss	xmm0, DWORD PTR -32[rbp]
	movss	xmm1, DWORD PTR .LC6[rip]
	xorps	xmm1, xmm0
	movss	xmm0, DWORD PTR .LC3[rip]
	andps	xmm0, xmm1
	ucomiss	xmm0, DWORD PTR .LC4[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L7
	movd	eax, xmm1
	and	eax, -2147483648
	test	eax, eax
	je	.L7
	mov	eax, 1
	jmp	.L8
.L7:
	mov	eax, 0
.L8:
	mov	esi, eax
	lea	rdi, .LC7[rip]
	call	check
	movss	xmm0, DWORD PTR -20[rbp]
	movss	xmm1, DWORD PTR .LC3[rip]
	andps	xmm0, xmm1
	ucomiss	xmm0, DWORD PTR .LC4[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L9
	mov	eax, 0
	jmp	.L10
.L9:
	mov	eax, 1
.L10:
	mov	esi, eax
	lea	rdi, .LC8[rip]
	call	check
	movss	xmm0, DWORD PTR -28[rbp]
	movss	xmm1, DWORD PTR .LC3[rip]
	andps	xmm0, xmm1
	ucomiss	xmm0, DWORD PTR .LC4[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L11
	mov	eax, 0
	jmp	.L12
.L11:
	mov	eax, 1
.L12:
	mov	esi, eax
	lea	rdi, .LC9[rip]
	call	check
	movss	xmm0, DWORD PTR -28[rbp]
	ucomiss	xmm0, xmm0
	setp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC10[rip]
	call	check
	movss	xmm0, DWORD PTR -28[rbp]
	movss	xmm1, DWORD PTR .LC6[rip]
	xorps	xmm0, xmm1
	ucomiss	xmm0, xmm0
	setp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC11[rip]
	call	check
	movss	xmm0, DWORD PTR -20[rbp]
	ucomiss	xmm0, xmm0
	setnp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC12[rip]
	call	check
	movss	xmm0, DWORD PTR -32[rbp]
	ucomiss	xmm0, xmm0
	setnp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC13[rip]
	call	check
	movss	xmm0, DWORD PTR -32[rbp]
	movss	xmm1, DWORD PTR -32[rbp]
	ucomiss	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC14[rip]
	call	check
	movss	xmm0, DWORD PTR -32[rbp]
	movss	xmm1, DWORD PTR -32[rbp]
	ucomiss	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC15[rip]
	call	check
	movss	xmm0, DWORD PTR -32[rbp]
	movss	xmm1, DWORD PTR .LC6[rip]
	xorps	xmm0, xmm1
	movss	xmm1, DWORD PTR -32[rbp]
	ucomiss	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC16[rip]
	call	check
	movss	xmm0, DWORD PTR -28[rbp]
	movss	xmm1, DWORD PTR -28[rbp]
	ucomiss	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomiss	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC17[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC18[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC19[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC20[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC21[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC22[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC18[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC19[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC20[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC21[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC22[rip]
	call	check
	movss	xmm0, DWORD PTR .LC2[rip]
	movss	DWORD PTR -16[rbp], xmm0
	movss	xmm1, DWORD PTR -16[rbp]
	movss	xmm0, DWORD PTR .LC23[rip]
	addss	xmm0, xmm1
	movss	DWORD PTR -12[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	ucomiss	xmm0, DWORD PTR -12[rbp]
	setp	al
	mov	edx, 1
	movss	xmm0, DWORD PTR -16[rbp]
	ucomiss	xmm0, DWORD PTR -12[rbp]
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC24[rip]
	call	check
	movss	xmm0, DWORD PTR .LC2[rip]
	movss	DWORD PTR -16[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	movss	xmm1, DWORD PTR .LC23[rip]
	subss	xmm0, xmm1
	movss	DWORD PTR -12[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	ucomiss	xmm0, DWORD PTR -12[rbp]
	setp	al
	mov	edx, 1
	movss	xmm0, DWORD PTR -16[rbp]
	ucomiss	xmm0, DWORD PTR -12[rbp]
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC25[rip]
	call	check
	movss	xmm0, DWORD PTR .LC26[rip]
	movss	DWORD PTR -16[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	movss	xmm1, DWORD PTR .LC3[rip]
	andps	xmm0, xmm1
	ucomiss	xmm0, DWORD PTR .LC4[rip]
	ja	.L22
	mov	eax, 0
	jmp	.L15
.L22:
	mov	eax, DWORD PTR -16[rbp]
	and	eax, -2147483648
	test	eax, eax
	sete	al
	movzx	eax, al
.L15:
	mov	esi, eax
	lea	rdi, .LC27[rip]
	call	check
	movss	xmm0, DWORD PTR .LC28[rip]
	movss	DWORD PTR -16[rbp], xmm0
	movss	xmm0, DWORD PTR -16[rbp]
	movss	xmm1, DWORD PTR .LC3[rip]
	andps	xmm0, xmm1
	ucomiss	xmm0, DWORD PTR .LC4[rip]
	ja	.L23
	mov	eax, 0
	jmp	.L18
.L23:
	mov	eax, DWORD PTR -16[rbp]
	and	eax, -2147483648
	test	eax, eax
	setne	al
	movzx	eax, al
.L18:
	mov	esi, eax
	lea	rdi, .LC29[rip]
	call	check
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	float_test, .-float_test
	.section	.rodata
.LC34:
	.string	"double isinf (inf) == 1"
.LC36:
	.string	"double isinf (-inf) == -1"
.LC37:
	.string	"double !isinf (1)"
.LC38:
	.string	"double !isinf (NaN)"
.LC39:
	.string	"double isnan (NaN)"
.LC40:
	.string	"double isnan (-NaN)"
.LC41:
	.string	"double !isnan (1)"
.LC42:
	.string	"double !isnan (inf)"
.LC43:
	.string	"double inf == inf"
.LC44:
	.string	"double -inf == -inf"
.LC45:
	.string	"double inf != -inf"
.LC46:
	.string	"double NaN != NaN"
.LC47:
	.string	"double isnan (NAN)"
.LC48:
	.string	"double isnan (-NAN)"
.LC49:
	.string	"double !isinf (NAN)"
.LC50:
	.string	"double !isinf (-NAN)"
.LC51:
	.string	"double NAN != NAN"
.LC53:
	.string	"double 1 != 1+EPSILON"
.LC54:
	.string	"double 1 != 1-EPSILON"
	.align 8
.LC56:
	.string	"double isinf (HUGE_VALx) == +1"
	.align 8
.LC58:
	.string	"double isinf (-HUGE_VALx) == -1"
	.text
	.type	double_test, @function
double_test:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	pxor	xmm0, xmm0
	movsd	QWORD PTR -40[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC31[rip]
	movsd	QWORD PTR -32[rbp], xmm0
	movsd	xmm0, QWORD PTR -40[rbp]
	movsd	xmm1, QWORD PTR -40[rbp]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -48[rbp], xmm0
	movsd	xmm0, QWORD PTR -32[rbp]
	movsd	xmm1, QWORD PTR -40[rbp]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -56[rbp], xmm0
	movsd	xmm0, QWORD PTR -56[rbp]
	movq	xmm1, QWORD PTR .LC32[rip]
	andpd	xmm1, xmm0
	ucomisd	xmm1, QWORD PTR .LC33[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L25
	movmskpd	eax, xmm0
	and	eax, 1
	test	eax, eax
	jne	.L25
	mov	eax, 1
	jmp	.L26
.L25:
	mov	eax, 0
.L26:
	mov	esi, eax
	lea	rdi, .LC34[rip]
	call	check
	movsd	xmm0, QWORD PTR -56[rbp]
	movq	xmm1, QWORD PTR .LC35[rip]
	xorpd	xmm0, xmm1
	movq	xmm1, QWORD PTR .LC32[rip]
	andpd	xmm1, xmm0
	ucomisd	xmm1, QWORD PTR .LC33[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L27
	movmskpd	eax, xmm0
	and	eax, 1
	test	eax, eax
	je	.L27
	mov	eax, 1
	jmp	.L28
.L27:
	mov	eax, 0
.L28:
	mov	esi, eax
	lea	rdi, .LC36[rip]
	call	check
	movsd	xmm0, QWORD PTR -32[rbp]
	movq	xmm1, QWORD PTR .LC32[rip]
	andpd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC33[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L29
	mov	eax, 0
	jmp	.L30
.L29:
	mov	eax, 1
.L30:
	mov	esi, eax
	lea	rdi, .LC37[rip]
	call	check
	movsd	xmm0, QWORD PTR -48[rbp]
	movq	xmm1, QWORD PTR .LC32[rip]
	andpd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC33[rip]
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L31
	mov	eax, 0
	jmp	.L32
.L31:
	mov	eax, 1
.L32:
	mov	esi, eax
	lea	rdi, .LC38[rip]
	call	check
	movsd	xmm0, QWORD PTR -48[rbp]
	ucomisd	xmm0, xmm0
	setp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC39[rip]
	call	check
	movsd	xmm0, QWORD PTR -48[rbp]
	movq	xmm1, QWORD PTR .LC35[rip]
	xorpd	xmm0, xmm1
	ucomisd	xmm0, xmm0
	setp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC40[rip]
	call	check
	movsd	xmm0, QWORD PTR -32[rbp]
	ucomisd	xmm0, xmm0
	setnp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC41[rip]
	call	check
	movsd	xmm0, QWORD PTR -56[rbp]
	ucomisd	xmm0, xmm0
	setnp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC42[rip]
	call	check
	movsd	xmm0, QWORD PTR -56[rbp]
	movsd	xmm1, QWORD PTR -56[rbp]
	ucomisd	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC43[rip]
	call	check
	movsd	xmm0, QWORD PTR -56[rbp]
	movsd	xmm1, QWORD PTR -56[rbp]
	ucomisd	xmm0, xmm1
	setnp	al
	mov	edx, 0
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC44[rip]
	call	check
	movsd	xmm0, QWORD PTR -56[rbp]
	movq	xmm1, QWORD PTR .LC35[rip]
	xorpd	xmm0, xmm1
	movsd	xmm1, QWORD PTR -56[rbp]
	ucomisd	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC45[rip]
	call	check
	movsd	xmm0, QWORD PTR -48[rbp]
	movsd	xmm1, QWORD PTR -48[rbp]
	ucomisd	xmm0, xmm1
	setp	al
	mov	edx, 1
	ucomisd	xmm0, xmm1
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC46[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC47[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC48[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC49[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC50[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC51[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC47[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC48[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC49[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC50[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC51[rip]
	call	check
	movsd	xmm0, QWORD PTR .LC31[rip]
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm1, QWORD PTR -24[rbp]
	movsd	xmm0, QWORD PTR .LC52[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	movsd	xmm0, QWORD PTR -24[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	setp	al
	mov	edx, 1
	movsd	xmm0, QWORD PTR -24[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC53[rip]
	call	check
	movsd	xmm0, QWORD PTR .LC31[rip]
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm0, QWORD PTR -24[rbp]
	movsd	xmm1, QWORD PTR .LC52[rip]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	movsd	xmm0, QWORD PTR -24[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	setp	al
	mov	edx, 1
	movsd	xmm0, QWORD PTR -24[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC54[rip]
	call	check
	movsd	xmm0, QWORD PTR .LC55[rip]
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm0, QWORD PTR -24[rbp]
	movq	xmm1, QWORD PTR .LC32[rip]
	andpd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC33[rip]
	ja	.L42
	mov	eax, 0
	jmp	.L35
.L42:
	movsd	xmm0, QWORD PTR -24[rbp]
	movmskpd	eax, xmm0
	and	eax, 1
	test	eax, eax
	sete	al
	movzx	eax, al
.L35:
	mov	esi, eax
	lea	rdi, .LC56[rip]
	call	check
	movsd	xmm0, QWORD PTR .LC57[rip]
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm0, QWORD PTR -24[rbp]
	movq	xmm1, QWORD PTR .LC32[rip]
	andpd	xmm0, xmm1
	ucomisd	xmm0, QWORD PTR .LC33[rip]
	ja	.L43
	mov	eax, 0
	jmp	.L38
.L43:
	movsd	xmm0, QWORD PTR -24[rbp]
	movmskpd	eax, xmm0
	and	eax, 1
	test	eax, eax
	setne	al
	movzx	eax, al
.L38:
	mov	esi, eax
	lea	rdi, .LC58[rip]
	call	check
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	double_test, .-double_test
	.section	.rodata
.LC62:
	.string	"long double isinf (inf) == 1"
	.align 8
.LC63:
	.string	"long double isinf (-inf) == -1"
.LC64:
	.string	"long double !isinf (1)"
.LC65:
	.string	"long double !isinf (NaN)"
.LC66:
	.string	"long double isnan (NaN)"
.LC67:
	.string	"long double isnan (-NaN)"
.LC68:
	.string	"long double !isnan (1)"
.LC69:
	.string	"long double !isnan (inf)"
.LC70:
	.string	"long double inf == inf"
.LC71:
	.string	"long double -inf == -inf"
.LC72:
	.string	"long double inf != -inf"
.LC73:
	.string	"long double NaN != NaN"
.LC74:
	.string	"long double isnan (NAN)"
.LC75:
	.string	"long double isnan (-NAN)"
.LC76:
	.string	"long double !isinf (NAN)"
.LC77:
	.string	"long double !isinf (-NAN)"
.LC78:
	.string	"long double NAN != NAN"
.LC80:
	.string	"long double 1 != 1+EPSILON"
.LC81:
	.string	"long double 1 != 1-EPSILON"
	.align 8
.LC83:
	.string	"long double isinf (HUGE_VALx) == +1"
	.align 8
.LC85:
	.string	"long double isinf (-HUGE_VALx) == -1"
	.text
	.type	ldouble_test, @function
ldouble_test:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 112
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	fldz
	fstp	TBYTE PTR -80[rbp]
	fld1
	fstp	TBYTE PTR -64[rbp]
	fld	TBYTE PTR -80[rbp]
	fld	TBYTE PTR -80[rbp]
	fdivp	st(1), st
	fstp	TBYTE PTR -96[rbp]
	fld	TBYTE PTR -64[rbp]
	fld	TBYTE PTR -80[rbp]
	fdivp	st(1), st
	fstp	TBYTE PTR -112[rbp]
	fld	TBYTE PTR -112[rbp]
	fld	st(0)
	fabs
	fld	TBYTE PTR .LC61[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L64
	fxam
	fnstsw	ax
	fstp	st(0)
	and	eax, 512
	test	eax, eax
	jne	.L45
	mov	eax, 1
	jmp	.L46
.L64:
	fstp	st(0)
.L45:
	mov	eax, 0
.L46:
	mov	esi, eax
	lea	rdi, .LC62[rip]
	call	check
	fld	TBYTE PTR -112[rbp]
	fchs
	fld	st(0)
	fabs
	fld	TBYTE PTR .LC61[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L65
	fxam
	fnstsw	ax
	fstp	st(0)
	and	eax, 512
	test	eax, eax
	je	.L47
	mov	eax, 1
	jmp	.L48
.L65:
	fstp	st(0)
.L47:
	mov	eax, 0
.L48:
	mov	esi, eax
	lea	rdi, .LC63[rip]
	call	check
	fld	TBYTE PTR -64[rbp]
	fabs
	fld	TBYTE PTR .LC61[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L49
	mov	eax, 0
	jmp	.L50
.L49:
	mov	eax, 1
.L50:
	mov	esi, eax
	lea	rdi, .LC64[rip]
	call	check
	fld	TBYTE PTR -96[rbp]
	fabs
	fld	TBYTE PTR .LC61[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	setbe	al
	xor	eax, 1
	test	al, al
	je	.L51
	mov	eax, 0
	jmp	.L52
.L51:
	mov	eax, 1
.L52:
	mov	esi, eax
	lea	rdi, .LC65[rip]
	call	check
	fld	TBYTE PTR -96[rbp]
	fucomip	st, st(0)
	setp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC66[rip]
	call	check
	fld	TBYTE PTR -96[rbp]
	fchs
	fucomip	st, st(0)
	setp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC67[rip]
	call	check
	fld	TBYTE PTR -64[rbp]
	fucomip	st, st(0)
	setnp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC68[rip]
	call	check
	fld	TBYTE PTR -112[rbp]
	fucomip	st, st(0)
	setnp	al
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC69[rip]
	call	check
	fld	TBYTE PTR -112[rbp]
	fld	TBYTE PTR -112[rbp]
	fucomi	st, st(1)
	setnp	al
	mov	edx, 0
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC70[rip]
	call	check
	fld	TBYTE PTR -112[rbp]
	fld	TBYTE PTR -112[rbp]
	fucomi	st, st(1)
	setnp	al
	mov	edx, 0
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC71[rip]
	call	check
	fld	TBYTE PTR -112[rbp]
	fchs
	fld	TBYTE PTR -112[rbp]
	fucomi	st, st(1)
	setp	al
	mov	edx, 1
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC72[rip]
	call	check
	fld	TBYTE PTR -96[rbp]
	fld	TBYTE PTR -96[rbp]
	fucomi	st, st(1)
	setp	al
	mov	edx, 1
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC73[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC74[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC75[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC76[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC77[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC78[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC74[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC75[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC76[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC77[rip]
	call	check
	mov	esi, 1
	lea	rdi, .LC78[rip]
	call	check
	fld1
	fstp	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -48[rbp]
	fld	TBYTE PTR .LC79[rip]
	faddp	st(1), st
	fstp	TBYTE PTR -32[rbp]
	fld	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -32[rbp]
	fucomip	st, st(1)
	fstp	st(0)
	setp	al
	fld	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -32[rbp]
	mov	edx, 1
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC80[rip]
	call	check
	fld1
	fstp	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -48[rbp]
	fld	TBYTE PTR .LC79[rip]
	fsubp	st(1), st
	fstp	TBYTE PTR -32[rbp]
	fld	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -32[rbp]
	fucomip	st, st(1)
	fstp	st(0)
	setp	al
	fld	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -32[rbp]
	mov	edx, 1
	fucomip	st, st(1)
	fstp	st(0)
	cmovne	eax, edx
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC81[rip]
	call	check
	fld	TBYTE PTR .LC82[rip]
	fstp	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -48[rbp]
	fabs
	fld	TBYTE PTR .LC61[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	ja	.L62
	mov	eax, 0
	jmp	.L55
.L62:
	fld	TBYTE PTR -48[rbp]
	fxam
	fnstsw	ax
	fstp	st(0)
	and	eax, 512
	test	eax, eax
	sete	al
	movzx	eax, al
.L55:
	mov	esi, eax
	lea	rdi, .LC83[rip]
	call	check
	fld	TBYTE PTR .LC84[rip]
	fstp	TBYTE PTR -48[rbp]
	fld	TBYTE PTR -48[rbp]
	fabs
	fld	TBYTE PTR .LC61[rip]
	fxch	st(1)
	fucomip	st, st(1)
	fstp	st(0)
	ja	.L63
	mov	eax, 0
	jmp	.L58
.L63:
	fld	TBYTE PTR -48[rbp]
	fxam
	fnstsw	ax
	fstp	st(0)
	and	eax, 512
	test	eax, eax
	setne	al
	movzx	eax, al
.L58:
	mov	esi, eax
	lea	rdi, .LC85[rip]
	call	check
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	ldouble_test, .-ldouble_test
	.globl	main
	.type	main, @function
main:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	float_test
	call	double_test
	call	ldouble_test
	mov	eax, DWORD PTR errors[rip]
	test	eax, eax
	setne	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC2:
	.long	1065353216
	.align 16
.LC3:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.align 4
.LC4:
	.long	2139095039
	.align 16
.LC6:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.align 4
.LC23:
	.long	872415232
	.align 4
.LC26:
	.long	2139095040
	.align 4
.LC28:
	.long	-8388608
	.align 8
.LC31:
	.long	0
	.long	1072693248
	.align 16
.LC32:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.align 8
.LC33:
	.long	-1
	.long	2146435071
	.align 16
.LC35:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.align 8
.LC52:
	.long	0
	.long	1018167296
	.align 8
.LC55:
	.long	0
	.long	2146435072
	.align 8
.LC57:
	.long	0
	.long	-1048576
	.align 16
.LC61:
	.long	-1
	.long	-1
	.long	32766
	.long	0
	.align 16
.LC79:
	.long	0
	.long	-2147483648
	.long	16320
	.long	0
	.align 16
.LC82:
	.long	0
	.long	-2147483648
	.long	32767
	.long	0
	.align 16
.LC84:
	.long	0
	.long	-2147483648
	.long	65535
	.long	0
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"538337.c"
	.text
	.local	errors
	.comm	errors,4,4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"Failure: %s\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	check, %function
check:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L3
	ldr	r1, [fp, #-8]
	ldr	r0, .L4
	bl	printf
	ldr	r3, .L4+4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L4+4
	str	r3, [r2]
.L3:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L5:
	.align	2
.L4:
	.word	.LC0
	.word	errors
	.size	check, .-check
	.global	__aeabi_fdiv
	.global	__aeabi_fcmpun
	.global	__aeabi_fcmple
	.section	.rodata
	.align	2
.LC1:
	.ascii	"float isinf (inf) == 1\000"
	.align	2
.LC2:
	.ascii	"float isinf (-inf) == -1\000"
	.align	2
.LC3:
	.ascii	"float !isinf (1)\000"
	.align	2
.LC4:
	.ascii	"float !isinf (NaN)\000"
	.align	2
.LC5:
	.ascii	"float isnan (NaN)\000"
	.align	2
.LC6:
	.ascii	"float isnan (-NaN)\000"
	.align	2
.LC7:
	.ascii	"float !isnan (1)\000"
	.align	2
.LC8:
	.ascii	"float !isnan (inf)\000"
	.global	__aeabi_fcmpeq
	.align	2
.LC9:
	.ascii	"float inf == inf\000"
	.align	2
.LC10:
	.ascii	"float -inf == -inf\000"
	.align	2
.LC11:
	.ascii	"float inf != -inf\000"
	.align	2
.LC12:
	.ascii	"float NaN != NaN\000"
	.align	2
.LC13:
	.ascii	"float isnan (NAN)\000"
	.align	2
.LC14:
	.ascii	"float isnan (-NAN)\000"
	.align	2
.LC15:
	.ascii	"float !isinf (NAN)\000"
	.align	2
.LC16:
	.ascii	"float !isinf (-NAN)\000"
	.align	2
.LC17:
	.ascii	"float NAN != NAN\000"
	.global	__aeabi_fadd
	.align	2
.LC18:
	.ascii	"float 1 != 1+EPSILON\000"
	.global	__aeabi_fsub
	.align	2
.LC19:
	.ascii	"float 1 != 1-EPSILON\000"
	.align	2
.LC20:
	.ascii	"float isinf (HUGE_VALx) == +1\000"
	.align	2
.LC21:
	.ascii	"float isinf (-HUGE_VALx) == -1\000"
	.align	2
.LC22:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	float_test, %function
float_test:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #36
	ldr	r3, .L40
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-40]	@ float
	mov	r3, #1065353216
	str	r3, [fp, #-36]	@ float
	ldr	r3, [fp, #-40]	@ float
	ldr	r2, [fp, #-40]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fdiv
	mov	r3, r0
	str	r3, [fp, #-44]	@ float
	ldr	r3, [fp, #-36]	@ float
	ldr	r2, [fp, #-40]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fdiv
	mov	r3, r0
	str	r3, [fp, #-48]	@ float
	ldr	r5, [fp, #-48]	@ float
	bic	r4, r5, #-2147483648
	mov	r3, #1
	mov	r6, r3
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L7
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L7
	mov	r3, #0
	mov	r6, r3
.L7:
	and	r3, r6, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L8
	mov	r3, r5
	and	r3, r3, #-2147483648
	cmp	r3, #0
	bne	.L8
	mov	r3, #1
	b	.L9
.L8:
	mov	r3, #0
.L9:
	mov	r1, r3
	ldr	r0, .L40+8
	bl	check
	ldr	r3, [fp, #-48]	@ float
	eor	r5, r3, #-2147483648
	bic	r4, r5, #-2147483648
	mov	r3, #1
	mov	r6, r3
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L10
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L10
	mov	r3, #0
	mov	r6, r3
.L10:
	and	r3, r6, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L11
	mov	r3, r5
	and	r3, r3, #-2147483648
	cmp	r3, #0
	beq	.L11
	mov	r3, #1
	b	.L12
.L11:
	mov	r3, #0
.L12:
	mov	r1, r3
	ldr	r0, .L40+12
	bl	check
	ldr	r3, [fp, #-36]	@ float
	bic	r4, r3, #-2147483648
	mov	r3, #1
	mov	r5, r3
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L13
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L13
	mov	r3, #0
	mov	r5, r3
.L13:
	and	r3, r5, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L14
	mov	r3, #0
	b	.L15
.L14:
	mov	r3, #1
.L15:
	mov	r1, r3
	ldr	r0, .L40+16
	bl	check
	ldr	r3, [fp, #-44]	@ float
	bic	r4, r3, #-2147483648
	mov	r3, #1
	mov	r5, r3
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L16
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L16
	mov	r3, #0
	mov	r5, r3
.L16:
	and	r3, r5, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L17
	mov	r3, #0
	b	.L18
.L17:
	mov	r3, #1
.L18:
	mov	r1, r3
	ldr	r0, .L40+20
	bl	check
	ldr	r3, [fp, #-44]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r3
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L19
	mov	r3, #0
	mov	r4, r3
.L19:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+24
	bl	check
	ldr	r3, [fp, #-44]	@ float
	eor	r3, r3, #-2147483648
	mov	r2, #1
	mov	r4, r2
	mov	r1, r3
	mov	r0, r3
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L20
	mov	r3, #0
	mov	r4, r3
.L20:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+28
	bl	check
	ldr	r3, [fp, #-36]	@ float
	mov	r2, #0
	mov	r4, r2
	mov	r1, r3
	mov	r0, r3
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L21
	mov	r3, #1
	mov	r4, r3
.L21:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+32
	bl	check
	ldr	r3, [fp, #-48]	@ float
	mov	r2, #0
	mov	r4, r2
	mov	r1, r3
	mov	r0, r3
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L22
	mov	r3, #1
	mov	r4, r3
.L22:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+36
	bl	check
	ldr	r3, [fp, #-48]	@ float
	ldr	r2, [fp, #-48]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L23
	mov	r3, #0
	mov	r4, r3
.L23:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+40
	bl	check
	ldr	r3, [fp, #-48]	@ float
	ldr	r2, [fp, #-48]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L24
	mov	r3, #0
	mov	r4, r3
.L24:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+44
	bl	check
	ldr	r3, [fp, #-48]	@ float
	eor	r3, r3, #-2147483648
	ldr	r2, [fp, #-48]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L25
	mov	r3, #0
	mov	r4, r3
.L25:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+48
	bl	check
	ldr	r3, [fp, #-44]	@ float
	ldr	r2, [fp, #-44]	@ float
	mov	r1, #1
	mov	r4, r1
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L26
	mov	r3, #0
	mov	r4, r3
.L26:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+52
	bl	check
	mov	r1, #1
	ldr	r0, .L40+56
	bl	check
	mov	r1, #1
	ldr	r0, .L40+60
	bl	check
	mov	r1, #1
	ldr	r0, .L40+64
	bl	check
	mov	r1, #1
	ldr	r0, .L40+68
	bl	check
	mov	r1, #1
	ldr	r0, .L40+72
	bl	check
	mov	r1, #1
	ldr	r0, .L40+56
	bl	check
	mov	r1, #1
	ldr	r0, .L40+60
	bl	check
	mov	r1, #1
	ldr	r0, .L40+64
	bl	check
	mov	r1, #1
	ldr	r0, .L40+68
	bl	check
	mov	r1, #1
	ldr	r0, .L40+72
	bl	check
	mov	r3, #1065353216
	str	r3, [fp, #-32]	@ float
	mov	r1, #872415232
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [fp, #-28]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-28]	@ float
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L27
	mov	r3, #0
	mov	r4, r3
.L27:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+76
	bl	check
	mov	r3, #1065353216
	str	r3, [fp, #-32]	@ float
	mov	r1, #872415232
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	str	r3, [fp, #-28]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-28]	@ float
	ldr	r0, [fp, #-32]	@ float
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L28
	mov	r3, #0
	mov	r4, r3
.L28:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L40+80
	bl	check
	ldr	r3, .L40+84
	str	r3, [fp, #-32]	@ float
	ldr	r3, [fp, #-32]
	bic	r4, r3, #-2147483648
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L36
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L38
.L36:
	mov	r3, #0
	b	.L31
.L38:
	ldr	r3, [fp, #-32]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
.L31:
	mov	r1, r3
	ldr	r0, .L40+88
	bl	check
	ldr	r3, .L40+92
	str	r3, [fp, #-32]	@ float
	ldr	r3, [fp, #-32]
	bic	r4, r3, #-2147483648
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L37
	ldr	r1, .L40+4
	mov	r0, r4
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L39
.L37:
	mov	r3, #0
	b	.L34
.L39:
	ldr	r3, [fp, #-32]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
.L34:
	mov	r1, r3
	ldr	r0, .L40+96
	bl	check
	nop
	ldr	r3, .L40
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L35
	bl	__stack_chk_fail
.L35:
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L41:
	.align	2
.L40:
	.word	.LC22
	.word	2139095039
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	.LC16
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.word	2139095040
	.word	.LC20
	.word	-8388608
	.word	.LC21
	.size	float_test, .-float_test
	.global	__aeabi_ddiv
	.global	__aeabi_dcmpun
	.global	__aeabi_dcmple
	.section	.rodata
	.align	2
.LC23:
	.ascii	"double isinf (inf) == 1\000"
	.align	2
.LC24:
	.ascii	"double isinf (-inf) == -1\000"
	.align	2
.LC25:
	.ascii	"double !isinf (1)\000"
	.align	2
.LC26:
	.ascii	"double !isinf (NaN)\000"
	.align	2
.LC27:
	.ascii	"double isnan (NaN)\000"
	.align	2
.LC28:
	.ascii	"double isnan (-NaN)\000"
	.align	2
.LC29:
	.ascii	"double !isnan (1)\000"
	.align	2
.LC30:
	.ascii	"double !isnan (inf)\000"
	.global	__aeabi_dcmpeq
	.align	2
.LC31:
	.ascii	"double inf == inf\000"
	.align	2
.LC32:
	.ascii	"double -inf == -inf\000"
	.align	2
.LC33:
	.ascii	"double inf != -inf\000"
	.align	2
.LC34:
	.ascii	"double NaN != NaN\000"
	.align	2
.LC35:
	.ascii	"double isnan (NAN)\000"
	.align	2
.LC36:
	.ascii	"double isnan (-NAN)\000"
	.align	2
.LC37:
	.ascii	"double !isinf (NAN)\000"
	.align	2
.LC38:
	.ascii	"double !isinf (-NAN)\000"
	.align	2
.LC39:
	.ascii	"double NAN != NAN\000"
	.global	__aeabi_dadd
	.align	2
.LC40:
	.ascii	"double 1 != 1+EPSILON\000"
	.global	__aeabi_dsub
	.align	2
.LC41:
	.ascii	"double 1 != 1-EPSILON\000"
	.align	2
.LC42:
	.ascii	"double isinf (HUGE_VALx) == +1\000"
	.align	2
.LC43:
	.ascii	"double isinf (-HUGE_VALx) == -1\000"
	.align	2
.LC44:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	double_test, %function
double_test:
	@ args = 0, pretend = 0, frame = 112
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #116
	ldr	r3, .L76
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	mov	r2, #0
	ldr	r3, .L76+4
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r6, r4
	bic	r7, r5, #-2147483648
	mov	r3, #1
	mov	r10, r3
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L43
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L43
	mov	r3, #0
	mov	r10, r3
.L43:
	and	r3, r10, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L44
	mov	r3, r5
	and	r3, r3, #-2147483648
	cmp	r3, #0
	bne	.L44
	mov	r3, #1
	b	.L45
.L44:
	mov	r3, #0
.L45:
	mov	r1, r3
	ldr	r0, .L76+12
	bl	check
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-100]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	str	r2, [fp, #-108]
	mov	r3, r4
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-104]
	mov	r3, #1
	mov	r4, r3
	mvn	r2, #0
	ldr	r3, .L76+8
	sub	r6, fp, #108
	ldmia	r6, {r5-r6}
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L46
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L46
	mov	r3, #0
	mov	r4, r3
.L46:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L47
	ldr	r3, [fp, #-96]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	beq	.L47
	mov	r3, #1
	b	.L48
.L47:
	mov	r3, #0
.L48:
	mov	r1, r3
	ldr	r0, .L76+16
	bl	check
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-116]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-112]
	mov	r3, #1
	mov	r4, r3
	mvn	r2, #0
	ldr	r3, .L76+8
	sub	r6, fp, #116
	ldmia	r6, {r5-r6}
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L49
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L49
	mov	r3, #0
	mov	r4, r3
.L49:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L50
	mov	r3, #0
	b	.L51
.L50:
	mov	r3, #1
.L51:
	mov	r1, r3
	ldr	r0, .L76+20
	bl	check
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-124]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-120]
	mov	r3, #1
	mov	r4, r3
	mvn	r2, #0
	ldr	r3, .L76+8
	sub	r6, fp, #124
	ldmia	r6, {r5-r6}
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L52
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L52
	mov	r3, #0
	mov	r4, r3
.L52:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L53
	mov	r3, #0
	b	.L54
.L53:
	mov	r3, #1
.L54:
	mov	r1, r3
	ldr	r0, .L76+24
	bl	check
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	r3, #1
	mov	r4, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L55
	mov	r3, #0
	mov	r4, r3
.L55:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+28
	bl	check
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-148]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-144]
	mov	r3, #1
	mov	r4, r3
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L56
	mov	r3, #0
	mov	r4, r3
.L56:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+32
	bl	check
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r3, #0
	mov	r4, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L57
	mov	r3, #1
	mov	r4, r3
.L57:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+36
	bl	check
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	r3, #0
	mov	r4, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L58
	mov	r3, #1
	mov	r4, r3
.L58:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+40
	bl	check
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L59
	mov	r3, #0
	mov	r4, r3
.L59:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+44
	bl	check
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L60
	mov	r3, #0
	mov	r4, r3
.L60:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+48
	bl	check
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-132]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-128]
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	mov	r1, #1
	mov	r4, r1
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L61
	mov	r3, #0
	mov	r4, r3
.L61:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+52
	bl	check
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L62
	mov	r3, #0
	mov	r4, r3
.L62:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+56
	bl	check
	mov	r1, #1
	ldr	r0, .L76+60
	bl	check
	mov	r1, #1
	ldr	r0, .L76+64
	bl	check
	mov	r1, #1
	ldr	r0, .L76+68
	bl	check
	mov	r1, #1
	ldr	r0, .L76+72
	bl	check
	mov	r1, #1
	ldr	r0, .L76+76
	bl	check
	mov	r1, #1
	ldr	r0, .L76+60
	bl	check
	mov	r1, #1
	ldr	r0, .L76+64
	bl	check
	mov	r1, #1
	ldr	r0, .L76+68
	bl	check
	mov	r1, #1
	ldr	r0, .L76+72
	bl	check
	mov	r1, #1
	ldr	r0, .L76+76
	bl	check
	mov	r2, #0
	ldr	r3, .L76+4
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	mov	r2, #0
	ldr	r3, .L76+80
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L63
	mov	r3, #0
	mov	r4, r3
.L63:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+84
	bl	check
	mov	r2, #0
	ldr	r3, .L76+4
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	mov	r2, #0
	ldr	r3, .L76+80
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L64
	mov	r3, #0
	mov	r4, r3
.L64:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L76+88
	bl	check
	mov	r2, #0
	ldr	r3, .L76+92
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-140]
	ldr	r3, [fp, #-56]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-136]
	mvn	r2, #0
	ldr	r3, .L76+8
	sub	r5, fp, #140
	ldmia	r5, {r4-r5}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L72
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L74
.L72:
	mov	r3, #0
	b	.L67
.L74:
	ldr	r3, [fp, #-56]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
.L67:
	mov	r1, r3
	ldr	r0, .L76+96
	bl	check
	mov	r2, #0
	ldr	r3, .L76+100
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	ldr	r8, [fp, #-60]
	ldr	r3, [fp, #-56]
	bic	r9, r3, #-2147483648
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L73
	mvn	r2, #0
	ldr	r3, .L76+8
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L75
.L73:
	mov	r3, #0
	b	.L70
.L75:
	ldr	r3, [fp, #-56]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
.L70:
	mov	r1, r3
	ldr	r0, .L76+104
	bl	check
	nop
	ldr	r3, .L76
	ldr	r2, [r3]
	ldr	r3, [fp, #-40]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L71
	bl	__stack_chk_fail
.L71:
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L77:
	.align	2
.L76:
	.word	.LC44
	.word	1072693248
	.word	2146435071
	.word	.LC23
	.word	.LC24
	.word	.LC25
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.word	.LC34
	.word	.LC35
	.word	.LC36
	.word	.LC37
	.word	.LC38
	.word	.LC39
	.word	1018167296
	.word	.LC40
	.word	.LC41
	.word	2146435072
	.word	.LC42
	.word	-1048576
	.word	.LC43
	.size	double_test, .-double_test
	.section	.rodata
	.align	2
.LC45:
	.ascii	"long double isinf (inf) == 1\000"
	.align	2
.LC46:
	.ascii	"long double isinf (-inf) == -1\000"
	.align	2
.LC47:
	.ascii	"long double !isinf (1)\000"
	.align	2
.LC48:
	.ascii	"long double !isinf (NaN)\000"
	.align	2
.LC49:
	.ascii	"long double isnan (NaN)\000"
	.align	2
.LC50:
	.ascii	"long double isnan (-NaN)\000"
	.align	2
.LC51:
	.ascii	"long double !isnan (1)\000"
	.align	2
.LC52:
	.ascii	"long double !isnan (inf)\000"
	.align	2
.LC53:
	.ascii	"long double inf == inf\000"
	.align	2
.LC54:
	.ascii	"long double -inf == -inf\000"
	.align	2
.LC55:
	.ascii	"long double inf != -inf\000"
	.align	2
.LC56:
	.ascii	"long double NaN != NaN\000"
	.align	2
.LC57:
	.ascii	"long double isnan (NAN)\000"
	.align	2
.LC58:
	.ascii	"long double isnan (-NAN)\000"
	.align	2
.LC59:
	.ascii	"long double !isinf (NAN)\000"
	.align	2
.LC60:
	.ascii	"long double !isinf (-NAN)\000"
	.align	2
.LC61:
	.ascii	"long double NAN != NAN\000"
	.align	2
.LC62:
	.ascii	"long double 1 != 1+EPSILON\000"
	.align	2
.LC63:
	.ascii	"long double 1 != 1-EPSILON\000"
	.align	2
.LC64:
	.ascii	"long double isinf (HUGE_VALx) == +1\000"
	.align	2
.LC65:
	.ascii	"long double isinf (-HUGE_VALx) == -1\000"
	.align	2
.LC66:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ldouble_test, %function
ldouble_test:
	@ args = 0, pretend = 0, frame = 112
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #116
	ldr	r3, .L112
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	mov	r2, #0
	ldr	r3, .L112+4
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r6, r4
	bic	r7, r5, #-2147483648
	mov	r3, #1
	mov	r10, r3
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L79
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L79
	mov	r3, #0
	mov	r10, r3
.L79:
	and	r3, r10, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L80
	mov	r3, r5
	and	r3, r3, #-2147483648
	cmp	r3, #0
	bne	.L80
	mov	r3, #1
	b	.L81
.L80:
	mov	r3, #0
.L81:
	mov	r1, r3
	ldr	r0, .L112+12
	bl	check
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-100]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	str	r2, [fp, #-108]
	mov	r3, r4
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-104]
	mov	r3, #1
	mov	r4, r3
	mvn	r2, #0
	ldr	r3, .L112+8
	sub	r6, fp, #108
	ldmia	r6, {r5-r6}
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L82
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L82
	mov	r3, #0
	mov	r4, r3
.L82:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L83
	ldr	r3, [fp, #-96]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	beq	.L83
	mov	r3, #1
	b	.L84
.L83:
	mov	r3, #0
.L84:
	mov	r1, r3
	ldr	r0, .L112+16
	bl	check
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-116]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-112]
	mov	r3, #1
	mov	r4, r3
	mvn	r2, #0
	ldr	r3, .L112+8
	sub	r6, fp, #116
	ldmia	r6, {r5-r6}
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L85
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L85
	mov	r3, #0
	mov	r4, r3
.L85:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L86
	mov	r3, #0
	b	.L87
.L86:
	mov	r3, #1
.L87:
	mov	r1, r3
	ldr	r0, .L112+20
	bl	check
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-124]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-120]
	mov	r3, #1
	mov	r4, r3
	mvn	r2, #0
	ldr	r3, .L112+8
	sub	r6, fp, #124
	ldmia	r6, {r5-r6}
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L88
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r5
	mov	r1, r6
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L88
	mov	r3, #0
	mov	r4, r3
.L88:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L89
	mov	r3, #0
	b	.L90
.L89:
	mov	r3, #1
.L90:
	mov	r1, r3
	ldr	r0, .L112+24
	bl	check
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	r3, #1
	mov	r4, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L91
	mov	r3, #0
	mov	r4, r3
.L91:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+28
	bl	check
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-148]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-144]
	mov	r3, #1
	mov	r4, r3
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L92
	mov	r3, #0
	mov	r4, r3
.L92:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+32
	bl	check
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r3, #0
	mov	r4, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L93
	mov	r3, #1
	mov	r4, r3
.L93:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+36
	bl	check
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	r3, #0
	mov	r4, r3
	mov	r2, r0
	mov	r3, r1
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L94
	mov	r3, #1
	mov	r4, r3
.L94:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+40
	bl	check
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L95
	mov	r3, #0
	mov	r4, r3
.L95:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+44
	bl	check
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L96
	mov	r3, #0
	mov	r4, r3
.L96:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+48
	bl	check
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-132]
	eor	r3, r3, #-2147483648
	str	r3, [fp, #-128]
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	mov	r1, #1
	mov	r4, r1
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L97
	mov	r3, #0
	mov	r4, r3
.L97:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+52
	bl	check
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	ip, #1
	mov	r4, ip
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L98
	mov	r3, #0
	mov	r4, r3
.L98:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+56
	bl	check
	mov	r1, #1
	ldr	r0, .L112+60
	bl	check
	mov	r1, #1
	ldr	r0, .L112+64
	bl	check
	mov	r1, #1
	ldr	r0, .L112+68
	bl	check
	mov	r1, #1
	ldr	r0, .L112+72
	bl	check
	mov	r1, #1
	ldr	r0, .L112+76
	bl	check
	mov	r1, #1
	ldr	r0, .L112+60
	bl	check
	mov	r1, #1
	ldr	r0, .L112+64
	bl	check
	mov	r1, #1
	ldr	r0, .L112+68
	bl	check
	mov	r1, #1
	ldr	r0, .L112+72
	bl	check
	mov	r1, #1
	ldr	r0, .L112+76
	bl	check
	mov	r2, #0
	ldr	r3, .L112+4
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	mov	r2, #0
	ldr	r3, .L112+80
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L99
	mov	r3, #0
	mov	r4, r3
.L99:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+84
	bl	check
	mov	r2, #0
	ldr	r3, .L112+4
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	mov	r2, #0
	ldr	r3, .L112+80
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L100
	mov	r3, #0
	mov	r4, r3
.L100:
	and	r3, r4, #255
	mov	r1, r3
	ldr	r0, .L112+88
	bl	check
	mov	r2, #0
	ldr	r3, .L112+92
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-140]
	ldr	r3, [fp, #-56]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-136]
	mvn	r2, #0
	ldr	r3, .L112+8
	sub	r5, fp, #140
	ldmia	r5, {r4-r5}
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L108
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L110
.L108:
	mov	r3, #0
	b	.L103
.L110:
	ldr	r3, [fp, #-56]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
.L103:
	mov	r1, r3
	ldr	r0, .L112+96
	bl	check
	mov	r2, #0
	ldr	r3, .L112+100
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	ldr	r8, [fp, #-60]
	ldr	r3, [fp, #-56]
	bic	r9, r3, #-2147483648
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dcmpun
	mov	r3, r0
	cmp	r3, #0
	bne	.L109
	mvn	r2, #0
	ldr	r3, .L112+8
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L111
.L109:
	mov	r3, #0
	b	.L106
.L111:
	ldr	r3, [fp, #-56]
	and	r3, r3, #-2147483648
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
.L106:
	mov	r1, r3
	ldr	r0, .L112+104
	bl	check
	nop
	ldr	r3, .L112
	ldr	r2, [r3]
	ldr	r3, [fp, #-40]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L107
	bl	__stack_chk_fail
.L107:
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L113:
	.align	2
.L112:
	.word	.LC66
	.word	1072693248
	.word	2146435071
	.word	.LC45
	.word	.LC46
	.word	.LC47
	.word	.LC48
	.word	.LC49
	.word	.LC50
	.word	.LC51
	.word	.LC52
	.word	.LC53
	.word	.LC54
	.word	.LC55
	.word	.LC56
	.word	.LC57
	.word	.LC58
	.word	.LC59
	.word	.LC60
	.word	.LC61
	.word	1018167296
	.word	.LC62
	.word	.LC63
	.word	2146435072
	.word	.LC64
	.word	-1048576
	.word	.LC65
	.size	ldouble_test, .-ldouble_test
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	float_test
	bl	double_test
	bl	ldouble_test
	ldr	r3, .L116
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
.L117:
	.align	2
.L116:
	.word	errors
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
