	.file	"470058.c"
	.intel_syntax noprefix
	.text
	.globl	BIT
	.section	.rodata
	.align 32
	.type	BIT, @object
	.size	BIT, 512
BIT:
	.quad	1
	.quad	2
	.quad	4
	.quad	8
	.quad	16
	.quad	32
	.quad	64
	.quad	128
	.quad	256
	.quad	512
	.quad	1024
	.quad	2048
	.quad	4096
	.quad	8192
	.quad	16384
	.quad	32768
	.quad	65536
	.quad	131072
	.quad	262144
	.quad	524288
	.quad	1048576
	.quad	2097152
	.quad	4194304
	.quad	8388608
	.quad	16777216
	.quad	33554432
	.quad	67108864
	.quad	134217728
	.quad	268435456
	.quad	536870912
	.quad	1073741824
	.quad	2147483648
	.quad	4294967296
	.quad	8589934592
	.quad	17179869184
	.quad	34359738368
	.quad	68719476736
	.quad	137438953472
	.quad	274877906944
	.quad	549755813888
	.quad	1099511627776
	.quad	2199023255552
	.quad	4398046511104
	.quad	8796093022208
	.quad	17592186044416
	.quad	35184372088832
	.quad	70368744177664
	.quad	140737488355328
	.quad	281474976710656
	.quad	562949953421312
	.quad	1125899906842624
	.quad	2251799813685248
	.quad	4503599627370496
	.quad	9007199254740992
	.quad	18014398509481984
	.quad	36028797018963968
	.quad	72057594037927936
	.quad	144115188075855872
	.quad	288230376151711744
	.quad	576460752303423488
	.quad	1152921504606846976
	.quad	2305843009213693952
	.quad	4611686018427387904
	.quad	-9223372036854775808
	.globl	B1G1
	.bss
	.align 32
	.type	B1G1, @object
	.size	B1G1, 512
B1G1:
	.zero	512
	.globl	B2G2
	.align 32
	.type	B2G2, @object
	.size	B2G2, 512
B2G2:
	.zero	512
	.globl	B3G3
	.align 32
	.type	B3G3, @object
	.size	B3G3, 512
B3G3:
	.zero	512
	.globl	B4G4
	.align 32
	.type	B4G4, @object
	.size	B4G4, 512
B4G4:
	.zero	512
	.globl	B5G5
	.align 32
	.type	B5G5, @object
	.size	B5G5, 512
B5G5:
	.zero	512
	.globl	B6G6
	.align 32
	.type	B6G6, @object
	.size	B6G6, 512
B6G6:
	.zero	512
	.globl	B7G7
	.align 32
	.type	B7G7, @object
	.size	B7G7, 512
B7G7:
	.zero	512
	.globl	B8G8
	.align 32
	.type	B8G8, @object
	.size	B8G8, 512
B8G8:
	.zero	512
	.globl	A2A7
	.align 32
	.type	A2A7, @object
	.size	A2A7, 512
A2A7:
	.zero	512
	.globl	B2B7
	.align 32
	.type	B2B7, @object
	.size	B2B7, 512
B2B7:
	.zero	512
	.globl	C2C7
	.align 32
	.type	C2C7, @object
	.size	C2C7, 512
C2C7:
	.zero	512
	.globl	D2D7
	.align 32
	.type	D2D7, @object
	.size	D2D7, 512
D2D7:
	.zero	512
	.globl	E2E7
	.align 32
	.type	E2E7, @object
	.size	E2E7, 512
E2E7:
	.zero	512
	.globl	F2F7
	.align 32
	.type	F2F7, @object
	.size	F2F7, 512
F2F7:
	.zero	512
	.globl	G2G7
	.align 32
	.type	G2G7, @object
	.size	G2G7, 512
G2G7:
	.zero	512
	.globl	H2H7
	.align 32
	.type	H2H7, @object
	.size	H2H7, 512
H2H7:
	.zero	512
	.globl	B2B2
	.align 16
	.type	B2B2, @object
	.size	B2B2, 16
B2B2:
	.zero	16
	.globl	C2B3
	.align 32
	.type	C2B3, @object
	.size	C2B3, 32
C2B3:
	.zero	32
	.globl	D2B4
	.align 32
	.type	D2B4, @object
	.size	D2B4, 64
D2B4:
	.zero	64
	.globl	E2B5
	.align 32
	.type	E2B5, @object
	.size	E2B5, 128
E2B5:
	.zero	128
	.globl	F2B6
	.align 32
	.type	F2B6, @object
	.size	F2B6, 256
F2B6:
	.zero	256
	.globl	G2B7
	.align 32
	.type	G2B7, @object
	.size	G2B7, 512
G2B7:
	.zero	512
	.globl	G3C7
	.align 32
	.type	G3C7, @object
	.size	G3C7, 256
G3C7:
	.zero	256
	.globl	G4D7
	.align 32
	.type	G4D7, @object
	.size	G4D7, 128
G4D7:
	.zero	128
	.globl	G5E7
	.align 32
	.type	G5E7, @object
	.size	G5E7, 64
G5E7:
	.zero	64
	.globl	G6F7
	.align 32
	.type	G6F7, @object
	.size	G6F7, 32
G6F7:
	.zero	32
	.globl	G7G7
	.align 16
	.type	G7G7, @object
	.size	G7G7, 16
G7G7:
	.zero	16
	.globl	B7B7
	.align 16
	.type	B7B7, @object
	.size	B7B7, 16
B7B7:
	.zero	16
	.globl	B6C7
	.align 32
	.type	B6C7, @object
	.size	B6C7, 32
B6C7:
	.zero	32
	.globl	B5D7
	.align 32
	.type	B5D7, @object
	.size	B5D7, 64
B5D7:
	.zero	64
	.globl	B4E7
	.align 32
	.type	B4E7, @object
	.size	B4E7, 128
B4E7:
	.zero	128
	.globl	B3F7
	.align 32
	.type	B3F7, @object
	.size	B3F7, 256
B3F7:
	.zero	256
	.globl	B2G7
	.align 32
	.type	B2G7, @object
	.size	B2G7, 512
B2G7:
	.zero	512
	.globl	C2G6
	.align 32
	.type	C2G6, @object
	.size	C2G6, 256
C2G6:
	.zero	256
	.globl	D2G5
	.align 32
	.type	D2G5, @object
	.size	D2G5, 128
D2G5:
	.zero	128
	.globl	E2G4
	.align 32
	.type	E2G4, @object
	.size	E2G4, 64
E2G4:
	.zero	64
	.globl	F2G3
	.align 32
	.type	F2G3, @object
	.size	F2G3, 32
F2G3:
	.zero	32
	.globl	G2G2
	.align 16
	.type	G2G2, @object
	.size	G2G2, 16
G2G2:
	.zero	16
	.globl	G2H3D7
	.align 32
	.type	G2H3D7, @object
	.size	G2H3D7, 512
G2H3D7:
	.zero	512
	.globl	F2H4E7
	.align 32
	.type	F2H4E7, @object
	.size	F2H4E7, 512
F2H4E7:
	.zero	512
	.globl	E2H5F7
	.align 32
	.type	E2H5F7, @object
	.size	E2H5F7, 512
E2H5F7:
	.zero	512
	.globl	D2H6G7
	.align 32
	.type	D2H6G7, @object
	.size	D2H6G7, 512
D2H6G7:
	.zero	512
	.globl	F2G3C7
	.align 32
	.type	F2G3C7, @object
	.size	F2G3C7, 512
F2G3C7:
	.zero	512
	.globl	E2G4D7
	.align 32
	.type	E2G4D7, @object
	.size	E2G4D7, 512
E2G4D7:
	.zero	512
	.globl	D2G5E7
	.align 32
	.type	D2G5E7, @object
	.size	D2G5E7, 512
D2G5E7:
	.zero	512
	.globl	C2G6F7
	.align 32
	.type	C2G6F7, @object
	.size	C2G6F7, 512
C2G6F7:
	.zero	512
	.globl	B2A3E7
	.align 32
	.type	B2A3E7, @object
	.size	B2A3E7, 512
B2A3E7:
	.zero	512
	.globl	C2A4D7
	.align 32
	.type	C2A4D7, @object
	.size	C2A4D7, 512
C2A4D7:
	.zero	512
	.globl	D2A5C7
	.align 32
	.type	D2A5C7, @object
	.size	D2A5C7, 512
D2A5C7:
	.zero	512
	.globl	E2A6B7
	.align 32
	.type	E2A6B7, @object
	.size	E2A6B7, 512
E2A6B7:
	.zero	512
	.globl	C2B3F7
	.align 32
	.type	C2B3F7, @object
	.size	C2B3F7, 512
C2B3F7:
	.zero	512
	.globl	D2B4E7
	.align 32
	.type	D2B4E7, @object
	.size	D2B4E7, 512
D2B4E7:
	.zero	512
	.globl	E2B5D7
	.align 32
	.type	E2B5D7, @object
	.size	E2B5D7, 512
E2B5D7:
	.zero	512
	.globl	F2B6C7
	.align 32
	.type	F2B6C7, @object
	.size	F2B6C7, 512
F2B6C7:
	.zero	512
	.globl	B2C1G5
	.align 32
	.type	B2C1G5, @object
	.size	B2C1G5, 512
B2C1G5:
	.zero	512
	.globl	B3D1G4
	.align 32
	.type	B3D1G4, @object
	.size	B3D1G4, 512
B3D1G4:
	.zero	512
	.globl	B4E1G3
	.align 32
	.type	B4E1G3, @object
	.size	B4E1G3, 512
B4E1G3:
	.zero	512
	.globl	B5F1G2
	.align 32
	.type	B5F1G2, @object
	.size	B5F1G2, 512
B5F1G2:
	.zero	512
	.globl	B3C2G6
	.align 32
	.type	B3C2G6, @object
	.size	B3C2G6, 512
B3C2G6:
	.zero	512
	.globl	B4D2G5
	.align 32
	.type	B4D2G5, @object
	.size	B4D2G5, 512
B4D2G5:
	.zero	512
	.globl	B5E2G4
	.align 32
	.type	B5E2G4, @object
	.size	B5E2G4, 512
B5E2G4:
	.zero	512
	.globl	B6F2G3
	.align 32
	.type	B6F2G3, @object
	.size	B6F2G3, 512
B6F2G3:
	.zero	512
	.globl	B7C8G4
	.align 32
	.type	B7C8G4, @object
	.size	B7C8G4, 512
B7C8G4:
	.zero	512
	.globl	B6D8G5
	.align 32
	.type	B6D8G5, @object
	.size	B6D8G5, 512
B6D8G5:
	.zero	512
	.globl	B5E8G6
	.align 32
	.type	B5E8G6, @object
	.size	B5E8G6, 512
B5E8G6:
	.zero	512
	.globl	B4F8G7
	.align 32
	.type	B4F8G7, @object
	.size	B4F8G7, 512
B4F8G7:
	.zero	512
	.globl	B6C7G3
	.align 32
	.type	B6C7G3, @object
	.size	B6C7G3, 512
B6C7G3:
	.zero	512
	.globl	B5D7G4
	.align 32
	.type	B5D7G4, @object
	.size	B5D7G4, 512
B5D7G4:
	.zero	512
	.globl	B4E7G5
	.align 32
	.type	B4E7G5, @object
	.size	B4E7G5, 512
B4E7G5:
	.zero	512
	.globl	B3F7G6
	.align 32
	.type	B3F7G6, @object
	.size	B3F7G6, 512
B3F7G6:
	.zero	512
	.text
	.globl	first_one
	.type	first_one, @function
first_one:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 288
	mov	QWORD PTR -280[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -272[rbp], 63
	mov	DWORD PTR -268[rbp], 0
	mov	DWORD PTR -264[rbp], 58
	mov	DWORD PTR -260[rbp], 1
	mov	DWORD PTR -256[rbp], 59
	mov	DWORD PTR -252[rbp], 47
	mov	DWORD PTR -248[rbp], 53
	mov	DWORD PTR -244[rbp], 2
	mov	DWORD PTR -240[rbp], 60
	mov	DWORD PTR -236[rbp], 39
	mov	DWORD PTR -232[rbp], 48
	mov	DWORD PTR -228[rbp], 27
	mov	DWORD PTR -224[rbp], 54
	mov	DWORD PTR -220[rbp], 33
	mov	DWORD PTR -216[rbp], 42
	mov	DWORD PTR -212[rbp], 3
	mov	DWORD PTR -208[rbp], 61
	mov	DWORD PTR -204[rbp], 51
	mov	DWORD PTR -200[rbp], 37
	mov	DWORD PTR -196[rbp], 40
	mov	DWORD PTR -192[rbp], 49
	mov	DWORD PTR -188[rbp], 18
	mov	DWORD PTR -184[rbp], 28
	mov	DWORD PTR -180[rbp], 20
	mov	DWORD PTR -176[rbp], 55
	mov	DWORD PTR -172[rbp], 30
	mov	DWORD PTR -168[rbp], 34
	mov	DWORD PTR -164[rbp], 11
	mov	DWORD PTR -160[rbp], 43
	mov	DWORD PTR -156[rbp], 14
	mov	DWORD PTR -152[rbp], 22
	mov	DWORD PTR -148[rbp], 4
	mov	DWORD PTR -144[rbp], 62
	mov	DWORD PTR -140[rbp], 57
	mov	DWORD PTR -136[rbp], 46
	mov	DWORD PTR -132[rbp], 52
	mov	DWORD PTR -128[rbp], 38
	mov	DWORD PTR -124[rbp], 26
	mov	DWORD PTR -120[rbp], 32
	mov	DWORD PTR -116[rbp], 41
	mov	DWORD PTR -112[rbp], 50
	mov	DWORD PTR -108[rbp], 36
	mov	DWORD PTR -104[rbp], 17
	mov	DWORD PTR -100[rbp], 19
	mov	DWORD PTR -96[rbp], 29
	mov	DWORD PTR -92[rbp], 10
	mov	DWORD PTR -88[rbp], 13
	mov	DWORD PTR -84[rbp], 21
	mov	DWORD PTR -80[rbp], 56
	mov	DWORD PTR -76[rbp], 45
	mov	DWORD PTR -72[rbp], 25
	mov	DWORD PTR -68[rbp], 31
	mov	DWORD PTR -64[rbp], 35
	mov	DWORD PTR -60[rbp], 16
	mov	DWORD PTR -56[rbp], 9
	mov	DWORD PTR -52[rbp], 12
	mov	DWORD PTR -48[rbp], 44
	mov	DWORD PTR -44[rbp], 24
	mov	DWORD PTR -40[rbp], 15
	mov	DWORD PTR -36[rbp], 8
	mov	DWORD PTR -32[rbp], 23
	mov	DWORD PTR -28[rbp], 7
	mov	DWORD PTR -24[rbp], 6
	mov	DWORD PTR -20[rbp], 5
	mov	rax, QWORD PTR -280[rbp]
	neg	rax
	and	QWORD PTR -280[rbp], rax
	mov	rax, QWORD PTR -280[rbp]
	movabs	rdx, 571347909858961602
	imul	rax, rdx
	shr	rax, 58
	mov	eax, DWORD PTR -272[rbp+rax*4]
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	first_one, .-first_one
	.globl	P
	.type	P, @function
P:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 304
	mov	QWORD PTR -296[rbp], rdi
	mov	QWORD PTR -304[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -284[rbp], 0
	mov	QWORD PTR -280[rbp], 0
	mov	rax, QWORD PTR -296[rbp]
	mov	rdi, rax
	call	first_one
	mov	DWORD PTR -288[rbp], eax
	jmp	.L5
.L6:
	mov	eax, DWORD PTR -284[rbp]
	lea	edx, 1[rax]
	mov	DWORD PTR -284[rbp], edx
	cdqe
	mov	edx, DWORD PTR -288[rbp]
	mov	DWORD PTR -272[rbp+rax*4], edx
	mov	edx, DWORD PTR -288[rbp]
	lea	rax, -296[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	next_one@PLT
	mov	DWORD PTR -288[rbp], eax
.L5:
	mov	rax, QWORD PTR -296[rbp]
	test	rax, rax
	jne	.L6
	mov	DWORD PTR -288[rbp], 0
	jmp	.L7
.L9:
	mov	eax, DWORD PTR -288[rbp]
	mov	rdx, QWORD PTR -304[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	and	eax, 1
	test	rax, rax
	je	.L8
	mov	eax, DWORD PTR -288[rbp]
	cdqe
	mov	eax, DWORD PTR -272[rbp+rax*4]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	QWORD PTR -280[rbp], rax
.L8:
	add	DWORD PTR -288[rbp], 1
.L7:
	mov	eax, DWORD PTR -288[rbp]
	cmp	eax, DWORD PTR -284[rbp]
	jl	.L9
	mov	rax, QWORD PTR -280[rbp]
	mov	rsi, QWORD PTR -8[rbp]
	sub	rsi, QWORD PTR fs:40
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	P, .-P
	.globl	print_bitboard
	.type	print_bitboard, @function
print_bitboard:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -12[rbp], 4151342
	mov	DWORD PTR -20[rbp], 0
	jmp	.L13
.L17:
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	and	eax, 1
	test	rax, rax
	je	.L14
	mov	DWORD PTR -16[rbp], 1
	jmp	.L15
.L14:
	mov	DWORD PTR -16[rbp], 0
.L15:
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	movzx	eax, BYTE PTR -12[rbp+rax]
	movsx	eax, al
	mov	rdx, QWORD PTR -48[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	putc@PLT
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 7
	cmp	eax, 7
	jne	.L16
	mov	rax, QWORD PTR -48[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	putc@PLT
.L16:
	add	DWORD PTR -20[rbp], 1
.L13:
	cmp	DWORD PTR -20[rbp], 63
	jle	.L17
	mov	rax, QWORD PTR -48[rbp]
	mov	rdi, rax
	call	fflush@PLT
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	print_bitboard, .-print_bitboard
	.globl	print_bitline
	.type	print_bitline, @function
print_bitline:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	eax, edi
	mov	QWORD PTR -48[rbp], rsi
	mov	BYTE PTR -36[rbp], al
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -12[rbp], 4141360
	mov	DWORD PTR -20[rbp], 0
	jmp	.L20
.L23:
	movzx	edx, BYTE PTR -36[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	and	eax, 1
	test	rax, rax
	je	.L21
	mov	DWORD PTR -16[rbp], 1
	jmp	.L22
.L21:
	mov	DWORD PTR -16[rbp], 0
.L22:
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	movzx	eax, BYTE PTR -12[rbp+rax]
	movsx	eax, al
	mov	rdx, QWORD PTR -48[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	putc@PLT
	add	DWORD PTR -20[rbp], 1
.L20:
	cmp	DWORD PTR -20[rbp], 7
	jle	.L23
	mov	rax, QWORD PTR -48[rbp]
	mov	rdi, rax
	call	fflush@PLT
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	print_bitline, .-print_bitline
	.globl	h_mask
	.type	h_mask, @function
h_mask:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	mov	QWORD PTR -8[rbp], 0
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	jmp	.L26
.L27:
	mov	eax, DWORD PTR -12[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -16[rbp]
	add	eax, edx
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	QWORD PTR -8[rbp], rax
	add	DWORD PTR -16[rbp], 1
.L26:
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR -28[rbp]
	jle	.L27
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	h_mask, .-h_mask
	.globl	v_mask
	.type	v_mask, @function
v_mask:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	mov	QWORD PTR -8[rbp], 0
	mov	eax, DWORD PTR -20[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	jmp	.L30
.L31:
	mov	eax, DWORD PTR -16[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	QWORD PTR -8[rbp], rax
	add	DWORD PTR -16[rbp], 1
.L30:
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR -28[rbp]
	jle	.L31
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	v_mask, .-v_mask
	.globl	d7_mask
	.type	d7_mask, @function
d7_mask:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	mov	DWORD PTR -40[rbp], esi
	mov	DWORD PTR -44[rbp], edx
	mov	QWORD PTR -8[rbp], 0
	mov	eax, DWORD PTR -36[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L34
.L36:
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	QWORD PTR -8[rbp], rax
	add	DWORD PTR -24[rbp], 1
	sub	DWORD PTR -20[rbp], 1
.L34:
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -44[rbp]
	jg	.L35
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -40[rbp]
	jge	.L36
.L35:
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, 1
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 1
	mov	DWORD PTR -20[rbp], eax
	jmp	.L37
.L39:
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	QWORD PTR -8[rbp], rax
	sub	DWORD PTR -24[rbp], 1
	add	DWORD PTR -20[rbp], 1
.L37:
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -40[rbp]
	jl	.L38
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -44[rbp]
	jle	.L39
.L38:
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	d7_mask, .-d7_mask
	.globl	d9_mask
	.type	d9_mask, @function
d9_mask:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	mov	DWORD PTR -40[rbp], esi
	mov	DWORD PTR -44[rbp], edx
	mov	QWORD PTR -8[rbp], 0
	mov	eax, DWORD PTR -36[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L42
.L44:
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	QWORD PTR -8[rbp], rax
	sub	DWORD PTR -24[rbp], 1
	sub	DWORD PTR -20[rbp], 1
.L42:
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -40[rbp]
	jl	.L43
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -40[rbp]
	jge	.L44
.L43:
	mov	eax, DWORD PTR -16[rbp]
	add	eax, 1
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 1
	mov	DWORD PTR -20[rbp], eax
	jmp	.L45
.L47:
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 0[0+rax*8]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	QWORD PTR -8[rbp], rax
	add	DWORD PTR -24[rbp], 1
	add	DWORD PTR -20[rbp], 1
.L45:
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -44[rbp]
	jg	.L46
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -44[rbp]
	jle	.L47
.L46:
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	d9_mask, .-d9_mask
	.globl	d_mask
	.type	d_mask, @function
d_mask:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 32
	.cfi_offset 3, -24
	mov	DWORD PTR -28[rbp], edi
	mov	DWORD PTR -32[rbp], esi
	mov	DWORD PTR -36[rbp], edx
	mov	edx, DWORD PTR -36[rbp]
	mov	ecx, DWORD PTR -32[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	d7_mask
	mov	rbx, rax
	mov	edx, DWORD PTR -36[rbp]
	mov	ecx, DWORD PTR -32[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	d9_mask
	or	rax, rbx
	mov	QWORD PTR -16[rbp], rax
	mov	eax, DWORD PTR -28[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -20[rbp], eax
	cmp	DWORD PTR -24[rbp], 1
	jne	.L50
	and	QWORD PTR -16[rbp], -256
.L50:
	cmp	DWORD PTR -24[rbp], 6
	jne	.L51
	movabs	rax, 72057594037927935
	and	QWORD PTR -16[rbp], rax
.L51:
	cmp	DWORD PTR -20[rbp], 1
	jne	.L52
	movabs	rax, -72340172838076674
	and	QWORD PTR -16[rbp], rax
.L52:
	cmp	DWORD PTR -20[rbp], 6
	jne	.L53
	movabs	rax, 9187201950435737471
	and	QWORD PTR -16[rbp], rax
.L53:
	mov	rax, QWORD PTR -16[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	d_mask, .-d_mask
	.globl	d_add
	.type	d_add, @function
d_add:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	DWORD PTR -12[rbp], edx
	mov	edx, DWORD PTR -12[rbp]
	mov	ecx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	d_mask
	mov	rdx, rax
	movabs	rax, -9187201950435737472
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 9187201950435737471
	and	rax, rcx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	d_add, .-d_add
	.globl	h_to_line
	.type	h_to_line, @function
h_to_line:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	sal	eax, 3
	mov	rdx, QWORD PTR -24[rbp]
	mov	ecx, eax
	shr	rdx, cl
	mov	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	h_to_line, .-h_to_line
	.globl	v_to_line
	.type	v_to_line, @function
v_to_line:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	v_mask
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	and	rax, QWORD PTR -8[rbp]
	mov	rdx, rax
	mov	eax, DWORD PTR -12[rbp]
	movabs	rsi, 72624976668147840
	mov	ecx, eax
	sar	rsi, cl
	mov	rax, rsi
	imul	rax, rdx
	shr	rax, 56
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	v_to_line, .-v_to_line
	.globl	d7_to_line
	.type	d7_to_line, @function
d7_to_line:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d7_mask
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	and	rax, QWORD PTR -8[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	d7_to_line, .-d7_to_line
	.globl	d9_to_line
	.type	d9_to_line, @function
d9_to_line:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d9_mask
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	and	rax, QWORD PTR -8[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	d9_to_line, .-d9_to_line
	.globl	d_to_line
	.type	d_to_line, @function
d_to_line:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d_mask
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	and	rax, QWORD PTR -8[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	d_to_line, .-d_to_line
	.globl	flip_index_h
	.type	flip_index_h, @function
flip_index_h:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	rdi, rdx
	call	h_to_line
	movzx	eax, al
	mov	rdi, rax
	call	first_one
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	flip_index_h, .-flip_index_h
	.globl	v_flip_index
	.type	v_flip_index, @function
v_flip_index:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	rdi, rdx
	call	v_to_line
	movzx	eax, al
	mov	rdi, rax
	call	first_one
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	v_flip_index, .-v_flip_index
	.globl	d7_flip_index
	.type	d7_flip_index, @function
d7_flip_index:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	rdi, rdx
	call	d7_to_line
	movzx	eax, al
	mov	rdi, rax
	call	first_one
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	d7_flip_index, .-d7_flip_index
	.globl	d9_flip_index
	.type	d9_flip_index, @function
d9_flip_index:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	rdi, rdx
	call	d9_to_line
	movzx	eax, al
	mov	rdi, rax
	call	first_one
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	d9_flip_index, .-d9_flip_index
	.globl	d_flip_index
	.type	d_flip_index, @function
d_flip_index:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	rdi, rdx
	call	d_to_line
	movzx	eax, al
	mov	rdi, rax
	call	first_one
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	d_flip_index, .-d_flip_index
	.globl	flip_count
	.type	flip_count, @function
flip_count:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -4[rbp], 0
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -8[rbp], 0
	jmp	.L78
.L80:
	sub	DWORD PTR -12[rbp], 1
	add	DWORD PTR -8[rbp], 1
.L78:
	cmp	DWORD PTR -12[rbp], 0
	js	.L79
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	je	.L80
.L79:
	cmp	DWORD PTR -12[rbp], 0
	js	.L81
	mov	eax, DWORD PTR -8[rbp]
	add	DWORD PTR -4[rbp], eax
.L81:
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -8[rbp], 0
	jmp	.L82
.L84:
	add	DWORD PTR -12[rbp], 1
	add	DWORD PTR -8[rbp], 1
.L82:
	cmp	DWORD PTR -12[rbp], 7
	jg	.L83
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	je	.L84
.L83:
	cmp	DWORD PTR -12[rbp], 7
	jg	.L85
	mov	eax, DWORD PTR -8[rbp]
	add	DWORD PTR -4[rbp], eax
.L85:
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	flip_count, .-flip_count
	.globl	outflank
	.type	outflank, @function
outflank:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -4[rbp], 0
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	jne	.L88
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, 1
	mov	DWORD PTR -8[rbp], eax
	jmp	.L89
.L91:
	sub	DWORD PTR -8[rbp], 1
.L89:
	cmp	DWORD PTR -8[rbp], 0
	js	.L90
	mov	eax, DWORD PTR -8[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	jne	.L91
.L90:
	cmp	DWORD PTR -8[rbp], 0
	js	.L92
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, 1
	cmp	DWORD PTR -8[rbp], eax
	jge	.L92
	mov	eax, DWORD PTR -8[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	or	DWORD PTR -4[rbp], eax
.L92:
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 1
	mov	DWORD PTR -8[rbp], eax
	jmp	.L93
.L95:
	add	DWORD PTR -8[rbp], 1
.L93:
	cmp	DWORD PTR -8[rbp], 7
	jg	.L94
	mov	eax, DWORD PTR -8[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	jne	.L95
.L94:
	cmp	DWORD PTR -8[rbp], 7
	jg	.L88
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 1
	cmp	DWORD PTR -8[rbp], eax
	jle	.L88
	mov	eax, DWORD PTR -8[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	or	DWORD PTR -4[rbp], eax
.L88:
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	outflank, .-outflank
	.globl	flip
	.type	flip, @function
flip:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -4[rbp], 0
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	jne	.L98
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -8[rbp], 0
	jmp	.L99
.L101:
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	or	DWORD PTR -8[rbp], eax
	sub	DWORD PTR -12[rbp], 1
.L99:
	cmp	DWORD PTR -12[rbp], 0
	js	.L100
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	je	.L101
.L100:
	cmp	DWORD PTR -12[rbp], 0
	js	.L102
	mov	eax, DWORD PTR -8[rbp]
	or	DWORD PTR -4[rbp], eax
.L102:
	mov	eax, DWORD PTR -24[rbp]
	add	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -8[rbp], 0
	jmp	.L103
.L105:
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	or	DWORD PTR -8[rbp], eax
	add	DWORD PTR -12[rbp], 1
.L103:
	cmp	DWORD PTR -12[rbp], 7
	jg	.L104
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	test	eax, eax
	je	.L105
.L104:
	cmp	DWORD PTR -12[rbp], 7
	jg	.L98
	mov	eax, DWORD PTR -8[rbp]
	or	DWORD PTR -4[rbp], eax
.L98:
	mov	eax, DWORD PTR -4[rbp]
	sar	eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	flip, .-flip
	.globl	h_name
	.type	h_name, @function
h_name:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 49
	mov	BYTE PTR s.4[rip+1], al
	movzx	eax, BYTE PTR s.4[rip+1]
	mov	BYTE PTR s.4[rip+3], al
	lea	rax, s.4[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	h_name, .-h_name
	.globl	v_name
	.type	v_name, @function
v_name:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 65
	mov	BYTE PTR s.3[rip], al
	movzx	eax, BYTE PTR s.3[rip]
	mov	BYTE PTR s.3[rip+2], al
	lea	rax, s.3[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	v_name, .-v_name
	.globl	d7_name
	.type	d7_name, @function
d7_name:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 288
	mov	DWORD PTR -276[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -272[rbp], 0
	mov	DWORD PTR -268[rbp], 1
	mov	DWORD PTR -264[rbp], 2
	mov	DWORD PTR -260[rbp], 3
	mov	DWORD PTR -256[rbp], 4
	mov	DWORD PTR -252[rbp], 5
	mov	DWORD PTR -248[rbp], 6
	mov	DWORD PTR -244[rbp], 7
	mov	DWORD PTR -240[rbp], 1
	mov	DWORD PTR -236[rbp], 2
	mov	DWORD PTR -232[rbp], 3
	mov	DWORD PTR -228[rbp], 4
	mov	DWORD PTR -224[rbp], 5
	mov	DWORD PTR -220[rbp], 6
	mov	DWORD PTR -216[rbp], 7
	mov	DWORD PTR -212[rbp], 8
	mov	DWORD PTR -208[rbp], 2
	mov	DWORD PTR -204[rbp], 3
	mov	DWORD PTR -200[rbp], 4
	mov	DWORD PTR -196[rbp], 5
	mov	DWORD PTR -192[rbp], 6
	mov	DWORD PTR -188[rbp], 7
	mov	DWORD PTR -184[rbp], 8
	mov	DWORD PTR -180[rbp], 9
	mov	DWORD PTR -176[rbp], 3
	mov	DWORD PTR -172[rbp], 4
	mov	DWORD PTR -168[rbp], 5
	mov	DWORD PTR -164[rbp], 6
	mov	DWORD PTR -160[rbp], 7
	mov	DWORD PTR -156[rbp], 8
	mov	DWORD PTR -152[rbp], 9
	mov	DWORD PTR -148[rbp], 10
	mov	DWORD PTR -144[rbp], 4
	mov	DWORD PTR -140[rbp], 5
	mov	DWORD PTR -136[rbp], 6
	mov	DWORD PTR -132[rbp], 7
	mov	DWORD PTR -128[rbp], 8
	mov	DWORD PTR -124[rbp], 9
	mov	DWORD PTR -120[rbp], 10
	mov	DWORD PTR -116[rbp], 11
	mov	DWORD PTR -112[rbp], 5
	mov	DWORD PTR -108[rbp], 6
	mov	DWORD PTR -104[rbp], 7
	mov	DWORD PTR -100[rbp], 8
	mov	DWORD PTR -96[rbp], 9
	mov	DWORD PTR -92[rbp], 10
	mov	DWORD PTR -88[rbp], 11
	mov	DWORD PTR -84[rbp], 12
	mov	DWORD PTR -80[rbp], 6
	mov	DWORD PTR -76[rbp], 7
	mov	DWORD PTR -72[rbp], 8
	mov	DWORD PTR -68[rbp], 9
	mov	DWORD PTR -64[rbp], 10
	mov	DWORD PTR -60[rbp], 11
	mov	DWORD PTR -56[rbp], 12
	mov	DWORD PTR -52[rbp], 13
	mov	DWORD PTR -48[rbp], 7
	mov	DWORD PTR -44[rbp], 8
	mov	DWORD PTR -40[rbp], 9
	mov	DWORD PTR -36[rbp], 10
	mov	DWORD PTR -32[rbp], 11
	mov	DWORD PTR -28[rbp], 12
	mov	DWORD PTR -24[rbp], 13
	mov	DWORD PTR -20[rbp], 14
	mov	eax, DWORD PTR -276[rbp]
	cdqe
	mov	eax, DWORD PTR -272[rbp+rax*4]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, s.2[rip]
	add	rax, rdx
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L113
	call	__stack_chk_fail@PLT
.L113:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	d7_name, .-d7_name
	.globl	d7_shift_index
	.type	d7_shift_index, @function
d7_shift_index:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 352
	mov	DWORD PTR -340[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -272[rbp], 0
	mov	DWORD PTR -268[rbp], 1
	mov	DWORD PTR -264[rbp], 2
	mov	DWORD PTR -260[rbp], 3
	mov	DWORD PTR -256[rbp], 4
	mov	DWORD PTR -252[rbp], 5
	mov	DWORD PTR -248[rbp], 6
	mov	DWORD PTR -244[rbp], 7
	mov	DWORD PTR -240[rbp], 1
	mov	DWORD PTR -236[rbp], 2
	mov	DWORD PTR -232[rbp], 3
	mov	DWORD PTR -228[rbp], 4
	mov	DWORD PTR -224[rbp], 5
	mov	DWORD PTR -220[rbp], 6
	mov	DWORD PTR -216[rbp], 7
	mov	DWORD PTR -212[rbp], 8
	mov	DWORD PTR -208[rbp], 2
	mov	DWORD PTR -204[rbp], 3
	mov	DWORD PTR -200[rbp], 4
	mov	DWORD PTR -196[rbp], 5
	mov	DWORD PTR -192[rbp], 6
	mov	DWORD PTR -188[rbp], 7
	mov	DWORD PTR -184[rbp], 8
	mov	DWORD PTR -180[rbp], 9
	mov	DWORD PTR -176[rbp], 3
	mov	DWORD PTR -172[rbp], 4
	mov	DWORD PTR -168[rbp], 5
	mov	DWORD PTR -164[rbp], 6
	mov	DWORD PTR -160[rbp], 7
	mov	DWORD PTR -156[rbp], 8
	mov	DWORD PTR -152[rbp], 9
	mov	DWORD PTR -148[rbp], 10
	mov	DWORD PTR -144[rbp], 4
	mov	DWORD PTR -140[rbp], 5
	mov	DWORD PTR -136[rbp], 6
	mov	DWORD PTR -132[rbp], 7
	mov	DWORD PTR -128[rbp], 8
	mov	DWORD PTR -124[rbp], 9
	mov	DWORD PTR -120[rbp], 10
	mov	DWORD PTR -116[rbp], 11
	mov	DWORD PTR -112[rbp], 5
	mov	DWORD PTR -108[rbp], 6
	mov	DWORD PTR -104[rbp], 7
	mov	DWORD PTR -100[rbp], 8
	mov	DWORD PTR -96[rbp], 9
	mov	DWORD PTR -92[rbp], 10
	mov	DWORD PTR -88[rbp], 11
	mov	DWORD PTR -84[rbp], 12
	mov	DWORD PTR -80[rbp], 6
	mov	DWORD PTR -76[rbp], 7
	mov	DWORD PTR -72[rbp], 8
	mov	DWORD PTR -68[rbp], 9
	mov	DWORD PTR -64[rbp], 10
	mov	DWORD PTR -60[rbp], 11
	mov	DWORD PTR -56[rbp], 12
	mov	DWORD PTR -52[rbp], 13
	mov	DWORD PTR -48[rbp], 7
	mov	DWORD PTR -44[rbp], 8
	mov	DWORD PTR -40[rbp], 9
	mov	DWORD PTR -36[rbp], 10
	mov	DWORD PTR -32[rbp], 11
	mov	DWORD PTR -28[rbp], 12
	mov	DWORD PTR -24[rbp], 13
	mov	DWORD PTR -20[rbp], 14
	mov	DWORD PTR -336[rbp], 0
	mov	DWORD PTR -332[rbp], 0
	mov	DWORD PTR -328[rbp], 0
	mov	DWORD PTR -324[rbp], 0
	mov	DWORD PTR -320[rbp], 0
	mov	DWORD PTR -316[rbp], 0
	mov	DWORD PTR -312[rbp], 0
	mov	DWORD PTR -308[rbp], 0
	mov	DWORD PTR -304[rbp], 1
	mov	DWORD PTR -300[rbp], 2
	mov	DWORD PTR -296[rbp], 3
	mov	DWORD PTR -292[rbp], 4
	mov	DWORD PTR -288[rbp], 5
	mov	DWORD PTR -284[rbp], 0
	mov	DWORD PTR -280[rbp], 0
	mov	eax, DWORD PTR -340[rbp]
	cdqe
	mov	eax, DWORD PTR -272[rbp+rax*4]
	cdqe
	mov	eax, DWORD PTR -336[rbp+rax*4]
	mov	rdx, QWORD PTR -8[rbp]
	sub	rdx, QWORD PTR fs:40
	je	.L116
	call	__stack_chk_fail@PLT
.L116:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	d7_shift_index, .-d7_shift_index
	.globl	d9_name
	.type	d9_name, @function
d9_name:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 288
	mov	DWORD PTR -276[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -272[rbp], 7
	mov	DWORD PTR -268[rbp], 8
	mov	DWORD PTR -264[rbp], 9
	mov	DWORD PTR -260[rbp], 10
	mov	DWORD PTR -256[rbp], 11
	mov	DWORD PTR -252[rbp], 12
	mov	DWORD PTR -248[rbp], 13
	mov	DWORD PTR -244[rbp], 14
	mov	DWORD PTR -240[rbp], 6
	mov	DWORD PTR -236[rbp], 7
	mov	DWORD PTR -232[rbp], 8
	mov	DWORD PTR -228[rbp], 9
	mov	DWORD PTR -224[rbp], 10
	mov	DWORD PTR -220[rbp], 11
	mov	DWORD PTR -216[rbp], 12
	mov	DWORD PTR -212[rbp], 13
	mov	DWORD PTR -208[rbp], 5
	mov	DWORD PTR -204[rbp], 6
	mov	DWORD PTR -200[rbp], 7
	mov	DWORD PTR -196[rbp], 8
	mov	DWORD PTR -192[rbp], 9
	mov	DWORD PTR -188[rbp], 10
	mov	DWORD PTR -184[rbp], 11
	mov	DWORD PTR -180[rbp], 12
	mov	DWORD PTR -176[rbp], 4
	mov	DWORD PTR -172[rbp], 5
	mov	DWORD PTR -168[rbp], 6
	mov	DWORD PTR -164[rbp], 7
	mov	DWORD PTR -160[rbp], 8
	mov	DWORD PTR -156[rbp], 9
	mov	DWORD PTR -152[rbp], 10
	mov	DWORD PTR -148[rbp], 11
	mov	DWORD PTR -144[rbp], 3
	mov	DWORD PTR -140[rbp], 4
	mov	DWORD PTR -136[rbp], 5
	mov	DWORD PTR -132[rbp], 6
	mov	DWORD PTR -128[rbp], 7
	mov	DWORD PTR -124[rbp], 8
	mov	DWORD PTR -120[rbp], 9
	mov	DWORD PTR -116[rbp], 10
	mov	DWORD PTR -112[rbp], 2
	mov	DWORD PTR -108[rbp], 3
	mov	DWORD PTR -104[rbp], 4
	mov	DWORD PTR -100[rbp], 5
	mov	DWORD PTR -96[rbp], 6
	mov	DWORD PTR -92[rbp], 7
	mov	DWORD PTR -88[rbp], 8
	mov	DWORD PTR -84[rbp], 9
	mov	DWORD PTR -80[rbp], 1
	mov	DWORD PTR -76[rbp], 2
	mov	DWORD PTR -72[rbp], 3
	mov	DWORD PTR -68[rbp], 4
	mov	DWORD PTR -64[rbp], 5
	mov	DWORD PTR -60[rbp], 6
	mov	DWORD PTR -56[rbp], 7
	mov	DWORD PTR -52[rbp], 8
	mov	DWORD PTR -48[rbp], 0
	mov	DWORD PTR -44[rbp], 1
	mov	DWORD PTR -40[rbp], 2
	mov	DWORD PTR -36[rbp], 3
	mov	DWORD PTR -32[rbp], 4
	mov	DWORD PTR -28[rbp], 5
	mov	DWORD PTR -24[rbp], 6
	mov	DWORD PTR -20[rbp], 7
	mov	eax, DWORD PTR -276[rbp]
	cdqe
	mov	eax, DWORD PTR -272[rbp+rax*4]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	lea	rdx, s.1[rip]
	add	rax, rdx
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L119
	call	__stack_chk_fail@PLT
.L119:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	d9_name, .-d9_name
	.globl	d9_shift_index
	.type	d9_shift_index, @function
d9_shift_index:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 352
	mov	DWORD PTR -340[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -272[rbp], 7
	mov	DWORD PTR -268[rbp], 8
	mov	DWORD PTR -264[rbp], 9
	mov	DWORD PTR -260[rbp], 10
	mov	DWORD PTR -256[rbp], 11
	mov	DWORD PTR -252[rbp], 12
	mov	DWORD PTR -248[rbp], 13
	mov	DWORD PTR -244[rbp], 14
	mov	DWORD PTR -240[rbp], 6
	mov	DWORD PTR -236[rbp], 7
	mov	DWORD PTR -232[rbp], 8
	mov	DWORD PTR -228[rbp], 9
	mov	DWORD PTR -224[rbp], 10
	mov	DWORD PTR -220[rbp], 11
	mov	DWORD PTR -216[rbp], 12
	mov	DWORD PTR -212[rbp], 13
	mov	DWORD PTR -208[rbp], 5
	mov	DWORD PTR -204[rbp], 6
	mov	DWORD PTR -200[rbp], 7
	mov	DWORD PTR -196[rbp], 8
	mov	DWORD PTR -192[rbp], 9
	mov	DWORD PTR -188[rbp], 10
	mov	DWORD PTR -184[rbp], 11
	mov	DWORD PTR -180[rbp], 12
	mov	DWORD PTR -176[rbp], 4
	mov	DWORD PTR -172[rbp], 5
	mov	DWORD PTR -168[rbp], 6
	mov	DWORD PTR -164[rbp], 7
	mov	DWORD PTR -160[rbp], 8
	mov	DWORD PTR -156[rbp], 9
	mov	DWORD PTR -152[rbp], 10
	mov	DWORD PTR -148[rbp], 11
	mov	DWORD PTR -144[rbp], 3
	mov	DWORD PTR -140[rbp], 4
	mov	DWORD PTR -136[rbp], 5
	mov	DWORD PTR -132[rbp], 6
	mov	DWORD PTR -128[rbp], 7
	mov	DWORD PTR -124[rbp], 8
	mov	DWORD PTR -120[rbp], 9
	mov	DWORD PTR -116[rbp], 10
	mov	DWORD PTR -112[rbp], 2
	mov	DWORD PTR -108[rbp], 3
	mov	DWORD PTR -104[rbp], 4
	mov	DWORD PTR -100[rbp], 5
	mov	DWORD PTR -96[rbp], 6
	mov	DWORD PTR -92[rbp], 7
	mov	DWORD PTR -88[rbp], 8
	mov	DWORD PTR -84[rbp], 9
	mov	DWORD PTR -80[rbp], 1
	mov	DWORD PTR -76[rbp], 2
	mov	DWORD PTR -72[rbp], 3
	mov	DWORD PTR -68[rbp], 4
	mov	DWORD PTR -64[rbp], 5
	mov	DWORD PTR -60[rbp], 6
	mov	DWORD PTR -56[rbp], 7
	mov	DWORD PTR -52[rbp], 8
	mov	DWORD PTR -48[rbp], 0
	mov	DWORD PTR -44[rbp], 1
	mov	DWORD PTR -40[rbp], 2
	mov	DWORD PTR -36[rbp], 3
	mov	DWORD PTR -32[rbp], 4
	mov	DWORD PTR -28[rbp], 5
	mov	DWORD PTR -24[rbp], 6
	mov	DWORD PTR -20[rbp], 7
	mov	DWORD PTR -336[rbp], 0
	mov	DWORD PTR -332[rbp], 0
	mov	DWORD PTR -328[rbp], 0
	mov	DWORD PTR -324[rbp], 0
	mov	DWORD PTR -320[rbp], 0
	mov	DWORD PTR -316[rbp], 0
	mov	DWORD PTR -312[rbp], 0
	mov	DWORD PTR -308[rbp], 0
	mov	DWORD PTR -304[rbp], 1
	mov	DWORD PTR -300[rbp], 2
	mov	DWORD PTR -296[rbp], 3
	mov	DWORD PTR -292[rbp], 4
	mov	DWORD PTR -288[rbp], 5
	mov	DWORD PTR -284[rbp], 0
	mov	DWORD PTR -280[rbp], 0
	mov	eax, DWORD PTR -340[rbp]
	cdqe
	mov	eax, DWORD PTR -272[rbp+rax*4]
	cdqe
	mov	eax, DWORD PTR -336[rbp+rax*4]
	mov	rdx, QWORD PTR -8[rbp]
	sub	rdx, QWORD PTR fs:40
	je	.L122
	call	__stack_chk_fail@PLT
.L122:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	d9_shift_index, .-d9_shift_index
	.globl	d_name
	.type	d_name, @function
d_name:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 3
	sub	rax, rdx
	lea	rdx, a.0[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -36[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	edx, 65[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 2
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -12[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 3
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 6
	mov	BYTE PTR [rax], 0
	cmp	DWORD PTR -16[rbp], 1
	jg	.L124
	cmp	DWORD PTR -12[rbp], 1
	jle	.L124
	cmp	DWORD PTR -12[rbp], 5
	jg	.L124
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L125
.L127:
	sub	DWORD PTR -24[rbp], 1
	add	DWORD PTR -20[rbp], 1
.L125:
	cmp	DWORD PTR -24[rbp], 1
	jle	.L126
	cmp	DWORD PTR -20[rbp], 5
	jle	.L127
.L126:
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 65
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L128
.L130:
	add	DWORD PTR -24[rbp], 1
	add	DWORD PTR -20[rbp], 1
.L128:
	cmp	DWORD PTR -24[rbp], 5
	jg	.L129
	cmp	DWORD PTR -20[rbp], 5
	jle	.L130
.L129:
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, 65[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 5
	mov	BYTE PTR [rax], dl
	jmp	.L131
.L124:
	cmp	DWORD PTR -16[rbp], 5
	jle	.L132
	cmp	DWORD PTR -12[rbp], 1
	jle	.L132
	cmp	DWORD PTR -12[rbp], 5
	jg	.L132
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L133
.L135:
	sub	DWORD PTR -24[rbp], 1
	sub	DWORD PTR -20[rbp], 1
.L133:
	cmp	DWORD PTR -24[rbp], 1
	jle	.L134
	cmp	DWORD PTR -20[rbp], 1
	jg	.L135
.L134:
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 65
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L136
.L138:
	add	DWORD PTR -24[rbp], 1
	sub	DWORD PTR -20[rbp], 1
.L136:
	cmp	DWORD PTR -24[rbp], 5
	jg	.L137
	cmp	DWORD PTR -20[rbp], 1
	jg	.L138
.L137:
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, 65[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 5
	mov	BYTE PTR [rax], dl
	jmp	.L131
.L132:
	cmp	DWORD PTR -12[rbp], 1
	jg	.L139
	cmp	DWORD PTR -16[rbp], 1
	jle	.L139
	cmp	DWORD PTR -16[rbp], 5
	jg	.L139
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L140
.L142:
	add	DWORD PTR -24[rbp], 1
	sub	DWORD PTR -20[rbp], 1
.L140:
	cmp	DWORD PTR -24[rbp], 5
	jg	.L141
	cmp	DWORD PTR -20[rbp], 1
	jg	.L142
.L141:
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 65
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L143
.L145:
	add	DWORD PTR -24[rbp], 1
	add	DWORD PTR -20[rbp], 1
.L143:
	cmp	DWORD PTR -24[rbp], 5
	jg	.L144
	cmp	DWORD PTR -20[rbp], 5
	jle	.L145
.L144:
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, 65[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 5
	mov	BYTE PTR [rax], dl
	jmp	.L131
.L139:
	cmp	DWORD PTR -12[rbp], 5
	jle	.L146
	cmp	DWORD PTR -16[rbp], 1
	jle	.L146
	cmp	DWORD PTR -16[rbp], 5
	jg	.L146
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L147
.L149:
	sub	DWORD PTR -24[rbp], 1
	sub	DWORD PTR -20[rbp], 1
.L147:
	cmp	DWORD PTR -24[rbp], 1
	jle	.L148
	cmp	DWORD PTR -20[rbp], 1
	jg	.L149
.L148:
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 65
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -20[rbp], eax
	jmp	.L150
.L152:
	sub	DWORD PTR -24[rbp], 1
	add	DWORD PTR -20[rbp], 1
.L150:
	cmp	DWORD PTR -24[rbp], 1
	jle	.L151
	cmp	DWORD PTR -20[rbp], 5
	jle	.L152
.L151:
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, 65[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -24[rbp]
	lea	edx, 49[rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 5
	mov	BYTE PTR [rax], dl
	jmp	.L131
.L146:
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], 0
.L131:
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	d_name, .-d_name
	.globl	init_index_to_bitarray
	.type	init_index_to_bitarray, @function
init_index_to_bitarray:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], 0
	jmp	.L155
.L223:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B1G1[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2G2[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3G3[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4G4[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5G5[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6G6[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7G7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B8G8[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, A2A7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2B7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2C7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2D7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2E7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2F7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2G7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, H2H7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2B7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2G7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L156
.L222:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	rax, rcx
	test	rax, rax
	je	.L157
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B1G1[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B1G1[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2G2[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 9
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2G2[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3G3[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 17
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3G3[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4G4[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4G4[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5G5[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5G5[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6G6[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 41
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6G6[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7G7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 49
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7G7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B8G8[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 57
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B8G8[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, A2A7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, 1
	sal	eax, 3
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, A2A7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2B7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	add	eax, 9
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2B7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2C7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	add	eax, 10
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2C7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2D7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	add	eax, 11
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2D7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2E7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	add	eax, 12
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2E7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2F7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	add	eax, 13
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2F7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2G7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	add	eax, 14
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2G7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, H2H7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	add	eax, 15
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, H2H7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2B7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 49
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2B7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2G7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 1[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2G7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2C1G5[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L158
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 9
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L159
.L158:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 2
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L159:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2C1G5[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3D1G4[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L160
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 17
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L161
.L160:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -2[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 3
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L161:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3D1G4[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4E1G3[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L162
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L163
.L162:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -3[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 4
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L163:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4E1G3[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5F1G2[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L164
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L165
.L164:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -4[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 5
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L165:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5F1G2[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3C2G6[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L166
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 17
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L167
.L166:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 10
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L167:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3C2G6[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4D2G5[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L168
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L169
.L168:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -2[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 11
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L169:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4D2G5[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5E2G4[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L170
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L171
.L170:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -3[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 12
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L171:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5E2G4[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6F2G3[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L172
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 41
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L173
.L172:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -4[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 13
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L173:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6F2G3[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7C8G4[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L174
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 49
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L175
.L174:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 1
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 58
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L175:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7C8G4[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6D8G5[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L176
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 41
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L177
.L176:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 2
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 59
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L177:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6D8G5[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5E8G6[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L178
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L179
.L178:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 3
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 60
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L179:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5E8G6[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4F8G7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L180
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L181
.L180:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 4
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 61
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L181:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4F8G7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6C7G3[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L182
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 41
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L183
.L182:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 1
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 50
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L183:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6C7G3[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5D7G4[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L184
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L185
.L184:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 2
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 51
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L185:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5D7G4[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4E7G5[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L186
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L187
.L186:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 3
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 52
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L187:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4E7G5[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3F7G6[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L188
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 17
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L189
.L188:
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, 4
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 53
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L189:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3F7G6[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2H3D7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L190
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 14
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L191
.L190:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 23
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L191:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2H3D7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2H4E7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L192
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 13
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L193
.L192:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -2[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 31
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L193:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2H4E7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2H5F7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L194
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 12
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L195
.L194:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -3[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 39
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L195:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2H5F7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2H6G7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L196
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 11
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L197
.L196:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -4[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 47
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L197:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2H6G7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2G3C7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L198
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 13
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L199
.L198:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 22
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L199:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2G3C7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2G4D7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L200
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 12
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L201
.L200:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -2[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 30
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L201:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2G4D7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2G5E7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L202
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 11
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L203
.L202:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -3[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 38
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L203:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2G5E7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2G6F7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L204
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 10
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L205
.L204:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -4[rax]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 46
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L205:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2G6F7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2A3E7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L206
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 9
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L207
.L206:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 16
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L207:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2A3E7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2A4D7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L208
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 10
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L209
.L208:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -2[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 24
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L209:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2A4D7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2A5C7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L210
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 11
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L211
.L210:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -3[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 32
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L211:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2A5C7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2A6B7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L212
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 12
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L213
.L212:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -4[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 40
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L213:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2A6B7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2B3F7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 0
	jg	.L214
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 10
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L215
.L214:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -1[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 17
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L215:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2B3F7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2B4E7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 1
	jg	.L216
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 11
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L217
.L216:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -2[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L217:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2B4E7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2B5D7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 2
	jg	.L218
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 12
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L219
.L218:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -3[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L219:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2B5D7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2B6C7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	cmp	DWORD PTR -8[rbp], 3
	jg	.L220
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	sub	eax, edx
	add	eax, 13
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	jmp	.L221
.L220:
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, -4[rax]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 41
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L221:
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2B6C7[rip]
	mov	QWORD PTR [rdx+rax], rcx
.L157:
	add	DWORD PTR -8[rbp], 1
.L156:
	cmp	DWORD PTR -8[rbp], 5
	jle	.L222
	add	DWORD PTR -4[rbp], 1
.L155:
	cmp	DWORD PTR -4[rbp], 63
	jle	.L223
	mov	DWORD PTR -4[rbp], 0
	jmp	.L224
.L228:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2B6[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G3C7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3F7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2G6[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L225
.L227:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	rax, rcx
	test	rax, rax
	je	.L226
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2B6[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 41
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2B6[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G3C7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 50
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G3C7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3F7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 17
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B3F7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2G6[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 10
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2G6[rip]
	mov	QWORD PTR [rdx+rax], rcx
.L226:
	add	DWORD PTR -8[rbp], 1
.L225:
	cmp	DWORD PTR -8[rbp], 4
	jle	.L227
	add	DWORD PTR -4[rbp], 1
.L224:
	cmp	DWORD PTR -4[rbp], 31
	jle	.L228
	mov	DWORD PTR -4[rbp], 0
	jmp	.L229
.L233:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2B5[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G4D7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4E7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2G5[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L230
.L232:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	rax, rcx
	test	rax, rax
	je	.L231
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2B5[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2B5[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G4D7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 51
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G4D7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4E7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B4E7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2G5[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 11
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2G5[rip]
	mov	QWORD PTR [rdx+rax], rcx
.L231:
	add	DWORD PTR -8[rbp], 1
.L230:
	cmp	DWORD PTR -8[rbp], 3
	jle	.L232
	add	DWORD PTR -4[rbp], 1
.L229:
	cmp	DWORD PTR -4[rbp], 15
	jle	.L233
	mov	DWORD PTR -4[rbp], 0
	jmp	.L234
.L238:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2B4[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G5E7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5D7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2G4[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L235
.L237:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	rax, rcx
	test	rax, rax
	je	.L236
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2B4[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 25
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, D2B4[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G5E7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 52
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G5E7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5D7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 33
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B5D7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2G4[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 12
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, E2G4[rip]
	mov	QWORD PTR [rdx+rax], rcx
.L236:
	add	DWORD PTR -8[rbp], 1
.L235:
	cmp	DWORD PTR -8[rbp], 2
	jle	.L237
	add	DWORD PTR -4[rbp], 1
.L234:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L238
	mov	DWORD PTR -4[rbp], 0
	jmp	.L239
.L243:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2B3[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G6F7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6C7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2G3[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L240
.L242:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	rax, rcx
	test	rax, rax
	je	.L241
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2B3[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 17
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, C2B3[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G6F7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 53
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G6F7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6C7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 41
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B6C7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2G3[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 13
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, F2G3[rip]
	mov	QWORD PTR [rdx+rax], rcx
.L241:
	add	DWORD PTR -8[rbp], 1
.L240:
	cmp	DWORD PTR -8[rbp], 1
	jle	.L242
	add	DWORD PTR -4[rbp], 1
.L239:
	cmp	DWORD PTR -4[rbp], 3
	jle	.L243
	mov	DWORD PTR -4[rbp], 0
	jmp	.L244
.L248:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2B2[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G7G7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7B7[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2G2[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L245
.L247:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	rax, rcx
	test	rax, rax
	je	.L246
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2B2[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 9
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B2B2[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G7G7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, eax
	lea	edx, 0[0+rax*8]
	mov	eax, esi
	sub	eax, edx
	add	eax, 54
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G7G7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7B7[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 49
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, B7B7[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2G2[rip]
	mov	rcx, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	sal	eax, 3
	add	eax, edx
	add	eax, 14
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	or	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, G2G2[rip]
	mov	QWORD PTR [rdx+rax], rcx
.L246:
	add	DWORD PTR -8[rbp], 1
.L245:
	cmp	DWORD PTR -8[rbp], 0
	jle	.L247
	add	DWORD PTR -4[rbp], 1
.L244:
	cmp	DWORD PTR -4[rbp], 1
	jle	.L248
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	init_index_to_bitarray, .-init_index_to_bitarray
	.section	.rodata
	.align 8
.LC0:
	.string	"/** conversion from an 8-bit line to the %.2s-%.2s-%.2s line */\n"
	.align 8
.LC1:
	.string	"unsigned long long %s[%d] = {\n"
.LC2:
	.string	"\t\t"
.LC3:
	.string	"0x%016llxULL,"
.LC4:
	.string	"};\n\n"
	.text
	.globl	print_bitarray_
	.type	print_bitarray_, @function
print_bitarray_:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	mov	QWORD PTR -48[rbp], rcx
	mov	rax, QWORD PTR -48[rbp]
	lea	rsi, 4[rax]
	mov	rax, QWORD PTR -48[rbp]
	lea	rcx, 2[rax]
	mov	rdx, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	r8, rsi
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	ecx, DWORD PTR -36[rbp]
	mov	rdx, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	DWORD PTR -4[rbp], 0
	jmp	.L250
.L254:
	mov	eax, DWORD PTR -4[rbp]
	and	eax, 7
	test	eax, eax
	jne	.L251
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	mov	edx, 2
	mov	esi, 1
	lea	rdi, .LC2[rip]
	call	fwrite@PLT
.L251:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	cmp	eax, 7
	jne	.L252
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	jmp	.L253
.L252:
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	mov	edi, 32
	call	fputc@PLT
.L253:
	add	DWORD PTR -4[rbp], 1
.L250:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -36[rbp]
	jl	.L254
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC4[rip]
	call	fwrite@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	print_bitarray_, .-print_bitarray_
	.section	.rodata
.LC5:
	.string	"w"
.LC6:
	.string	"flip_kindergarten.c"
.LC7:
	.string	"cannot open 'flip.c'\n"
.LC8:
	.string	"Generating code..."
.LC9:
	.string	"/**\n"
.LC10:
	.string	" * @file flip_kindergarten.c\n"
.LC11:
	.string	" *\n"
	.align 8
.LC12:
	.string	" * This module deals with flipping discs.\n"
	.align 8
.LC13:
	.string	" * A function is provided for each square of the board. These functions are\n"
	.align 8
.LC14:
	.string	" * gathered into an array of functions, so that a fast access to each function\n"
	.align 8
.LC15:
	.string	" * is allowed. The generic form of the function take as input the player and\n"
	.align 8
.LC16:
	.string	" * the opponent bitboards and return the flipped squares into a bitboard.\n"
	.align 8
.LC17:
	.string	" * Given the following notation:\n"
	.align 8
.LC18:
	.string	" *  - x = square where we play,\n"
	.align 8
.LC19:
	.string	" *  - P = player's disc pattern,\n"
	.align 8
.LC20:
	.string	" *  - O = opponent's disc pattern,\n"
	.align 8
.LC21:
	.string	" * the basic principle is to read into an array the result of a move. Doing\n"
	.align 8
.LC22:
	.string	" * this is easier for a single line ; so we can use arrays of the form:\n"
	.align 8
.LC23:
	.string	" *  - ARRAY[x][8-bits disc pattern].\n"
	.align 8
.LC24:
	.string	" * The problem is thus to convert any line of a 64-bits disc pattern into an\n"
	.align 8
.LC25:
	.string	" * 8-bits disc pattern. A fast way to do this is to select the right line,\n"
	.align 8
.LC26:
	.string	" * with a bit-mask, to gather the masked-bits into a continuous set by a simple\n"
	.align 8
.LC27:
	.string	" * multiplication and to right-shift the result to scale it into a number\n"
.LC28:
	.string	" * between 0 and 255.\n"
	.align 8
.LC29:
	.string	" * Once we get our 8-bits disc patterns,a first array (OUTFLANK) is used to\n"
	.align 8
.LC30:
	.string	" * get the player's discs that surround the opponent discs:\n"
	.align 8
.LC31:
	.string	" *  - outflank = OUTFLANK[x][O] & P\n"
	.align 8
.LC32:
	.string	" * The result is then used as an index to access a second array giving the\n"
	.align 8
.LC33:
	.string	" * flipped discs according to the surrounding player's discs:\n"
	.align 8
.LC34:
	.string	" *  - flipped = FLIPPED[x][outflank].\n"
	.align 8
.LC35:
	.string	" * Finally, a precomputed array transform the 8-bits disc pattern back into a\n"
	.align 8
.LC36:
	.string	" * 64-bits disc pattern, and the flipped squares for each line are gathered and\n"
	.align 8
.LC37:
	.string	" * returned to generate moves.\n"
	.align 8
.LC38:
	.string	" * File automatically generated\n"
.LC39:
	.string	" * @date 1998 - 2012\n"
.LC40:
	.string	" * @author Richard Delorme\n"
.LC41:
	.string	" * @version 4.3\n"
.LC42:
	.string	" */\n\n"
.LC43:
	.string	"/** outflank array */\n"
	.align 8
.LC44:
	.string	"const unsigned char OUTFLANK[8][64] = {\n"
.LC45:
	.string	"\t{\n"
.LC46:
	.string	"0x%02x,"
.LC47:
	.string	"\t},\n"
.LC48:
	.string	"/** flip array */\n"
	.align 8
.LC49:
	.string	"const unsigned char FLIPPED[8][144] = {\n"
.LC50:
	.string	"B1G1"
.LC51:
	.string	"B2G2"
.LC52:
	.string	"B3G3"
.LC53:
	.string	"B4G4"
.LC54:
	.string	"B5G5"
.LC55:
	.string	"B6G6"
.LC56:
	.string	"B7G7"
.LC57:
	.string	"B8G8"
.LC58:
	.string	"A2A7"
.LC59:
	.string	"B2B7"
.LC60:
	.string	"C2C7"
.LC61:
	.string	"D2D7"
.LC62:
	.string	"E2E7"
.LC63:
	.string	"F2F7"
.LC64:
	.string	"G2G7"
.LC65:
	.string	"H2H7"
.LC66:
	.string	"E2B5"
.LC67:
	.string	"F2B6"
.LC68:
	.string	"G2B7"
.LC69:
	.string	"G3C7"
.LC70:
	.string	"G4D7"
.LC71:
	.string	"B4E7"
.LC72:
	.string	"B3F7"
.LC73:
	.string	"B2G7"
.LC74:
	.string	"C2G6"
.LC75:
	.string	"D2G5"
.LC76:
	.string	"B2C1G5"
.LC77:
	.string	"B3D1G4"
.LC78:
	.string	"B4E1G3"
.LC79:
	.string	"B5F1G2"
.LC80:
	.string	"B3C2G6"
.LC81:
	.string	"B4D2G5"
.LC82:
	.string	"B5E2G4"
.LC83:
	.string	"B6F2G3"
.LC84:
	.string	"B6C7G3"
.LC85:
	.string	"B5D7G4"
.LC86:
	.string	"B4E7G5"
.LC87:
	.string	"B3F7G6"
.LC88:
	.string	"B7C8G4"
.LC89:
	.string	"B6D8G5"
.LC90:
	.string	"B5E8G6"
.LC91:
	.string	"B4F8G7"
.LC92:
	.string	"G2H3D7"
.LC93:
	.string	"F2H4E7"
.LC94:
	.string	"E2H5F7"
.LC95:
	.string	"D2H6G7"
.LC96:
	.string	"F2G3C7"
.LC97:
	.string	"E2G4D7"
.LC98:
	.string	"D2G5E7"
.LC99:
	.string	"C2G6F7"
.LC100:
	.string	"B2A3E7"
.LC101:
	.string	"C2A4D7"
.LC102:
	.string	"D2A5C7"
.LC103:
	.string	"E2A6B7"
.LC104:
	.string	"C2B3F7"
.LC105:
	.string	"D2B4E7"
.LC106:
	.string	"E2B5D7"
.LC107:
	.string	"F2B6C7"
	.align 8
.LC108:
	.string	" * Compute flipped discs when playing on square %s.\n"
	.align 8
.LC109:
	.string	" * @param P player's disc pattern.\n"
	.align 8
.LC110:
	.string	" * @param O opponent's disc pattern.\n"
	.align 8
.LC111:
	.string	" * @return flipped disc pattern.\n"
.LC112:
	.string	" */\n"
	.align 8
.LC113:
	.string	"static unsigned long long flip_%s(const unsigned long long P, const unsigned long long O)\n{\n"
	.align 8
.LC114:
	.string	"\tregister int index_h, index_v"
.LC115:
	.string	", index_d"
.LC116:
	.string	", index_d7"
.LC117:
	.string	", index_d9"
.LC118:
	.string	";\n"
	.align 8
.LC119:
	.string	"\tregister unsigned long long flipped;\n"
	.align 8
.LC120:
	.string	"\tindex_v = OUTFLANK[%d][(O & 0x%016llx) * 0x%016llx >> 57] & (P & 0x%016llx) * 0x%016llx >> 56;\n"
	.align 8
.LC121:
	.string	"\tindex_v = FLIPPED[%d][index_v];\n"
.LC122:
	.string	"\tflipped = %s[index_v];\n\n"
	.align 8
.LC123:
	.string	"\tindex_h = OUTFLANK[%d][(O >> %d) & 0x3f] & (P >> %d);\n"
	.align 8
.LC124:
	.string	"\tindex_h = OUTFLANK[%d][(O >> 1) & 0x3f] & P;\n"
	.align 8
.LC125:
	.string	"\tflipped |= ((unsigned long long) FLIPPED[%d][index_h])"
.LC126:
	.string	" << %d"
.LC127:
	.string	";\n\n"
	.align 8
.LC128:
	.string	"\tindex_d = OUTFLANK[%d][(O & 0x%016llxULL) * 0x%016llxULL >> 57] & (P & 0x%016llxULL) * 0x%016llxULL >> 56;\n"
	.align 8
.LC129:
	.string	"\tindex_d = FLIPPED[%d][index_d];\n"
.LC130:
	.string	"\tflipped |= %s[index_d];\n\n"
	.align 8
.LC131:
	.string	"\tindex_d = OUTFLANK[%d][(((O & 0x%016llxULL) + 0x%016llxULL) & 0x8080808080808080ULL) * 0x0002040810204081ULL >> 57] & (((P & 0x%016llxULL) + 0x%016llxULL) & 0x8080808080808080ULL) * 0x0002040810204081ULL >> 56;\n"
	.align 8
.LC132:
	.string	"\tflipped |= ((P >> 7) & 0x%016llxULL & O) | ((P << 7) & 0x%016llxULL & O);\n\n"
	.align 8
.LC133:
	.string	"\tflipped |= ((P >> 7) & 0x%016llxULL & O);\n\n"
	.align 8
.LC134:
	.string	"\tflipped |= ((P << 7) & 0x%016llxULL & O);\n\n"
	.align 8
.LC135:
	.string	"\tindex_d7 = OUTFLANK[%d][(O & 0x%016llxULL)* 0x%016llxULL >> 57] & (P & 0x%016llxULL) * 0x%016llxULL >> 56;\n"
	.align 8
.LC136:
	.string	"\tindex_d7 = FLIPPED[%d][index_d7];\n"
	.align 8
.LC137:
	.string	"\tflipped |= %s[index_d7 >> %d];\n\n"
.LC138:
	.string	"\tflipped |= %s[index_d7];\n\n"
	.align 8
.LC139:
	.string	"\tflipped |= ((P >> 9) & 0x%016llxULL & O) | ((P << 9) & 0x%016llxULL & O);\n\n"
	.align 8
.LC140:
	.string	"\tflipped |= ((P >> 9) & 0x%016llxULL & O);\n\n"
	.align 8
.LC141:
	.string	"\tflipped |= ((P << 9) & 0x%016llxULL & O);\n\n"
	.align 8
.LC142:
	.string	"\tindex_d9 = OUTFLANK[%d][(O & 0x%016llxULL)* 0x%016llxULL >> 57] & (P & 0x%016llxULL) * 0x%016llxULL >> 56;\n"
	.align 8
.LC143:
	.string	"\tindex_d9 = FLIPPED[%d][index_d9];\n"
	.align 8
.LC144:
	.string	"\tflipped |= %s[index_d9 >> %d];\n\n"
.LC145:
	.string	"\tflipped |= %s[index_d9];\n\n"
.LC146:
	.string	"\treturn flipped;\n"
.LC147:
	.string	"}\n\n"
	.align 8
.LC148:
	.string	" * Compute (zero-) flipped discs when plassing.\n"
	.align 8
.LC149:
	.string	"static unsigned long long flip_pass(const unsigned long long P, const unsigned long long O)\n{\n"
	.align 8
.LC150:
	.string	"\t(void) P; // useless code to shut-up compiler warning\n"
.LC151:
	.string	"\t(void) O;\n"
.LC152:
	.string	"\treturn 0;\n"
.LC153:
	.string	"}\n\n\n"
	.align 8
.LC154:
	.string	"/** Array of functions to compute flipped discs */\n"
	.align 8
.LC155:
	.string	"unsigned long long (*flip[])(const unsigned long long, const unsigned long long) = {\n"
.LC156:
	.string	"flip_%s,"
.LC157:
	.string	"\tflip_pass, flip_pass\n};\n\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 4096
	or	QWORD PTR [rsp], 0
	sub	rsp, 4096
	or	QWORD PTR [rsp], 0
	sub	rsp, 816
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -40[rbp], rax
	xor	eax, eax
	mov	WORD PTR -43[rbp], 11565
	mov	BYTE PTR -41[rbp], 0
	mov	DWORD PTR -9008[rbp], 1
	mov	DWORD PTR -9004[rbp], 1
	mov	DWORD PTR -9000[rbp], 1
	mov	DWORD PTR -8996[rbp], 1
	mov	DWORD PTR -8992[rbp], 1
	mov	DWORD PTR -8988[rbp], 0
	mov	DWORD PTR -8984[rbp], 0
	mov	DWORD PTR -8980[rbp], 0
	mov	DWORD PTR -8976[rbp], 1
	mov	DWORD PTR -8972[rbp], 1
	mov	DWORD PTR -8968[rbp], 1
	mov	DWORD PTR -8964[rbp], 1
	mov	DWORD PTR -8960[rbp], 1
	mov	DWORD PTR -8956[rbp], 0
	mov	DWORD PTR -8952[rbp], 0
	mov	DWORD PTR -8948[rbp], 0
	mov	DWORD PTR -8944[rbp], 1
	mov	DWORD PTR -8940[rbp], 1
	mov	DWORD PTR -8936[rbp], 1
	mov	DWORD PTR -8932[rbp], 1
	mov	DWORD PTR -8928[rbp], 1
	mov	DWORD PTR -8924[rbp], 0
	mov	DWORD PTR -8920[rbp], 0
	mov	DWORD PTR -8916[rbp], 0
	mov	DWORD PTR -8912[rbp], 1
	mov	DWORD PTR -8908[rbp], 1
	mov	DWORD PTR -8904[rbp], 1
	mov	DWORD PTR -8900[rbp], 1
	mov	DWORD PTR -8896[rbp], 1
	mov	DWORD PTR -8892[rbp], 1
	mov	DWORD PTR -8888[rbp], 1
	mov	DWORD PTR -8884[rbp], 1
	mov	DWORD PTR -8880[rbp], 1
	mov	DWORD PTR -8876[rbp], 1
	mov	DWORD PTR -8872[rbp], 1
	mov	DWORD PTR -8868[rbp], 1
	mov	DWORD PTR -8864[rbp], 1
	mov	DWORD PTR -8860[rbp], 1
	mov	DWORD PTR -8856[rbp], 1
	mov	DWORD PTR -8852[rbp], 1
	mov	DWORD PTR -8848[rbp], 0
	mov	DWORD PTR -8844[rbp], 0
	mov	DWORD PTR -8840[rbp], 0
	mov	DWORD PTR -8836[rbp], 1
	mov	DWORD PTR -8832[rbp], 1
	mov	DWORD PTR -8828[rbp], 1
	mov	DWORD PTR -8824[rbp], 1
	mov	DWORD PTR -8820[rbp], 1
	mov	DWORD PTR -8816[rbp], 0
	mov	DWORD PTR -8812[rbp], 0
	mov	DWORD PTR -8808[rbp], 0
	mov	DWORD PTR -8804[rbp], 1
	mov	DWORD PTR -8800[rbp], 1
	mov	DWORD PTR -8796[rbp], 1
	mov	DWORD PTR -8792[rbp], 1
	mov	DWORD PTR -8788[rbp], 1
	mov	DWORD PTR -8784[rbp], 0
	mov	DWORD PTR -8780[rbp], 0
	mov	DWORD PTR -8776[rbp], 0
	mov	DWORD PTR -8772[rbp], 1
	mov	DWORD PTR -8768[rbp], 1
	mov	DWORD PTR -8764[rbp], 1
	mov	DWORD PTR -8760[rbp], 1
	mov	DWORD PTR -8756[rbp], 1
	mov	DWORD PTR -8752[rbp], 0
	mov	DWORD PTR -8748[rbp], 0
	mov	DWORD PTR -8744[rbp], 0
	mov	DWORD PTR -8740[rbp], 1
	mov	DWORD PTR -8736[rbp], 1
	mov	DWORD PTR -8732[rbp], 1
	mov	DWORD PTR -8728[rbp], 1
	mov	DWORD PTR -8724[rbp], 1
	mov	DWORD PTR -8720[rbp], 0
	mov	DWORD PTR -8716[rbp], 0
	mov	DWORD PTR -8712[rbp], 0
	mov	DWORD PTR -8708[rbp], 1
	mov	DWORD PTR -8704[rbp], 1
	mov	DWORD PTR -8700[rbp], 1
	mov	DWORD PTR -8696[rbp], 1
	mov	DWORD PTR -8692[rbp], 1
	mov	DWORD PTR -8688[rbp], 0
	mov	DWORD PTR -8684[rbp], 0
	mov	DWORD PTR -8680[rbp], 0
	mov	DWORD PTR -8676[rbp], 1
	mov	DWORD PTR -8672[rbp], 1
	mov	DWORD PTR -8668[rbp], 1
	mov	DWORD PTR -8664[rbp], 1
	mov	DWORD PTR -8660[rbp], 1
	mov	DWORD PTR -8656[rbp], 1
	mov	DWORD PTR -8652[rbp], 1
	mov	DWORD PTR -8648[rbp], 1
	mov	DWORD PTR -8644[rbp], 1
	mov	DWORD PTR -8640[rbp], 1
	mov	DWORD PTR -8636[rbp], 1
	mov	DWORD PTR -8632[rbp], 1
	mov	DWORD PTR -8628[rbp], 1
	mov	DWORD PTR -8624[rbp], 1
	mov	DWORD PTR -8620[rbp], 1
	mov	DWORD PTR -8616[rbp], 1
	mov	DWORD PTR -8612[rbp], 1
	mov	DWORD PTR -8608[rbp], 1
	mov	DWORD PTR -8604[rbp], 1
	mov	DWORD PTR -8600[rbp], 1
	mov	DWORD PTR -8596[rbp], 1
	mov	DWORD PTR -8592[rbp], 1
	mov	DWORD PTR -8588[rbp], 1
	mov	DWORD PTR -8584[rbp], 1
	mov	DWORD PTR -8580[rbp], 1
	mov	DWORD PTR -8576[rbp], 1
	mov	DWORD PTR -8572[rbp], 0
	mov	DWORD PTR -8568[rbp], 0
	mov	DWORD PTR -8564[rbp], 0
	mov	DWORD PTR -8560[rbp], 1
	mov	DWORD PTR -8556[rbp], 1
	mov	DWORD PTR -8552[rbp], 1
	mov	DWORD PTR -8548[rbp], 1
	mov	DWORD PTR -8544[rbp], 1
	mov	DWORD PTR -8540[rbp], 0
	mov	DWORD PTR -8536[rbp], 0
	mov	DWORD PTR -8532[rbp], 0
	mov	DWORD PTR -8528[rbp], 1
	mov	DWORD PTR -8524[rbp], 1
	mov	DWORD PTR -8520[rbp], 1
	mov	DWORD PTR -8516[rbp], 1
	mov	DWORD PTR -8512[rbp], 1
	mov	DWORD PTR -8508[rbp], 0
	mov	DWORD PTR -8504[rbp], 0
	mov	DWORD PTR -8500[rbp], 0
	mov	DWORD PTR -8496[rbp], 0
	mov	DWORD PTR -8492[rbp], 0
	mov	DWORD PTR -8488[rbp], 1
	mov	DWORD PTR -8484[rbp], 1
	mov	DWORD PTR -8480[rbp], 1
	mov	DWORD PTR -8476[rbp], 1
	mov	DWORD PTR -8472[rbp], 0
	mov	DWORD PTR -8468[rbp], 0
	mov	DWORD PTR -8464[rbp], 0
	mov	DWORD PTR -8460[rbp], 0
	mov	DWORD PTR -8456[rbp], 1
	mov	DWORD PTR -8452[rbp], 1
	mov	DWORD PTR -8448[rbp], 1
	mov	DWORD PTR -8444[rbp], 1
	mov	DWORD PTR -8440[rbp], 0
	mov	DWORD PTR -8436[rbp], 0
	mov	DWORD PTR -8432[rbp], 2
	mov	DWORD PTR -8428[rbp], 2
	mov	DWORD PTR -8424[rbp], 0
	mov	DWORD PTR -8420[rbp], 0
	mov	DWORD PTR -8416[rbp], 0
	mov	DWORD PTR -8412[rbp], 0
	mov	DWORD PTR -8408[rbp], 2
	mov	DWORD PTR -8404[rbp], 2
	mov	DWORD PTR -8400[rbp], 2
	mov	DWORD PTR -8396[rbp], 2
	mov	DWORD PTR -8392[rbp], 0
	mov	DWORD PTR -8388[rbp], 0
	mov	DWORD PTR -8384[rbp], 0
	mov	DWORD PTR -8380[rbp], 0
	mov	DWORD PTR -8376[rbp], 2
	mov	DWORD PTR -8372[rbp], 2
	mov	DWORD PTR -8368[rbp], 2
	mov	DWORD PTR -8364[rbp], 2
	mov	DWORD PTR -8360[rbp], 0
	mov	DWORD PTR -8356[rbp], 0
	mov	DWORD PTR -8352[rbp], 0
	mov	DWORD PTR -8348[rbp], 0
	mov	DWORD PTR -8344[rbp], 2
	mov	DWORD PTR -8340[rbp], 2
	mov	DWORD PTR -8336[rbp], 2
	mov	DWORD PTR -8332[rbp], 2
	mov	DWORD PTR -8328[rbp], 0
	mov	DWORD PTR -8324[rbp], 0
	mov	DWORD PTR -8320[rbp], 0
	mov	DWORD PTR -8316[rbp], 0
	mov	DWORD PTR -8312[rbp], 2
	mov	DWORD PTR -8308[rbp], 2
	mov	DWORD PTR -8304[rbp], 0
	mov	DWORD PTR -8300[rbp], 0
	mov	DWORD PTR -8296[rbp], 1
	mov	DWORD PTR -8292[rbp], 1
	mov	DWORD PTR -8288[rbp], 1
	mov	DWORD PTR -8284[rbp], 1
	mov	DWORD PTR -8280[rbp], 0
	mov	DWORD PTR -8276[rbp], 0
	mov	DWORD PTR -8272[rbp], 0
	mov	DWORD PTR -8268[rbp], 0
	mov	DWORD PTR -8264[rbp], 1
	mov	DWORD PTR -8260[rbp], 1
	mov	DWORD PTR -8256[rbp], 1
	mov	DWORD PTR -8252[rbp], 1
	mov	DWORD PTR -8248[rbp], 0
	mov	DWORD PTR -8244[rbp], 0
	mov	rax, QWORD PTR stdout[rip]
	mov	ecx, 0
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	setvbuf@PLT
	lea	rsi, .LC5[rip]
	lea	rdi, .LC6[rip]
	call	fopen@PLT
	mov	QWORD PTR -9016[rbp], rax
	cmp	QWORD PTR -9016[rbp], 0
	jne	.L256
	mov	rax, QWORD PTR stderr[rip]
	mov	rcx, rax
	mov	edx, 21
	mov	esi, 1
	lea	rdi, .LC7[rip]
	call	fwrite@PLT
	mov	edi, 1
	call	exit@PLT
.L256:
	mov	DWORD PTR -9040[rbp], 0
	jmp	.L257
.L260:
	mov	DWORD PTR -9036[rbp], 0
	jmp	.L258
.L259:
	mov	eax, DWORD PTR -9036[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -9040[rbp]
	cdqe
	sal	rax, 8
	add	rax, rdx
	mov	DWORD PTR -8240[rbp+rax*4], 0
	add	DWORD PTR -9036[rbp], 1
.L258:
	cmp	DWORD PTR -9036[rbp], 255
	jle	.L259
	add	DWORD PTR -9040[rbp], 1
.L257:
	cmp	DWORD PTR -9040[rbp], 7
	jle	.L260
	mov	eax, 0
	call	init_index_to_bitarray
	lea	rdi, .LC8[rip]
	call	puts@PLT
	mov	rax, QWORD PTR stdout[rip]
	mov	rdi, rax
	call	fflush@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC9[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 29
	mov	esi, 1
	lea	rdi, .LC10[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC11[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 42
	mov	esi, 1
	lea	rdi, .LC12[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC11[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 76
	mov	esi, 1
	lea	rdi, .LC13[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 79
	mov	esi, 1
	lea	rdi, .LC14[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 77
	mov	esi, 1
	lea	rdi, .LC15[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 74
	mov	esi, 1
	lea	rdi, .LC16[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC11[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 33
	mov	esi, 1
	lea	rdi, .LC17[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 32
	mov	esi, 1
	lea	rdi, .LC18[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 33
	mov	esi, 1
	lea	rdi, .LC19[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 35
	mov	esi, 1
	lea	rdi, .LC20[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 76
	mov	esi, 1
	lea	rdi, .LC21[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 72
	mov	esi, 1
	lea	rdi, .LC22[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 37
	mov	esi, 1
	lea	rdi, .LC23[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 77
	mov	esi, 1
	lea	rdi, .LC24[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 75
	mov	esi, 1
	lea	rdi, .LC25[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 80
	mov	esi, 1
	lea	rdi, .LC26[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 74
	mov	esi, 1
	lea	rdi, .LC27[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 22
	mov	esi, 1
	lea	rdi, .LC28[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 76
	mov	esi, 1
	lea	rdi, .LC29[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 60
	mov	esi, 1
	lea	rdi, .LC30[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 36
	mov	esi, 1
	lea	rdi, .LC31[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 75
	mov	esi, 1
	lea	rdi, .LC32[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 62
	mov	esi, 1
	lea	rdi, .LC33[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 38
	mov	esi, 1
	lea	rdi, .LC34[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 78
	mov	esi, 1
	lea	rdi, .LC35[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 80
	mov	esi, 1
	lea	rdi, .LC36[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 31
	mov	esi, 1
	lea	rdi, .LC37[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC11[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 32
	mov	esi, 1
	lea	rdi, .LC38[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 21
	mov	esi, 1
	lea	rdi, .LC39[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 27
	mov	esi, 1
	lea	rdi, .LC40[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 16
	mov	esi, 1
	lea	rdi, .LC41[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 5
	mov	esi, 1
	lea	rdi, .LC42[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 22
	mov	esi, 1
	lea	rdi, .LC43[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 40
	mov	esi, 1
	lea	rdi, .LC44[rip]
	call	fwrite@PLT
	mov	DWORD PTR -9040[rbp], 0
	jmp	.L261
.L268:
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC45[rip]
	call	fwrite@PLT
	mov	DWORD PTR -9036[rbp], 0
	jmp	.L262
.L267:
	mov	eax, DWORD PTR -9036[rbp]
	and	eax, 15
	test	eax, eax
	jne	.L263
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 2
	mov	esi, 1
	lea	rdi, .LC2[rip]
	call	fwrite@PLT
.L263:
	mov	eax, DWORD PTR -9036[rbp]
	lea	edx, [rax+rax]
	mov	eax, DWORD PTR -9040[rbp]
	mov	esi, eax
	mov	edi, edx
	call	outflank
	mov	DWORD PTR -9020[rbp], eax
	cmp	DWORD PTR -9020[rbp], 0
	je	.L264
	mov	edx, DWORD PTR -9040[rbp]
	mov	eax, DWORD PTR -9020[rbp]
	mov	esi, edx
	mov	edi, eax
	call	flip
	mov	edx, DWORD PTR -9020[rbp]
	movsx	rcx, edx
	mov	edx, DWORD PTR -9040[rbp]
	movsx	rdx, edx
	sal	rdx, 8
	add	rdx, rcx
	mov	DWORD PTR -8240[rbp+rdx*4], eax
.L264:
	mov	edx, DWORD PTR -9020[rbp]
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC46[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	cdq
	shr	edx, 28
	add	eax, edx
	and	eax, 15
	sub	eax, edx
	cmp	eax, 15
	jne	.L265
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	jmp	.L266
.L265:
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 32
	call	fputc@PLT
.L266:
	add	DWORD PTR -9036[rbp], 1
.L262:
	cmp	DWORD PTR -9036[rbp], 63
	jle	.L267
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC47[rip]
	call	fwrite@PLT
	add	DWORD PTR -9040[rbp], 1
.L261:
	cmp	DWORD PTR -9040[rbp], 7
	jle	.L268
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC4[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 18
	mov	esi, 1
	lea	rdi, .LC48[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 40
	mov	esi, 1
	lea	rdi, .LC49[rip]
	call	fwrite@PLT
	mov	DWORD PTR -9040[rbp], 0
	jmp	.L269
.L275:
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC45[rip]
	call	fwrite@PLT
	mov	DWORD PTR -9036[rbp], 0
	jmp	.L270
.L274:
	mov	eax, DWORD PTR -9036[rbp]
	and	eax, 15
	test	eax, eax
	jne	.L271
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 2
	mov	esi, 1
	lea	rdi, .LC2[rip]
	call	fwrite@PLT
.L271:
	mov	eax, DWORD PTR -9036[rbp]
	movsx	rdx, eax
	mov	eax, DWORD PTR -9040[rbp]
	cdqe
	sal	rax, 8
	add	rax, rdx
	mov	edx, DWORD PTR -8240[rbp+rax*4]
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC46[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	cdq
	shr	edx, 28
	add	eax, edx
	and	eax, 15
	sub	eax, edx
	cmp	eax, 15
	jne	.L272
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	jmp	.L273
.L272:
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 32
	call	fputc@PLT
.L273:
	add	DWORD PTR -9036[rbp], 1
.L270:
	cmp	DWORD PTR -9036[rbp], 143
	jle	.L274
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC47[rip]
	call	fwrite@PLT
	add	DWORD PTR -9040[rbp], 1
.L269:
	cmp	DWORD PTR -9040[rbp], 7
	jle	.L275
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC4[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC50[rip]
	mov	edx, 64
	lea	rsi, B1G1[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC51[rip]
	mov	edx, 64
	lea	rsi, B2G2[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC52[rip]
	mov	edx, 64
	lea	rsi, B3G3[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC53[rip]
	mov	edx, 64
	lea	rsi, B4G4[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC54[rip]
	mov	edx, 64
	lea	rsi, B5G5[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC55[rip]
	mov	edx, 64
	lea	rsi, B6G6[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC56[rip]
	mov	edx, 64
	lea	rsi, B7G7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC57[rip]
	mov	edx, 64
	lea	rsi, B8G8[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC58[rip]
	mov	edx, 64
	lea	rsi, A2A7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC59[rip]
	mov	edx, 64
	lea	rsi, B2B7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC60[rip]
	mov	edx, 64
	lea	rsi, C2C7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC61[rip]
	mov	edx, 64
	lea	rsi, D2D7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC62[rip]
	mov	edx, 64
	lea	rsi, E2E7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC63[rip]
	mov	edx, 64
	lea	rsi, F2F7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC64[rip]
	mov	edx, 64
	lea	rsi, G2G7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC65[rip]
	mov	edx, 64
	lea	rsi, H2H7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC66[rip]
	mov	edx, 16
	lea	rsi, E2B5[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC67[rip]
	mov	edx, 32
	lea	rsi, F2B6[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC68[rip]
	mov	edx, 64
	lea	rsi, G2B7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC69[rip]
	mov	edx, 32
	lea	rsi, G3C7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC70[rip]
	mov	edx, 16
	lea	rsi, G4D7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC71[rip]
	mov	edx, 16
	lea	rsi, B4E7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC72[rip]
	mov	edx, 32
	lea	rsi, B3F7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC73[rip]
	mov	edx, 64
	lea	rsi, B2G7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC74[rip]
	mov	edx, 32
	lea	rsi, C2G6[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC75[rip]
	mov	edx, 16
	lea	rsi, D2G5[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC76[rip]
	mov	edx, 64
	lea	rsi, B2C1G5[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC77[rip]
	mov	edx, 64
	lea	rsi, B3D1G4[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC78[rip]
	mov	edx, 64
	lea	rsi, B4E1G3[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC79[rip]
	mov	edx, 64
	lea	rsi, B5F1G2[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC80[rip]
	mov	edx, 64
	lea	rsi, B3C2G6[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC81[rip]
	mov	edx, 64
	lea	rsi, B4D2G5[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC82[rip]
	mov	edx, 64
	lea	rsi, B5E2G4[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC83[rip]
	mov	edx, 64
	lea	rsi, B6F2G3[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC84[rip]
	mov	edx, 64
	lea	rsi, B6C7G3[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC85[rip]
	mov	edx, 64
	lea	rsi, B5D7G4[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC86[rip]
	mov	edx, 64
	lea	rsi, B4E7G5[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC87[rip]
	mov	edx, 64
	lea	rsi, B3F7G6[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC88[rip]
	mov	edx, 64
	lea	rsi, B7C8G4[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC89[rip]
	mov	edx, 64
	lea	rsi, B6D8G5[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC90[rip]
	mov	edx, 64
	lea	rsi, B5E8G6[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC91[rip]
	mov	edx, 64
	lea	rsi, B4F8G7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC92[rip]
	mov	edx, 64
	lea	rsi, G2H3D7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC93[rip]
	mov	edx, 64
	lea	rsi, F2H4E7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC94[rip]
	mov	edx, 64
	lea	rsi, E2H5F7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC95[rip]
	mov	edx, 64
	lea	rsi, D2H6G7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC96[rip]
	mov	edx, 64
	lea	rsi, F2G3C7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC97[rip]
	mov	edx, 64
	lea	rsi, E2G4D7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC98[rip]
	mov	edx, 64
	lea	rsi, D2G5E7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC99[rip]
	mov	edx, 64
	lea	rsi, C2G6F7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC100[rip]
	mov	edx, 64
	lea	rsi, B2A3E7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC101[rip]
	mov	edx, 64
	lea	rsi, C2A4D7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC102[rip]
	mov	edx, 64
	lea	rsi, D2A5C7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC103[rip]
	mov	edx, 64
	lea	rsi, E2A6B7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC104[rip]
	mov	edx, 64
	lea	rsi, C2B3F7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC105[rip]
	mov	edx, 64
	lea	rsi, D2B4E7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC106[rip]
	mov	edx, 64
	lea	rsi, E2B5D7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	lea	rcx, .LC107[rip]
	mov	edx, 64
	lea	rsi, F2B6C7[rip]
	mov	rdi, rax
	call	print_bitarray_
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	DWORD PTR -9036[rbp], 0
	jmp	.L276
.L304:
	mov	eax, DWORD PTR -9036[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -9032[rbp], eax
	mov	eax, DWORD PTR -9032[rbp]
	add	eax, 65
	mov	BYTE PTR -43[rbp], al
	mov	eax, DWORD PTR -9036[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -9028[rbp], eax
	mov	eax, DWORD PTR -9028[rbp]
	add	eax, 49
	mov	BYTE PTR -42[rbp], al
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC9[rip]
	call	fwrite@PLT
	lea	rdx, -43[rbp]
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC108[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC11[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 35
	mov	esi, 1
	lea	rdi, .LC109[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 37
	mov	esi, 1
	lea	rdi, .LC110[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 33
	mov	esi, 1
	lea	rdi, .LC111[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC112[rip]
	call	fwrite@PLT
	lea	rdx, -43[rbp]
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC113[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 30
	mov	esi, 1
	lea	rdi, .LC114[rip]
	call	fwrite@PLT
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	mov	eax, DWORD PTR -8496[rbp+rax*4]
	and	eax, 3
	test	eax, eax
	je	.L277
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 9
	mov	esi, 1
	lea	rdi, .LC115[rip]
	call	fwrite@PLT
	jmp	.L278
.L277:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	mov	eax, DWORD PTR -8752[rbp+rax*4]
	test	eax, eax
	je	.L279
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 10
	mov	esi, 1
	lea	rdi, .LC116[rip]
	call	fwrite@PLT
.L279:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	mov	eax, DWORD PTR -9008[rbp+rax*4]
	test	eax, eax
	je	.L278
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 10
	mov	esi, 1
	lea	rdi, .LC117[rip]
	call	fwrite@PLT
.L278:
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 2
	mov	esi, 1
	lea	rdi, .LC118[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 38
	mov	esi, 1
	lea	rdi, .LC119[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	eax, DWORD PTR -9032[rbp]
	movabs	rdx, 72624976668147840
	mov	ecx, eax
	shr	rdx, cl
	mov	r13, rdx
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	v_mask
	mov	r12, rax
	mov	eax, DWORD PTR -9032[rbp]
	movabs	rdx, 567382630219776
	mov	ecx, eax
	shr	rdx, cl
	mov	r14, rdx
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 6
	mov	esi, 1
	mov	edi, eax
	call	v_mask
	mov	rbx, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	v_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	sub	rsp, 8
	push	r13
	mov	r9, r12
	mov	r8, r14
	mov	rcx, rbx
	lea	rsi, .LC120[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	rsp, 16
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	v_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC121[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	v_name
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC122[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	cmp	DWORD PTR -9028[rbp], 0
	je	.L280
	mov	eax, DWORD PTR -9028[rbp]
	lea	r12d, 0[0+rax*8]
	mov	eax, DWORD PTR -9028[rbp]
	sal	eax, 3
	lea	ebx, 1[rax]
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	flip_index_h
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	mov	r8d, r12d
	mov	ecx, ebx
	lea	rsi, .LC123[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L281
.L280:
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	flip_index_h
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC124[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
.L281:
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	flip_index_h
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC125[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9028[rbp]
	sal	eax, 3
	lea	edx, 1[rax]
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC126[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC127[rip]
	call	fwrite@PLT
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	mov	eax, DWORD PTR -8496[rbp+rax*4]
	and	eax, 3
	cmp	eax, 1
	jne	.L282
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d_mask
	mov	r12, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 6
	mov	esi, 1
	mov	edi, eax
	call	d_mask
	mov	rbx, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	sub	rsp, 8
	push	16843009
	mov	DWORD PTR 4[rsp], 16843009
	mov	r9, r12
	movabs	r8, 72340172838076673
	mov	rcx, rbx
	lea	rsi, .LC128[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	rsp, 16
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC129[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d_name
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC130[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L312
.L282:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	mov	eax, DWORD PTR -8496[rbp+rax*4]
	and	eax, 3
	cmp	eax, 2
	jne	.L284
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d_add
	mov	rbx, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d_mask
	mov	r14, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 6
	mov	esi, 1
	mov	edi, eax
	call	d_add
	mov	r13, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 6
	mov	esi, 1
	mov	edi, eax
	call	d_mask
	mov	r12, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	v_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	sub	rsp, 8
	push	rbx
	mov	r9, r14
	mov	r8, r13
	mov	rcx, r12
	lea	rsi, .LC131[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	rsp, 16
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	v_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC129[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d_name
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC130[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L312
.L284:
	cmp	DWORD PTR -9032[rbp], 5
	jg	.L285
	cmp	DWORD PTR -9028[rbp], 1
	jg	.L286
.L285:
	cmp	DWORD PTR -9032[rbp], 1
	jle	.L287
	cmp	DWORD PTR -9028[rbp], 5
	jg	.L287
.L286:
	cmp	DWORD PTR -9036[rbp], 18
	je	.L288
	cmp	DWORD PTR -9036[rbp], 45
	jne	.L289
.L288:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	shr	rax, 7
	mov	rcx, rax
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	sal	rax, 7
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC132[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L287
.L289:
	cmp	DWORD PTR -9036[rbp], 47
	je	.L290
	cmp	DWORD PTR -9036[rbp], 46
	je	.L290
	cmp	DWORD PTR -9036[rbp], 2
	je	.L290
	cmp	DWORD PTR -9036[rbp], 10
	jne	.L291
.L290:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	sal	rax, 7
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC133[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L287
.L291:
	cmp	DWORD PTR -9036[rbp], 16
	je	.L292
	cmp	DWORD PTR -9036[rbp], 17
	je	.L292
	cmp	DWORD PTR -9036[rbp], 61
	je	.L292
	cmp	DWORD PTR -9036[rbp], 53
	jne	.L293
.L292:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	shr	rax, 7
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC134[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L287
.L293:
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d7_mask
	mov	r12, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 6
	mov	esi, 1
	mov	edi, eax
	call	d7_mask
	mov	rbx, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d7_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	sub	rsp, 8
	push	16843009
	mov	DWORD PTR 4[rsp], 16843009
	mov	r9, r12
	movabs	r8, 72340172838076673
	mov	rcx, rbx
	lea	rsi, .LC135[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	rsp, 16
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d7_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC136[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d7_shift_index
	mov	DWORD PTR -9024[rbp], eax
	cmp	DWORD PTR -9024[rbp], 0
	je	.L294
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d7_name
	mov	rsi, rax
	mov	edx, DWORD PTR -9024[rbp]
	mov	rax, QWORD PTR -9016[rbp]
	mov	ecx, edx
	mov	rdx, rsi
	lea	rsi, .LC137[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L287
.L294:
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d7_name
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC138[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
.L287:
	cmp	DWORD PTR -9032[rbp], 5
	jg	.L295
	cmp	DWORD PTR -9028[rbp], 5
	jle	.L296
.L295:
	cmp	DWORD PTR -9032[rbp], 1
	jle	.L312
	cmp	DWORD PTR -9028[rbp], 1
	jle	.L312
.L296:
	cmp	DWORD PTR -9036[rbp], 42
	je	.L297
	cmp	DWORD PTR -9036[rbp], 21
	jne	.L298
.L297:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	shr	rax, 9
	mov	rcx, rax
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	sal	rax, 9
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC139[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L312
.L298:
	cmp	DWORD PTR -9036[rbp], 40
	je	.L299
	cmp	DWORD PTR -9036[rbp], 41
	je	.L299
	cmp	DWORD PTR -9036[rbp], 5
	je	.L299
	cmp	DWORD PTR -9036[rbp], 13
	jne	.L300
.L299:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	sal	rax, 9
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC140[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L312
.L300:
	cmp	DWORD PTR -9036[rbp], 58
	je	.L301
	cmp	DWORD PTR -9036[rbp], 50
	je	.L301
	cmp	DWORD PTR -9036[rbp], 23
	je	.L301
	cmp	DWORD PTR -9036[rbp], 22
	jne	.L302
.L301:
	mov	eax, DWORD PTR -9036[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, BIT[rip]
	mov	rax, QWORD PTR [rdx+rax]
	shr	rax, 9
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC141[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L312
.L302:
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 7
	mov	esi, 0
	mov	edi, eax
	call	d9_mask
	mov	r12, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edx, 6
	mov	esi, 1
	mov	edi, eax
	call	d9_mask
	mov	rbx, rax
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d9_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	sub	rsp, 8
	push	16843009
	mov	DWORD PTR 4[rsp], 16843009
	mov	r9, r12
	movabs	r8, 72340172838076673
	mov	rcx, rbx
	lea	rsi, .LC142[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	rsp, 16
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d9_flip_index
	mov	edx, eax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC143[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d9_shift_index
	mov	DWORD PTR -9024[rbp], eax
	cmp	DWORD PTR -9024[rbp], 0
	je	.L303
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d9_name
	mov	rsi, rax
	mov	edx, DWORD PTR -9024[rbp]
	mov	rax, QWORD PTR -9016[rbp]
	mov	ecx, edx
	mov	rdx, rsi
	lea	rsi, .LC144[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	jmp	.L312
.L303:
	mov	eax, DWORD PTR -9036[rbp]
	mov	edi, eax
	call	d9_name
	mov	rdx, rax
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC145[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
.L312:
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 17
	mov	esi, 1
	lea	rdi, .LC146[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC147[rip]
	call	fwrite@PLT
	add	DWORD PTR -9036[rbp], 1
.L276:
	cmp	DWORD PTR -9036[rbp], 63
	jle	.L304
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC9[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 48
	mov	esi, 1
	lea	rdi, .LC148[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 3
	mov	esi, 1
	lea	rdi, .LC11[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 35
	mov	esi, 1
	lea	rdi, .LC109[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 37
	mov	esi, 1
	lea	rdi, .LC110[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 33
	mov	esi, 1
	lea	rdi, .LC111[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC112[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 94
	mov	esi, 1
	lea	rdi, .LC149[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 55
	mov	esi, 1
	lea	rdi, .LC150[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 11
	mov	esi, 1
	lea	rdi, .LC151[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 11
	mov	esi, 1
	lea	rdi, .LC152[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 4
	mov	esi, 1
	lea	rdi, .LC153[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 51
	mov	esi, 1
	lea	rdi, .LC154[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 85
	mov	esi, 1
	lea	rdi, .LC155[rip]
	call	fwrite@PLT
	mov	DWORD PTR -9036[rbp], 0
	jmp	.L305
.L309:
	mov	eax, DWORD PTR -9036[rbp]
	cdq
	shr	edx, 29
	add	eax, edx
	and	eax, 7
	sub	eax, edx
	mov	DWORD PTR -9032[rbp], eax
	mov	eax, DWORD PTR -9032[rbp]
	add	eax, 65
	mov	BYTE PTR -43[rbp], al
	mov	eax, DWORD PTR -9036[rbp]
	lea	edx, 7[rax]
	test	eax, eax
	cmovs	eax, edx
	sar	eax, 3
	mov	DWORD PTR -9028[rbp], eax
	mov	eax, DWORD PTR -9028[rbp]
	add	eax, 49
	mov	BYTE PTR -42[rbp], al
	mov	eax, DWORD PTR -9036[rbp]
	and	eax, 3
	test	eax, eax
	jne	.L306
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 9
	call	fputc@PLT
.L306:
	lea	rdx, -43[rbp]
	mov	rax, QWORD PTR -9016[rbp]
	lea	rsi, .LC156[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	eax, DWORD PTR -9036[rbp]
	cdq
	shr	edx, 30
	add	eax, edx
	and	eax, 3
	sub	eax, edx
	cmp	eax, 3
	jne	.L307
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	jmp	.L308
.L307:
	mov	rax, QWORD PTR -9016[rbp]
	mov	rsi, rax
	mov	edi, 32
	call	fputc@PLT
.L308:
	add	DWORD PTR -9036[rbp], 1
.L305:
	cmp	DWORD PTR -9036[rbp], 63
	jle	.L309
	mov	rax, QWORD PTR -9016[rbp]
	mov	rcx, rax
	mov	edx, 26
	mov	esi, 1
	lea	rdi, .LC157[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -9016[rbp]
	mov	rdi, rax
	call	fclose@PLT
	mov	eax, 0
	mov	rbx, QWORD PTR -40[rbp]
	sub	rbx, QWORD PTR fs:40
	je	.L311
	call	__stack_chk_fail@PLT
.L311:
	lea	rsp, -32[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	main, .-main
	.data
	.type	s.4, @object
	.size	s.4, 5
s.4:
	.string	"B-G-"
	.type	s.3, @object
	.size	s.3, 5
s.3:
	.string	"-2-7"
	.align 32
	.type	s.2, @object
	.size	s.2, 75
s.2:
	.string	""
	.zero	4
	.string	""
	.zero	4
	.string	"B2B2"
	.string	"C2B3"
	.string	"D2B4"
	.string	"E2B5"
	.string	"F2B6"
	.string	"G2B7"
	.string	"G3C7"
	.string	"G4D7"
	.string	"G5E7"
	.string	"G6F7"
	.string	"G7G7"
	.string	""
	.zero	4
	.string	""
	.zero	4
	.align 32
	.type	s.1, @object
	.size	s.1, 75
s.1:
	.string	""
	.zero	4
	.string	""
	.zero	4
	.string	"B7B7"
	.string	"B6C7"
	.string	"B5D7"
	.string	"B4E7"
	.string	"B3F7"
	.string	"B2G7"
	.string	"C2G6"
	.string	"D2G5"
	.string	"E2G4"
	.string	"F2G3"
	.string	"G2G2"
	.string	""
	.zero	4
	.string	""
	.zero	4
	.local	a.0
	.comm	a.0,448,32
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"470058.c"
	.text
	.global	BIT
	.section	.rodata
	.align	3
	.type	BIT, %object
	.size	BIT, 512
BIT:
	.word	1
	.word	0
	.word	2
	.word	0
	.word	4
	.word	0
	.word	8
	.word	0
	.word	16
	.word	0
	.word	32
	.word	0
	.word	64
	.word	0
	.word	128
	.word	0
	.word	256
	.word	0
	.word	512
	.word	0
	.word	1024
	.word	0
	.word	2048
	.word	0
	.word	4096
	.word	0
	.word	8192
	.word	0
	.word	16384
	.word	0
	.word	32768
	.word	0
	.word	65536
	.word	0
	.word	131072
	.word	0
	.word	262144
	.word	0
	.word	524288
	.word	0
	.word	1048576
	.word	0
	.word	2097152
	.word	0
	.word	4194304
	.word	0
	.word	8388608
	.word	0
	.word	16777216
	.word	0
	.word	33554432
	.word	0
	.word	67108864
	.word	0
	.word	134217728
	.word	0
	.word	268435456
	.word	0
	.word	536870912
	.word	0
	.word	1073741824
	.word	0
	.word	-2147483648
	.word	0
	.word	0
	.word	1
	.word	0
	.word	2
	.word	0
	.word	4
	.word	0
	.word	8
	.word	0
	.word	16
	.word	0
	.word	32
	.word	0
	.word	64
	.word	0
	.word	128
	.word	0
	.word	256
	.word	0
	.word	512
	.word	0
	.word	1024
	.word	0
	.word	2048
	.word	0
	.word	4096
	.word	0
	.word	8192
	.word	0
	.word	16384
	.word	0
	.word	32768
	.word	0
	.word	65536
	.word	0
	.word	131072
	.word	0
	.word	262144
	.word	0
	.word	524288
	.word	0
	.word	1048576
	.word	0
	.word	2097152
	.word	0
	.word	4194304
	.word	0
	.word	8388608
	.word	0
	.word	16777216
	.word	0
	.word	33554432
	.word	0
	.word	67108864
	.word	0
	.word	134217728
	.word	0
	.word	268435456
	.word	0
	.word	536870912
	.word	0
	.word	1073741824
	.word	0
	.word	-2147483648
	.comm	B1G1,512,8
	.comm	B2G2,512,8
	.comm	B3G3,512,8
	.comm	B4G4,512,8
	.comm	B5G5,512,8
	.comm	B6G6,512,8
	.comm	B7G7,512,8
	.comm	B8G8,512,8
	.comm	A2A7,512,8
	.comm	B2B7,512,8
	.comm	C2C7,512,8
	.comm	D2D7,512,8
	.comm	E2E7,512,8
	.comm	F2F7,512,8
	.comm	G2G7,512,8
	.comm	H2H7,512,8
	.comm	B2B2,16,8
	.comm	C2B3,32,8
	.comm	D2B4,64,8
	.comm	E2B5,128,8
	.comm	F2B6,256,8
	.comm	G2B7,512,8
	.comm	G3C7,256,8
	.comm	G4D7,128,8
	.comm	G5E7,64,8
	.comm	G6F7,32,8
	.comm	G7G7,16,8
	.comm	B7B7,16,8
	.comm	B6C7,32,8
	.comm	B5D7,64,8
	.comm	B4E7,128,8
	.comm	B3F7,256,8
	.comm	B2G7,512,8
	.comm	C2G6,256,8
	.comm	D2G5,128,8
	.comm	E2G4,64,8
	.comm	F2G3,32,8
	.comm	G2G2,16,8
	.comm	G2H3D7,512,8
	.comm	F2H4E7,512,8
	.comm	E2H5F7,512,8
	.comm	D2H6G7,512,8
	.comm	F2G3C7,512,8
	.comm	E2G4D7,512,8
	.comm	D2G5E7,512,8
	.comm	C2G6F7,512,8
	.comm	B2A3E7,512,8
	.comm	C2A4D7,512,8
	.comm	D2A5C7,512,8
	.comm	E2A6B7,512,8
	.comm	C2B3F7,512,8
	.comm	D2B4E7,512,8
	.comm	E2B5D7,512,8
	.comm	F2B6C7,512,8
	.comm	B2C1G5,512,8
	.comm	B3D1G4,512,8
	.comm	B4E1G3,512,8
	.comm	B5F1G2,512,8
	.comm	B3C2G6,512,8
	.comm	B4D2G5,512,8
	.comm	B5E2G4,512,8
	.comm	B6F2G3,512,8
	.comm	B7C8G4,512,8
	.comm	B6D8G5,512,8
	.comm	B5E8G6,512,8
	.comm	B4F8G7,512,8
	.comm	B6C7G3,512,8
	.comm	B5D7G4,512,8
	.comm	B4E7G5,512,8
	.comm	B3F7G6,512,8
	.align	2
.LC0:
	.word	63
	.word	0
	.word	58
	.word	1
	.word	59
	.word	47
	.word	53
	.word	2
	.word	60
	.word	39
	.word	48
	.word	27
	.word	54
	.word	33
	.word	42
	.word	3
	.word	61
	.word	51
	.word	37
	.word	40
	.word	49
	.word	18
	.word	28
	.word	20
	.word	55
	.word	30
	.word	34
	.word	11
	.word	43
	.word	14
	.word	22
	.word	4
	.word	62
	.word	57
	.word	46
	.word	52
	.word	38
	.word	26
	.word	32
	.word	41
	.word	50
	.word	36
	.word	17
	.word	19
	.word	29
	.word	10
	.word	13
	.word	21
	.word	56
	.word	45
	.word	25
	.word	31
	.word	35
	.word	16
	.word	9
	.word	12
	.word	44
	.word	24
	.word	15
	.word	8
	.word	23
	.word	7
	.word	6
	.word	5
	.align	2
.LC7:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	first_one
	.syntax unified
	.arm
	.fpu softvfp
	.type	first_one, %function
first_one:
	@ args = 0, pretend = 0, frame = 272
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #272
	str	r0, [fp, #-284]
	str	r1, [fp, #-280]
	ldr	r3, .L4
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	ldr	r2, .L4+4
	sub	r3, fp, #272
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	sub	r3, fp, #284
	ldmia	r3, {r2-r3}
	rsbs	r2, r2, #0
	rsc	r3, r3, #0
	sub	r1, fp, #284
	ldmia	r1, {r0-r1}
	and	r4, r0, r2
	and	r5, r1, r3
	str	r4, [fp, #-284]
	str	r5, [fp, #-280]
	ldr	r3, [fp, #-280]
	ldr	r2, .L4+8
	mul	r2, r3, r2
	ldr	r3, [fp, #-284]
	ldr	r1, .L4+12
	mul	r3, r1, r3
	add	r1, r2, r3
	ldr	r0, [fp, #-284]
	ldr	ip, .L4+8
	umull	r2, r3, r0, ip
	add	r1, r1, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #26
	mov	r1, #0
	mov	r3, r0
	lsl	r3, r3, #2
	sub	r2, fp, #12
	add	r3, r2, r3
	ldr	r3, [r3, #-260]
	ldr	r2, .L4
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L3
	bl	__stack_chk_fail
.L3:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L5:
	.align	2
.L4:
	.word	.LC7
	.word	.LC0
	.word	-1706153790
	.word	133027301
	.size	first_one, .-first_one
	.section	.rodata
	.align	2
.LC8:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	P
	.syntax unified
	.arm
	.fpu softvfp
	.type	P, %function
P:
	@ args = 0, pretend = 0, frame = 304
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #304
	str	r0, [fp, #-316]
	str	r1, [fp, #-312]
	str	r2, [fp, #-324]
	str	r3, [fp, #-320]
	ldr	r3, .L14
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-304]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-300]
	str	r3, [fp, #-296]
	sub	r3, fp, #316
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	first_one
	str	r0, [fp, #-308]
	b	.L7
.L8:
	ldr	r3, [fp, #-304]
	add	r2, r3, #1
	str	r2, [fp, #-304]
	lsl	r3, r3, #2
	sub	r2, fp, #28
	add	r3, r2, r3
	ldr	r2, [fp, #-308]
	str	r2, [r3, #-260]
	sub	r3, fp, #316
	ldr	r1, [fp, #-308]
	mov	r0, r3
	bl	next_one
	str	r0, [fp, #-308]
.L7:
	sub	r3, fp, #316
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	bne	.L8
	mov	r3, #0
	str	r3, [fp, #-308]
	b	.L9
.L11:
	sub	r3, fp, #324
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-308]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	mov	r2, #1
	mov	r3, #0
	and	r8, r4, r2
	and	r9, r5, r3
	orrs	r3, r8, r9
	beq	.L10
	ldr	r3, [fp, #-308]
	lsl	r3, r3, #2
	sub	r2, fp, #28
	add	r3, r2, r3
	ldr	r1, [r3, #-260]
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r7, r3, r1
	orr	r7, r7, r2, lsl ip
	orr	r7, r7, r2, lsr r0
	lsl	r6, r2, r1
	sub	r3, fp, #300
	ldmia	r3, {r2-r3}
	orr	r1, r2, r6
	str	r1, [fp, #-332]
	orr	r3, r3, r7
	str	r3, [fp, #-328]
	sub	r3, fp, #332
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-300]
	str	r3, [fp, #-296]
.L10:
	ldr	r3, [fp, #-308]
	add	r3, r3, #1
	str	r3, [fp, #-308]
.L9:
	ldr	r2, [fp, #-308]
	ldr	r3, [fp, #-304]
	cmp	r2, r3
	blt	.L11
	sub	r3, fp, #300
	ldmia	r3, {r2-r3}
	ldr	r1, .L14
	ldr	r0, [r1]
	ldr	r1, [fp, #-32]
	eors	r0, r1, r0
	mov	r1, #0
	beq	.L13
	bl	__stack_chk_fail
.L13:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L15:
	.align	2
.L14:
	.word	.LC8
	.size	P, .-P
	.section	.rodata
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	print_bitboard
	.syntax unified
	.arm
	.fpu softvfp
	.type	print_bitboard, %function
print_bitboard:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #32
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	str	r2, [fp, #-48]
	ldr	r3, .L23
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	ldr	r3, .L23+4
	str	r3, [fp, #-28]
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L17
.L21:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-36]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	mov	r2, #1
	mov	r3, #0
	and	r6, r4, r2
	and	r7, r5, r3
	orrs	r3, r6, r7
	beq	.L18
	mov	r3, #1
	str	r3, [fp, #-32]
	b	.L19
.L18:
	mov	r3, #0
	str	r3, [fp, #-32]
.L19:
	sub	r2, fp, #28
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r1, [fp, #-48]
	mov	r0, r3
	bl	putc
	ldr	r3, [fp, #-36]
	and	r3, r3, #7
	cmp	r3, #7
	bne	.L20
	ldr	r1, [fp, #-48]
	mov	r0, #10
	bl	putc
.L20:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L17:
	ldr	r3, [fp, #-36]
	cmp	r3, #63
	ble	.L21
	ldr	r0, [fp, #-48]
	bl	fflush
	nop
	ldr	r3, .L23
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L22
	bl	__stack_chk_fail
.L22:
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L24:
	.align	2
.L23:
	.word	.LC9
	.word	4151342
	.size	print_bitboard, .-print_bitboard
	.section	.rodata
	.align	2
.LC10:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	print_bitline
	.syntax unified
	.arm
	.fpu softvfp
	.type	print_bitline, %function
print_bitline:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #24
	mov	r3, r0
	str	r1, [fp, #-44]
	strb	r3, [fp, #-37]
	ldr	r3, .L31
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	ldr	r3, .L31+4
	str	r3, [fp, #-28]
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L26
.L29:
	ldrb	r2, [fp, #-37]	@ zero_extendqisi2
	mov	r3, #0
	ldr	r1, [fp, #-36]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	mov	r2, #1
	mov	r3, #0
	and	r6, r4, r2
	and	r7, r5, r3
	orrs	r3, r6, r7
	beq	.L27
	mov	r3, #1
	str	r3, [fp, #-32]
	b	.L28
.L27:
	mov	r3, #0
	str	r3, [fp, #-32]
.L28:
	sub	r2, fp, #28
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r1, [fp, #-44]
	mov	r0, r3
	bl	putc
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L26:
	ldr	r3, [fp, #-36]
	cmp	r3, #7
	ble	.L29
	ldr	r0, [fp, #-44]
	bl	fflush
	nop
	ldr	r3, .L31
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L30
	bl	__stack_chk_fail
.L30:
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L32:
	.align	2
.L31:
	.word	.LC10
	.word	4141360
	.size	print_bitline, .-print_bitline
	.align	2
	.global	h_mask
	.syntax unified
	.arm
	.fpu softvfp
	.type	h_mask, %function
h_mask:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, fp}
	add	fp, sp, #16
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-40]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-44]
	str	r3, [fp, #-36]
	b	.L34
.L35:
	ldr	r3, [fp, #-32]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-36]
	add	r1, r2, r3
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	orr	r6, r2, r4
	orr	r7, r3, r5
	str	r6, [fp, #-28]
	str	r7, [fp, #-24]
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L34:
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-48]
	cmp	r2, r3
	ble	.L35
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, fp}
	bx	lr
	.size	h_mask, .-h_mask
	.align	2
	.global	v_mask
	.syntax unified
	.arm
	.fpu softvfp
	.type	v_mask, %function
v_mask:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, fp}
	add	fp, sp, #16
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-40]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-44]
	str	r3, [fp, #-36]
	b	.L38
.L39:
	ldr	r3, [fp, #-36]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-32]
	add	r1, r2, r3
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	orr	r6, r2, r4
	orr	r7, r3, r5
	str	r6, [fp, #-28]
	str	r7, [fp, #-24]
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L38:
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-48]
	cmp	r2, r3
	ble	.L39
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, fp}
	bx	lr
	.size	v_mask, .-v_mask
	.align	2
	.global	d7_mask
	.syntax unified
	.arm
	.fpu softvfp
	.type	d7_mask, %function
d7_mask:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #52
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	str	r2, [fp, #-64]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-56]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [fp, #-44]
	ldr	r3, [fp, #-56]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-44]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-40]
	str	r3, [fp, #-48]
	b	.L42
.L44:
	ldr	r3, [fp, #-52]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-48]
	add	r1, r2, r3
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r7, r3, r1
	orr	r7, r7, r2, lsl ip
	orr	r7, r7, r2, lsr r0
	lsl	r6, r2, r1
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	orr	r1, r2, r6
	str	r1, [fp, #-76]
	orr	r3, r3, r7
	str	r3, [fp, #-72]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-48]
	sub	r3, r3, #1
	str	r3, [fp, #-48]
.L42:
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-64]
	cmp	r2, r3
	bgt	.L43
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	bge	.L44
.L43:
	ldr	r3, [fp, #-44]
	sub	r3, r3, #1
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	str	r3, [fp, #-48]
	b	.L45
.L47:
	ldr	r3, [fp, #-52]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-48]
	add	r1, r2, r3
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	orr	r8, r2, r4
	orr	r9, r3, r5
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
	ldr	r3, [fp, #-52]
	sub	r3, r3, #1
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-48]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L45:
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	blt	.L46
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-64]
	cmp	r2, r3
	ble	.L47
.L46:
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	d7_mask, .-d7_mask
	.align	2
	.global	d9_mask
	.syntax unified
	.arm
	.fpu softvfp
	.type	d9_mask, %function
d9_mask:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #52
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	str	r2, [fp, #-64]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-56]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [fp, #-44]
	ldr	r3, [fp, #-56]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-44]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-40]
	str	r3, [fp, #-48]
	b	.L50
.L52:
	ldr	r3, [fp, #-52]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-48]
	add	r1, r2, r3
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r7, r3, r1
	orr	r7, r7, r2, lsl ip
	orr	r7, r7, r2, lsr r0
	lsl	r6, r2, r1
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	orr	r1, r2, r6
	str	r1, [fp, #-76]
	orr	r3, r3, r7
	str	r3, [fp, #-72]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-52]
	sub	r3, r3, #1
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-48]
	sub	r3, r3, #1
	str	r3, [fp, #-48]
.L50:
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	blt	.L51
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-60]
	cmp	r2, r3
	bge	.L52
.L51:
	ldr	r3, [fp, #-44]
	add	r3, r3, #1
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	str	r3, [fp, #-48]
	b	.L53
.L55:
	ldr	r3, [fp, #-52]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-48]
	add	r1, r2, r3
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	orr	r8, r2, r4
	orr	r9, r3, r5
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-48]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L53:
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-64]
	cmp	r2, r3
	bgt	.L54
	ldr	r2, [fp, #-48]
	ldr	r3, [fp, #-64]
	cmp	r2, r3
	ble	.L55
.L54:
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	d9_mask, .-d9_mask
	.align	2
	.global	d_mask
	.syntax unified
	.arm
	.fpu softvfp
	.type	d_mask, %function
d_mask:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #56
	str	r0, [fp, #-48]
	str	r1, [fp, #-52]
	str	r2, [fp, #-56]
	ldr	r2, [fp, #-56]
	ldr	r1, [fp, #-52]
	ldr	r0, [fp, #-48]
	bl	d7_mask
	mov	r4, r0
	mov	r5, r1
	ldr	r2, [fp, #-56]
	ldr	r1, [fp, #-52]
	ldr	r0, [fp, #-48]
	bl	d9_mask
	mov	r2, r0
	mov	r3, r1
	orr	r1, r4, r2
	str	r1, [fp, #-68]
	orr	r3, r5, r3
	str	r3, [fp, #-64]
	sub	r4, fp, #68
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r3, [fp, #-48]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [fp, #-44]
	ldr	r3, [fp, #-48]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-44]
	cmp	r3, #1
	bne	.L58
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mvn	r0, #255
	mvn	r1, #0
	and	ip, r2, r0
	str	ip, [fp, #-76]
	and	r3, r3, r1
	str	r3, [fp, #-72]
	sub	r4, fp, #76
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
.L58:
	ldr	r3, [fp, #-44]
	cmp	r3, #6
	bne	.L59
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mvn	r0, #0
	mvn	r1, #-16777216
	and	ip, r2, r0
	str	ip, [fp, #-84]
	and	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r4, fp, #84
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
.L59:
	ldr	r3, [fp, #-40]
	cmp	r3, #1
	bne	.L60
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adr	r1, .L63
	ldmia	r1, {r0-r1}
	and	r8, r2, r0
	and	r9, r3, r1
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
.L60:
	ldr	r3, [fp, #-40]
	cmp	r3, #6
	bne	.L61
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adr	r1, .L63+8
	ldmia	r1, {r0-r1}
	and	r6, r2, r0
	and	r7, r3, r1
	str	r6, [fp, #-36]
	str	r7, [fp, #-32]
.L61:
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L64:
	.align	3
.L63:
	.word	-16843010
	.word	-16843010
	.word	2139062143
	.word	2139062143
	.size	d_mask, .-d_mask
	.align	2
	.global	d_add
	.syntax unified
	.arm
	.fpu softvfp
	.type	d_add, %function
d_add:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	ldr	r2, [fp, #-32]
	ldr	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	d_mask
	mov	r2, r0
	mov	r3, r1
	adr	r1, .L67
	ldmia	r1, {r0-r1}
	subs	r4, r0, r2
	sbc	r5, r1, r3
	adr	r3, .L67+8
	ldmia	r3, {r2-r3}
	and	r6, r4, r2
	and	r7, r5, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L68:
	.align	3
.L67:
	.word	-2139062144
	.word	-2139062144
	.word	2139062143
	.word	2139062143
	.size	d_add, .-d_add
	.align	2
	.global	h_to_line
	.syntax unified
	.arm
	.fpu softvfp
	.type	h_to_line, %function
h_to_line:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #28
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	str	r2, [fp, #-32]
	ldr	r3, [fp, #-32]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	lsl	r1, r3, #3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	orr	r4, r4, r3, lsr r0
	lsr	r5, r3, r1
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	h_to_line, .-h_to_line
	.align	2
	.global	v_to_line
	.syntax unified
	.arm
	.fpu softvfp
	.type	v_to_line, %function
v_to_line:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #32
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	str	r2, [fp, #-48]
	ldr	r3, [fp, #-48]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [fp, #-32]
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [fp, #-48]
	bl	v_mask
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	adr	r3, .L74
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-32]
	rsb	ip, r1, #32
	subs	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	bmi	.L72
	orr	r4, r4, r3, asr r0
.L72:
	asr	r5, r3, r1
	mov	r0, r4
	mov	r1, r5
	mul	r2, r0, r7
	mul	r3, r6, r1
	add	ip, r2, r3
	umull	r2, r3, r6, r0
	add	r1, ip, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	and	r3, r0, #255
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L75:
	.align	3
.L74:
	.word	270549120
	.word	16909320
	.size	v_to_line, .-v_to_line
	.align	2
	.global	d7_to_line
	.syntax unified
	.arm
	.fpu softvfp
	.type	d7_to_line, %function
d7_to_line:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #24
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-40]
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [fp, #-40]
	bl	d7_mask
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	r6, r2, r0
	adc	r7, r3, r1
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r7, #24
	mov	r3, #0
	and	r3, r2, #255
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	d7_to_line, .-d7_to_line
	.align	2
	.global	d9_to_line
	.syntax unified
	.arm
	.fpu softvfp
	.type	d9_to_line, %function
d9_to_line:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #24
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-40]
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [fp, #-40]
	bl	d9_mask
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	r6, r2, r0
	adc	r7, r3, r1
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r7, #24
	mov	r3, #0
	and	r3, r2, #255
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	d9_to_line, .-d9_to_line
	.align	2
	.global	d_to_line
	.syntax unified
	.arm
	.fpu softvfp
	.type	d_to_line, %function
d_to_line:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #24
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-40]
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [fp, #-40]
	bl	d_mask
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	r6, r2, r0
	adc	r7, r3, r1
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r7, #24
	mov	r3, #0
	and	r3, r2, #255
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	d_to_line, .-d_to_line
	.align	2
	.global	flip_index_h
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_index_h, %function
flip_index_h:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]
	mov	r2, #1
	mov	r3, #0
	ldr	r1, [fp, #-16]
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	ldr	r2, [fp, #-16]
	mov	r0, r4
	mov	r1, r5
	bl	h_to_line
	mov	r3, r0
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, r2
	mov	r1, r3
	bl	first_one
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	flip_index_h, .-flip_index_h
	.align	2
	.global	v_flip_index
	.syntax unified
	.arm
	.fpu softvfp
	.type	v_flip_index, %function
v_flip_index:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]
	mov	r2, #1
	mov	r3, #0
	ldr	r1, [fp, #-16]
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	ldr	r2, [fp, #-16]
	mov	r0, r4
	mov	r1, r5
	bl	v_to_line
	mov	r3, r0
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, r2
	mov	r1, r3
	bl	first_one
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	v_flip_index, .-v_flip_index
	.align	2
	.global	d7_flip_index
	.syntax unified
	.arm
	.fpu softvfp
	.type	d7_flip_index, %function
d7_flip_index:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]
	mov	r2, #1
	mov	r3, #0
	ldr	r1, [fp, #-16]
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	ldr	r2, [fp, #-16]
	mov	r0, r4
	mov	r1, r5
	bl	d7_to_line
	mov	r3, r0
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, r2
	mov	r1, r3
	bl	first_one
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	d7_flip_index, .-d7_flip_index
	.align	2
	.global	d9_flip_index
	.syntax unified
	.arm
	.fpu softvfp
	.type	d9_flip_index, %function
d9_flip_index:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]
	mov	r2, #1
	mov	r3, #0
	ldr	r1, [fp, #-16]
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	ldr	r2, [fp, #-16]
	mov	r0, r4
	mov	r1, r5
	bl	d9_to_line
	mov	r3, r0
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, r2
	mov	r1, r3
	bl	first_one
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	d9_flip_index, .-d9_flip_index
	.align	2
	.global	d_flip_index
	.syntax unified
	.arm
	.fpu softvfp
	.type	d_flip_index, %function
d_flip_index:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	str	r0, [fp, #-16]
	mov	r2, #1
	mov	r3, #0
	ldr	r1, [fp, #-16]
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	ldr	r2, [fp, #-16]
	mov	r0, r4
	mov	r1, r5
	bl	d_to_line
	mov	r3, r0
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, r2
	mov	r1, r3
	bl	first_one
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	d_flip_index, .-d_flip_index
	.align	2
	.global	flip_count
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_count, %function
flip_count:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	mov	r3, #0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-28]
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L93
.L95:
	ldr	r3, [fp, #-16]
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L93:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	blt	.L94
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L95
.L94:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	blt	.L96
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	str	r3, [fp, #-8]
.L96:
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L97
.L99:
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L97:
	ldr	r3, [fp, #-16]
	cmp	r3, #7
	bgt	.L98
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L99
.L98:
	ldr	r3, [fp, #-16]
	cmp	r3, #7
	bgt	.L100
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	str	r3, [fp, #-8]
.L100:
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	flip_count, .-flip_count
	.align	2
	.global	outflank
	.syntax unified
	.arm
	.fpu softvfp
	.type	outflank, %function
outflank:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #0
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L103
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-12]
	b	.L104
.L106:
	ldr	r3, [fp, #-12]
	sub	r3, r3, #1
	str	r3, [fp, #-12]
.L104:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	blt	.L105
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-12]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L106
.L105:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	blt	.L107
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	ldr	r2, [fp, #-12]
	cmp	r2, r3
	bge	.L107
	mov	r2, #1
	ldr	r3, [fp, #-12]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-8]
	orr	r3, r2, r3
	str	r3, [fp, #-8]
.L107:
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-12]
	b	.L108
.L110:
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L108:
	ldr	r3, [fp, #-12]
	cmp	r3, #7
	bgt	.L109
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-12]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L110
.L109:
	ldr	r3, [fp, #-12]
	cmp	r3, #7
	bgt	.L103
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	ldr	r2, [fp, #-12]
	cmp	r2, r3
	ble	.L103
	mov	r2, #1
	ldr	r3, [fp, #-12]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-8]
	orr	r3, r2, r3
	str	r3, [fp, #-8]
.L103:
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	outflank, .-outflank
	.align	2
	.global	flip
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip, %function
flip:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	mov	r3, #0
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L113
	ldr	r3, [fp, #-28]
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L114
.L116:
	mov	r2, #1
	ldr	r3, [fp, #-16]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-12]
	orr	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	sub	r3, r3, #1
	str	r3, [fp, #-16]
.L114:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	blt	.L115
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L116
.L115:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	blt	.L117
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	orr	r3, r2, r3
	str	r3, [fp, #-8]
.L117:
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L118
.L120:
	mov	r2, #1
	ldr	r3, [fp, #-16]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-12]
	orr	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L118:
	ldr	r3, [fp, #-16]
	cmp	r3, #7
	bgt	.L119
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	asr	r3, r2, r3
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L120
.L119:
	ldr	r3, [fp, #-16]
	cmp	r3, #7
	bgt	.L113
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	orr	r3, r2, r3
	str	r3, [fp, #-8]
.L113:
	ldr	r3, [fp, #-8]
	asr	r3, r3, #1
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	flip, .-flip
	.align	2
	.global	h_name
	.syntax unified
	.arm
	.fpu softvfp
	.type	h_name, %function
h_name:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	add	r3, r3, #49
	and	r2, r3, #255
	ldr	r3, .L124
	strb	r2, [r3, #1]
	ldr	r3, .L124
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	ldr	r3, .L124
	strb	r2, [r3, #3]
	ldr	r3, .L124
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L125:
	.align	2
.L124:
	.word	s.5447
	.size	h_name, .-h_name
	.align	2
	.global	v_name
	.syntax unified
	.arm
	.fpu softvfp
	.type	v_name, %function
v_name:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	add	r3, r3, #65
	and	r2, r3, #255
	ldr	r3, .L128
	strb	r2, [r3]
	ldr	r3, .L128
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L128
	strb	r2, [r3, #2]
	ldr	r3, .L128
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L129:
	.align	2
.L128:
	.word	s.5452
	.size	v_name, .-v_name
	.section	.rodata
	.align	2
.LC1:
	.word	0
	.word	1
	.word	2
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	1
	.word	2
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	2
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	12
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	12
	.word	13
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	12
	.word	13
	.word	14
	.align	2
.LC11:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	d7_name
	.syntax unified
	.arm
	.fpu softvfp
	.type	d7_name, %function
d7_name:
	@ args = 0, pretend = 0, frame = 272
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #272
	str	r0, [fp, #-272]
	ldr	r3, .L133
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r2, .L133+4
	sub	r3, fp, #264
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	ldr	r3, [fp, #-272]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r2, [r3, #-260]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	ldr	r2, .L133+8
	add	r3, r3, r2
	ldr	r2, .L133
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L132
	bl	__stack_chk_fail
.L132:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L134:
	.align	2
.L133:
	.word	.LC11
	.word	.LC1
	.word	s.5458
	.size	d7_name, .-d7_name
	.section	.rodata
	.align	2
.LC2:
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	1
	.word	2
	.word	3
	.word	4
	.word	5
	.word	0
	.word	0
	.align	2
.LC12:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	d7_shift_index
	.syntax unified
	.arm
	.fpu softvfp
	.type	d7_shift_index, %function
d7_shift_index:
	@ args = 0, pretend = 0, frame = 328
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #328
	str	r0, [fp, #-328]
	ldr	r3, .L138
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r2, .L138+4
	sub	r3, fp, #264
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	ldr	r3, .L138+8
	sub	ip, fp, #324
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1, r2}
	stm	ip, {r0, r1, r2}
	ldr	r3, [fp, #-328]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r3, [r3, #-260]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r3, [r3, #-320]
	ldr	r2, .L138
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L137
	bl	__stack_chk_fail
.L137:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L139:
	.align	2
.L138:
	.word	.LC12
	.word	.LC1
	.word	.LC2
	.size	d7_shift_index, .-d7_shift_index
	.section	.rodata
	.align	2
.LC3:
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	12
	.word	13
	.word	14
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	12
	.word	13
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	12
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	2
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	1
	.word	2
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	0
	.word	1
	.word	2
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.align	2
.LC13:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	d9_name
	.syntax unified
	.arm
	.fpu softvfp
	.type	d9_name, %function
d9_name:
	@ args = 0, pretend = 0, frame = 272
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #272
	str	r0, [fp, #-272]
	ldr	r3, .L143
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r2, .L143+4
	sub	r3, fp, #264
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	ldr	r3, [fp, #-272]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r2, [r3, #-260]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	ldr	r2, .L143+8
	add	r3, r3, r2
	ldr	r2, .L143
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L142
	bl	__stack_chk_fail
.L142:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L144:
	.align	2
.L143:
	.word	.LC13
	.word	.LC3
	.word	s.5468
	.size	d9_name, .-d9_name
	.section	.rodata
	.align	2
.LC14:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	d9_shift_index
	.syntax unified
	.arm
	.fpu softvfp
	.type	d9_shift_index, %function
d9_shift_index:
	@ args = 0, pretend = 0, frame = 328
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #328
	str	r0, [fp, #-328]
	ldr	r3, .L148
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r2, .L148+4
	sub	r3, fp, #264
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	ldr	r3, .L148+8
	sub	ip, fp, #324
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1, r2}
	stm	ip, {r0, r1, r2}
	ldr	r3, [fp, #-328]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r3, [r3, #-260]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r3, [r3, #-320]
	ldr	r2, .L148
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L147
	bl	__stack_chk_fail
.L147:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L149:
	.align	2
.L148:
	.word	.LC14
	.word	.LC3
	.word	.LC2
	.size	d9_shift_index, .-d9_shift_index
	.align	2
	.global	d_name
	.syntax unified
	.arm
	.fpu softvfp
	.type	d_name, %function
d_name:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r2, [fp, #-32]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	ldr	r2, .L181
	add	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-32]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-32]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	add	r2, r2, #65
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #6
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	bgt	.L151
	ldr	r3, [fp, #-8]
	cmp	r3, #1
	ble	.L151
	ldr	r3, [fp, #-8]
	cmp	r3, #5
	bgt	.L151
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L152
.L154:
	ldr	r3, [fp, #-24]
	sub	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L152:
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	ble	.L153
	ldr	r3, [fp, #-20]
	cmp	r3, #5
	ble	.L154
.L153:
	ldr	r3, [fp, #-20]
	and	r3, r3, #255
	add	r3, r3, #65
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L155
.L157:
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L155:
	ldr	r3, [fp, #-24]
	cmp	r3, #5
	bgt	.L156
	ldr	r3, [fp, #-20]
	cmp	r3, #5
	ble	.L157
.L156:
	ldr	r3, [fp, #-20]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	add	r2, r2, #65
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #5
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	b	.L158
.L151:
	ldr	r3, [fp, #-12]
	cmp	r3, #5
	ble	.L159
	ldr	r3, [fp, #-8]
	cmp	r3, #1
	ble	.L159
	ldr	r3, [fp, #-8]
	cmp	r3, #5
	bgt	.L159
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L160
.L162:
	ldr	r3, [fp, #-24]
	sub	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-20]
.L160:
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	ble	.L161
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	bgt	.L162
.L161:
	ldr	r3, [fp, #-20]
	and	r3, r3, #255
	add	r3, r3, #65
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L163
.L165:
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-20]
.L163:
	ldr	r3, [fp, #-24]
	cmp	r3, #5
	bgt	.L164
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	bgt	.L165
.L164:
	ldr	r3, [fp, #-20]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	add	r2, r2, #65
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #5
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	b	.L158
.L159:
	ldr	r3, [fp, #-8]
	cmp	r3, #1
	bgt	.L166
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	ble	.L166
	ldr	r3, [fp, #-12]
	cmp	r3, #5
	bgt	.L166
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L167
.L169:
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-20]
.L167:
	ldr	r3, [fp, #-24]
	cmp	r3, #5
	bgt	.L168
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	bgt	.L169
.L168:
	ldr	r3, [fp, #-20]
	and	r3, r3, #255
	add	r3, r3, #65
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L170
.L172:
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L170:
	ldr	r3, [fp, #-24]
	cmp	r3, #5
	bgt	.L171
	ldr	r3, [fp, #-20]
	cmp	r3, #5
	ble	.L172
.L171:
	ldr	r3, [fp, #-20]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	add	r2, r2, #65
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #5
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	b	.L158
.L166:
	ldr	r3, [fp, #-8]
	cmp	r3, #5
	ble	.L173
	ldr	r3, [fp, #-12]
	cmp	r3, #1
	ble	.L173
	ldr	r3, [fp, #-12]
	cmp	r3, #5
	bgt	.L173
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L174
.L176:
	ldr	r3, [fp, #-24]
	sub	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-20]
.L174:
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	ble	.L175
	ldr	r3, [fp, #-20]
	cmp	r3, #1
	bgt	.L176
.L175:
	ldr	r3, [fp, #-20]
	and	r3, r3, #255
	add	r3, r3, #65
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	b	.L177
.L179:
	ldr	r3, [fp, #-24]
	sub	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L177:
	ldr	r3, [fp, #-24]
	cmp	r3, #1
	ble	.L178
	ldr	r3, [fp, #-20]
	cmp	r3, #5
	ble	.L179
.L178:
	ldr	r3, [fp, #-20]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	add	r2, r2, #65
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	and	r2, r3, #255
	ldr	r3, [fp, #-16]
	add	r3, r3, #5
	add	r2, r2, #49
	and	r2, r2, #255
	strb	r2, [r3]
	b	.L158
.L173:
	ldr	r3, [fp, #-16]
	mov	r2, #0
	strb	r2, [r3]
.L158:
	ldr	r3, [fp, #-16]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L182:
	.align	2
.L181:
	.word	a.5477
	.size	d_name, .-d_name
	.align	2
	.global	init_index_to_bitarray
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_index_to_bitarray, %function
init_index_to_bitarray:
	@ args = 0, pretend = 0, frame = 592
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #596
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L184
.L252:
	ldr	r2, .L278
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+4
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+8
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+12
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+16
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+20
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+24
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+28
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+32
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+36
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+40
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+44
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+48
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+52
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+56
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+60
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+64
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L278+68
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L185
.L251:
	ldr	r3, [fp, #-32]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L278+196
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	orrs	r3, r4, r5
	beq	.L186
	ldr	r2, .L278
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-44]
	orr	r3, r1, r3
	str	r3, [fp, #-40]
	ldr	r2, .L278
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #44
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+4
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #9
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-52]
	orr	r3, r1, r3
	str	r3, [fp, #-48]
	ldr	r2, .L278+4
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #52
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+8
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #17
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-60]
	orr	r3, r1, r3
	str	r3, [fp, #-56]
	ldr	r2, .L278+8
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #60
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+12
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #25
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-68]
	orr	r3, r1, r3
	str	r3, [fp, #-64]
	ldr	r2, .L278+12
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #68
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+16
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #33
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-76]
	orr	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r2, .L278+16
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #76
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+20
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #41
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-84]
	orr	r3, r1, r3
	str	r3, [fp, #-80]
	ldr	r2, .L278+20
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #84
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+24
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #49
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-92]
	orr	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r2, .L278+24
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #92
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+28
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #57
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r2, .L278+28
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #100
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+32
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	lsl	r3, r3, #3
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	ldr	r2, .L278+32
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #108
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+36
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r3, #9
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-116]
	orr	r3, r1, r3
	str	r3, [fp, #-112]
	ldr	r2, .L278+36
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #116
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+40
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r3, #10
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-124]
	orr	r3, r1, r3
	str	r3, [fp, #-120]
	ldr	r2, .L278+40
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #124
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+44
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r3, #11
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-132]
	orr	r3, r1, r3
	str	r3, [fp, #-128]
	ldr	r2, .L278+44
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #132
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+48
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r3, #12
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-140]
	orr	r3, r1, r3
	str	r3, [fp, #-136]
	ldr	r2, .L278+48
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #140
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+52
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r3, #13
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-148]
	orr	r3, r1, r3
	str	r3, [fp, #-144]
	ldr	r2, .L278+52
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+56
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r3, #14
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-156]
	orr	r3, r1, r3
	str	r3, [fp, #-152]
	ldr	r2, .L278+56
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #156
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+60
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r3, #15
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-164]
	orr	r3, r1, r3
	str	r3, [fp, #-160]
	ldr	r2, .L278+60
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #164
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+64
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #49
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-172]
	orr	r3, r1, r3
	str	r3, [fp, #-168]
	ldr	r2, .L278+64
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #172
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+68
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	add	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	r8, r0, r2
	orr	r9, r1, r3
	ldr	r2, .L278+68
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	stm	r3, {r8-r9}
	ldr	r2, .L278+72
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L187
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #9
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L188
.L187:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #2
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L188:
	orr	ip, r2, r0
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	ldr	r2, .L278+72
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #180
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+76
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L189
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #17
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L190
.L189:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #2
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #3
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L190:
	orr	ip, r2, r0
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	ldr	r2, .L278+76
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #188
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+80
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L191
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #25
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L192
.L191:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #3
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #4
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L192:
	orr	ip, r2, r0
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	ldr	r2, .L278+80
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #196
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+84
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L193
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #33
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L194
.L193:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #4
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #5
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L194:
	orr	ip, r2, r0
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	ldr	r2, .L278+84
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #204
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+88
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L195
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #17
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L196
.L195:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #10
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L196:
	orr	ip, r2, r0
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	ldr	r2, .L278+88
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #212
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+92
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L197
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #25
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L198
.L197:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #2
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #11
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L198:
	orr	ip, r2, r0
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	ldr	r2, .L278+92
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #220
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+96
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L199
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #33
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L200
.L199:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #3
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #12
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L200:
	orr	ip, r2, r0
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	ldr	r2, .L278+96
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #228
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+100
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L201
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #41
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L202
.L201:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #4
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #13
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L202:
	orr	ip, r2, r0
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	ldr	r2, .L278+100
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #236
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+104
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L203
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #49
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L204
.L279:
	.align	2
.L278:
	.word	B1G1
	.word	B2G2
	.word	B3G3
	.word	B4G4
	.word	B5G5
	.word	B6G6
	.word	B7G7
	.word	B8G8
	.word	A2A7
	.word	B2B7
	.word	C2C7
	.word	D2D7
	.word	E2E7
	.word	F2F7
	.word	G2G7
	.word	H2H7
	.word	G2B7
	.word	B2G7
	.word	B2C1G5
	.word	B3D1G4
	.word	B4E1G3
	.word	B5F1G2
	.word	B3C2G6
	.word	B4D2G5
	.word	B5E2G4
	.word	B6F2G3
	.word	B7C8G4
	.word	B6D8G5
	.word	B5E8G6
	.word	B4F8G7
	.word	B6C7G3
	.word	B5D7G4
	.word	B4E7G5
	.word	B3F7G6
	.word	G2H3D7
	.word	F2H4E7
	.word	E2H5F7
	.word	D2H6G7
	.word	F2G3C7
	.word	E2G4D7
	.word	D2G5E7
	.word	C2G6F7
	.word	B2A3E7
	.word	C2A4D7
	.word	D2A5C7
	.word	E2A6B7
	.word	C2B3F7
	.word	D2B4E7
	.word	E2B5D7
	.word	BIT
	.word	F2B6C7
.L203:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #1
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #58
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L204:
	orr	ip, r2, r0
	str	ip, [fp, #-244]
	orr	r3, r3, r1
	str	r3, [fp, #-240]
	ldr	r2, .L278+104
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #244
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+108
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L205
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #41
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L206
.L205:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #2
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #59
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L206:
	orr	ip, r2, r0
	str	ip, [fp, #-252]
	orr	r3, r3, r1
	str	r3, [fp, #-248]
	ldr	r2, .L278+108
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #252
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+112
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L207
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #33
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L208
.L207:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #3
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #60
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L208:
	orr	ip, r2, r0
	str	ip, [fp, #-260]
	orr	r3, r3, r1
	str	r3, [fp, #-256]
	ldr	r2, .L278+112
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #260
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+116
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L209
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #25
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L210
.L209:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #4
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #61
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L210:
	orr	ip, r2, r0
	str	ip, [fp, #-268]
	orr	r3, r3, r1
	str	r3, [fp, #-264]
	ldr	r2, .L278+116
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #268
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+120
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L211
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #41
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L212
.L211:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #1
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #50
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L212:
	orr	ip, r2, r0
	str	ip, [fp, #-276]
	orr	r3, r3, r1
	str	r3, [fp, #-272]
	ldr	r2, .L278+120
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #276
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+124
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L213
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #33
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L214
.L213:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #2
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #51
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L214:
	orr	ip, r2, r0
	str	ip, [fp, #-284]
	orr	r3, r3, r1
	str	r3, [fp, #-280]
	ldr	r2, .L278+124
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #284
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+128
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L215
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #25
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L216
.L215:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #3
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #52
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L216:
	orr	ip, r2, r0
	str	ip, [fp, #-292]
	orr	r3, r3, r1
	str	r3, [fp, #-288]
	ldr	r2, .L278+128
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #292
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+132
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L217
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #17
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L218
.L217:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #4
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #53
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L218:
	orr	ip, r2, r0
	str	ip, [fp, #-300]
	orr	r3, r3, r1
	str	r3, [fp, #-296]
	ldr	r2, .L278+132
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #300
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+136
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L219
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #14
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L220
.L219:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #23
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L220:
	orr	ip, r2, r0
	str	ip, [fp, #-308]
	orr	r3, r3, r1
	str	r3, [fp, #-304]
	ldr	r2, .L278+136
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #308
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+140
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L221
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #13
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L222
.L221:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #2
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #31
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L222:
	orr	ip, r2, r0
	str	ip, [fp, #-316]
	orr	r3, r3, r1
	str	r3, [fp, #-312]
	ldr	r2, .L278+140
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #316
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+144
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L223
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #12
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L224
.L223:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #3
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #39
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L224:
	orr	ip, r2, r0
	str	ip, [fp, #-324]
	orr	r3, r3, r1
	str	r3, [fp, #-320]
	ldr	r2, .L278+144
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #324
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+148
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L225
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #11
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L226
.L225:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #4
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #47
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L226:
	orr	ip, r2, r0
	str	ip, [fp, #-332]
	orr	r3, r3, r1
	str	r3, [fp, #-328]
	ldr	r2, .L278+148
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #332
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+152
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L227
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #13
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L228
.L227:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #22
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L228:
	orr	ip, r2, r0
	str	ip, [fp, #-340]
	orr	r3, r3, r1
	str	r3, [fp, #-336]
	ldr	r2, .L278+152
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #340
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+156
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L229
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #12
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L230
.L229:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #2
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #30
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L230:
	orr	ip, r2, r0
	str	ip, [fp, #-348]
	orr	r3, r3, r1
	str	r3, [fp, #-344]
	ldr	r2, .L278+156
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #348
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+160
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L231
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #11
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L232
.L231:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #3
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #38
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L232:
	orr	ip, r2, r0
	str	ip, [fp, #-356]
	orr	r3, r3, r1
	str	r3, [fp, #-352]
	ldr	r2, .L278+160
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #356
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+164
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L233
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #10
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L234
.L233:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #4
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #46
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L234:
	orr	ip, r2, r0
	str	ip, [fp, #-364]
	orr	r3, r3, r1
	str	r3, [fp, #-360]
	ldr	r2, .L278+164
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #364
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+168
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L235
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #9
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L236
.L235:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #16
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L236:
	orr	ip, r2, r0
	str	ip, [fp, #-372]
	orr	r3, r3, r1
	str	r3, [fp, #-368]
	ldr	r2, .L278+168
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #372
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+172
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L237
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #10
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L238
.L237:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #2
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #24
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L238:
	orr	ip, r2, r0
	str	ip, [fp, #-380]
	orr	r3, r3, r1
	str	r3, [fp, #-376]
	ldr	r2, .L278+172
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #380
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+176
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L239
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #11
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L240
.L239:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #3
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #32
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L240:
	orr	ip, r2, r0
	str	ip, [fp, #-388]
	orr	r3, r3, r1
	str	r3, [fp, #-384]
	ldr	r2, .L278+176
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #388
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+180
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L241
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #12
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L242
.L241:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #4
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #40
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L242:
	orr	ip, r2, r0
	str	ip, [fp, #-396]
	orr	r3, r3, r1
	str	r3, [fp, #-392]
	ldr	r2, .L278+180
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #396
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+184
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bgt	.L243
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #10
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L244
.L243:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #17
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L244:
	orr	ip, r2, r0
	str	ip, [fp, #-404]
	orr	r3, r3, r1
	str	r3, [fp, #-400]
	ldr	r2, .L278+184
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #404
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+188
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	bgt	.L245
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #11
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L246
.L245:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #2
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #25
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L246:
	orr	ip, r2, r0
	str	ip, [fp, #-412]
	orr	r3, r3, r1
	str	r3, [fp, #-408]
	ldr	r2, .L278+188
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #412
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+192
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	bgt	.L247
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #12
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L248
.L247:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #3
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #33
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L248:
	orr	ip, r2, r0
	str	ip, [fp, #-420]
	orr	r3, r3, r1
	str	r3, [fp, #-416]
	ldr	r2, .L278+192
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #420
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L278+200
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	bgt	.L249
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	add	r3, r3, #13
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	b	.L250
.L249:
	ldr	r3, [fp, #-36]
	sub	r2, r3, #4
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #41
	ldr	r2, .L278+196
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
.L250:
	orr	r6, r2, r0
	orr	r7, r3, r1
	ldr	r2, .L278+200
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	stm	r3, {r6-r7}
.L186:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L185:
	ldr	r3, [fp, #-36]
	cmp	r3, #5
	ble	.L251
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L184:
	ldr	r3, [fp, #-32]
	cmp	r3, #63
	ble	.L252
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L253
.L257:
	ldr	r2, .L280
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+4
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+8
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+12
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L254
.L256:
	ldr	r3, [fp, #-32]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L280+16
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-428]
	and	r3, r1, r3
	str	r3, [fp, #-424]
	sub	r4, fp, #428
	ldmia	r4, {r3-r4}
	orrs	r3, r3, r4
	beq	.L255
	ldr	r2, .L280
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #41
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-436]
	orr	r3, r1, r3
	str	r3, [fp, #-432]
	ldr	r2, .L280
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #436
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+4
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #50
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-444]
	orr	r3, r1, r3
	str	r3, [fp, #-440]
	ldr	r2, .L280+4
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #444
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+8
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #17
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-452]
	orr	r3, r1, r3
	str	r3, [fp, #-448]
	ldr	r2, .L280+8
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #452
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+12
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #10
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-460]
	orr	r3, r1, r3
	str	r3, [fp, #-456]
	ldr	r2, .L280+12
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #460
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
.L255:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L254:
	ldr	r3, [fp, #-36]
	cmp	r3, #4
	ble	.L256
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L253:
	ldr	r3, [fp, #-32]
	cmp	r3, #31
	ble	.L257
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L258
.L262:
	ldr	r2, .L280+20
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+24
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+28
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+32
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L259
.L261:
	ldr	r3, [fp, #-32]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L280+16
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-468]
	and	r3, r1, r3
	str	r3, [fp, #-464]
	sub	r4, fp, #468
	ldmia	r4, {r3-r4}
	orrs	r3, r3, r4
	beq	.L260
	ldr	r2, .L280+20
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #33
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-476]
	orr	r3, r1, r3
	str	r3, [fp, #-472]
	ldr	r2, .L280+20
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #476
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+24
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #51
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-484]
	orr	r3, r1, r3
	str	r3, [fp, #-480]
	ldr	r2, .L280+24
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #484
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+28
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #25
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-492]
	orr	r3, r1, r3
	str	r3, [fp, #-488]
	ldr	r2, .L280+28
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #492
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+32
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #11
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-500]
	orr	r3, r1, r3
	str	r3, [fp, #-496]
	ldr	r2, .L280+32
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #500
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
.L260:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L259:
	ldr	r3, [fp, #-36]
	cmp	r3, #3
	ble	.L261
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L258:
	ldr	r3, [fp, #-32]
	cmp	r3, #15
	ble	.L262
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L263
.L267:
	ldr	r2, .L280+36
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+40
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+44
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+48
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L264
.L266:
	ldr	r3, [fp, #-32]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L280+16
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-508]
	and	r3, r1, r3
	str	r3, [fp, #-504]
	sub	r4, fp, #508
	ldmia	r4, {r3-r4}
	orrs	r3, r3, r4
	beq	.L265
	ldr	r2, .L280+36
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #25
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-516]
	orr	r3, r1, r3
	str	r3, [fp, #-512]
	ldr	r2, .L280+36
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #516
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+40
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #52
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-524]
	orr	r3, r1, r3
	str	r3, [fp, #-520]
	ldr	r2, .L280+40
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #524
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+44
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #33
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-532]
	orr	r3, r1, r3
	str	r3, [fp, #-528]
	ldr	r2, .L280+44
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #532
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+48
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #12
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-540]
	orr	r3, r1, r3
	str	r3, [fp, #-536]
	ldr	r2, .L280+48
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #540
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
.L265:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L264:
	ldr	r3, [fp, #-36]
	cmp	r3, #2
	ble	.L266
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L263:
	ldr	r3, [fp, #-32]
	cmp	r3, #7
	ble	.L267
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L268
.L272:
	ldr	r2, .L280+52
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+56
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+60
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+64
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L269
.L271:
	ldr	r3, [fp, #-32]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L280+16
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-548]
	and	r3, r1, r3
	str	r3, [fp, #-544]
	sub	r4, fp, #548
	ldmia	r4, {r3-r4}
	orrs	r3, r3, r4
	beq	.L270
	ldr	r2, .L280+52
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #17
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-556]
	orr	r3, r1, r3
	str	r3, [fp, #-552]
	ldr	r2, .L280+52
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #556
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+56
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #53
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-564]
	orr	r3, r1, r3
	str	r3, [fp, #-560]
	ldr	r2, .L280+56
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #564
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+60
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #41
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-572]
	orr	r3, r1, r3
	str	r3, [fp, #-568]
	ldr	r2, .L280+60
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #572
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+64
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #13
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-580]
	orr	r3, r1, r3
	str	r3, [fp, #-576]
	ldr	r2, .L280+64
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #580
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
.L270:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L269:
	ldr	r3, [fp, #-36]
	cmp	r3, #1
	ble	.L271
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L268:
	ldr	r3, [fp, #-32]
	cmp	r3, #3
	ble	.L272
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L273
.L277:
	ldr	r2, .L280+68
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+72
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+76
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L280+80
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L274
.L276:
	ldr	r3, [fp, #-32]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r2, .L280+16
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-588]
	and	r3, r1, r3
	str	r3, [fp, #-584]
	sub	r4, fp, #588
	ldmia	r4, {r3-r4}
	orrs	r3, r3, r4
	beq	.L275
	ldr	r2, .L280+68
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #9
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-596]
	orr	r3, r1, r3
	str	r3, [fp, #-592]
	ldr	r2, .L280+68
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #596
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+72
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-36]
	mov	r2, r3
	lsl	r3, r3, #3
	sub	r3, r2, r3
	add	r3, r3, #54
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-604]
	orr	r3, r1, r3
	str	r3, [fp, #-600]
	ldr	r2, .L280+72
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #604
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+76
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #49
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-612]
	orr	r3, r1, r3
	str	r3, [fp, #-608]
	ldr	r2, .L280+76
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #612
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
	ldr	r2, .L280+80
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	add	r3, r3, #14
	ldr	r2, .L280+16
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-620]
	orr	r3, r1, r3
	str	r3, [fp, #-616]
	ldr	r2, .L280+80
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #3
	add	r3, r2, r3
	sub	r2, fp, #620
	ldmia	r2, {r1-r2}
	stm	r3, {r1-r2}
.L275:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L274:
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	ble	.L276
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L273:
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	ble	.L277
	nop
	nop
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L281:
	.align	2
.L280:
	.word	F2B6
	.word	G3C7
	.word	B3F7
	.word	C2G6
	.word	BIT
	.word	E2B5
	.word	G4D7
	.word	B4E7
	.word	D2G5
	.word	D2B4
	.word	G5E7
	.word	B5D7
	.word	E2G4
	.word	C2B3
	.word	G6F7
	.word	B6C7
	.word	F2G3
	.word	B2B2
	.word	G7G7
	.word	B7B7
	.word	G2G2
	.size	init_index_to_bitarray, .-init_index_to_bitarray
	.section	.rodata
	.align	2
.LC15:
	.ascii	"/** conversion from an 8-bit line to the %.2s-%.2s-"
	.ascii	"%.2s line */\012\000"
	.align	2
.LC16:
	.ascii	"unsigned long long %s[%d] = {\012\000"
	.align	2
.LC17:
	.ascii	"\011\011\000"
	.align	2
.LC18:
	.ascii	"0x%016llxULL,\000"
	.align	2
.LC19:
	.ascii	"};\012\012\000"
	.text
	.align	2
	.global	print_bitarray_
	.syntax unified
	.arm
	.fpu softvfp
	.type	print_bitarray_, %function
print_bitarray_:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	add	r2, r3, #2
	ldr	r3, [fp, #-28]
	add	r3, r3, #4
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, [fp, #-28]
	ldr	r1, .L288
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-28]
	ldr	r1, .L288+4
	ldr	r0, [fp, #-16]
	bl	fprintf
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L283
.L287:
	ldr	r3, [fp, #-8]
	and	r3, r3, #7
	cmp	r3, #0
	bne	.L284
	ldr	r3, [fp, #-16]
	mov	r2, #2
	mov	r1, #1
	ldr	r0, .L288+8
	bl	fwrite
.L284:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	ldr	r1, .L288+12
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, [fp, #-8]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	cmp	r3, #7
	bne	.L285
	ldr	r1, [fp, #-16]
	mov	r0, #10
	bl	fputc
	b	.L286
.L285:
	ldr	r1, [fp, #-16]
	mov	r0, #32
	bl	fputc
.L286:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L283:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	blt	.L287
	ldr	r3, [fp, #-16]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L288+16
	bl	fwrite
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L289:
	.align	2
.L288:
	.word	.LC15
	.word	.LC16
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.size	print_bitarray_, .-print_bitarray_
	.section	.rodata
	.align	2
.LC21:
	.ascii	"w\000"
	.align	2
.LC22:
	.ascii	"flip_kindergarten.c\000"
	.align	2
.LC23:
	.ascii	"cannot open 'flip.c'\012\000"
	.align	2
.LC24:
	.ascii	"Generating code...\000"
	.align	2
.LC25:
	.ascii	"/**\012\000"
	.align	2
.LC26:
	.ascii	" * @file flip_kindergarten.c\012\000"
	.align	2
.LC27:
	.ascii	" *\012\000"
	.align	2
.LC28:
	.ascii	" * This module deals with flipping discs.\012\000"
	.align	2
.LC29:
	.ascii	" * A function is provided for each square of the bo"
	.ascii	"ard. These functions are\012\000"
	.align	2
.LC30:
	.ascii	" * gathered into an array of functions, so that a f"
	.ascii	"ast access to each function\012\000"
	.align	2
.LC31:
	.ascii	" * is allowed. The generic form of the function tak"
	.ascii	"e as input the player and\012\000"
	.align	2
.LC32:
	.ascii	" * the opponent bitboards and return the flipped sq"
	.ascii	"uares into a bitboard.\012\000"
	.align	2
.LC33:
	.ascii	" * Given the following notation:\012\000"
	.align	2
.LC34:
	.ascii	" *  - x = square where we play,\012\000"
	.align	2
.LC35:
	.ascii	" *  - P = player's disc pattern,\012\000"
	.align	2
.LC36:
	.ascii	" *  - O = opponent's disc pattern,\012\000"
	.align	2
.LC37:
	.ascii	" * the basic principle is to read into an array the"
	.ascii	" result of a move. Doing\012\000"
	.align	2
.LC38:
	.ascii	" * this is easier for a single line ; so we can use"
	.ascii	" arrays of the form:\012\000"
	.align	2
.LC39:
	.ascii	" *  - ARRAY[x][8-bits disc pattern].\012\000"
	.align	2
.LC40:
	.ascii	" * The problem is thus to convert any line of a 64-"
	.ascii	"bits disc pattern into an\012\000"
	.align	2
.LC41:
	.ascii	" * 8-bits disc pattern. A fast way to do this is to"
	.ascii	" select the right line,\012\000"
	.align	2
.LC42:
	.ascii	" * with a bit-mask, to gather the masked-bits into "
	.ascii	"a continuous set by a simple\012\000"
	.align	2
.LC43:
	.ascii	" * multiplication and to right-shift the result to "
	.ascii	"scale it into a number\012\000"
	.align	2
.LC44:
	.ascii	" * between 0 and 255.\012\000"
	.align	2
.LC45:
	.ascii	" * Once we get our 8-bits disc patterns,a first arr"
	.ascii	"ay (OUTFLANK) is used to\012\000"
	.align	2
.LC46:
	.ascii	" * get the player's discs that surround the opponen"
	.ascii	"t discs:\012\000"
	.align	2
.LC47:
	.ascii	" *  - outflank = OUTFLANK[x][O] & P\012\000"
	.align	2
.LC48:
	.ascii	" * The result is then used as an index to access a "
	.ascii	"second array giving the\012\000"
	.align	2
.LC49:
	.ascii	" * flipped discs according to the surrounding playe"
	.ascii	"r's discs:\012\000"
	.align	2
.LC50:
	.ascii	" *  - flipped = FLIPPED[x][outflank].\012\000"
	.align	2
.LC51:
	.ascii	" * Finally, a precomputed array transform the 8-bit"
	.ascii	"s disc pattern back into a\012\000"
	.align	2
.LC52:
	.ascii	" * 64-bits disc pattern, and the flipped squares fo"
	.ascii	"r each line are gathered and\012\000"
	.align	2
.LC53:
	.ascii	" * returned to generate moves.\012\000"
	.align	2
.LC54:
	.ascii	" * File automatically generated\012\000"
	.align	2
.LC55:
	.ascii	" * @date 1998 - 2012\012\000"
	.align	2
.LC56:
	.ascii	" * @author Richard Delorme\012\000"
	.align	2
.LC57:
	.ascii	" * @version 4.3\012\000"
	.align	2
.LC58:
	.ascii	" */\012\012\000"
	.align	2
.LC59:
	.ascii	"/** outflank array */\012\000"
	.align	2
.LC60:
	.ascii	"const unsigned char OUTFLANK[8][64] = {\012\000"
	.align	2
.LC61:
	.ascii	"\011{\012\000"
	.align	2
.LC62:
	.ascii	"0x%02x,\000"
	.align	2
.LC63:
	.ascii	"\011},\012\000"
	.align	2
.LC64:
	.ascii	"/** flip array */\012\000"
	.align	2
.LC65:
	.ascii	"const unsigned char FLIPPED[8][144] = {\012\000"
	.align	2
.LC66:
	.ascii	"B1G1\000"
	.align	2
.LC67:
	.ascii	"B2G2\000"
	.align	2
.LC68:
	.ascii	"B3G3\000"
	.align	2
.LC69:
	.ascii	"B4G4\000"
	.align	2
.LC70:
	.ascii	"B5G5\000"
	.align	2
.LC71:
	.ascii	"B6G6\000"
	.align	2
.LC72:
	.ascii	"B7G7\000"
	.align	2
.LC73:
	.ascii	"B8G8\000"
	.align	2
.LC74:
	.ascii	"A2A7\000"
	.align	2
.LC75:
	.ascii	"B2B7\000"
	.align	2
.LC76:
	.ascii	"C2C7\000"
	.align	2
.LC77:
	.ascii	"D2D7\000"
	.align	2
.LC78:
	.ascii	"E2E7\000"
	.align	2
.LC79:
	.ascii	"F2F7\000"
	.align	2
.LC80:
	.ascii	"G2G7\000"
	.align	2
.LC81:
	.ascii	"H2H7\000"
	.align	2
.LC82:
	.ascii	"E2B5\000"
	.align	2
.LC83:
	.ascii	"F2B6\000"
	.align	2
.LC84:
	.ascii	"G2B7\000"
	.align	2
.LC85:
	.ascii	"G3C7\000"
	.align	2
.LC86:
	.ascii	"G4D7\000"
	.align	2
.LC87:
	.ascii	"B4E7\000"
	.align	2
.LC88:
	.ascii	"B3F7\000"
	.align	2
.LC89:
	.ascii	"B2G7\000"
	.align	2
.LC90:
	.ascii	"C2G6\000"
	.align	2
.LC91:
	.ascii	"D2G5\000"
	.align	2
.LC92:
	.ascii	"B2C1G5\000"
	.align	2
.LC93:
	.ascii	"B3D1G4\000"
	.align	2
.LC94:
	.ascii	"B4E1G3\000"
	.align	2
.LC95:
	.ascii	"B5F1G2\000"
	.align	2
.LC96:
	.ascii	"B3C2G6\000"
	.align	2
.LC97:
	.ascii	"B4D2G5\000"
	.align	2
.LC98:
	.ascii	"B5E2G4\000"
	.align	2
.LC99:
	.ascii	"B6F2G3\000"
	.align	2
.LC100:
	.ascii	"B6C7G3\000"
	.align	2
.LC101:
	.ascii	"B5D7G4\000"
	.align	2
.LC102:
	.ascii	"B4E7G5\000"
	.align	2
.LC103:
	.ascii	"B3F7G6\000"
	.align	2
.LC104:
	.ascii	"B7C8G4\000"
	.align	2
.LC105:
	.ascii	"B6D8G5\000"
	.align	2
.LC106:
	.ascii	"B5E8G6\000"
	.align	2
.LC107:
	.ascii	"B4F8G7\000"
	.align	2
.LC108:
	.ascii	"G2H3D7\000"
	.align	2
.LC109:
	.ascii	"F2H4E7\000"
	.align	2
.LC110:
	.ascii	"E2H5F7\000"
	.align	2
.LC111:
	.ascii	"D2H6G7\000"
	.align	2
.LC112:
	.ascii	"F2G3C7\000"
	.align	2
.LC113:
	.ascii	"E2G4D7\000"
	.align	2
.LC114:
	.ascii	"D2G5E7\000"
	.align	2
.LC115:
	.ascii	"C2G6F7\000"
	.align	2
.LC116:
	.ascii	"B2A3E7\000"
	.align	2
.LC117:
	.ascii	"C2A4D7\000"
	.align	2
.LC118:
	.ascii	"D2A5C7\000"
	.align	2
.LC119:
	.ascii	"E2A6B7\000"
	.align	2
.LC120:
	.ascii	"C2B3F7\000"
	.align	2
.LC121:
	.ascii	"D2B4E7\000"
	.align	2
.LC122:
	.ascii	"E2B5D7\000"
	.align	2
.LC123:
	.ascii	"F2B6C7\000"
	.align	2
.LC124:
	.ascii	" * Compute flipped discs when playing on square %s."
	.ascii	"\012\000"
	.align	2
.LC125:
	.ascii	" * @param P player's disc pattern.\012\000"
	.align	2
.LC126:
	.ascii	" * @param O opponent's disc pattern.\012\000"
	.align	2
.LC127:
	.ascii	" * @return flipped disc pattern.\012\000"
	.align	2
.LC128:
	.ascii	" */\012\000"
	.align	2
.LC129:
	.ascii	"static unsigned long long flip_%s(const unsigned lo"
	.ascii	"ng long P, const unsigned long long O)\012{\012\000"
	.align	2
.LC130:
	.ascii	"\011register int index_h, index_v\000"
	.align	2
.LC131:
	.ascii	", index_d\000"
	.align	2
.LC132:
	.ascii	", index_d7\000"
	.align	2
.LC133:
	.ascii	", index_d9\000"
	.align	2
.LC134:
	.ascii	";\012\000"
	.align	2
.LC135:
	.ascii	"\011register unsigned long long flipped;\012\000"
	.align	2
.LC136:
	.ascii	"\011index_v = OUTFLANK[%d][(O & 0x%016llx) * 0x%016"
	.ascii	"llx >> 57] & (P & 0x%016llx) * 0x%016llx >> 56;\012"
	.ascii	"\000"
	.align	2
.LC137:
	.ascii	"\011index_v = FLIPPED[%d][index_v];\012\000"
	.align	2
.LC138:
	.ascii	"\011flipped = %s[index_v];\012\012\000"
	.align	2
.LC139:
	.ascii	"\011index_h = OUTFLANK[%d][(O >> %d) & 0x3f] & (P >"
	.ascii	"> %d);\012\000"
	.align	2
.LC140:
	.ascii	"\011index_h = OUTFLANK[%d][(O >> 1) & 0x3f] & P;\012"
	.ascii	"\000"
	.align	2
.LC141:
	.ascii	"\011flipped |= ((unsigned long long) FLIPPED[%d][in"
	.ascii	"dex_h])\000"
	.align	2
.LC142:
	.ascii	" << %d\000"
	.align	2
.LC143:
	.ascii	";\012\012\000"
	.align	2
.LC144:
	.ascii	"\011index_d = OUTFLANK[%d][(O & 0x%016llxULL) * 0x%"
	.ascii	"016llxULL >> 57] & (P & 0x%016llxULL) * 0x%016llxUL"
	.ascii	"L >> 56;\012\000"
	.align	2
.LC145:
	.ascii	"\011index_d = FLIPPED[%d][index_d];\012\000"
	.align	2
.LC146:
	.ascii	"\011flipped |= %s[index_d];\012\012\000"
	.align	2
.LC147:
	.ascii	"\011index_d = OUTFLANK[%d][(((O & 0x%016llxULL) + 0"
	.ascii	"x%016llxULL) & 0x8080808080808080ULL) * 0x000204081"
	.ascii	"0204081ULL >> 57] & (((P & 0x%016llxULL) + 0x%016ll"
	.ascii	"xULL) & 0x8080808080808080ULL) * 0x0002040810204081"
	.ascii	"ULL >> 56;\012\000"
	.align	2
.LC148:
	.ascii	"\011flipped |= ((P >> 7) & 0x%016llxULL & O) | ((P "
	.ascii	"<< 7) & 0x%016llxULL & O);\012\012\000"
	.align	2
.LC149:
	.ascii	"\011flipped |= ((P >> 7) & 0x%016llxULL & O);\012\012"
	.ascii	"\000"
	.align	2
.LC150:
	.ascii	"\011flipped |= ((P << 7) & 0x%016llxULL & O);\012\012"
	.ascii	"\000"
	.align	2
.LC151:
	.ascii	"\011index_d7 = OUTFLANK[%d][(O & 0x%016llxULL)* 0x%"
	.ascii	"016llxULL >> 57] & (P & 0x%016llxULL) * 0x%016llxUL"
	.ascii	"L >> 56;\012\000"
	.align	2
.LC152:
	.ascii	"\011index_d7 = FLIPPED[%d][index_d7];\012\000"
	.align	2
.LC153:
	.ascii	"\011flipped |= %s[index_d7 >> %d];\012\012\000"
	.align	2
.LC154:
	.ascii	"\011flipped |= %s[index_d7];\012\012\000"
	.align	2
.LC155:
	.ascii	"\011flipped |= ((P >> 9) & 0x%016llxULL & O) | ((P "
	.ascii	"<< 9) & 0x%016llxULL & O);\012\012\000"
	.align	2
.LC156:
	.ascii	"\011flipped |= ((P >> 9) & 0x%016llxULL & O);\012\012"
	.ascii	"\000"
	.align	2
.LC157:
	.ascii	"\011flipped |= ((P << 9) & 0x%016llxULL & O);\012\012"
	.ascii	"\000"
	.align	2
.LC158:
	.ascii	"\011index_d9 = OUTFLANK[%d][(O & 0x%016llxULL)* 0x%"
	.ascii	"016llxULL >> 57] & (P & 0x%016llxULL) * 0x%016llxUL"
	.ascii	"L >> 56;\012\000"
	.align	2
.LC159:
	.ascii	"\011index_d9 = FLIPPED[%d][index_d9];\012\000"
	.align	2
.LC160:
	.ascii	"\011flipped |= %s[index_d9 >> %d];\012\012\000"
	.align	2
.LC161:
	.ascii	"\011flipped |= %s[index_d9];\012\012\000"
	.align	2
.LC162:
	.ascii	"\011return flipped;\012\000"
	.align	2
.LC163:
	.ascii	"}\012\012\000"
	.align	2
.LC164:
	.ascii	" * Compute (zero-) flipped discs when plassing.\012"
	.ascii	"\000"
	.align	2
.LC165:
	.ascii	"static unsigned long long flip_pass(const unsigned "
	.ascii	"long long P, const unsigned long long O)\012{\012\000"
	.align	2
.LC166:
	.ascii	"\011(void) P; // useless code to shut-up compiler w"
	.ascii	"arning\012\000"
	.align	2
.LC167:
	.ascii	"\011(void) O;\012\000"
	.align	2
.LC168:
	.ascii	"\011return 0;\012\000"
	.align	2
.LC169:
	.ascii	"}\012\012\012\000"
	.align	2
.LC170:
	.ascii	"/** Array of functions to compute flipped discs */\012"
	.ascii	"\000"
	.align	2
.LC171:
	.ascii	"unsigned long long (*flip[])(const unsigned long lo"
	.ascii	"ng, const unsigned long long) = {\012\000"
	.align	2
.LC172:
	.ascii	"flip_%s,\000"
	.align	2
.LC173:
	.ascii	"\011flip_pass, flip_pass\012};\012\012\000"
	.align	2
.LC20:
	.ascii	"--\000"
	.align	2
.LC4:
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.align	2
.LC5:
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.align	2
.LC6:
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	2
	.word	2
	.word	0
	.word	0
	.word	0
	.word	0
	.word	2
	.word	2
	.word	2
	.word	2
	.word	0
	.word	0
	.word	0
	.word	0
	.word	2
	.word	2
	.word	2
	.word	2
	.word	0
	.word	0
	.word	0
	.word	0
	.word	2
	.word	2
	.word	2
	.word	2
	.word	0
	.word	0
	.word	0
	.word	0
	.word	2
	.word	2
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.word	0
	.word	0
	.word	1
	.word	1
	.word	1
	.word	1
	.word	0
	.word	0
	.align	2
.LC174:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 9024
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #9024
	sub	sp, sp, #36
	ldr	r3, .L348
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	ldr	r2, .L348+4
	sub	r3, fp, #44
	ldr	r2, [r2]
	strh	r2, [r3]	@ movhi
	add	r3, r3, #2
	lsr	r2, r2, #16
	strb	r2, [r3]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r2, .L348+8
	sub	r3, r3, #776
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r2, .L348+12
	sub	r3, r3, #520
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r2, .L348+16
	sub	r3, r3, #264
	mov	r1, r2
	mov	r2, #256
	mov	r0, r3
	bl	memcpy
	ldr	r3, .L348+20
	ldr	r0, [r3]
	mov	r3, #0
	mov	r2, #1
	mov	r1, #0
	bl	setvbuf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r4, r3
	ldr	r1, .L348+24
	ldr	r0, .L348+28
	bl	fopen
	str	r0, [r4, #-796]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L348+32
	ldr	r3, [r3]
	mov	r2, #21
	mov	r1, #1
	ldr	r0, .L348+36
	bl	fwrite
	mov	r0, #1
	bl	exit
.L291:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-804]
	b	.L292
.L295:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-800]
	b	.L293
.L294:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	lsl	r2, r3, #8
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r3, r2, r3
	lsl	r3, r3, #2
	add	r3, r1, r3
	mov	r2, #0
	str	r2, [r3, #-8]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r3, r3, #1
	str	r3, [r2, #-800]
.L293:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #255
	ble	.L294
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	add	r3, r3, #1
	str	r3, [r2, #-804]
.L292:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	cmp	r3, #7
	ble	.L295
	bl	init_index_to_bitarray
	ldr	r0, .L348+40
	bl	puts
	ldr	r3, .L348+20
	ldr	r3, [r3]
	mov	r0, r3
	bl	fflush
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L348+672
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #29
	mov	r1, #1
	ldr	r0, .L348+44
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L348+680
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #42
	mov	r1, #1
	ldr	r0, .L348+48
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L348+680
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #76
	mov	r1, #1
	ldr	r0, .L348+52
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #79
	mov	r1, #1
	ldr	r0, .L348+56
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #77
	mov	r1, #1
	ldr	r0, .L348+60
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #74
	mov	r1, #1
	ldr	r0, .L348+64
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L348+680
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #33
	mov	r1, #1
	ldr	r0, .L348+68
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #32
	mov	r1, #1
	ldr	r0, .L348+72
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #33
	mov	r1, #1
	ldr	r0, .L348+76
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #35
	mov	r1, #1
	ldr	r0, .L348+80
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #76
	mov	r1, #1
	ldr	r0, .L348+84
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #72
	mov	r1, #1
	ldr	r0, .L348+88
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #37
	mov	r1, #1
	ldr	r0, .L348+92
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #77
	mov	r1, #1
	ldr	r0, .L348+96
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #75
	mov	r1, #1
	ldr	r0, .L348+100
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #80
	mov	r1, #1
	ldr	r0, .L348+104
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #74
	mov	r1, #1
	ldr	r0, .L348+108
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #22
	mov	r1, #1
	ldr	r0, .L348+112
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #76
	mov	r1, #1
	ldr	r0, .L348+116
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #60
	mov	r1, #1
	ldr	r0, .L348+120
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #36
	mov	r1, #1
	ldr	r0, .L348+124
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #75
	mov	r1, #1
	ldr	r0, .L348+128
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #62
	mov	r1, #1
	ldr	r0, .L348+132
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #38
	mov	r1, #1
	ldr	r0, .L348+136
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #78
	mov	r1, #1
	ldr	r0, .L348+140
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #80
	mov	r1, #1
	ldr	r0, .L348+144
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #31
	mov	r1, #1
	ldr	r0, .L348+148
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L348+680
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #32
	mov	r1, #1
	ldr	r0, .L348+152
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #21
	mov	r1, #1
	ldr	r0, .L348+156
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #27
	mov	r1, #1
	ldr	r0, .L348+160
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #16
	mov	r1, #1
	ldr	r0, .L348+164
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #5
	mov	r1, #1
	ldr	r0, .L348+168
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #22
	mov	r1, #1
	ldr	r0, .L348+172
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #40
	mov	r1, #1
	ldr	r0, .L348+176
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-804]
	b	.L296
.L303:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L348+180
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-800]
	b	.L297
.L302:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	and	r3, r3, #15
	cmp	r3, #0
	bne	.L298
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #2
	mov	r1, #1
	ldr	r0, .L348+184
	bl	fwrite
.L298:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #1
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r4, r2
	sub	r2, fp, #8192
	sub	r2, r2, #36
	ldr	r1, [r2, #-804]
	mov	r0, r3
	bl	outflank
	str	r0, [r4, #-780]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-780]
	cmp	r3, #0
	beq	.L299
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r2, #-804]
	ldr	r0, [r3, #-780]
	bl	flip
	mov	r1, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	lsl	r2, r3, #8
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-780]
	add	r3, r2, r3
	lsl	r3, r3, #2
	add	r3, r0, r3
	str	r1, [r3, #-8]
.L299:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r2, [r2, #-780]
	ldr	r1, .L348+188
	ldr	r0, [r3, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	rsbs	r2, r3, #0
	and	r3, r3, #15
	and	r2, r2, #15
	rsbpl	r3, r2, #0
	cmp	r3, #15
	bne	.L300
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #10
	bl	fputc
	b	.L301
.L300:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #32
	bl	fputc
.L301:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r3, r3, #1
	str	r3, [r2, #-800]
.L297:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #63
	ble	.L302
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L348+200
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	add	r3, r3, #1
	str	r3, [r2, #-804]
.L296:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	cmp	r3, #7
	ble	.L303
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L348+204
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #18
	mov	r1, #1
	ldr	r0, .L348+192
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #40
	mov	r1, #1
	ldr	r0, .L348+196
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-804]
	b	.L304
.L310:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L348+180
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-800]
	b	.L305
.L309:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	and	r3, r3, #15
	cmp	r3, #0
	bne	.L306
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #2
	mov	r1, #1
	ldr	r0, .L348+184
	bl	fwrite
.L306:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	lsl	r2, r3, #8
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r3, r2, r3
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3, #-8]
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L348+188
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	rsbs	r2, r3, #0
	and	r3, r3, #15
	and	r2, r2, #15
	rsbpl	r3, r2, #0
	cmp	r3, #15
	bne	.L307
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #10
	bl	fputc
	b	.L308
.L349:
	.align	2
.L348:
	.word	.LC174
	.word	.LC20
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	stdout
	.word	.LC21
	.word	.LC22
	.word	stderr
	.word	.LC23
	.word	.LC24
	.word	.LC26
	.word	.LC28
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.word	.LC34
	.word	.LC35
	.word	.LC36
	.word	.LC37
	.word	.LC38
	.word	.LC39
	.word	.LC40
	.word	.LC41
	.word	.LC42
	.word	.LC43
	.word	.LC44
	.word	.LC45
	.word	.LC46
	.word	.LC47
	.word	.LC48
	.word	.LC49
	.word	.LC50
	.word	.LC51
	.word	.LC52
	.word	.LC53
	.word	.LC54
	.word	.LC55
	.word	.LC56
	.word	.LC57
	.word	.LC58
	.word	.LC59
	.word	.LC60
	.word	.LC61
	.word	.LC17
	.word	.LC62
	.word	.LC64
	.word	.LC65
	.word	.LC63
	.word	.LC19
	.word	.LC66
	.word	B1G1
	.word	.LC67
	.word	B2G2
	.word	.LC68
	.word	B3G3
	.word	.LC69
	.word	B4G4
	.word	.LC70
	.word	B5G5
	.word	.LC71
	.word	B6G6
	.word	.LC72
	.word	B7G7
	.word	.LC73
	.word	B8G8
	.word	.LC74
	.word	A2A7
	.word	.LC75
	.word	B2B7
	.word	.LC76
	.word	C2C7
	.word	.LC77
	.word	D2D7
	.word	.LC78
	.word	E2E7
	.word	.LC79
	.word	F2F7
	.word	.LC80
	.word	G2G7
	.word	.LC81
	.word	H2H7
	.word	.LC82
	.word	E2B5
	.word	.LC83
	.word	F2B6
	.word	.LC84
	.word	G2B7
	.word	.LC85
	.word	G3C7
	.word	.LC86
	.word	G4D7
	.word	.LC87
	.word	B4E7
	.word	.LC88
	.word	B3F7
	.word	.LC89
	.word	B2G7
	.word	.LC90
	.word	C2G6
	.word	.LC91
	.word	D2G5
	.word	.LC92
	.word	B2C1G5
	.word	.LC93
	.word	B3D1G4
	.word	.LC94
	.word	B4E1G3
	.word	.LC95
	.word	B5F1G2
	.word	.LC96
	.word	B3C2G6
	.word	.LC97
	.word	B4D2G5
	.word	.LC98
	.word	B5E2G4
	.word	.LC99
	.word	B6F2G3
	.word	.LC100
	.word	B6C7G3
	.word	.LC101
	.word	B5D7G4
	.word	.LC102
	.word	B4E7G5
	.word	.LC103
	.word	B3F7G6
	.word	.LC104
	.word	B7C8G4
	.word	.LC105
	.word	B6D8G5
	.word	.LC106
	.word	B5E8G6
	.word	.LC107
	.word	B4F8G7
	.word	.LC108
	.word	G2H3D7
	.word	.LC109
	.word	F2H4E7
	.word	.LC110
	.word	E2H5F7
	.word	.LC111
	.word	D2H6G7
	.word	.LC112
	.word	F2G3C7
	.word	.LC113
	.word	E2G4D7
	.word	.LC114
	.word	D2G5E7
	.word	.LC115
	.word	C2G6F7
	.word	.LC116
	.word	B2A3E7
	.word	.LC117
	.word	C2A4D7
	.word	.LC118
	.word	D2A5C7
	.word	.LC119
	.word	E2A6B7
	.word	.LC120
	.word	C2B3F7
	.word	.LC121
	.word	D2B4E7
	.word	.LC122
	.word	E2B5D7
	.word	.LC123
	.word	F2B6C7
	.word	.LC25
	.word	.LC124
	.word	.LC27
	.word	.LC125
	.word	.LC126
	.word	.LC127
	.word	.LC128
	.word	.LC129
	.word	.LC130
	.word	.LC131
	.word	.LC132
	.word	.LC133
	.word	.LC134
	.word	.LC135
.L307:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #32
	bl	fputc
.L308:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r3, r3, #1
	str	r3, [r2, #-800]
.L305:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #143
	ble	.L309
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L348+200
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	add	r3, r3, #1
	str	r3, [r2, #-804]
.L304:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-804]
	cmp	r3, #7
	ble	.L310
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L348+204
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+208
	mov	r2, #64
	ldr	r1, .L348+212
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+216
	mov	r2, #64
	ldr	r1, .L348+220
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+224
	mov	r2, #64
	ldr	r1, .L348+228
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+232
	mov	r2, #64
	ldr	r1, .L348+236
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+240
	mov	r2, #64
	ldr	r1, .L348+244
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+248
	mov	r2, #64
	ldr	r1, .L348+252
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+256
	mov	r2, #64
	ldr	r1, .L348+260
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+264
	mov	r2, #64
	ldr	r1, .L348+268
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+272
	mov	r2, #64
	ldr	r1, .L348+276
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+280
	mov	r2, #64
	ldr	r1, .L348+284
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+288
	mov	r2, #64
	ldr	r1, .L348+292
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+296
	mov	r2, #64
	ldr	r1, .L348+300
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+304
	mov	r2, #64
	ldr	r1, .L348+308
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+312
	mov	r2, #64
	ldr	r1, .L348+316
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+320
	mov	r2, #64
	ldr	r1, .L348+324
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+328
	mov	r2, #64
	ldr	r1, .L348+332
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+336
	mov	r2, #16
	ldr	r1, .L348+340
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+344
	mov	r2, #32
	ldr	r1, .L348+348
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+352
	mov	r2, #64
	ldr	r1, .L348+356
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+360
	mov	r2, #32
	ldr	r1, .L348+364
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+368
	mov	r2, #16
	ldr	r1, .L348+372
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+376
	mov	r2, #16
	ldr	r1, .L348+380
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+384
	mov	r2, #32
	ldr	r1, .L348+388
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+392
	mov	r2, #64
	ldr	r1, .L348+396
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+400
	mov	r2, #32
	ldr	r1, .L348+404
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+408
	mov	r2, #16
	ldr	r1, .L348+412
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #10
	bl	fputc
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+416
	mov	r2, #64
	ldr	r1, .L348+420
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+424
	mov	r2, #64
	ldr	r1, .L348+428
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+432
	mov	r2, #64
	ldr	r1, .L348+436
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+440
	mov	r2, #64
	ldr	r1, .L348+444
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+448
	mov	r2, #64
	ldr	r1, .L348+452
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+456
	mov	r2, #64
	ldr	r1, .L348+460
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+464
	mov	r2, #64
	ldr	r1, .L348+468
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+472
	mov	r2, #64
	ldr	r1, .L348+476
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+480
	mov	r2, #64
	ldr	r1, .L348+484
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+488
	mov	r2, #64
	ldr	r1, .L348+492
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+496
	mov	r2, #64
	ldr	r1, .L348+500
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+504
	mov	r2, #64
	ldr	r1, .L348+508
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+512
	mov	r2, #64
	ldr	r1, .L348+516
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+520
	mov	r2, #64
	ldr	r1, .L348+524
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+528
	mov	r2, #64
	ldr	r1, .L348+532
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+536
	mov	r2, #64
	ldr	r1, .L348+540
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+544
	mov	r2, #64
	ldr	r1, .L348+548
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+552
	mov	r2, #64
	ldr	r1, .L348+556
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+560
	mov	r2, #64
	ldr	r1, .L348+564
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+568
	mov	r2, #64
	ldr	r1, .L348+572
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+576
	mov	r2, #64
	ldr	r1, .L348+580
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+584
	mov	r2, #64
	ldr	r1, .L348+588
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+592
	mov	r2, #64
	ldr	r1, .L348+596
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+600
	mov	r2, #64
	ldr	r1, .L348+604
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+608
	mov	r2, #64
	ldr	r1, .L348+612
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+616
	mov	r2, #64
	ldr	r1, .L348+620
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+624
	mov	r2, #64
	ldr	r1, .L348+628
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+632
	mov	r2, #64
	ldr	r1, .L348+636
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+640
	mov	r2, #64
	ldr	r1, .L348+644
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+648
	mov	r2, #64
	ldr	r1, .L348+652
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+656
	mov	r2, #64
	ldr	r1, .L348+660
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r0, r3
	ldr	r3, .L348+664
	mov	r2, #64
	ldr	r1, .L348+668
	ldr	r0, [r0, #-796]
	bl	print_bitarray_
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #10
	bl	fputc
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-800]
	b	.L311
.L339:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [r1, #-792]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-792]
	and	r3, r3, #255
	add	r3, r3, #65
	and	r3, r3, #255
	strb	r3, [fp, #-44]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [r1, #-788]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	and	r3, r3, #255
	add	r3, r3, #49
	and	r3, r3, #255
	strb	r3, [fp, #-43]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L348+672
	bl	fwrite
	sub	r3, fp, #44
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L348+676
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L348+680
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #35
	mov	r1, #1
	ldr	r0, .L348+684
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #37
	mov	r1, #1
	ldr	r0, .L348+688
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #33
	mov	r1, #1
	ldr	r0, .L348+692
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L348+696
	bl	fwrite
	sub	r3, fp, #44
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L348+700
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #30
	mov	r1, #1
	ldr	r0, .L348+704
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-264]
	and	r3, r3, #3
	cmp	r3, #0
	beq	.L312
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #9
	mov	r1, #1
	ldr	r0, .L348+708
	bl	fwrite
	b	.L313
.L312:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-520]
	cmp	r3, #0
	beq	.L314
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #10
	mov	r1, #1
	ldr	r0, .L348+712
	bl	fwrite
.L314:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-776]
	cmp	r3, #0
	beq	.L313
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #10
	mov	r1, #1
	ldr	r0, .L348+716
	bl	fwrite
.L313:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #2
	mov	r1, #1
	ldr	r0, .L348+720
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #38
	mov	r1, #1
	ldr	r0, .L348+724
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #10
	bl	fputc
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	v_flip_index
	mov	r10, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #6
	mov	r1, #1
	ldr	r0, [r3, #-800]
	bl	v_mask
	mov	r4, r0
	mov	r5, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	adr	r3, .L350
	ldmia	r3, {r2-r3}
	ldr	r1, [r1, #-792]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [r3, #-800]
	bl	v_mask
	mov	r6, r0
	mov	r7, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	adr	r3, .L350+8
	ldmia	r3, {r2-r3}
	ldr	r1, [r1, #-792]
	rsb	ip, r1, #32
	sub	r0, r1, #32
	sub	lr, fp, #9024
	sub	lr, lr, #32
	str	r0, [lr]
	lsr	lr, r2, r1
	sub	r0, fp, #9024
	sub	r0, r0, #20
	str	lr, [r0]
	sub	lr, fp, #9024
	sub	lr, lr, #20
	ldr	lr, [lr]
	orr	ip, lr, r3, lsl ip
	sub	lr, fp, #9024
	sub	lr, lr, #20
	str	ip, [lr]
	sub	ip, fp, #9024
	sub	ip, ip, #20
	ldr	ip, [ip]
	sub	r0, fp, #9024
	sub	r0, r0, #32
	ldr	r0, [r0]
	orr	r0, ip, r3, lsr r0
	sub	ip, fp, #9024
	sub	ip, ip, #20
	str	r0, [ip]
	lsr	r3, r3, r1
	sub	r2, fp, #9024
	sub	r2, r2, #16
	str	r3, [r2]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	sub	r2, fp, #9024
	sub	r2, r2, #20
	ldmia	r2, {r1-r2}
	str	r1, [sp, #24]
	str	r2, [sp, #28]
	str	r6, [sp, #16]
	str	r7, [sp, #20]
	str	r8, [sp, #8]
	str	r9, [sp, #12]
	stm	sp, {r4-r5}
	mov	r2, r10
	ldr	r1, .L350+24
	ldr	r0, [r3, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	v_flip_index
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+28
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	v_name
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+32
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	cmp	r3, #0
	beq	.L315
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	flip_index_h
	mov	r1, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	lsl	r3, r3, #3
	add	r2, r3, #1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	lsl	r3, r3, #3
	sub	r0, fp, #8192
	sub	r0, r0, #36
	str	r3, [sp]
	mov	r3, r2
	mov	r2, r1
	ldr	r1, .L350+36
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L316
.L315:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	flip_index_h
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+40
	ldr	r0, [r0, #-796]
	bl	fprintf
.L316:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	flip_index_h
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+44
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	lsl	r3, r3, #3
	add	r3, r3, #1
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+48
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L350+52
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-264]
	and	r3, r3, #3
	cmp	r3, #1
	bne	.L317
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d_flip_index
	mov	r6, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #6
	mov	r1, #1
	ldr	r0, [r3, #-800]
	bl	d_mask
	mov	r4, r0
	mov	r5, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [r3, #-800]
	bl	d_mask
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	ip, r1
	adr	r1, .L350+16
	ldmia	r1, {r0-r1}
	str	r0, [sp, #24]
	str	r1, [sp, #28]
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	adr	r3, .L350+16
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	stm	sp, {r4-r5}
	mov	r2, r6
	ldr	r1, .L350+56
	ldr	r0, [ip, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d_flip_index
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+64
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d_name
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+68
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L347
.L351:
	.align	3
.L350:
	.word	270548992
	.word	132104
	.word	270549120
	.word	16909320
	.word	16843009
	.word	16843009
	.word	.LC136
	.word	.LC137
	.word	.LC138
	.word	.LC139
	.word	.LC140
	.word	.LC141
	.word	.LC142
	.word	.LC143
	.word	.LC144
	.word	.LC147
	.word	.LC145
	.word	.LC146
	.word	.LC148
	.word	.LC149
	.word	BIT
	.word	.LC150
.L317:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #-264]
	and	r3, r3, #3
	cmp	r3, #2
	bne	.L319
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	v_flip_index
	mov	r10, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #6
	mov	r1, #1
	ldr	r0, [r3, #-800]
	bl	d_mask
	mov	r6, r0
	mov	r7, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #6
	mov	r1, #1
	ldr	r0, [r3, #-800]
	bl	d_add
	sub	r3, fp, #9024
	sub	r3, r3, #28
	stm	r3, {r0-r1}
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [r3, #-800]
	bl	d_mask
	mov	r4, r0
	mov	r5, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [r3, #-800]
	bl	d_add
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	r0, r1
	str	r2, [sp, #24]
	str	r3, [sp, #28]
	str	r4, [sp, #16]
	str	r5, [sp, #20]
	sub	r3, fp, #9024
	sub	r3, r3, #28
	ldmia	r3, {r3-r4}
	str	r3, [sp, #8]
	str	r4, [sp, #12]
	stm	sp, {r6-r7}
	mov	r2, r10
	ldr	r1, .L350+60
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	v_flip_index
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+64
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d_name
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L350+68
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L347
.L319:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-792]
	cmp	r3, #5
	bgt	.L320
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	cmp	r3, #1
	bgt	.L321
.L320:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-792]
	cmp	r3, #1
	ble	.L322
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	cmp	r3, #5
	bgt	.L322
.L321:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #18
	beq	.L323
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #45
	bne	.L324
.L323:
	ldr	r2, .L350+80
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	ldr	r2, .L350+80
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r4-r5}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #7
	orr	r2, r2, r5, lsl #25
	lsr	r3, r5, #7
	sub	ip, fp, #8192
	sub	ip, ip, #36
	stm	sp, {r2-r3}
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L350+72
	ldr	r0, [ip, #-796]
	bl	fprintf
	b	.L322
.L324:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #47
	beq	.L325
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #46
	beq	.L325
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #2
	beq	.L325
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #10
	bne	.L326
.L325:
	ldr	r2, .L350+80
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	r0, r1
	ldr	r1, .L350+76
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L322
.L326:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #16
	beq	.L327
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #17
	beq	.L327
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #61
	beq	.L327
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #53
	bne	.L328
.L327:
	ldr	r2, .L350+80
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #7
	orr	r2, r2, r1, lsl #25
	lsr	r3, r1, #7
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	r0, r1
	ldr	r1, .L350+84
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L322
.L328:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d7_flip_index
	mov	r6, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #6
	mov	r1, #1
	ldr	r0, [r3, #-800]
	bl	d7_mask
	mov	r4, r0
	mov	r5, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [r3, #-800]
	bl	d7_mask
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	ip, r1
	adr	r1, .L352
	ldmia	r1, {r0-r1}
	str	r0, [sp, #24]
	str	r1, [sp, #28]
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	adr	r3, .L352
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	stm	sp, {r4-r5}
	mov	r2, r6
	ldr	r1, .L352+8
	ldr	r0, [ip, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d7_flip_index
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L352+12
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r4, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d7_shift_index
	str	r0, [r4, #-784]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-784]
	cmp	r3, #0
	beq	.L329
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d7_name
	mov	r2, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	r0, r1
	ldr	r3, [r3, #-784]
	ldr	r1, .L352+16
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L322
.L329:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d7_name
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L352+20
	ldr	r0, [r0, #-796]
	bl	fprintf
.L322:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-792]
	cmp	r3, #5
	bgt	.L330
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	cmp	r3, #5
	ble	.L331
.L330:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-792]
	cmp	r3, #1
	ble	.L347
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	cmp	r3, #1
	ble	.L347
.L331:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #42
	beq	.L332
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #21
	bne	.L333
.L332:
	ldr	r2, .L352+24
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	ldr	r2, .L352+24
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r4-r5}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r4, #9
	orr	r2, r2, r5, lsl #23
	lsr	r3, r5, #9
	sub	ip, fp, #8192
	sub	ip, ip, #36
	stm	sp, {r2-r3}
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L352+28
	ldr	r0, [ip, #-796]
	bl	fprintf
	b	.L347
.L333:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #40
	beq	.L334
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #41
	beq	.L334
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #5
	beq	.L334
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #13
	bne	.L335
.L334:
	ldr	r2, .L352+24
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #9
	orr	r3, r3, r0, lsr #23
	lsl	r2, r0, #9
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	r0, r1
	ldr	r1, .L352+32
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L347
.L335:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #58
	beq	.L336
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #50
	beq	.L336
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #23
	beq	.L336
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #22
	bne	.L337
.L336:
	ldr	r2, .L352+24
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #9
	orr	r2, r2, r1, lsl #23
	lsr	r3, r1, #9
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	r0, r1
	ldr	r1, .L352+36
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L347
.L353:
	.align	3
.L352:
	.word	16843009
	.word	16843009
	.word	.LC151
	.word	.LC152
	.word	.LC153
	.word	.LC154
	.word	BIT
	.word	.LC155
	.word	.LC156
	.word	.LC157
.L337:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d9_flip_index
	mov	r6, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #6
	mov	r1, #1
	ldr	r0, [r3, #-800]
	bl	d9_mask
	mov	r4, r0
	mov	r5, r1
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, #7
	mov	r1, #0
	ldr	r0, [r3, #-800]
	bl	d9_mask
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	ip, r1
	adr	r1, .L354
	ldmia	r1, {r0-r1}
	str	r0, [sp, #24]
	str	r1, [sp, #28]
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	adr	r3, .L354
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	stm	sp, {r4-r5}
	mov	r2, r6
	ldr	r1, .L354+8
	ldr	r0, [ip, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d9_flip_index
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L354+12
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r4, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d9_shift_index
	str	r0, [r4, #-784]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-784]
	cmp	r3, #0
	beq	.L338
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d9_name
	mov	r2, r0
	sub	r3, fp, #8192
	sub	r3, r3, #36
	sub	r1, fp, #8192
	sub	r1, r1, #36
	mov	r0, r1
	ldr	r3, [r3, #-784]
	ldr	r1, .L354+16
	ldr	r0, [r0, #-796]
	bl	fprintf
	b	.L347
.L338:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-800]
	bl	d9_name
	mov	r3, r0
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L354+20
	ldr	r0, [r0, #-796]
	bl	fprintf
.L347:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #10
	bl	fputc
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #17
	mov	r1, #1
	ldr	r0, .L354+24
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L354+28
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r3, r3, #1
	str	r3, [r2, #-800]
.L311:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #63
	ble	.L339
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L354+32
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #48
	mov	r1, #1
	ldr	r0, .L354+36
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #3
	mov	r1, #1
	ldr	r0, .L354+40
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #35
	mov	r1, #1
	ldr	r0, .L354+44
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #37
	mov	r1, #1
	ldr	r0, .L354+48
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #33
	mov	r1, #1
	ldr	r0, .L354+52
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L354+56
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #94
	mov	r1, #1
	ldr	r0, .L354+60
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #55
	mov	r1, #1
	ldr	r0, .L354+64
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #11
	mov	r1, #1
	ldr	r0, .L354+68
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #11
	mov	r1, #1
	ldr	r0, .L354+72
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #4
	mov	r1, #1
	ldr	r0, .L354+76
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #51
	mov	r1, #1
	ldr	r0, .L354+80
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #85
	mov	r1, #1
	ldr	r0, .L354+84
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-800]
	b	.L340
.L355:
	.align	3
.L354:
	.word	16843009
	.word	16843009
	.word	.LC158
	.word	.LC159
	.word	.LC160
	.word	.LC161
	.word	.LC162
	.word	.LC163
	.word	.LC25
	.word	.LC164
	.word	.LC27
	.word	.LC125
	.word	.LC126
	.word	.LC127
	.word	.LC128
	.word	.LC165
	.word	.LC166
	.word	.LC167
	.word	.LC168
	.word	.LC169
	.word	.LC170
	.word	.LC171
	.word	.LC172
	.word	.LC173
	.word	.LC174
.L344:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	rsbs	r2, r3, #0
	and	r3, r3, #7
	and	r2, r2, #7
	rsbpl	r3, r2, #0
	str	r3, [r1, #-792]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-792]
	and	r3, r3, #255
	add	r3, r3, #65
	and	r3, r3, #255
	strb	r3, [fp, #-44]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r1, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r2, r3, #7
	cmp	r3, #0
	movlt	r3, r2
	movge	r3, r3
	asr	r3, r3, #3
	str	r3, [r1, #-788]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-788]
	and	r3, r3, #255
	add	r3, r3, #49
	and	r3, r3, #255
	strb	r3, [fp, #-43]
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	and	r3, r3, #3
	cmp	r3, #0
	bne	.L341
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #9
	bl	fputc
.L341:
	sub	r3, fp, #44
	sub	r2, fp, #8192
	sub	r2, r2, #36
	mov	r0, r2
	mov	r2, r3
	ldr	r1, .L354+88
	ldr	r0, [r0, #-796]
	bl	fprintf
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	rsbs	r2, r3, #0
	and	r3, r3, #3
	and	r2, r2, #3
	rsbpl	r3, r2, #0
	cmp	r3, #3
	bne	.L342
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #10
	bl	fputc
	b	.L343
.L342:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r1, [r3, #-796]
	mov	r0, #32
	bl	fputc
.L343:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	mov	r2, r3
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	add	r3, r3, #1
	str	r3, [r2, #-800]
.L340:
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-800]
	cmp	r3, #63
	ble	.L344
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r3, [r3, #-796]
	mov	r2, #26
	mov	r1, #1
	ldr	r0, .L354+92
	bl	fwrite
	sub	r3, fp, #8192
	sub	r3, r3, #36
	ldr	r0, [r3, #-796]
	bl	fclose
	mov	r3, #0
	ldr	r2, .L354+96
	ldr	r1, [r2]
	ldr	r2, [fp, #-40]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L346
	bl	__stack_chk_fail
.L346:
	mov	r0, r3
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	main, .-main
	.data
	.align	2
	.type	s.5447, %object
	.size	s.5447, 5
s.5447:
	.ascii	"B-G-\000"
	.align	2
	.type	s.5452, %object
	.size	s.5452, 5
s.5452:
	.ascii	"-2-7\000"
	.align	2
	.type	s.5458, %object
	.size	s.5458, 75
s.5458:
	.ascii	"\000"
	.space	4
	.ascii	"\000"
	.space	4
	.ascii	"B2B2\000"
	.ascii	"C2B3\000"
	.ascii	"D2B4\000"
	.ascii	"E2B5\000"
	.ascii	"F2B6\000"
	.ascii	"G2B7\000"
	.ascii	"G3C7\000"
	.ascii	"G4D7\000"
	.ascii	"G5E7\000"
	.ascii	"G6F7\000"
	.ascii	"G7G7\000"
	.ascii	"\000"
	.space	4
	.ascii	"\000"
	.space	4
	.align	2
	.type	s.5468, %object
	.size	s.5468, 75
s.5468:
	.ascii	"\000"
	.space	4
	.ascii	"\000"
	.space	4
	.ascii	"B7B7\000"
	.ascii	"B6C7\000"
	.ascii	"B5D7\000"
	.ascii	"B4E7\000"
	.ascii	"B3F7\000"
	.ascii	"B2G7\000"
	.ascii	"C2G6\000"
	.ascii	"D2G5\000"
	.ascii	"E2G4\000"
	.ascii	"F2G3\000"
	.ascii	"G2G2\000"
	.ascii	"\000"
	.space	4
	.ascii	"\000"
	.space	4
	.local	a.5477
	.comm	a.5477,448,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
