	.file	"273005.c"
	.intel_syntax noprefix
	.text
	.globl	start
	.bss
	.align 8
	.type	start, @object
	.size	start, 8
start:
	.zero	8
	.globl	stop
	.align 8
	.type	stop, @object
	.size	stop, 8
stop:
	.zero	8
	.globl	myrand
	.align 4
	.type	myrand, @object
	.size	myrand, 4
myrand:
	.zero	4
	.globl	ira
	.align 32
	.type	ira, @object
	.size	ira, 1024
ira:
	.zero	1024
	.globl	ip
	.type	ip, @object
	.size	ip, 1
ip:
	.zero	1
	.globl	ip1
	.type	ip1, @object
	.size	ip1, 1
ip1:
	.zero	1
	.globl	ip2
	.type	ip2, @object
	.size	ip2, 1
ip2:
	.zero	1
	.globl	ip3
	.type	ip3, @object
	.size	ip3, 1
ip3:
	.zero	1
	.text
	.globl	rand4init
	.type	rand4init, @function
rand4init:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR myrand[rip]
	mov	eax, eax
	imul	rax, rax, 16807
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	and	eax, 2147483647
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 31
	add	eax, edx
	mov	DWORD PTR myrand[rip], eax
	mov	eax, DWORD PTR myrand[rip]
	test	eax, eax
	jns	.L2
	mov	eax, DWORD PTR myrand[rip]
	and	eax, 2147483647
	add	eax, 1
	mov	DWORD PTR myrand[rip], eax
.L2:
	mov	eax, DWORD PTR myrand[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	rand4init, .-rand4init
	.globl	Init_Random
	.type	Init_Random, @function
Init_Random:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	BYTE PTR ip[rip], -128
	movzx	eax, BYTE PTR ip[rip]
	sub	eax, 24
	mov	BYTE PTR ip1[rip], al
	movzx	eax, BYTE PTR ip[rip]
	sub	eax, 55
	mov	BYTE PTR ip2[rip], al
	movzx	eax, BYTE PTR ip[rip]
	sub	eax, 61
	mov	BYTE PTR ip3[rip], al
	movzx	eax, BYTE PTR ip3[rip]
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	jmp	.L5
.L6:
	call	rand4init
	mov	edx, DWORD PTR -4[rbp]
	lea	rcx, 0[0+rdx*4]
	lea	rdx, ira[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -4[rbp], 1
.L5:
	movzx	eax, BYTE PTR ip[rip]
	movzx	eax, al
	cmp	DWORD PTR -4[rbp], eax
	jb	.L6
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	Init_Random, .-Init_Random
	.globl	Init_Prob
	.type	Init_Prob, @function
Init_Prob:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -4[rbp], 0
	jmp	.L8
.L9:
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -4[rbp]
	movsd	xmm0, QWORD PTR .LC0[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC1[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	exp@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR [rax], xmm0
	add	DWORD PTR -4[rbp], 1
.L8:
	cmp	DWORD PTR -4[rbp], 4
	jle	.L9
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	Init_Prob, .-Init_Prob
	.globl	oneMCS
	.type	oneMCS, @function
oneMCS:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	QWORD PTR -48[rbp], rcx
	mov	DWORD PTR -16[rbp], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L11
.L19:
	mov	DWORD PTR -12[rbp], 0
	jmp	.L12
.L18:
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	ecx, DWORD PTR [rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 99[rax]
	movsx	rax, edx
	imul	rax, rax, 1374389535
	shr	rax, 32
	sar	eax, 5
	mov	esi, edx
	sar	esi, 31
	sub	eax, esi
	imul	esi, eax, 100
	mov	eax, edx
	sub	eax, esi
	imul	edx, eax, 100
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	esi, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 99
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	edi, eax
	sar	edi, 31
	sub	edx, edi
	imul	edi, edx, 100
	sub	eax, edi
	mov	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, eax, 100
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	lea	edi, [rsi+rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 1[rax]
	movsx	rax, edx
	imul	rax, rax, 1374389535
	shr	rax, 32
	sar	eax, 5
	mov	esi, edx
	sar	esi, 31
	sub	eax, esi
	imul	esi, eax, 100
	mov	eax, edx
	sub	eax, esi
	imul	edx, eax, 100
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	add	edi, eax
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 1
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	esi, eax
	sar	esi, 31
	sub	edx, esi
	imul	esi, edx, 100
	sub	eax, esi
	mov	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, eax, 100
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	add	eax, edi
	imul	eax, ecx
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jle	.L13
	movzx	eax, BYTE PTR ip1[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip1[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	esi, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip2[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip2[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip[rip], dl
	movzx	eax, al
	add	esi, ecx
	movsx	rdx, eax
	lea	rcx, 0[0+rdx*4]
	lea	rdx, ira[rip]
	mov	DWORD PTR [rcx+rdx], esi
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip3[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip3[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	eax, DWORD PTR [rdx+rax]
	xor	eax, ecx
	mov	eax, eax
	test	rax, rax
	js	.L14
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L15
.L14:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L15:
	movsd	xmm1, QWORD PTR .LC2[rip]
	mulsd	xmm1, xmm0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movss	xmm0, DWORD PTR [rax]
	cvtss2sd	xmm0, xmm0
	comisd	xmm0, xmm1
	jbe	.L16
.L13:
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rcx
	neg	edx
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rcx
	mov	eax, DWORD PTR [rax]
	add	eax, eax
	add	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, eax
	add	edx, eax
	mov	rax, QWORD PTR -48[rbp]
	mov	DWORD PTR [rax], edx
.L16:
	add	DWORD PTR -12[rbp], 1
	add	DWORD PTR -16[rbp], 1
.L12:
	cmp	DWORD PTR -12[rbp], 99
	jle	.L18
	add	DWORD PTR -8[rbp], 1
.L11:
	cmp	DWORD PTR -8[rbp], 99
	jle	.L19
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	oneMCS, .-oneMCS
	.globl	oneMCSrand
	.type	oneMCSrand, @function
oneMCSrand:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -56[rbp], rdx
	mov	QWORD PTR -64[rbp], rcx
	mov	DWORD PTR -20[rbp], 0
	jmp	.L22
.L30:
	movzx	eax, BYTE PTR ip1[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip1[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	esi, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip2[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip2[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip[rip], dl
	movzx	eax, al
	add	esi, ecx
	movsx	rdx, eax
	lea	rcx, 0[0+rdx*4]
	lea	rdx, ira[rip]
	mov	DWORD PTR [rcx+rdx], esi
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip3[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip3[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	eax, DWORD PTR [rdx+rax]
	xor	eax, ecx
	mov	eax, eax
	test	rax, rax
	js	.L23
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L24
.L23:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L24:
	movsd	xmm1, QWORD PTR .LC2[rip]
	mulsd	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC3[rip]
	mulsd	xmm0, xmm1
	cvttsd2si	eax, xmm0
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	edx, edx, 100
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	ecx, edx, 100
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, edx
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	ecx, DWORD PTR [rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 99[rax]
	movsx	rax, edx
	imul	rax, rax, 1374389535
	shr	rax, 32
	sar	eax, 5
	mov	esi, edx
	sar	esi, 31
	sub	eax, esi
	imul	esi, eax, 100
	mov	eax, edx
	sub	eax, esi
	imul	edx, eax, 100
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	esi, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 99
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	edi, eax
	sar	edi, 31
	sub	edx, edi
	imul	edi, edx, 100
	sub	eax, edi
	mov	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, eax, 100
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	lea	edi, [rsi+rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 1[rax]
	movsx	rax, edx
	imul	rax, rax, 1374389535
	shr	rax, 32
	sar	eax, 5
	mov	esi, edx
	sar	esi, 31
	sub	eax, esi
	imul	esi, eax, 100
	mov	eax, edx
	sub	eax, esi
	imul	edx, eax, 100
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	add	edi, eax
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 1
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	esi, eax
	sar	esi, 31
	sub	edx, esi
	imul	esi, edx, 100
	sub	eax, esi
	mov	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, eax, 100
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	add	eax, edi
	imul	eax, ecx
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jle	.L25
	movzx	eax, BYTE PTR ip1[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip1[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	esi, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip2[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip2[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip[rip], dl
	movzx	eax, al
	add	esi, ecx
	movsx	rdx, eax
	lea	rcx, 0[0+rdx*4]
	lea	rdx, ira[rip]
	mov	DWORD PTR [rcx+rdx], esi
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip3[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip3[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	eax, DWORD PTR [rdx+rax]
	xor	eax, ecx
	mov	eax, eax
	test	rax, rax
	js	.L26
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L27
.L26:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L27:
	movsd	xmm1, QWORD PTR .LC2[rip]
	mulsd	xmm1, xmm0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rdx
	movss	xmm0, DWORD PTR [rax]
	cvtss2sd	xmm0, xmm0
	comisd	xmm0, xmm1
	jbe	.L28
.L25:
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -16[rbp]
	cdqe
	lea	rcx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	neg	edx
	mov	DWORD PTR [rax], edx
.L28:
	add	DWORD PTR -20[rbp], 1
.L22:
	cmp	DWORD PTR -20[rbp], 9999
	jle	.L30
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	oneMCSrand, .-oneMCSrand
	.globl	measures
	.type	measures, @function
measures:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 0
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], 0
	mov	DWORD PTR -4[rbp], 0
	mov	DWORD PTR -8[rbp], 0
	jmp	.L33
.L36:
	mov	DWORD PTR -12[rbp], 0
	jmp	.L34
.L35:
	mov	rax, QWORD PTR -32[rbp]
	mov	ecx, DWORD PTR [rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	esi, DWORD PTR [rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 99[rax]
	movsx	rax, edx
	imul	rax, rax, 1374389535
	shr	rax, 32
	sar	eax, 5
	mov	edi, edx
	sar	edi, 31
	sub	eax, edi
	imul	edi, eax, 100
	mov	eax, edx
	sub	eax, edi
	imul	edx, eax, 100
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	edi, DWORD PTR [rax]
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 99
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	r8d, eax
	sar	r8d, 31
	sub	edx, r8d
	imul	r8d, edx, 100
	sub	eax, r8d
	mov	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, eax, 100
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	lea	r8d, [rdi+rax]
	mov	eax, DWORD PTR -8[rbp]
	lea	edx, 1[rax]
	movsx	rax, edx
	imul	rax, rax, 1374389535
	shr	rax, 32
	sar	eax, 5
	mov	edi, edx
	sar	edi, 31
	sub	eax, edi
	imul	edi, eax, 100
	mov	eax, edx
	sub	eax, edi
	imul	edx, eax, 100
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	add	r8d, eax
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 1
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	mov	edi, eax
	sar	edi, 31
	sub	edx, edi
	imul	edi, edx, 100
	sub	eax, edi
	mov	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	imul	eax, eax, 100
	add	eax, edx
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	add	eax, r8d
	imul	eax, esi
	sub	ecx, eax
	mov	edx, ecx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rcx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rcx
	mov	eax, DWORD PTR [rax]
	add	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	DWORD PTR [rax], edx
	add	DWORD PTR -4[rbp], 1
	add	DWORD PTR -12[rbp], 1
.L34:
	cmp	DWORD PTR -12[rbp], 99
	jle	.L35
	add	DWORD PTR -8[rbp], 1
.L33:
	cmp	DWORD PTR -8[rbp], 99
	jle	.L36
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	measures, .-measures
	.section	.rodata
.LC7:
	.string	"%i %f %f\n"
	.text
	.globl	main
	.type	main, @function
main:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	r11, -36864[rsp]
.LPSRL0:
	sub	rsp, 4096
	or	DWORD PTR [rsp], 0
	cmp	rsp, r11
	jne	.LPSRL0
	sub	rsp, 3232
	mov	DWORD PTR -40084[rbp], edi
	mov	QWORD PTR -40096[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	movss	xmm0, DWORD PTR .LC4[rip]
	movss	DWORD PTR -40052[rbp], xmm0
	mov	DWORD PTR myrand[rip], 12974236
	call	Init_Random
	lea	rax, -40048[rbp]
	mov	rdi, rax
	call	Init_Prob
	mov	DWORD PTR -40060[rbp], 0
	jmp	.L39
.L45:
	movzx	eax, BYTE PTR ip1[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip1[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	esi, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip2[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip2[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip[rip], dl
	movzx	eax, al
	add	esi, ecx
	movsx	rdx, eax
	lea	rcx, 0[0+rdx*4]
	lea	rdx, ira[rip]
	mov	DWORD PTR [rcx+rdx], esi
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR ip3[rip]
	lea	edx, 1[rax]
	mov	BYTE PTR ip3[rip], dl
	movzx	eax, al
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, ira[rip]
	mov	eax, DWORD PTR [rdx+rax]
	xor	eax, ecx
	mov	eax, eax
	test	rax, rax
	js	.L40
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	jmp	.L41
.L40:
	mov	rdx, rax
	shr	rdx
	and	eax, 1
	or	rdx, rax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rdx
	addsd	xmm0, xmm0
.L41:
	movsd	xmm1, QWORD PTR .LC2[rip]
	mulsd	xmm0, xmm1
	comisd	xmm0, QWORD PTR .LC5[rip]
	jbe	.L51
	mov	edx, 1
	jmp	.L44
.L51:
	mov	edx, -1
.L44:
	mov	eax, DWORD PTR -40060[rbp]
	cdqe
	mov	DWORD PTR -40016[rbp+rax*4], edx
	add	DWORD PTR -40060[rbp], 1
.L39:
	cmp	DWORD PTR -40060[rbp], 9999
	jle	.L45
	lea	rdx, -40064[rbp]
	lea	rcx, -40068[rbp]
	lea	rax, -40016[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	measures
	call	clock@PLT
	mov	QWORD PTR start[rip], rax
	mov	DWORD PTR -40056[rbp], 0
	jmp	.L46
.L47:
	lea	rcx, -40068[rbp]
	lea	rdx, -40064[rbp]
	lea	rsi, -40048[rbp]
	lea	rax, -40016[rbp]
	mov	rdi, rax
	call	oneMCS
	mov	eax, DWORD PTR -40068[rbp]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	mulss	xmm0, DWORD PTR -40052[rbp]
	movss	xmm1, DWORD PTR .LC6[rip]
	divss	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	mov	eax, DWORD PTR -40064[rbp]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	mulss	xmm0, DWORD PTR -40052[rbp]
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm0
	movq	rdx, xmm2
	mov	eax, DWORD PTR -40056[rbp]
	movq	xmm0, rdx
	mov	esi, eax
	lea	rdi, .LC7[rip]
	mov	eax, 2
	call	printf@PLT
	add	DWORD PTR -40056[rbp], 1
.L46:
	cmp	DWORD PTR -40056[rbp], 9999
	jle	.L47
	call	clock@PLT
	mov	QWORD PTR stop[rip], rax
	mov	eax, 0
	mov	rdi, QWORD PTR -8[rbp]
	sub	rdi, QWORD PTR fs:40
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	-1073741824
	.align 8
.LC1:
	.long	0
	.long	1073741824
	.align 8
.LC2:
	.long	-149699
	.long	1039138815
	.align 8
.LC3:
	.long	0
	.long	1086556160
	.align 4
.LC4:
	.long	953267991
	.align 8
.LC5:
	.long	0
	.long	1071644672
	.align 4
.LC6:
	.long	1073741824
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"273005.c"
	.text
	.comm	start,4,4
	.comm	stop,4,4
	.comm	myrand,4,4
	.comm	ira,1024,4
	.comm	ip,1,1
	.comm	ip1,1,1
	.comm	ip2,1,1
	.comm	ip3,1,1
	.align	2
	.global	rand4init
	.syntax unified
	.arm
	.fpu softvfp
	.type	rand4init, %function
rand4init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, fp}
	add	fp, sp, #16
	sub	sp, sp, #12
	ldr	r3, .L4
	ldr	r3, [r3]
	mov	r4, r3
	mov	r5, #0
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #2
	orr	r3, r3, r0, lsr #30
	lsl	r2, r0, #2
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #4
	orr	r3, r3, r0, lsr #28
	lsl	r2, r0, #4
	subs	r2, r2, r0
	sbc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #3
	orr	r1, r1, r2, lsr #29
	lsl	r0, r2, #3
	subs	r6, r0, r2
	sbc	r7, r1, r3
	str	r6, [fp, #-28]
	str	r7, [fp, #-24]
	ldr	r3, [fp, #-28]
	bic	ip, r3, #-2147483648
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #31
	orr	r2, r2, r1, lsl #1
	lsr	r3, r1, #31
	mov	r3, r2
	add	r3, ip, r3
	ldr	r2, .L4
	str	r3, [r2]
	ldr	r3, .L4
	ldr	r3, [r3]
	cmp	r3, #0
	bge	.L2
	ldr	r3, .L4
	ldr	r3, [r3]
	bic	r3, r3, #-2147483648
	add	r3, r3, #1
	ldr	r2, .L4
	str	r3, [r2]
.L2:
	ldr	r3, .L4
	ldr	r3, [r3]
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, r7, fp}
	bx	lr
.L5:
	.align	2
.L4:
	.word	myrand
	.size	rand4init, .-rand4init
	.align	2
	.global	Init_Random
	.syntax unified
	.arm
	.fpu softvfp
	.type	Init_Random, %function
Init_Random:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L9
	mvn	r2, #127
	strb	r2, [r3]
	ldr	r3, .L9
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #24
	and	r2, r3, #255
	ldr	r3, .L9+4
	strb	r2, [r3]
	ldr	r3, .L9
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #55
	and	r2, r3, #255
	ldr	r3, .L9+8
	strb	r2, [r3]
	ldr	r3, .L9
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #61
	and	r2, r3, #255
	ldr	r3, .L9+12
	strb	r2, [r3]
	ldr	r3, .L9+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
	b	.L7
.L8:
	bl	rand4init
	mov	r2, r0
	ldr	r1, .L9+16
	ldr	r3, [fp, #-8]
	str	r2, [r1, r3, lsl #2]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L7:
	ldr	r3, .L9
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-8]
	cmp	r3, r2
	bcc	.L8
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L10:
	.align	2
.L9:
	.word	ip
	.word	ip1
	.word	ip2
	.word	ip3
	.word	ira
	.size	Init_Random, .-Init_Random
	.global	__aeabi_i2d
	.global	__aeabi_dmul
	.global	__aeabi_ddiv
	.global	__aeabi_d2f
	.align	2
	.global	Init_Prob
	.syntax unified
	.arm
	.fpu softvfp
	.type	Init_Prob, %function
Init_Prob:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L12
.L13:
	ldr	r0, [fp, #-16]
	bl	__aeabi_i2d
	mov	r2, #0
	mov	r3, #-1073741824
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #1073741824
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	exp
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-16]
	lsl	r1, r1, #2
	ldr	r0, [fp, #-24]
	add	r4, r0, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r4]	@ float
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L12:
	ldr	r3, [fp, #-16]
	cmp	r3, #4
	ble	.L13
	nop
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	Init_Prob, .-Init_Prob
	.global	__aeabi_ui2d
	.global	__aeabi_f2d
	.global	__aeabi_dcmplt
	.align	2
	.global	oneMCS
	.syntax unified
	.arm
	.fpu softvfp
	.type	oneMCS, %function
oneMCS:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #32
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	str	r2, [fp, #-40]
	str	r3, [fp, #-44]
	mov	r3, #0
	str	r3, [fp, #-28]
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L15
.L21:
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L16
.L20:
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldr	r0, [r3]
	ldr	r3, [fp, #-20]
	add	r1, r3, #99
	ldr	r3, .L23
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldr	ip, [r3]
	ldr	r3, [fp, #-24]
	add	r1, r3, #99
	ldr	r3, .L23
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	ldr	r1, [fp, #-20]
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r1, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	ip, ip, r3
	ldr	r3, [fp, #-20]
	add	r1, r3, #1
	ldr	r3, .L23
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	ip, ip, r3
	ldr	r3, [fp, #-24]
	add	r1, r3, #1
	ldr	r3, .L23
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	ldr	r1, [fp, #-20]
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r1, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	r3, ip, r3
	mul	r3, r0, r3
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	ble	.L17
	ldr	r3, .L23+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r1, r2, #255
	ldr	r2, .L23+4
	strb	r1, [r2]
	mov	r2, r3
	ldr	r3, .L23+8
	ldr	r1, [r3, r2, lsl #2]
	ldr	r3, .L23+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r0, r2, #255
	ldr	r2, .L23+12
	strb	r0, [r2]
	mov	r2, r3
	ldr	r3, .L23+8
	ldr	r2, [r3, r2, lsl #2]
	ldr	r3, .L23+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r0, r3, #1
	and	ip, r0, #255
	ldr	r0, .L23+16
	strb	ip, [r0]
	add	r2, r1, r2
	ldr	r1, .L23+8
	str	r2, [r1, r3, lsl #2]
	ldr	r2, .L23+8
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L23+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r1, r3, #1
	and	r0, r1, #255
	ldr	r1, .L23+20
	strb	r0, [r1]
	mov	r1, r3
	ldr	r3, .L23+8
	ldr	r3, [r3, r1, lsl #2]
	eor	r3, r3, r2
	mov	r0, r3
	bl	__aeabi_ui2d
	ldr	r2, .L23+24
	ldr	r3, .L23+28
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-36]
	add	r3, r2, r3
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L18
.L17:
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-32]
	add	r3, r1, r3
	rsb	r2, r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-40]
	ldr	r2, [r3]
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-32]
	add	r3, r1, r3
	ldr	r3, [r3]
	lsl	r3, r3, #1
	add	r2, r2, r3
	ldr	r3, [fp, #-40]
	str	r2, [r3]
	ldr	r3, [fp, #-44]
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	add	r2, r2, r3
	ldr	r3, [fp, #-44]
	str	r2, [r3]
.L18:
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L16:
	ldr	r3, [fp, #-24]
	cmp	r3, #99
	ble	.L20
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L15:
	ldr	r3, [fp, #-20]
	cmp	r3, #99
	ble	.L21
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L24:
	.align	2
.L23:
	.word	1374389535
	.word	ip1
	.word	ira
	.word	ip2
	.word	ip
	.word	ip3
	.word	-149699
	.word	1039138815
	.size	oneMCS, .-oneMCS
	.global	__aeabi_d2iz
	.align	2
	.global	oneMCSrand
	.syntax unified
	.arm
	.fpu softvfp
	.type	oneMCSrand, %function
oneMCSrand:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #40
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L26
.L30:
	ldr	r3, .L32
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r1, r2, #255
	ldr	r2, .L32
	strb	r1, [r2]
	mov	r2, r3
	ldr	r3, .L32+4
	ldr	r1, [r3, r2, lsl #2]
	ldr	r3, .L32+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r0, r2, #255
	ldr	r2, .L32+8
	strb	r0, [r2]
	mov	r2, r3
	ldr	r3, .L32+4
	ldr	r2, [r3, r2, lsl #2]
	ldr	r3, .L32+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r0, r3, #1
	and	ip, r0, #255
	ldr	r0, .L32+12
	strb	ip, [r0]
	add	r2, r1, r2
	ldr	r1, .L32+4
	str	r2, [r1, r3, lsl #2]
	ldr	r2, .L32+4
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L32+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r1, r3, #1
	and	r0, r1, #255
	ldr	r1, .L32+16
	strb	r0, [r1]
	mov	r1, r3
	ldr	r3, .L32+4
	ldr	r3, [r3, r1, lsl #2]
	eor	r3, r3, r2
	mov	r0, r3
	bl	__aeabi_ui2d
	ldr	r2, .L32+20
	ldr	r3, .L32+24
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L32+28
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	str	r3, [fp, #-28]
	ldr	r2, [fp, #-28]
	ldr	r3, .L32+32
	smull	r1, r3, r2, r3
	asr	r1, r3, #5
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r1, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #2
	sub	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r1, [fp, #-28]
	ldr	r3, .L32+32
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	ldr	r3, [fp, #-28]
	sub	r3, r3, r2
	ldr	r2, .L32+32
	smull	r1, r2, r3, r2
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	ldr	r0, [r3]
	ldr	r3, [fp, #-20]
	add	r1, r3, #99
	ldr	r3, .L32+32
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	ldr	ip, [r3]
	ldr	r3, [fp, #-24]
	add	r1, r3, #99
	ldr	r3, .L32+32
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	ldr	r1, [fp, #-20]
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r1, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	ip, ip, r3
	ldr	r3, [fp, #-20]
	add	r1, r3, #1
	ldr	r3, .L32+32
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	ip, ip, r3
	ldr	r3, [fp, #-24]
	add	r1, r3, #1
	ldr	r3, .L32+32
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	ldr	r1, [fp, #-20]
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r1, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	r3, ip, r3
	mul	r3, r0, r3
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	ble	.L27
	ldr	r3, .L32
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r1, r2, #255
	ldr	r2, .L32
	strb	r1, [r2]
	mov	r2, r3
	ldr	r3, .L32+4
	ldr	r1, [r3, r2, lsl #2]
	ldr	r3, .L32+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r0, r2, #255
	ldr	r2, .L32+8
	strb	r0, [r2]
	mov	r2, r3
	ldr	r3, .L32+4
	ldr	r2, [r3, r2, lsl #2]
	ldr	r3, .L32+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r0, r3, #1
	and	ip, r0, #255
	ldr	r0, .L32+12
	strb	ip, [r0]
	add	r2, r1, r2
	ldr	r1, .L32+4
	str	r2, [r1, r3, lsl #2]
	ldr	r2, .L32+4
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L32+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r1, r3, #1
	and	r0, r1, #255
	ldr	r1, .L32+16
	strb	r0, [r1]
	mov	r1, r3
	ldr	r3, .L32+4
	ldr	r3, [r3, r1, lsl #2]
	eor	r3, r3, r2
	mov	r0, r3
	bl	__aeabi_ui2d
	ldr	r2, .L32+20
	ldr	r3, .L32+24
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-44]
	add	r3, r2, r3
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L28
.L27:
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-40]
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-40]
	add	r3, r1, r3
	rsb	r2, r2, #0
	str	r2, [r3]
.L28:
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L26:
	ldr	r3, [fp, #-32]
	ldr	r2, .L32+36
	cmp	r3, r2
	ble	.L30
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L33:
	.align	2
.L32:
	.word	ip1
	.word	ira
	.word	ip2
	.word	ip
	.word	ip3
	.word	-149699
	.word	1039138815
	.word	1086556160
	.word	1374389535
	.word	9999
	.size	oneMCSrand, .-oneMCSrand
	.align	2
	.global	measures
	.syntax unified
	.arm
	.fpu softvfp
	.type	measures, %function
measures:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	ldr	r3, [fp, #-28]
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-32]
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L35
.L38:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L36
.L37:
	ldr	r3, [fp, #-28]
	ldr	r0, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldr	ip, [r3]
	ldr	r3, [fp, #-12]
	add	r1, r3, #99
	ldr	r3, .L40
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldr	lr, [r3]
	ldr	r3, [fp, #-16]
	add	r1, r3, #99
	ldr	r3, .L40
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	ldr	r1, [fp, #-12]
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r1, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	lr, lr, r3
	ldr	r3, [fp, #-12]
	add	r1, r3, #1
	ldr	r3, .L40
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	lr, lr, r3
	ldr	r3, [fp, #-16]
	add	r1, r3, #1
	ldr	r3, .L40
	smull	r2, r3, r1, r3
	asr	r2, r3, #5
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	sub	r2, r1, r3
	ldr	r1, [fp, #-12]
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r1, r3, #2
	add	r3, r3, r1
	lsl	r3, r3, #2
	add	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldr	r3, [r3]
	add	r3, lr, r3
	mul	r3, ip, r3
	sub	r2, r0, r3
	ldr	r3, [fp, #-28]
	str	r2, [r3]
	ldr	r3, [fp, #-32]
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r1, [fp, #-24]
	add	r3, r1, r3
	ldr	r3, [r3]
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	str	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L36:
	ldr	r3, [fp, #-16]
	cmp	r3, #99
	ble	.L37
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L35:
	ldr	r3, [fp, #-12]
	cmp	r3, #99
	ble	.L38
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L41:
	.align	2
.L40:
	.word	1374389535
	.size	measures, .-measures
	.global	__aeabi_dcmpgt
	.global	__aeabi_i2f
	.global	__aeabi_fmul
	.global	__aeabi_fdiv
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%i %f %f\012\000"
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 40056
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #39936
	sub	sp, sp, #128
	sub	r3, fp, #36864
	sub	r3, r3, #12
	str	r0, [r3, #-3188]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	str	r1, [r3, #-3192]
	ldr	r3, .L54
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	ldr	r3, .L54+4
	str	r3, [r2, #-3164]	@ float
	ldr	r3, .L54+8
	ldr	r2, .L54+12
	str	r2, [r3]
	bl	Init_Random
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #88
	mov	r0, r3
	bl	Init_Prob
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-3172]
	b	.L43
.L47:
	ldr	r3, .L54+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r1, r2, #255
	ldr	r2, .L54+16
	strb	r1, [r2]
	mov	r2, r3
	ldr	r3, .L54+20
	ldr	r1, [r3, r2, lsl #2]
	ldr	r3, .L54+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r2, r3, #1
	and	r0, r2, #255
	ldr	r2, .L54+24
	strb	r0, [r2]
	mov	r2, r3
	ldr	r3, .L54+20
	ldr	r2, [r3, r2, lsl #2]
	ldr	r3, .L54+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r0, r3, #1
	and	ip, r0, #255
	ldr	r0, .L54+28
	strb	ip, [r0]
	add	r2, r1, r2
	ldr	r1, .L54+20
	str	r2, [r1, r3, lsl #2]
	ldr	r2, .L54+20
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L54+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r1, r3, #1
	and	r0, r1, #255
	ldr	r1, .L54+32
	strb	r0, [r1]
	mov	r1, r3
	ldr	r3, .L54+20
	ldr	r3, [r3, r1, lsl #2]
	eor	r3, r3, r2
	mov	r0, r3
	bl	__aeabi_ui2d
	ldr	r2, .L54+36
	ldr	r3, .L54+40
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L54+44
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L53
	mov	r2, #1
	b	.L46
.L53:
	mvn	r2, #0
.L46:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r3, [r3, #-3172]
	lsl	r3, r3, #2
	add	r3, r1, r3
	str	r2, [r3, #-3140]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r3, [r3, #-3172]
	add	r3, r3, #1
	str	r3, [r2, #-3172]
.L43:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r3, [r3, #-3172]
	ldr	r2, .L54+48
	cmp	r3, r2
	ble	.L47
	sub	r2, fp, #39936
	sub	r2, r2, #12
	sub	r2, r2, #104
	sub	r1, fp, #39936
	sub	r1, r1, #12
	sub	r1, r1, #108
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #68
	mov	r0, r3
	bl	measures
	bl	clock
	mov	r3, r0
	ldr	r2, .L54+52
	str	r3, [r2]
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	mov	r3, #0
	str	r3, [r2, #-3168]
	b	.L48
.L49:
	sub	r3, fp, #39936
	sub	r3, r3, #12
	sub	r3, r3, #108
	sub	r2, fp, #39936
	sub	r2, r2, #12
	sub	r2, r2, #104
	sub	r1, fp, #39936
	sub	r1, r1, #12
	sub	r1, r1, #88
	sub	r0, fp, #39936
	sub	r0, r0, #12
	sub	r0, r0, #68
	bl	oneMCS
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r3, [r3, #-3176]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r2, fp, #36864
	sub	r2, r2, #12
	ldr	r1, [r2, #-3164]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r3, [r3, #-3180]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r2, fp, #36864
	sub	r2, r2, #12
	ldr	r1, [r2, #-3164]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #36864
	sub	r1, r1, #12
	stm	sp, {r2-r3}
	mov	r2, r4
	mov	r3, r5
	ldr	r1, [r1, #-3168]
	ldr	r0, .L54+56
	bl	printf
	sub	r3, fp, #36864
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r3, [r3, #-3168]
	add	r3, r3, #1
	str	r3, [r2, #-3168]
.L48:
	sub	r3, fp, #36864
	sub	r3, r3, #12
	ldr	r3, [r3, #-3168]
	ldr	r2, .L54+48
	cmp	r3, r2
	ble	.L49
	bl	clock
	mov	r3, r0
	ldr	r2, .L54+60
	str	r3, [r2]
	mov	r3, #0
	ldr	r2, .L54
	ldr	r1, [r2]
	ldr	r2, [fp, #-16]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L51
	bl	__stack_chk_fail
.L51:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L55:
	.align	2
.L54:
	.word	.LC1
	.word	953267991
	.word	myrand
	.word	12974236
	.word	ip1
	.word	ira
	.word	ip2
	.word	ip
	.word	ip3
	.word	-149699
	.word	1039138815
	.word	1071644672
	.word	9999
	.word	start
	.word	.LC0
	.word	stop
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
