	.file	"277034.c"
	.intel_syntax noprefix
	.text
	.globl	reg_set_one_bit
	.type	reg_set_one_bit, @function
reg_set_one_bit:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	or	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	reg_set_one_bit, .-reg_set_one_bit
	.globl	reg_clr_one_bit
	.type	reg_clr_one_bit, @function
reg_clr_one_bit:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -8[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	not	eax
	and	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	reg_clr_one_bit, .-reg_clr_one_bit
	.globl	reg_get_bit
	.type	reg_get_bit, @function
reg_get_bit:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	and	eax, 1
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	reg_get_bit, .-reg_get_bit
	.globl	reg_write_8
	.type	reg_write_8, @function
reg_write_8:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	QWORD PTR -16[rbp], rsi
	mov	BYTE PTR -4[rbp], al
	mov	rax, QWORD PTR -16[rbp]
	movzx	edx, BYTE PTR -4[rbp]
	mov	BYTE PTR [rax], dl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	reg_write_8, .-reg_write_8
	.globl	reg_read_8
	.type	reg_read_8, @function
reg_read_8:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR [rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	reg_read_8, .-reg_read_8
	.globl	reg_write_32
	.type	reg_write_32, @function
reg_write_32:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -16[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	reg_write_32, .-reg_write_32
	.globl	reg_read_32
	.type	reg_read_32, @function
reg_read_32:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	reg_read_32, .-reg_read_32
	.globl	ls1c_ffs
	.type	ls1c_ffs, @function
ls1c_ffs:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -4[rbp], 1
	cmp	DWORD PTR -20[rbp], 0
	jne	.L14
	mov	eax, 0
	jmp	.L15
.L14:
	mov	eax, DWORD PTR -20[rbp]
	movzx	eax, ax
	test	eax, eax
	jne	.L16
	sar	DWORD PTR -20[rbp], 16
	add	DWORD PTR -4[rbp], 16
.L16:
	mov	eax, DWORD PTR -20[rbp]
	movzx	eax, al
	test	eax, eax
	jne	.L17
	sar	DWORD PTR -20[rbp], 8
	add	DWORD PTR -4[rbp], 8
.L17:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 15
	test	eax, eax
	jne	.L18
	sar	DWORD PTR -20[rbp], 4
	add	DWORD PTR -4[rbp], 4
.L18:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 3
	test	eax, eax
	jne	.L19
	sar	DWORD PTR -20[rbp], 2
	add	DWORD PTR -4[rbp], 2
.L19:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, 1
	test	eax, eax
	jne	.L20
	sar	DWORD PTR -20[rbp]
	add	DWORD PTR -4[rbp], 1
.L20:
	mov	eax, DWORD PTR -4[rbp]
.L15:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	ls1c_ffs, .-ls1c_ffs
	.globl	ls1c_fls
	.type	ls1c_fls, @function
ls1c_fls:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -4[rbp], 32
	cmp	DWORD PTR -20[rbp], 0
	jne	.L22
	mov	eax, 0
	jmp	.L23
.L22:
	mov	eax, DWORD PTR -20[rbp]
	mov	ax, 0
	test	eax, eax
	jne	.L24
	sal	DWORD PTR -20[rbp], 16
	sub	DWORD PTR -4[rbp], 16
.L24:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, -16777216
	test	eax, eax
	jne	.L25
	sal	DWORD PTR -20[rbp], 8
	sub	DWORD PTR -4[rbp], 8
.L25:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, -268435456
	test	eax, eax
	jne	.L26
	sal	DWORD PTR -20[rbp], 4
	sub	DWORD PTR -4[rbp], 4
.L26:
	mov	eax, DWORD PTR -20[rbp]
	and	eax, -1073741824
	test	eax, eax
	jne	.L27
	sal	DWORD PTR -20[rbp], 2
	sub	DWORD PTR -4[rbp], 2
.L27:
	cmp	DWORD PTR -20[rbp], 0
	js	.L28
	sal	DWORD PTR -20[rbp]
	sub	DWORD PTR -4[rbp], 1
.L28:
	mov	eax, DWORD PTR -4[rbp]
.L23:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	ls1c_fls, .-ls1c_fls
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"277034.c"
	.text
	.align	2
	.global	reg_set_one_bit
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg_set_one_bit, %function
reg_set_one_bit:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r2, #1
	ldr	r3, [fp, #-20]
	lsl	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	orr	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-8]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg_set_one_bit, .-reg_set_one_bit
	.align	2
	.global	reg_clr_one_bit
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg_clr_one_bit, %function
reg_clr_one_bit:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r2, #1
	ldr	r3, [fp, #-20]
	lsl	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	mvn	r3, r3
	ldr	r2, [fp, #-8]
	and	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-8]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg_clr_one_bit, .-reg_clr_one_bit
	.align	2
	.global	reg_get_bit
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg_get_bit, %function
reg_get_bit:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	lsr	r3, r2, r3
	and	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg_get_bit, .-reg_get_bit
	.align	2
	.global	reg_write_8
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg_write_8, %function
reg_write_8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	str	r1, [fp, #-12]
	strb	r3, [fp, #-5]
	ldr	r3, [fp, #-12]
	ldrb	r2, [fp, #-5]
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg_write_8, .-reg_write_8
	.align	2
	.global	reg_read_8
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg_read_8, %function
reg_read_8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r3, [r3]
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg_read_8, .-reg_read_8
	.align	2
	.global	reg_write_32
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg_write_32, %function
reg_write_32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-12]
	ldr	r2, [fp, #-8]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg_write_32, .-reg_write_32
	.align	2
	.global	reg_read_32
	.syntax unified
	.arm
	.fpu softvfp
	.type	reg_read_32, %function
reg_read_32:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	reg_read_32, .-reg_read_32
	.align	2
	.global	ls1c_ffs
	.syntax unified
	.arm
	.fpu softvfp
	.type	ls1c_ffs, %function
ls1c_ffs:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L14
	mov	r3, #0
	b	.L15
.L14:
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	cmp	r3, #0
	bne	.L16
	ldr	r3, [fp, #-16]
	asr	r3, r3, #16
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #16
	str	r3, [fp, #-8]
.L16:
	ldr	r3, [fp, #-16]
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L17
	ldr	r3, [fp, #-16]
	asr	r3, r3, #8
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #8
	str	r3, [fp, #-8]
.L17:
	ldr	r3, [fp, #-16]
	and	r3, r3, #15
	cmp	r3, #0
	bne	.L18
	ldr	r3, [fp, #-16]
	asr	r3, r3, #4
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	str	r3, [fp, #-8]
.L18:
	ldr	r3, [fp, #-16]
	and	r3, r3, #3
	cmp	r3, #0
	bne	.L19
	ldr	r3, [fp, #-16]
	asr	r3, r3, #2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #2
	str	r3, [fp, #-8]
.L19:
	ldr	r3, [fp, #-16]
	and	r3, r3, #1
	cmp	r3, #0
	bne	.L20
	ldr	r3, [fp, #-16]
	asr	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L20:
	ldr	r3, [fp, #-8]
.L15:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ls1c_ffs, .-ls1c_ffs
	.align	2
	.global	ls1c_fls
	.syntax unified
	.arm
	.fpu softvfp
	.type	ls1c_fls, %function
ls1c_fls:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #32
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L22
	mov	r3, #0
	b	.L23
.L22:
	ldr	r3, [fp, #-16]
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	cmp	r3, #0
	bne	.L24
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #16
	str	r3, [fp, #-8]
.L24:
	ldr	r3, [fp, #-16]
	and	r3, r3, #-16777216
	cmp	r3, #0
	bne	.L25
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #8
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #8
	str	r3, [fp, #-8]
.L25:
	ldr	r3, [fp, #-16]
	and	r3, r3, #-268435456
	cmp	r3, #0
	bne	.L26
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #4
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #4
	str	r3, [fp, #-8]
.L26:
	ldr	r3, [fp, #-16]
	and	r3, r3, #-1073741824
	cmp	r3, #0
	bne	.L27
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #2
	str	r3, [fp, #-8]
.L27:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	blt	.L28
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
.L28:
	ldr	r3, [fp, #-8]
.L23:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ls1c_fls, .-ls1c_fls
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
