	.file	"212398.c"
	.intel_syntax noprefix
	.text
	.globl	rotor
	.section	.rodata
	.align 32
	.type	rotor, @object
	.size	rotor, 131
rotor:
	.string	"EKMFLGDQVZNTOWYHXUSPAIBRCJAJDKSIRUXBLHWTMCQGZNPYFVOEBDFHJLCPRTXVZNYEIWGAKMUSQOESOVPZJAYQUIRHXLNFTGKDCMWBVZBRGITYUPSDNHLXAWMJQOFECK"
	.globl	ref
	.align 16
	.type	ref, @object
	.size	ref, 27
ref:
	.string	"YRUHQSLDPXNGOKMIEBFZCWVJAT"
	.globl	notch
	.type	notch, @object
	.size	notch, 6
notch:
	.string	"QEVJZ"
	.globl	flag
	.bss
	.align 4
	.type	flag, @object
	.size	flag, 4
flag:
	.zero	4
	.globl	order
	.section	.rodata
	.type	order, @object
	.size	order, 3
order:
	.ascii	"\003\001\002"
	.globl	rings
	.type	rings, @object
	.size	rings, 3
rings:
	.ascii	"WXT"
	.globl	pos
	.bss
	.type	pos, @object
	.size	pos, 3
pos:
	.zero	3
	.globl	plug
	.section	.rodata
	.type	plug, @object
	.size	plug, 5
plug:
	.string	"AMTE"
	.align 8
.LC0:
	.string	"Enter text to be (de)coded, finish with a ."
	.text
	.globl	main
	.type	main, @function
main:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -8[rbp], 0
	lea	rdi, .LC0[rip]
	call	puts@PLT
	mov	BYTE PTR pos[rip], 65
	mov	BYTE PTR pos[rip+1], 87
	mov	BYTE PTR pos[rip+2], 69
.L36:
	call	getchar@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	call	toupper@PLT
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 46
	jne	.L2
	mov	edi, 0
	call	exit@PLT
.L2:
	call	__ctype_b_loc@PLT
	mov	rdx, QWORD PTR [rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, rax
	add	rax, rdx
	movzx	eax, WORD PTR [rax]
	movzx	eax, ax
	and	eax, 1024
	test	eax, eax
	je	.L37
	movzx	eax, BYTE PTR pos[rip]
	add	eax, 1
	mov	BYTE PTR pos[rip], al
	movzx	eax, BYTE PTR pos[rip]
	cmp	al, 90
	jbe	.L5
	movzx	eax, BYTE PTR pos[rip]
	sub	eax, 26
	mov	BYTE PTR pos[rip], al
.L5:
	mov	eax, DWORD PTR flag[rip]
	test	eax, eax
	je	.L6
	movzx	eax, BYTE PTR pos[rip+1]
	add	eax, 1
	mov	BYTE PTR pos[rip+1], al
	movzx	eax, BYTE PTR pos[rip+1]
	cmp	al, 90
	jbe	.L7
	movzx	eax, BYTE PTR pos[rip+1]
	sub	eax, 26
	mov	BYTE PTR pos[rip+1], al
.L7:
	movzx	eax, BYTE PTR pos[rip+2]
	add	eax, 1
	mov	BYTE PTR pos[rip+2], al
	movzx	eax, BYTE PTR pos[rip+2]
	cmp	al, 90
	jbe	.L8
	movzx	eax, BYTE PTR pos[rip+2]
	sub	eax, 26
	mov	BYTE PTR pos[rip+2], al
.L8:
	mov	DWORD PTR flag[rip], 0
.L6:
	movzx	edx, BYTE PTR pos[rip]
	mov	eax, 3
	movzx	eax, al
	sub	eax, 1
	cdqe
	lea	rcx, notch[rip]
	movzx	eax, BYTE PTR [rax+rcx]
	cmp	dl, al
	jne	.L9
	movzx	eax, BYTE PTR pos[rip+1]
	add	eax, 1
	mov	BYTE PTR pos[rip+1], al
	movzx	eax, BYTE PTR pos[rip+1]
	cmp	al, 90
	jbe	.L10
	movzx	eax, BYTE PTR pos[rip+1]
	sub	eax, 26
	mov	BYTE PTR pos[rip+1], al
.L10:
	movzx	edx, BYTE PTR pos[rip+1]
	mov	eax, 1
	movzx	eax, al
	sub	eax, 1
	cdqe
	lea	rcx, notch[rip]
	movzx	eax, BYTE PTR [rax+rcx]
	cmp	dl, al
	jne	.L9
	mov	DWORD PTR flag[rip], 1
.L9:
	mov	DWORD PTR -16[rbp], 0
	jmp	.L11
.L14:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, plug[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	cmp	DWORD PTR -4[rbp], eax
	jne	.L12
	mov	eax, DWORD PTR -16[rbp]
	add	eax, 1
	mov	edx, eax
	lea	rax, plug[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	jmp	.L13
.L12:
	mov	eax, DWORD PTR -16[rbp]
	add	eax, 1
	mov	edx, eax
	lea	rax, plug[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	cmp	DWORD PTR -4[rbp], eax
	jne	.L13
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, plug[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
.L13:
	add	DWORD PTR -16[rbp], 2
.L11:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, plug[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L14
	mov	DWORD PTR -16[rbp], 0
	jmp	.L15
.L20:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, pos[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sub	eax, 65
	add	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 90
	jle	.L16
	sub	DWORD PTR -4[rbp], 26
.L16:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, rings[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sub	eax, 65
	sub	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 64
	jg	.L17
	add	DWORD PTR -4[rbp], 26
.L17:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, order[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sub	eax, 1
	imul	edx, eax, 26
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	sub	eax, 65
	cdqe
	lea	rdx, rotor[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, rings[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sub	eax, 65
	add	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 90
	jle	.L18
	sub	DWORD PTR -4[rbp], 26
.L18:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, pos[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sub	eax, 65
	sub	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 64
	jg	.L19
	add	DWORD PTR -4[rbp], 26
.L19:
	add	DWORD PTR -16[rbp], 1
.L15:
	cmp	DWORD PTR -16[rbp], 2
	jbe	.L20
	mov	eax, DWORD PTR -4[rbp]
	sub	eax, 65
	cdqe
	lea	rdx, ref[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	DWORD PTR -16[rbp], 3
	jmp	.L21
.L30:
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, 1
	mov	edx, eax
	lea	rax, pos[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sub	eax, 65
	add	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 90
	jle	.L22
	sub	DWORD PTR -4[rbp], 26
.L22:
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, 1
	mov	edx, eax
	lea	rax, rings[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sub	eax, 65
	sub	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 64
	jg	.L23
	add	DWORD PTR -4[rbp], 26
.L23:
	mov	DWORD PTR -12[rbp], 0
	jmp	.L24
.L27:
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, 1
	mov	edx, eax
	lea	rax, order[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sub	eax, 1
	imul	eax, eax, 26
	mov	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	mov	edx, eax
	lea	rax, rotor[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	cmp	DWORD PTR -4[rbp], eax
	je	.L38
	add	DWORD PTR -12[rbp], 1
.L24:
	cmp	DWORD PTR -12[rbp], 25
	jbe	.L27
	jmp	.L26
.L38:
	nop
.L26:
	mov	eax, DWORD PTR -12[rbp]
	add	eax, 65
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, 1
	mov	edx, eax
	lea	rax, rings[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sub	eax, 65
	add	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 90
	jle	.L28
	sub	DWORD PTR -4[rbp], 26
.L28:
	mov	eax, DWORD PTR -16[rbp]
	sub	eax, 1
	mov	edx, eax
	lea	rax, pos[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	sub	eax, 65
	sub	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 64
	jg	.L29
	add	DWORD PTR -4[rbp], 26
.L29:
	sub	DWORD PTR -16[rbp], 1
.L21:
	cmp	DWORD PTR -16[rbp], 0
	jne	.L30
	mov	DWORD PTR -16[rbp], 0
	jmp	.L31
.L34:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, plug[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	cmp	DWORD PTR -4[rbp], eax
	jne	.L32
	mov	eax, DWORD PTR -16[rbp]
	add	eax, 1
	mov	edx, eax
	lea	rax, plug[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	jmp	.L33
.L32:
	mov	eax, DWORD PTR -16[rbp]
	add	eax, 1
	mov	edx, eax
	lea	rax, plug[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	cmp	DWORD PTR -4[rbp], eax
	jne	.L33
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, plug[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
.L33:
	add	DWORD PTR -16[rbp], 2
.L31:
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, plug[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L34
	add	DWORD PTR -8[rbp], 1
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	call	putchar@PLT
	mov	ecx, DWORD PTR -8[rbp]
	mov	edx, ecx
	mov	eax, 3435973837
	imul	rax, rdx
	shr	rax, 32
	shr	eax, 2
	mov	edx, eax
	sal	edx, 2
	add	edx, eax
	mov	eax, ecx
	sub	eax, edx
	test	eax, eax
	jne	.L36
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, edx
	imul	rax, rax, 702812831
	shr	rax, 32
	mov	rcx, rax
	mov	eax, edx
	sub	eax, ecx
	shr	eax
	add	eax, ecx
	shr	eax, 5
	imul	ecx, eax, 55
	mov	eax, edx
	sub	eax, ecx
	test	eax, eax
	jne	.L35
	mov	edi, 10
	call	putchar@PLT
	jmp	.L36
.L35:
	mov	edi, 32
	call	putchar@PLT
	jmp	.L36
.L37:
	nop
	jmp	.L36
	.cfi_endproc
.LFE6:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"212398.c"
	.text
	.global	rotor
	.section	.rodata
	.align	2
	.type	rotor, %object
	.size	rotor, 131
rotor:
	.ascii	"EKMFLGDQVZNTOWYHXUSPAIBRCJAJDKSIRUXBLHWTMCQGZNPYFVO"
	.ascii	"EBDFHJLCPRTXVZNYEIWGAKMUSQOESOVPZJAYQUIRHXLNFTGKDCM"
	.ascii	"WBVZBRGITYUPSDNHLXAWMJQOFECK\000"
	.global	ref
	.align	2
	.type	ref, %object
	.size	ref, 27
ref:
	.ascii	"YRUHQSLDPXNGOKMIEBFZCWVJAT\000"
	.global	notch
	.align	2
	.type	notch, %object
	.size	notch, 6
notch:
	.ascii	"QEVJZ\000"
	.global	flag
	.bss
	.align	2
	.type	flag, %object
	.size	flag, 4
flag:
	.space	4
	.global	order
	.section	.rodata
	.align	2
	.type	order, %object
	.size	order, 3
order:
	.ascii	"\003\001\002"
	.global	rings
	.align	2
	.type	rings, %object
	.size	rings, 3
rings:
	.ascii	"WXT"
	.comm	pos,3,4
	.global	plug
	.align	2
	.type	plug, %object
	.size	plug, 5
plug:
	.ascii	"AMTE\000"
	.align	2
.LC0:
	.ascii	"Enter text to be (de)coded, finish with a .\000"
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	mov	r3, #0
	str	r3, [fp, #-12]
	ldr	r0, .L39
	bl	puts
	ldr	r3, .L39+4
	mov	r2, #65
	strb	r2, [r3]
	ldr	r3, .L39+4
	mov	r2, #87
	strb	r2, [r3, #1]
	ldr	r3, .L39+4
	mov	r2, #69
	strb	r2, [r3, #2]
.L36:
	bl	getchar
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	toupper
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #46
	bne	.L2
	mov	r0, #0
	bl	exit
.L2:
	bl	__ctype_b_loc
	mov	r3, r0
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]
	and	r3, r3, #1024
	cmp	r3, #0
	beq	.L37
	ldr	r3, .L39+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3]
	ldr	r3, .L39+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #90
	bls	.L5
	ldr	r3, .L39+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #26
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3]
.L5:
	ldr	r3, .L39+8
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L6
	ldr	r3, .L39+4
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3, #1]
	ldr	r3, .L39+4
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	cmp	r3, #90
	bls	.L7
	ldr	r3, .L39+4
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	sub	r3, r3, #26
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3, #1]
.L7:
	ldr	r3, .L39+4
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3, #2]
	ldr	r3, .L39+4
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	cmp	r3, #90
	bls	.L8
	ldr	r3, .L39+4
	ldrb	r3, [r3, #2]	@ zero_extendqisi2
	sub	r3, r3, #26
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3, #2]
.L8:
	ldr	r3, .L39+8
	mov	r2, #0
	str	r2, [r3]
.L6:
	ldr	r3, .L39+4
	ldrb	r2, [r3]	@ zero_extendqisi2
	mov	r3, #3
	sub	r3, r3, #1
	ldr	r1, .L39+12
	ldrb	r3, [r1, r3]	@ zero_extendqisi2
	cmp	r2, r3
	bne	.L9
	ldr	r3, .L39+4
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	add	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3, #1]
	ldr	r3, .L39+4
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	cmp	r3, #90
	bls	.L10
	ldr	r3, .L39+4
	ldrb	r3, [r3, #1]	@ zero_extendqisi2
	sub	r3, r3, #26
	and	r2, r3, #255
	ldr	r3, .L39+4
	strb	r2, [r3, #1]
.L10:
	ldr	r3, .L39+4
	ldrb	r2, [r3, #1]	@ zero_extendqisi2
	mov	r3, #1
	sub	r3, r3, #1
	ldr	r1, .L39+12
	ldrb	r3, [r1, r3]	@ zero_extendqisi2
	cmp	r2, r3
	bne	.L9
	ldr	r3, .L39+8
	mov	r2, #1
	str	r2, [r3]
.L9:
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L11
.L14:
	ldr	r2, .L39+16
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-8]
	cmp	r3, r2
	bne	.L12
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	ldr	r2, .L39+16
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
	b	.L13
.L12:
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	ldr	r2, .L39+16
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-8]
	cmp	r3, r2
	bne	.L13
	ldr	r2, .L39+16
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
.L13:
	ldr	r3, [fp, #-20]
	add	r3, r3, #2
	str	r3, [fp, #-20]
.L11:
	ldr	r2, .L39+16
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L14
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L15
.L20:
	ldr	r2, .L39+4
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #90
	ble	.L16
	ldr	r3, [fp, #-8]
	sub	r3, r3, #26
	str	r3, [fp, #-8]
.L16:
	ldr	r2, .L39+20
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #64
	bgt	.L17
	ldr	r3, [fp, #-8]
	add	r3, r3, #26
	str	r3, [fp, #-8]
.L17:
	ldr	r2, .L39+24
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	sub	r3, r3, #65
	ldr	r2, .L39+28
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
	ldr	r2, .L39+20
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #90
	ble	.L18
	ldr	r3, [fp, #-8]
	sub	r3, r3, #26
	str	r3, [fp, #-8]
.L18:
	ldr	r2, .L39+4
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #64
	bgt	.L19
	ldr	r3, [fp, #-8]
	add	r3, r3, #26
	str	r3, [fp, #-8]
.L19:
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L15:
	ldr	r3, [fp, #-20]
	cmp	r3, #2
	bls	.L20
	ldr	r3, [fp, #-8]
	sub	r3, r3, #65
	ldr	r2, .L39+32
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
	mov	r3, #3
	str	r3, [fp, #-20]
	b	.L21
.L30:
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	ldr	r2, .L39+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #90
	ble	.L22
	ldr	r3, [fp, #-8]
	sub	r3, r3, #26
	str	r3, [fp, #-8]
.L22:
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	ldr	r2, .L39+20
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #64
	bgt	.L23
	ldr	r3, [fp, #-8]
	add	r3, r3, #26
	str	r3, [fp, #-8]
.L23:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L24
.L27:
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	ldr	r2, .L39+24
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	sub	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, .L39+28
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-8]
	cmp	r3, r2
	beq	.L38
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L24:
	ldr	r3, [fp, #-16]
	cmp	r3, #25
	bls	.L27
	b	.L26
.L38:
	nop
.L26:
	ldr	r3, [fp, #-16]
	add	r3, r3, #65
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	ldr	r2, .L39+20
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #90
	ble	.L28
	ldr	r3, [fp, #-8]
	sub	r3, r3, #26
	str	r3, [fp, #-8]
.L28:
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	ldr	r2, .L39+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	sub	r3, r3, #65
	ldr	r2, [fp, #-8]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #64
	bgt	.L29
	ldr	r3, [fp, #-8]
	add	r3, r3, #26
	str	r3, [fp, #-8]
.L29:
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-20]
.L21:
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bne	.L30
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L31
.L34:
	ldr	r2, .L39+16
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-8]
	cmp	r3, r2
	bne	.L32
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	ldr	r2, .L39+16
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
	b	.L33
.L32:
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	ldr	r2, .L39+16
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-8]
	cmp	r3, r2
	bne	.L33
	ldr	r2, .L39+16
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
.L33:
	ldr	r3, [fp, #-20]
	add	r3, r3, #2
	str	r3, [fp, #-20]
.L31:
	ldr	r2, .L39+16
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L34
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	putchar
	ldr	r1, [fp, #-12]
	ldr	r3, .L39+36
	umull	r2, r3, r1, r3
	lsr	r2, r3, #2
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	sub	r2, r1, r3
	cmp	r2, #0
	bne	.L36
	ldr	r1, [fp, #-12]
	ldr	r3, .L39+40
	umull	r2, r3, r1, r3
	sub	r2, r1, r3
	lsr	r2, r2, #1
	add	r3, r3, r2
	lsr	r2, r3, #5
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	sub	r2, r1, r3
	cmp	r2, #0
	bne	.L35
	mov	r0, #10
	bl	putchar
	b	.L36
.L35:
	mov	r0, #32
	bl	putchar
	b	.L36
.L37:
	nop
	b	.L36
.L40:
	.align	2
.L39:
	.word	.LC0
	.word	pos
	.word	flag
	.word	notch
	.word	plug
	.word	rings
	.word	order
	.word	rotor
	.word	ref
	.word	-858993459
	.word	702812831
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
