	.file	"1004639.c"
	.intel_syntax noprefix
	.text
	.section	.rodata
	.align 16
	.type	SC0, @object
	.size	SC0, 16
SC0:
	.ascii	"P\\\221\215S`h\341\366\235@O\276[\351\177"
	.align 16
	.type	SC1, @object
	.size	SC1, 16
SC1:
	.ascii	"(\256H\306\25104p{\316 '_\255t?"
	.align 16
	.type	SC2, @object
	.size	SC2, 16
SC2:
	.ascii	"\024W$cT\030\2328\275g\020\023/\326\272\037"
	.align 16
	.type	RC0, @object
	.size	RC0, 16
RC0:
	.ascii	"\007\n\233\340\321\032\"\367b\226q\252+\351\317\267"
	.align 16
	.type	RC1, @object
	.size	RC1, 16
RC1:
	.ascii	"S]I\177\276\035(l\202Gk\210\334\213Y\306"
	.align 16
	.type	RC2, @object
	.size	RC2, 16
RC2:
	.ascii	"C\344^\3142Nu%\375\371v\240\260\t\036\255"
	.text
	.globl	rotl8
	.type	rotl8, @function
rotl8:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	ecx, esi
	mov	eax, edx
	mov	edx, edi
	mov	BYTE PTR -4[rbp], dl
	mov	edx, ecx
	mov	BYTE PTR -8[rbp], dl
	mov	BYTE PTR -12[rbp], al
	movzx	edx, BYTE PTR -4[rbp]
	movzx	eax, BYTE PTR -12[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	esi, eax
	movzx	edx, BYTE PTR -8[rbp]
	movzx	ecx, BYTE PTR -12[rbp]
	mov	eax, 8
	sub	eax, ecx
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	or	eax, esi
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	rotl8, .-rotl8
	.section	.rodata
.LC0:
	.string	"%02X"
	.text
	.globl	ace_print_state
	.type	ace_print_state, @function
ace_print_state:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	BYTE PTR -1[rbp], 0
	jmp	.L4
.L5:
	movzx	edx, BYTE PTR -1[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	movzx	eax, BYTE PTR -1[rbp]
	add	eax, 1
	mov	BYTE PTR -1[rbp], al
.L4:
	cmp	BYTE PTR -1[rbp], 39
	jbe	.L5
	mov	edi, 10
	call	putchar@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	ace_print_state, .-ace_print_state
	.section	.rodata
.LC1:
	.string	"%.2x "
	.text
	.globl	ace_print_data
	.type	ace_print_data, @function
ace_print_data:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -4[rbp], 0
	jmp	.L7
.L8:
	mov	edx, DWORD PTR -4[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -4[rbp], 1
.L7:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -28[rbp]
	jb	.L8
	mov	edi, 10
	call	putchar@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	ace_print_data, .-ace_print_data
	.globl	simeck64_box
	.type	simeck64_box, @function
simeck64_box:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 72
	.cfi_offset 3, -24
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	mov	eax, edx
	mov	BYTE PTR -68[rbp], al
	mov	edi, 4
	call	malloc@PLT
	mov	QWORD PTR -40[rbp], rax
	mov	edi, 4
	call	malloc@PLT
	mov	QWORD PTR -32[rbp], rax
	mov	edi, 8
	call	malloc@PLT
	mov	QWORD PTR -24[rbp], rax
	mov	BYTE PTR -42[rbp], 0
	jmp	.L11
.L12:
	movzx	edx, BYTE PTR -42[rbp]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR -42[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -42[rbp]
	add	eax, 1
	mov	BYTE PTR -42[rbp], al
.L11:
	cmp	BYTE PTR -42[rbp], 7
	jbe	.L12
	mov	BYTE PTR -42[rbp], 0
	jmp	.L13
.L14:
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	edx, 1
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	rdx, QWORD PTR -40[rbp]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -40[rbp]
	lea	rbx, 1[rdx]
	mov	edx, 1
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	BYTE PTR [rbx], al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 3
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -40[rbp]
	lea	rbx, 2[rdx]
	mov	edx, 1
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	BYTE PTR [rbx], al
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 3
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -40[rbp]
	lea	rbx, 3[rdx]
	mov	edx, 1
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	BYTE PTR [rbx], al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	edx, 5
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	rdx, QWORD PTR -32[rbp]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rbx, 1[rdx]
	mov	edx, 5
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	BYTE PTR [rbx], al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 3
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rbx, 2[rdx]
	mov	edx, 5
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	BYTE PTR [rbx], al
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR [rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 3
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	rdx, QWORD PTR -32[rbp]
	lea	rbx, 3[rdx]
	mov	edx, 5
	mov	esi, ecx
	mov	edi, eax
	call	rotl8
	mov	BYTE PTR [rbx], al
	mov	rax, QWORD PTR -32[rbp]
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR [rax]
	and	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 1
	movzx	ecx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 1
	and	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 2
	movzx	ecx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 2
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 2
	and	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 3
	movzx	ecx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 3
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 3
	and	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 1
	movzx	ecx, BYTE PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 1
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 1
	xor	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 2
	movzx	ecx, BYTE PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 2
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 2
	xor	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 3
	movzx	ecx, BYTE PTR [rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 3
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 3
	xor	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 4
	movzx	eax, BYTE PTR [rax]
	xor	eax, edx
	not	eax
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 1
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 5
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 1
	not	edx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 2
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 6
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 2
	not	edx
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 3
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 7
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 3
	xor	edx, -2
	mov	BYTE PTR [rax], dl
	movzx	edx, BYTE PTR -68[rbp]
	movzx	eax, BYTE PTR -42[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, 1
	mov	BYTE PTR -41[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 3
	movzx	eax, BYTE PTR [rax]
	mov	rdx, QWORD PTR -40[rbp]
	add	rdx, 3
	xor	al, BYTE PTR -41[rbp]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 5[rax]
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR 1[rax]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 6[rax]
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR 2[rax]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 7[rax]
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR 3[rax]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -40[rbp]
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	BYTE PTR [rax], dl
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -40[rbp]
	movzx	eax, BYTE PTR 1[rax]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 2[rax]
	mov	rax, QWORD PTR -40[rbp]
	movzx	eax, BYTE PTR 2[rax]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 3[rax]
	mov	rax, QWORD PTR -40[rbp]
	movzx	eax, BYTE PTR 3[rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -42[rbp]
	add	eax, 1
	mov	BYTE PTR -42[rbp], al
.L13:
	cmp	BYTE PTR -42[rbp], 7
	jbe	.L14
	mov	BYTE PTR -42[rbp], 0
	jmp	.L15
.L16:
	movzx	edx, BYTE PTR -42[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR -42[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -42[rbp]
	add	eax, 1
	mov	BYTE PTR -42[rbp], al
.L15:
	cmp	BYTE PTR -42[rbp], 7
	jbe	.L16
	mov	rax, QWORD PTR -40[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	simeck64_box, .-simeck64_box
	.globl	ace_permutation
	.type	ace_permutation, @function
ace_permutation:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	mov	edi, 40
	call	malloc@PLT
	mov	QWORD PTR -32[rbp], rax
	mov	edi, 8
	call	malloc@PLT
	mov	QWORD PTR -24[rbp], rax
	mov	edi, 8
	call	malloc@PLT
	mov	QWORD PTR -16[rbp], rax
	mov	edi, 8
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	BYTE PTR -34[rbp], 0
	jmp	.L19
.L20:
	movzx	edx, BYTE PTR -34[rbp]
	mov	rax, QWORD PTR -56[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR -34[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -34[rbp]
	add	eax, 1
	mov	BYTE PTR -34[rbp], al
.L19:
	cmp	BYTE PTR -34[rbp], 39
	jbe	.L20
	mov	BYTE PTR -34[rbp], 0
	jmp	.L21
.L38:
	mov	BYTE PTR -33[rbp], 0
	jmp	.L22
.L23:
	movzx	edx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L22:
	cmp	BYTE PTR -33[rbp], 7
	jbe	.L23
	movzx	eax, BYTE PTR -34[rbp]
	cdqe
	lea	rdx, RC0[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	edx, al
	mov	rcx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	simeck64_box
	mov	BYTE PTR -33[rbp], 0
	jmp	.L24
.L25:
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 16
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rdx, QWORD PTR -16[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L24:
	cmp	BYTE PTR -33[rbp], 7
	jbe	.L25
	movzx	eax, BYTE PTR -34[rbp]
	cdqe
	lea	rdx, RC1[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	edx, al
	mov	rcx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	simeck64_box
	mov	BYTE PTR -33[rbp], 0
	jmp	.L26
.L27:
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 32
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L26:
	cmp	BYTE PTR -33[rbp], 7
	jbe	.L27
	movzx	eax, BYTE PTR -34[rbp]
	cdqe
	lea	rdx, RC2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	edx, al
	mov	rcx, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	simeck64_box
	mov	BYTE PTR -33[rbp], 0
	jmp	.L28
.L29:
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 24
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	not	edx
	mov	BYTE PTR [rax], dl
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L28:
	cmp	BYTE PTR -33[rbp], 6
	jbe	.L29
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 31
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 7
	movzx	eax, BYTE PTR [rax]
	mov	ecx, edx
	xor	ecx, eax
	movzx	eax, BYTE PTR -34[rbp]
	cdqe
	lea	rdx, SC1[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 7
	xor	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	BYTE PTR -33[rbp], 0
	jmp	.L30
.L31:
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 8
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 32
	movsx	rcx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	not	edx
	mov	BYTE PTR [rax], dl
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L30:
	cmp	BYTE PTR -33[rbp], 6
	jbe	.L31
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 15
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 7
	movzx	eax, BYTE PTR [rax]
	mov	ecx, edx
	xor	ecx, eax
	movzx	eax, BYTE PTR -34[rbp]
	cdqe
	lea	rdx, SC0[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 39
	xor	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	BYTE PTR -33[rbp], 0
	jmp	.L32
.L33:
	movzx	edx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	edx, BYTE PTR -33[rbp]
	add	edx, 8
	movsx	rcx, edx
	mov	rdx, QWORD PTR -32[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L32:
	cmp	BYTE PTR -33[rbp], 7
	jbe	.L33
	mov	BYTE PTR -33[rbp], 0
	jmp	.L34
.L35:
	movzx	edx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, BYTE PTR -33[rbp]
	add	edx, 16
	movsx	rcx, edx
	mov	rdx, QWORD PTR -32[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L34:
	cmp	BYTE PTR -33[rbp], 7
	jbe	.L35
	mov	BYTE PTR -33[rbp], 0
	jmp	.L36
.L37:
	movzx	edx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	movzx	ecx, BYTE PTR -33[rbp]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	xor	edx, eax
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 24
	movsx	rcx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rcx
	not	edx
	mov	BYTE PTR [rax], dl
	movzx	eax, BYTE PTR -33[rbp]
	add	eax, 1
	mov	BYTE PTR -33[rbp], al
.L36:
	cmp	BYTE PTR -33[rbp], 6
	jbe	.L37
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 7
	movzx	edx, BYTE PTR [rax]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 7
	movzx	eax, BYTE PTR [rax]
	mov	ecx, edx
	xor	ecx, eax
	movzx	eax, BYTE PTR -34[rbp]
	cdqe
	lea	rdx, SC2[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 31
	xor	edx, ecx
	mov	BYTE PTR [rax], dl
	movzx	eax, BYTE PTR -34[rbp]
	add	eax, 1
	mov	BYTE PTR -34[rbp], al
.L21:
	cmp	BYTE PTR -34[rbp], 15
	jbe	.L38
	mov	BYTE PTR -34[rbp], 0
	jmp	.L39
.L40:
	movzx	edx, BYTE PTR -34[rbp]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	ecx, BYTE PTR -34[rbp]
	mov	rdx, QWORD PTR -56[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	movzx	eax, BYTE PTR -34[rbp]
	add	eax, 1
	mov	BYTE PTR -34[rbp], al
.L39:
	cmp	BYTE PTR -34[rbp], 39
	jbe	.L40
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	ace_permutation, .-ace_permutation
	.globl	bench_speed
	.type	bench_speed, @function
bench_speed:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -48[rbp]
	mov	rdi, rax
	call	ace_permutation
	mov	eax, 40
	mov	rdx, QWORD PTR -8[rbp]
	sub	rdx, QWORD PTR fs:40
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	bench_speed, .-bench_speed
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"1004639.c"
	.text
	.section	.rodata
	.align	2
	.type	SC0, %object
	.size	SC0, 16
SC0:
	.ascii	"P\\\221\215S`h\341\366\235@O\276[\351\177"
	.align	2
	.type	SC1, %object
	.size	SC1, 16
SC1:
	.ascii	"(\256H\306\25104p{\316 '_\255t?"
	.align	2
	.type	SC2, %object
	.size	SC2, 16
SC2:
	.ascii	"\024W$cT\030\2328\275g\020\023/\326\272\037"
	.align	2
	.type	RC0, %object
	.size	RC0, 16
RC0:
	.ascii	"\007\012\233\340\321\032\"\367b\226q\252+\351\317\267"
	.align	2
	.type	RC1, %object
	.size	RC1, 16
RC1:
	.ascii	"S]I\177\276\035(l\202Gk\210\334\213Y\306"
	.align	2
	.type	RC2, %object
	.size	RC2, 16
RC2:
	.ascii	"C\344^\3142Nu%\375\371v\240\260\011\036\255"
	.text
	.align	2
	.global	rotl8
	.syntax unified
	.arm
	.fpu softvfp
	.type	rotl8, %function
rotl8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	mov	r3, r1
	strb	r3, [fp, #-6]
	mov	r3, r2
	strb	r3, [fp, #-7]
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	ldrb	r3, [fp, #-7]	@ zero_extendqisi2
	lsl	r3, r2, r3
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldrb	r1, [fp, #-6]	@ zero_extendqisi2
	ldrb	r3, [fp, #-7]	@ zero_extendqisi2
	rsb	r3, r3, #8
	asr	r3, r1, r3
	lsl	r3, r3, #24
	asr	r3, r3, #24
	orr	r3, r2, r3
	lsl	r3, r3, #24
	asr	r3, r3, #24
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	rotl8, .-rotl8
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%02X\000"
	.text
	.align	2
	.global	ace_print_state
	.syntax unified
	.arm
	.fpu softvfp
	.type	ace_print_state, %function
ace_print_state:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, #0
	strb	r3, [fp, #-5]
	b	.L4
.L5:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, .L6
	bl	printf
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-5]
.L4:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #39
	bls	.L5
	mov	r0, #10
	bl	putchar
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L7:
	.align	2
.L6:
	.word	.LC0
	.size	ace_print_state, .-ace_print_state
	.section	.rodata
	.align	2
.LC1:
	.ascii	"%.2x \000"
	.text
	.align	2
	.global	ace_print_data
	.syntax unified
	.arm
	.fpu softvfp
	.type	ace_print_data, %function
ace_print_data:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L9
.L10:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, .L12
	bl	printf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L9:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	bcc	.L10
	mov	r0, #10
	bl	putchar
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L13:
	.align	2
.L12:
	.word	.LC1
	.size	ace_print_data, .-ace_print_data
	.align	2
	.global	simeck64_box
	.syntax unified
	.arm
	.fpu softvfp
	.type	simeck64_box, %function
simeck64_box:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	mov	r3, r2
	strb	r3, [fp, #-37]
	mov	r0, #4
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-24]
	mov	r0, #4
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-20]
	mov	r0, #8
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-16]
	mov	r3, #0
	strb	r3, [fp, #-26]
	b	.L15
.L16:
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	ldr	r2, [fp, #-36]
	add	r2, r2, r3
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-26]
.L15:
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L16
	mov	r3, #0
	strb	r3, [fp, #-26]
	b	.L17
.L18:
	ldr	r3, [fp, #-16]
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, #1
	mov	r1, r3
	bl	rotl8
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-24]
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	add	r4, r3, #1
	mov	r2, #1
	bl	rotl8
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	add	r4, r3, #2
	mov	r2, #1
	bl	rotl8
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	add	r4, r3, #3
	mov	r2, #1
	bl	rotl8
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-16]
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, #5
	mov	r1, r3
	bl	rotl8
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-20]
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r4, r3, #1
	mov	r2, #5
	bl	rotl8
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r4, r3, #2
	mov	r2, #5
	bl	rotl8
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r4, r3, #3
	mov	r2, #5
	bl	rotl8
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-20]
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, [fp, #-20]
	strb	r2, [r3]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	and	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-20]
	add	r3, r3, #2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #2
	and	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-20]
	add	r3, r3, #3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #3
	and	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, [fp, #-24]
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #2
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #2
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	add	r3, r3, #2
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	add	r3, r3, #3
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r3, r3, #255
	mvn	r3, r3
	and	r2, r3, #255
	ldr	r3, [fp, #-24]
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #5
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	mvn	r2, r2
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #2
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #6
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldr	r3, [fp, #-24]
	add	r3, r3, #2
	mvn	r2, r2
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r3, #3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	add	r3, r3, #7
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r3, r3, #255
	ldr	r2, [fp, #-24]
	add	r2, r2, #3
	eor	r3, r3, #1
	mvn	r3, r3
	and	r3, r3, #255
	strb	r3, [r2]
	ldrb	r2, [fp, #-37]	@ zero_extendqisi2
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	asr	r3, r2, r3
	and	r3, r3, #255
	and	r3, r3, #1
	strb	r3, [fp, #-25]
	ldr	r3, [fp, #-24]
	add	r3, r3, #3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	add	r3, r3, #3
	ldrb	r2, [fp, #-25]
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	ldr	r2, [fp, #-16]
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #5
	ldr	r2, [fp, #-16]
	ldrb	r2, [r2, #1]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #6
	ldr	r2, [fp, #-16]
	ldrb	r2, [r2, #2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #7
	ldr	r2, [fp, #-16]
	ldrb	r2, [r2, #3]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-24]
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-16]
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldr	r2, [fp, #-24]
	ldrb	r2, [r2, #1]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	ldr	r2, [fp, #-24]
	ldrb	r2, [r2, #2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	ldr	r2, [fp, #-24]
	ldrb	r2, [r2, #3]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-26]
.L17:
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L18
	mov	r3, #0
	strb	r3, [fp, #-26]
	b	.L19
.L20:
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	ldr	r1, [fp, #-32]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-26]
.L19:
	ldrb	r3, [fp, #-26]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L20
	ldr	r0, [fp, #-24]
	bl	free
	ldr	r0, [fp, #-20]
	bl	free
	ldr	r0, [fp, #-16]
	bl	free
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	simeck64_box, .-simeck64_box
	.align	2
	.global	ace_permutation
	.syntax unified
	.arm
	.fpu softvfp
	.type	ace_permutation, %function
ace_permutation:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-32]
	mov	r0, #40
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-20]
	mov	r0, #8
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-16]
	mov	r0, #8
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-12]
	mov	r0, #8
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	mov	r3, #0
	strb	r3, [fp, #-22]
	b	.L23
.L24:
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, [fp, #-32]
	add	r2, r2, r3
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r1, [fp, #-20]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-22]
.L23:
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	cmp	r3, #39
	bls	.L24
	mov	r3, #0
	strb	r3, [fp, #-22]
	b	.L25
.L42:
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L26
.L27:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	add	r2, r2, r3
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L26:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L27
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, .L46
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	simeck64_box
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L28
.L29:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #16
	mov	r2, r3
	ldr	r3, [fp, #-20]
	add	r2, r3, r2
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r1, [fp, #-12]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L28:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L29
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, .L46+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-12]
	bl	simeck64_box
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L30
.L31:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #32
	mov	r2, r3
	ldr	r3, [fp, #-20]
	add	r2, r3, r2
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L30:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L31
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, .L46+8
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	simeck64_box
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L32
.L33:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #24
	mov	r2, r3
	ldr	r3, [fp, #-20]
	add	r3, r3, r2
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r1, [fp, #-20]
	add	r3, r1, r3
	mvn	r2, r2
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L32:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #6
	bls	.L33
	ldr	r3, [fp, #-20]
	add	r3, r3, #31
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r3, #7
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, .L46+12
	ldrb	r2, [r2, r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #7
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L34
.L35:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #8
	mov	r2, r3
	ldr	r3, [fp, #-20]
	add	r3, r3, r2
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r1, [fp, #-12]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #32
	mov	r1, r3
	ldr	r3, [fp, #-20]
	add	r3, r3, r1
	mvn	r2, r2
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L34:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #6
	bls	.L35
	ldr	r3, [fp, #-20]
	add	r3, r3, #15
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-12]
	add	r3, r3, #7
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, .L46+16
	ldrb	r2, [r2, r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #39
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L36
.L37:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r2, [fp, #-12]
	add	r2, r2, r3
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	add	r3, r3, r1
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L36:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L37
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L38
.L39:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #16
	mov	r1, r3
	ldr	r3, [fp, #-20]
	add	r3, r3, r1
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L38:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L39
	mov	r3, #0
	strb	r3, [fp, #-21]
	b	.L40
.L41:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r1, [fp, #-8]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r2, r3, #255
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #24
	mov	r1, r3
	ldr	r3, [fp, #-20]
	add	r3, r3, r1
	mvn	r2, r2
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-21]
.L40:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	cmp	r3, #6
	bls	.L41
	ldr	r3, [fp, #-16]
	add	r3, r3, #7
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-8]
	add	r3, r3, #7
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, r2
	and	r1, r3, #255
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, .L46+20
	ldrb	r2, [r2, r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r3, r3, #31
	eor	r2, r2, r1
	and	r2, r2, #255
	strb	r2, [r3]
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-22]
.L25:
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	cmp	r3, #15
	bls	.L42
	mov	r3, #0
	strb	r3, [fp, #-22]
	b	.L43
.L44:
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	add	r2, r2, r3
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r1, [fp, #-32]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-22]
.L43:
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	cmp	r3, #39
	bls	.L44
	ldr	r0, [fp, #-16]
	bl	free
	ldr	r0, [fp, #-12]
	bl	free
	ldr	r0, [fp, #-8]
	bl	free
	ldr	r0, [fp, #-20]
	bl	free
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L47:
	.align	2
.L46:
	.word	RC0
	.word	RC1
	.word	RC2
	.word	SC1
	.word	SC0
	.word	SC2
	.size	ace_permutation, .-ace_permutation
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	bench_speed
	.syntax unified
	.arm
	.fpu softvfp
	.type	bench_speed, %function
bench_speed:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	ldr	r3, .L51
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #48
	mov	r0, r3
	bl	ace_permutation
	mov	r3, #40
	ldr	r2, .L51
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L50
	bl	__stack_chk_fail
.L50:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L52:
	.align	2
.L51:
	.word	.LC2
	.size	bench_speed, .-bench_speed
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
