	.file	"897282.c"
	.intel_syntax noprefix
	.text
	.section	.rodata
.LC0:
	.string	"SATISFY"
.LC1:
	.string	"  C version"
	.align 8
.LC2:
	.string	"  We have a logical function of N logical arguments."
	.align 8
.LC3:
	.string	"  We do an exhaustive search of all 2^N possibilities,"
	.align 8
.LC4:
	.string	"  seeking those inputs that make the function TRUE."
	.align 8
.LC5:
	.string	"  The number of logical variables is N = %d\n"
	.align 8
.LC6:
	.string	"  The number of input vectors to check is %d\n"
	.align 8
.LC7:
	.string	"   #       Index    ---------Input Values------------------------"
.LC8:
	.string	"  %2d  %10d:  "
.LC9:
	.string	" %d"
	.align 8
.LC10:
	.string	"  Number of solutions found was %d\n"
.LC11:
	.string	"  Normal end of execution."
	.text
	.globl	main
	.type	main, @function
main:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 160
	mov	DWORD PTR -148[rbp], edi
	mov	QWORD PTR -160[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -120[rbp], 23
	mov	edi, 10
	call	putchar@PLT
	mov	eax, 0
	call	timestamp
	mov	edi, 10
	call	putchar@PLT
	lea	rdi, .LC0[rip]
	call	puts@PLT
	lea	rdi, .LC1[rip]
	call	puts@PLT
	lea	rdi, .LC2[rip]
	call	puts@PLT
	lea	rdi, .LC3[rip]
	call	puts@PLT
	lea	rdi, .LC4[rip]
	call	puts@PLT
	mov	DWORD PTR -132[rbp], 1
	mov	DWORD PTR -136[rbp], 1
	jmp	.L2
.L3:
	sal	DWORD PTR -132[rbp]
	add	DWORD PTR -136[rbp], 1
.L2:
	mov	eax, DWORD PTR -136[rbp]
	cmp	eax, DWORD PTR -120[rbp]
	jle	.L3
	mov	eax, DWORD PTR -120[rbp]
	mov	esi, eax
	lea	rdi, .LC5[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -132[rbp]
	mov	esi, eax
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	printf@PLT
	mov	edi, 10
	call	putchar@PLT
	lea	rdi, .LC7[rip]
	call	puts@PLT
	mov	edi, 10
	call	putchar@PLT
	mov	DWORD PTR -124[rbp], 0
	mov	DWORD PTR -136[rbp], 0
	jmp	.L4
.L8:
	lea	rdx, -112[rbp]
	mov	ecx, DWORD PTR -120[rbp]
	mov	eax, DWORD PTR -136[rbp]
	mov	esi, ecx
	mov	edi, eax
	call	i4_to_bvec
	lea	rdx, -112[rbp]
	mov	eax, DWORD PTR -120[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	circuit_value
	mov	DWORD PTR -116[rbp], eax
	cmp	DWORD PTR -116[rbp], 1
	jne	.L5
	add	DWORD PTR -124[rbp], 1
	mov	edx, DWORD PTR -136[rbp]
	mov	eax, DWORD PTR -124[rbp]
	mov	esi, eax
	lea	rdi, .LC8[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -128[rbp], 0
	jmp	.L6
.L7:
	mov	eax, DWORD PTR -128[rbp]
	cdqe
	mov	eax, DWORD PTR -112[rbp+rax*4]
	mov	esi, eax
	lea	rdi, .LC9[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -128[rbp], 1
.L6:
	mov	eax, DWORD PTR -128[rbp]
	cmp	eax, DWORD PTR -120[rbp]
	jl	.L7
	mov	edi, 10
	call	putchar@PLT
.L5:
	add	DWORD PTR -136[rbp], 1
.L4:
	mov	eax, DWORD PTR -136[rbp]
	cmp	eax, DWORD PTR -132[rbp]
	jl	.L8
	mov	edi, 10
	call	putchar@PLT
	mov	eax, DWORD PTR -124[rbp]
	mov	esi, eax
	lea	rdi, .LC10[rip]
	mov	eax, 0
	call	printf@PLT
	mov	edi, 10
	call	putchar@PLT
	lea	rdi, .LC0[rip]
	call	puts@PLT
	lea	rdi, .LC11[rip]
	call	puts@PLT
	mov	edi, 10
	call	putchar@PLT
	mov	eax, 0
	call	timestamp
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	main, .-main
	.globl	circuit_value
	.type	circuit_value, @function
circuit_value:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L12
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 4
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L12:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 4
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L14
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L14:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L15
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L15:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 12
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L16
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 16
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L16:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 16
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L17
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 20
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L17:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 20
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L18
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 24
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L18:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 20
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L19
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 24
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L19:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 24
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L20
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 60
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L20:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 28
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L21
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 32
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L21:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 28
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L22
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 52
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L22:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 32
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L23
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 36
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L23:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 32
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L24
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 36
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L24:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 36
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L25
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 40
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L25:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 36
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L26
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 44
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L26:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 40
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L27
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 44
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L27:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 48
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L28
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 52
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L28:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 52
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L29
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 56
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L29:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 56
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L30
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 60
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L30:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 56
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L31
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 64
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L31:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 68
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L32
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 4
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L32:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 72
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L33
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L33:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 76
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L34
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 4
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L34:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 76
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L35
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 72
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L35:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 76
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L36
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 36
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L36:
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L37
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 68
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L37:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 4
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L38
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 80
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L38:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 84
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L39
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 80
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L39:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 88
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L40
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 80
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L13
.L40:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 84
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	je	.L41
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 80
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L41:
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 88
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L42
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 80
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	jne	.L13
.L42:
	mov	eax, 1
	jmp	.L43
.L13:
	mov	eax, 0
.L43:
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	circuit_value, .-circuit_value
	.globl	i4_to_bvec
	.type	i4_to_bvec, @function
i4_to_bvec:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	QWORD PTR -32[rbp], rdx
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, 1
	mov	DWORD PTR -4[rbp], eax
	jmp	.L46
.L47:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -32[rbp]
	add	rdx, rax
	mov	eax, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	ecx, 31
	shr	ecx, 31
	add	eax, ecx
	and	eax, 1
	sub	eax, ecx
	mov	DWORD PTR [rdx], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR -20[rbp], eax
	sub	DWORD PTR -4[rbp], 1
.L46:
	cmp	DWORD PTR -4[rbp], 0
	jns	.L47
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	i4_to_bvec, .-i4_to_bvec
	.section	.rodata
.LC12:
	.string	"%d %B %Y %I:%M:%S %p"
	.text
	.globl	timestamp
	.type	timestamp, @function
timestamp:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	edi, 0
	call	time@PLT
	mov	QWORD PTR -32[rbp], rax
	lea	rax, -32[rbp]
	mov	rdi, rax
	call	localtime@PLT
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	lea	rdx, .LC12[rip]
	mov	esi, 40
	lea	rdi, time_buffer.0[rip]
	call	strftime@PLT
	mov	QWORD PTR -16[rbp], rax
	lea	rdi, time_buffer.0[rip]
	call	puts@PLT
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	timestamp, .-timestamp
	.local	time_buffer.0
	.comm	time_buffer.0,40,32
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"897282.c"
	.text
	.section	.rodata
	.align	2
.LC0:
	.ascii	"SATISFY\000"
	.align	2
.LC1:
	.ascii	"  C version\000"
	.align	2
.LC2:
	.ascii	"  We have a logical function of N logical arguments"
	.ascii	".\000"
	.align	2
.LC3:
	.ascii	"  We do an exhaustive search of all 2^N possibiliti"
	.ascii	"es,\000"
	.align	2
.LC4:
	.ascii	"  seeking those inputs that make the function TRUE."
	.ascii	"\000"
	.align	2
.LC5:
	.ascii	"  The number of logical variables is N = %d\012\000"
	.align	2
.LC6:
	.ascii	"  The number of input vectors to check is %d\012\000"
	.align	2
.LC7:
	.ascii	"   #       Index    ---------Input Values----------"
	.ascii	"--------------\000"
	.align	2
.LC8:
	.ascii	"  %2d  %10d:  \000"
	.align	2
.LC9:
	.ascii	" %d\000"
	.align	2
.LC10:
	.ascii	"  Number of solutions found was %d\012\000"
	.align	2
.LC11:
	.ascii	"  Normal end of execution.\000"
	.align	2
.LC12:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 128
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #128
	str	r0, [fp, #-128]
	str	r1, [fp, #-132]
	ldr	r3, .L11
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #23
	str	r3, [fp, #-108]
	mov	r0, #10
	bl	putchar
	bl	timestamp
	mov	r0, #10
	bl	putchar
	ldr	r0, .L11+4
	bl	puts
	ldr	r0, .L11+8
	bl	puts
	ldr	r0, .L11+12
	bl	puts
	ldr	r0, .L11+16
	bl	puts
	ldr	r0, .L11+20
	bl	puts
	mov	r3, #1
	str	r3, [fp, #-120]
	mov	r3, #1
	str	r3, [fp, #-124]
	b	.L2
.L3:
	ldr	r3, [fp, #-120]
	lsl	r3, r3, #1
	str	r3, [fp, #-120]
	ldr	r3, [fp, #-124]
	add	r3, r3, #1
	str	r3, [fp, #-124]
.L2:
	ldr	r2, [fp, #-124]
	ldr	r3, [fp, #-108]
	cmp	r2, r3
	ble	.L3
	ldr	r1, [fp, #-108]
	ldr	r0, .L11+24
	bl	printf
	ldr	r1, [fp, #-120]
	ldr	r0, .L11+28
	bl	printf
	mov	r0, #10
	bl	putchar
	ldr	r0, .L11+32
	bl	puts
	mov	r0, #10
	bl	putchar
	mov	r3, #0
	str	r3, [fp, #-112]
	mov	r3, #0
	str	r3, [fp, #-124]
	b	.L4
.L8:
	sub	r3, fp, #100
	mov	r2, r3
	ldr	r1, [fp, #-108]
	ldr	r0, [fp, #-124]
	bl	i4_to_bvec
	sub	r3, fp, #100
	mov	r1, r3
	ldr	r0, [fp, #-108]
	bl	circuit_value
	str	r0, [fp, #-104]
	ldr	r3, [fp, #-104]
	cmp	r3, #1
	bne	.L5
	ldr	r3, [fp, #-112]
	add	r3, r3, #1
	str	r3, [fp, #-112]
	ldr	r2, [fp, #-124]
	ldr	r1, [fp, #-112]
	ldr	r0, .L11+36
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-116]
	b	.L6
.L7:
	ldr	r3, [fp, #-116]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r3, [r3, #-96]
	mov	r1, r3
	ldr	r0, .L11+40
	bl	printf
	ldr	r3, [fp, #-116]
	add	r3, r3, #1
	str	r3, [fp, #-116]
.L6:
	ldr	r2, [fp, #-116]
	ldr	r3, [fp, #-108]
	cmp	r2, r3
	blt	.L7
	mov	r0, #10
	bl	putchar
.L5:
	ldr	r3, [fp, #-124]
	add	r3, r3, #1
	str	r3, [fp, #-124]
.L4:
	ldr	r2, [fp, #-124]
	ldr	r3, [fp, #-120]
	cmp	r2, r3
	blt	.L8
	mov	r0, #10
	bl	putchar
	ldr	r1, [fp, #-112]
	ldr	r0, .L11+44
	bl	printf
	mov	r0, #10
	bl	putchar
	ldr	r0, .L11+4
	bl	puts
	ldr	r0, .L11+48
	bl	puts
	mov	r0, #10
	bl	putchar
	bl	timestamp
	mov	r3, #0
	ldr	r2, .L11
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L10
	bl	__stack_chk_fail
.L10:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L12:
	.align	2
.L11:
	.word	.LC12
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.size	main, .-main
	.align	2
	.global	circuit_value
	.syntax unified
	.arm
	.fpu softvfp
	.type	circuit_value, %function
circuit_value:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L14
	ldr	r3, [fp, #-20]
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L14:
	ldr	r3, [fp, #-20]
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L16
	ldr	r3, [fp, #-20]
	add	r3, r3, #12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L16:
	ldr	r3, [fp, #-20]
	add	r3, r3, #8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L17
	ldr	r3, [fp, #-20]
	add	r3, r3, #12
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L17:
	ldr	r3, [fp, #-20]
	add	r3, r3, #12
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L18
	ldr	r3, [fp, #-20]
	add	r3, r3, #16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L18:
	ldr	r3, [fp, #-20]
	add	r3, r3, #16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L19
	ldr	r3, [fp, #-20]
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L19:
	ldr	r3, [fp, #-20]
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L20
	ldr	r3, [fp, #-20]
	add	r3, r3, #24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L20:
	ldr	r3, [fp, #-20]
	add	r3, r3, #20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L21
	ldr	r3, [fp, #-20]
	add	r3, r3, #24
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L21:
	ldr	r3, [fp, #-20]
	add	r3, r3, #24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L22
	ldr	r3, [fp, #-20]
	add	r3, r3, #60
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L22:
	ldr	r3, [fp, #-20]
	add	r3, r3, #28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L23
	ldr	r3, [fp, #-20]
	add	r3, r3, #32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L23:
	ldr	r3, [fp, #-20]
	add	r3, r3, #28
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L24
	ldr	r3, [fp, #-20]
	add	r3, r3, #52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L24:
	ldr	r3, [fp, #-20]
	add	r3, r3, #32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L25
	ldr	r3, [fp, #-20]
	add	r3, r3, #36
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L25:
	ldr	r3, [fp, #-20]
	add	r3, r3, #32
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L26
	ldr	r3, [fp, #-20]
	add	r3, r3, #36
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L26:
	ldr	r3, [fp, #-20]
	add	r3, r3, #36
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L27
	ldr	r3, [fp, #-20]
	add	r3, r3, #40
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L27:
	ldr	r3, [fp, #-20]
	add	r3, r3, #36
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L28
	ldr	r3, [fp, #-20]
	add	r3, r3, #44
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L28:
	ldr	r3, [fp, #-20]
	add	r3, r3, #40
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L29
	ldr	r3, [fp, #-20]
	add	r3, r3, #44
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L29:
	ldr	r3, [fp, #-20]
	add	r3, r3, #48
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L30
	ldr	r3, [fp, #-20]
	add	r3, r3, #52
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L30:
	ldr	r3, [fp, #-20]
	add	r3, r3, #52
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L31
	ldr	r3, [fp, #-20]
	add	r3, r3, #56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L31:
	ldr	r3, [fp, #-20]
	add	r3, r3, #56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L32
	ldr	r3, [fp, #-20]
	add	r3, r3, #60
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L32:
	ldr	r3, [fp, #-20]
	add	r3, r3, #56
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L33
	ldr	r3, [fp, #-20]
	add	r3, r3, #64
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L33:
	ldr	r3, [fp, #-20]
	add	r3, r3, #68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L34
	ldr	r3, [fp, #-20]
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L34:
	ldr	r3, [fp, #-20]
	add	r3, r3, #72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L35
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L35:
	ldr	r3, [fp, #-20]
	add	r3, r3, #76
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L36
	ldr	r3, [fp, #-20]
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L36:
	ldr	r3, [fp, #-20]
	add	r3, r3, #76
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L37
	ldr	r3, [fp, #-20]
	add	r3, r3, #72
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L37:
	ldr	r3, [fp, #-20]
	add	r3, r3, #76
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L38
	ldr	r3, [fp, #-20]
	add	r3, r3, #36
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L38:
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L39
	ldr	r3, [fp, #-20]
	add	r3, r3, #68
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L39:
	ldr	r3, [fp, #-20]
	add	r3, r3, #4
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L40
	ldr	r3, [fp, #-20]
	add	r3, r3, #80
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L40:
	ldr	r3, [fp, #-20]
	add	r3, r3, #84
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L41
	ldr	r3, [fp, #-20]
	add	r3, r3, #80
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L41:
	ldr	r3, [fp, #-20]
	add	r3, r3, #88
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L42
	ldr	r3, [fp, #-20]
	add	r3, r3, #80
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L15
.L42:
	ldr	r3, [fp, #-20]
	add	r3, r3, #84
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L43
	ldr	r3, [fp, #-20]
	add	r3, r3, #80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L43:
	ldr	r3, [fp, #-20]
	add	r3, r3, #88
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L44
	ldr	r3, [fp, #-20]
	add	r3, r3, #80
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L15
.L44:
	mov	r3, #1
	b	.L45
.L15:
	mov	r3, #0
.L45:
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	circuit_value, .-circuit_value
	.align	2
	.global	i4_to_bvec
	.syntax unified
	.arm
	.fpu softvfp
	.type	i4_to_bvec, %function
i4_to_bvec:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
	b	.L48
.L49:
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-24]
	add	r2, r2, r3
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	and	r3, r3, #1
	rsblt	r3, r3, #0
	str	r3, [r2]
	ldr	r3, [fp, #-16]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
.L48:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bge	.L49
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	i4_to_bvec, .-i4_to_bvec
	.section	.rodata
	.align	2
.LC13:
	.ascii	"%d %B %Y %I:%M:%S %p\000"
	.align	2
.LC14:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	timestamp
	.syntax unified
	.arm
	.fpu softvfp
	.type	timestamp, %function
timestamp:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L52
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r0, #0
	bl	time
	mov	r3, r0
	str	r3, [fp, #-20]
	sub	r3, fp, #20
	mov	r0, r3
	bl	localtime
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L52+4
	mov	r1, #40
	ldr	r0, .L52+8
	bl	strftime
	str	r0, [fp, #-12]
	ldr	r0, .L52+8
	bl	puts
	nop
	ldr	r3, .L52
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L51
	bl	__stack_chk_fail
.L51:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L53:
	.align	2
.L52:
	.word	.LC14
	.word	.LC13
	.word	time_buffer.5479
	.size	timestamp, .-timestamp
	.local	time_buffer.5479
	.comm	time_buffer.5479,40,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
