	.file	"223750.c"
	.intel_syntax noprefix
	.text
	.globl	skywt
	.type	skywt, @function
skywt:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	skywt, .-skywt
	.globl	skyinit
	.type	skyinit, @function
skyinit:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	skyinit, .-skyinit
	.globl	skygo
	.type	skygo, @function
skygo:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	skygo, .-skygo
	.globl	skyend
	.type	skyend, @function
skyend:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	skyend, .-skyend
	.globl	skyrel
	.type	skyrel, @function
skyrel:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	skyrel, .-skyrel
	.globl	vvvrmult
	.type	vvvrmult, @function
vvvrmult:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	QWORD PTR -48[rbp], rdi
	mov	DWORD PTR -52[rbp], esi
	mov	QWORD PTR -64[rbp], rdx
	mov	DWORD PTR -56[rbp], ecx
	mov	QWORD PTR -72[rbp], r8
	mov	DWORD PTR -76[rbp], r9d
	mov	r15d, DWORD PTR -52[rbp]
	mov	eax, DWORD PTR -56[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -76[rbp]
	mov	ecx, eax
	mov	rbx, QWORD PTR -48[rbp]
	mov	r12, QWORD PTR -64[rbp]
	mov	r13, QWORD PTR -72[rbp]
	mov	r14d, DWORD PTR 16[rbp]
	jmp	.L7
.L8:
	movss	xmm1, DWORD PTR [rbx]
	movss	xmm0, DWORD PTR [r12]
	mulss	xmm0, xmm1
	movss	DWORD PTR 0[r13], xmm0
	movsx	rax, r15d
	sal	rax, 2
	add	rbx, rax
	mov	eax, edx
	cdqe
	sal	rax, 2
	add	r12, rax
	mov	eax, ecx
	cdqe
	sal	rax, 2
	add	r13, rax
.L7:
	mov	eax, r14d
	lea	r14d, -1[rax]
	test	eax, eax
	jne	.L8
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	vvvrmult, .-vvvrmult
	.globl	datafill
	.type	datafill, @function
datafill:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	movss	DWORD PTR -32[rbp], xmm0
	mov	r12, QWORD PTR -24[rbp]
	movss	xmm1, DWORD PTR -32[rbp]
	movaps	xmm3, xmm1
	mov	ebx, DWORD PTR -28[rbp]
	jmp	.L10
.L11:
	mov	rax, r12
	lea	r12, 4[rax]
	movaps	xmm2, xmm3
	movss	DWORD PTR [rax], xmm2
.L10:
	mov	eax, ebx
	lea	ebx, -1[rax]
	test	eax, eax
	jne	.L11
	nop
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	datafill, .-datafill
	.globl	skymax
	.type	skymax, @function
skymax:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -56[rbp], rdx
	mov	DWORD PTR -60[rbp], ecx
	mov	rbx, QWORD PTR -40[rbp]
	mov	r12, QWORD PTR -48[rbp]
	mov	r13, QWORD PTR -56[rbp]
	mov	r14d, DWORD PTR -60[rbp]
	jmp	.L13
.L17:
	movss	xmm0, DWORD PTR [rbx]
	movss	xmm1, DWORD PTR [r12]
	comiss	xmm0, xmm1
	jb	.L19
	movss	xmm0, DWORD PTR [rbx]
	movss	DWORD PTR 0[r13], xmm0
	jmp	.L16
.L19:
	movss	xmm0, DWORD PTR [r12]
	movss	DWORD PTR 0[r13], xmm0
.L16:
	add	rbx, 4
	add	r12, 4
	add	r13, 4
.L13:
	mov	eax, r14d
	lea	r14d, -1[rax]
	test	eax, eax
	jne	.L17
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	skymax, .-skymax
	.globl	skyadd
	.type	skyadd, @function
skyadd:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -56[rbp], rdx
	mov	DWORD PTR -60[rbp], ecx
	mov	rbx, QWORD PTR -40[rbp]
	mov	r12, QWORD PTR -48[rbp]
	mov	r13, QWORD PTR -56[rbp]
	mov	r14d, DWORD PTR -60[rbp]
	jmp	.L21
.L22:
	movss	xmm1, DWORD PTR [rbx]
	movss	xmm0, DWORD PTR [r12]
	addss	xmm0, xmm1
	movss	DWORD PTR 0[r13], xmm0
	add	rbx, 4
	add	r12, 4
	add	r13, 4
.L21:
	mov	eax, r14d
	lea	r14d, -1[rax]
	test	eax, eax
	jne	.L22
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	skyadd, .-skyadd
	.globl	vrsum
	.type	vrsum, @function
vrsum:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	QWORD PTR -32[rbp], rdi
	mov	DWORD PTR -36[rbp], esi
	mov	QWORD PTR -48[rbp], rdx
	mov	DWORD PTR -40[rbp], ecx
	mov	rbx, QWORD PTR -32[rbp]
	mov	r13d, DWORD PTR -36[rbp]
	pxor	xmm1, xmm1
	movaps	xmm4, xmm1
	mov	r12d, DWORD PTR -40[rbp]
	jmp	.L24
.L25:
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm4
	addss	xmm0, xmm2
	movaps	xmm4, xmm0
	movsx	rax, r13d
	sal	rax, 2
	add	rbx, rax
.L24:
	mov	eax, r12d
	lea	r12d, -1[rax]
	test	eax, eax
	jne	.L25
	mov	rax, QWORD PTR -48[rbp]
	movaps	xmm3, xmm4
	movss	DWORD PTR [rax], xmm3
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	vrsum, .-vrsum
	.globl	vssubr
	.type	vssubr, @function
vssubr:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	QWORD PTR -32[rbp], rdi
	movss	DWORD PTR -36[rbp], xmm0
	mov	QWORD PTR -48[rbp], rsi
	mov	DWORD PTR -40[rbp], edx
	mov	r12, QWORD PTR -32[rbp]
	mov	r13, QWORD PTR -48[rbp]
	movss	xmm1, DWORD PTR -36[rbp]
	movaps	xmm3, xmm1
	mov	ebx, DWORD PTR -40[rbp]
	jmp	.L27
.L28:
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm0, DWORD PTR [rax]
	mov	rax, r13
	lea	r13, 4[rax]
	movaps	xmm2, xmm3
	subss	xmm0, xmm2
	movss	DWORD PTR [rax], xmm0
.L27:
	mov	eax, ebx
	lea	ebx, -1[rax]
	test	eax, eax
	jne	.L28
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	vssubr, .-vssubr
	.globl	vvrramp
	.type	vvrramp, @function
vvrramp:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	QWORD PTR -48[rbp], rdi
	mov	DWORD PTR -52[rbp], esi
	mov	QWORD PTR -64[rbp], rdx
	mov	DWORD PTR -56[rbp], ecx
	movss	DWORD PTR -68[rbp], xmm0
	movss	DWORD PTR -72[rbp], xmm1
	mov	DWORD PTR -76[rbp], r8d
	mov	rbx, QWORD PTR -48[rbp]
	mov	r14d, DWORD PTR -52[rbp]
	mov	r12, QWORD PTR -64[rbp]
	mov	r15d, DWORD PTR -56[rbp]
	movss	xmm3, DWORD PTR -68[rbp]
	movaps	xmm6, xmm3
	movss	xmm4, DWORD PTR -72[rbp]
	movaps	xmm7, xmm4
	mov	r13d, DWORD PTR -76[rbp]
	jmp	.L30
.L31:
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm6
	addss	xmm0, xmm2
	movss	DWORD PTR [r12], xmm0
	movsx	rax, r15d
	sal	rax, 2
	add	r12, rax
	movsx	rax, r14d
	sal	rax, 2
	add	rbx, rax
	movaps	xmm5, xmm7
	addss	xmm2, xmm5
	movaps	xmm6, xmm2
.L30:
	mov	eax, r13d
	lea	r13d, -1[rax]
	test	eax, eax
	jne	.L31
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	vvrramp, .-vvrramp
	.globl	vvvcmult
	.type	vvvcmult, @function
vvvcmult:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	mov	QWORD PTR -40[rbp], rdi
	mov	DWORD PTR -44[rbp], esi
	mov	QWORD PTR -56[rbp], rdx
	mov	DWORD PTR -48[rbp], ecx
	mov	QWORD PTR -64[rbp], r8
	mov	DWORD PTR -68[rbp], r9d
	mov	rbx, QWORD PTR -40[rbp]
	mov	r12, QWORD PTR -56[rbp]
	mov	r13, QWORD PTR -64[rbp]
	mov	r14d, 0
	jmp	.L33
.L34:
	movss	xmm1, DWORD PTR [rbx]
	movss	xmm0, DWORD PTR [r12]
	mulss	xmm0, xmm1
	movss	xmm2, DWORD PTR 4[rbx]
	movss	xmm1, DWORD PTR 4[r12]
	mulss	xmm1, xmm2
	movaps	xmm3, xmm0
	subss	xmm3, xmm1
	movss	xmm1, DWORD PTR 4[rbx]
	movss	xmm0, DWORD PTR [r12]
	mulss	xmm1, xmm0
	movss	xmm2, DWORD PTR [rbx]
	movss	xmm0, DWORD PTR 4[r12]
	mulss	xmm0, xmm2
	addss	xmm0, xmm1
	movss	DWORD PTR 4[r13], xmm0
	movss	DWORD PTR 0[r13], xmm3
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	sal	rax, 3
	add	rbx, rax
	mov	eax, DWORD PTR -48[rbp]
	cdqe
	sal	rax, 3
	add	r12, rax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	sal	rax, 3
	add	r13, rax
	add	r14d, 1
.L33:
	cmp	r14d, DWORD PTR 16[rbp]
	jl	.L34
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	vvvcmult, .-vvvcmult
	.globl	vvvhcmult
	.type	vvvhcmult, @function
vvvhcmult:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r14
	push	r13
	push	r12
	push	rbx
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	mov	QWORD PTR -40[rbp], rdi
	mov	DWORD PTR -44[rbp], esi
	mov	QWORD PTR -56[rbp], rdx
	mov	DWORD PTR -48[rbp], ecx
	mov	QWORD PTR -64[rbp], r8
	mov	DWORD PTR -68[rbp], r9d
	mov	rbx, QWORD PTR -40[rbp]
	mov	r12, QWORD PTR -56[rbp]
	mov	r13, QWORD PTR -64[rbp]
	mov	r14d, 0
	jmp	.L36
.L37:
	movss	xmm1, DWORD PTR [r12]
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm0
	mulss	xmm2, xmm1
	movss	xmm0, DWORD PTR 8[rbx]
	movaps	xmm5, xmm0
	mulss	xmm5, xmm1
	movss	xmm0, DWORD PTR 4[rbx]
	movaps	xmm7, xmm0
	mulss	xmm7, xmm1
	movss	xmm0, DWORD PTR 12[rbx]
	mulss	xmm0, xmm1
	movaps	xmm1, xmm0
	movss	xmm3, DWORD PTR 8[r12]
	movss	xmm0, DWORD PTR 8[rbx]
	mulss	xmm0, xmm3
	subss	xmm2, xmm0
	movss	xmm0, DWORD PTR [rbx]
	mulss	xmm0, xmm3
	movaps	xmm4, xmm0
	addss	xmm4, xmm5
	movss	xmm0, DWORD PTR 12[rbx]
	mulss	xmm0, xmm3
	subss	xmm7, xmm0
	movss	xmm0, DWORD PTR 4[rbx]
	mulss	xmm0, xmm3
	movaps	xmm3, xmm0
	addss	xmm3, xmm1
	movss	xmm5, DWORD PTR 4[r12]
	movss	xmm0, DWORD PTR 4[rbx]
	mulss	xmm0, xmm5
	subss	xmm2, xmm0
	movss	xmm0, DWORD PTR 12[rbx]
	mulss	xmm0, xmm5
	subss	xmm4, xmm0
	movss	xmm0, DWORD PTR [rbx]
	mulss	xmm0, xmm5
	addss	xmm0, xmm7
	movaps	xmm7, xmm0
	movss	xmm0, DWORD PTR 8[rbx]
	mulss	xmm0, xmm5
	movaps	xmm1, xmm0
	addss	xmm1, xmm3
	movss	xmm6, DWORD PTR 12[r12]
	movss	xmm0, DWORD PTR 12[rbx]
	mulss	xmm0, xmm6
	addss	xmm0, xmm2
	movaps	xmm2, xmm0
	movss	xmm0, DWORD PTR 4[rbx]
	mulss	xmm0, xmm6
	subss	xmm4, xmm0
	movss	xmm0, DWORD PTR 8[rbx]
	mulss	xmm0, xmm6
	subss	xmm7, xmm0
	movss	xmm0, DWORD PTR [rbx]
	mulss	xmm0, xmm6
	movaps	xmm6, xmm0
	addss	xmm6, xmm1
	movss	DWORD PTR 0[r13], xmm2
	movss	DWORD PTR 4[r13], xmm7
	movss	DWORD PTR 8[r13], xmm4
	movss	DWORD PTR 12[r13], xmm6
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	sal	rax, 4
	add	rbx, rax
	mov	eax, DWORD PTR -48[rbp]
	cdqe
	sal	rax, 4
	add	r12, rax
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	sal	rax, 4
	add	r13, rax
	add	r14d, 1
.L36:
	cmp	r14d, DWORD PTR 16[rbp]
	jl	.L37
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	vvvhcmult, .-vvvhcmult
	.globl	scfix1
	.type	scfix1, @function
scfix1:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	QWORD PTR -32[rbp], rdi
	mov	DWORD PTR -36[rbp], esi
	movss	DWORD PTR -40[rbp], xmm0
	mov	QWORD PTR -48[rbp], rdx
	mov	DWORD PTR -52[rbp], ecx
	mov	DWORD PTR -56[rbp], r8d
	mov	r12, QWORD PTR -32[rbp]
	mov	rbx, QWORD PTR -48[rbp]
	mov	r13d, 0
	jmp	.L39
.L49:
	movss	xmm0, DWORD PTR [r12]
	mulss	xmm0, DWORD PTR -40[rbp]
	movaps	xmm2, xmm0
	movaps	xmm3, xmm2
	pxor	xmm0, xmm0
	comiss	xmm2, xmm0
	jb	.L53
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, xmm2
	comisd	xmm0, QWORD PTR .LC1[rip]
	jbe	.L54
	mov	eax, 32767
	jmp	.L44
.L54:
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm3
	movsd	xmm0, QWORD PTR .LC2[rip]
	addsd	xmm0, xmm1
	cvttsd2si	eax, xmm0
.L44:
	mov	WORD PTR [rbx], ax
	jmp	.L45
.L53:
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm3
	movsd	xmm0, QWORD PTR .LC3[rip]
	comisd	xmm0, xmm1
	jbe	.L55
	mov	eax, -32767
	jmp	.L48
.L55:
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, xmm3
	movsd	xmm1, QWORD PTR .LC2[rip]
	subsd	xmm0, xmm1
	cvttsd2si	eax, xmm0
.L48:
	mov	WORD PTR [rbx], ax
.L45:
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	sal	rax, 2
	add	r12, rax
	mov	eax, DWORD PTR -52[rbp]
	cdqe
	add	rax, rax
	add	rbx, rax
	add	r13d, 1
.L39:
	cmp	r13d, DWORD PTR -56[rbp]
	jl	.L49
	nop
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	scfix1, .-scfix1
	.globl	scabs
	.type	scabs, @function
scabs:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	sub	rsp, 56
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	QWORD PTR -40[rbp], rdi
	mov	DWORD PTR -44[rbp], esi
	movss	DWORD PTR -48[rbp], xmm0
	mov	QWORD PTR -56[rbp], rdx
	mov	DWORD PTR -60[rbp], ecx
	mov	DWORD PTR -64[rbp], r8d
	mov	DWORD PTR -68[rbp], r9d
	mov	rbx, QWORD PTR -40[rbp]
	mov	r12, QWORD PTR -56[rbp]
	mov	r13d, 0
	jmp	.L57
.L61:
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm0
	mulss	xmm2, DWORD PTR -48[rbp]
	lea	rax, 4[rbx]
	movss	xmm0, DWORD PTR [rax]
	movaps	xmm3, xmm0
	mulss	xmm3, DWORD PTR -48[rbp]
	movaps	xmm1, xmm2
	mulss	xmm1, xmm2
	movaps	xmm0, xmm3
	mulss	xmm0, xmm3
	addss	xmm0, xmm1
	pxor	xmm5, xmm5
	cvtss2sd	xmm5, xmm0
	movq	rax, xmm5
	movq	xmm0, rax
	call	sqrt@PLT
	pxor	xmm4, xmm4
	cvtsd2ss	xmm4, xmm0
	movaps	xmm6, xmm4
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, xmm4
	comisd	xmm0, QWORD PTR .LC1[rip]
	jbe	.L63
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	mov	eax, edx
	sal	eax, 15
	sub	eax, edx
	jmp	.L60
.L63:
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm6
	movsd	xmm0, QWORD PTR .LC2[rip]
	addsd	xmm0, xmm1
	cvttsd2si	eax, xmm0
	mov	edx, eax
	mov	eax, DWORD PTR -68[rbp]
	imul	eax, edx
.L60:
	mov	WORD PTR [r12], ax
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	sal	rax, 2
	add	rbx, rax
	mov	eax, DWORD PTR -60[rbp]
	cdqe
	add	rax, rax
	add	r12, rax
	add	r13d, 1
.L57:
	cmp	r13d, DWORD PTR -64[rbp]
	jl	.L61
	nop
	nop
	add	rsp, 56
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	scabs, .-scabs
	.globl	preproc
	.type	preproc, @function
preproc:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -32[rbp], edx
	movss	xmm2, DWORD PTR .LC4[rip]
	movaps	xmm4, xmm2
	mov	ebx, 0
	jmp	.L65
.L68:
	mov	r12d, 0
	jmp	.L66
.L67:
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 4[rax]
	mov	QWORD PTR -24[rbp], rdx
	movss	xmm0, DWORD PTR [rax]
	movaps	xmm3, xmm4
	mulss	xmm0, xmm3
	movss	DWORD PTR [rax], xmm0
	add	r12d, 1
.L66:
	cmp	r12d, DWORD PTR -32[rbp]
	jl	.L67
	movss	xmm0, DWORD PTR .LC5[rip]
	movaps	xmm1, xmm4
	xorps	xmm1, xmm0
	movaps	xmm0, xmm1
	movaps	xmm4, xmm0
	add	ebx, 1
.L65:
	cmp	ebx, DWORD PTR -28[rbp]
	jl	.L68
	nop
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	preproc, .-preproc
	.globl	postproc
	.type	postproc, @function
postproc:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 152
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	QWORD PTR -168[rbp], rdi
	mov	DWORD PTR -172[rbp], esi
	mov	DWORD PTR -176[rbp], edx
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR -176[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR -144[rbp], eax
	mov	rbx, QWORD PTR -168[rbp]
	mov	eax, DWORD PTR -172[rbp]
	imul	eax, DWORD PTR -144[rbp]
	cdqe
	sal	rax, 2
	lea	r12, [rbx+rax]
	mov	DWORD PTR -152[rbp], 0
	jmp	.L70
.L71:
	movss	xmm0, DWORD PTR [r12]
	movss	DWORD PTR -100[rbp], xmm0
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm0, DWORD PTR [rbx]
	movss	DWORD PTR [rax], xmm0
	mov	rax, rbx
	lea	rbx, 4[rax]
	movss	xmm0, DWORD PTR -100[rbp]
	movss	DWORD PTR [rax], xmm0
	add	DWORD PTR -152[rbp], 1
.L70:
	mov	eax, DWORD PTR -172[rbp]
	imul	eax, DWORD PTR -144[rbp]
	cmp	DWORD PTR -152[rbp], eax
	jl	.L71
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, DWORD PTR -172[rbp]
	movsd	xmm0, QWORD PTR .LC6[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -96[rbp], xmm0
	movss	xmm0, DWORD PTR .LC7[rip]
	movss	DWORD PTR -140[rbp], xmm0
	movss	xmm0, DWORD PTR .LC8[rip]
	movss	DWORD PTR -136[rbp], xmm0
	movsd	xmm6, QWORD PTR .LC9[rip]
	movsd	QWORD PTR -184[rbp], xmm6
	pxor	xmm7, xmm7
	movsd	QWORD PTR -192[rbp], xmm7
	movsd	xmm1, QWORD PTR -96[rbp]
	movsd	xmm0, QWORD PTR .LC2[rip]
	mulsd	xmm1, xmm0
	movq	rax, xmm1
	movq	xmm0, rax
	call	sin@PLT
	movq	rax, xmm0
	mov	QWORD PTR -88[rbp], rax
	movsd	xmm1, QWORD PTR -88[rbp]
	movsd	xmm0, QWORD PTR .LC11[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR -88[rbp]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -88[rbp], xmm0
	mov	rax, QWORD PTR -96[rbp]
	movq	xmm0, rax
	call	sin@PLT
	movq	rax, xmm0
	mov	QWORD PTR -80[rbp], rax
	mov	rbx, QWORD PTR -168[rbp]
	mov	rax, QWORD PTR -168[rbp]
	lea	r12, 4[rax]
	movss	xmm0, DWORD PTR [rbx]
	movss	DWORD PTR -132[rbp], xmm0
	movss	xmm0, DWORD PTR [r12]
	movss	DWORD PTR -128[rbp], xmm0
	movss	xmm0, DWORD PTR -132[rbp]
	addss	xmm0, DWORD PTR -128[rbp]
	movss	DWORD PTR [rbx], xmm0
	movss	xmm0, DWORD PTR -132[rbp]
	subss	xmm0, DWORD PTR -128[rbp]
	movss	DWORD PTR [r12], xmm0
	mov	DWORD PTR -152[rbp], 1
	jmp	.L72
.L74:
	movsd	xmm5, QWORD PTR -184[rbp]
	movsd	QWORD PTR -72[rbp], xmm5
	movapd	xmm0, xmm5
	mulsd	xmm0, QWORD PTR -88[rbp]
	movsd	xmm4, QWORD PTR -192[rbp]
	movapd	xmm1, xmm4
	mulsd	xmm1, QWORD PTR -80[rbp]
	subsd	xmm0, xmm1
	movapd	xmm2, xmm0
	addsd	xmm2, xmm5
	movsd	QWORD PTR -184[rbp], xmm2
	movapd	xmm1, xmm4
	mulsd	xmm1, QWORD PTR -88[rbp]
	movsd	xmm0, QWORD PTR -72[rbp]
	mulsd	xmm0, QWORD PTR -80[rbp]
	addsd	xmm0, xmm1
	movapd	xmm3, xmm0
	addsd	xmm3, xmm4
	movsd	QWORD PTR -192[rbp], xmm3
	mov	eax, DWORD PTR -152[rbp]
	lea	ebx, [rax+rax]
	lea	r12d, 1[rbx]
	mov	eax, DWORD PTR -172[rbp]
	add	eax, eax
	add	eax, 1
	sub	eax, r12d
	mov	r13d, eax
	lea	r15d, 1[r13]
	mov	eax, ebx
	imul	eax, DWORD PTR -144[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -168[rbp]
	lea	rbx, [rdx+rax]
	mov	eax, r12d
	imul	eax, DWORD PTR -144[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -168[rbp]
	lea	r12, [rdx+rax]
	mov	eax, r13d
	imul	eax, DWORD PTR -144[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -168[rbp]
	lea	r14, [rdx+rax]
	mov	eax, r15d
	imul	eax, DWORD PTR -144[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -168[rbp]
	lea	r13, [rdx+rax]
	movss	xmm0, DWORD PTR [rbx]
	movss	DWORD PTR -124[rbp], xmm0
	movss	xmm0, DWORD PTR [r12]
	movss	DWORD PTR -120[rbp], xmm0
	movss	xmm0, DWORD PTR [r14]
	movss	DWORD PTR -116[rbp], xmm0
	movss	xmm0, DWORD PTR 0[r13]
	movss	DWORD PTR -112[rbp], xmm0
	movss	xmm0, DWORD PTR -124[rbp]
	addss	xmm0, DWORD PTR -116[rbp]
	movss	xmm1, DWORD PTR -140[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -132[rbp], xmm0
	movss	xmm0, DWORD PTR -120[rbp]
	subss	xmm0, DWORD PTR -112[rbp]
	movss	xmm1, DWORD PTR -140[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -108[rbp], xmm0
	movss	xmm0, DWORD PTR -136[rbp]
	movss	xmm1, DWORD PTR .LC5[rip]
	xorps	xmm1, xmm0
	movss	xmm0, DWORD PTR -120[rbp]
	addss	xmm0, DWORD PTR -112[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -128[rbp], xmm0
	movss	xmm0, DWORD PTR -124[rbp]
	subss	xmm0, DWORD PTR -116[rbp]
	movss	xmm1, DWORD PTR -136[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -104[rbp], xmm0
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -128[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm1, xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -104[rbp]
	mulsd	xmm0, xmm3
	addsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR [rbx], xmm0
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -104[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	mulsd	xmm1, xmm3
	subsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR [r12], xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -132[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	mulsd	xmm1, xmm2
	subsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	mulsd	xmm1, xmm3
	subsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR [r14], xmm0
	movss	xmm0, DWORD PTR -108[rbp]
	movss	xmm1, DWORD PTR .LC5[rip]
	xorps	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -104[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	mulsd	xmm1, xmm3
	subsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR 0[r13], xmm0
	cmp	DWORD PTR -176[rbp], 4
	jne	.L73
	add	rbx, 4
	movss	xmm0, DWORD PTR [rbx]
	movss	DWORD PTR -124[rbp], xmm0
	add	r12, 4
	movss	xmm0, DWORD PTR [r12]
	movss	DWORD PTR -120[rbp], xmm0
	add	r14, 4
	movss	xmm0, DWORD PTR [r14]
	movss	DWORD PTR -116[rbp], xmm0
	add	r13, 4
	movss	xmm0, DWORD PTR 0[r13]
	movss	DWORD PTR -112[rbp], xmm0
	movss	xmm0, DWORD PTR -124[rbp]
	addss	xmm0, DWORD PTR -116[rbp]
	movss	xmm1, DWORD PTR -140[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -132[rbp], xmm0
	movss	xmm0, DWORD PTR -120[rbp]
	subss	xmm0, DWORD PTR -112[rbp]
	movss	xmm1, DWORD PTR -140[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -108[rbp], xmm0
	movss	xmm0, DWORD PTR -136[rbp]
	movss	xmm1, DWORD PTR .LC5[rip]
	xorps	xmm1, xmm0
	movss	xmm0, DWORD PTR -120[rbp]
	addss	xmm0, DWORD PTR -112[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -128[rbp], xmm0
	movss	xmm0, DWORD PTR -124[rbp]
	subss	xmm0, DWORD PTR -116[rbp]
	movss	xmm1, DWORD PTR -136[rbp]
	mulss	xmm0, xmm1
	movss	DWORD PTR -104[rbp], xmm0
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -132[rbp]
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -128[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm1, xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -104[rbp]
	mulsd	xmm0, xmm3
	addsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR [rbx], xmm0
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -108[rbp]
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -104[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	mulsd	xmm1, xmm3
	subsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR [r12], xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -132[rbp]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	mulsd	xmm1, xmm2
	subsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -104[rbp]
	mulsd	xmm1, xmm3
	subsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR [r14], xmm0
	movss	xmm0, DWORD PTR -108[rbp]
	movss	xmm1, DWORD PTR .LC5[rip]
	xorps	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -104[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, DWORD PTR -128[rbp]
	mulsd	xmm1, xmm3
	subsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR 0[r13], xmm0
.L73:
	add	DWORD PTR -152[rbp], 1
.L72:
	mov	eax, DWORD PTR -172[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cmp	DWORD PTR -152[rbp], eax
	jle	.L74
	mov	DWORD PTR -152[rbp], 0
	jmp	.L75
.L79:
	mov	DWORD PTR -148[rbp], 0
	jmp	.L76
.L78:
	mov	edx, DWORD PTR -152[rbp]
	mov	eax, DWORD PTR -148[rbp]
	add	eax, edx
	imul	eax, DWORD PTR -144[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -168[rbp]
	lea	rbx, [rdx+rax]
	mov	eax, DWORD PTR -172[rbp]
	add	eax, eax
	sub	eax, DWORD PTR -152[rbp]
	lea	edx, -2[rax]
	mov	eax, DWORD PTR -148[rbp]
	add	eax, edx
	imul	eax, DWORD PTR -144[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -168[rbp]
	lea	r12, [rdx+rax]
	movss	xmm0, DWORD PTR [rbx]
	mov	eax, DWORD PTR -148[rbp]
	cdqe
	movss	DWORD PTR -64[rbp+rax*4], xmm0
	movss	xmm0, DWORD PTR [r12]
	movss	DWORD PTR [rbx], xmm0
	mov	eax, DWORD PTR -148[rbp]
	cdqe
	movss	xmm0, DWORD PTR -64[rbp+rax*4]
	movss	DWORD PTR [r12], xmm0
	cmp	DWORD PTR -176[rbp], 4
	jne	.L77
	add	rbx, 4
	movss	xmm0, DWORD PTR [rbx]
	mov	eax, DWORD PTR -148[rbp]
	cdqe
	movss	DWORD PTR -64[rbp+rax*4], xmm0
	add	r12, 4
	movss	xmm0, DWORD PTR [r12]
	movss	DWORD PTR [rbx], xmm0
	mov	eax, DWORD PTR -148[rbp]
	cdqe
	movss	xmm0, DWORD PTR -64[rbp+rax*4]
	movss	DWORD PTR [r12], xmm0
.L77:
	add	DWORD PTR -148[rbp], 1
.L76:
	cmp	DWORD PTR -148[rbp], 1
	jle	.L78
	add	DWORD PTR -152[rbp], 2
.L75:
	mov	eax, DWORD PTR -152[rbp]
	cmp	eax, DWORD PTR -172[rbp]
	jl	.L79
	nop
	mov	rax, QWORD PTR -56[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L80
	call	__stack_chk_fail@PLT
.L80:
	add	rsp, 152
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	postproc, .-postproc
	.globl	combine
	.type	combine, @function
combine:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	QWORD PTR -32[rbp], rdi
	mov	QWORD PTR -40[rbp], rsi
	mov	DWORD PTR -44[rbp], edx
	mov	DWORD PTR -48[rbp], ecx
	movss	DWORD PTR -52[rbp], xmm0
	movss	DWORD PTR -56[rbp], xmm1
	movss	DWORD PTR -60[rbp], xmm2
	movss	DWORD PTR -64[rbp], xmm3
	mov	rbx, QWORD PTR -32[rbp]
	mov	r12, QWORD PTR -40[rbp]
	cmp	DWORD PTR -48[rbp], 4
	jne	.L82
	mov	r13d, 0
	jmp	.L83
.L84:
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm1, DWORD PTR [rax]
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm0
	mulss	xmm2, DWORD PTR -52[rbp]
	lea	rdx, 4[rbx]
	movss	xmm0, DWORD PTR [rdx]
	mulss	xmm0, DWORD PTR -56[rbp]
	addss	xmm0, xmm2
	addss	xmm0, xmm1
	movss	DWORD PTR [rax], xmm0
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm2, DWORD PTR [rax]
	lea	rdx, 4[rbx]
	movss	xmm0, DWORD PTR [rdx]
	mulss	xmm0, DWORD PTR -52[rbp]
	movss	xmm1, DWORD PTR [rbx]
	mulss	xmm1, DWORD PTR -56[rbp]
	subss	xmm0, xmm1
	addss	xmm0, xmm2
	movss	DWORD PTR [rax], xmm0
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm1, DWORD PTR [rax]
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm0
	mulss	xmm2, DWORD PTR -60[rbp]
	lea	rdx, 4[rbx]
	movss	xmm0, DWORD PTR [rdx]
	mulss	xmm0, DWORD PTR -64[rbp]
	addss	xmm0, xmm2
	addss	xmm0, xmm1
	movss	DWORD PTR [rax], xmm0
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm2, DWORD PTR [rax]
	lea	rdx, 4[rbx]
	movss	xmm0, DWORD PTR [rdx]
	mulss	xmm0, DWORD PTR -60[rbp]
	movss	xmm1, DWORD PTR [rbx]
	mulss	xmm1, DWORD PTR -64[rbp]
	subss	xmm0, xmm1
	addss	xmm0, xmm2
	movss	DWORD PTR [rax], xmm0
	add	rbx, 8
	add	r13d, 1
.L83:
	cmp	r13d, DWORD PTR -44[rbp]
	jl	.L84
	jmp	.L88
.L82:
	mov	r13d, 0
	jmp	.L86
.L87:
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm1, DWORD PTR [rax]
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm0
	mulss	xmm2, DWORD PTR -52[rbp]
	lea	rdx, 4[rbx]
	movss	xmm0, DWORD PTR [rdx]
	mulss	xmm0, DWORD PTR -56[rbp]
	addss	xmm0, xmm2
	addss	xmm0, xmm1
	movss	DWORD PTR [rax], xmm0
	mov	rax, r12
	lea	r12, 4[rax]
	movss	xmm1, DWORD PTR [rax]
	movss	xmm0, DWORD PTR [rbx]
	movaps	xmm2, xmm0
	mulss	xmm2, DWORD PTR -60[rbp]
	lea	rdx, 4[rbx]
	movss	xmm0, DWORD PTR [rdx]
	mulss	xmm0, DWORD PTR -64[rbp]
	addss	xmm0, xmm2
	addss	xmm0, xmm1
	movss	DWORD PTR [rax], xmm0
	add	rbx, 8
	add	r13d, 1
.L86:
	cmp	r13d, DWORD PTR -44[rbp]
	jl	.L87
.L88:
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	combine, .-combine
	.globl	shiftComplexData
	.type	shiftComplexData, @function
shiftComplexData:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	QWORD PTR -32[rbp], rdi
	mov	DWORD PTR -36[rbp], esi
	mov	DWORD PTR -40[rbp], edx
	mov	DWORD PTR -44[rbp], ecx
	cmp	DWORD PTR -36[rbp], 0
	je	.L102
	cmp	DWORD PTR -36[rbp], 0
	jle	.L92
	mov	eax, DWORD PTR -44[rbp]
	sub	eax, DWORD PTR -36[rbp]
	cmp	DWORD PTR -40[rbp], eax
	jle	.L93
	mov	eax, DWORD PTR -44[rbp]
	sub	eax, DWORD PTR -36[rbp]
	mov	DWORD PTR -40[rbp], eax
.L93:
	mov	eax, DWORD PTR -40[rbp]
	add	eax, eax
	cdqe
	sal	rax, 2
	lea	rdx, -4[rax]
	mov	rax, QWORD PTR -32[rbp]
	lea	r13, [rdx+rax]
	mov	edx, DWORD PTR -40[rbp]
	mov	eax, DWORD PTR -36[rbp]
	add	eax, edx
	add	eax, eax
	cdqe
	sal	rax, 2
	lea	rdx, -4[rax]
	mov	rax, QWORD PTR -32[rbp]
	lea	rbx, [rdx+rax]
	mov	r12d, 0
	jmp	.L94
.L95:
	mov	rdx, r13
	lea	r13, -4[rdx]
	mov	rax, rbx
	lea	rbx, -4[rax]
	movss	xmm0, DWORD PTR [rdx]
	movss	DWORD PTR [rax], xmm0
	mov	rdx, r13
	lea	r13, -4[rdx]
	mov	rax, rbx
	lea	rbx, -4[rax]
	movss	xmm0, DWORD PTR [rdx]
	movss	DWORD PTR [rax], xmm0
	add	r12d, 1
.L94:
	cmp	r12d, DWORD PTR -40[rbp]
	jl	.L95
	mov	r12d, 0
	jmp	.L96
.L97:
	mov	rax, rbx
	lea	rbx, -4[rax]
	pxor	xmm0, xmm0
	movss	DWORD PTR [rax], xmm0
	mov	rax, rbx
	lea	rbx, -4[rax]
	pxor	xmm0, xmm0
	movss	DWORD PTR [rax], xmm0
	add	r12d, 1
.L96:
	cmp	r12d, DWORD PTR -36[rbp]
	jl	.L97
	jmp	.L89
.L92:
	cmp	DWORD PTR -36[rbp], 0
	jns	.L89
	neg	DWORD PTR -36[rbp]
	mov	eax, DWORD PTR -36[rbp]
	add	eax, eax
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -32[rbp]
	lea	r13, [rdx+rax]
	mov	rbx, QWORD PTR -32[rbp]
	mov	r12d, 0
	jmp	.L98
.L99:
	mov	rdx, r13
	lea	r13, 4[rdx]
	mov	rax, rbx
	lea	rbx, 4[rax]
	movss	xmm0, DWORD PTR [rdx]
	movss	DWORD PTR [rax], xmm0
	mov	rdx, r13
	lea	r13, 4[rdx]
	mov	rax, rbx
	lea	rbx, 4[rax]
	movss	xmm0, DWORD PTR [rdx]
	movss	DWORD PTR [rax], xmm0
	add	r12d, 1
.L98:
	mov	eax, DWORD PTR -40[rbp]
	sub	eax, DWORD PTR -36[rbp]
	cmp	r12d, eax
	jl	.L99
	mov	r12d, 0
	jmp	.L100
.L101:
	mov	rax, rbx
	lea	rbx, 4[rax]
	pxor	xmm0, xmm0
	movss	DWORD PTR [rax], xmm0
	mov	rax, rbx
	lea	rbx, 4[rax]
	pxor	xmm0, xmm0
	movss	DWORD PTR [rax], xmm0
	add	r12d, 1
.L100:
	cmp	r12d, DWORD PTR -36[rbp]
	jl	.L101
	jmp	.L89
.L102:
	nop
.L89:
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	shiftComplexData, .-shiftComplexData
	.globl	negateimaginary
	.type	negateimaginary, @function
negateimaginary:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -32[rbp], edx
	mov	eax, DWORD PTR -32[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -24[rbp]
	lea	rbx, [rdx+rax]
	cmp	DWORD PTR -32[rbp], 4
	jne	.L104
	mov	r12d, 0
	jmp	.L105
.L106:
	mov	rax, rbx
	lea	rbx, 4[rax]
	movss	xmm0, DWORD PTR [rax]
	movss	xmm1, DWORD PTR .LC5[rip]
	xorps	xmm0, xmm1
	movss	DWORD PTR [rax], xmm0
	mov	rax, rbx
	lea	rbx, 4[rax]
	movss	xmm0, DWORD PTR [rax]
	movss	xmm1, DWORD PTR .LC5[rip]
	xorps	xmm0, xmm1
	movss	DWORD PTR [rax], xmm0
	add	rbx, 8
	add	r12d, 1
.L105:
	cmp	r12d, DWORD PTR -28[rbp]
	jl	.L106
	jmp	.L110
.L104:
	mov	r12d, 0
	jmp	.L108
.L109:
	movss	xmm0, DWORD PTR [rbx]
	movss	xmm1, DWORD PTR .LC5[rip]
	xorps	xmm0, xmm1
	movss	DWORD PTR [rbx], xmm0
	add	rbx, 8
	add	r12d, 1
.L108:
	cmp	r12d, DWORD PTR -28[rbp]
	jl	.L109
.L110:
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	negateimaginary, .-negateimaginary
	.globl	cnvrts32
	.type	cnvrts32, @function
cnvrts32:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	movss	DWORD PTR -28[rbp], xmm0
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	DWORD PTR -32[rbp], edx
	mov	DWORD PTR -52[rbp], ecx
	cmp	DWORD PTR -52[rbp], 0
	jns	.L112
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	lea	r13, [rdx+rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	mov	edx, DWORD PTR -52[rbp]
	movsx	rdx, edx
	sub	rax, rdx
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -48[rbp]
	lea	rbx, [rdx+rax]
	mov	r12d, 0
	jmp	.L113
.L114:
	sub	r13, 4
	mov	eax, DWORD PTR 0[r13]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	sub	rbx, 4
	mulss	xmm0, DWORD PTR -28[rbp]
	movss	DWORD PTR [rbx], xmm0
	add	r12d, 1
.L113:
	cmp	r12d, DWORD PTR -32[rbp]
	jl	.L114
	mov	r12d, 0
	jmp	.L115
.L116:
	sub	rbx, 4
	pxor	xmm0, xmm0
	movss	DWORD PTR [rbx], xmm0
	add	r12d, 1
.L115:
	mov	eax, DWORD PTR -52[rbp]
	neg	eax
	cmp	r12d, eax
	jl	.L116
	jmp	.L120
.L112:
	mov	eax, DWORD PTR -52[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -40[rbp]
	lea	r13, [rdx+rax]
	mov	rbx, QWORD PTR -48[rbp]
	mov	r12d, 0
	jmp	.L118
.L119:
	mov	rax, r13
	lea	r13, 4[rax]
	mov	eax, DWORD PTR [rax]
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mulss	xmm0, DWORD PTR -28[rbp]
	movss	DWORD PTR [rax], xmm0
	add	r12d, 1
.L118:
	mov	eax, DWORD PTR -32[rbp]
	sub	eax, DWORD PTR -52[rbp]
	cmp	r12d, eax
	jl	.L119
.L120:
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	cnvrts32, .-cnvrts32
	.globl	cnvrts16
	.type	cnvrts16, @function
cnvrts16:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	movss	DWORD PTR -28[rbp], xmm0
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	DWORD PTR -32[rbp], edx
	mov	DWORD PTR -52[rbp], ecx
	cmp	DWORD PTR -52[rbp], 0
	jns	.L122
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -40[rbp]
	lea	r13, [rdx+rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	mov	edx, DWORD PTR -52[rbp]
	movsx	rdx, edx
	sub	rax, rdx
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -48[rbp]
	lea	rbx, [rdx+rax]
	mov	r12d, 0
	jmp	.L123
.L124:
	sub	r13, 2
	movzx	eax, WORD PTR 0[r13]
	cwde
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	sub	rbx, 4
	mulss	xmm0, DWORD PTR -28[rbp]
	movss	DWORD PTR [rbx], xmm0
	add	r12d, 1
.L123:
	cmp	r12d, DWORD PTR -32[rbp]
	jl	.L124
	mov	r12d, 0
	jmp	.L125
.L126:
	sub	rbx, 4
	pxor	xmm0, xmm0
	movss	DWORD PTR [rbx], xmm0
	add	r12d, 1
.L125:
	mov	eax, DWORD PTR -52[rbp]
	neg	eax
	cmp	r12d, eax
	jl	.L126
	jmp	.L130
.L122:
	mov	eax, DWORD PTR -52[rbp]
	cdqe
	lea	rdx, [rax+rax]
	mov	rax, QWORD PTR -40[rbp]
	lea	r13, [rdx+rax]
	mov	rbx, QWORD PTR -48[rbp]
	mov	r12d, 0
	jmp	.L128
.L129:
	mov	rax, r13
	lea	r13, 2[rax]
	movzx	eax, WORD PTR [rax]
	cwde
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, eax
	mov	rax, rbx
	lea	rbx, 4[rax]
	mulss	xmm0, DWORD PTR -28[rbp]
	movss	DWORD PTR [rax], xmm0
	add	r12d, 1
.L128:
	mov	eax, DWORD PTR -32[rbp]
	sub	eax, DWORD PTR -52[rbp]
	cmp	r12d, eax
	jl	.L129
.L130:
	nop
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	cnvrts16, .-cnvrts16
	.globl	AP_bootup_msg
	.type	AP_bootup_msg, @function
AP_bootup_msg:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	AP_bootup_msg, .-AP_bootup_msg
	.section	.rodata
	.align 8
.LC1:
	.long	-274877907
	.long	1088421855
	.align 8
.LC2:
	.long	0
	.long	1071644672
	.align 8
.LC3:
	.long	-274877907
	.long	-1059061793
	.align 4
.LC4:
	.long	1065353216
	.align 16
.LC5:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.align 8
.LC6:
	.long	1413754136
	.long	1074340347
	.align 4
.LC7:
	.long	1056964608
	.align 4
.LC8:
	.long	-1090519040
	.align 8
.LC9:
	.long	0
	.long	1072693248
	.align 8
.LC11:
	.long	0
	.long	-1073741824
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"223750.c"
	.text
	.align	2
	.global	skywt
	.syntax unified
	.arm
	.fpu softvfp
	.type	skywt, %function
skywt:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	skywt, .-skywt
	.align	2
	.global	skyinit
	.syntax unified
	.arm
	.fpu softvfp
	.type	skyinit, %function
skyinit:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	skyinit, .-skyinit
	.align	2
	.global	skygo
	.syntax unified
	.arm
	.fpu softvfp
	.type	skygo, %function
skygo:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	skygo, .-skygo
	.align	2
	.global	skyend
	.syntax unified
	.arm
	.fpu softvfp
	.type	skyend, %function
skyend:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	skyend, .-skyend
	.align	2
	.global	skyrel
	.syntax unified
	.arm
	.fpu softvfp
	.type	skyrel, %function
skyrel:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	skyrel, .-skyrel
	.global	__aeabi_fmul
	.align	2
	.global	vvvrmult
	.syntax unified
	.arm
	.fpu softvfp
	.type	vvvrmult, %function
vvvrmult:
	@ args = 12, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #20
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r8, [fp, #-44]
	ldr	r9, [fp, #-52]
	ldr	r10, [fp, #8]
	ldr	r4, [fp, #-40]
	ldr	r5, [fp, #-48]
	ldr	r6, [fp, #4]
	ldr	r7, [fp, #12]
	b	.L7
.L8:
	ldr	r3, [r4]	@ float
	ldr	r2, [r5]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [r6]	@ float
	mov	r3, r8
	lsl	r3, r3, #2
	add	r4, r4, r3
	mov	r3, r9
	lsl	r3, r3, #2
	add	r5, r5, r3
	mov	r3, r10
	lsl	r3, r3, #2
	add	r6, r6, r3
.L7:
	mov	r3, r7
	sub	r7, r3, #1
	cmp	r3, #0
	bne	.L8
	nop
	nop
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	vvvrmult, .-vvvrmult
	.align	2
	.global	datafill
	.syntax unified
	.arm
	.fpu softvfp
	.type	datafill, %function
datafill:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, fp}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]	@ float
	ldr	r5, [fp, #-16]
	ldr	r6, [fp, #-24]	@ float
	ldr	r4, [fp, #-20]
	b	.L10
.L11:
	mov	r3, r5
	add	r5, r3, #4
	str	r6, [r3]	@ float
.L10:
	mov	r3, r4
	sub	r4, r3, #1
	cmp	r3, #0
	bne	.L11
	nop
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, r6, fp}
	bx	lr
	.size	datafill, .-datafill
	.global	__aeabi_fcmpge
	.align	2
	.global	skymax
	.syntax unified
	.arm
	.fpu softvfp
	.type	skymax, %function
skymax:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	ldr	r4, [fp, #-24]
	ldr	r5, [fp, #-28]
	ldr	r6, [fp, #-32]
	ldr	r7, [fp, #-36]
	b	.L13
.L17:
	ldr	r3, [r4]	@ float
	ldr	r2, [r5]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L19
	ldr	r3, [r4]	@ float
	str	r3, [r6]	@ float
	b	.L16
.L19:
	ldr	r3, [r5]	@ float
	str	r3, [r6]	@ float
.L16:
	add	r4, r4, #4
	add	r5, r5, #4
	add	r6, r6, #4
.L13:
	mov	r3, r7
	sub	r7, r3, #1
	cmp	r3, #0
	bne	.L17
	nop
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	skymax, .-skymax
	.global	__aeabi_fadd
	.align	2
	.global	skyadd
	.syntax unified
	.arm
	.fpu softvfp
	.type	skyadd, %function
skyadd:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	ldr	r4, [fp, #-24]
	ldr	r5, [fp, #-28]
	ldr	r6, [fp, #-32]
	ldr	r7, [fp, #-36]
	b	.L21
.L22:
	ldr	r3, [r4]	@ float
	ldr	r2, [r5]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r6]	@ float
	add	r4, r4, #4
	add	r5, r5, #4
	add	r6, r6, #4
.L21:
	mov	r3, r7
	sub	r7, r3, #1
	cmp	r3, #0
	bne	.L22
	nop
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	skyadd, .-skyadd
	.align	2
	.global	vrsum
	.syntax unified
	.arm
	.fpu softvfp
	.type	vrsum, %function
vrsum:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	ldr	r4, [fp, #-24]
	ldr	r7, [fp, #-28]
	mov	r5, #0
	ldr	r6, [fp, #-36]
	b	.L24
.L25:
	ldr	r3, [r4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r5, r3
	mov	r3, r7
	lsl	r3, r3, #2
	add	r4, r4, r3
.L24:
	mov	r3, r6
	sub	r6, r3, #1
	cmp	r3, #0
	bne	.L25
	ldr	r3, [fp, #-32]
	str	r5, [r3]	@ float
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	vrsum, .-vrsum
	.global	__aeabi_fsub
	.align	2
	.global	vssubr
	.syntax unified
	.arm
	.fpu softvfp
	.type	vssubr, %function
vssubr:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #20
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]	@ float
	str	r2, [fp, #-40]
	str	r3, [fp, #-44]
	ldr	r5, [fp, #-32]
	ldr	r6, [fp, #-40]
	ldr	r8, [fp, #-36]	@ float
	ldr	r4, [fp, #-44]
	b	.L27
.L28:
	mov	r3, r5
	add	r5, r3, #4
	ldr	r3, [r3]	@ float
	mov	r7, r6
	add	r6, r7, #4
	mov	r1, r8
	mov	r0, r3
	bl	__aeabi_fsub
	mov	r3, r0
	str	r3, [r7]	@ float
.L27:
	mov	r3, r4
	sub	r4, r3, #1
	cmp	r3, #0
	bne	.L28
	nop
	nop
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
	.size	vssubr, .-vssubr
	.align	2
	.global	vvrramp
	.syntax unified
	.arm
	.fpu softvfp
	.type	vvrramp, %function
vvrramp:
	@ args = 12, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #20
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r4, [fp, #-40]
	ldr	r9, [fp, #-44]
	ldr	r5, [fp, #-48]
	ldr	r10, [fp, #-52]
	ldr	r6, [fp, #4]	@ float
	ldr	r8, [fp, #8]	@ float
	ldr	r7, [fp, #12]
	b	.L30
.L31:
	ldr	r3, [r4]	@ float
	mov	r1, r3
	mov	r0, r6
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r5]	@ float
	mov	r3, r10
	lsl	r3, r3, #2
	add	r5, r5, r3
	mov	r3, r9
	lsl	r3, r3, #2
	add	r4, r4, r3
	mov	r1, r8
	mov	r0, r6
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r6, r3
.L30:
	mov	r3, r7
	sub	r7, r3, #1
	cmp	r3, #0
	bne	.L31
	nop
	nop
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	vvrramp, .-vvrramp
	.align	2
	.global	vvvcmult
	.syntax unified
	.arm
	.fpu softvfp
	.type	vvvcmult, %function
vvvcmult:
	@ args = 12, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #16
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	str	r2, [fp, #-40]
	str	r3, [fp, #-44]
	ldr	r4, [fp, #-32]
	ldr	r5, [fp, #-40]
	ldr	r6, [fp, #4]
	mov	r7, #0
	b	.L33
.L34:
	ldr	r3, [r4]	@ float
	ldr	r2, [r5]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r8, r3
	ldr	r3, [r4, #4]	@ float
	ldr	r2, [r5, #4]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r8, r3
	ldr	r3, [r4, #4]	@ float
	ldr	r2, [r5]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [r4]	@ float
	ldr	r2, [r5, #4]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r6, #4]	@ float
	str	r8, [r6]	@ float
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	add	r4, r4, r3
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r5, r5, r3
	ldr	r3, [fp, #8]
	lsl	r3, r3, #3
	add	r6, r6, r3
	add	r7, r7, #1
.L33:
	ldr	r3, [fp, #12]
	cmp	r7, r3
	blt	.L34
	nop
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	vvvcmult, .-vvvcmult
	.align	2
	.global	vvvhcmult
	.syntax unified
	.arm
	.fpu softvfp
	.type	vvvhcmult, %function
vvvhcmult:
	@ args = 12, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #28
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	str	r2, [fp, #-48]
	str	r3, [fp, #-52]
	ldr	r4, [fp, #-40]
	ldr	r6, [fp, #-48]
	ldr	r7, [fp, #4]
	mov	r3, #0
	str	r3, [fp, #-60]
	b	.L36
.L37:
	ldr	r5, [r6]	@ float
	ldr	r3, [r4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-56]	@ float
	ldr	r3, [r4, #8]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [r4, #4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r10, r3
	ldr	r3, [r4, #12]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r8, r3
	ldr	r5, [r6, #8]	@ float
	ldr	r3, [r4, #8]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	str	r3, [fp, #-56]	@ float
	ldr	r3, [r4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [r4, #12]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r10
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r10, r3
	ldr	r3, [r4, #4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r8, r3
	ldr	r5, [r6, #4]	@ float
	ldr	r3, [r4, #4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	str	r3, [fp, #-56]	@ float
	ldr	r3, [r4, #12]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [r4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r10
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r10, r3
	ldr	r3, [r4, #8]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r8, r3
	ldr	r5, [r6, #12]	@ float
	ldr	r3, [r4, #12]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-56]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [fp, #-56]	@ float
	ldr	r3, [r4, #4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [r4, #8]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r10
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r10, r3
	ldr	r3, [r4]	@ float
	mov	r1, r3
	mov	r0, r5
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r8, r3
	ldr	r3, [fp, #-56]	@ float
	str	r3, [r7]	@ float
	str	r10, [r7, #4]	@ float
	str	r9, [r7, #8]	@ float
	str	r8, [r7, #12]	@ float
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #4
	add	r4, r4, r3
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #4
	add	r6, r6, r3
	ldr	r3, [fp, #8]
	lsl	r3, r3, #4
	add	r7, r7, r3
	ldr	r3, [fp, #-60]
	add	r3, r3, #1
	str	r3, [fp, #-60]
.L36:
	ldr	r3, [fp, #12]
	ldr	r2, [fp, #-60]
	cmp	r2, r3
	blt	.L37
	nop
	nop
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
	.size	vvvhcmult, .-vvvhcmult
	.global	__aeabi_f2d
	.global	__aeabi_dcmpgt
	.global	__aeabi_dadd
	.global	__aeabi_d2iz
	.global	__aeabi_dcmplt
	.global	__aeabi_dsub
	.align	2
	.global	scfix1
	.syntax unified
	.arm
	.fpu softvfp
	.type	scfix1, %function
scfix1:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]	@ float
	str	r3, [fp, #-36]
	ldr	r6, [fp, #-24]
	ldr	r4, [fp, #-36]
	mov	r7, #0
	b	.L39
.L49:
	ldr	r3, [r6]	@ float
	ldr	r1, [fp, #-32]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r5, r3
	mov	r1, #0
	mov	r0, r5
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L53
	mov	r0, r5
	bl	__aeabi_f2d
	ldr	r2, .L56
	ldr	r3, .L56+4
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L54
	ldr	r3, .L56+8
	b	.L44
.L54:
	mov	r0, r5
	bl	__aeabi_f2d
	mov	r2, #0
	ldr	r3, .L56+12
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L44:
	strh	r3, [r4]	@ movhi
	b	.L45
.L53:
	mov	r0, r5
	bl	__aeabi_f2d
	ldr	r2, .L56
	ldr	r3, .L56+16
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L56+20
	b	.L48
.L55:
	mov	r0, r5
	bl	__aeabi_f2d
	mov	r2, #0
	ldr	r3, .L56+12
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L48:
	strh	r3, [r4]	@ movhi
.L45:
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #2
	add	r6, r6, r3
	ldr	r3, [fp, #4]
	lsl	r3, r3, #1
	add	r4, r4, r3
	add	r7, r7, #1
.L39:
	ldr	r3, [fp, #8]
	cmp	r7, r3
	blt	.L49
	nop
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L57:
	.align	2
.L56:
	.word	-274877907
	.word	1088421855
	.word	32767
	.word	1071644672
	.word	-1059061793
	.word	-32767
	.size	scfix1, .-scfix1
	.global	__aeabi_d2f
	.align	2
	.global	scabs
	.syntax unified
	.arm
	.fpu softvfp
	.type	scabs, %function
scabs:
	@ args = 12, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #20
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	str	r2, [fp, #-40]	@ float
	str	r3, [fp, #-44]
	ldr	r4, [fp, #-32]
	ldr	r5, [fp, #-44]
	mov	r6, #0
	b	.L59
.L63:
	ldr	r3, [r4]	@ float
	ldr	r1, [fp, #-40]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r8, r3
	add	r3, r4, #4
	ldr	r3, [r3]	@ float
	ldr	r1, [fp, #-40]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r7, r3
	mov	r1, r8
	mov	r0, r8
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r8, r3
	mov	r1, r7
	mov	r0, r7
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	mov	r7, r3
	mov	r0, r7
	bl	__aeabi_f2d
	ldr	r2, .L66
	ldr	r3, .L66+4
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L65
	ldr	r3, [fp, #12]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r2, r3	@ movhi
	lsl	r2, r2, #15
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L62
.L65:
	mov	r0, r7
	bl	__aeabi_f2d
	mov	r2, #0
	ldr	r3, .L66+8
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, [fp, #12]
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	mul	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L62:
	strh	r3, [r5]	@ movhi
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	add	r4, r4, r3
	ldr	r3, [fp, #4]
	lsl	r3, r3, #1
	add	r5, r5, r3
	add	r6, r6, #1
.L59:
	ldr	r3, [fp, #8]
	cmp	r6, r3
	blt	.L63
	nop
	nop
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
.L67:
	.align	2
.L66:
	.word	-274877907
	.word	1088421855
	.word	1071644672
	.size	scabs, .-scabs
	.align	2
	.global	preproc
	.syntax unified
	.arm
	.fpu softvfp
	.type	preproc, %function
preproc:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	mov	r7, #1065353216
	mov	r5, #0
	b	.L69
.L72:
	mov	r6, #0
	b	.L70
.L71:
	ldr	r4, [fp, #-24]
	add	r3, r4, #4
	str	r3, [fp, #-24]
	ldr	r3, [r4]	@ float
	mov	r1, r3
	mov	r0, r7
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [r4]	@ float
	add	r6, r6, #1
.L70:
	ldr	r3, [fp, #-32]
	cmp	r6, r3
	blt	.L71
	eor	r3, r7, #-2147483648
	mov	r7, r3
	add	r5, r5, #1
.L69:
	ldr	r3, [fp, #-28]
	cmp	r5, r3
	blt	.L72
	nop
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	preproc, .-preproc
	.global	__aeabi_i2d
	.global	__aeabi_ddiv
	.global	__aeabi_dmul
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	postproc
	.syntax unified
	.arm
	.fpu softvfp
	.type	postproc, %function
postproc:
	@ args = 0, pretend = 0, frame = 128
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #132
	str	r0, [fp, #-144]
	str	r1, [fp, #-148]
	str	r2, [fp, #-152]
	ldr	r3, .L85
	ldr	r3, [r3]
	str	r3, [fp, #-40]
	mov	r3,#0
	ldr	r3, [fp, #-152]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	str	r3, [fp, #-132]
	ldr	r6, [fp, #-144]
	ldr	r3, [fp, #-148]
	ldr	r2, [fp, #-132]
	mul	r3, r2, r3
	lsl	r3, r3, #2
	add	r8, r6, r3
	mov	r3, #0
	str	r3, [fp, #-140]
	b	.L74
.L75:
	ldr	r3, [r8]	@ float
	str	r3, [fp, #-88]	@ float
	mov	r3, r8
	add	r8, r3, #4
	ldr	r2, [r6]	@ float
	str	r2, [r3]	@ float
	mov	r3, r6
	add	r6, r3, #4
	ldr	r2, [fp, #-88]	@ float
	str	r2, [r3]	@ float
	ldr	r3, [fp, #-140]
	add	r3, r3, #1
	str	r3, [fp, #-140]
.L74:
	ldr	r3, [fp, #-148]
	ldr	r2, [fp, #-132]
	mul	r3, r2, r3
	ldr	r2, [fp, #-140]
	cmp	r2, r3
	blt	.L75
	ldr	r0, [fp, #-148]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L85+4
	ldr	r1, .L85+8
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	mov	r3, #1056964608
	str	r3, [fp, #-128]	@ float
	mov	r3, #-1090519040
	str	r3, [fp, #-124]	@ float
	mov	r9, #0
	ldr	r10, .L85+12
	mov	r3, #0
	mov	r4, #0
	str	r3, [fp, #-164]
	str	r4, [fp, #-160]
	mov	r2, #0
	ldr	r3, .L85+16
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sin
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	mov	r2, #0
	mov	r3, #-1073741824
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	bl	sin
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	ldr	r6, [fp, #-144]
	ldr	r3, [fp, #-144]
	add	r8, r3, #4
	ldr	r3, [r6]	@ float
	str	r3, [fp, #-120]	@ float
	ldr	r3, [r8]	@ float
	str	r3, [fp, #-116]	@ float
	ldr	r1, [fp, #-116]	@ float
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r6]	@ float
	ldr	r1, [fp, #-116]	@ float
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	str	r3, [r8]	@ float
	mov	r3, #1
	str	r3, [fp, #-140]
	b	.L76
.L78:
	str	r9, [fp, #-60]
	str	r10, [fp, #-56]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r7, fp, #164
	ldmia	r7, {r6-r7}
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r9, r2
	mov	r10, r3
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-164]
	str	r3, [fp, #-160]
	ldr	r3, [fp, #-140]
	lsl	r6, r3, #1
	add	r5, r6, #1
	ldr	r3, [fp, #-148]
	lsl	r3, r3, #1
	add	r3, r3, #1
	sub	r4, r3, r5
	add	r7, r4, #1
	ldr	r3, [fp, #-132]
	mul	r3, r6, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-144]
	add	r6, r2, r3
	ldr	r3, [fp, #-132]
	mul	r3, r5, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-144]
	add	r8, r2, r3
	ldr	r3, [fp, #-132]
	mul	r3, r4, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-144]
	add	r1, r2, r3
	ldr	r3, [fp, #-132]
	mul	r3, r7, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-144]
	add	r7, r2, r3
	ldr	r3, [r6]	@ float
	str	r3, [fp, #-112]	@ float
	ldr	r3, [r8]	@ float
	str	r3, [fp, #-108]	@ float
	str	r1, [fp, #-156]
	ldr	r3, [r1]	@ float
	str	r3, [fp, #-104]	@ float
	ldr	r3, [r7]	@ float
	str	r3, [fp, #-100]	@ float
	ldr	r1, [fp, #-104]	@ float
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-120]	@ float
	ldr	r1, [fp, #-100]	@ float
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-96]	@ float
	ldr	r3, [fp, #-124]
	eor	r4, r3, #-2147483648
	ldr	r1, [fp, #-100]	@ float
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-116]	@ float
	ldr	r1, [fp, #-104]	@ float
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-92]	@ float
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r6]	@ float
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r8]	@ float
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r1, [fp, #-156]
	str	r3, [r1]	@ float
	ldr	r3, [fp, #-96]
	eor	r3, r3, #-2147483648
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r7]	@ float
	ldr	r3, [fp, #-152]
	cmp	r3, #4
	bne	.L77
	add	r6, r6, #4
	ldr	r3, [r6]	@ float
	str	r3, [fp, #-112]	@ float
	add	r8, r8, #4
	ldr	r3, [r8]	@ float
	str	r3, [fp, #-108]	@ float
	ldr	r1, [fp, #-156]
	add	r3, r1, #4
	str	r3, [fp, #-156]
	ldr	r3, [r3]	@ float
	str	r3, [fp, #-104]	@ float
	add	r7, r7, #4
	ldr	r3, [r7]	@ float
	str	r3, [fp, #-100]	@ float
	ldr	r1, [fp, #-104]	@ float
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-120]	@ float
	ldr	r1, [fp, #-100]	@ float
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-128]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-96]	@ float
	ldr	r3, [fp, #-124]
	eor	r4, r3, #-2147483648
	ldr	r1, [fp, #-100]	@ float
	ldr	r0, [fp, #-108]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-116]	@ float
	ldr	r1, [fp, #-104]	@ float
	ldr	r0, [fp, #-112]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-124]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [fp, #-92]	@ float
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r6]	@ float
	ldr	r0, [fp, #-96]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r8]	@ float
	ldr	r0, [fp, #-120]	@ float
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	ldr	r2, [fp, #-156]
	str	r3, [r2]	@ float
	ldr	r3, [fp, #-96]
	eor	r3, r3, #-2147483648
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-92]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r9
	mov	r1, r10
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldr	r0, [fp, #-116]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [r7]	@ float
.L77:
	ldr	r3, [fp, #-140]
	add	r3, r3, #1
	str	r3, [fp, #-140]
.L76:
	ldr	r3, [fp, #-148]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-140]
	cmp	r3, r2
	ble	.L78
	mov	r3, #0
	str	r3, [fp, #-140]
	b	.L79
.L83:
	mov	r3, #0
	str	r3, [fp, #-136]
	b	.L80
.L82:
	ldr	r2, [fp, #-140]
	ldr	r3, [fp, #-136]
	add	r3, r2, r3
	ldr	r2, [fp, #-132]
	mul	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-144]
	add	r6, r2, r3
	ldr	r3, [fp, #-148]
	lsl	r2, r3, #1
	ldr	r3, [fp, #-140]
	sub	r3, r2, r3
	sub	r2, r3, #2
	ldr	r3, [fp, #-136]
	add	r3, r2, r3
	ldr	r2, [fp, #-132]
	mul	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-144]
	add	r8, r2, r3
	ldr	r2, [r6]	@ float
	ldr	r3, [fp, #-136]
	lsl	r3, r3, #2
	sub	r1, fp, #36
	add	r3, r1, r3
	str	r2, [r3, #-12]	@ float
	ldr	r3, [r8]	@ float
	str	r3, [r6]	@ float
	ldr	r3, [fp, #-136]
	lsl	r3, r3, #2
	sub	r2, fp, #36
	add	r3, r2, r3
	ldr	r3, [r3, #-12]	@ float
	str	r3, [r8]	@ float
	ldr	r3, [fp, #-152]
	cmp	r3, #4
	bne	.L81
	add	r6, r6, #4
	ldr	r2, [r6]	@ float
	ldr	r3, [fp, #-136]
	lsl	r3, r3, #2
	sub	r1, fp, #36
	add	r3, r1, r3
	str	r2, [r3, #-12]	@ float
	add	r8, r8, #4
	ldr	r3, [r8]	@ float
	str	r3, [r6]	@ float
	ldr	r3, [fp, #-136]
	lsl	r3, r3, #2
	sub	r2, fp, #36
	add	r3, r2, r3
	ldr	r3, [r3, #-12]	@ float
	str	r3, [r8]	@ float
.L81:
	ldr	r3, [fp, #-136]
	add	r3, r3, #1
	str	r3, [fp, #-136]
.L80:
	ldr	r3, [fp, #-136]
	cmp	r3, #1
	ble	.L82
	ldr	r3, [fp, #-140]
	add	r3, r3, #2
	str	r3, [fp, #-140]
.L79:
	ldr	r2, [fp, #-140]
	ldr	r3, [fp, #-148]
	cmp	r2, r3
	blt	.L83
	nop
	ldr	r3, .L85
	ldr	r2, [r3]
	ldr	r3, [fp, #-40]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L84
	bl	__stack_chk_fail
.L84:
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L86:
	.align	2
.L85:
	.word	.LC0
	.word	1413754136
	.word	1074340347
	.word	1072693248
	.word	1071644672
	.size	postproc, .-postproc
	.align	2
	.global	combine
	.syntax unified
	.arm
	.fpu softvfp
	.type	combine, %function
combine:
	@ args = 16, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #16
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	str	r2, [fp, #-40]
	str	r3, [fp, #-44]
	ldr	r4, [fp, #-32]
	ldr	r5, [fp, #-36]
	ldr	r3, [fp, #-44]
	cmp	r3, #4
	bne	.L88
	mov	r6, #0
	b	.L89
.L90:
	mov	r7, r5
	add	r5, r7, #4
	ldr	r8, [r7]	@ float
	ldr	r3, [r4]	@ float
	ldr	r1, [fp, #4]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	add	r3, r4, #4
	ldr	r3, [r3]	@ float
	ldr	r1, [fp, #8]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r7]	@ float
	mov	r7, r5
	add	r5, r7, #4
	ldr	r8, [r7]	@ float
	add	r3, r4, #4
	ldr	r3, [r3]	@ float
	ldr	r1, [fp, #4]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [r4]	@ float
	ldr	r1, [fp, #8]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r7]	@ float
	mov	r7, r5
	add	r5, r7, #4
	ldr	r8, [r7]	@ float
	ldr	r3, [r4]	@ float
	ldr	r1, [fp, #12]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	add	r3, r4, #4
	ldr	r3, [r3]	@ float
	ldr	r1, [fp, #16]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r7]	@ float
	mov	r7, r5
	add	r5, r7, #4
	ldr	r8, [r7]	@ float
	add	r3, r4, #4
	ldr	r3, [r3]	@ float
	ldr	r1, [fp, #12]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	ldr	r3, [r4]	@ float
	ldr	r1, [fp, #16]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r7]	@ float
	add	r4, r4, #8
	add	r6, r6, #1
.L89:
	ldr	r3, [fp, #-40]
	cmp	r6, r3
	blt	.L90
	b	.L94
.L88:
	mov	r6, #0
	b	.L92
.L93:
	mov	r7, r5
	add	r5, r7, #4
	ldr	r8, [r7]	@ float
	ldr	r3, [r4]	@ float
	ldr	r1, [fp, #4]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	add	r3, r4, #4
	ldr	r3, [r3]	@ float
	ldr	r1, [fp, #8]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r7]	@ float
	mov	r7, r5
	add	r5, r7, #4
	ldr	r8, [r7]	@ float
	ldr	r3, [r4]	@ float
	ldr	r1, [fp, #12]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r9, r3
	add	r3, r4, #4
	ldr	r3, [r3]	@ float
	ldr	r1, [fp, #16]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r1, r3
	mov	r0, r9
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r1, r3
	mov	r0, r8
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [r7]	@ float
	add	r4, r4, #8
	add	r6, r6, #1
.L92:
	ldr	r3, [fp, #-40]
	cmp	r6, r3
	blt	.L93
.L94:
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	combine, .-combine
	.align	2
	.global	shiftComplexData
	.syntax unified
	.arm
	.fpu softvfp
	.type	shiftComplexData, %function
shiftComplexData:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, fp}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	beq	.L108
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	ble	.L98
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-20]
	sub	r3, r2, r3
	ldr	r2, [fp, #-24]
	cmp	r2, r3
	ble	.L99
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-20]
	sub	r3, r2, r3
	str	r3, [fp, #-24]
.L99:
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #3
	sub	r3, r3, #4
	ldr	r2, [fp, #-16]
	add	r6, r2, r3
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	lsl	r3, r3, #3
	sub	r3, r3, #4
	ldr	r2, [fp, #-16]
	add	r5, r2, r3
	mov	r4, #0
	b	.L100
.L101:
	mov	r2, r6
	sub	r6, r2, #4
	mov	r3, r5
	sub	r5, r3, #4
	ldr	r2, [r2]	@ float
	str	r2, [r3]	@ float
	mov	r2, r6
	sub	r6, r2, #4
	mov	r3, r5
	sub	r5, r3, #4
	ldr	r2, [r2]	@ float
	str	r2, [r3]	@ float
	add	r4, r4, #1
.L100:
	ldr	r3, [fp, #-24]
	cmp	r4, r3
	blt	.L101
	mov	r4, #0
	b	.L102
.L103:
	mov	r3, r5
	sub	r5, r3, #4
	mov	r2, #0
	str	r2, [r3]	@ float
	mov	r3, r5
	sub	r5, r3, #4
	mov	r2, #0
	str	r2, [r3]	@ float
	add	r4, r4, #1
.L102:
	ldr	r3, [fp, #-20]
	cmp	r4, r3
	blt	.L103
	b	.L95
.L98:
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bge	.L95
	ldr	r3, [fp, #-20]
	rsb	r3, r3, #0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-16]
	add	r6, r2, r3
	ldr	r5, [fp, #-16]
	mov	r4, #0
	b	.L104
.L105:
	mov	r2, r6
	add	r6, r2, #4
	mov	r3, r5
	add	r5, r3, #4
	ldr	r2, [r2]	@ float
	str	r2, [r3]	@ float
	mov	r2, r6
	add	r6, r2, #4
	mov	r3, r5
	add	r5, r3, #4
	ldr	r2, [r2]	@ float
	str	r2, [r3]	@ float
	add	r4, r4, #1
.L104:
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-20]
	sub	r3, r2, r3
	cmp	r4, r3
	blt	.L105
	mov	r4, #0
	b	.L106
.L107:
	mov	r3, r5
	add	r5, r3, #4
	mov	r2, #0
	str	r2, [r3]	@ float
	mov	r3, r5
	add	r5, r3, #4
	mov	r2, #0
	str	r2, [r3]	@ float
	add	r4, r4, #1
.L106:
	ldr	r3, [fp, #-20]
	cmp	r4, r3
	blt	.L107
	b	.L95
.L108:
	nop
.L95:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, r6, fp}
	bx	lr
	.size	shiftComplexData, .-shiftComplexData
	.align	2
	.global	negateimaginary
	.syntax unified
	.arm
	.fpu softvfp
	.type	negateimaginary, %function
negateimaginary:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, fp}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-24]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	lsl	r3, r3, #2
	ldr	r2, [fp, #-16]
	add	r4, r2, r3
	ldr	r3, [fp, #-24]
	cmp	r3, #4
	bne	.L110
	mov	r5, #0
	b	.L111
.L112:
	mov	r3, r4
	add	r4, r3, #4
	ldr	r2, [r3]	@ float
	eor	r2, r2, #-2147483648
	str	r2, [r3]	@ float
	mov	r3, r4
	add	r4, r3, #4
	ldr	r2, [r3]	@ float
	eor	r2, r2, #-2147483648
	str	r2, [r3]	@ float
	add	r4, r4, #8
	add	r5, r5, #1
.L111:
	ldr	r3, [fp, #-20]
	cmp	r5, r3
	blt	.L112
	b	.L116
.L110:
	mov	r5, #0
	b	.L114
.L115:
	ldr	r3, [r4]	@ float
	eor	r3, r3, #-2147483648
	str	r3, [r4]	@ float
	add	r4, r4, #8
	add	r5, r5, #1
.L114:
	ldr	r3, [fp, #-20]
	cmp	r5, r3
	blt	.L115
.L116:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, r5, fp}
	bx	lr
	.size	negateimaginary, .-negateimaginary
	.global	__aeabi_i2f
	.align	2
	.global	cnvrts32
	.syntax unified
	.arm
	.fpu softvfp
	.type	cnvrts32, %function
cnvrts32:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]	@ float
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	ldr	r3, [fp, #4]
	cmp	r3, #0
	bge	.L118
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-28]
	add	r6, r2, r3
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #4]
	sub	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r5, r2, r3
	mov	r4, #0
	b	.L119
.L120:
	sub	r6, r6, #4
	ldr	r3, [r6]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r5, r5, #4
	ldr	r1, [fp, #-24]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [r5]	@ float
	add	r4, r4, #1
.L119:
	ldr	r3, [fp, #-36]
	cmp	r4, r3
	blt	.L120
	mov	r4, #0
	b	.L121
.L122:
	sub	r5, r5, #4
	mov	r3, #0
	str	r3, [r5]	@ float
	add	r4, r4, #1
.L121:
	ldr	r3, [fp, #4]
	rsb	r3, r3, #0
	cmp	r4, r3
	blt	.L122
	b	.L126
.L118:
	ldr	r3, [fp, #4]
	lsl	r3, r3, #2
	ldr	r2, [fp, #-28]
	add	r6, r2, r3
	ldr	r5, [fp, #-32]
	mov	r4, #0
	b	.L124
.L125:
	mov	r3, r6
	add	r6, r3, #4
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r7, r5
	add	r5, r7, #4
	ldr	r1, [fp, #-24]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [r7]	@ float
	add	r4, r4, #1
.L124:
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #4]
	sub	r3, r2, r3
	cmp	r4, r3
	blt	.L125
.L126:
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	cnvrts32, .-cnvrts32
	.align	2
	.global	cnvrts16
	.syntax unified
	.arm
	.fpu softvfp
	.type	cnvrts16, %function
cnvrts16:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #16
	str	r0, [fp, #-24]	@ float
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	ldr	r3, [fp, #4]
	cmp	r3, #0
	bge	.L128
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #1
	ldr	r2, [fp, #-28]
	add	r6, r2, r3
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #4]
	sub	r3, r2, r3
	lsl	r3, r3, #2
	ldr	r2, [fp, #-32]
	add	r5, r2, r3
	mov	r4, #0
	b	.L129
.L130:
	sub	r6, r6, #2
	ldrsh	r3, [r6]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	sub	r5, r5, #4
	ldr	r1, [fp, #-24]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [r5]	@ float
	add	r4, r4, #1
.L129:
	ldr	r3, [fp, #-36]
	cmp	r4, r3
	blt	.L130
	mov	r4, #0
	b	.L131
.L132:
	sub	r5, r5, #4
	mov	r3, #0
	str	r3, [r5]	@ float
	add	r4, r4, #1
.L131:
	ldr	r3, [fp, #4]
	rsb	r3, r3, #0
	cmp	r4, r3
	blt	.L132
	b	.L136
.L128:
	ldr	r3, [fp, #4]
	lsl	r3, r3, #1
	ldr	r2, [fp, #-28]
	add	r6, r2, r3
	ldr	r5, [fp, #-32]
	mov	r4, #0
	b	.L134
.L135:
	mov	r3, r6
	add	r6, r3, #2
	ldrsh	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r7, r5
	add	r5, r7, #4
	ldr	r1, [fp, #-24]	@ float
	mov	r0, r3
	bl	__aeabi_fmul
	mov	r3, r0
	str	r3, [r7]	@ float
	add	r4, r4, #1
.L134:
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #4]
	sub	r3, r2, r3
	cmp	r4, r3
	blt	.L135
.L136:
	nop
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	cnvrts16, .-cnvrts16
	.align	2
	.global	AP_bootup_msg
	.syntax unified
	.arm
	.fpu softvfp
	.type	AP_bootup_msg, %function
AP_bootup_msg:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	AP_bootup_msg, .-AP_bootup_msg
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
