	.file	"315745.c"
	.intel_syntax noprefix
	.text
	.globl	c
	.bss
	.align 8
	.type	c, @object
	.size	c, 8
c:
	.zero	8
	.globl	QUBITS
	.align 8
	.type	QUBITS, @object
	.size	QUBITS, 8
QUBITS:
	.zero	8
	.globl	N
	.align 8
	.type	N, @object
	.size	N, 8
N:
	.zero	8
	.text
	.type	H, @function
H:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -72[rbp], rdi
	mov	rax, QWORD PTR -72[rbp]
	mov	rdx, -1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	not	rax
	mov	QWORD PTR -32[rbp], rax
	sal	QWORD PTR -40[rbp]
	mov	QWORD PTR -48[rbp], 0
	jmp	.L2
.L3:
	mov	rax, QWORD PTR -48[rbp]
	add	rax, rax
	and	rax, QWORD PTR -40[rbp]
	mov	rdx, rax
	mov	rax, QWORD PTR -48[rbp]
	and	rax, QWORD PTR -32[rbp]
	or	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -72[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	or	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -24[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm1, DWORD PTR [rax]
	movss	xmm0, DWORD PTR 4[rax]
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -16[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm3, DWORD PTR [rax]
	movss	xmm2, DWORD PTR 4[rax]
	subss	xmm1, xmm3
	subss	xmm0, xmm2
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	mulsd	xmm0, xmm2
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -56[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	mulsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -52[rbp], xmm0
	movss	xmm0, DWORD PTR -52[rbp]
	movss	xmm1, DWORD PTR -56[rbp]
	movss	DWORD PTR -8[rbp], xmm1
	movss	DWORD PTR -4[rbp], xmm0
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -24[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm3, DWORD PTR [rax]
	movss	xmm1, DWORD PTR 4[rax]
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -16[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm2, DWORD PTR [rax]
	movss	xmm0, DWORD PTR 4[rax]
	addss	xmm2, xmm3
	addss	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm2
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	mulsd	xmm0, xmm1
	pxor	xmm1, xmm1
	cvtsd2ss	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC2[rip]
	mulsd	xmm0, xmm2
	cvtsd2ss	xmm0, xmm0
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -24[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	DWORD PTR [rax], xmm1
	movss	DWORD PTR 4[rax], xmm0
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -16[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm0, DWORD PTR -56[rbp]
	movss	DWORD PTR [rax], xmm0
	movss	xmm0, DWORD PTR -52[rbp]
	movss	DWORD PTR 4[rax], xmm0
	add	QWORD PTR -48[rbp], 1
.L2:
	mov	rax, QWORD PTR N[rip]
	mov	rdx, rax
	shr	rdx, 63
	add	rax, rdx
	sar	rax
	cmp	QWORD PTR -48[rbp], rax
	jl	.L3
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	H, .-H
	.type	SWAP, @function
SWAP:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	mov	rax, QWORD PTR -56[rbp]
	cmp	rax, QWORD PTR -64[rbp]
	jle	.L6
	mov	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	mov	QWORD PTR -56[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -64[rbp], rax
.L6:
	mov	QWORD PTR -48[rbp], 0
	jmp	.L7
.L9:
	mov	rax, QWORD PTR -56[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	xor	rax, QWORD PTR -48[rbp]
	mov	rdx, rax
	mov	rax, QWORD PTR -64[rbp]
	mov	esi, 1
	mov	ecx, eax
	sal	rsi, cl
	mov	rax, rsi
	xor	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	cmp	rax, QWORD PTR -48[rbp]
	jle	.L8
	mov	rax, QWORD PTR -56[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -48[rbp]
	mov	ecx, edx
	sar	rax, cl
	and	eax, 1
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -48[rbp]
	mov	ecx, edx
	sar	rax, cl
	and	eax, 1
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	cmp	rax, QWORD PTR -16[rbp]
	je	.L8
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -48[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm0, DWORD PTR [rax]
	movss	DWORD PTR -8[rbp], xmm0
	movss	xmm0, DWORD PTR 4[rax]
	movss	DWORD PTR -4[rbp], xmm0
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -32[rbp]
	sal	rax, 3
	add	rdx, rax
	mov	rcx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -48[rbp]
	sal	rax, 3
	add	rax, rcx
	movss	xmm1, DWORD PTR [rdx]
	movss	xmm0, DWORD PTR 4[rdx]
	movss	DWORD PTR [rax], xmm1
	movss	DWORD PTR 4[rax], xmm0
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -32[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm0, DWORD PTR -8[rbp]
	movss	DWORD PTR [rax], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	movss	DWORD PTR 4[rax], xmm0
.L8:
	add	QWORD PTR -48[rbp], 1
.L7:
	mov	rax, QWORD PTR N[rip]
	cmp	QWORD PTR -48[rbp], rax
	jl	.L9
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	SWAP, .-SWAP
	.type	init_expphase, @function
init_expphase:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	QWORD PTR -24[rbp], 1
	jmp	.L12
.L13:
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, QWORD PTR -24[rbp]
	movss	xmm1, DWORD PTR .LC3[rip]
	xorps	xmm0, xmm1
	movaps	xmm1, xmm0
	movss	xmm0, DWORD PTR .LC4[rip]
	call	powf@PLT
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC5[rip]
	mulsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	movss	DWORD PTR -28[rbp], xmm0
	movss	xmm0, DWORD PTR -28[rbp]
	pxor	xmm1, xmm1
	mulss	xmm1, xmm0
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -48[rbp]
	lea	rbx, [rdx+rax]
	movss	DWORD PTR -56[rbp], xmm1
	movss	DWORD PTR -52[rbp], xmm0
	mov	rax, QWORD PTR -56[rbp]
	movq	xmm0, rax
	call	cexpf@PLT
	movq	rax, xmm0
	mov	QWORD PTR -64[rbp], rax
	movss	xmm1, DWORD PTR -64[rbp]
	movss	xmm0, DWORD PTR -60[rbp]
	movss	DWORD PTR [rbx], xmm1
	movss	DWORD PTR 4[rbx], xmm0
	add	QWORD PTR -24[rbp], 1
.L12:
	mov	rax, QWORD PTR -24[rbp]
	cmp	rax, QWORD PTR -40[rbp]
	jle	.L13
	nop
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	init_expphase, .-init_expphase
	.type	CPN, @function
CPN:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 88
	.cfi_offset 3, -24
	mov	QWORD PTR -72[rbp], rdi
	mov	QWORD PTR -80[rbp], rsi
	mov	QWORD PTR -88[rbp], rdx
	mov	QWORD PTR -56[rbp], 0
	jmp	.L15
.L20:
	mov	rax, QWORD PTR -72[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -56[rbp]
	mov	ecx, edx
	sar	rax, cl
	and	eax, 1
	mov	QWORD PTR -40[rbp], rax
	cmp	QWORD PTR -40[rbp], 1
	jne	.L16
	mov	QWORD PTR -48[rbp], 1
	jmp	.L17
.L19:
	mov	rax, QWORD PTR -72[rbp]
	sub	rax, QWORD PTR -48[rbp]
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	js	.L18
	mov	rax, QWORD PTR -32[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -56[rbp]
	mov	ecx, edx
	sar	rax, cl
	and	eax, 1
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 1
	jne	.L18
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 3
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	movss	xmm0, DWORD PTR 4[rax]
	mov	rax, QWORD PTR -48[rbp]
	lea	rcx, 0[0+rax*8]
	mov	rax, QWORD PTR -88[rbp]
	add	rax, rcx
	movss	xmm1, DWORD PTR [rax]
	movss	xmm2, DWORD PTR 4[rax]
	mov	rcx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 3
	lea	rbx, [rcx+rax]
	movaps	xmm3, xmm2
	movaps	xmm2, xmm1
	movaps	xmm1, xmm0
	movd	xmm0, edx
	call	__mulsc3@PLT
	movq	rax, xmm0
	mov	QWORD PTR -96[rbp], rax
	movss	xmm1, DWORD PTR -96[rbp]
	movss	xmm0, DWORD PTR -92[rbp]
	movss	DWORD PTR [rbx], xmm1
	movss	DWORD PTR 4[rbx], xmm0
.L18:
	add	QWORD PTR -48[rbp], 1
.L17:
	mov	rax, QWORD PTR -48[rbp]
	cmp	rax, QWORD PTR -80[rbp]
	jle	.L19
.L16:
	add	QWORD PTR -56[rbp], 1
.L15:
	mov	rax, QWORD PTR N[rip]
	cmp	QWORD PTR -56[rbp], rax
	jl	.L20
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	CPN, .-CPN
	.type	min, @function
min:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	cmp	rax, QWORD PTR -16[rbp]
	jge	.L23
	mov	rax, QWORD PTR -8[rbp]
	jmp	.L24
.L23:
	mov	rax, QWORD PTR -16[rbp]
.L24:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	min, .-min
	.type	powmod, @function
powmod:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	QWORD PTR -16[rbp], 1
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	jmp	.L26
.L28:
	mov	rax, QWORD PTR -32[rbp]
	and	eax, 1
	test	rax, rax
	je	.L27
	mov	rax, QWORD PTR -16[rbp]
	imul	rax, QWORD PTR -8[rbp]
	cqo
	idiv	QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rdx
.L27:
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, rax
	cqo
	idiv	QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rdx
	sar	QWORD PTR -32[rbp]
.L26:
	cmp	QWORD PTR -32[rbp], 0
	jg	.L28
	mov	rax, QWORD PTR -16[rbp]
	cqo
	idiv	QWORD PTR -40[rbp]
	mov	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	powmod, .-powmod
	.section	.rodata
.LC7:
	.string	"Not using OpenMP\n"
	.align 8
.LC8:
	.string	"Qubits      Factors    Probability   Time   Coeffs/s  Coeffs/s/thread  Pass"
.LC9:
	.string	"Error n*n>=N"
.LC16:
	.string	"%ld*%ld "
.LC17:
	.string	"yes"
.LC18:
	.string	"no"
	.align 8
.LC19:
	.string	" %ld  %12s  %13.6f   %10.4e  %10.4e  %10.4e %4s\n"
	.align 32
.LC0:
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	3
	.quad	3
	.quad	3
	.quad	5
	.quad	7
	.quad	5
	.quad	11
	.quad	11
	.quad	5
	.quad	19
	.quad	23
	.quad	19
	.quad	23
	.quad	29
	.quad	47
	.quad	29
	.quad	29
	.quad	47
	.quad	71
	.quad	83
	.quad	79
	.quad	103
	.quad	149
	.quad	101
	.quad	149
	.quad	269
	.quad	167
	.quad	479
	.quad	479
	.quad	367
	.quad	859
	.quad	563
	.quad	1039
	.quad	947
	.quad	1307
	.quad	2027
	.quad	2039
	.quad	2357
	.quad	2237
	.quad	3917
	.quad	4127
	.quad	4813
	.quad	6173
	.quad	6029
	.quad	7243
	.quad	10357
	.quad	12757
	.quad	11399
	.quad	19427
	.quad	20771
	.quad	24847
	.quad	27779
	.align 32
.LC1:
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	7
	.quad	7
	.quad	13
	.quad	11
	.quad	11
	.quad	23
	.quad	13
	.quad	23
	.quad	71
	.quad	23
	.quad	29
	.quad	53
	.quad	61
	.quad	67
	.quad	61
	.quad	139
	.quad	199
	.quad	173
	.quad	163
	.quad	197
	.quad	293
	.quad	317
	.quad	311
	.quad	647
	.quad	619
	.quad	487
	.quad	1109
	.quad	547
	.quad	773
	.quad	1427
	.quad	863
	.quad	1861
	.quad	1427
	.quad	2213
	.quad	2269
	.quad	2069
	.quad	2909
	.quad	3559
	.quad	5303
	.quad	4283
	.quad	5749
	.quad	6971
	.quad	7687
	.quad	11131
	.quad	13103
	.quad	12959
	.quad	14879
	.quad	23549
	.quad	19541
	.quad	25847
	.quad	30557
	.quad	38653
	.align 4
.LC11:
	.long	0
	.long	0
	.align 4
.LC12:
	.long	1065353216
	.long	0
	.text
	.globl	main
	.type	main, @function
main:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 1256
	.cfi_offset 3, -24
	mov	DWORD PTR -1236[rbp], edi
	mov	QWORD PTR -1248[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	QWORD PTR -1184[rbp], 1
	mov	QWORD PTR -1176[rbp], 0
	lea	rax, -1056[rbp]
	lea	rdx, .LC0[rip]
	mov	ecx, 61
	mov	rdi, rax
	mov	rsi, rdx
	rep movsq
	lea	rax, -560[rbp]
	lea	rdx, .LC1[rip]
	mov	ecx, 61
	mov	rdi, rax
	mov	rsi, rdx
	rep movsq
	mov	QWORD PTR -1184[rbp], 1
	lea	rdi, .LC7[rip]
	call	puts@PLT
	lea	rdi, .LC8[rip]
	call	puts@PLT
	mov	QWORD PTR -1168[rbp], 7
	mov	rax, QWORD PTR -1168[rbp]
	sal	rax, 3
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -1176[rbp], rax
	mov	rdx, QWORD PTR -1176[rbp]
	mov	rax, QWORD PTR -1168[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	init_expphase
	mov	QWORD PTR QUBITS[rip], 9
	jmp	.L31
.L48:
	mov	rax, QWORD PTR QUBITS[rip]
	mov	edx, 1
	mov	ecx, eax
	sal	rdx, cl
	mov	rax, rdx
	mov	QWORD PTR N[rip], rax
	mov	rax, QWORD PTR N[rip]
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR c[rip]
	mov	rsi, rdx
	mov	rdi, rax
	call	realloc@PLT
	mov	QWORD PTR c[rip], rax
	mov	rax, QWORD PTR QUBITS[rip]
	mov	rdx, QWORD PTR -1056[rbp+rax*8]
	mov	rax, QWORD PTR QUBITS[rip]
	mov	rax, QWORD PTR -560[rbp+rax*8]
	imul	rax, rdx
	mov	QWORD PTR -1160[rbp], rax
	mov	rax, QWORD PTR QUBITS[rip]
	mov	rax, QWORD PTR -1056[rbp+rax*8]
	lea	rdx, -1[rax]
	mov	rax, QWORD PTR QUBITS[rip]
	mov	rax, QWORD PTR -560[rbp+rax*8]
	sub	rax, 1
	imul	rax, rdx
	mov	QWORD PTR -1152[rbp], rax
	mov	rax, QWORD PTR N[rip]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, QWORD PTR -1152[rbp]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -1144[rbp], xmm0
	mov	rax, QWORD PTR -1160[rbp]
	imul	rax, rax
	mov	rdx, rax
	mov	rax, QWORD PTR N[rip]
	cmp	rdx, rax
	jl	.L32
	lea	rdi, .LC9[rip]
	call	puts@PLT
	mov	edi, 1
	call	exit@PLT
.L32:
	pxor	xmm0, xmm0
	movsd	QWORD PTR -1192[rbp], xmm0
	mov	QWORD PTR -1224[rbp], 0
	jmp	.L33
.L35:
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -1224[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm0, DWORD PTR .LC11[rip]
	movss	DWORD PTR [rax], xmm0
	movss	xmm0, DWORD PTR .LC11[rip+4]
	movss	DWORD PTR 4[rax], xmm0
	mov	rdx, QWORD PTR -1160[rbp]
	mov	rax, QWORD PTR -1224[rbp]
	mov	rsi, rax
	mov	edi, 2
	call	powmod
	mov	QWORD PTR -1096[rbp], rax
	cmp	QWORD PTR -1096[rbp], 1
	jne	.L34
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -1224[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm0, DWORD PTR .LC12[rip]
	movss	DWORD PTR [rax], xmm0
	movss	xmm0, DWORD PTR .LC12[rip+4]
	movss	DWORD PTR 4[rax], xmm0
	movsd	xmm1, QWORD PTR -1192[rbp]
	movsd	xmm0, QWORD PTR .LC13[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -1192[rbp], xmm0
.L34:
	add	QWORD PTR -1224[rbp], 1
.L33:
	mov	rax, QWORD PTR N[rip]
	cmp	QWORD PTR -1224[rbp], rax
	jl	.L35
	mov	rax, QWORD PTR -1192[rbp]
	movq	xmm0, rax
	call	sqrt@PLT
	movapd	xmm1, xmm0
	movsd	xmm0, QWORD PTR .LC13[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -1192[rbp], xmm0
	mov	QWORD PTR -1224[rbp], 0
	jmp	.L36
.L37:
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -1224[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	xmm1, DWORD PTR [rax]
	movss	xmm0, DWORD PTR 4[rax]
	cvtss2sd	xmm1, xmm1
	pxor	xmm2, xmm2
	cvtss2sd	xmm2, xmm0
	movsd	xmm0, QWORD PTR -1192[rbp]
	mulsd	xmm1, xmm0
	cvtsd2ss	xmm1, xmm1
	mulsd	xmm0, xmm2
	cvtsd2ss	xmm0, xmm0
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -1224[rbp]
	sal	rax, 3
	add	rax, rdx
	movss	DWORD PTR [rax], xmm1
	movss	DWORD PTR 4[rax], xmm0
	add	QWORD PTR -1224[rbp], 1
.L36:
	mov	rax, QWORD PTR N[rip]
	cmp	QWORD PTR -1224[rbp], rax
	jl	.L37
	mov	rax, QWORD PTR QUBITS[rip]
	pxor	xmm5, xmm5
	cvtsi2sd	xmm5, rax
	movq	rax, xmm5
	movq	xmm0, rax
	call	log2@PLT
	cvttsd2si	rax, xmm0
	add	rax, 1
	mov	QWORD PTR -1136[rbp], rax
	lea	rax, -1088[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	mov	QWORD PTR -1208[rbp], 0
	mov	rax, QWORD PTR QUBITS[rip]
	sub	rax, 1
	mov	QWORD PTR -1216[rbp], rax
	jmp	.L38
.L39:
	mov	rax, QWORD PTR -1216[rbp]
	mov	rdi, rax
	call	H
	mov	rdx, QWORD PTR -1176[rbp]
	mov	rcx, QWORD PTR -1136[rbp]
	mov	rax, QWORD PTR -1216[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	CPN
	mov	rax, QWORD PTR -1208[rbp]
	lea	rbx, 1[rax]
	mov	rdx, QWORD PTR -1136[rbp]
	mov	rax, QWORD PTR -1216[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	min
	add	rax, rbx
	mov	QWORD PTR -1208[rbp], rax
	sub	QWORD PTR -1216[rbp], 1
.L38:
	cmp	QWORD PTR -1216[rbp], 0
	jns	.L39
	mov	QWORD PTR -1216[rbp], 0
	jmp	.L40
.L41:
	mov	rax, QWORD PTR QUBITS[rip]
	sub	rax, QWORD PTR -1216[rbp]
	lea	rdx, -1[rax]
	mov	rax, QWORD PTR -1216[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	SWAP
	add	QWORD PTR -1208[rbp], 1
	add	QWORD PTR -1216[rbp], 1
.L40:
	mov	rax, QWORD PTR QUBITS[rip]
	mov	rdx, rax
	shr	rdx, 63
	add	rax, rdx
	sar	rax
	cmp	QWORD PTR -1216[rbp], rax
	jl	.L41
	lea	rax, -1072[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	clock_gettime@PLT
	mov	rax, QWORD PTR -1072[rbp]
	mov	rdx, QWORD PTR -1088[rbp]
	sub	rax, rdx
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, rax
	mov	rax, QWORD PTR -1064[rbp]
	mov	rdx, QWORD PTR -1080[rbp]
	sub	rax, rdx
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, rax
	movsd	xmm0, QWORD PTR .LC14[rip]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	movsd	QWORD PTR -1128[rbp], xmm0
	mov	rax, QWORD PTR N[rip]
	imul	rax, QWORD PTR -1208[rbp]
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, rax
	divsd	xmm0, QWORD PTR -1128[rbp]
	movsd	QWORD PTR -1120[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -1200[rbp], xmm0
	mov	rax, QWORD PTR -1152[rbp]
	mov	QWORD PTR -1112[rbp], rax
	mov	QWORD PTR -1232[rbp], 0
	jmp	.L42
.L44:
	cmp	QWORD PTR -1232[rbp], 0
	jle	.L43
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, QWORD PTR -1232[rbp]
	movapd	xmm1, xmm0
	mulsd	xmm1, QWORD PTR -1144[rbp]
	movsd	xmm0, QWORD PTR .LC15[rip]
	addsd	xmm0, xmm1
	cvttsd2si	rax, xmm0
	mov	QWORD PTR -1104[rbp], rax
	cmp	QWORD PTR -1104[rbp], 0
	js	.L43
	mov	rax, QWORD PTR N[rip]
	cmp	QWORD PTR -1104[rbp], rax
	jge	.L43
	mov	rdx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -1104[rbp]
	sal	rax, 3
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	movss	xmm4, DWORD PTR 4[rax]
	mov	rcx, QWORD PTR c[rip]
	mov	rax, QWORD PTR -1104[rbp]
	sal	rax, 3
	add	rax, rcx
	movss	xmm2, DWORD PTR [rax]
	movss	xmm0, DWORD PTR 4[rax]
	movss	xmm1, DWORD PTR .LC3[rip]
	xorps	xmm0, xmm1
	movaps	xmm3, xmm0
	movaps	xmm1, xmm4
	movd	xmm0, edx
	call	__mulsc3@PLT
	movq	rax, xmm0
	mov	QWORD PTR -1256[rbp], rax
	movss	xmm0, DWORD PTR -1256[rbp]
	cvtss2sd	xmm0, xmm0
	movsd	xmm1, QWORD PTR -1200[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -1200[rbp], xmm0
.L43:
	add	QWORD PTR -1232[rbp], 1
.L42:
	mov	rax, QWORD PTR -1232[rbp]
	cmp	rax, QWORD PTR -1112[rbp]
	jle	.L44
	mov	rax, QWORD PTR QUBITS[rip]
	mov	rcx, QWORD PTR -560[rbp+rax*8]
	mov	rax, QWORD PTR QUBITS[rip]
	mov	rdx, QWORD PTR -1056[rbp+rax*8]
	lea	rax, -64[rbp]
	lea	rsi, .LC16[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	movsd	xmm0, QWORD PTR -1200[rbp]
	comisd	xmm0, QWORD PTR .LC15[rip]
	jbe	.L52
	lea	rax, .LC17[rip]
	jmp	.L47
.L52:
	lea	rax, .LC18[rip]
.L47:
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, QWORD PTR -1184[rbp]
	movsd	xmm0, QWORD PTR -1120[rbp]
	movapd	xmm2, xmm0
	divsd	xmm2, xmm1
	mov	rsi, QWORD PTR QUBITS[rip]
	movsd	xmm1, QWORD PTR -1120[rbp]
	movsd	xmm0, QWORD PTR -1128[rbp]
	mov	rdi, QWORD PTR -1200[rbp]
	lea	rdx, -64[rbp]
	mov	rcx, rax
	movapd	xmm3, xmm2
	movapd	xmm2, xmm1
	movapd	xmm1, xmm0
	movq	xmm0, rdi
	lea	rdi, .LC19[rip]
	mov	eax, 4
	call	printf@PLT
	mov	rax, QWORD PTR stdout[rip]
	mov	rdi, rax
	call	fflush@PLT
	mov	rax, QWORD PTR QUBITS[rip]
	add	rax, 1
	mov	QWORD PTR QUBITS[rip], rax
.L31:
	mov	rax, QWORD PTR QUBITS[rip]
	cmp	rax, 60
	jle	.L48
	mov	rax, QWORD PTR -1176[rbp]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR c[rip]
	mov	rdi, rax
	call	free@PLT
	mov	eax, 0
	mov	rbx, QWORD PTR -24[rbp]
	sub	rbx, QWORD PTR fs:40
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	main, .-main
	.section	.rodata
	.align 8
.LC2:
	.long	1719614413
	.long	1072079006
	.align 16
.LC3:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.align 4
.LC4:
	.long	1073741824
	.align 8
.LC5:
	.long	1413754136
	.long	1074340347
	.align 8
.LC13:
	.long	0
	.long	1072693248
	.align 8
.LC14:
	.long	-400107883
	.long	1041313291
	.align 8
.LC15:
	.long	0
	.long	1071644672
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"315745.c"
	.text
	.global	c
	.bss
	.align	2
	.type	c, %object
	.size	c, 4
c:
	.space	4
	.comm	QUBITS,8,8
	.comm	N,8,8
	.global	__aeabi_fsub
	.global	__aeabi_f2d
	.global	__aeabi_dmul
	.global	__aeabi_d2f
	.global	__aeabi_fadd
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	H, %function
H:
	@ args = 0, pretend = 0, frame = 128
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #128
	str	r0, [fp, #-92]
	str	r1, [fp, #-88]
	ldr	r1, [fp, #-92]
	mvn	r2, #0
	mvn	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	str	r4, [fp, #-68]
	str	r5, [fp, #-64]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mvn	r6, r2
	mvn	r7, r3
	str	r6, [fp, #-60]
	str	r7, [fp, #-56]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	adds	r8, r2, r2
	adc	r9, r3, r3
	str	r8, [fp, #-68]
	str	r9, [fp, #-64]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	b	.L2
.L3:
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	adds	r1, r2, r2
	str	r1, [fp, #-124]
	adc	r3, r3, r3
	str	r3, [fp, #-120]
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r2, fp, #108
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-132]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r1, [fp, #-92]
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	lr, r3, r1
	str	lr, [fp, #-96]
	ldr	lr, [fp, #-96]
	orr	ip, lr, r2, lsl ip
	str	ip, [fp, #-96]
	ldr	ip, [fp, #-96]
	orr	r0, ip, r2, lsr r0
	str	r0, [fp, #-96]
	lsl	r3, r2, r1
	str	r3, [fp, #-100]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-140]
	orr	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r3, .L5
	ldr	r2, [r3]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r0, [r3]	@ float
	ldr	r6, [r3, #4]	@ float
	ldr	r3, .L5
	ldr	r2, [r3]
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3]	@ float
	ldr	r4, [r3, #4]	@ float
	mov	r1, r2
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r5, r3
	mov	r1, r4
	mov	r0, r6
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r6, r3
	mov	r0, r5
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r2, .L5+4
	ldr	r3, .L5+8
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [fp, #-84]	@ float
	ldr	r2, .L5+4
	ldr	r3, .L5+8
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [fp, #-80]	@ float
	ldr	r2, [fp, #-80]	@ float
	ldr	r3, [fp, #-84]	@ float
	str	r3, [fp, #-36]	@ float
	str	r2, [fp, #-32]	@ float
	ldr	r3, .L5
	ldr	r2, [r3]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r0, [r3]	@ float
	ldr	r6, [r3, #4]	@ float
	ldr	r3, .L5
	ldr	r2, [r3]
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3]	@ float
	ldr	r4, [r3, #4]	@ float
	mov	r1, r2
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r5, r3
	mov	r1, r4
	mov	r0, r6
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r6, r3
	mov	r0, r5
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r2, .L5+4
	ldr	r3, .L5+8
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r4, r0
	ldr	r2, .L5+4
	ldr	r3, .L5+8
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r1, r0
	ldr	r3, .L5
	ldr	r2, [r3]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	str	r4, [r3]	@ float
	str	r1, [r3, #4]	@ float
	ldr	r3, .L5
	ldr	r2, [r3]
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r2, r2, r3
	ldr	r3, [fp, #-84]	@ float
	str	r3, [r2]	@ float
	ldr	r3, [fp, #-80]	@ float
	str	r3, [r2, #4]	@ float
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	adds	r1, r2, #1
	str	r1, [fp, #-148]
	adc	r3, r3, #0
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-76]
	str	r4, [fp, #-72]
.L2:
	ldr	r3, .L5+12
	ldmia	r3, {r0-r1}
	lsr	r3, r1, #31
	mov	r2, r3
	mov	r3, #0
	adds	ip, r2, r0
	str	ip, [fp, #-156]
	adc	r3, r3, r1
	str	r3, [fp, #-152]
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	lsr	r2, ip, #1
	mov	ip, r1
	orr	r2, r2, ip, lsl #31
	asr	r3, r1, #1
	mov	r0, r2
	mov	r1, r3
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	cmp	r2, r0
	sbcs	r3, r3, r1
	blt	.L3
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L6:
	.align	2
.L5:
	.word	c
	.word	1719614413
	.word	1072079006
	.word	N
	.size	H, .-H
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SWAP, %function
SWAP:
	@ args = 0, pretend = 0, frame = 112
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #112
	str	r0, [fp, #-84]
	str	r1, [fp, #-80]
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	cmp	r2, r0
	sbcs	r3, r3, r1
	bge	.L8
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
.L8:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	b	.L9
.L13:
	ldr	r1, [fp, #-84]
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	lr, r3, r1
	str	lr, [fp, #-96]
	ldr	lr, [fp, #-96]
	orr	ip, lr, r2, lsl ip
	str	ip, [fp, #-96]
	ldr	ip, [fp, #-96]
	orr	r0, ip, r2, lsr r0
	str	r0, [fp, #-96]
	lsl	r3, r2, r1
	str	r3, [fp, #-100]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-108]
	eor	r3, r1, r3
	str	r3, [fp, #-104]
	ldr	r1, [fp, #-92]
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r9, r3, r1
	orr	r9, r9, r2, lsl ip
	orr	r9, r9, r2, lsr r0
	lsl	r8, r2, r1
	sub	r3, fp, #108
	ldmia	r3, {r2-r3}
	mov	r1, r2
	eor	r1, r1, r8
	str	r1, [fp, #-116]
	eor	r3, r3, r9
	str	r3, [fp, #-112]
	sub	r3, fp, #116
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	cmp	r2, r0
	sbcs	r3, r3, r1
	bge	.L10
	ldr	r1, [fp, #-84]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	rsb	r0, r1, #32
	subs	ip, r1, #32
	lsr	r6, r2, r1
	orr	r6, r6, r3, lsl r0
	bmi	.L11
	orr	r6, r6, r3, asr ip
.L11:
	asr	r7, r3, r1
	mov	r2, #1
	mov	r3, #0
	and	r1, r6, r2
	str	r1, [fp, #-124]
	and	r3, r7, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	ldr	r1, [fp, #-92]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	rsb	r0, r1, #32
	subs	ip, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl r0
	bmi	.L12
	orr	r4, r4, r3, asr ip
.L12:
	asr	r5, r3, r1
	mov	r2, #1
	mov	r3, #0
	and	r1, r4, r2
	str	r1, [fp, #-132]
	and	r3, r5, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #132
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	cmp	r1, r3
	cmpeq	r0, r2
	beq	.L10
	ldr	r3, .L15
	ldr	r2, [r3]
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #3
	add	r2, r2, r3
	ldr	r3, [r2]	@ float
	str	r3, [fp, #-36]	@ float
	ldr	r3, [r2, #4]	@ float
	str	r3, [fp, #-32]	@ float
	ldr	r3, .L15
	ldr	r2, [r3]
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	add	r0, r2, r3
	ldr	r3, .L15
	ldr	r2, [r3]
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #3
	add	r1, r2, r3
	ldr	r2, [r0]	@ float
	ldr	r3, [r0, #4]	@ float
	str	r2, [r1]	@ float
	str	r3, [r1, #4]	@ float
	ldr	r3, .L15
	ldr	r2, [r3]
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	add	r2, r2, r3
	ldr	r3, [fp, #-36]	@ float
	str	r3, [r2]	@ float
	ldr	r3, [fp, #-32]	@ float
	str	r3, [r2, #4]	@ float
.L10:
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	adds	r1, r2, #1
	str	r1, [fp, #-140]
	adc	r3, r3, #0
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
.L9:
	ldr	r3, .L15+4
	ldmia	r3, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	cmp	r2, r0
	sbcs	r3, r3, r1
	blt	.L13
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L16:
	.align	2
.L15:
	.word	c
	.word	N
	.size	SWAP, .-SWAP
	.global	__aeabi_l2f
	.global	__aeabi_fmul
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_expphase, %function
init_expphase:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #52
	str	r0, [fp, #-52]
	str	r1, [fp, #-48]
	str	r2, [fp, #-56]
	ldr	r3, .L21
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	b	.L18
.L19:
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_l2f
	mov	r3, r0
	eor	r3, r3, #-2147483648
	mov	r1, r3
	mov	r0, #1073741824
	bl	powf
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	ldr	r2, .L21+4
	ldr	r3, .L21+8
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	str	r3, [fp, #-40]	@ float
	ldr	r6, [fp, #-40]	@ float
	mov	r1, #0
	mov	r0, r6
	bl	__aeabi_fmul
	mov	r3, r0
	mov	ip, r3
	mov	r0, r6
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-56]
	add	r6, r2, r3
	sub	r3, fp, #64
	mov	r1, ip
	mov	r2, r0
	mov	r0, r3
	bl	cexpf
	ldr	r2, [fp, #-64]	@ float
	ldr	r3, [fp, #-60]	@ float
	str	r2, [r6]	@ float
	str	r3, [r6, #4]	@ float
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	r4, r2, #1
	adc	r5, r3, #0
	str	r4, [fp, #-36]
	str	r5, [fp, #-32]
.L18:
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L19
	nop
	ldr	r3, .L21
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L20
	bl	__stack_chk_fail
.L20:
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L22:
	.align	2
.L21:
	.word	.LC2
	.word	1413754136
	.word	1074340347
	.size	init_expphase, .-init_expphase
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CPN, %function
CPN:
	@ args = 4, pretend = 0, frame = 120
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #128
	str	r0, [fp, #-84]
	str	r1, [fp, #-80]
	str	r2, [fp, #-92]
	str	r3, [fp, #-88]
	ldr	r3, [fp, #4]
	str	r3, [fp, #-96]
	ldr	r3, .L34
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	b	.L24
.L31:
	ldr	r1, [fp, #-84]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	rsb	r0, r1, #32
	subs	ip, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl r0
	bmi	.L25
	orr	r4, r4, r3, asr ip
.L25:
	asr	r5, r3, r1
	mov	r2, #1
	mov	r3, #0
	and	r1, r4, r2
	str	r1, [fp, #-116]
	and	r3, r5, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #116
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	cmp	r3, #0
	cmpeq	r2, #1
	bne	.L26
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	b	.L27
.L30:
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	subs	ip, r0, r2
	str	ip, [fp, #-124]
	sbc	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #124
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	cmp	r2, #0
	sbcs	r3, r3, #0
	blt	.L28
	ldr	r1, [fp, #-52]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	rsb	r0, r1, #32
	subs	ip, r1, #32
	lsr	r6, r2, r1
	orr	r6, r6, r3, lsl r0
	bmi	.L29
	orr	r6, r6, r3, asr ip
.L29:
	asr	r7, r3, r1
	mov	r2, #1
	mov	r3, #0
	and	r1, r6, r2
	str	r1, [fp, #-132]
	and	r3, r7, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #132
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	cmp	r3, #0
	cmpeq	r2, #1
	bne	.L28
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r9, [r3]	@ float
	ldr	lr, [r3, #4]	@ float
	ldr	r3, [fp, #-68]
	lsl	r2, r3, #3
	ldr	r3, [fp, #-96]
	add	r3, r3, r2
	ldr	ip, [r3]	@ float
	ldr	r1, [r3, #4]	@ float
	ldr	r3, .L34+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-76]
	lsl	r3, r3, #3
	add	r8, r2, r3
	sub	r0, fp, #104
	str	r1, [sp]	@ float
	mov	r3, ip
	mov	r2, lr
	mov	r1, r9
	bl	__mulsc3
	ldr	r2, [fp, #-104]	@ float
	ldr	r3, [fp, #-100]	@ float
	str	r2, [r8]	@ float
	str	r3, [r8, #4]	@ float
.L28:
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	adds	r1, r2, #1
	str	r1, [fp, #-140]
	adc	r3, r3, #0
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
.L27:
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	sub	r3, fp, #92
	ldmia	r3, {r2-r3}
	cmp	r2, r0
	sbcs	r3, r3, r1
	bge	.L30
.L26:
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	adds	r1, r2, #1
	str	r1, [fp, #-148]
	adc	r3, r3, #0
	str	r3, [fp, #-144]
	sub	r3, fp, #148
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
.L24:
	ldr	r3, .L34+8
	ldmia	r3, {r0-r1}
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	cmp	r2, r0
	sbcs	r3, r3, r1
	blt	.L31
	nop
	ldr	r3, .L34
	ldr	r2, [r3]
	ldr	r3, [fp, #-32]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L33
	bl	__stack_chk_fail
.L33:
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L35:
	.align	2
.L34:
	.word	.LC3
	.word	c
	.word	N
	.size	CPN, .-CPN
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	min, %function
min:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L37
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	b	.L38
.L37:
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
.L38:
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	min, .-min
	.global	__aeabi_ldivmod
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	powmod, %function
powmod:
	@ args = 8, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #32
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	b	.L40
.L42:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #1
	mov	r1, #0
	and	r4, r2, r0
	and	r5, r3, r1
	orrs	r3, r4, r5
	beq	.L41
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-20]
	mul	r2, r3, r2
	ldr	r3, [fp, #-16]
	ldr	r1, [fp, #-28]
	mul	r3, r1, r3
	add	r3, r2, r3
	ldr	ip, [fp, #-28]
	ldr	r2, [fp, #-20]
	umull	r0, r1, ip, r2
	add	r3, r3, r1
	mov	r1, r3
	ldmib	fp, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
.L41:
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-20]
	mul	r2, r3, r2
	ldr	r3, [fp, #-16]
	ldr	r1, [fp, #-20]
	mul	r3, r1, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-20]
	umull	r0, r1, r3, r3
	add	r3, r2, r1
	mov	r1, r3
	ldmib	fp, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #1
	orr	r2, r2, r1, lsl #31
	asr	r3, r1, #1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
.L40:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	cmp	r2, #1
	sbcs	r3, r3, #0
	bge	.L42
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_ldivmod
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	powmod, .-powmod
	.section	.rodata
	.align	2
.LC4:
	.ascii	"Not using OpenMP\012\000"
	.align	2
.LC5:
	.ascii	"Qubits      Factors    Probability   Time   Coeffs/"
	.ascii	"s  Coeffs/s/thread  Pass\000"
	.global	__aeabi_l2d
	.global	__aeabi_ddiv
	.align	2
.LC6:
	.ascii	"Error n*n>=N\000"
	.global	__aeabi_dadd
	.global	__aeabi_d2lz
	.global	__aeabi_i2d
	.align	2
.LC9:
	.ascii	"%ld*%ld \000"
	.global	__aeabi_dcmpgt
	.align	2
.LC10:
	.ascii	"yes\000"
	.align	2
.LC11:
	.ascii	"no\000"
	.align	2
.LC12:
	.ascii	" %ld  %12s  %13.6f   %10.4e  %10.4e  %10.4e %4s\012"
	.ascii	"\000"
	.align	3
.LC0:
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	3
	.word	0
	.word	3
	.word	0
	.word	3
	.word	0
	.word	5
	.word	0
	.word	7
	.word	0
	.word	5
	.word	0
	.word	11
	.word	0
	.word	11
	.word	0
	.word	5
	.word	0
	.word	19
	.word	0
	.word	23
	.word	0
	.word	19
	.word	0
	.word	23
	.word	0
	.word	29
	.word	0
	.word	47
	.word	0
	.word	29
	.word	0
	.word	29
	.word	0
	.word	47
	.word	0
	.word	71
	.word	0
	.word	83
	.word	0
	.word	79
	.word	0
	.word	103
	.word	0
	.word	149
	.word	0
	.word	101
	.word	0
	.word	149
	.word	0
	.word	269
	.word	0
	.word	167
	.word	0
	.word	479
	.word	0
	.word	479
	.word	0
	.word	367
	.word	0
	.word	859
	.word	0
	.word	563
	.word	0
	.word	1039
	.word	0
	.word	947
	.word	0
	.word	1307
	.word	0
	.word	2027
	.word	0
	.word	2039
	.word	0
	.word	2357
	.word	0
	.word	2237
	.word	0
	.word	3917
	.word	0
	.word	4127
	.word	0
	.word	4813
	.word	0
	.word	6173
	.word	0
	.word	6029
	.word	0
	.word	7243
	.word	0
	.word	10357
	.word	0
	.word	12757
	.word	0
	.word	11399
	.word	0
	.word	19427
	.word	0
	.word	20771
	.word	0
	.word	24847
	.word	0
	.word	27779
	.word	0
	.align	3
.LC1:
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	7
	.word	0
	.word	7
	.word	0
	.word	13
	.word	0
	.word	11
	.word	0
	.word	11
	.word	0
	.word	23
	.word	0
	.word	13
	.word	0
	.word	23
	.word	0
	.word	71
	.word	0
	.word	23
	.word	0
	.word	29
	.word	0
	.word	53
	.word	0
	.word	61
	.word	0
	.word	67
	.word	0
	.word	61
	.word	0
	.word	139
	.word	0
	.word	199
	.word	0
	.word	173
	.word	0
	.word	163
	.word	0
	.word	197
	.word	0
	.word	293
	.word	0
	.word	317
	.word	0
	.word	311
	.word	0
	.word	647
	.word	0
	.word	619
	.word	0
	.word	487
	.word	0
	.word	1109
	.word	0
	.word	547
	.word	0
	.word	773
	.word	0
	.word	1427
	.word	0
	.word	863
	.word	0
	.word	1861
	.word	0
	.word	1427
	.word	0
	.word	2213
	.word	0
	.word	2269
	.word	0
	.word	2069
	.word	0
	.word	2909
	.word	0
	.word	3559
	.word	0
	.word	5303
	.word	0
	.word	4283
	.word	0
	.word	5749
	.word	0
	.word	6971
	.word	0
	.word	7687
	.word	0
	.word	11131
	.word	0
	.word	13103
	.word	0
	.word	12959
	.word	0
	.word	14879
	.word	0
	.word	23549
	.word	0
	.word	19541
	.word	0
	.word	25847
	.word	0
	.word	30557
	.word	0
	.word	38653
	.word	0
	.align	2
.LC7:
	.word	0
	.word	0
	.align	2
.LC8:
	.word	1065353216
	.word	0
	.align	2
.LC13:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 1328
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #1376
	str	r0, [fp, #-1208]
	str	r1, [fp, #-1212]
	ldr	r3, .L67
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	mov	r3,#0
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-1148]
	str	r3, [fp, #-1144]
	mov	r3, #0
	str	r3, [fp, #-1200]
	ldr	r3, .L67+4
	sub	r0, fp, #1040
	sub	r0, r0, #4
	mov	r1, r3
	mov	r3, #488
	mov	r2, r3
	bl	memcpy
	ldr	r3, .L67+8
	sub	r0, fp, #556
	mov	r1, r3
	mov	r3, #488
	mov	r2, r3
	bl	memcpy
	mov	r2, #1
	mov	r3, #0
	str	r2, [fp, #-1148]
	str	r3, [fp, #-1144]
	ldr	r0, .L67+12
	bl	puts
	ldr	r0, .L67+16
	bl	puts
	mov	r2, #7
	mov	r3, #0
	str	r2, [fp, #-1140]
	str	r3, [fp, #-1136]
	ldr	r3, [fp, #-1140]
	lsl	r3, r3, #3
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-1200]
	ldr	r2, [fp, #-1200]
	ldr	r0, [fp, #-1140]
	ldr	r1, [fp, #-1136]
	bl	init_expphase
	ldr	r1, .L67+20
	mov	r2, #9
	mov	r3, #0
	stm	r1, {r2-r3}
	b	.L45
.L62:
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r1, r2
	mov	r2, #1
	mov	r3, #0
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	lr, r3, r1
	str	lr, [fp, #-1224]
	ldr	lr, [fp, #-1224]
	orr	ip, lr, r2, lsl ip
	str	ip, [fp, #-1224]
	ldr	ip, [fp, #-1224]
	orr	r0, ip, r2, lsr r0
	str	r0, [fp, #-1224]
	lsl	r3, r2, r1
	str	r3, [fp, #-1228]
	ldr	r3, .L67+24
	ldr	r1, [fp, #-1228]
	ldr	r2, [fp, #-1224]
	stm	r3, {r1-r2}
	ldr	r3, .L67+28
	ldr	r0, [r3]
	ldr	r3, .L67+24
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #3
	mov	r1, r3
	bl	realloc
	mov	r2, r0
	ldr	r3, .L67+28
	str	r2, [r3]
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #28
	add	r3, r2, r3
	sub	r3, r3, #1016
	ldmia	r3, {r4-r5}
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #28
	add	r3, r2, r3
	sub	r3, r3, #528
	ldmia	r3, {r0-r1}
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	r3, r2, r3
	umull	r6, r7, r4, r0
	add	r3, r3, r7
	mov	r7, r3
	str	r6, [fp, #-1132]
	str	r7, [fp, #-1128]
	str	r6, [fp, #-1132]
	str	r7, [fp, #-1128]
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #28
	add	r3, r2, r3
	sub	r3, r3, #1016
	ldmia	r3, {r2-r3}
	subs	r1, r2, #1
	str	r1, [fp, #-1236]
	sbc	r3, r3, #0
	str	r3, [fp, #-1232]
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #28
	add	r3, r2, r3
	sub	r3, r3, #528
	ldmia	r3, {r2-r3}
	subs	r1, r2, #1
	str	r1, [fp, #-1244]
	sbc	r3, r3, #0
	str	r3, [fp, #-1240]
	ldr	r0, [fp, #-1236]
	ldr	r1, [fp, #-1232]
	mov	r2, r1
	ldr	r4, [fp, #-1244]
	ldr	r5, [fp, #-1240]
	mov	r3, r4
	mul	r2, r3, r2
	mov	r3, r5
	mov	ip, r0
	mul	r3, ip, r3
	add	r3, r2, r3
	mov	r2, r0
	mov	ip, r4
	umull	r0, r1, r2, ip
	add	r3, r3, r1
	mov	r1, r3
	str	r0, [fp, #-1124]
	str	r1, [fp, #-1120]
	str	r0, [fp, #-1124]
	str	r1, [fp, #-1120]
	ldr	r3, .L67+24
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_l2d
	mov	r4, r0
	mov	r5, r1
	ldr	r0, [fp, #-1124]
	ldr	r1, [fp, #-1120]
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-1116]
	str	r3, [fp, #-1112]
	ldr	r2, [fp, #-1128]
	ldr	r3, [fp, #-1132]
	mul	r1, r3, r2
	ldr	r2, [fp, #-1128]
	ldr	r3, [fp, #-1132]
	mul	r3, r2, r3
	add	r2, r1, r3
	ldr	r3, [fp, #-1132]
	umull	r0, r1, r3, r3
	add	r3, r2, r1
	mov	r1, r3
	ldr	r3, .L67+24
	ldmia	r3, {r2-r3}
	cmp	r0, r2
	sbcs	r3, r1, r3
	blt	.L46
	ldr	r0, .L67+32
	bl	puts
	mov	r0, #1
	bl	exit
.L46:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-1156]
	str	r3, [fp, #-1152]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-1188]
	str	r3, [fp, #-1184]
	b	.L47
.L49:
	ldr	r3, .L67+28
	ldr	r2, [r3]
	ldr	r3, [fp, #-1188]
	lsl	r3, r3, #3
	add	r1, r2, r3
	ldr	r2, .L67+36
	ldr	r3, [r2]	@ float
	str	r3, [r1]	@ float
	ldr	r3, [r2, #4]	@ float
	str	r3, [r1, #4]	@ float
	ldr	r2, [fp, #-1132]
	ldr	r3, [fp, #-1128]
	stm	sp, {r2-r3}
	ldr	r2, [fp, #-1188]
	ldr	r3, [fp, #-1184]
	mov	r0, #2
	mov	r1, #0
	bl	powmod
	str	r0, [fp, #-1068]
	str	r1, [fp, #-1064]
	ldr	r2, [fp, #-1068]
	ldr	r3, [fp, #-1064]
	cmp	r3, #0
	cmpeq	r2, #1
	bne	.L48
	ldr	r3, .L67+28
	ldr	r2, [r3]
	ldr	r3, [fp, #-1188]
	lsl	r3, r3, #3
	add	r1, r2, r3
	ldr	r2, .L67+40
	ldr	r3, [r2]	@ float
	str	r3, [r1]	@ float
	ldr	r3, [r2, #4]	@ float
	str	r3, [r1, #4]	@ float
	mov	r2, #0
	ldr	r3, .L67+44
	ldr	r0, [fp, #-1156]
	ldr	r1, [fp, #-1152]
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-1156]
	str	r3, [fp, #-1152]
.L48:
	ldr	r2, [fp, #-1188]
	ldr	r3, [fp, #-1184]
	adds	r1, r2, #1
	str	r1, [fp, #-1284]
	adc	r3, r3, #0
	str	r3, [fp, #-1280]
	ldr	r3, [fp, #-1284]
	ldr	r4, [fp, #-1280]
	str	r3, [fp, #-1188]
	str	r4, [fp, #-1184]
.L47:
	ldr	r3, .L67+24
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-1188]
	ldr	r3, [fp, #-1184]
	cmp	r2, r0
	sbcs	r3, r3, r1
	blt	.L49
	ldr	r0, [fp, #-1156]
	ldr	r1, [fp, #-1152]
	bl	sqrt
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	ldr	r1, .L67+44
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-1156]
	str	r3, [fp, #-1152]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-1188]
	str	r3, [fp, #-1184]
	b	.L50
.L51:
	ldr	r3, .L67+28
	ldr	r2, [r3]
	ldr	r3, [fp, #-1188]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3]	@ float
	ldr	r6, [r3, #4]	@ float
	mov	r0, r2
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	mov	r0, r6
	bl	__aeabi_f2d
	mov	r8, r0
	mov	r9, r1
	ldr	r6, [fp, #-1156]
	ldr	r7, [fp, #-1152]
	mov	r2, r4
	mov	r3, r5
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r4, r0
	mov	r2, r8
	mov	r3, r9
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r1, r0
	ldr	r3, .L67+28
	ldr	r2, [r3]
	ldr	r3, [fp, #-1188]
	lsl	r3, r3, #3
	add	r3, r2, r3
	str	r4, [r3]	@ float
	str	r1, [r3, #4]	@ float
	ldr	r2, [fp, #-1188]
	ldr	r3, [fp, #-1184]
	adds	r1, r2, #1
	str	r1, [fp, #-1292]
	adc	r3, r3, #0
	str	r3, [fp, #-1288]
	ldr	r3, [fp, #-1292]
	ldr	r4, [fp, #-1288]
	str	r3, [fp, #-1188]
	str	r4, [fp, #-1184]
.L50:
	ldr	r3, .L67+24
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-1188]
	ldr	r3, [fp, #-1184]
	cmp	r2, r0
	sbcs	r3, r3, r1
	blt	.L51
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	log2
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, r0
	mov	r3, r1
	adds	r1, r2, #1
	str	r1, [fp, #-1300]
	adc	r3, r3, #0
	str	r3, [fp, #-1296]
	ldr	r3, [fp, #-1300]
	ldr	r4, [fp, #-1296]
	str	r3, [fp, #-1108]
	str	r4, [fp, #-1104]
	sub	r3, fp, #1040
	sub	r3, r3, #12
	sub	r3, r3, #8
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-1172]
	str	r3, [fp, #-1168]
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	subs	r1, r2, #1
	str	r1, [fp, #-1308]
	sbc	r3, r3, #0
	str	r3, [fp, #-1304]
	ldr	r3, [fp, #-1308]
	ldr	r4, [fp, #-1304]
	str	r3, [fp, #-1180]
	str	r4, [fp, #-1176]
	b	.L52
.L53:
	ldr	r0, [fp, #-1180]
	ldr	r1, [fp, #-1176]
	bl	H
	ldr	r3, [fp, #-1200]
	str	r3, [sp]
	ldr	r2, [fp, #-1108]
	ldr	r3, [fp, #-1104]
	ldr	r0, [fp, #-1180]
	ldr	r1, [fp, #-1176]
	bl	CPN
	ldr	r2, [fp, #-1172]
	ldr	r3, [fp, #-1168]
	adds	r1, r2, #1
	str	r1, [fp, #-1252]
	adc	r3, r3, #0
	str	r3, [fp, #-1248]
	ldr	r2, [fp, #-1108]
	ldr	r3, [fp, #-1104]
	ldr	r0, [fp, #-1180]
	ldr	r1, [fp, #-1176]
	bl	min
	mov	r2, r0
	mov	r3, r1
	ldr	r0, [fp, #-1252]
	ldr	r1, [fp, #-1248]
	mov	ip, r0
	adds	ip, ip, r2
	str	ip, [fp, #-1316]
	adc	r3, r1, r3
	str	r3, [fp, #-1312]
	ldr	r3, [fp, #-1316]
	ldr	r4, [fp, #-1312]
	str	r3, [fp, #-1172]
	str	r4, [fp, #-1168]
	ldr	r2, [fp, #-1180]
	ldr	r3, [fp, #-1176]
	subs	r1, r2, #1
	str	r1, [fp, #-1324]
	sbc	r3, r3, #0
	str	r3, [fp, #-1320]
	ldr	r3, [fp, #-1324]
	ldr	r4, [fp, #-1320]
	str	r3, [fp, #-1180]
	str	r4, [fp, #-1176]
.L52:
	ldr	r2, [fp, #-1180]
	ldr	r3, [fp, #-1176]
	cmp	r2, #0
	sbcs	r3, r3, #0
	bge	.L53
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-1180]
	str	r3, [fp, #-1176]
	b	.L54
.L55:
	ldr	r3, .L67+20
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-1180]
	ldr	r3, [fp, #-1176]
	subs	ip, r0, r2
	str	ip, [fp, #-1260]
	sbc	r3, r1, r3
	str	r3, [fp, #-1256]
	ldr	r3, [fp, #-1260]
	ldr	r4, [fp, #-1256]
	mov	r2, r3
	subs	r2, r2, #1
	str	r2, [fp, #-1268]
	mov	r3, r4
	sbc	r3, r3, #0
	str	r3, [fp, #-1264]
	ldr	r2, [fp, #-1268]
	ldr	r3, [fp, #-1264]
	ldr	r0, [fp, #-1180]
	ldr	r1, [fp, #-1176]
	bl	SWAP
	ldr	r2, [fp, #-1172]
	ldr	r3, [fp, #-1168]
	adds	r1, r2, #1
	str	r1, [fp, #-1332]
	adc	r3, r3, #0
	str	r3, [fp, #-1328]
	ldr	r3, [fp, #-1332]
	ldr	r4, [fp, #-1328]
	str	r3, [fp, #-1172]
	str	r4, [fp, #-1168]
	ldr	r2, [fp, #-1180]
	ldr	r3, [fp, #-1176]
	adds	r1, r2, #1
	str	r1, [fp, #-1340]
	adc	r3, r3, #0
	str	r3, [fp, #-1336]
	ldr	r3, [fp, #-1340]
	ldr	r4, [fp, #-1336]
	str	r3, [fp, #-1180]
	str	r4, [fp, #-1176]
.L54:
	ldr	r3, .L67+20
	ldmia	r3, {r0-r1}
	lsr	r3, r1, #31
	mov	r2, r3
	mov	r3, #0
	adds	ip, r2, r0
	str	ip, [fp, #-1348]
	adc	r3, r3, r1
	str	r3, [fp, #-1344]
	mov	r2, #0
	mov	r3, #0
	ldr	r0, [fp, #-1348]
	ldr	r1, [fp, #-1344]
	mov	ip, r0
	lsr	r2, ip, #1
	mov	ip, r1
	orr	r2, r2, ip, lsl #31
	asr	r3, r1, #1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, [fp, #-1180]
	ldr	r3, [fp, #-1176]
	cmp	r2, r0
	sbcs	r3, r3, r1
	blt	.L55
	sub	r3, fp, #1040
	sub	r3, r3, #12
	mov	r1, r3
	mov	r0, #0
	bl	clock_gettime
	ldr	r2, [fp, #-1052]
	ldr	r3, [fp, #-1060]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r4, r0
	mov	r5, r1
	ldr	r2, [fp, #-1048]
	ldr	r3, [fp, #-1056]
	sub	r3, r2, r3
	mov	r0, r3
	bl	__aeabi_i2d
	ldr	r2, .L67+48
	ldr	r3, .L67+52
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-1100]
	str	r3, [fp, #-1096]
	ldr	r3, .L67+24
	ldmia	r3, {r0-r1}
	ldr	r3, [fp, #-1172]
	mul	r2, r1, r3
	ldr	r3, [fp, #-1168]
	mul	r3, r0, r3
	add	r2, r2, r3
	ldr	r3, [fp, #-1172]
	umull	r4, r5, r3, r0
	add	r3, r2, r5
	mov	r5, r3
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_l2d
	ldr	r2, [fp, #-1100]
	ldr	r3, [fp, #-1096]
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-1092]
	str	r3, [fp, #-1088]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-1164]
	str	r3, [fp, #-1160]
	ldr	r2, [fp, #-1124]
	ldr	r3, [fp, #-1120]
	str	r2, [fp, #-1084]
	str	r3, [fp, #-1080]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-1196]
	str	r3, [fp, #-1192]
	b	.L56
.L58:
	ldr	r2, [fp, #-1196]
	ldr	r3, [fp, #-1192]
	cmp	r2, #1
	sbcs	r3, r3, #0
	blt	.L57
	ldr	r0, [fp, #-1196]
	ldr	r1, [fp, #-1192]
	bl	__aeabi_l2d
	ldr	r2, [fp, #-1116]
	ldr	r3, [fp, #-1112]
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L67+56
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-1076]
	str	r3, [fp, #-1072]
	ldr	r2, [fp, #-1076]
	ldr	r3, [fp, #-1072]
	cmp	r2, #0
	sbcs	r3, r3, #0
	blt	.L57
	ldr	r3, .L67+24
	ldmia	r3, {r0-r1}
	ldr	r2, [fp, #-1076]
	ldr	r3, [fp, #-1072]
	cmp	r2, r0
	sbcs	r3, r3, r1
	bge	.L57
	ldr	r3, .L67+28
	ldr	r2, [r3]
	ldr	r3, [fp, #-1076]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	ip, [r3]	@ float
	ldr	r1, [r3, #4]	@ float
	ldr	r3, .L67+28
	ldr	r2, [r3]
	ldr	r3, [fp, #-1076]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3]	@ float
	ldr	r3, [r3, #4]	@ float
	eor	r3, r3, #-2147483648
	sub	r0, fp, #1200
	sub	r0, r0, #12
	sub	r0, r0, #8
	str	r3, [sp]	@ float
	mov	r3, r2
	mov	r2, r1
	mov	r1, ip
	bl	__mulsc3
	ldr	r3, [fp, #-1220]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, [fp, #-1164]
	ldr	r1, [fp, #-1160]
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-1164]
	str	r3, [fp, #-1160]
.L57:
	ldr	r2, [fp, #-1196]
	ldr	r3, [fp, #-1192]
	adds	r1, r2, #1
	str	r1, [fp, #-1356]
	adc	r3, r3, #0
	str	r3, [fp, #-1352]
	ldr	r3, [fp, #-1356]
	ldr	r4, [fp, #-1352]
	str	r3, [fp, #-1196]
	str	r4, [fp, #-1192]
.L56:
	ldr	r0, [fp, #-1196]
	ldr	r1, [fp, #-1192]
	ldr	r2, [fp, #-1084]
	ldr	r3, [fp, #-1080]
	cmp	r2, r0
	sbcs	r3, r3, r1
	bge	.L58
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #28
	add	r3, r2, r3
	sub	r3, r3, #1016
	ldmia	r3, {r4-r5}
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r2, fp, #28
	add	r3, r2, r3
	sub	r3, r3, #528
	ldmia	r3, {r2-r3}
	sub	r0, fp, #64
	stm	sp, {r2-r3}
	mov	r2, r4
	mov	r3, r5
	ldr	r1, .L67+60
	bl	sprintf
	ldr	r3, .L67+20
	ldmia	r3, {r6-r7}
	ldr	r0, [fp, #-1148]
	ldr	r1, [fp, #-1144]
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	ldr	r0, [fp, #-1092]
	ldr	r1, [fp, #-1088]
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	mov	r2, #0
	ldr	r3, .L67+56
	ldr	r0, [fp, #-1164]
	ldr	r1, [fp, #-1160]
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L66
	ldr	r3, .L67+64
	b	.L61
.L66:
	ldr	r3, .L67+68
.L61:
	str	r3, [sp, #40]
	str	r4, [sp, #32]
	str	r5, [sp, #36]
	ldr	r2, [fp, #-1092]
	ldr	r3, [fp, #-1088]
	str	r2, [sp, #24]
	str	r3, [sp, #28]
	ldr	r2, [fp, #-1100]
	ldr	r3, [fp, #-1096]
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	ldr	r2, [fp, #-1164]
	ldr	r3, [fp, #-1160]
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	sub	r3, fp, #64
	str	r3, [sp]
	mov	r2, r6
	mov	r3, r7
	ldr	r0, .L67+72
	bl	printf
	ldr	r3, .L67+76
	ldr	r3, [r3]
	mov	r0, r3
	bl	fflush
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	adds	r1, r2, #1
	str	r1, [fp, #-1276]
	adc	r3, r3, #0
	str	r3, [fp, #-1272]
	ldr	r3, .L67+20
	ldr	r1, [fp, #-1276]
	ldr	r2, [fp, #-1272]
	stm	r3, {r1-r2}
.L45:
	ldr	r3, .L67+20
	ldmia	r3, {r2-r3}
	cmp	r2, #61
	sbcs	r3, r3, #0
	blt	.L62
	ldr	r0, [fp, #-1200]
	bl	free
	ldr	r3, .L67+28
	ldr	r3, [r3]
	mov	r0, r3
	bl	free
	mov	r3, #0
	ldr	r2, .L67
	ldr	r1, [r2]
	ldr	r2, [fp, #-32]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L64
	bl	__stack_chk_fail
.L64:
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L68:
	.align	2
.L67:
	.word	.LC13
	.word	.LC0
	.word	.LC1
	.word	.LC4
	.word	.LC5
	.word	QUBITS
	.word	N
	.word	c
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	1072693248
	.word	-400107883
	.word	1041313291
	.word	1071644672
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.word	.LC12
	.word	stdout
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
