	.file	"642288.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_bool
	.type	__VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	__VERIFIER_nondet_int@PLT
	test	eax, eax
	setne	al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.globl	_diverge_delta
	.bss
	.align 4
	.type	_diverge_delta, @object
	.size	_diverge_delta, 4
_diverge_delta:
	.zero	4
	.globl	_x__diverge_delta
	.align 4
	.type	_x__diverge_delta, @object
	.size	_x__diverge_delta, 4
_x__diverge_delta:
	.zero	4
	.globl	p16_x
	.align 4
	.type	p16_x, @object
	.size	p16_x, 4
p16_x:
	.zero	4
	.globl	_x_p16_x
	.align 4
	.type	_x_p16_x, @object
	.size	_x_p16_x, 4
_x_p16_x:
	.zero	4
	.globl	p15_x
	.align 4
	.type	p15_x, @object
	.size	p15_x, 4
p15_x:
	.zero	4
	.globl	_x_p15_x
	.align 4
	.type	_x_p15_x, @object
	.size	_x_p15_x, 4
_x_p15_x:
	.zero	4
	.globl	p14_x
	.align 4
	.type	p14_x, @object
	.size	p14_x, 4
p14_x:
	.zero	4
	.globl	_x_p14_x
	.align 4
	.type	_x_p14_x, @object
	.size	_x_p14_x, 4
_x_p14_x:
	.zero	4
	.globl	p12_l0
	.type	p12_l0, @object
	.size	p12_l0, 1
p12_l0:
	.zero	1
	.globl	_x_p12_l0
	.type	_x_p12_l0, @object
	.size	_x_p12_l0, 1
_x_p12_l0:
	.zero	1
	.globl	p12_x
	.align 4
	.type	p12_x, @object
	.size	p12_x, 4
p12_x:
	.zero	4
	.globl	_x_p12_x
	.align 4
	.type	_x_p12_x, @object
	.size	_x_p12_x, 4
_x_p12_x:
	.zero	4
	.globl	p11_l0
	.type	p11_l0, @object
	.size	p11_l0, 1
p11_l0:
	.zero	1
	.globl	_x_p11_l0
	.type	_x_p11_l0, @object
	.size	_x_p11_l0, 1
_x_p11_l0:
	.zero	1
	.globl	p11_x
	.align 4
	.type	p11_x, @object
	.size	p11_x, 4
p11_x:
	.zero	4
	.globl	_x_p11_x
	.align 4
	.type	_x_p11_x, @object
	.size	_x_p11_x, 4
_x_p11_x:
	.zero	4
	.globl	p16_l1
	.type	p16_l1, @object
	.size	p16_l1, 1
p16_l1:
	.zero	1
	.globl	_x_p16_l1
	.type	_x_p16_l1, @object
	.size	_x_p16_l1, 1
_x_p16_l1:
	.zero	1
	.globl	p10_l0
	.type	p10_l0, @object
	.size	p10_l0, 1
p10_l0:
	.zero	1
	.globl	_x_p10_l0
	.type	_x_p10_l0, @object
	.size	_x_p10_l0, 1
_x_p10_l0:
	.zero	1
	.globl	p10_x
	.align 4
	.type	p10_x, @object
	.size	p10_x, 4
p10_x:
	.zero	4
	.globl	_x_p10_x
	.align 4
	.type	_x_p10_x, @object
	.size	_x_p10_x, 4
_x_p10_x:
	.zero	4
	.globl	p9_x
	.align 4
	.type	p9_x, @object
	.size	p9_x, 4
p9_x:
	.zero	4
	.globl	_x_p9_x
	.align 4
	.type	_x_p9_x, @object
	.size	_x_p9_x, 4
_x_p9_x:
	.zero	4
	.globl	p2_l1
	.type	p2_l1, @object
	.size	p2_l1, 1
p2_l1:
	.zero	1
	.globl	_x_p2_l1
	.type	_x_p2_l1, @object
	.size	_x_p2_l1, 1
_x_p2_l1:
	.zero	1
	.globl	p6_x
	.align 4
	.type	p6_x, @object
	.size	p6_x, 4
p6_x:
	.zero	4
	.globl	_x_p6_x
	.align 4
	.type	_x_p6_x, @object
	.size	_x_p6_x, 4
_x_p6_x:
	.zero	4
	.globl	p8_l1
	.type	p8_l1, @object
	.size	p8_l1, 1
p8_l1:
	.zero	1
	.globl	_x_p8_l1
	.type	_x_p8_l1, @object
	.size	_x_p8_l1, 1
_x_p8_l1:
	.zero	1
	.globl	p2_l0
	.type	p2_l0, @object
	.size	p2_l0, 1
p2_l0:
	.zero	1
	.globl	_x_p2_l0
	.type	_x_p2_l0, @object
	.size	_x_p2_l0, 1
_x_p2_l0:
	.zero	1
	.globl	p13_l0
	.type	p13_l0, @object
	.size	p13_l0, 1
p13_l0:
	.zero	1
	.globl	_x_p13_l0
	.type	_x_p13_l0, @object
	.size	_x_p13_l0, 1
_x_p13_l0:
	.zero	1
	.globl	p2_x
	.align 4
	.type	p2_x, @object
	.size	p2_x, 4
p2_x:
	.zero	4
	.globl	_x_p2_x
	.align 4
	.type	_x_p2_x, @object
	.size	_x_p2_x, 4
_x_p2_x:
	.zero	4
	.globl	p1_l1
	.type	p1_l1, @object
	.size	p1_l1, 1
p1_l1:
	.zero	1
	.globl	_x_p1_l1
	.type	_x_p1_l1, @object
	.size	_x_p1_l1, 1
_x_p1_l1:
	.zero	1
	.globl	delta
	.align 4
	.type	delta, @object
	.size	delta, 4
delta:
	.zero	4
	.globl	_x_delta
	.align 4
	.type	_x_delta, @object
	.size	_x_delta, 4
_x_delta:
	.zero	4
	.globl	p13_x
	.align 4
	.type	p13_x, @object
	.size	p13_x, 4
p13_x:
	.zero	4
	.globl	_x_p13_x
	.align 4
	.type	_x_p13_x, @object
	.size	_x_p13_x, 4
_x_p13_x:
	.zero	4
	.globl	p0_l0
	.type	p0_l0, @object
	.size	p0_l0, 1
p0_l0:
	.zero	1
	.globl	_x_p0_l0
	.type	_x_p0_l0, @object
	.size	_x_p0_l0, 1
_x_p0_l0:
	.zero	1
	.globl	p7_l1
	.type	p7_l1, @object
	.size	p7_l1, 1
p7_l1:
	.zero	1
	.globl	_x_p7_l1
	.type	_x_p7_l1, @object
	.size	_x_p7_l1, 1
_x_p7_l1:
	.zero	1
	.globl	p0_x
	.align 4
	.type	p0_x, @object
	.size	p0_x, 4
p0_x:
	.zero	4
	.globl	_x_p0_x
	.align 4
	.type	_x_p0_x, @object
	.size	_x_p0_x, 4
_x_p0_x:
	.zero	4
	.globl	p12_l1
	.type	p12_l1, @object
	.size	p12_l1, 1
p12_l1:
	.zero	1
	.globl	_x_p12_l1
	.type	_x_p12_l1, @object
	.size	_x_p12_l1, 1
_x_p12_l1:
	.zero	1
	.globl	p6_l0
	.type	p6_l0, @object
	.size	p6_l0, 1
p6_l0:
	.zero	1
	.globl	_x_p6_l0
	.type	_x_p6_l0, @object
	.size	_x_p6_l0, 1
_x_p6_l0:
	.zero	1
	.globl	turn
	.align 4
	.type	turn, @object
	.size	turn, 4
turn:
	.zero	4
	.globl	_x_turn
	.align 4
	.type	_x_turn, @object
	.size	_x_turn, 4
_x_turn:
	.zero	4
	.globl	id
	.align 4
	.type	id, @object
	.size	id, 4
id:
	.zero	4
	.globl	_x_id
	.align 4
	.type	_x_id, @object
	.size	_x_id, 4
_x_id:
	.zero	4
	.globl	p14_l0
	.type	p14_l0, @object
	.size	p14_l0, 1
p14_l0:
	.zero	1
	.globl	_x_p14_l0
	.type	_x_p14_l0, @object
	.size	_x_p14_l0, 1
_x_p14_l0:
	.zero	1
	.globl	p3_x
	.align 4
	.type	p3_x, @object
	.size	p3_x, 4
p3_x:
	.zero	4
	.globl	_x_p3_x
	.align 4
	.type	_x_p3_x, @object
	.size	_x_p3_x, 4
_x_p3_x:
	.zero	4
	.globl	p15_l1
	.type	p15_l1, @object
	.size	p15_l1, 1
p15_l1:
	.zero	1
	.globl	_x_p15_l1
	.type	_x_p15_l1, @object
	.size	_x_p15_l1, 1
_x_p15_l1:
	.zero	1
	.globl	p9_l0
	.type	p9_l0, @object
	.size	p9_l0, 1
p9_l0:
	.zero	1
	.globl	_x_p9_l0
	.type	_x_p9_l0, @object
	.size	_x_p9_l0, 1
_x_p9_l0:
	.zero	1
	.globl	p1_x
	.align 4
	.type	p1_x, @object
	.size	p1_x, 4
p1_x:
	.zero	4
	.globl	_x_p1_x
	.align 4
	.type	_x_p1_x, @object
	.size	_x_p1_x, 4
_x_p1_x:
	.zero	4
	.globl	p5_l1
	.type	p5_l1, @object
	.size	p5_l1, 1
p5_l1:
	.zero	1
	.globl	_x_p5_l1
	.type	_x_p5_l1, @object
	.size	_x_p5_l1, 1
_x_p5_l1:
	.zero	1
	.globl	p9_l1
	.type	p9_l1, @object
	.size	p9_l1, 1
p9_l1:
	.zero	1
	.globl	_x_p9_l1
	.type	_x_p9_l1, @object
	.size	_x_p9_l1, 1
_x_p9_l1:
	.zero	1
	.globl	p3_l0
	.type	p3_l0, @object
	.size	p3_l0, 1
p3_l0:
	.zero	1
	.globl	_x_p3_l0
	.type	_x_p3_l0, @object
	.size	_x_p3_l0, 1
_x_p3_l0:
	.zero	1
	.globl	p3_l1
	.type	p3_l1, @object
	.size	p3_l1, 1
p3_l1:
	.zero	1
	.globl	_x_p3_l1
	.type	_x_p3_l1, @object
	.size	_x_p3_l1, 1
_x_p3_l1:
	.zero	1
	.globl	p0_l1
	.type	p0_l1, @object
	.size	p0_l1, 1
p0_l1:
	.zero	1
	.globl	_x_p0_l1
	.type	_x_p0_l1, @object
	.size	_x_p0_l1, 1
_x_p0_l1:
	.zero	1
	.globl	p7_x
	.align 4
	.type	p7_x, @object
	.size	p7_x, 4
p7_x:
	.zero	4
	.globl	_x_p7_x
	.align 4
	.type	_x_p7_x, @object
	.size	_x_p7_x, 4
_x_p7_x:
	.zero	4
	.globl	p15_l0
	.type	p15_l0, @object
	.size	p15_l0, 1
p15_l0:
	.zero	1
	.globl	_x_p15_l0
	.type	_x_p15_l0, @object
	.size	_x_p15_l0, 1
_x_p15_l0:
	.zero	1
	.globl	p4_x
	.align 4
	.type	p4_x, @object
	.size	p4_x, 4
p4_x:
	.zero	4
	.globl	_x_p4_x
	.align 4
	.type	_x_p4_x, @object
	.size	_x_p4_x, 4
_x_p4_x:
	.zero	4
	.globl	p10_l1
	.type	p10_l1, @object
	.size	p10_l1, 1
p10_l1:
	.zero	1
	.globl	_x_p10_l1
	.type	_x_p10_l1, @object
	.size	_x_p10_l1, 1
_x_p10_l1:
	.zero	1
	.globl	p4_l0
	.type	p4_l0, @object
	.size	p4_l0, 1
p4_l0:
	.zero	1
	.globl	_x_p4_l0
	.type	_x_p4_l0, @object
	.size	_x_p4_l0, 1
_x_p4_l0:
	.zero	1
	.globl	p1_l0
	.type	p1_l0, @object
	.size	p1_l0, 1
p1_l0:
	.zero	1
	.globl	_x_p1_l0
	.type	_x_p1_l0, @object
	.size	_x_p1_l0, 1
_x_p1_l0:
	.zero	1
	.globl	p4_l1
	.type	p4_l1, @object
	.size	p4_l1, 1
p4_l1:
	.zero	1
	.globl	_x_p4_l1
	.type	_x_p4_l1, @object
	.size	_x_p4_l1, 1
_x_p4_l1:
	.zero	1
	.globl	p8_x
	.align 4
	.type	p8_x, @object
	.size	p8_x, 4
p8_x:
	.zero	4
	.globl	_x_p8_x
	.align 4
	.type	_x_p8_x, @object
	.size	_x_p8_x, 4
_x_p8_x:
	.zero	4
	.globl	p16_l0
	.type	p16_l0, @object
	.size	p16_l0, 1
p16_l0:
	.zero	1
	.globl	_x_p16_l0
	.type	_x_p16_l0, @object
	.size	_x_p16_l0, 1
_x_p16_l0:
	.zero	1
	.globl	p5_x
	.align 4
	.type	p5_x, @object
	.size	p5_x, 4
p5_x:
	.zero	4
	.globl	_x_p5_x
	.align 4
	.type	_x_p5_x, @object
	.size	_x_p5_x, 4
_x_p5_x:
	.zero	4
	.globl	p11_l1
	.type	p11_l1, @object
	.size	p11_l1, 1
p11_l1:
	.zero	1
	.globl	_x_p11_l1
	.type	_x_p11_l1, @object
	.size	_x_p11_l1, 1
_x_p11_l1:
	.zero	1
	.globl	p5_l0
	.type	p5_l0, @object
	.size	p5_l0, 1
p5_l0:
	.zero	1
	.globl	_x_p5_l0
	.type	_x_p5_l0, @object
	.size	_x_p5_l0, 1
_x_p5_l0:
	.zero	1
	.globl	p6_l1
	.type	p6_l1, @object
	.size	p6_l1, 1
p6_l1:
	.zero	1
	.globl	_x_p6_l1
	.type	_x_p6_l1, @object
	.size	_x_p6_l1, 1
_x_p6_l1:
	.zero	1
	.globl	p13_l1
	.type	p13_l1, @object
	.size	p13_l1, 1
p13_l1:
	.zero	1
	.globl	_x_p13_l1
	.type	_x_p13_l1, @object
	.size	_x_p13_l1, 1
_x_p13_l1:
	.zero	1
	.globl	p7_l0
	.type	p7_l0, @object
	.size	p7_l0, 1
p7_l0:
	.zero	1
	.globl	_x_p7_l0
	.type	_x_p7_l0, @object
	.size	_x_p7_l0, 1
_x_p7_l0:
	.zero	1
	.globl	p14_l1
	.type	p14_l1, @object
	.size	p14_l1, 1
p14_l1:
	.zero	1
	.globl	_x_p14_l1
	.type	_x_p14_l1, @object
	.size	_x_p14_l1, 1
_x_p14_l1:
	.zero	1
	.globl	p8_l0
	.type	p8_l0, @object
	.size	p8_l0, 1
p8_l0:
	.zero	1
	.globl	_x_p8_l0
	.type	_x_p8_l0, @object
	.size	_x_p8_l0, 1
_x_p8_l0:
	.zero	1
	.text
	.globl	main
	.type	main, @function
main:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p16_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p15_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p14_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p10_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p13_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p12_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR turn[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p0_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p15_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p10_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p4_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p16_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR p5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR p8_l0[rip], al
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L4
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L6
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L7
.L6:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L8
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L7
.L8:
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L9
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L7
.L9:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L4
.L7:
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L10
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L10
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L4
.L10:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L12
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L13
.L12:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L14
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L13
.L14:
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L15
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L13
.L15:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L4
.L13:
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L16
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L16
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L4
.L16:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L18
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L19
.L18:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L20
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L19
.L20:
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L19
.L21:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L4
.L19:
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L22
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L22
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L4
.L22:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L24
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L25
.L24:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L26
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L25
.L26:
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L25
.L27:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L4
.L25:
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L28
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L28
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L4
.L28:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L30
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L31
.L30:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L31
.L32:
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L33
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L31
.L33:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L4
.L31:
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L34
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L4
.L34:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L36
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L37
.L36:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L37
.L38:
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L39
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L37
.L39:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L4
.L37:
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L40
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L40
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L4
.L40:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L42
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L43
.L42:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L43
.L44:
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L45
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L43
.L45:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L4
.L43:
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L46
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L46
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L4
.L46:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L48
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L49
.L48:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L49
.L50:
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L51
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L49
.L51:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L4
.L49:
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L52
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L52
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L4
.L52:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L54
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L55
.L54:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L56
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L55
.L56:
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L57
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L55
.L57:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L4
.L55:
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L58
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L58
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L4
.L58:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L60
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L61
.L60:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L62
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L61
.L62:
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L63
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L61
.L63:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L4
.L61:
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L64
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L64
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L4
.L64:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L66
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L67
.L66:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L68
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L67
.L68:
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L69
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L67
.L69:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L4
.L67:
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L70
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L70
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L4
.L70:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L72
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L73
.L72:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L73
.L74:
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L75
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L73
.L75:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L4
.L73:
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L76
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L76
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L4
.L76:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L78
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L79
.L78:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L79
.L80:
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L81
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L79
.L81:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L4
.L79:
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L82
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L82
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L4
.L82:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L84
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L85
.L84:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L85
.L86:
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L87
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L85
.L87:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L4
.L85:
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L88
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L88
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L4
.L88:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L90
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L91
.L90:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L91
.L92:
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L93
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L91
.L93:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L4
.L91:
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L94
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L4
.L94:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L96
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L97
.L96:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L98
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L97
.L98:
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L99
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L97
.L99:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L4
.L97:
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L100
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L4
.L100:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L4
	movss	xmm0, DWORD PTR p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L4
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L4
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L102
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L103
.L102:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L104
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L103
.L104:
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L103
.L105:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L4
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L4
.L103:
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L106
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L106
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L4
.L106:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L4
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L108
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	je	.L108
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L4
.L108:
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	je	.L109
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L4
.L109:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L4
	ucomiss	xmm0, xmm1
	jne	.L4
	mov	eax, 1
	jmp	.L111
.L4:
	mov	eax, 0
.L111:
	mov	DWORD PTR -4[rbp], eax
	jmp	.L112
.L603:
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x__diverge_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p16_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p15_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p14_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p12_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p11_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p10_x[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p9_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p6_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p2_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p2_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_delta[rip], eax
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p13_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p0_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p12_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l0[rip], al
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_turn[rip], eax
	call	__VERIFIER_nondet_int@PLT
	mov	DWORD PTR _x_id[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p3_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p1_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p9_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p3_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p0_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p7_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p15_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p4_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p10_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p1_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p4_l1[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p8_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p16_l0[rip], al
	call	__VERIFIER_nondet_float@PLT
	movd	eax, xmm0
	mov	DWORD PTR _x_p5_x[rip], eax
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p11_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p5_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p6_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p13_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p7_l0[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p14_l1[rip], al
	call	__VERIFIER_nondet_bool
	mov	BYTE PTR _x_p8_l0[rip], al
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L114
.L113:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L115
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L114
.L115:
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L116
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L114
.L116:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L117
.L114:
	movss	xmm1, DWORD PTR _x_p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L118
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L118
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L117
.L118:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L119
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p16_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p16_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L119
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L120
.L119:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	jne	.L117
.L120:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L123
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L123
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L123
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L123
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L123
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L124
.L123:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L124
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L124
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L124
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L124
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L117
.L124:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L126
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L126
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L126
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L126
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L126
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 17
	je	.L129
.L126:
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	jne	.L129
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L129
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L129
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L117
.L129:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L130
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	je	.L131
.L130:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L132
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L131
.L132:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L131
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L131
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L131
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L131
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L117
.L131:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L133
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L133
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L133
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L133
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	jne	.L135
.L133:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L135
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L135
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	jne	.L135
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L135
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L135
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L135
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L117
.L135:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L136
	movss	xmm0, DWORD PTR p16_x[rip]
	movss	xmm1, DWORD PTR _x_p16_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L136
	ucomiss	xmm0, xmm1
	jne	.L136
	movss	xmm1, DWORD PTR p16_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L136
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	je	.L138
.L136:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L138
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L138
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	jne	.L138
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L138
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	je	.L138
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L117
.L138:
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	test	al, al
	jne	.L139
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	test	al, al
	jne	.L139
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L139
	movss	xmm0, DWORD PTR p16_x[rip]
	movss	xmm1, DWORD PTR _x_p16_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L139
	ucomiss	xmm0, xmm1
	je	.L140
.L139:
	movzx	eax, BYTE PTR p16_l0[rip]
	test	al, al
	je	.L140
	movzx	eax, BYTE PTR p16_l1[rip]
	test	al, al
	je	.L140
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L140
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L140
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 17
	je	.L117
.L140:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L142
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L143
.L142:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L143
.L144:
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L145
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L143
.L145:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L117
.L143:
	movss	xmm1, DWORD PTR _x_p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L146
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L146
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L117
.L146:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L147
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p15_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p15_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L147
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L148
.L147:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	jne	.L117
.L148:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L151
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L151
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L151
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L151
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L151
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L152
.L151:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L152
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L152
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L152
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L152
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L117
.L152:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L154
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L154
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L154
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L154
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L154
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 16
	je	.L157
.L154:
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L157
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	jne	.L157
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L157
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L157
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L117
.L157:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L158
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	je	.L159
.L158:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L160
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L159
.L160:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L159
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L159
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L159
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L117
.L159:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L161
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L161
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L161
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L161
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	jne	.L163
.L161:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L163
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L163
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	jne	.L163
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L163
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L163
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L117
.L163:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L164
	movss	xmm0, DWORD PTR p15_x[rip]
	movss	xmm1, DWORD PTR _x_p15_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L164
	ucomiss	xmm0, xmm1
	jne	.L164
	movss	xmm1, DWORD PTR p15_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L164
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	je	.L166
.L164:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L166
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L166
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	jne	.L166
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	je	.L166
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L117
.L166:
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	test	al, al
	jne	.L167
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L167
	movss	xmm0, DWORD PTR p15_x[rip]
	movss	xmm1, DWORD PTR _x_p15_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L167
	ucomiss	xmm0, xmm1
	je	.L168
.L167:
	movzx	eax, BYTE PTR p15_l0[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR p15_l1[rip]
	test	al, al
	je	.L168
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L168
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L168
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 16
	je	.L117
.L168:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L170
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L171
.L170:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L172
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L171
.L172:
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L173
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L171
.L173:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L117
.L171:
	movss	xmm1, DWORD PTR _x_p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L174
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L117
.L174:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L175
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p14_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p14_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L175
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L176
.L175:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	jne	.L117
.L176:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L179
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L179
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L179
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L179
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L179
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L180
.L179:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L180
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L180
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L180
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L180
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L117
.L180:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L182
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L182
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L182
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L182
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L182
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 15
	je	.L185
.L182:
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	jne	.L185
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L185
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L185
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L117
.L185:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L186
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	je	.L187
.L186:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L187
.L188:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L187
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L187
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L187
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L187
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L117
.L187:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L189
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L189
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L189
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L189
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	jne	.L191
.L189:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L191
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L191
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	jne	.L191
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L191
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L191
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L191
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L117
.L191:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L192
	movss	xmm0, DWORD PTR p14_x[rip]
	movss	xmm1, DWORD PTR _x_p14_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L192
	ucomiss	xmm0, xmm1
	jne	.L192
	movss	xmm1, DWORD PTR p14_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L192
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	je	.L194
.L192:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L194
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L194
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	jne	.L194
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	jne	.L194
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L117
.L194:
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	test	al, al
	jne	.L195
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	test	al, al
	jne	.L195
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L195
	movss	xmm0, DWORD PTR p14_x[rip]
	movss	xmm1, DWORD PTR _x_p14_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L195
	ucomiss	xmm0, xmm1
	je	.L196
.L195:
	movzx	eax, BYTE PTR p14_l0[rip]
	test	al, al
	je	.L196
	movzx	eax, BYTE PTR p14_l1[rip]
	test	al, al
	je	.L196
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L196
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L196
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 15
	je	.L117
.L196:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L198
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L199
.L198:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L200
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L199
.L200:
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L201
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L199
.L201:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L117
.L199:
	movss	xmm1, DWORD PTR _x_p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L202
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L202
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L117
.L202:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L203
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L203
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p13_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p13_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L203
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L204
.L203:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	jne	.L117
.L204:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L207
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L207
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L207
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L207
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L207
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L208
.L207:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L208
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L208
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L208
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L208
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L117
.L208:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L210
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L210
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L210
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L210
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L210
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 14
	je	.L213
.L210:
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L213
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	jne	.L213
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L213
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L213
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L117
.L213:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L214
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	je	.L215
.L214:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L215
.L216:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L215
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L215
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L215
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L215
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L117
.L215:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L217
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L217
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L217
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L217
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	jne	.L219
.L217:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L219
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L219
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	jne	.L219
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L219
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L219
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L117
.L219:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L220
	movss	xmm0, DWORD PTR p13_x[rip]
	movss	xmm1, DWORD PTR _x_p13_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L220
	ucomiss	xmm0, xmm1
	jne	.L220
	movss	xmm1, DWORD PTR p13_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L220
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	je	.L222
.L220:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L222
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L222
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	jne	.L222
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L222
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	jne	.L222
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	je	.L222
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L117
.L222:
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	test	al, al
	jne	.L223
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	test	al, al
	jne	.L223
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L223
	movss	xmm0, DWORD PTR p13_x[rip]
	movss	xmm1, DWORD PTR _x_p13_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L223
	ucomiss	xmm0, xmm1
	je	.L224
.L223:
	movzx	eax, BYTE PTR p13_l0[rip]
	test	al, al
	je	.L224
	movzx	eax, BYTE PTR p13_l1[rip]
	test	al, al
	je	.L224
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L224
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L224
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 14
	je	.L117
.L224:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L226
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L227
.L226:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L228
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L227
.L228:
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L229
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L227
.L229:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L117
.L227:
	movss	xmm1, DWORD PTR _x_p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L230
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L230
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L117
.L230:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L231
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L231
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p12_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p12_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L231
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L232
.L231:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	jne	.L117
.L232:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L235
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L235
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L235
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L235
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L235
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L236
.L235:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L236
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L236
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L236
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L236
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L117
.L236:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L238
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L238
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L238
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L238
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 13
	je	.L241
.L238:
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L241
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	jne	.L241
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L241
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L241
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L117
.L241:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L242
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	je	.L243
.L242:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L244
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L243
.L244:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L243
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L243
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L243
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L117
.L243:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L245
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L245
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L245
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L245
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	jne	.L247
.L245:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L247
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L247
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	jne	.L247
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L247
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L247
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L247
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L117
.L247:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L248
	movss	xmm0, DWORD PTR p12_x[rip]
	movss	xmm1, DWORD PTR _x_p12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L248
	ucomiss	xmm0, xmm1
	jne	.L248
	movss	xmm1, DWORD PTR p12_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L248
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	je	.L250
.L248:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L250
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L250
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	jne	.L250
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	jne	.L250
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L117
.L250:
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	test	al, al
	jne	.L251
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	test	al, al
	jne	.L251
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L251
	movss	xmm0, DWORD PTR p12_x[rip]
	movss	xmm1, DWORD PTR _x_p12_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L251
	ucomiss	xmm0, xmm1
	je	.L252
.L251:
	movzx	eax, BYTE PTR p12_l0[rip]
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR p12_l1[rip]
	test	al, al
	je	.L252
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L252
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L252
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 13
	je	.L117
.L252:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L254
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L255
.L254:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L256
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L255
.L256:
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L255
.L257:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L117
.L255:
	movss	xmm1, DWORD PTR _x_p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L258
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L258
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L117
.L258:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L259
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p11_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p11_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L259
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L260
.L259:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	jne	.L117
.L260:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L263
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L263
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L263
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L263
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L263
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L264
.L263:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L264
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L264
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L264
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L264
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L117
.L264:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L266
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L266
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L266
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L266
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L266
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 12
	je	.L269
.L266:
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L269
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	jne	.L269
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L269
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L269
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L117
.L269:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L270
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	je	.L271
.L270:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L271
.L272:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L271
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L271
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L271
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L271
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L117
.L271:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L273
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L273
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L273
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L273
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	jne	.L275
.L273:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L275
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L275
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	jne	.L275
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L275
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L275
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L117
.L275:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L276
	movss	xmm0, DWORD PTR p11_x[rip]
	movss	xmm1, DWORD PTR _x_p11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L276
	ucomiss	xmm0, xmm1
	jne	.L276
	movss	xmm1, DWORD PTR p11_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L276
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	je	.L278
.L276:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L278
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L278
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	jne	.L278
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	jne	.L278
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L117
.L278:
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	test	al, al
	jne	.L279
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	test	al, al
	jne	.L279
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L279
	movss	xmm0, DWORD PTR p11_x[rip]
	movss	xmm1, DWORD PTR _x_p11_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L279
	ucomiss	xmm0, xmm1
	je	.L280
.L279:
	movzx	eax, BYTE PTR p11_l0[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR p11_l1[rip]
	test	al, al
	je	.L280
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L280
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L280
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 12
	je	.L117
.L280:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L282
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L283
.L282:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L283
.L284:
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L285
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L283
.L285:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L117
.L283:
	movss	xmm1, DWORD PTR _x_p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L286
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L117
.L286:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L287
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L287
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p10_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p10_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L287
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L288
.L287:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	jne	.L117
.L288:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L291
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L291
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L291
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L291
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L292
.L291:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L292
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L292
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L292
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L292
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L117
.L292:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L294
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L294
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L294
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L294
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L294
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 11
	je	.L297
.L294:
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	jne	.L297
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L297
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L297
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L117
.L297:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L298
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	je	.L299
.L298:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L300
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L299
.L300:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L299
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L299
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L299
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L117
.L299:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L301
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L301
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L301
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L301
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	jne	.L303
.L301:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L303
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L303
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	jne	.L303
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L303
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L303
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L303
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L117
.L303:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L304
	movss	xmm0, DWORD PTR p10_x[rip]
	movss	xmm1, DWORD PTR _x_p10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L304
	ucomiss	xmm0, xmm1
	jne	.L304
	movss	xmm1, DWORD PTR p10_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L304
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	je	.L306
.L304:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L306
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L306
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	jne	.L306
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L306
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	jne	.L306
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	je	.L306
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L117
.L306:
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	test	al, al
	jne	.L307
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	test	al, al
	jne	.L307
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L307
	movss	xmm0, DWORD PTR p10_x[rip]
	movss	xmm1, DWORD PTR _x_p10_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L307
	ucomiss	xmm0, xmm1
	je	.L308
.L307:
	movzx	eax, BYTE PTR p10_l0[rip]
	test	al, al
	je	.L308
	movzx	eax, BYTE PTR p10_l1[rip]
	test	al, al
	je	.L308
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L308
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L308
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 11
	je	.L117
.L308:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L310
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L311
.L310:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L312
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L311
.L312:
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L313
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L311
.L313:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L117
.L311:
	movss	xmm1, DWORD PTR _x_p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L314
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L314
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L117
.L314:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L315
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L315
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p9_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p9_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L315
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L316
.L315:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	jne	.L117
.L316:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L319
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L319
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L319
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L319
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L319
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L320
.L319:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L320
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L320
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L320
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L320
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L117
.L320:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L322
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L322
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L322
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L322
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 10
	je	.L325
.L322:
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L325
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	jne	.L325
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L325
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L325
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L117
.L325:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	je	.L327
.L326:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L328
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L327
.L328:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L327
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L327
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L327
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L117
.L327:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L329
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L329
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L329
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L329
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	jne	.L331
.L329:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L331
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L331
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	jne	.L331
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L331
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L331
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L117
.L331:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L332
	movss	xmm0, DWORD PTR p9_x[rip]
	movss	xmm1, DWORD PTR _x_p9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L332
	ucomiss	xmm0, xmm1
	jne	.L332
	movss	xmm1, DWORD PTR p9_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L332
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	je	.L334
.L332:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L334
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L334
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	jne	.L334
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L334
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	jne	.L334
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	je	.L334
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L117
.L334:
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	test	al, al
	jne	.L335
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	test	al, al
	jne	.L335
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L335
	movss	xmm0, DWORD PTR p9_x[rip]
	movss	xmm1, DWORD PTR _x_p9_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L335
	ucomiss	xmm0, xmm1
	je	.L336
.L335:
	movzx	eax, BYTE PTR p9_l0[rip]
	test	al, al
	je	.L336
	movzx	eax, BYTE PTR p9_l1[rip]
	test	al, al
	je	.L336
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L336
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L336
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 10
	je	.L117
.L336:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L338
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L339
.L338:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L340
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L339
.L340:
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L339
.L341:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L117
.L339:
	movss	xmm1, DWORD PTR _x_p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L342
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L342
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L117
.L342:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L343
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L343
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p8_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p8_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L343
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L344
.L343:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	jne	.L117
.L344:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L347
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L347
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L347
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L347
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L348
.L347:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L348
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L348
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L348
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L348
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L117
.L348:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L350
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L350
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L350
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L350
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L350
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 9
	je	.L353
.L350:
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L353
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	jne	.L353
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L353
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L353
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L117
.L353:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L354
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	je	.L355
.L354:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L356
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L355
.L356:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L355
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L355
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L355
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L117
.L355:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L357
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L357
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L357
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L357
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	jne	.L359
.L357:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L359
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L359
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	jne	.L359
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L359
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L359
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L117
.L359:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L360
	movss	xmm0, DWORD PTR p8_x[rip]
	movss	xmm1, DWORD PTR _x_p8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L360
	ucomiss	xmm0, xmm1
	jne	.L360
	movss	xmm1, DWORD PTR p8_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L360
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	je	.L362
.L360:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L362
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L362
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	jne	.L362
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L362
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	je	.L362
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L117
.L362:
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	test	al, al
	jne	.L363
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	test	al, al
	jne	.L363
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L363
	movss	xmm0, DWORD PTR p8_x[rip]
	movss	xmm1, DWORD PTR _x_p8_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L363
	ucomiss	xmm0, xmm1
	je	.L364
.L363:
	movzx	eax, BYTE PTR p8_l0[rip]
	test	al, al
	je	.L364
	movzx	eax, BYTE PTR p8_l1[rip]
	test	al, al
	je	.L364
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L364
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L364
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 9
	je	.L117
.L364:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L366
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L367
.L366:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L368
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L367
.L368:
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L369
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L367
.L369:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L117
.L367:
	movss	xmm1, DWORD PTR _x_p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L370
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L370
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L117
.L370:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L371
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L371
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p7_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p7_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L371
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L372
.L371:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	jne	.L117
.L372:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L375
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L375
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L375
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L375
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L375
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L376
.L375:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L376
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L376
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L376
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L376
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L117
.L376:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L378
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L378
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L378
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L378
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L378
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 8
	je	.L381
.L378:
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L381
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	jne	.L381
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L381
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L381
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L117
.L381:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L382
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	je	.L383
.L382:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L384
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L383
.L384:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L383
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L383
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L383
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L383
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L117
.L383:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L385
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L385
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L385
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L385
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	jne	.L387
.L385:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L387
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L387
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	jne	.L387
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L387
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L387
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L117
.L387:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L388
	movss	xmm0, DWORD PTR p7_x[rip]
	movss	xmm1, DWORD PTR _x_p7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L388
	ucomiss	xmm0, xmm1
	jne	.L388
	movss	xmm1, DWORD PTR p7_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L388
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	je	.L390
.L388:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L390
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L390
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	jne	.L390
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L390
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	jne	.L390
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	je	.L390
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L117
.L390:
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	test	al, al
	jne	.L391
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	test	al, al
	jne	.L391
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L391
	movss	xmm0, DWORD PTR p7_x[rip]
	movss	xmm1, DWORD PTR _x_p7_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L391
	ucomiss	xmm0, xmm1
	je	.L392
.L391:
	movzx	eax, BYTE PTR p7_l0[rip]
	test	al, al
	je	.L392
	movzx	eax, BYTE PTR p7_l1[rip]
	test	al, al
	je	.L392
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L392
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L392
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 8
	je	.L117
.L392:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L394
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L395
.L394:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L396
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L395
.L396:
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L397
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L395
.L397:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L117
.L395:
	movss	xmm1, DWORD PTR _x_p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L398
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L398
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L117
.L398:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L399
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L399
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p6_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p6_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L399
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L400
.L399:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	jne	.L117
.L400:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L403
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L403
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L403
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L403
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L403
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L404
.L403:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L404
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L404
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L404
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L404
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L117
.L404:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L406
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L406
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L406
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L406
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L406
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 7
	je	.L409
.L406:
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L409
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	jne	.L409
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L409
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L409
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L117
.L409:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L410
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	je	.L411
.L410:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L412
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L411
.L412:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L411
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L411
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L411
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L411
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L117
.L411:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L413
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L413
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L413
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L413
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	jne	.L415
.L413:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L415
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L415
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	jne	.L415
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L415
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L415
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L117
.L415:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L416
	movss	xmm0, DWORD PTR p6_x[rip]
	movss	xmm1, DWORD PTR _x_p6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L416
	ucomiss	xmm0, xmm1
	jne	.L416
	movss	xmm1, DWORD PTR p6_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L416
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	je	.L418
.L416:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L418
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L418
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	jne	.L418
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L418
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	jne	.L418
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	je	.L418
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L117
.L418:
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	test	al, al
	jne	.L419
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	test	al, al
	jne	.L419
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L419
	movss	xmm0, DWORD PTR p6_x[rip]
	movss	xmm1, DWORD PTR _x_p6_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L419
	ucomiss	xmm0, xmm1
	je	.L420
.L419:
	movzx	eax, BYTE PTR p6_l0[rip]
	test	al, al
	je	.L420
	movzx	eax, BYTE PTR p6_l1[rip]
	test	al, al
	je	.L420
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L420
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L420
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 7
	je	.L117
.L420:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L422
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L423
.L422:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L424
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L423
.L424:
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L425
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L423
.L425:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L117
.L423:
	movss	xmm1, DWORD PTR _x_p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L426
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L426
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L117
.L426:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L427
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L427
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p5_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p5_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L427
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L428
.L427:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	jne	.L117
.L428:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L431
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L431
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L431
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L431
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L431
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L432
.L431:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L432
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L432
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L432
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L432
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L117
.L432:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L434
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L434
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L434
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L434
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L434
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 6
	je	.L437
.L434:
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L437
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	jne	.L437
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L437
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L437
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L117
.L437:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L438
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	je	.L439
.L438:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L440
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L439
.L440:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L439
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L439
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L439
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L439
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L117
.L439:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L441
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L441
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L441
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L441
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	jne	.L443
.L441:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L443
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L443
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	jne	.L443
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L443
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L443
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L117
.L443:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L444
	movss	xmm0, DWORD PTR p5_x[rip]
	movss	xmm1, DWORD PTR _x_p5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L444
	ucomiss	xmm0, xmm1
	jne	.L444
	movss	xmm1, DWORD PTR p5_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L444
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	je	.L446
.L444:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L446
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L446
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	jne	.L446
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L446
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	jne	.L446
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	je	.L446
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L117
.L446:
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	test	al, al
	jne	.L447
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	test	al, al
	jne	.L447
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L447
	movss	xmm0, DWORD PTR p5_x[rip]
	movss	xmm1, DWORD PTR _x_p5_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L447
	ucomiss	xmm0, xmm1
	je	.L448
.L447:
	movzx	eax, BYTE PTR p5_l0[rip]
	test	al, al
	je	.L448
	movzx	eax, BYTE PTR p5_l1[rip]
	test	al, al
	je	.L448
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L448
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L448
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 6
	je	.L117
.L448:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L450
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L451
.L450:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L452
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L451
.L452:
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L453
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L451
.L453:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L117
.L451:
	movss	xmm1, DWORD PTR _x_p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L454
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L454
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L117
.L454:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L455
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L455
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p4_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p4_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L455
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L456
.L455:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	jne	.L117
.L456:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L459
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L459
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L459
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L459
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L459
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L460
.L459:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L460
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L460
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L460
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L460
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L117
.L460:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L462
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L462
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L462
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L462
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L462
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 5
	je	.L465
.L462:
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L465
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	jne	.L465
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L465
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L465
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L117
.L465:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L466
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	je	.L467
.L466:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L468
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L467
.L468:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L467
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L467
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L467
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L467
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L117
.L467:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L469
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L469
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L469
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L469
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	jne	.L471
.L469:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L471
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L471
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	jne	.L471
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L471
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L471
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L117
.L471:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L472
	movss	xmm0, DWORD PTR p4_x[rip]
	movss	xmm1, DWORD PTR _x_p4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L472
	ucomiss	xmm0, xmm1
	jne	.L472
	movss	xmm1, DWORD PTR p4_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L472
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	je	.L474
.L472:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L474
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L474
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	jne	.L474
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L474
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	jne	.L474
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	je	.L474
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L117
.L474:
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	test	al, al
	jne	.L475
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	test	al, al
	jne	.L475
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L475
	movss	xmm0, DWORD PTR p4_x[rip]
	movss	xmm1, DWORD PTR _x_p4_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L475
	ucomiss	xmm0, xmm1
	je	.L476
.L475:
	movzx	eax, BYTE PTR p4_l0[rip]
	test	al, al
	je	.L476
	movzx	eax, BYTE PTR p4_l1[rip]
	test	al, al
	je	.L476
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L476
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L476
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 5
	je	.L117
.L476:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L478
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L479
.L478:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L480
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L479
.L480:
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L481
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L479
.L481:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L117
.L479:
	movss	xmm1, DWORD PTR _x_p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L482
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L482
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L117
.L482:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L483
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L483
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p3_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p3_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L483
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L484
.L483:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	jne	.L117
.L484:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L487
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L487
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L487
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L487
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L487
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L488
.L487:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L488
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L488
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L488
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L488
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L117
.L488:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L490
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L490
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L490
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L490
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L490
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 4
	je	.L493
.L490:
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L493
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	jne	.L493
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L493
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L493
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L117
.L493:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L494
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	je	.L495
.L494:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L496
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L495
.L496:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L495
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L495
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L495
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L495
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L117
.L495:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L497
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L497
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L497
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L497
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	jne	.L499
.L497:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L499
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L499
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	jne	.L499
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L499
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L499
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L117
.L499:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L500
	movss	xmm0, DWORD PTR p3_x[rip]
	movss	xmm1, DWORD PTR _x_p3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L500
	ucomiss	xmm0, xmm1
	jne	.L500
	movss	xmm1, DWORD PTR p3_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L500
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L502
.L500:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L502
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L502
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	jne	.L502
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L502
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	jne	.L502
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	je	.L502
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L117
.L502:
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	test	al, al
	jne	.L503
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	test	al, al
	jne	.L503
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L503
	movss	xmm0, DWORD PTR p3_x[rip]
	movss	xmm1, DWORD PTR _x_p3_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L503
	ucomiss	xmm0, xmm1
	je	.L504
.L503:
	movzx	eax, BYTE PTR p3_l0[rip]
	test	al, al
	je	.L504
	movzx	eax, BYTE PTR p3_l1[rip]
	test	al, al
	je	.L504
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L504
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L504
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 4
	je	.L117
.L504:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L506
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L507
.L506:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L508
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L507
.L508:
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L509
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L507
.L509:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L117
.L507:
	movss	xmm1, DWORD PTR _x_p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L510
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L510
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L117
.L510:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L511
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L511
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p2_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p2_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L511
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L512
.L511:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	jne	.L117
.L512:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L515
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L515
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L515
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L515
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L515
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L516
.L515:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L516
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L516
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L516
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L516
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L117
.L516:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L518
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L518
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L518
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L518
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L518
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 3
	je	.L521
.L518:
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L521
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	jne	.L521
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L521
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L521
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L117
.L521:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L522
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	je	.L523
.L522:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L524
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L523
.L524:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L523
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L523
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L523
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L523
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L117
.L523:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L525
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L525
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L525
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L525
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	jne	.L527
.L525:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L527
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L527
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	jne	.L527
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L527
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L527
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L527
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L117
.L527:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L528
	movss	xmm0, DWORD PTR p2_x[rip]
	movss	xmm1, DWORD PTR _x_p2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L528
	ucomiss	xmm0, xmm1
	jne	.L528
	movss	xmm1, DWORD PTR p2_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L528
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L530
.L528:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L530
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L530
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	jne	.L530
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L530
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	jne	.L530
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	je	.L530
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L117
.L530:
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	test	al, al
	jne	.L531
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	test	al, al
	jne	.L531
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L531
	movss	xmm0, DWORD PTR p2_x[rip]
	movss	xmm1, DWORD PTR _x_p2_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L531
	ucomiss	xmm0, xmm1
	je	.L532
.L531:
	movzx	eax, BYTE PTR p2_l0[rip]
	test	al, al
	je	.L532
	movzx	eax, BYTE PTR p2_l1[rip]
	test	al, al
	je	.L532
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L532
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L532
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 3
	je	.L117
.L532:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L534
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L535
.L534:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L536
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L535
.L536:
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L537
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L535
.L537:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L117
.L535:
	movss	xmm1, DWORD PTR _x_p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L538
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L538
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L117
.L538:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L539
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L539
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p1_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p1_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L539
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L540
.L539:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L117
.L540:
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L543
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L543
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L543
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L543
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L543
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	je	.L544
.L543:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L544
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L544
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L544
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L544
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L117
.L544:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L546
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L546
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L546
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L546
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L546
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 2
	je	.L549
.L546:
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L549
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	jne	.L549
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L549
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L549
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L117
.L549:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L550
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	je	.L551
.L550:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L552
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L551
.L552:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L551
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L551
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L551
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L551
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L117
.L551:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L553
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L553
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L553
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L553
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	jne	.L555
.L553:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L555
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L555
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L555
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L555
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L555
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L555
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L117
.L555:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L556
	movss	xmm0, DWORD PTR p1_x[rip]
	movss	xmm1, DWORD PTR _x_p1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L556
	ucomiss	xmm0, xmm1
	jne	.L556
	movss	xmm1, DWORD PTR p1_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L556
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L558
.L556:
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L558
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L558
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	jne	.L558
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	jne	.L558
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	je	.L558
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L117
.L558:
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	test	al, al
	jne	.L559
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	test	al, al
	jne	.L559
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	jne	.L559
	movss	xmm0, DWORD PTR p1_x[rip]
	movss	xmm1, DWORD PTR _x_p1_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L559
	ucomiss	xmm0, xmm1
	je	.L560
.L559:
	movzx	eax, BYTE PTR p1_l0[rip]
	test	al, al
	je	.L560
	movzx	eax, BYTE PTR p1_l1[rip]
	test	al, al
	je	.L560
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L560
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L560
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 2
	je	.L117
.L560:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L562
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L563
.L562:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L564
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L563
.L564:
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L565
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L563
.L565:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L117
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L117
.L563:
	movss	xmm1, DWORD PTR _x_p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jnb	.L566
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L566
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L117
.L566:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L567
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	sete	dl
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	setne	al
	xor	eax, edx
	test	al, al
	je	.L567
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR p0_x[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x_p0_x[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L567
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	je	.L568
.L567:
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jb	.L117
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L117
.L568:
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L571
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L571
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	jne	.L571
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L571
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L571
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	je	.L573
.L571:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L573
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L573
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L573
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L573
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L117
.L573:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L575
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L575
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	jb	.L575
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L575
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L575
	mov	eax, DWORD PTR _x_id[rip]
	cmp	eax, 1
	je	.L578
.L575:
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L578
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	jne	.L578
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L578
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L578
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L117
.L578:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L580
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	je	.L581
.L580:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L582
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L581
.L582:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L581
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L581
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L581
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L581
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L117
.L581:
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L584
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jne	.L584
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L584
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L584
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L586
.L584:
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L586
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L586
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L586
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L586
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L586
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L117
.L586:
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L587
	movss	xmm0, DWORD PTR p0_x[rip]
	movss	xmm1, DWORD PTR _x_p0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L587
	ucomiss	xmm0, xmm1
	jne	.L587
	movss	xmm1, DWORD PTR p0_x[rip]
	movss	xmm0, DWORD PTR .LC1[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L587
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	je	.L589
.L587:
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L589
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L589
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jne	.L589
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	jne	.L589
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	je	.L589
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L117
.L589:
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	test	al, al
	jne	.L590
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	test	al, al
	jne	.L590
	movss	xmm0, DWORD PTR p0_x[rip]
	movss	xmm1, DWORD PTR _x_p0_x[rip]
	ucomiss	xmm0, xmm1
	jp	.L590
	ucomiss	xmm0, xmm1
	jne	.L590
	mov	eax, DWORD PTR _x_id[rip]
	test	eax, eax
	je	.L592
.L590:
	movzx	eax, BYTE PTR p0_l0[rip]
	test	al, al
	je	.L592
	movzx	eax, BYTE PTR p0_l1[rip]
	test	al, al
	je	.L592
	mov	eax, DWORD PTR turn[rip]
	cmp	eax, 1
	jne	.L592
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	ucomiss	xmm0, xmm1
	jp	.L592
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	je	.L117
.L592:
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 17
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 16
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 15
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 14
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 13
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 12
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 11
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 10
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 9
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 8
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 7
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 6
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 5
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 4
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 3
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 2
	je	.L594
	mov	eax, DWORD PTR id[rip]
	test	eax, eax
	je	.L594
	mov	eax, DWORD PTR id[rip]
	cmp	eax, 1
	jne	.L117
.L594:
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 1
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 2
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 3
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 4
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 5
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 6
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 7
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 8
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 9
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 10
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 11
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 12
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 13
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 14
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 15
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 16
	je	.L595
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	eax, 17
	jne	.L117
.L595:
	movss	xmm0, DWORD PTR _x_delta[rip]
	pxor	xmm1, xmm1
	comiss	xmm0, xmm1
	jb	.L117
	movss	xmm1, DWORD PTR delta[rip]
	pxor	xmm0, xmm0
	comiss	xmm0, xmm1
	jnb	.L597
	mov	edx, DWORD PTR id[rip]
	mov	eax, DWORD PTR _x_id[rip]
	cmp	edx, eax
	jne	.L117
	mov	edx, DWORD PTR turn[rip]
	mov	eax, DWORD PTR _x_turn[rip]
	cmp	edx, eax
	jne	.L117
.L597:
	movss	xmm0, DWORD PTR delta[rip]
	movss	xmm1, DWORD PTR _x__diverge_delta[rip]
	ucomiss	xmm0, xmm1
	jp	.L712
	ucomiss	xmm0, xmm1
	je	.L598
.L712:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	setnb	al
	xor	eax, 1
	test	al, al
	je	.L117
.L598:
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	movss	xmm1, DWORD PTR .LC3[rip]
	comiss	xmm0, xmm1
	jnb	.L600
	movss	xmm0, DWORD PTR delta[rip]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movss	xmm0, DWORD PTR _diverge_delta[rip]
	cvtss2sd	xmm0, xmm0
	movss	xmm2, DWORD PTR _x__diverge_delta[rip]
	cvtss2sd	xmm2, xmm2
	subsd	xmm0, xmm2
	addsd	xmm0, xmm1
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jp	.L117
	pxor	xmm1, xmm1
	ucomisd	xmm0, xmm1
	jne	.L117
.L600:
	mov	eax, 1
	jmp	.L602
.L117:
	mov	eax, 0
.L602:
	mov	DWORD PTR -4[rbp], eax
	movss	xmm0, DWORD PTR _x__diverge_delta[rip]
	movss	DWORD PTR _diverge_delta[rip], xmm0
	movss	xmm0, DWORD PTR _x_p16_x[rip]
	movss	DWORD PTR p16_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p15_x[rip]
	movss	DWORD PTR p15_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p14_x[rip]
	movss	DWORD PTR p14_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p12_l0[rip]
	mov	BYTE PTR p12_l0[rip], al
	movss	xmm0, DWORD PTR _x_p12_x[rip]
	movss	DWORD PTR p12_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p11_l0[rip]
	mov	BYTE PTR p11_l0[rip], al
	movss	xmm0, DWORD PTR _x_p11_x[rip]
	movss	DWORD PTR p11_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p16_l1[rip]
	mov	BYTE PTR p16_l1[rip], al
	movzx	eax, BYTE PTR _x_p10_l0[rip]
	mov	BYTE PTR p10_l0[rip], al
	movss	xmm0, DWORD PTR _x_p10_x[rip]
	movss	DWORD PTR p10_x[rip], xmm0
	movss	xmm0, DWORD PTR _x_p9_x[rip]
	movss	DWORD PTR p9_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p2_l1[rip]
	mov	BYTE PTR p2_l1[rip], al
	movss	xmm0, DWORD PTR _x_p6_x[rip]
	movss	DWORD PTR p6_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p8_l1[rip]
	mov	BYTE PTR p8_l1[rip], al
	movzx	eax, BYTE PTR _x_p2_l0[rip]
	mov	BYTE PTR p2_l0[rip], al
	movzx	eax, BYTE PTR _x_p13_l0[rip]
	mov	BYTE PTR p13_l0[rip], al
	movss	xmm0, DWORD PTR _x_p2_x[rip]
	movss	DWORD PTR p2_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p1_l1[rip]
	mov	BYTE PTR p1_l1[rip], al
	movss	xmm0, DWORD PTR _x_delta[rip]
	movss	DWORD PTR delta[rip], xmm0
	movss	xmm0, DWORD PTR _x_p13_x[rip]
	movss	DWORD PTR p13_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p0_l0[rip]
	mov	BYTE PTR p0_l0[rip], al
	movzx	eax, BYTE PTR _x_p7_l1[rip]
	mov	BYTE PTR p7_l1[rip], al
	movss	xmm0, DWORD PTR _x_p0_x[rip]
	movss	DWORD PTR p0_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p12_l1[rip]
	mov	BYTE PTR p12_l1[rip], al
	movzx	eax, BYTE PTR _x_p6_l0[rip]
	mov	BYTE PTR p6_l0[rip], al
	mov	eax, DWORD PTR _x_turn[rip]
	mov	DWORD PTR turn[rip], eax
	mov	eax, DWORD PTR _x_id[rip]
	mov	DWORD PTR id[rip], eax
	movzx	eax, BYTE PTR _x_p14_l0[rip]
	mov	BYTE PTR p14_l0[rip], al
	movss	xmm0, DWORD PTR _x_p3_x[rip]
	movss	DWORD PTR p3_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p15_l1[rip]
	mov	BYTE PTR p15_l1[rip], al
	movzx	eax, BYTE PTR _x_p9_l0[rip]
	mov	BYTE PTR p9_l0[rip], al
	movss	xmm0, DWORD PTR _x_p1_x[rip]
	movss	DWORD PTR p1_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p5_l1[rip]
	mov	BYTE PTR p5_l1[rip], al
	movzx	eax, BYTE PTR _x_p9_l1[rip]
	mov	BYTE PTR p9_l1[rip], al
	movzx	eax, BYTE PTR _x_p3_l0[rip]
	mov	BYTE PTR p3_l0[rip], al
	movzx	eax, BYTE PTR _x_p3_l1[rip]
	mov	BYTE PTR p3_l1[rip], al
	movzx	eax, BYTE PTR _x_p0_l1[rip]
	mov	BYTE PTR p0_l1[rip], al
	movss	xmm0, DWORD PTR _x_p7_x[rip]
	movss	DWORD PTR p7_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p15_l0[rip]
	mov	BYTE PTR p15_l0[rip], al
	movss	xmm0, DWORD PTR _x_p4_x[rip]
	movss	DWORD PTR p4_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p10_l1[rip]
	mov	BYTE PTR p10_l1[rip], al
	movzx	eax, BYTE PTR _x_p4_l0[rip]
	mov	BYTE PTR p4_l0[rip], al
	movzx	eax, BYTE PTR _x_p1_l0[rip]
	mov	BYTE PTR p1_l0[rip], al
	movzx	eax, BYTE PTR _x_p4_l1[rip]
	mov	BYTE PTR p4_l1[rip], al
	movss	xmm0, DWORD PTR _x_p8_x[rip]
	movss	DWORD PTR p8_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p16_l0[rip]
	mov	BYTE PTR p16_l0[rip], al
	movss	xmm0, DWORD PTR _x_p5_x[rip]
	movss	DWORD PTR p5_x[rip], xmm0
	movzx	eax, BYTE PTR _x_p11_l1[rip]
	mov	BYTE PTR p11_l1[rip], al
	movzx	eax, BYTE PTR _x_p5_l0[rip]
	mov	BYTE PTR p5_l0[rip], al
	movzx	eax, BYTE PTR _x_p6_l1[rip]
	mov	BYTE PTR p6_l1[rip], al
	movzx	eax, BYTE PTR _x_p13_l1[rip]
	mov	BYTE PTR p13_l1[rip], al
	movzx	eax, BYTE PTR _x_p7_l0[rip]
	mov	BYTE PTR p7_l0[rip], al
	movzx	eax, BYTE PTR _x_p14_l1[rip]
	mov	BYTE PTR p14_l1[rip], al
	movzx	eax, BYTE PTR _x_p8_l0[rip]
	mov	BYTE PTR p8_l0[rip], al
.L112:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L603
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	main, .-main
	.section	.rodata
	.align 4
.LC1:
	.long	1073741824
	.align 4
.LC3:
	.long	1065353216
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"642288.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_bool
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
	.size	__VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
	.comm	_diverge_delta,4,4
	.comm	_x__diverge_delta,4,4
	.comm	p16_x,4,4
	.comm	_x_p16_x,4,4
	.comm	p15_x,4,4
	.comm	_x_p15_x,4,4
	.comm	p14_x,4,4
	.comm	_x_p14_x,4,4
	.comm	p12_l0,1,1
	.comm	_x_p12_l0,1,1
	.comm	p12_x,4,4
	.comm	_x_p12_x,4,4
	.comm	p11_l0,1,1
	.comm	_x_p11_l0,1,1
	.comm	p11_x,4,4
	.comm	_x_p11_x,4,4
	.comm	p16_l1,1,1
	.comm	_x_p16_l1,1,1
	.comm	p10_l0,1,1
	.comm	_x_p10_l0,1,1
	.comm	p10_x,4,4
	.comm	_x_p10_x,4,4
	.comm	p9_x,4,4
	.comm	_x_p9_x,4,4
	.comm	p2_l1,1,1
	.comm	_x_p2_l1,1,1
	.comm	p6_x,4,4
	.comm	_x_p6_x,4,4
	.comm	p8_l1,1,1
	.comm	_x_p8_l1,1,1
	.comm	p2_l0,1,1
	.comm	_x_p2_l0,1,1
	.comm	p13_l0,1,1
	.comm	_x_p13_l0,1,1
	.comm	p2_x,4,4
	.comm	_x_p2_x,4,4
	.comm	p1_l1,1,1
	.comm	_x_p1_l1,1,1
	.comm	delta,4,4
	.comm	_x_delta,4,4
	.comm	p13_x,4,4
	.comm	_x_p13_x,4,4
	.comm	p0_l0,1,1
	.comm	_x_p0_l0,1,1
	.comm	p7_l1,1,1
	.comm	_x_p7_l1,1,1
	.comm	p0_x,4,4
	.comm	_x_p0_x,4,4
	.comm	p12_l1,1,1
	.comm	_x_p12_l1,1,1
	.comm	p6_l0,1,1
	.comm	_x_p6_l0,1,1
	.comm	turn,4,4
	.comm	_x_turn,4,4
	.comm	id,4,4
	.comm	_x_id,4,4
	.comm	p14_l0,1,1
	.comm	_x_p14_l0,1,1
	.comm	p3_x,4,4
	.comm	_x_p3_x,4,4
	.comm	p15_l1,1,1
	.comm	_x_p15_l1,1,1
	.comm	p9_l0,1,1
	.comm	_x_p9_l0,1,1
	.comm	p1_x,4,4
	.comm	_x_p1_x,4,4
	.comm	p5_l1,1,1
	.comm	_x_p5_l1,1,1
	.comm	p9_l1,1,1
	.comm	_x_p9_l1,1,1
	.comm	p3_l0,1,1
	.comm	_x_p3_l0,1,1
	.comm	p3_l1,1,1
	.comm	_x_p3_l1,1,1
	.comm	p0_l1,1,1
	.comm	_x_p0_l1,1,1
	.comm	p7_x,4,4
	.comm	_x_p7_x,4,4
	.comm	p15_l0,1,1
	.comm	_x_p15_l0,1,1
	.comm	p4_x,4,4
	.comm	_x_p4_x,4,4
	.comm	p10_l1,1,1
	.comm	_x_p10_l1,1,1
	.comm	p4_l0,1,1
	.comm	_x_p4_l0,1,1
	.comm	p1_l0,1,1
	.comm	_x_p1_l0,1,1
	.comm	p4_l1,1,1
	.comm	_x_p4_l1,1,1
	.comm	p8_x,4,4
	.comm	_x_p8_x,4,4
	.comm	p16_l0,1,1
	.comm	_x_p16_l0,1,1
	.comm	p5_x,4,4
	.comm	_x_p5_x,4,4
	.comm	p11_l1,1,1
	.comm	_x_p11_l1,1,1
	.comm	p5_l0,1,1
	.comm	_x_p5_l0,1,1
	.comm	p6_l1,1,1
	.comm	_x_p6_l1,1,1
	.comm	p13_l1,1,1
	.comm	_x_p13_l1,1,1
	.comm	p7_l0,1,1
	.comm	_x_p7_l0,1,1
	.comm	p14_l1,1,1
	.comm	_x_p14_l1,1,1
	.comm	p8_l0,1,1
	.comm	_x_p8_l0,1,1
	.global	__aeabi_fcmpeq
	.global	__aeabi_fcmple
	.global	__aeabi_fcmpge
	.global	__aeabi_f2d
	.global	__aeabi_dsub
	.global	__aeabi_dadd
	.global	__aeabi_dcmpeq
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #8
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+4
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+8
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+12
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+16
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+20
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+24
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+28
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+32
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+36
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+40
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+44
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+48
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+52
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+56
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+180
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+60
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+172
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+188
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+208
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+64
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+204
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+68
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+196
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+72
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+76
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L697+440
	str	r3, [r2]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L697+444
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+80
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+160
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+84
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+88
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+184
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+92
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+96
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+168
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+164
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+200
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+100
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+104
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+148
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+108
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+156
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+192
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+152
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+112
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+428
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+116
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+120
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+124
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+128
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+132
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+136
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+140
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+144
	strb	r2, [r3]
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L6
	ldr	r3, .L697+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L6:
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L8
	ldr	r3, .L697+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L8:
	ldr	r3, .L697+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L9
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L7
.L9:
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L7:
	ldr	r3, .L697+4
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L10
	ldr	r3, .L697+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L10
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L10:
	ldr	r3, .L697+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L12
	ldr	r3, .L697+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L12:
	ldr	r3, .L697+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L14
	ldr	r3, .L697+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L14:
	ldr	r3, .L697+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L697+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L13
.L15:
	ldr	r3, .L697+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L13:
	ldr	r3, .L697+8
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L16
	ldr	r3, .L697+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L16
	ldr	r3, .L697+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L16:
	ldr	r3, .L697+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L18
	ldr	r3, .L697+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L18:
	ldr	r3, .L697+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L697+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L20:
	ldr	r3, .L697+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L21
	ldr	r3, .L697+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L19
.L21:
	ldr	r3, .L697+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L19:
	ldr	r3, .L697+12
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L22
	ldr	r3, .L697+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L22
	ldr	r3, .L697+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L22:
	ldr	r3, .L697+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+64
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L24
	ldr	r3, .L697+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
.L24:
	ldr	r3, .L697+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L26
	ldr	r3, .L697+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
.L26:
	ldr	r3, .L697+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L697+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
.L27:
	ldr	r3, .L697+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L25:
	ldr	r3, .L697+64
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L28
	ldr	r3, .L697+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L28
	ldr	r3, .L697+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L28:
	ldr	r3, .L697+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L30
	ldr	r3, .L697+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L30:
	ldr	r3, .L697+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L32
	ldr	r3, .L697+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L32:
	ldr	r3, .L697+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L33
	ldr	r3, .L697+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
.L33:
	ldr	r3, .L697+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L31:
	ldr	r3, .L697+20
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L34
	ldr	r3, .L697+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L697+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L34:
	ldr	r3, .L697+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L36
	ldr	r3, .L697+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
.L36:
	ldr	r3, .L697+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L697+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
.L38:
	ldr	r3, .L697+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L697+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L37
.L39:
	ldr	r3, .L697+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L37:
	ldr	r3, .L697+28
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L40
	ldr	r3, .L697+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L697+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L40:
	ldr	r3, .L697+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+40
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L697+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L42:
	ldr	r3, .L697+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L44
	ldr	r3, .L697+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L44:
	ldr	r3, .L697+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L697+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L43
.L45:
	ldr	r3, .L697+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L43:
	ldr	r3, .L697+40
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L46
	ldr	r3, .L697+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L697+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L46:
	ldr	r3, .L697+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L48
	ldr	r3, .L697+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L48:
	ldr	r3, .L697+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L50
	ldr	r3, .L697+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L50:
	ldr	r3, .L697+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L697+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L49
.L51:
	ldr	r3, .L697+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L49:
	ldr	r3, .L697+44
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L697+96
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L697+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L52:
	ldr	r3, .L697+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+112
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L54
	ldr	r3, .L697+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L54:
	ldr	r3, .L697+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L56
	ldr	r3, .L697+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L56:
	ldr	r3, .L697+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L697+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
.L57:
	ldr	r3, .L697+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L55:
	ldr	r3, .L697+112
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L58
	ldr	r3, .L697+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L58
	ldr	r3, .L697+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L58:
	ldr	r3, .L697+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L60
	ldr	r3, .L697+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
.L60:
	ldr	r3, .L697+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L697+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
.L62:
	ldr	r3, .L697+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L697+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L61
.L63:
	ldr	r3, .L697+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L61:
	ldr	r3, .L697+100
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L64
	ldr	r3, .L697+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L64
	ldr	r3, .L697+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L64:
	ldr	r3, .L697+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+52
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L66
	ldr	r3, .L697+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L66:
	ldr	r3, .L697+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L68
	ldr	r3, .L697+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L68:
	ldr	r3, .L697+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
	ldr	r3, .L697+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
.L69:
	ldr	r3, .L697+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L67:
	ldr	r3, .L697+52
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L70
	ldr	r3, .L697+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L70
	ldr	r3, .L697+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L70:
	ldr	r3, .L697+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+116
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L72
	ldr	r3, .L697+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
.L72:
	ldr	r3, .L697+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L74
	ldr	r3, .L697+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
.L74:
	ldr	r3, .L697+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
	ldr	r3, .L697+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
.L75:
	ldr	r3, .L697+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L73:
	ldr	r3, .L697+116
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L76
	ldr	r3, .L697+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L697+124
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	b	.L698
.L699:
	.align	2
.L697:
	.word	_diverge_delta
	.word	p16_x
	.word	p15_x
	.word	p14_x
	.word	p12_l0
	.word	p12_x
	.word	p11_l0
	.word	p11_x
	.word	p16_l1
	.word	p10_l0
	.word	p10_x
	.word	p9_x
	.word	p2_l1
	.word	p6_x
	.word	p8_l1
	.word	p13_l0
	.word	p13_x
	.word	p7_l1
	.word	p12_l1
	.word	p6_l0
	.word	p14_l0
	.word	p15_l1
	.word	p9_l0
	.word	p5_l1
	.word	p9_l1
	.word	p7_x
	.word	p15_l0
	.word	p10_l1
	.word	p8_x
	.word	p5_x
	.word	p11_l1
	.word	p5_l0
	.word	p6_l1
	.word	p13_l1
	.word	p7_l0
	.word	p14_l1
	.word	p8_l0
	.word	p4_x
	.word	p4_l1
	.word	p4_l0
	.word	p3_x
	.word	p3_l1
	.word	p3_l0
	.word	p2_x
	.word	p2_l1
	.word	p2_l0
	.word	p1_x
	.word	p1_l1
	.word	p1_l0
	.word	p0_x
	.word	p0_l1
	.word	p0_l0
	.word	delta
	.word	_diverge_delta
	.word	_x__diverge_delta
	.word	_x_p15_x
	.word	_x_p14_x
	.word	_x_p12_l0
	.word	_x_p12_x
	.word	_x_p11_l0
	.word	_x_p11_x
	.word	_x_p10_l0
	.word	_x_p10_x
	.word	_x_p9_x
	.word	_x_p2_l1
	.word	_x_p6_x
	.word	_x_p8_l1
	.word	_x_p2_l0
	.word	_x_p13_l0
	.word	_x_p2_x
	.word	_x_p1_l1
	.word	_x_delta
	.word	_x_p13_x
	.word	_x_p0_l0
	.word	_x_p7_l1
	.word	_x_p0_x
	.word	_x_p12_l1
	.word	_x_p6_l0
	.word	_x_turn
	.word	_x_p14_l0
	.word	_x_p3_x
	.word	_x_p15_l1
	.word	_x_p9_l0
	.word	_x_p1_x
	.word	_x_p5_l1
	.word	_x_p9_l1
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	_x_p0_l1
	.word	_x_p7_x
	.word	_x_p15_l0
	.word	_x_p4_x
	.word	_x_p10_l1
	.word	_x_p4_l0
	.word	_x_p1_l0
	.word	_x_p4_l1
	.word	_x_p8_x
	.word	_x_p5_x
	.word	_x_p11_l1
	.word	_x_p5_l0
	.word	_x_p6_l1
	.word	_x_p13_l1
	.word	_x_p7_l0
	.word	_x_p14_l1
	.word	_x_p8_l0
	.word	_x_p16_l0
	.word	_x_p16_l1
	.word	p16_l0
	.word	p16_l1
	.word	delta
	.word	turn
	.word	id
	.word	_x_id
	.word	_x_p16_x
	.word	p16_x
.L698:
	beq	.L4
.L76:
	ldr	r3, .L697+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+148
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L78
	ldr	r3, .L697+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L78:
	ldr	r3, .L697+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L80
	ldr	r3, .L697+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L80:
	ldr	r3, .L697+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L697+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L79
.L81:
	ldr	r3, .L697+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L79:
	ldr	r3, .L697+148
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L82
	ldr	r3, .L697+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L697+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L82:
	ldr	r3, .L697+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	ldr	r3, .L697+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
.L84:
	ldr	r3, .L697+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
	ldr	r3, .L697+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
.L86:
	ldr	r3, .L697+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L87
	ldr	r3, .L697+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L85
.L87:
	ldr	r3, .L697+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L85:
	ldr	r3, .L697+160
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L88
	ldr	r3, .L697+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L697+168
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L88:
	ldr	r3, .L697+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L90
	ldr	r3, .L697+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L90:
	ldr	r3, .L697+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L92
	ldr	r3, .L697+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L92:
	ldr	r3, .L697+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L697+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L91
.L93:
	ldr	r3, .L697+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L91:
	ldr	r3, .L697+172
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L94
	ldr	r3, .L697+176
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L697+180
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L94:
	ldr	r3, .L697+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+184
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L96
	ldr	r3, .L697+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
.L96:
	ldr	r3, .L697+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L98
	ldr	r3, .L697+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
.L98:
	ldr	r3, .L697+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	ldr	r3, .L697+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L97
.L99:
	ldr	r3, .L697+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L97:
	ldr	r3, .L697+184
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L100
	ldr	r3, .L697+188
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L697+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L100:
	ldr	r3, .L697+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L4
	ldr	r3, .L697+196
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L102
	ldr	r3, .L697+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L102:
	ldr	r3, .L697+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L697+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L104:
	ldr	r3, .L697+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L105
	ldr	r3, .L697+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L103
.L105:
	ldr	r3, .L697+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L103:
	ldr	r3, .L697+196
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L106
	ldr	r3, .L697+200
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L106
	ldr	r3, .L697+204
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L4
.L106:
	ldr	r3, .L697+208
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L108
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L4
.L108:
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L109
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L4
.L109:
	ldr	r3, .L697+208
	ldr	r3, [r3]	@ float
	ldr	r2, .L697+212
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L4
	mov	r3, #1
	b	.L111
.L4:
	mov	r3, #0
.L111:
	str	r3, [fp, #-24]
	b	.L112
.L588:
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+216
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+452
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+220
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+224
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+228
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+232
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+236
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+240
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+424
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+244
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+248
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+252
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+256
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+260
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+264
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+268
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+272
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+276
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+280
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+284
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+288
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+292
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+296
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+300
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+304
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+308
	strb	r2, [r3]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L697+312
	str	r3, [r2]
	bl	__VERIFIER_nondet_int
	mov	r3, r0
	ldr	r2, .L697+448
	str	r3, [r2]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+316
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+320
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+324
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+328
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+332
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+336
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+340
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+344
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+348
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+352
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+356
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+360
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+364
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+368
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+372
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+376
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+380
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+384
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+420
	strb	r2, [r3]
	bl	__VERIFIER_nondet_float
	mov	r3, r0
	ldr	r2, .L697+388
	str	r3, [r2]	@ float
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+392
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+396
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+400
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+404
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+408
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+412
	strb	r2, [r3]
	bl	__VERIFIER_nondet_bool
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L697+416
	strb	r2, [r3]
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L113
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
.L113:
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L115
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
.L115:
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L116
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L114
.L116:
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L114:
	ldr	r3, .L697+452
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L118
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L118
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L118:
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L697+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L119
	ldr	r3, .L697+436
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L697+456
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L697+452
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L120
.L119:
	ldr	r3, .L697+436
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L117
.L120:
	ldr	r3, .L697+444
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L122
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L697+444
	ldr	r2, [r3]
	ldr	r3, .L697+448
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L122
	ldr	r3, .L697+452
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L123
.L122:
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L697+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L697+436
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L123
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L117
.L123:
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L124
	ldr	r3, .L697+456
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L697+452
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L124
	ldr	r3, .L697+448
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L127
.L124:
	ldr	r3, .L697+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L127
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L697+436
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L127
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L117
.L127:
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L128
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
.L128:
	ldr	r3, .L697+420
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L130
	ldr	r3, .L697+424
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
.L130:
	ldr	r3, .L697+428
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L697+432
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L129
	ldr	r3, .L697+436
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L129
	ldr	r3, .L697+440
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L117
.L129:
	ldr	r3, .L697+444
	ldr	r2, [r3]
	ldr	r3, .L697+448
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L131
	ldr	r3, .L697+452
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L131
	ldr	r3, .L697+456
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L133
	mov	r3, #0
	mov	r4, r3
.L133:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L131
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L134
.L131:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L134
	ldr	r3, .L700+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L700+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L134
	ldr	r3, .L700+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L700+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L134:
	ldr	r3, .L700
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L135
	ldr	r3, .L700+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L700+28
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L137
	mov	r3, #0
	mov	r4, r3
.L137:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L138
.L135:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L138
	ldr	r3, .L700+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L700+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
	ldr	r3, .L700+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L138
	ldr	r3, .L700+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L138:
	ldr	r3, .L700+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L700+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L700+28
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+32
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L140
.L139:
	ldr	r3, .L700+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
	ldr	r3, .L700+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L140
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L117
.L140:
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L141
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
.L141:
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L143
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
.L143:
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L144
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
.L144:
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L142:
	ldr	r3, .L700+44
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L145
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L145
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L145:
	ldr	r3, .L700+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L700+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L700+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L700+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L147
.L146:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L117
.L147:
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L149
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L149
	ldr	r3, .L700
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L149
	ldr	r3, .L700+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L150
.L149:
	ldr	r3, .L700+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L700+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L150
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L117
.L150:
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L151
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L151
	ldr	r3, .L700+56
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L151
	ldr	r3, .L700+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L151
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L154
.L151:
	ldr	r3, .L700+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L154
	ldr	r3, .L700+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L154
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L154
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L117
.L154:
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
.L155:
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L157
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
.L157:
	ldr	r3, .L700+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L700+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L156
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L117
.L156:
	ldr	r3, .L700
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L158
	ldr	r3, .L700+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L700+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L160
	mov	r3, #0
	mov	r4, r3
.L160:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L158
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L161
.L158:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L161
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L161
	ldr	r3, .L700+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L700+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L161:
	ldr	r3, .L700
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L162
	ldr	r3, .L700+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L700+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L164
	mov	r3, #0
	mov	r4, r3
.L164:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L162
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L165
.L162:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #16
	bne	.L165
	ldr	r3, .L700+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L700+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L165
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L165:
	ldr	r3, .L700+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L700+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L166
	ldr	r3, .L700+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L167
.L166:
	ldr	r3, .L700+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L700+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L117
.L167:
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L168
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
.L168:
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L170
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
.L170:
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
.L171:
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L169:
	ldr	r3, .L700+68
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L172
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L172:
	ldr	r3, .L700+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L700+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L173
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L700+80
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L700+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L174
.L173:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L117
.L174:
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L176
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L176
	ldr	r3, .L700
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L176
	ldr	r3, .L700+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L177
.L176:
	ldr	r3, .L700+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L700+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L177
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L117
.L177:
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L178
	ldr	r3, .L700+80
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L700+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L178
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L181
.L178:
	ldr	r3, .L700+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L700+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L181
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L117
.L181:
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L182
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
.L182:
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L184
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
.L184:
	ldr	r3, .L700+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L700+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L183
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L117
.L183:
	ldr	r3, .L700
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L185
	ldr	r3, .L700+68
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L185
	ldr	r3, .L700+80
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L187
	mov	r3, #0
	mov	r4, r3
.L187:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L185
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L188
.L185:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L188
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L188
	ldr	r3, .L700+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L700+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L188:
	ldr	r3, .L700
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L189
	ldr	r3, .L700+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L700+80
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L191
	mov	r3, #0
	mov	r4, r3
.L191:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L189
	ldr	r3, .L700
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L192
.L189:
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #15
	bne	.L192
	ldr	r3, .L700+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L700+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L192
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L192:
	ldr	r3, .L700+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L700+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L193
	ldr	r3, .L700+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+68
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L194
.L193:
	ldr	r3, .L700+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L700+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L700+4
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L700+8
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L117
.L194:
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L195
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
.L195:
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L197
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
.L197:
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L198
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
.L198:
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	b	.L701
.L702:
	.align	2
.L700:
	.word	id
	.word	delta
	.word	turn
	.word	_x_p16_l0
	.word	_x_p16_l1
	.word	p16_l0
	.word	p16_l1
	.word	p16_x
	.word	_x_p16_x
	.word	_x_p15_l0
	.word	_x_p15_l1
	.word	_x_p15_x
	.word	p15_l0
	.word	p15_l1
	.word	p15_x
	.word	_x_p14_l0
	.word	_x_p14_l1
	.word	_x_p14_x
	.word	p14_l0
	.word	p14_l1
	.word	p14_x
	.word	_x_p13_l0
	.word	_x_p13_l1
	.word	_x_id
	.word	p13_x
	.word	_x_p13_x
	.word	p13_l0
	.word	p13_l1
	.word	_x_p12_l0
	.word	_x_p12_l1
	.word	p12_x
	.word	_x_p12_x
	.word	p12_l0
	.word	p12_l1
	.word	id
	.word	_x_id
	.word	p11_l0
	.word	p11_l1
	.word	delta
	.word	turn
	.word	_x_p11_l0
	.word	_x_p11_l1
	.word	p11_x
	.word	_x_p11_x
.L701:
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L196:
	ldr	r3, .L700+100
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L199:
	ldr	r3, .L700+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L700+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L700+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L700+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L201
.L200:
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L117
.L201:
	ldr	r3, .L700+136
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L203
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
	ldr	r3, .L700+136
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L203
	ldr	r3, .L700+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L204
.L203:
	ldr	r3, .L700+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L700+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L204
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L204
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L117
.L204:
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L205
	ldr	r3, .L700+96
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L700+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L208
.L205:
	ldr	r3, .L700+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L208
	ldr	r3, .L700+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L208
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L117
.L208:
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L210
.L209:
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
.L211:
	ldr	r3, .L700+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L700+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L210
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L117
.L210:
	ldr	r3, .L700+136
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L212
	ldr	r3, .L700+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L700+96
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L214
	mov	r3, #0
	mov	r4, r3
.L214:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L212
	ldr	r3, .L700+136
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L215
.L212:
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L215
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L215
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L215
	ldr	r3, .L700+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L700+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L215:
	ldr	r3, .L700+136
	ldr	r2, [r3]
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L216
	ldr	r3, .L700+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L700+96
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L218
	mov	r3, #0
	mov	r4, r3
.L218:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L216
	ldr	r3, .L700+136
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L219
.L216:
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #14
	bne	.L219
	ldr	r3, .L700+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L700+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L219
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L219:
	ldr	r3, .L700+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L700+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L700+92
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L220
	ldr	r3, .L700+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L221
.L220:
	ldr	r3, .L700+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
	ldr	r3, .L700+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L221
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L221
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L117
.L221:
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L222
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
.L222:
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L224
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
.L224:
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L223
.L225:
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L223:
	ldr	r3, .L700+124
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L226
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L226
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L226:
	ldr	r3, .L700+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L700+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L700+120
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L700+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L228
.L227:
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L117
.L228:
	ldr	r3, .L700+136
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L230
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L230
	ldr	r3, .L700+136
	ldr	r2, [r3]
	ldr	r3, .L700+140
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L230
	ldr	r3, .L700+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L231
.L230:
	ldr	r3, .L700+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
	ldr	r3, .L700+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L231
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L117
.L231:
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L232
	ldr	r3, .L700+120
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L700+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L232
	ldr	r3, .L700+140
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L235
.L232:
	ldr	r3, .L700+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L700+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L235
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L235
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L117
.L235:
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L236
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
.L236:
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
.L238:
	ldr	r3, .L700+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L700+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L237
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L237
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L117
.L237:
	ldr	r3, .L700+136
	ldr	r2, [r3]
	ldr	r3, .L700+140
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L239
	ldr	r3, .L700+124
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L239
	ldr	r3, .L700+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L241
	mov	r3, #0
	mov	r4, r3
.L241:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L239
	ldr	r3, .L700+136
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L242
.L239:
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L242
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L242
	ldr	r3, .L700+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L700+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L242:
	ldr	r3, .L700+136
	ldr	r2, [r3]
	ldr	r3, .L700+140
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L243
	ldr	r3, .L700+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L700+120
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L245
	mov	r3, #0
	mov	r4, r3
.L245:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L243
	ldr	r3, .L700+136
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L246
.L243:
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #13
	bne	.L246
	ldr	r3, .L700+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L700+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L246
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L246:
	ldr	r3, .L700+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L700+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L700+140
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L247
	ldr	r3, .L700+120
	ldr	r3, [r3]	@ float
	ldr	r2, .L700+124
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L248
.L247:
	ldr	r3, .L700+128
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L700+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L248
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L117
.L248:
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L249
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
.L249:
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L251
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
.L251:
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L250
.L252:
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L250:
	ldr	r3, .L700+172
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L253
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L253
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L253:
	ldr	r3, .L700+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L700+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L700+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L700+172
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L255
.L254:
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L117
.L255:
	ldr	r3, .L700+136
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L257
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L257
	ldr	r3, .L700+136
	ldr	r2, [r3]
	ldr	r3, .L700+140
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L257
	ldr	r3, .L700+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L258
.L257:
	ldr	r3, .L700+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L700+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L258
	ldr	r3, .L700+152
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L700+156
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L117
.L258:
	ldr	r3, .L700+160
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L700+164
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L259
	ldr	r3, .L700+168
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L700+172
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L259
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L262
.L259:
	ldr	r3, .L703+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L703+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L262
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L262
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L117
.L262:
	ldr	r3, .L703+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L263
	ldr	r3, .L703+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
.L263:
	ldr	r3, .L703+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L703+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
.L265:
	ldr	r3, .L703+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L703+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L264
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L264
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L117
.L264:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L266
	ldr	r3, .L703+28
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L703+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L268
	mov	r3, #0
	mov	r4, r3
.L268:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L266
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L269
.L266:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L269
	ldr	r3, .L703+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L703+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L269
	ldr	r3, .L703+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L703+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L269:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L270
	ldr	r3, .L703+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L703+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L272
	mov	r3, #0
	mov	r4, r3
.L272:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L270
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L273
.L270:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #12
	bne	.L273
	ldr	r3, .L703+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L703+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L273
	ldr	r3, .L703+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L273
	ldr	r3, .L703+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L273:
	ldr	r3, .L703+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L703+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L274
	ldr	r3, .L703+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+28
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L275
.L274:
	ldr	r3, .L703+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L703+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L275
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L117
.L275:
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L276
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
.L276:
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
.L278:
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L279
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L277
.L279:
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L277:
	ldr	r3, .L703+44
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L280
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L280:
	ldr	r3, .L703+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L703+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L281
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L703+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L703+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L282
.L281:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L117
.L282:
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L284
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L284
	ldr	r3, .L703+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L285
.L284:
	ldr	r3, .L703+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L703+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L285
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L285
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L117
.L285:
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L286
	ldr	r3, .L703+56
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L703+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L289
.L286:
	ldr	r3, .L703+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L703+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L289
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L117
.L289:
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L290
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
.L290:
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
.L292:
	ldr	r3, .L703+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L703+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L291
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L291
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L117
.L291:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L293
	ldr	r3, .L703+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L703+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L295
	mov	r3, #0
	mov	r4, r3
.L295:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L293
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L296
.L293:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L296
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L296
	ldr	r3, .L703+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L296
	ldr	r3, .L703+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L296:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L297
	ldr	r3, .L703+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L703+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L299
	mov	r3, #0
	mov	r4, r3
.L299:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L300
.L297:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #11
	bne	.L300
	ldr	r3, .L703+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L703+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L300
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L300:
	ldr	r3, .L703+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L703+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L301
	ldr	r3, .L703+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L302
.L301:
	ldr	r3, .L703+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L703+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L302
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L117
.L302:
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L303
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
.L303:
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
.L305:
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L306
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L304
.L306:
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L304:
	ldr	r3, .L703+72
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L307
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L307:
	ldr	r3, .L703+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L703+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L308
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L703+68
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L703+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L309
.L308:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L117
.L309:
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L311
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L311
	ldr	r3, .L703+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L312
.L311:
	ldr	r3, .L703+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L703+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L312
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L312
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L117
.L312:
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L313
	ldr	r3, .L703+68
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L703+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L316
.L313:
	ldr	r3, .L703+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L703+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L316
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L117
.L316:
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L317
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
.L317:
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
.L319:
	ldr	r3, .L703+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L703+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L318
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L318
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L117
.L318:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L320
	ldr	r3, .L703+72
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L703+68
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L322
	mov	r3, #0
	mov	r4, r3
.L322:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L320
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L323
.L320:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L703+16
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L323
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L323
	ldr	r3, .L703+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L323
	ldr	r3, .L703+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L323:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L324
	ldr	r3, .L703+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L703+68
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L326
	mov	r3, #0
	mov	r4, r3
.L326:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L327
.L324:
	ldr	r3, .L703+12
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	b	.L704
.L705:
	.align	2
.L703:
	.word	_x_id
	.word	p11_l1
	.word	p11_l0
	.word	delta
	.word	turn
	.word	_x_p11_l0
	.word	_x_p11_l1
	.word	_x_p11_x
	.word	p11_x
	.word	_x_p10_l0
	.word	_x_p10_l1
	.word	_x_p10_x
	.word	p10_l0
	.word	p10_l1
	.word	p10_x
	.word	_x_p9_l0
	.word	_x_p9_l1
	.word	p9_x
	.word	_x_p9_x
	.word	p9_l0
	.word	p9_l1
	.word	_x_p8_l0
	.word	_x_p8_l1
	.word	p8_x
	.word	_x_p8_x
	.word	p8_l0
	.word	p8_l1
	.word	id
	.word	_x_p7_l0
	.word	_x_p7_l1
	.word	_x_id
	.word	p7_x
	.word	_x_p7_x
	.word	p7_l0
	.word	p7_l1
	.word	turn
	.word	p6_l0
	.word	_x_p6_l0
	.word	p6_l1
	.word	_x_p6_l1
	.word	delta
	.word	p6_x
	.word	_x_p6_x
.L704:
	beq	.L327
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #10
	bne	.L327
	ldr	r3, .L703+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L703+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L327
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L327:
	ldr	r3, .L703+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L703+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L328
	ldr	r3, .L703+68
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+72
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L329
.L328:
	ldr	r3, .L703+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L703+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L329
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L117
.L329:
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L330
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
.L330:
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
.L332:
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L333
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L331
.L333:
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L331:
	ldr	r3, .L703+96
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L334
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L334:
	ldr	r3, .L703+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L703+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L703+92
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L703+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L336
.L335:
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L117
.L336:
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L338
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L338
	ldr	r3, .L703+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L339
.L338:
	ldr	r3, .L703+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L703+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L339
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L339
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L117
.L339:
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L703+92
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L703+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L340
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L343
.L340:
	ldr	r3, .L703+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L703+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L343
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L343
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L117
.L343:
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L344
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
.L344:
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L346
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
.L346:
	ldr	r3, .L703+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L703+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L345
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L117
.L345:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L347
	ldr	r3, .L703+96
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L703+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L349
	mov	r3, #0
	mov	r4, r3
.L349:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L350
.L347:
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L350
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L350
	ldr	r3, .L703+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L350
	ldr	r3, .L703+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L350:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L351
	ldr	r3, .L703+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L703+92
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L353
	mov	r3, #0
	mov	r4, r3
.L353:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L351
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L354
.L351:
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #9
	bne	.L354
	ldr	r3, .L703+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L703+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L354
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L354
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L354:
	ldr	r3, .L703+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L703+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L355
	ldr	r3, .L703+92
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+96
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L356
.L355:
	ldr	r3, .L703+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L703+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L356
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L117
.L356:
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L357
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
.L357:
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L359
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
.L359:
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
.L360:
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L358:
	ldr	r3, .L703+128
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L361
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L361:
	ldr	r3, .L703+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L703+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L362
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L703+124
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L703+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L363
.L362:
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L117
.L363:
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L365
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L365
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L365
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L365
	ldr	r3, .L703+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L366
.L365:
	ldr	r3, .L703+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L703+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L366
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L366
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L117
.L366:
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L367
	ldr	r3, .L703+124
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L703+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L367
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L370
.L367:
	ldr	r3, .L703+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L703+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L370
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L117
.L370:
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L371
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
.L371:
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L373
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
.L373:
	ldr	r3, .L703+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L703+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L372
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L117
.L372:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L374
	ldr	r3, .L703+128
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L703+124
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L376
	mov	r3, #0
	mov	r4, r3
.L376:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L377
.L374:
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L377
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L377
	ldr	r3, .L703+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L377
	ldr	r3, .L703+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L377:
	ldr	r3, .L703+108
	ldr	r2, [r3]
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L378
	ldr	r3, .L703+124
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L703+124
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L380
	mov	r3, #0
	mov	r4, r3
.L380:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L378
	ldr	r3, .L703+108
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L381
.L378:
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #8
	bne	.L381
	ldr	r3, .L703+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L703+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L381
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L381:
	ldr	r3, .L703+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L703+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L703+120
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L382
	ldr	r3, .L703+124
	ldr	r3, [r3]	@ float
	ldr	r2, .L703+128
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L383
.L382:
	ldr	r3, .L703+132
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L703+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L383
	ldr	r3, .L703+140
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L117
.L383:
	ldr	r3, .L703+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L384
	ldr	r3, .L703+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
.L384:
	ldr	r3, .L703+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L386
	ldr	r3, .L703+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
.L386:
	ldr	r3, .L703+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L387
	ldr	r3, .L703+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L385
.L387:
	ldr	r3, .L703+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L703+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L385:
	ldr	r3, .L703+168
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L388
	ldr	r3, .L703+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L388
	ldr	r3, .L703+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L388:
	ldr	r3, .L703+144
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+148
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L703+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L703+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L389
	ldr	r3, .L703+160
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L703+164
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L703+168
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L390
.L389:
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L117
.L390:
	ldr	r3, .L706+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L706+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L392
	ldr	r3, .L706+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L392
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L392
	ldr	r3, .L706+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L393
.L392:
	ldr	r3, .L706+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L706+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L393
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L393
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L117
.L393:
	ldr	r3, .L706+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L706+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L394
	ldr	r3, .L706+32
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L706+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L394
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L397
.L394:
	ldr	r3, .L706+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L706+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L397
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L397
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L117
.L397:
	ldr	r3, .L706+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L398
	ldr	r3, .L706+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
.L398:
	ldr	r3, .L706+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	ldr	r3, .L706+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
.L400:
	ldr	r3, .L706+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L706+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L399
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L399
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L117
.L399:
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L401
	ldr	r3, .L706+20
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L401
	ldr	r3, .L706+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L403
	mov	r3, #0
	mov	r4, r3
.L403:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L401
	ldr	r3, .L706+8
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L404
.L401:
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L404
	ldr	r3, .L706+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L706+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L404
	ldr	r3, .L706+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L404
	ldr	r3, .L706+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L404:
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L405
	ldr	r3, .L706+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L706+32
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L407
	mov	r3, #0
	mov	r4, r3
.L407:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L405
	ldr	r3, .L706+8
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L408
.L405:
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #7
	bne	.L408
	ldr	r3, .L706+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L706+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L408
	ldr	r3, .L706+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L408
	ldr	r3, .L706+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L408:
	ldr	r3, .L706+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L706+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L409
	ldr	r3, .L706+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+20
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L410
.L409:
	ldr	r3, .L706+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L706+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L410
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L117
.L410:
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L411
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
.L411:
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L413
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
.L413:
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L414
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L412
.L414:
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L412:
	ldr	r3, .L706+44
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L415
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L415
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L415:
	ldr	r3, .L706+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L706+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L416
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L706+56
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L706+44
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L417
.L416:
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L117
.L417:
	ldr	r3, .L706+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L419
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L419
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L419
	ldr	r3, .L706+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L420
.L419:
	ldr	r3, .L706+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L706+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L420
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L117
.L420:
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L706+56
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L706+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L421
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L424
.L421:
	ldr	r3, .L706+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L706+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L424
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L117
.L424:
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
.L425:
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L427
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
.L427:
	ldr	r3, .L706+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L706+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L426
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L117
.L426:
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L428
	ldr	r3, .L706+44
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L706+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L430
	mov	r3, #0
	mov	r4, r3
.L430:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L428
	ldr	r3, .L706+8
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L431
.L428:
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L431
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L431
	ldr	r3, .L706+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L431
	ldr	r3, .L706+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L431:
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L432
	ldr	r3, .L706+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L706+56
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L434
	mov	r3, #0
	mov	r4, r3
.L434:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L432
	ldr	r3, .L706+8
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L435
.L432:
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #6
	bne	.L435
	ldr	r3, .L706+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L706+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L435
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L435:
	ldr	r3, .L706+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L706+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L706+56
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+44
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L437
.L436:
	ldr	r3, .L706+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L706+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L437
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L117
.L437:
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
.L438:
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L440
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
.L440:
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L441
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L439
.L441:
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L439:
	ldr	r3, .L706+76
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L442
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L442:
	ldr	r3, .L706+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L706+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L443
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L706+72
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L706+76
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L444
.L443:
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L117
.L444:
	ldr	r3, .L706+8
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L446
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L446
	ldr	r3, .L706+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L447
.L446:
	ldr	r3, .L706+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L706+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L447
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L447
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L117
.L447:
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L706+72
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L706+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L448
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L451
.L448:
	ldr	r3, .L706+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L706+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L451
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L451
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L117
.L451:
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
.L452:
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L454
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
.L454:
	ldr	r3, .L706+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L706+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L706
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L453
	ldr	r3, .L706+4
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L117
.L453:
	ldr	r3, .L706+8
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L455
	ldr	r3, .L706+76
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L455
	ldr	r3, .L706+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L457
	b	.L707
.L708:
	.align	2
.L706:
	.word	delta
	.word	turn
	.word	id
	.word	_x_p6_l1
	.word	_x_p6_l0
	.word	_x_p6_x
	.word	p6_l0
	.word	p6_l1
	.word	p6_x
	.word	_x_p5_l0
	.word	_x_p5_l1
	.word	_x_p5_x
	.word	p5_l0
	.word	p5_l1
	.word	p5_x
	.word	_x_p4_l0
	.word	_x_p4_l1
	.word	_x_id
	.word	p4_x
	.word	_x_p4_x
	.word	p4_l0
	.word	p4_l1
	.word	_x_p3_l0
	.word	_x_p3_l1
	.word	p3_x
	.word	_x_p3_x
	.word	p3_l0
	.word	p3_l1
	.word	id
	.word	_x_p2_l0
	.word	_x_p2_l1
	.word	_x_id
	.word	p2_x
	.word	_x_p2_x
	.word	p2_l0
	.word	p2_l1
	.word	delta
	.word	turn
	.word	_x_p1_l0
	.word	_x_p1_l1
.L707:
	mov	r3, #0
	mov	r4, r3
.L457:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L455
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L458
.L455:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L458
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L706+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L458
	ldr	r3, .L706+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L458:
	ldr	r3, .L706+112
	ldr	r2, [r3]
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L459
	ldr	r3, .L706+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L459
	ldr	r3, .L706+72
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L461
	mov	r3, #0
	mov	r4, r3
.L461:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L459
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L462
.L459:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #5
	bne	.L462
	ldr	r3, .L706+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L706+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L462
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L462:
	ldr	r3, .L706+60
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L706+64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L706+68
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L463
	ldr	r3, .L706+72
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+76
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L464
.L463:
	ldr	r3, .L706+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L706+84
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L464
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L117
.L464:
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
.L465:
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L467
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
.L467:
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L468
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L466
.L468:
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L466:
	ldr	r3, .L706+100
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L469
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L469
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L469:
	ldr	r3, .L706+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L706+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L470
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L706+96
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L706+100
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L471
.L470:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L117
.L471:
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L473
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L706+112
	ldr	r2, [r3]
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L473
	ldr	r3, .L706+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L474
.L473:
	ldr	r3, .L706+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L706+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L474
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L117
.L474:
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L706+96
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L706+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L475
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L478
.L475:
	ldr	r3, .L706+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L706+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L478
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L117
.L478:
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L479
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L480
.L479:
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L481
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
.L481:
	ldr	r3, .L706+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L706+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L480
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L117
.L480:
	ldr	r3, .L706+112
	ldr	r2, [r3]
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L482
	ldr	r3, .L706+100
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L706+96
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L484
	mov	r3, #0
	mov	r4, r3
.L484:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L482
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L485
.L482:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L485
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L485
	ldr	r3, .L706+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L485
	ldr	r3, .L706+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L485:
	ldr	r3, .L706+112
	ldr	r2, [r3]
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L486
	ldr	r3, .L706+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L706+96
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L488
	mov	r3, #0
	mov	r4, r3
.L488:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L486
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L489
.L486:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #4
	bne	.L489
	ldr	r3, .L706+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L706+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L489
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L489:
	ldr	r3, .L706+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L706+92
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L706+96
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+100
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L491
.L490:
	ldr	r3, .L706+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L706+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L491
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L117
.L491:
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
.L492:
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L494
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
.L494:
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L495
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L493
.L495:
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L493:
	ldr	r3, .L706+132
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L496
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L496:
	ldr	r3, .L706+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L706+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L497
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L706+128
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L706+132
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L498
.L497:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L117
.L498:
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L500
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L500
	ldr	r3, .L706+112
	ldr	r2, [r3]
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L500
	ldr	r3, .L706+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L501
.L500:
	ldr	r3, .L706+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L706+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L501
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L117
.L501:
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L706+128
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L706+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L502
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L505
.L502:
	ldr	r3, .L706+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L505
	ldr	r3, .L706+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L505
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L117
.L505:
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L506
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
.L506:
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L508
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
.L508:
	ldr	r3, .L706+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L706+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L507
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L117
.L507:
	ldr	r3, .L706+112
	ldr	r2, [r3]
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L509
	ldr	r3, .L706+132
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L706+128
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L511
	mov	r3, #0
	mov	r4, r3
.L511:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L509
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L512
.L509:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L512
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L512
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L512
	ldr	r3, .L706+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L512
	ldr	r3, .L706+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L512:
	ldr	r3, .L706+112
	ldr	r2, [r3]
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L513
	ldr	r3, .L706+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+132
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L706+128
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L515
	mov	r3, #0
	mov	r4, r3
.L515:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L513
	ldr	r3, .L706+112
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L516
.L513:
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #3
	bne	.L516
	ldr	r3, .L706+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L706+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L516
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L516:
	ldr	r3, .L706+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L706+120
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L706+124
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L706+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L706+132
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L518
.L517:
	ldr	r3, .L706+136
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L706+140
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L706+144
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L518
	ldr	r3, .L706+148
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L117
.L518:
	ldr	r3, .L706+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L706+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
.L519:
	ldr	r3, .L706+152
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L521
	ldr	r3, .L706+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
.L521:
	ldr	r3, .L706+156
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L522
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L520
.L522:
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L520:
	ldr	r3, .L709+8
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L523
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L523:
	ldr	r3, .L709+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L709+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L524
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L709+20
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L709+8
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L525
.L524:
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L117
.L525:
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L527
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L709+244
	ldr	r2, [r3]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L527
	ldr	r3, .L709+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L528
.L527:
	ldr	r3, .L709+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L709+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L528
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L528
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L117
.L528:
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L529
	ldr	r3, .L709+20
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L709+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L529
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L532
.L529:
	ldr	r3, .L709+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L709+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L532
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L117
.L532:
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
.L533:
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L535
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
.L535:
	ldr	r3, .L709+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L709+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L534
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L534
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L117
.L534:
	ldr	r3, .L709+244
	ldr	r2, [r3]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L536
	ldr	r3, .L709+8
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L709+20
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L538
	mov	r3, #0
	mov	r4, r3
.L538:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L536
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L539
.L536:
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L539
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L709+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L539
	ldr	r3, .L709+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L539:
	ldr	r3, .L709+244
	ldr	r2, [r3]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L540
	ldr	r3, .L709+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L709+20
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L542
	mov	r3, #0
	mov	r4, r3
.L542:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L540
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L543
.L540:
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L543
	ldr	r3, .L709+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L709+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L543
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L543
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L543:
	ldr	r3, .L709
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L709+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L709+20
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+8
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L545
.L544:
	ldr	r3, .L709+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L709+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L545
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L117
.L545:
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L546
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L546:
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L548
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L548:
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L549
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L547
.L549:
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L547:
	ldr	r3, .L709+208
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L550
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L550:
	ldr	r3, .L709+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L709+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L551
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L709+212
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L709+208
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L552
.L551:
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L117
.L552:
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L709+208
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L554
	ldr	r3, .L709+244
	ldr	r2, [r3]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L556
.L554:
	ldr	r3, .L709+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L709+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L556
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
.L556:
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	ldr	r3, .L709+212
	ldr	r3, [r3]	@ float
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L709+208
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L558
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L561
.L558:
	ldr	r3, .L709+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L561
	ldr	r3, .L709+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L561
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L561
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
.L561:
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
.L563:
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L565
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
.L565:
	ldr	r3, .L709+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L564
	ldr	r3, .L709+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L564
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L564
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
.L564:
	ldr	r3, .L709+208
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L709+244
	ldr	r2, [r3]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L567
	ldr	r3, .L709+212
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L569
	mov	r3, #0
	mov	r4, r3
.L569:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L567
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L570
.L567:
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L570
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L570
	ldr	r3, .L709+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L570
	ldr	r3, .L709+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L117
.L570:
	ldr	r3, .L709+244
	ldr	r2, [r3]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L571
	ldr	r3, .L709+212
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+208
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L709+212
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L573
	mov	r3, #0
	mov	r4, r3
.L573:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L571
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L574
.L571:
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L574
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L709+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L709+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L574
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L574
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L117
.L574:
	ldr	r3, .L709+192
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L709+320
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L575
	ldr	r3, .L709+212
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+208
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L575
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L577
.L575:
	ldr	r3, .L709+196
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L709+324
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L577
	ldr	r3, .L709+236
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L577
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
.L577:
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #17
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L579
	ldr	r3, .L709+244
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L117
.L579:
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #1
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #2
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #3
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #4
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #5
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #6
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #7
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #8
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #9
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #10
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #11
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #12
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #13
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #14
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #15
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #16
	beq	.L580
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r3, #17
	bne	.L117
.L580:
	ldr	r3, .L709+176
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r1, #0
	mov	r0, r3
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L709+244
	ldr	r2, [r3]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L117
	ldr	r3, .L709+236
	ldr	r2, [r3]
	ldr	r3, .L709+232
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L117
.L582:
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+24
	ldr	r2, [r2]	@ float
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L583
	ldr	r3, .L709+28
	ldr	r3, [r3]	@ float
	mov	r2, #1
	mov	r4, r2
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	b	.L710
.L711:
	.align	2
.L709:
	.word	_x_p1_l0
	.word	_x_p1_l1
	.word	_x_p1_x
	.word	p1_l0
	.word	p1_l1
	.word	p1_x
	.word	_x__diverge_delta
	.word	_diverge_delta
	.word	_x_p16_x
	.word	p16_x
	.word	_x_p15_x
	.word	p15_x
	.word	_x_p14_x
	.word	p14_x
	.word	_x_p12_l0
	.word	p12_l0
	.word	_x_p12_x
	.word	p12_x
	.word	_x_p11_l0
	.word	p11_l0
	.word	_x_p11_x
	.word	p11_x
	.word	_x_p16_l1
	.word	p16_l1
	.word	_x_p10_l0
	.word	p10_l0
	.word	_x_p10_x
	.word	p10_x
	.word	_x_p9_x
	.word	p9_x
	.word	_x_p2_l1
	.word	p2_l1
	.word	_x_p6_x
	.word	p6_x
	.word	_x_p8_l1
	.word	p8_l1
	.word	_x_p2_l0
	.word	p2_l0
	.word	_x_p13_l0
	.word	p13_l0
	.word	_x_p2_x
	.word	p2_x
	.word	_x_p1_l1
	.word	p1_l1
	.word	_x_delta
	.word	delta
	.word	_x_p13_x
	.word	p13_x
	.word	_x_p0_l0
	.word	p0_l0
	.word	_x_p7_l1
	.word	p7_l1
	.word	_x_p0_x
	.word	p0_x
	.word	_x_p12_l1
	.word	p12_l1
	.word	_x_p6_l0
	.word	p6_l0
	.word	_x_turn
	.word	turn
	.word	_x_id
	.word	id
	.word	_x_p14_l0
	.word	p14_l0
	.word	_x_p3_x
	.word	p3_x
	.word	_x_p15_l1
	.word	p15_l1
	.word	_x_p9_l0
	.word	p9_l0
	.word	_x_p1_x
	.word	p1_x
	.word	_x_p5_l1
	.word	p5_l1
	.word	_x_p9_l1
	.word	p9_l1
	.word	_x_p3_l0
	.word	p3_l0
	.word	_x_p3_l1
	.word	p3_l1
	.word	_x_p0_l1
	.word	p0_l1
	.word	_x_p7_x
	.word	p7_x
	.word	_x_p15_l0
	.word	p15_l0
	.word	_x_p4_x
	.word	p4_x
	.word	_x_p10_l1
	.word	p10_l1
	.word	_x_p4_l0
	.word	p4_l0
	.word	_x_p1_l0
	.word	p1_l0
	.word	_x_p4_l1
	.word	p4_l1
	.word	_x_p8_x
	.word	p8_x
	.word	_x_p16_l0
	.word	p16_l0
	.word	_x_p5_x
	.word	p5_x
	.word	_x_p11_l1
	.word	p11_l1
	.word	_x_p5_l0
	.word	p5_l0
	.word	_x_p6_l1
	.word	p6_l1
	.word	_x_p13_l1
	.word	p13_l1
	.word	_x_p7_l0
	.word	p7_l0
	.word	_x_p14_l1
	.word	p14_l1
	.word	_x_p8_l0
	.word	p8_l0
.L710:
	bne	.L584
	mov	r3, #0
	mov	r4, r3
.L584:
	and	r3, r4, #255
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L117
.L583:
	ldr	r3, .L709+28
	ldr	r3, [r3]	@ float
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L585
	ldr	r3, .L709+180
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r4, r0
	mov	r5, r1
	ldr	r3, .L709+28
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r6, r0
	mov	r7, r1
	ldr	r3, .L709+24
	ldr	r3, [r3]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L117
.L585:
	mov	r3, #1
	b	.L587
.L117:
	mov	r3, #0
.L587:
	str	r3, [fp, #-24]
	ldr	r3, .L709+24
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+28
	str	r3, [r2]	@ float
	ldr	r3, .L709+32
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+36
	str	r3, [r2]	@ float
	ldr	r3, .L709+40
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+44
	str	r3, [r2]	@ float
	ldr	r3, .L709+48
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+52
	str	r3, [r2]	@ float
	ldr	r3, .L709+56
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+60
	strb	r2, [r3]
	ldr	r3, .L709+64
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+68
	str	r3, [r2]	@ float
	ldr	r3, .L709+72
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+76
	strb	r2, [r3]
	ldr	r3, .L709+80
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+84
	str	r3, [r2]	@ float
	ldr	r3, .L709+88
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+92
	strb	r2, [r3]
	ldr	r3, .L709+96
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+100
	strb	r2, [r3]
	ldr	r3, .L709+104
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+108
	str	r3, [r2]	@ float
	ldr	r3, .L709+112
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+116
	str	r3, [r2]	@ float
	ldr	r3, .L709+120
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+124
	strb	r2, [r3]
	ldr	r3, .L709+128
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+132
	str	r3, [r2]	@ float
	ldr	r3, .L709+136
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+140
	strb	r2, [r3]
	ldr	r3, .L709+144
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+148
	strb	r2, [r3]
	ldr	r3, .L709+152
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+156
	strb	r2, [r3]
	ldr	r3, .L709+160
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+164
	str	r3, [r2]	@ float
	ldr	r3, .L709+168
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+172
	strb	r2, [r3]
	ldr	r3, .L709+176
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+180
	str	r3, [r2]	@ float
	ldr	r3, .L709+184
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+188
	str	r3, [r2]	@ float
	ldr	r3, .L709+192
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+196
	strb	r2, [r3]
	ldr	r3, .L709+200
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+204
	strb	r2, [r3]
	ldr	r3, .L709+208
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+212
	str	r3, [r2]	@ float
	ldr	r3, .L709+216
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+220
	strb	r2, [r3]
	ldr	r3, .L709+224
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+228
	strb	r2, [r3]
	ldr	r3, .L709+232
	ldr	r3, [r3]
	ldr	r2, .L709+236
	str	r3, [r2]
	ldr	r3, .L709+240
	ldr	r3, [r3]
	ldr	r2, .L709+244
	str	r3, [r2]
	ldr	r3, .L709+248
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+252
	strb	r2, [r3]
	ldr	r3, .L709+256
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+260
	str	r3, [r2]	@ float
	ldr	r3, .L709+264
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+268
	strb	r2, [r3]
	ldr	r3, .L709+272
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+276
	strb	r2, [r3]
	ldr	r3, .L709+280
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+284
	str	r3, [r2]	@ float
	ldr	r3, .L709+288
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+292
	strb	r2, [r3]
	ldr	r3, .L709+296
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+300
	strb	r2, [r3]
	ldr	r3, .L709+304
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+308
	strb	r2, [r3]
	ldr	r3, .L709+312
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+316
	strb	r2, [r3]
	ldr	r3, .L709+320
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+324
	strb	r2, [r3]
	ldr	r3, .L709+328
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+332
	str	r3, [r2]	@ float
	ldr	r3, .L709+336
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+340
	strb	r2, [r3]
	ldr	r3, .L709+344
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+348
	str	r3, [r2]	@ float
	ldr	r3, .L709+352
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+356
	strb	r2, [r3]
	ldr	r3, .L709+360
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+364
	strb	r2, [r3]
	ldr	r3, .L709+368
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+372
	strb	r2, [r3]
	ldr	r3, .L709+376
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+380
	strb	r2, [r3]
	ldr	r3, .L709+384
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+388
	str	r3, [r2]	@ float
	ldr	r3, .L709+392
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+396
	strb	r2, [r3]
	ldr	r3, .L709+400
	ldr	r3, [r3]	@ float
	ldr	r2, .L709+404
	str	r3, [r2]	@ float
	ldr	r3, .L709+408
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+412
	strb	r2, [r3]
	ldr	r3, .L709+416
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+420
	strb	r2, [r3]
	ldr	r3, .L709+424
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+428
	strb	r2, [r3]
	ldr	r3, .L709+432
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+436
	strb	r2, [r3]
	ldr	r3, .L709+440
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+444
	strb	r2, [r3]
	ldr	r3, .L709+448
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+452
	strb	r2, [r3]
	ldr	r3, .L709+456
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L709+460
	strb	r2, [r3]
.L112:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L588
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
