	.file	"952650.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_assert
	.type	__VERIFIER_assert, @function
__VERIFIER_assert:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 0
	jne	.L4
	nop
.L3:
	jmp	.L3
.L4:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.globl	__cs_active_thread
	.data
	.align 32
	.type	__cs_active_thread, @object
	.size	__cs_active_thread, 68
__cs_active_thread:
	.long	1
	.zero	64
	.globl	__cs_pc
	.bss
	.align 32
	.type	__cs_pc, @object
	.size	__cs_pc, 68
__cs_pc:
	.zero	68
	.globl	__cs_pc_cs
	.align 32
	.type	__cs_pc_cs, @object
	.size	__cs_pc_cs, 68
__cs_pc_cs:
	.zero	68
	.globl	__cs_thread_index
	.align 4
	.type	__cs_thread_index, @object
	.size	__cs_thread_index, 4
__cs_thread_index:
	.zero	4
	.globl	__cs_thread_lines
	.data
	.align 32
	.type	__cs_thread_lines, @object
	.size	__cs_thread_lines, 68
__cs_thread_lines:
	.long	115
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.long	1
	.text
	.globl	__cs_safe_malloc
	.type	__cs_safe_malloc, @function
__cs_safe_malloc:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	__cs_safe_malloc, .-__cs_safe_malloc
	.globl	__cs_init_scalar
	.type	__cs_init_scalar, @function
__cs_init_scalar:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	cmp	DWORD PTR -28[rbp], 4
	jne	.L8
	call	__VERIFIER_nondet_int@PLT
	mov	rdx, QWORD PTR -24[rbp]
	mov	DWORD PTR [rdx], eax
	jmp	.L10
.L8:
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
.L10:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	__cs_init_scalar, .-__cs_init_scalar
	.globl	__CSEQ_message
	.type	__CSEQ_message, @function
__CSEQ_message:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	__CSEQ_message, .-__CSEQ_message
	.globl	__cs_threadargs
	.bss
	.align 32
	.type	__cs_threadargs, @object
	.size	__cs_threadargs, 136
__cs_threadargs:
	.zero	136
	.section	.rodata
.LC0:
	.string	"thread spawned"
	.text
	.globl	__cs_create
	.type	__cs_create, @function
__cs_create:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 40
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	QWORD PTR -32[rbp], rcx
	mov	DWORD PTR -36[rbp], r8d
	cmp	DWORD PTR -36[rbp], 16
	jle	.L13
	mov	eax, 0
	jmp	.L14
.L13:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -36[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, __cs_active_thread[rip]
	mov	DWORD PTR [rdx+rax], 1
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rdx, __cs_threadargs[rip]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	lea	rdi, .LC0[rip]
	call	__CSEQ_message
	mov	eax, 0
.L14:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	__cs_create, .-__cs_create
	.globl	__cs_join
	.type	__cs_join, @function
__cs_join:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, __cs_pc[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, __cs_thread_lines[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cmp	edx, eax
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	__cs_join, .-__cs_join
	.globl	__cs_exit
	.type	__cs_exit, @function
__cs_exit:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	__cs_exit, .-__cs_exit
	.globl	__cs_mutex_init
	.type	__cs_mutex_init, @function
__cs_mutex_init:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -1
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	__cs_mutex_init, .-__cs_mutex_init
	.section	.rodata
.LC1:
	.string	"lock destroyed"
	.text
	.globl	__cs_mutex_destroy
	.type	__cs_mutex_destroy, @function
__cs_mutex_destroy:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -1
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -2
	lea	rdi, .LC1[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	__cs_mutex_destroy, .-__cs_mutex_destroy
	.section	.rodata
.LC2:
	.string	"lock acquired"
	.text
	.globl	__cs_mutex_lock
	.type	__cs_mutex_lock, @function
__cs_mutex_lock:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -1
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	eax, DWORD PTR __cs_thread_index[rip]
	add	eax, 1
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], edx
	lea	rdi, .LC2[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	__cs_mutex_lock, .-__cs_mutex_lock
	.section	.rodata
.LC3:
	.string	"lock released"
	.text
	.globl	__cs_mutex_unlock
	.type	__cs_mutex_unlock, @function
__cs_mutex_unlock:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	edx, eax
	mov	eax, DWORD PTR __cs_thread_index[rip]
	add	eax, 1
	cmp	edx, eax
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -1
	lea	rdi, .LC3[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	__cs_mutex_unlock, .-__cs_mutex_unlock
	.globl	__cs_cond_init
	.type	__cs_cond_init, @function
__cs_cond_init:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], -1
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	__cs_cond_init, .-__cs_cond_init
	.globl	__cs_cond_wait_1
	.type	__cs_cond_wait_1, @function
__cs_cond_wait_1:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, -2
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	__cs_mutex_unlock
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	__cs_cond_wait_1, .-__cs_cond_wait_1
	.globl	__cs_cond_wait_2
	.type	__cs_cond_wait_2, @function
__cs_cond_wait_2:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, 1
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	__cs_mutex_lock
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	__cs_cond_wait_2, .-__cs_cond_wait_2
	.section	.rodata
.LC4:
	.string	"conditional variable signal"
	.text
	.globl	__cs_cond_signal
	.type	__cs_cond_signal, @function
__cs_cond_signal:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 1
	lea	rdi, .LC4[rip]
	call	__CSEQ_message
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	__cs_cond_signal, .-__cs_cond_signal
	.globl	SIGMA
	.section	.rodata
	.align 4
	.type	SIGMA, @object
	.size	SIGMA, 4
SIGMA:
	.long	16
	.globl	array
	.bss
	.align 8
	.type	array, @object
	.size	array, 8
array:
	.zero	8
	.globl	array_index
	.align 4
	.type	array_index, @object
	.size	array_index, 4
array_index:
	.zero	4
	.text
	.globl	thread_0
	.type	thread_0, @function
thread_0:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+4]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L39
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L37:
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L36
.L39:
	nop
.L36:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	thread_0, .-thread_0
	.globl	thread_1
	.type	thread_1, @function
thread_1:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+8]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L45
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L43:
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L42
.L45:
	nop
.L42:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	thread_1, .-thread_1
	.globl	thread_2
	.type	thread_2, @function
thread_2:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+12]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+12]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L51
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L49:
	mov	eax, DWORD PTR __cs_pc_cs[rip+12]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L48
.L51:
	nop
.L48:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	thread_2, .-thread_2
	.globl	thread_3
	.type	thread_3, @function
thread_3:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+16]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+16]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L57
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L55:
	mov	eax, DWORD PTR __cs_pc_cs[rip+16]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L54
.L57:
	nop
.L54:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	thread_3, .-thread_3
	.globl	thread_4
	.type	thread_4, @function
thread_4:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+20]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+20]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L63
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L61:
	mov	eax, DWORD PTR __cs_pc_cs[rip+20]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L60
.L63:
	nop
.L60:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	thread_4, .-thread_4
	.globl	thread_5
	.type	thread_5, @function
thread_5:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+24]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+24]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L69
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L67:
	mov	eax, DWORD PTR __cs_pc_cs[rip+24]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L66
.L69:
	nop
.L66:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	thread_5, .-thread_5
	.globl	thread_6
	.type	thread_6, @function
thread_6:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+28]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+28]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L75
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L73:
	mov	eax, DWORD PTR __cs_pc_cs[rip+28]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L72
.L75:
	nop
.L72:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	thread_6, .-thread_6
	.globl	thread_7
	.type	thread_7, @function
thread_7:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+32]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+32]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L81
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L79:
	mov	eax, DWORD PTR __cs_pc_cs[rip+32]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L78
.L81:
	nop
.L78:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	thread_7, .-thread_7
	.globl	thread_8
	.type	thread_8, @function
thread_8:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+36]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+36]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L87
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L85:
	mov	eax, DWORD PTR __cs_pc_cs[rip+36]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L84
.L87:
	nop
.L84:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	thread_8, .-thread_8
	.globl	thread_9
	.type	thread_9, @function
thread_9:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+40]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+40]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L93
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L91:
	mov	eax, DWORD PTR __cs_pc_cs[rip+40]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L90
.L93:
	nop
.L90:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	thread_9, .-thread_9
	.globl	thread_10
	.type	thread_10, @function
thread_10:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+44]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+44]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L99
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L97:
	mov	eax, DWORD PTR __cs_pc_cs[rip+44]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L96
.L99:
	nop
.L96:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	thread_10, .-thread_10
	.globl	thread_11
	.type	thread_11, @function
thread_11:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+48]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+48]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L105
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L103:
	mov	eax, DWORD PTR __cs_pc_cs[rip+48]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L102
.L105:
	nop
.L102:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	thread_11, .-thread_11
	.globl	thread_12
	.type	thread_12, @function
thread_12:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+52]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+52]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L111
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L109:
	mov	eax, DWORD PTR __cs_pc_cs[rip+52]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L108
.L111:
	nop
.L108:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	thread_12, .-thread_12
	.globl	thread_13
	.type	thread_13, @function
thread_13:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+56]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+56]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L117
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L115:
	mov	eax, DWORD PTR __cs_pc_cs[rip+56]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L114
.L117:
	nop
.L114:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	thread_13, .-thread_13
	.globl	thread_14
	.type	thread_14, @function
thread_14:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+60]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+60]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L123
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L121:
	mov	eax, DWORD PTR __cs_pc_cs[rip+60]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L120
.L123:
	nop
.L120:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	thread_14, .-thread_14
	.globl	thread_15
	.type	thread_15, @function
thread_15:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR __cs_pc[rip+64]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip+64]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L129
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR array_index[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	DWORD PTR [rax], 1
	nop
.L127:
	mov	eax, DWORD PTR __cs_pc_cs[rip+64]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L126
.L129:
	nop
.L126:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	thread_15, .-thread_15
	.globl	main_thread
	.type	main_thread, @function
main_thread:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR __cs_pc[rip]
	test	eax, eax
	setne	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	test	eax, eax
	sete	al
	or	eax, edx
	test	al, al
	jne	.L367
	mov	esi, 4
	lea	rdi, __cs_local_main_tid.2[rip]
	call	__cs_init_scalar
	mov	esi, 4
	lea	rdi, __cs_local_main_sum.1[rip]
	call	__cs_init_scalar
	mov	esi, 8
	lea	rdi, __cs_local_main_t.0[rip]
	call	__cs_init_scalar
	mov	eax, 16
	cdqe
	sal	eax, 2
	mov	edi, eax
	call	__cs_safe_malloc
	mov	QWORD PTR __cs_local_main_t.0[rip], rax
	mov	eax, 16
	cdqe
	sal	eax, 2
	mov	edi, eax
	call	__cs_safe_malloc
	mov	QWORD PTR array[rip], rax
	mov	rax, QWORD PTR __cs_local_main_t.0[rip]
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR array[rip]
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	DWORD PTR __cs_local_main_tid.2[rip], 0
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L368
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 1
	mov	ecx, 0
	lea	rdx, thread_0[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L132
.L367:
	nop
.L132:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 1
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 1
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L369
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L136
.L369:
	nop
.L136:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 2
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 2
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L370
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L371
	jmp	.L138
.L370:
	nop
.L138:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 3
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 3
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L372
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 2
	mov	ecx, 0
	lea	rdx, thread_1[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L140
.L372:
	nop
.L140:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 4
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 4
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L373
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L142
.L373:
	nop
.L142:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 5
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 5
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L374
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L375
	jmp	.L144
.L374:
	nop
.L144:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 6
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 6
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L376
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 3
	mov	ecx, 0
	lea	rdx, thread_2[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L146
.L376:
	nop
.L146:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 7
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 7
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L377
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L148
.L377:
	nop
.L148:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 8
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 8
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L378
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L379
	jmp	.L150
.L378:
	nop
.L150:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 9
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 9
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L380
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 4
	mov	ecx, 0
	lea	rdx, thread_3[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L152
.L380:
	nop
.L152:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 10
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 10
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L381
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L154
.L381:
	nop
.L154:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 11
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 11
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L382
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L383
	jmp	.L156
.L382:
	nop
.L156:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 12
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 12
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L384
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 5
	mov	ecx, 0
	lea	rdx, thread_4[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L158
.L384:
	nop
.L158:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 13
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 13
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L385
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L160
.L385:
	nop
.L160:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 14
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 14
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L386
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L387
	jmp	.L162
.L386:
	nop
.L162:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 15
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 15
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L388
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 6
	mov	ecx, 0
	lea	rdx, thread_5[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L164
.L388:
	nop
.L164:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 16
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 16
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L389
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L166
.L389:
	nop
.L166:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 17
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 17
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L390
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L391
	jmp	.L168
.L390:
	nop
.L168:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 18
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 18
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L392
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 7
	mov	ecx, 0
	lea	rdx, thread_6[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L170
.L392:
	nop
.L170:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 19
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 19
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L393
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L172
.L393:
	nop
.L172:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 20
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 20
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L394
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L395
	jmp	.L174
.L394:
	nop
.L174:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 21
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 21
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L396
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 8
	mov	ecx, 0
	lea	rdx, thread_7[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L176
.L396:
	nop
.L176:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 22
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 22
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L397
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L178
.L397:
	nop
.L178:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 23
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 23
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L398
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L399
	jmp	.L180
.L398:
	nop
.L180:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 24
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 24
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L400
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 9
	mov	ecx, 0
	lea	rdx, thread_8[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L182
.L400:
	nop
.L182:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 25
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 25
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L401
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L184
.L401:
	nop
.L184:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 26
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 26
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L402
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L403
	jmp	.L186
.L402:
	nop
.L186:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 27
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 27
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L404
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 10
	mov	ecx, 0
	lea	rdx, thread_9[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L188
.L404:
	nop
.L188:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 28
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 28
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L405
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L190
.L405:
	nop
.L190:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 29
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 29
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L406
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L407
	jmp	.L192
.L406:
	nop
.L192:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 30
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 30
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L408
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 11
	mov	ecx, 0
	lea	rdx, thread_10[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L194
.L408:
	nop
.L194:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 31
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 31
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L409
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L196
.L409:
	nop
.L196:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 32
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 32
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L410
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L411
	jmp	.L198
.L410:
	nop
.L198:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 33
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 33
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L412
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 12
	mov	ecx, 0
	lea	rdx, thread_11[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L200
.L412:
	nop
.L200:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 34
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 34
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L413
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L202
.L413:
	nop
.L202:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 35
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 35
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L414
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L415
	jmp	.L204
.L414:
	nop
.L204:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 36
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 36
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L416
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 13
	mov	ecx, 0
	lea	rdx, thread_12[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L206
.L416:
	nop
.L206:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 37
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 37
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L417
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L208
.L417:
	nop
.L208:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 38
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 38
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L418
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L419
	jmp	.L210
.L418:
	nop
.L210:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 39
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 39
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L420
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 14
	mov	ecx, 0
	lea	rdx, thread_13[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L212
.L420:
	nop
.L212:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 40
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 40
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L421
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L214
.L421:
	nop
.L214:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 41
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 41
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L422
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L423
	jmp	.L216
.L422:
	nop
.L216:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 42
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 42
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L424
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 15
	mov	ecx, 0
	lea	rdx, thread_14[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L218
.L424:
	nop
.L218:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 43
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 43
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L425
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L220
.L425:
	nop
.L220:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 44
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 44
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L426
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L427
	jmp	.L222
.L426:
	nop
.L222:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 45
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 45
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L428
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	r8d, 16
	mov	ecx, 0
	lea	rdx, thread_15[rip]
	mov	esi, 0
	mov	rdi, rax
	call	__cs_create
	jmp	.L224
.L428:
	nop
.L224:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 46
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 46
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L429
	mov	eax, DWORD PTR array_index[rip]
	add	eax, 1
	mov	DWORD PTR array_index[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L226
.L429:
	nop
.L226:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 47
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 47
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L430
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	setge	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L134
.L368:
	nop
	jmp	.L134
.L371:
	nop
	jmp	.L134
.L375:
	nop
	jmp	.L134
.L379:
	nop
	jmp	.L134
.L383:
	nop
	jmp	.L134
.L387:
	nop
	jmp	.L134
.L391:
	nop
	jmp	.L134
.L395:
	nop
	jmp	.L134
.L399:
	nop
	jmp	.L134
.L403:
	nop
	jmp	.L134
.L407:
	nop
	jmp	.L134
.L411:
	nop
	jmp	.L134
.L415:
	nop
	jmp	.L134
.L419:
	nop
	jmp	.L134
.L423:
	nop
	jmp	.L134
.L427:
	nop
.L134:
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 47
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	DWORD PTR __cs_local_main_tid.2[rip], 0
	jmp	.L228
.L430:
	nop
.L228:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 48
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 48
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L431
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L432
	jmp	.L230
.L431:
	nop
.L230:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 49
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 49
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L433
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L233
.L433:
	nop
.L233:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 50
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 50
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L434
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L435
	jmp	.L235
.L434:
	nop
.L235:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 51
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 51
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L436
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L237
.L436:
	nop
.L237:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 52
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 52
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L437
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L438
	jmp	.L239
.L437:
	nop
.L239:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 53
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 53
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L439
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L241
.L439:
	nop
.L241:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 54
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 54
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L440
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L441
	jmp	.L243
.L440:
	nop
.L243:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 55
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 55
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L442
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L245
.L442:
	nop
.L245:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 56
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 56
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L443
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L444
	jmp	.L247
.L443:
	nop
.L247:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 57
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 57
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L445
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L249
.L445:
	nop
.L249:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 58
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 58
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L446
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L447
	jmp	.L251
.L446:
	nop
.L251:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 59
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 59
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L448
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L253
.L448:
	nop
.L253:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 60
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 60
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L449
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L450
	jmp	.L255
.L449:
	nop
.L255:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 61
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 61
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L451
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L257
.L451:
	nop
.L257:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 62
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 62
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L452
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L453
	jmp	.L259
.L452:
	nop
.L259:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 63
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 63
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L454
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L261
.L454:
	nop
.L261:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 64
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 64
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L455
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L456
	jmp	.L263
.L455:
	nop
.L263:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 65
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 65
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L457
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L265
.L457:
	nop
.L265:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 66
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 66
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L458
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L459
	jmp	.L267
.L458:
	nop
.L267:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 67
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 67
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L460
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L269
.L460:
	nop
.L269:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 68
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 68
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L461
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L462
	jmp	.L271
.L461:
	nop
.L271:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 69
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 69
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L463
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L273
.L463:
	nop
.L273:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 70
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 70
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L464
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L465
	jmp	.L275
.L464:
	nop
.L275:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 71
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 71
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L466
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L277
.L466:
	nop
.L277:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 72
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 72
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L467
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L468
	jmp	.L279
.L467:
	nop
.L279:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 73
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 73
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L469
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L281
.L469:
	nop
.L281:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 74
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 74
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L470
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L471
	jmp	.L283
.L470:
	nop
.L283:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 75
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 75
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L472
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L285
.L472:
	nop
.L285:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 76
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 76
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L473
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L474
	jmp	.L287
.L473:
	nop
.L287:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 77
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 77
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L475
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L289
.L475:
	nop
.L289:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 78
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 78
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L476
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L477
	jmp	.L291
.L476:
	nop
.L291:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 79
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 79
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L478
	mov	rdx, QWORD PTR __cs_local_main_t.0[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, 0
	mov	edi, eax
	call	__cs_join
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L293
.L478:
	nop
.L293:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 80
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 80
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L479
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	setge	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L231
.L432:
	nop
	jmp	.L231
.L435:
	nop
	jmp	.L231
.L438:
	nop
	jmp	.L231
.L441:
	nop
	jmp	.L231
.L444:
	nop
	jmp	.L231
.L447:
	nop
	jmp	.L231
.L450:
	nop
	jmp	.L231
.L453:
	nop
	jmp	.L231
.L456:
	nop
	jmp	.L231
.L459:
	nop
	jmp	.L231
.L462:
	nop
	jmp	.L231
.L465:
	nop
	jmp	.L231
.L468:
	nop
	jmp	.L231
.L471:
	nop
	jmp	.L231
.L474:
	nop
	jmp	.L231
.L477:
	nop
.L231:
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 80
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	DWORD PTR __cs_local_main_sum.1[rip], 0
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L295
.L479:
	nop
.L295:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 81
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 81
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L480
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L481
	jmp	.L297
.L480:
	nop
.L297:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 82
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 82
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L482
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L300
.L482:
	nop
.L300:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 83
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 83
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L483
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L484
	jmp	.L302
.L483:
	nop
.L302:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 84
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 84
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L485
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L304
.L485:
	nop
.L304:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 85
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 85
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L486
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L487
	jmp	.L306
.L486:
	nop
.L306:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 86
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 86
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L488
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L308
.L488:
	nop
.L308:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 87
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 87
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L489
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L490
	jmp	.L310
.L489:
	nop
.L310:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 88
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 88
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L491
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L312
.L491:
	nop
.L312:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 89
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 89
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L492
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L493
	jmp	.L314
.L492:
	nop
.L314:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 90
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 90
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L494
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L316
.L494:
	nop
.L316:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 91
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 91
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L495
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L496
	jmp	.L318
.L495:
	nop
.L318:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 92
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 92
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L497
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L320
.L497:
	nop
.L320:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 93
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 93
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L498
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L499
	jmp	.L322
.L498:
	nop
.L322:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 94
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 94
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L500
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L324
.L500:
	nop
.L324:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 95
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 95
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L501
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L502
	jmp	.L326
.L501:
	nop
.L326:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 96
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 96
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L503
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L328
.L503:
	nop
.L328:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 97
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 97
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L504
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L505
	jmp	.L330
.L504:
	nop
.L330:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 98
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 98
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L506
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L332
.L506:
	nop
.L332:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 99
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 99
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L507
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L508
	jmp	.L334
.L507:
	nop
.L334:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 100
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 100
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L509
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L336
.L509:
	nop
.L336:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 101
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 101
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L510
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L511
	jmp	.L338
.L510:
	nop
.L338:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 102
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 102
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L512
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L340
.L512:
	nop
.L340:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 103
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 103
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L513
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L514
	jmp	.L342
.L513:
	nop
.L342:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 104
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 104
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L515
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L344
.L515:
	nop
.L344:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 105
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 105
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L516
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L517
	jmp	.L346
.L516:
	nop
.L346:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 106
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 106
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L518
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L348
.L518:
	nop
.L348:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 107
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 107
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L519
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L520
	jmp	.L350
.L519:
	nop
.L350:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 108
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 108
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L521
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L352
.L521:
	nop
.L352:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 109
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 109
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L522
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L523
	jmp	.L354
.L522:
	nop
.L354:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 110
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 110
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L524
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L356
.L524:
	nop
.L356:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 111
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 111
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L525
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	jge	.L526
	jmp	.L358
.L525:
	nop
.L358:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 112
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 112
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L527
	mov	rdx, QWORD PTR array[rip]
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	add	eax, edx
	mov	DWORD PTR __cs_local_main_sum.1[rip], eax
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	add	eax, 1
	mov	DWORD PTR __cs_local_main_tid.2[rip], eax
	jmp	.L360
.L527:
	nop
.L360:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 113
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 113
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L528
	mov	eax, DWORD PTR __cs_local_main_tid.2[rip]
	mov	edx, 16
	cmp	eax, edx
	setge	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L298
.L481:
	nop
	jmp	.L298
.L484:
	nop
	jmp	.L298
.L487:
	nop
	jmp	.L298
.L490:
	nop
	jmp	.L298
.L493:
	nop
	jmp	.L298
.L496:
	nop
	jmp	.L298
.L499:
	nop
	jmp	.L298
.L502:
	nop
	jmp	.L298
.L505:
	nop
	jmp	.L298
.L508:
	nop
	jmp	.L298
.L511:
	nop
	jmp	.L298
.L514:
	nop
	jmp	.L298
.L517:
	nop
	jmp	.L298
.L520:
	nop
	jmp	.L298
.L523:
	nop
	jmp	.L298
.L526:
	nop
.L298:
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 113
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L362
.L528:
	nop
.L362:
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	eax, 114
	seta	dl
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 114
	setbe	al
	or	eax, edx
	test	al, al
	jne	.L529
	mov	eax, DWORD PTR __cs_local_main_sum.1[rip]
	mov	edx, 16
	cmp	eax, edx
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	nop
.L365:
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 114
	seta	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	jmp	.L364
.L529:
	nop
.L364:
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	main_thread, .-main_thread
	.globl	main
	.type	main, @function
main:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 80
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -72[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -68[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -64[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -60[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -56[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -52[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -48[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -44[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -40[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -36[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -32[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -28[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -24[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -20[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -16[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -12[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -8[rbp], eax
	call	__VERIFIER_nondet_uint@PLT
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -72[rbp], 0
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -72[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 115
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	call	main_thread
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	mov	DWORD PTR __cs_pc[rip], eax
	mov	eax, DWORD PTR __cs_active_thread[rip+4]
	cmp	eax, 1
	jne	.L531
	mov	DWORD PTR __cs_thread_index[rip], 1
	mov	edx, DWORD PTR __cs_pc[rip+4]
	mov	eax, DWORD PTR -68[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+4], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+8]
	mov	rdi, rax
	call	thread_0
	mov	eax, DWORD PTR __cs_pc_cs[rip+4]
	mov	DWORD PTR __cs_pc[rip+4], eax
.L531:
	mov	eax, DWORD PTR __cs_active_thread[rip+8]
	cmp	eax, 1
	jne	.L532
	mov	DWORD PTR __cs_thread_index[rip], 2
	mov	edx, DWORD PTR __cs_pc[rip+8]
	mov	eax, DWORD PTR -64[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+8], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+16]
	mov	rdi, rax
	call	thread_1
	mov	eax, DWORD PTR __cs_pc_cs[rip+8]
	mov	DWORD PTR __cs_pc[rip+8], eax
.L532:
	mov	eax, DWORD PTR __cs_active_thread[rip+12]
	cmp	eax, 1
	jne	.L533
	mov	DWORD PTR __cs_thread_index[rip], 3
	mov	edx, DWORD PTR __cs_pc[rip+12]
	mov	eax, DWORD PTR -60[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+12], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+12]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+24]
	mov	rdi, rax
	call	thread_2
	mov	eax, DWORD PTR __cs_pc_cs[rip+12]
	mov	DWORD PTR __cs_pc[rip+12], eax
.L533:
	mov	eax, DWORD PTR __cs_active_thread[rip+16]
	cmp	eax, 1
	jne	.L534
	mov	DWORD PTR __cs_thread_index[rip], 4
	mov	edx, DWORD PTR __cs_pc[rip+16]
	mov	eax, DWORD PTR -56[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+16], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+16]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+32]
	mov	rdi, rax
	call	thread_3
	mov	eax, DWORD PTR __cs_pc_cs[rip+16]
	mov	DWORD PTR __cs_pc[rip+16], eax
.L534:
	mov	eax, DWORD PTR __cs_active_thread[rip+20]
	cmp	eax, 1
	jne	.L535
	mov	DWORD PTR __cs_thread_index[rip], 5
	mov	edx, DWORD PTR __cs_pc[rip+20]
	mov	eax, DWORD PTR -52[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+20], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+20]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+40]
	mov	rdi, rax
	call	thread_4
	mov	eax, DWORD PTR __cs_pc_cs[rip+20]
	mov	DWORD PTR __cs_pc[rip+20], eax
.L535:
	mov	eax, DWORD PTR __cs_active_thread[rip+24]
	cmp	eax, 1
	jne	.L536
	mov	DWORD PTR __cs_thread_index[rip], 6
	mov	edx, DWORD PTR __cs_pc[rip+24]
	mov	eax, DWORD PTR -48[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+24], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+24]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+48]
	mov	rdi, rax
	call	thread_5
	mov	eax, DWORD PTR __cs_pc_cs[rip+24]
	mov	DWORD PTR __cs_pc[rip+24], eax
.L536:
	mov	eax, DWORD PTR __cs_active_thread[rip+28]
	cmp	eax, 1
	jne	.L537
	mov	DWORD PTR __cs_thread_index[rip], 7
	mov	edx, DWORD PTR __cs_pc[rip+28]
	mov	eax, DWORD PTR -44[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+28], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+28]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+56]
	mov	rdi, rax
	call	thread_6
	mov	eax, DWORD PTR __cs_pc_cs[rip+28]
	mov	DWORD PTR __cs_pc[rip+28], eax
.L537:
	mov	eax, DWORD PTR __cs_active_thread[rip+32]
	cmp	eax, 1
	jne	.L538
	mov	DWORD PTR __cs_thread_index[rip], 8
	mov	edx, DWORD PTR __cs_pc[rip+32]
	mov	eax, DWORD PTR -40[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+32], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+32]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+64]
	mov	rdi, rax
	call	thread_7
	mov	eax, DWORD PTR __cs_pc_cs[rip+32]
	mov	DWORD PTR __cs_pc[rip+32], eax
.L538:
	mov	eax, DWORD PTR __cs_active_thread[rip+36]
	cmp	eax, 1
	jne	.L539
	mov	DWORD PTR __cs_thread_index[rip], 9
	mov	edx, DWORD PTR __cs_pc[rip+36]
	mov	eax, DWORD PTR -36[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+36], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+36]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+72]
	mov	rdi, rax
	call	thread_8
	mov	eax, DWORD PTR __cs_pc_cs[rip+36]
	mov	DWORD PTR __cs_pc[rip+36], eax
.L539:
	mov	eax, DWORD PTR __cs_active_thread[rip+40]
	cmp	eax, 1
	jne	.L540
	mov	DWORD PTR __cs_thread_index[rip], 10
	mov	edx, DWORD PTR __cs_pc[rip+40]
	mov	eax, DWORD PTR -32[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+40], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+40]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+80]
	mov	rdi, rax
	call	thread_9
	mov	eax, DWORD PTR __cs_pc_cs[rip+40]
	mov	DWORD PTR __cs_pc[rip+40], eax
.L540:
	mov	eax, DWORD PTR __cs_active_thread[rip+44]
	cmp	eax, 1
	jne	.L541
	mov	DWORD PTR __cs_thread_index[rip], 11
	mov	edx, DWORD PTR __cs_pc[rip+44]
	mov	eax, DWORD PTR -28[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+44], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+44]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+88]
	mov	rdi, rax
	call	thread_10
	mov	eax, DWORD PTR __cs_pc_cs[rip+44]
	mov	DWORD PTR __cs_pc[rip+44], eax
.L541:
	mov	eax, DWORD PTR __cs_active_thread[rip+48]
	cmp	eax, 1
	jne	.L542
	mov	DWORD PTR __cs_thread_index[rip], 12
	mov	edx, DWORD PTR __cs_pc[rip+48]
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+48], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+48]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+96]
	mov	rdi, rax
	call	thread_11
	mov	eax, DWORD PTR __cs_pc_cs[rip+48]
	mov	DWORD PTR __cs_pc[rip+48], eax
.L542:
	mov	eax, DWORD PTR __cs_active_thread[rip+52]
	cmp	eax, 1
	jne	.L543
	mov	DWORD PTR __cs_thread_index[rip], 13
	mov	edx, DWORD PTR __cs_pc[rip+52]
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+52], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+52]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+104]
	mov	rdi, rax
	call	thread_12
	mov	eax, DWORD PTR __cs_pc_cs[rip+52]
	mov	DWORD PTR __cs_pc[rip+52], eax
.L543:
	mov	eax, DWORD PTR __cs_active_thread[rip+56]
	cmp	eax, 1
	jne	.L544
	mov	DWORD PTR __cs_thread_index[rip], 14
	mov	edx, DWORD PTR __cs_pc[rip+56]
	mov	eax, DWORD PTR -16[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+56], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+56]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+112]
	mov	rdi, rax
	call	thread_13
	mov	eax, DWORD PTR __cs_pc_cs[rip+56]
	mov	DWORD PTR __cs_pc[rip+56], eax
.L544:
	mov	eax, DWORD PTR __cs_active_thread[rip+60]
	cmp	eax, 1
	jne	.L545
	mov	DWORD PTR __cs_thread_index[rip], 15
	mov	edx, DWORD PTR __cs_pc[rip+60]
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+60], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+60]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+120]
	mov	rdi, rax
	call	thread_14
	mov	eax, DWORD PTR __cs_pc_cs[rip+60]
	mov	DWORD PTR __cs_pc[rip+60], eax
.L545:
	mov	eax, DWORD PTR __cs_active_thread[rip+64]
	cmp	eax, 1
	jne	.L546
	mov	DWORD PTR __cs_thread_index[rip], 16
	mov	edx, DWORD PTR __cs_pc[rip+64]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip+64], eax
	mov	eax, DWORD PTR __cs_pc_cs[rip+64]
	cmp	eax, 1
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	rax, QWORD PTR __cs_threadargs[rip+128]
	mov	rdi, rax
	call	thread_15
	mov	eax, DWORD PTR __cs_pc_cs[rip+64]
	mov	DWORD PTR __cs_pc[rip+64], eax
.L546:
	mov	eax, DWORD PTR __cs_active_thread[rip]
	cmp	eax, 1
	jne	.L547
	mov	DWORD PTR __cs_thread_index[rip], 0
	mov	edx, DWORD PTR __cs_pc[rip]
	mov	eax, DWORD PTR -4[rbp]
	add	eax, edx
	mov	DWORD PTR __cs_pc_cs[rip], eax
	mov	edx, DWORD PTR __cs_pc_cs[rip]
	mov	eax, DWORD PTR __cs_pc[rip]
	cmp	edx, eax
	setnb	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	mov	eax, DWORD PTR __cs_pc_cs[rip]
	cmp	eax, 115
	setbe	al
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assume@PLT
	call	main_thread
.L547:
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	main, .-main
	.local	__cs_local_main_tid.2
	.comm	__cs_local_main_tid.2,4,4
	.local	__cs_local_main_sum.1
	.comm	__cs_local_main_sum.1,4,4
	.local	__cs_local_main_t.0
	.comm	__cs_local_main_t.0,8,8
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"952650.c"
	.text
	.align	2
	.global	__VERIFIER_assert
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_assert, %function
__VERIFIER_assert:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L4
	nop
.L3:
	b	.L3
.L4:
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.global	__cs_active_thread
	.data
	.align	2
	.type	__cs_active_thread, %object
	.size	__cs_active_thread, 68
__cs_active_thread:
	.word	1
	.space	64
	.comm	__cs_pc,68,4
	.comm	__cs_pc_cs,68,4
	.comm	__cs_thread_index,4,4
	.global	__cs_thread_lines
	.align	2
	.type	__cs_thread_lines, %object
	.size	__cs_thread_lines, 68
__cs_thread_lines:
	.word	115
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.word	1
	.text
	.align	2
	.global	__cs_safe_malloc
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_safe_malloc, %function
__cs_safe_malloc:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_safe_malloc, .-__cs_safe_malloc
	.align	2
	.global	__cs_init_scalar
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_init_scalar, %function
__cs_init_scalar:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-20]
	cmp	r3, #4
	bne	.L8
	bl	__VERIFIER_nondet_int
	mov	r2, r0
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	b	.L10
.L8:
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
.L10:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_init_scalar, .-__cs_init_scalar
	.align	2
	.global	__CSEQ_message
	.syntax unified
	.arm
	.fpu softvfp
	.type	__CSEQ_message, %function
__CSEQ_message:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__CSEQ_message, .-__CSEQ_message
	.comm	__cs_threadargs,68,4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"thread spawned\000"
	.text
	.align	2
	.global	__cs_create
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_create, %function
__cs_create:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #4]
	cmp	r3, #16
	ble	.L13
	mov	r3, #0
	b	.L14
.L13:
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #4]
	str	r2, [r3]
	ldr	r2, .L15
	ldr	r3, [fp, #4]
	mov	r1, #1
	str	r1, [r2, r3, lsl #2]
	ldr	r1, .L15+4
	ldr	r3, [fp, #4]
	ldr	r2, [fp, #-20]
	str	r2, [r1, r3, lsl #2]
	ldr	r0, .L15+8
	bl	__CSEQ_message
	mov	r3, #0
.L14:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L16:
	.align	2
.L15:
	.word	__cs_active_thread
	.word	__cs_threadargs
	.word	.LC0
	.size	__cs_create, .-__cs_create
	.align	2
	.global	__cs_join
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_join, %function
__cs_join:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, .L19
	ldr	r3, [fp, #-8]
	ldr	r2, [r2, r3, lsl #2]
	ldr	r1, .L19+4
	ldr	r3, [fp, #-8]
	ldr	r3, [r1, r3, lsl #2]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L20:
	.align	2
.L19:
	.word	__cs_pc
	.word	__cs_thread_lines
	.size	__cs_join, .-__cs_join
	.align	2
	.global	__cs_exit
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_exit, %function
__cs_exit:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__cs_exit, .-__cs_exit
	.align	2
	.global	__cs_mutex_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_init, %function
__cs_mutex_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	mvn	r2, #0
	str	r2, [r3]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__cs_mutex_init, .-__cs_mutex_init
	.section	.rodata
	.align	2
.LC1:
	.ascii	"lock destroyed\000"
	.text
	.align	2
	.global	__cs_mutex_destroy
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_destroy, %function
__cs_mutex_destroy:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	mvn	r2, #1
	str	r2, [r3]
	ldr	r0, .L27
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L28:
	.align	2
.L27:
	.word	.LC1
	.size	__cs_mutex_destroy, .-__cs_mutex_destroy
	.section	.rodata
	.align	2
.LC2:
	.ascii	"lock acquired\000"
	.text
	.align	2
	.global	__cs_mutex_lock
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_lock, %function
__cs_mutex_lock:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L31
	ldr	r3, [r3]
	add	r3, r3, #1
	mov	r2, r3
	ldr	r3, [fp, #-8]
	str	r2, [r3]
	ldr	r0, .L31+4
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L32:
	.align	2
.L31:
	.word	__cs_thread_index
	.word	.LC2
	.size	__cs_mutex_lock, .-__cs_mutex_lock
	.section	.rodata
	.align	2
.LC3:
	.ascii	"lock released\000"
	.text
	.align	2
	.global	__cs_mutex_unlock
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_mutex_unlock, %function
__cs_mutex_unlock:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r3, .L35
	ldr	r3, [r3]
	add	r3, r3, #1
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	mvn	r2, #0
	str	r2, [r3]
	ldr	r0, .L35+4
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L36:
	.align	2
.L35:
	.word	__cs_thread_index
	.word	.LC3
	.size	__cs_mutex_unlock, .-__cs_mutex_unlock
	.align	2
	.global	__cs_cond_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_init, %function
__cs_cond_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	mvn	r2, #0
	str	r2, [r3]
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__cs_cond_init, .-__cs_cond_init
	.align	2
	.global	__cs_cond_wait_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_wait_1, %function
__cs_cond_wait_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmn	r3, #2
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r0, [fp, #-12]
	bl	__cs_mutex_unlock
	nop
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_cond_wait_1, .-__cs_cond_wait_1
	.align	2
	.global	__cs_cond_wait_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_wait_2, %function
__cs_cond_wait_2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r0, [fp, #-12]
	bl	__cs_mutex_lock
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__cs_cond_wait_2, .-__cs_cond_wait_2
	.section	.rodata
	.align	2
.LC4:
	.ascii	"conditional variable signal\000"
	.text
	.align	2
	.global	__cs_cond_signal
	.syntax unified
	.arm
	.fpu softvfp
	.type	__cs_cond_signal, %function
__cs_cond_signal:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #1
	str	r2, [r3]
	ldr	r0, .L44
	bl	__CSEQ_message
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L45:
	.align	2
.L44:
	.word	.LC4
	.size	__cs_cond_signal, .-__cs_cond_signal
	.global	SIGMA
	.section	.rodata
	.align	2
	.type	SIGMA, %object
	.size	SIGMA, 4
SIGMA:
	.word	16
	.comm	array,4,4
	.comm	array_index,4,4
	.text
	.align	2
	.global	thread_0
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_0, %function
thread_0:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L52
	ldr	r3, [r3, #4]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L52+4
	ldr	r3, [r3, #4]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L51
	ldr	r3, .L52+8
	ldr	r2, [r3]
	ldr	r3, .L52+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L49:
	ldr	r3, .L52+4
	ldr	r3, [r3, #4]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L48
.L51:
	nop
.L48:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L53:
	.align	2
.L52:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_0, .-thread_0
	.align	2
	.global	thread_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_1, %function
thread_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L60
	ldr	r3, [r3, #8]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L60+4
	ldr	r3, [r3, #8]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L59
	ldr	r3, .L60+8
	ldr	r2, [r3]
	ldr	r3, .L60+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L57:
	ldr	r3, .L60+4
	ldr	r3, [r3, #8]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L56
.L59:
	nop
.L56:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L61:
	.align	2
.L60:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_1, .-thread_1
	.align	2
	.global	thread_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_2, %function
thread_2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L68
	ldr	r3, [r3, #12]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L68+4
	ldr	r3, [r3, #12]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L67
	ldr	r3, .L68+8
	ldr	r2, [r3]
	ldr	r3, .L68+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L65:
	ldr	r3, .L68+4
	ldr	r3, [r3, #12]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L64
.L67:
	nop
.L64:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L69:
	.align	2
.L68:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_2, .-thread_2
	.align	2
	.global	thread_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_3, %function
thread_3:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L76
	ldr	r3, [r3, #16]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L76+4
	ldr	r3, [r3, #16]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L75
	ldr	r3, .L76+8
	ldr	r2, [r3]
	ldr	r3, .L76+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L73:
	ldr	r3, .L76+4
	ldr	r3, [r3, #16]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L72
.L75:
	nop
.L72:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L77:
	.align	2
.L76:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_3, .-thread_3
	.align	2
	.global	thread_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_4, %function
thread_4:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L84
	ldr	r3, [r3, #20]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L84+4
	ldr	r3, [r3, #20]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L83
	ldr	r3, .L84+8
	ldr	r2, [r3]
	ldr	r3, .L84+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L81:
	ldr	r3, .L84+4
	ldr	r3, [r3, #20]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L80
.L83:
	nop
.L80:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L85:
	.align	2
.L84:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_4, .-thread_4
	.align	2
	.global	thread_5
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_5, %function
thread_5:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L92
	ldr	r3, [r3, #24]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L92+4
	ldr	r3, [r3, #24]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L91
	ldr	r3, .L92+8
	ldr	r2, [r3]
	ldr	r3, .L92+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L89:
	ldr	r3, .L92+4
	ldr	r3, [r3, #24]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L88
.L91:
	nop
.L88:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L93:
	.align	2
.L92:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_5, .-thread_5
	.align	2
	.global	thread_6
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_6, %function
thread_6:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L100
	ldr	r3, [r3, #28]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L100+4
	ldr	r3, [r3, #28]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L99
	ldr	r3, .L100+8
	ldr	r2, [r3]
	ldr	r3, .L100+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L97:
	ldr	r3, .L100+4
	ldr	r3, [r3, #28]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L96
.L99:
	nop
.L96:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L101:
	.align	2
.L100:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_6, .-thread_6
	.align	2
	.global	thread_7
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_7, %function
thread_7:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L108
	ldr	r3, [r3, #32]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L108+4
	ldr	r3, [r3, #32]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L107
	ldr	r3, .L108+8
	ldr	r2, [r3]
	ldr	r3, .L108+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L105:
	ldr	r3, .L108+4
	ldr	r3, [r3, #32]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L104
.L107:
	nop
.L104:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L109:
	.align	2
.L108:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_7, .-thread_7
	.align	2
	.global	thread_8
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_8, %function
thread_8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L116
	ldr	r3, [r3, #36]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L116+4
	ldr	r3, [r3, #36]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L115
	ldr	r3, .L116+8
	ldr	r2, [r3]
	ldr	r3, .L116+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L113:
	ldr	r3, .L116+4
	ldr	r3, [r3, #36]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L112
.L115:
	nop
.L112:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L117:
	.align	2
.L116:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_8, .-thread_8
	.align	2
	.global	thread_9
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_9, %function
thread_9:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L124
	ldr	r3, [r3, #40]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L124+4
	ldr	r3, [r3, #40]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L123
	ldr	r3, .L124+8
	ldr	r2, [r3]
	ldr	r3, .L124+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L121:
	ldr	r3, .L124+4
	ldr	r3, [r3, #40]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L120
.L123:
	nop
.L120:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L125:
	.align	2
.L124:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_9, .-thread_9
	.align	2
	.global	thread_10
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_10, %function
thread_10:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L132
	ldr	r3, [r3, #44]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L132+4
	ldr	r3, [r3, #44]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L131
	ldr	r3, .L132+8
	ldr	r2, [r3]
	ldr	r3, .L132+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L129:
	ldr	r3, .L132+4
	ldr	r3, [r3, #44]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L128
.L131:
	nop
.L128:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L133:
	.align	2
.L132:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_10, .-thread_10
	.align	2
	.global	thread_11
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_11, %function
thread_11:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L140
	ldr	r3, [r3, #48]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L140+4
	ldr	r3, [r3, #48]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L139
	ldr	r3, .L140+8
	ldr	r2, [r3]
	ldr	r3, .L140+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L137:
	ldr	r3, .L140+4
	ldr	r3, [r3, #48]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L136
.L139:
	nop
.L136:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L141:
	.align	2
.L140:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_11, .-thread_11
	.align	2
	.global	thread_12
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_12, %function
thread_12:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L148
	ldr	r3, [r3, #52]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L148+4
	ldr	r3, [r3, #52]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L147
	ldr	r3, .L148+8
	ldr	r2, [r3]
	ldr	r3, .L148+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L145:
	ldr	r3, .L148+4
	ldr	r3, [r3, #52]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L144
.L147:
	nop
.L144:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L149:
	.align	2
.L148:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_12, .-thread_12
	.align	2
	.global	thread_13
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_13, %function
thread_13:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L156
	ldr	r3, [r3, #56]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L156+4
	ldr	r3, [r3, #56]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L155
	ldr	r3, .L156+8
	ldr	r2, [r3]
	ldr	r3, .L156+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L153:
	ldr	r3, .L156+4
	ldr	r3, [r3, #56]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L152
.L155:
	nop
.L152:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L157:
	.align	2
.L156:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_13, .-thread_13
	.align	2
	.global	thread_14
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_14, %function
thread_14:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L164
	ldr	r3, [r3, #60]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L164+4
	ldr	r3, [r3, #60]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L163
	ldr	r3, .L164+8
	ldr	r2, [r3]
	ldr	r3, .L164+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L161:
	ldr	r3, .L164+4
	ldr	r3, [r3, #60]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L160
.L163:
	nop
.L160:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L165:
	.align	2
.L164:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_14, .-thread_14
	.align	2
	.global	thread_15
	.syntax unified
	.arm
	.fpu softvfp
	.type	thread_15, %function
thread_15:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L172
	ldr	r3, [r3, #64]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L172+4
	ldr	r3, [r3, #64]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L171
	ldr	r3, .L172+8
	ldr	r2, [r3]
	ldr	r3, .L172+12
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #1
	str	r2, [r3]
	nop
.L169:
	ldr	r3, .L172+4
	ldr	r3, [r3, #64]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L168
.L171:
	nop
.L168:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L173:
	.align	2
.L172:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	array
	.word	array_index
	.size	thread_15, .-thread_15
	.align	2
	.global	main_thread
	.syntax unified
	.arm
	.fpu softvfp
	.type	main_thread, %function
main_thread:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L411
	mov	r1, #4
	ldr	r0, .L574+88
	bl	__cs_init_scalar
	mov	r1, #4
	ldr	r0, .L574+8
	bl	__cs_init_scalar
	mov	r1, #4
	ldr	r0, .L574+84
	bl	__cs_init_scalar
	mov	r3, #16
	lsl	r3, r3, #2
	mov	r0, r3
	bl	__cs_safe_malloc
	mov	r3, r0
	ldr	r2, .L574+84
	str	r3, [r2]
	mov	r3, #16
	lsl	r3, r3, #2
	mov	r0, r3
	bl	__cs_safe_malloc
	mov	r3, r0
	ldr	r2, .L574+12
	str	r3, [r2]
	ldr	r3, .L574+84
	ldr	r3, [r3]
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L574+12
	ldr	r3, [r3]
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L574+88
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L412
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #1
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+16
	mov	r1, #0
	bl	__cs_create
	b	.L176
.L411:
	nop
.L176:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #1
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L413
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L180
.L413:
	nop
.L180:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #2
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #2
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L414
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L415
	b	.L182
.L414:
	nop
.L182:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #3
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #3
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L416
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #2
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+20
	mov	r1, #0
	bl	__cs_create
	b	.L184
.L416:
	nop
.L184:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #4
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #4
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L417
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L186
.L417:
	nop
.L186:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #5
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #5
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L418
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L419
	b	.L188
.L418:
	nop
.L188:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #6
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #6
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L420
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #3
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+24
	mov	r1, #0
	bl	__cs_create
	b	.L190
.L420:
	nop
.L190:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #7
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #7
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L421
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L192
.L421:
	nop
.L192:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #8
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #8
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L422
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L423
	b	.L194
.L422:
	nop
.L194:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #9
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #9
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L424
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #4
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+28
	mov	r1, #0
	bl	__cs_create
	b	.L196
.L424:
	nop
.L196:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #10
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #10
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L425
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L198
.L425:
	nop
.L198:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #11
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #11
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L426
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L427
	b	.L200
.L426:
	nop
.L200:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #12
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #12
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L428
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #5
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+32
	mov	r1, #0
	bl	__cs_create
	b	.L202
.L428:
	nop
.L202:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #13
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #13
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L429
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L204
.L429:
	nop
.L204:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #14
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #14
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L430
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L431
	b	.L206
.L430:
	nop
.L206:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #15
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #15
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L432
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #6
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+36
	mov	r1, #0
	bl	__cs_create
	b	.L208
.L432:
	nop
.L208:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #16
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #16
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L433
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L210
.L433:
	nop
.L210:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #17
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #17
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L434
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L435
	b	.L212
.L434:
	nop
.L212:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #18
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #18
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L436
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #7
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+40
	mov	r1, #0
	bl	__cs_create
	b	.L214
.L436:
	nop
.L214:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #19
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #19
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L437
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L216
.L437:
	nop
.L216:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #20
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #20
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L438
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L439
	b	.L218
.L438:
	nop
.L218:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #21
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #21
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L440
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #8
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+44
	mov	r1, #0
	bl	__cs_create
	b	.L220
.L440:
	nop
.L220:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #22
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #22
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L441
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L222
.L441:
	nop
.L222:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #23
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #23
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L442
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L443
	b	.L224
.L442:
	nop
.L224:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #24
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #24
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L444
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #9
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+48
	mov	r1, #0
	bl	__cs_create
	b	.L226
.L444:
	nop
.L226:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #25
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #25
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L445
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L228
.L445:
	nop
.L228:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #26
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #26
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L446
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L447
	b	.L230
.L446:
	nop
.L230:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #27
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #27
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L448
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #10
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+52
	mov	r1, #0
	bl	__cs_create
	b	.L232
.L448:
	nop
.L232:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #28
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #28
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L449
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L234
.L449:
	nop
.L234:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #29
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #29
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L450
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L451
	b	.L236
.L450:
	nop
.L236:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #30
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #30
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L452
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #11
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+56
	mov	r1, #0
	bl	__cs_create
	b	.L238
.L452:
	nop
.L238:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #31
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #31
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L453
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L240
.L453:
	nop
.L240:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #32
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #32
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L454
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L455
	b	.L242
.L454:
	nop
.L242:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #33
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #33
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L456
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #12
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+60
	mov	r1, #0
	bl	__cs_create
	b	.L244
.L456:
	nop
.L244:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #34
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #34
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L457
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L246
.L457:
	nop
.L246:
	ldr	r3, .L574
	ldr	r3, [r3]
	cmp	r3, #35
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+4
	ldr	r3, [r3]
	cmp	r3, #35
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L458
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L459
	b	.L248
.L575:
	.align	2
.L574:
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	__cs_local_main_sum.5285
	.word	array
	.word	thread_0
	.word	thread_1
	.word	thread_2
	.word	thread_3
	.word	thread_4
	.word	thread_5
	.word	thread_6
	.word	thread_7
	.word	thread_8
	.word	thread_9
	.word	thread_10
	.word	thread_11
	.word	thread_12
	.word	thread_13
	.word	thread_14
	.word	thread_15
	.word	array_index
	.word	__cs_local_main_t.5286
	.word	__cs_local_main_tid.5284
	.word	__cs_pc
	.word	__cs_pc_cs
.L458:
	nop
.L248:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #36
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #36
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L460
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #13
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+64
	mov	r1, #0
	bl	__cs_create
	b	.L250
.L460:
	nop
.L250:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #37
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #37
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L461
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L252
.L461:
	nop
.L252:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #38
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #38
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L462
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L463
	b	.L254
.L462:
	nop
.L254:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #39
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #39
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L464
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #14
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+68
	mov	r1, #0
	bl	__cs_create
	b	.L256
.L464:
	nop
.L256:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #40
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #40
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L465
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L258
.L465:
	nop
.L258:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #41
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #41
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L466
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L467
	b	.L260
.L466:
	nop
.L260:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #42
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #42
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L468
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #15
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+72
	mov	r1, #0
	bl	__cs_create
	b	.L262
.L468:
	nop
.L262:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #43
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #43
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L469
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L264
.L469:
	nop
.L264:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #44
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #44
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L470
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L471
	b	.L266
.L470:
	nop
.L266:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #45
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #45
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L472
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r0, r2, r3
	mov	r3, #16
	str	r3, [sp]
	mov	r3, #0
	ldr	r2, .L574+76
	mov	r1, #0
	bl	__cs_create
	b	.L268
.L472:
	nop
.L268:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #46
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #46
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L473
	ldr	r3, .L574+80
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+80
	str	r3, [r2]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L270
.L473:
	nop
.L270:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #47
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #47
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L474
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	movge	r3, #1
	movlt	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L178
.L412:
	nop
	b	.L178
.L415:
	nop
	b	.L178
.L419:
	nop
	b	.L178
.L423:
	nop
	b	.L178
.L427:
	nop
	b	.L178
.L431:
	nop
	b	.L178
.L435:
	nop
	b	.L178
.L439:
	nop
	b	.L178
.L443:
	nop
	b	.L178
.L447:
	nop
	b	.L178
.L451:
	nop
	b	.L178
.L455:
	nop
	b	.L178
.L459:
	nop
	b	.L178
.L463:
	nop
	b	.L178
.L467:
	nop
	b	.L178
.L471:
	nop
.L178:
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #47
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L574+88
	mov	r2, #0
	str	r2, [r3]
	b	.L272
.L474:
	nop
.L272:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #48
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #48
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L475
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L476
	b	.L274
.L475:
	nop
.L274:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #49
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #49
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L477
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L277
.L477:
	nop
.L277:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #50
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #50
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L478
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L479
	b	.L279
.L478:
	nop
.L279:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #51
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #51
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L480
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L281
.L480:
	nop
.L281:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #52
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #52
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L481
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L482
	b	.L283
.L481:
	nop
.L283:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #53
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #53
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L483
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L285
.L483:
	nop
.L285:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #54
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #54
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L484
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L485
	b	.L287
.L484:
	nop
.L287:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #55
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #55
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L486
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L289
.L486:
	nop
.L289:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #56
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #56
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L487
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L488
	b	.L291
.L487:
	nop
.L291:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #57
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #57
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L489
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L293
.L489:
	nop
.L293:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #58
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #58
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L490
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L491
	b	.L295
.L490:
	nop
.L295:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #59
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #59
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L492
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L297
.L492:
	nop
.L297:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #60
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #60
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L493
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L494
	b	.L299
.L493:
	nop
.L299:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #61
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #61
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L495
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L301
.L495:
	nop
.L301:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #62
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #62
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L496
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L497
	b	.L303
.L496:
	nop
.L303:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #63
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #63
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L498
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L305
.L498:
	nop
.L305:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #64
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #64
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L499
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L500
	b	.L307
.L499:
	nop
.L307:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #65
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #65
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L501
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L309
.L501:
	nop
.L309:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #66
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #66
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L502
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L503
	b	.L311
.L502:
	nop
.L311:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #67
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #67
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L504
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L313
.L504:
	nop
.L313:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #68
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #68
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L505
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L506
	b	.L315
.L505:
	nop
.L315:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #69
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #69
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L507
	ldr	r3, .L574+84
	ldr	r2, [r3]
	ldr	r3, .L574+88
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L574+88
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L574+88
	str	r3, [r2]
	b	.L317
.L507:
	nop
.L317:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #70
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #70
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L508
	ldr	r3, .L574+88
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L509
	b	.L319
.L508:
	nop
.L319:
	ldr	r3, .L574+92
	ldr	r3, [r3]
	cmp	r3, #71
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L574+96
	ldr	r3, [r3]
	cmp	r3, #71
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L510
	ldr	r3, .L576
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L321
.L510:
	nop
.L321:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #72
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #72
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L511
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L512
	b	.L323
.L511:
	nop
.L323:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #73
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #73
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L513
	ldr	r3, .L576
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L325
.L513:
	nop
.L325:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #74
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #74
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L514
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L515
	b	.L327
.L514:
	nop
.L327:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #75
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #75
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L516
	ldr	r3, .L576
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L329
.L516:
	nop
.L329:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #76
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #76
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L517
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L518
	b	.L331
.L517:
	nop
.L331:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #77
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #77
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L519
	ldr	r3, .L576
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L333
.L519:
	nop
.L333:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #78
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #78
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L520
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L521
	b	.L335
.L520:
	nop
.L335:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #79
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #79
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L522
	ldr	r3, .L576
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, #0
	mov	r0, r3
	bl	__cs_join
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L337
.L522:
	nop
.L337:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #80
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #80
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L523
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	movge	r3, #1
	movlt	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L275
.L476:
	nop
	b	.L275
.L479:
	nop
	b	.L275
.L482:
	nop
	b	.L275
.L485:
	nop
	b	.L275
.L488:
	nop
	b	.L275
.L491:
	nop
	b	.L275
.L494:
	nop
	b	.L275
.L497:
	nop
	b	.L275
.L500:
	nop
	b	.L275
.L503:
	nop
	b	.L275
.L506:
	nop
	b	.L275
.L509:
	nop
	b	.L275
.L512:
	nop
	b	.L275
.L515:
	nop
	b	.L275
.L518:
	nop
	b	.L275
.L521:
	nop
.L275:
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #80
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L576+16
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L339
.L523:
	nop
.L339:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #81
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #81
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L524
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L525
	b	.L341
.L524:
	nop
.L341:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #82
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #82
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L526
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L344
.L526:
	nop
.L344:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #83
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #83
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L527
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L528
	b	.L346
.L527:
	nop
.L346:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #84
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #84
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L529
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L348
.L529:
	nop
.L348:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #85
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #85
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L530
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L531
	b	.L350
.L530:
	nop
.L350:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #86
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #86
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L532
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L352
.L532:
	nop
.L352:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #87
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #87
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L533
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L534
	b	.L354
.L533:
	nop
.L354:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #88
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #88
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L535
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L356
.L535:
	nop
.L356:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #89
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #89
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L536
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L537
	b	.L358
.L536:
	nop
.L358:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #90
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #90
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L538
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L360
.L538:
	nop
.L360:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #91
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #91
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L539
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L540
	b	.L362
.L539:
	nop
.L362:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #92
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #92
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L541
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L364
.L541:
	nop
.L364:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #93
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #93
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L542
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L543
	b	.L366
.L542:
	nop
.L366:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #94
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #94
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L544
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L368
.L544:
	nop
.L368:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #95
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #95
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L545
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L546
	b	.L370
.L545:
	nop
.L370:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #96
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #96
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L547
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L372
.L547:
	nop
.L372:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #97
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #97
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L548
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L549
	b	.L374
.L548:
	nop
.L374:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #98
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #98
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L550
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L376
.L550:
	nop
.L376:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #99
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #99
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L551
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L552
	b	.L378
.L551:
	nop
.L378:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #100
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #100
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L553
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L380
.L553:
	nop
.L380:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #101
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #101
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L554
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L555
	b	.L382
.L554:
	nop
.L382:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #102
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #102
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L556
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L384
.L556:
	nop
.L384:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #103
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #103
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L557
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L558
	b	.L386
.L557:
	nop
.L386:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #104
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #104
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L559
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L388
.L577:
	.align	2
.L576:
	.word	__cs_local_main_t.5286
	.word	array
	.word	__cs_local_main_tid.5284
	.word	__cs_pc
	.word	__cs_local_main_sum.5285
	.word	__cs_pc_cs
.L559:
	nop
.L388:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #105
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #105
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L560
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L561
	b	.L390
.L560:
	nop
.L390:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #106
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #106
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L562
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L392
.L562:
	nop
.L392:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #107
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #107
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L563
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L564
	b	.L394
.L563:
	nop
.L394:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #108
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #108
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L565
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L396
.L565:
	nop
.L396:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #109
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #109
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L566
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L567
	b	.L398
.L566:
	nop
.L398:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #110
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #110
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L568
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L400
.L568:
	nop
.L400:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #111
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #111
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L569
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	bge	.L570
	b	.L402
.L569:
	nop
.L402:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #112
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #112
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L571
	ldr	r3, .L576+4
	ldr	r2, [r3]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L576+16
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L576+16
	str	r3, [r2]
	ldr	r3, .L576+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L576+8
	str	r3, [r2]
	b	.L404
.L571:
	nop
.L404:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #113
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #113
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L572
	ldr	r3, .L576+8
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	movge	r3, #1
	movlt	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L342
.L525:
	nop
	b	.L342
.L528:
	nop
	b	.L342
.L531:
	nop
	b	.L342
.L534:
	nop
	b	.L342
.L537:
	nop
	b	.L342
.L540:
	nop
	b	.L342
.L543:
	nop
	b	.L342
.L546:
	nop
	b	.L342
.L549:
	nop
	b	.L342
.L552:
	nop
	b	.L342
.L555:
	nop
	b	.L342
.L558:
	nop
	b	.L342
.L561:
	nop
	b	.L342
.L564:
	nop
	b	.L342
.L567:
	nop
	b	.L342
.L570:
	nop
.L342:
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #113
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L406
.L572:
	nop
.L406:
	ldr	r3, .L576+12
	ldr	r3, [r3]
	cmp	r3, #114
	movhi	r3, #1
	movls	r3, #0
	and	r2, r3, #255
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #114
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	orr	r3, r2, r3
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L573
	ldr	r3, .L576+16
	ldr	r3, [r3]
	mov	r2, #16
	cmp	r3, r2
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assert
	nop
.L409:
	ldr	r3, .L576+20
	ldr	r3, [r3]
	cmp	r3, #114
	movhi	r3, #1
	movls	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	b	.L408
.L573:
	nop
.L408:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	main_thread, .-main_thread
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 72
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #72
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-76]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-72]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-68]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-64]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-60]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-56]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-52]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-48]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-44]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-40]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-36]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-32]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-28]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-24]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-20]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-16]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-12]
	bl	__VERIFIER_nondet_uint
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-76]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-76]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2]
	ldr	r3, .L597+8
	ldr	r3, [r3]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+8
	ldr	r3, [r3]
	cmp	r3, #115
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
	ldr	r3, .L597+8
	ldr	r3, [r3]
	ldr	r2, .L597+4
	str	r3, [r2]
	ldr	r3, .L597+12
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L579
	ldr	r3, .L597
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-72]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #4]
	ldr	r3, .L597+8
	ldr	r3, [r3, #4]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #4]
	mov	r0, r3
	bl	thread_0
	ldr	r3, .L597+8
	ldr	r3, [r3, #4]
	ldr	r2, .L597+4
	str	r3, [r2, #4]
.L579:
	ldr	r3, .L597+12
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L580
	ldr	r3, .L597
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #8]
	ldr	r3, [fp, #-68]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #8]
	ldr	r3, .L597+8
	ldr	r3, [r3, #8]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #8]
	mov	r0, r3
	bl	thread_1
	ldr	r3, .L597+8
	ldr	r3, [r3, #8]
	ldr	r2, .L597+4
	str	r3, [r2, #8]
.L580:
	ldr	r3, .L597+12
	ldr	r3, [r3, #12]
	cmp	r3, #1
	bne	.L581
	ldr	r3, .L597
	mov	r2, #3
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-64]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #12]
	ldr	r3, .L597+8
	ldr	r3, [r3, #12]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #12]
	mov	r0, r3
	bl	thread_2
	ldr	r3, .L597+8
	ldr	r3, [r3, #12]
	ldr	r2, .L597+4
	str	r3, [r2, #12]
.L581:
	ldr	r3, .L597+12
	ldr	r3, [r3, #16]
	cmp	r3, #1
	bne	.L582
	ldr	r3, .L597
	mov	r2, #4
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #16]
	ldr	r3, [fp, #-60]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #16]
	ldr	r3, .L597+8
	ldr	r3, [r3, #16]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #16]
	mov	r0, r3
	bl	thread_3
	ldr	r3, .L597+8
	ldr	r3, [r3, #16]
	ldr	r2, .L597+4
	str	r3, [r2, #16]
.L582:
	ldr	r3, .L597+12
	ldr	r3, [r3, #20]
	cmp	r3, #1
	bne	.L583
	ldr	r3, .L597
	mov	r2, #5
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #20]
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #20]
	ldr	r3, .L597+8
	ldr	r3, [r3, #20]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #20]
	mov	r0, r3
	bl	thread_4
	ldr	r3, .L597+8
	ldr	r3, [r3, #20]
	ldr	r2, .L597+4
	str	r3, [r2, #20]
.L583:
	ldr	r3, .L597+12
	ldr	r3, [r3, #24]
	cmp	r3, #1
	bne	.L584
	ldr	r3, .L597
	mov	r2, #6
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #24]
	ldr	r3, [fp, #-52]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #24]
	ldr	r3, .L597+8
	ldr	r3, [r3, #24]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #24]
	mov	r0, r3
	bl	thread_5
	ldr	r3, .L597+8
	ldr	r3, [r3, #24]
	ldr	r2, .L597+4
	str	r3, [r2, #24]
.L584:
	ldr	r3, .L597+12
	ldr	r3, [r3, #28]
	cmp	r3, #1
	bne	.L585
	ldr	r3, .L597
	mov	r2, #7
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #28]
	ldr	r3, [fp, #-48]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #28]
	ldr	r3, .L597+8
	ldr	r3, [r3, #28]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #28]
	mov	r0, r3
	bl	thread_6
	ldr	r3, .L597+8
	ldr	r3, [r3, #28]
	ldr	r2, .L597+4
	str	r3, [r2, #28]
.L585:
	ldr	r3, .L597+12
	ldr	r3, [r3, #32]
	cmp	r3, #1
	bne	.L586
	ldr	r3, .L597
	mov	r2, #8
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #32]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #32]
	ldr	r3, .L597+8
	ldr	r3, [r3, #32]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #32]
	mov	r0, r3
	bl	thread_7
	ldr	r3, .L597+8
	ldr	r3, [r3, #32]
	ldr	r2, .L597+4
	str	r3, [r2, #32]
.L586:
	ldr	r3, .L597+12
	ldr	r3, [r3, #36]
	cmp	r3, #1
	bne	.L587
	ldr	r3, .L597
	mov	r2, #9
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #36]
	ldr	r3, [fp, #-40]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #36]
	ldr	r3, .L597+8
	ldr	r3, [r3, #36]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #36]
	mov	r0, r3
	bl	thread_8
	ldr	r3, .L597+8
	ldr	r3, [r3, #36]
	ldr	r2, .L597+4
	str	r3, [r2, #36]
.L587:
	ldr	r3, .L597+12
	ldr	r3, [r3, #40]
	cmp	r3, #1
	bne	.L588
	ldr	r3, .L597
	mov	r2, #10
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #40]
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #40]
	ldr	r3, .L597+8
	ldr	r3, [r3, #40]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #40]
	mov	r0, r3
	bl	thread_9
	ldr	r3, .L597+8
	ldr	r3, [r3, #40]
	ldr	r2, .L597+4
	str	r3, [r2, #40]
.L588:
	ldr	r3, .L597+12
	ldr	r3, [r3, #44]
	cmp	r3, #1
	bne	.L589
	ldr	r3, .L597
	mov	r2, #11
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #44]
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #44]
	ldr	r3, .L597+8
	ldr	r3, [r3, #44]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #44]
	mov	r0, r3
	bl	thread_10
	ldr	r3, .L597+8
	ldr	r3, [r3, #44]
	ldr	r2, .L597+4
	str	r3, [r2, #44]
.L589:
	ldr	r3, .L597+12
	ldr	r3, [r3, #48]
	cmp	r3, #1
	bne	.L590
	ldr	r3, .L597
	mov	r2, #12
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #48]
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #48]
	ldr	r3, .L597+8
	ldr	r3, [r3, #48]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #48]
	mov	r0, r3
	bl	thread_11
	ldr	r3, .L597+8
	ldr	r3, [r3, #48]
	ldr	r2, .L597+4
	str	r3, [r2, #48]
.L590:
	ldr	r3, .L597+12
	ldr	r3, [r3, #52]
	cmp	r3, #1
	bne	.L591
	ldr	r3, .L597
	mov	r2, #13
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #52]
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #52]
	ldr	r3, .L597+8
	ldr	r3, [r3, #52]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #52]
	mov	r0, r3
	bl	thread_12
	ldr	r3, .L597+8
	ldr	r3, [r3, #52]
	ldr	r2, .L597+4
	str	r3, [r2, #52]
.L591:
	ldr	r3, .L597+12
	ldr	r3, [r3, #56]
	cmp	r3, #1
	bne	.L592
	ldr	r3, .L597
	mov	r2, #14
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #56]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #56]
	ldr	r3, .L597+8
	ldr	r3, [r3, #56]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #56]
	mov	r0, r3
	bl	thread_13
	ldr	r3, .L597+8
	ldr	r3, [r3, #56]
	ldr	r2, .L597+4
	str	r3, [r2, #56]
.L592:
	ldr	r3, .L597+12
	ldr	r3, [r3, #60]
	cmp	r3, #1
	bne	.L593
	ldr	r3, .L597
	mov	r2, #15
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #60]
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #60]
	ldr	r3, .L597+8
	ldr	r3, [r3, #60]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #60]
	mov	r0, r3
	bl	thread_14
	ldr	r3, .L597+8
	ldr	r3, [r3, #60]
	ldr	r2, .L597+4
	str	r3, [r2, #60]
.L593:
	ldr	r3, .L597+12
	ldr	r3, [r3, #64]
	cmp	r3, #1
	bne	.L594
	ldr	r3, .L597
	mov	r2, #16
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3, #64]
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2, #64]
	ldr	r3, .L597+8
	ldr	r3, [r3, #64]
	cmp	r3, #1
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+16
	ldr	r3, [r3, #64]
	mov	r0, r3
	bl	thread_15
	ldr	r3, .L597+8
	ldr	r3, [r3, #64]
	ldr	r2, .L597+4
	str	r3, [r2, #64]
.L594:
	ldr	r3, .L597+12
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L595
	ldr	r3, .L597
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L597+4
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldr	r2, .L597+8
	str	r3, [r2]
	ldr	r3, .L597+8
	ldr	r2, [r3]
	ldr	r3, .L597+4
	ldr	r3, [r3]
	cmp	r2, r3
	movcs	r3, #1
	movcc	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L597+8
	ldr	r3, [r3]
	cmp	r3, #115
	movls	r3, #1
	movhi	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	main_thread
.L595:
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L598:
	.align	2
.L597:
	.word	__cs_thread_index
	.word	__cs_pc
	.word	__cs_pc_cs
	.word	__cs_active_thread
	.word	__cs_threadargs
	.size	main, .-main
	.local	__cs_local_main_tid.5284
	.comm	__cs_local_main_tid.5284,4,4
	.local	__cs_local_main_sum.5285
	.comm	__cs_local_main_sum.5285,4,4
	.local	__cs_local_main_t.5286
	.comm	__cs_local_main_t.5286,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
