	.file	"398482.c"
	.intel_syntax noprefix
	.text
	.globl	buffer
	.bss
	.align 32
	.type	buffer, @object
	.size	buffer, 256
buffer:
	.zero	256
	.globl	va
	.align 16
	.type	va, @object
	.size	va, 24
va:
	.zero	24
	.section	.rodata
	.align 4
.LC0:
	.string	""
	.string	""
	.string	""
	.string	""
.LC1:
	.string	"%ls"
	.align 4
.LC2:
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
.LC3:
	.string	"%1ls"
.LC4:
	.string	"%*ls"
	.align 4
.LC5:
	.string	"1"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
.LC6:
	.string	"%.0ls"
.LC7:
	.string	"%.1ls"
.LC8:
	.string	"%.2ls"
.LC9:
	.string	"%.3ls"
.LC10:
	.string	"%.7ls"
	.align 4
.LC11:
	.string	"1"
	.string	""
	.string	""
	.string	"2"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
.LC12:
	.string	"%.*ls"
	.align 4
.LC13:
	.string	"1"
	.string	""
	.string	""
	.string	"2"
	.string	""
	.string	""
	.string	"3"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
.LC14:
	.string	"%.4ls"
.LC15:
	.string	"%.5ls"
.LC16:
	.string	"%.6ls"
	.text
	.globl	test_s_const
	.type	test_s_const, @function
test_s_const:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rax, buffer[rip+256]
	lea	rdx, .LC0[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rdx, .LC0[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rdx, .LC2[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rdx, .LC0[rip]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+256]
	lea	rcx, .LC0[rip]
	mov	edx, 0
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rcx, .LC0[rip]
	mov	edx, 0
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rcx, .LC2[rip]
	mov	edx, 0
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rcx, .LC0[rip]
	mov	edx, 1
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+255]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC6[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC6[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC9[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC11[rip]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rcx, .LC5[rip]
	mov	edx, 2
	lea	rsi, .LC12[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC6[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+254]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+253]
	lea	rdx, .LC5[rip]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+253]
	lea	rdx, .LC11[rip]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+253]
	lea	rdx, .LC11[rip]
	lea	rsi, .LC9[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+252]
	lea	rdx, .LC13[rip]
	lea	rsi, .LC9[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+252]
	lea	rdx, .LC13[rip]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+252]
	lea	rdx, .LC13[rip]
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	lea	rax, buffer[rip+252]
	lea	rdx, .LC13[rip]
	lea	rsi, .LC16[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	test_s_const, .-test_s_const
	.section	.rodata
.LC17:
	.string	"%s"
.LC18:
	.string	"%1s"
.LC19:
	.string	"%.0s"
.LC20:
	.string	"%.1s"
.LC21:
	.string	"%*s"
.LC22:
	.string	"%.*s"
.LC23:
	.string	"%-s"
	.text
	.globl	test_s_nonconst
	.type	test_s_nonconst, @function
test_s_nonconst:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	QWORD PTR -16[rbp], rdx
	mov	QWORD PTR -24[rbp], rcx
	mov	QWORD PTR -32[rbp], r8
	lea	rcx, buffer[rip+256]
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, rax
	lea	rsi, .LC17[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, rax
	lea	rsi, .LC17[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, rax
	lea	rsi, .LC18[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, rax
	lea	rsi, .LC19[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, rax
	lea	rsi, .LC20[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	mov	edx, 0
	lea	rsi, .LC21[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	mov	edx, 1
	lea	rsi, .LC21[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	mov	edx, 2
	lea	rsi, .LC21[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	mov	edx, 3
	lea	rsi, .LC21[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	mov	edx, 1
	lea	rsi, .LC22[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	mov	edx, 2
	lea	rsi, .LC22[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, rax
	mov	edx, 3
	lea	rsi, .LC22[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	lea	rsi, .LC6[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	lea	rsi, .LC7[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, rax
	lea	rsi, .LC1[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR -32[rbp]
	lea	rcx, buffer[rip+255]
	mov	rdx, rax
	lea	rsi, .LC23[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR -32[rbp]
	lea	rdx, 1[rax]
	lea	rax, buffer[rip+255]
	lea	rsi, .LC23[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR -32[rbp]
	lea	rdx, 3[rax]
	lea	rax, buffer[rip+255]
	lea	rsi, .LC23[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR -32[rbp]
	lea	rdx, 10[rax]
	lea	rax, buffer[rip+255]
	lea	rsi, .LC23[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR -32[rbp]
	lea	rdx, 10[rax]
	lea	rax, buffer[rip+255]
	lea	rsi, .LC23[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR -32[rbp]
	lea	rdx, 10[rax]
	lea	rax, buffer[rip+254]
	lea	rsi, .LC23[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR -32[rbp]
	lea	rdx, 10[rax]
	lea	rax, buffer[rip+254]
	lea	rsi, .LC23[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	test_s_nonconst, .-test_s_nonconst
	.section	.rodata
.LC24:
	.string	"%hhi"
.LC25:
	.string	"%.*hhi"
.LC26:
	.string	"%#.*hhi"
.LC27:
	.string	"%+.*hhi"
.LC28:
	.string	"%-.*hhi"
.LC29:
	.string	"% .*hhi"
.LC30:
	.string	"%#.*hhu"
.LC31:
	.string	"%+.*hhu"
.LC32:
	.string	"%-.*hhu"
.LC33:
	.string	"% .*hhu"
	.text
	.globl	test_hh_nonconst
	.type	test_hh_nonconst, @function
test_hh_nonconst:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	DWORD PTR -12[rbp], edx
	mov	DWORD PTR -16[rbp], ecx
	lea	rcx, buffer[rip+255]
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+252]
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -16[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -16[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rcx, buffer[rip+252]
	mov	eax, DWORD PTR -16[rbp]
	mov	edx, eax
	lea	rsi, .LC24[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, -1
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+254]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, -1
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+253]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, -1
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+252]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, -1
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+254]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+253]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+252]
	mov	eax, DWORD PTR -12[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+254]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+253]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+252]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC25[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC26[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC27[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC28[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC29[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 1
	lea	rsi, .LC26[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 1
	lea	rsi, .LC27[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 1
	lea	rsi, .LC28[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 1
	lea	rsi, .LC29[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	ecx, edx
	mov	edx, eax
	lea	rsi, .LC26[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	ecx, edx
	mov	edx, eax
	lea	rsi, .LC27[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	ecx, edx
	mov	edx, eax
	lea	rsi, .LC28[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	edx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	ecx, edx
	mov	edx, eax
	lea	rsi, .LC29[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC30[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC31[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC32[rip]
	mov	eax, 0
	call	sprintf@PLT
	lea	rdi, buffer[rip+255]
	mov	eax, DWORD PTR -16[rbp]
	mov	ecx, eax
	mov	edx, 0
	lea	rsi, .LC33[rip]
	mov	eax, 0
	call	sprintf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	test_hh_nonconst, .-test_hh_nonconst
	.section	.rodata
.LC34:
	.string	"%hi"
	.text
	.globl	test_h_nonconst
	.type	test_h_nonconst, @function
test_h_nonconst:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+252]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+252]
	mov	edx, eax
	lea	rsi, .LC34[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	test_h_nonconst, .-test_h_nonconst
	.section	.rodata
.LC35:
	.string	"%i"
	.text
	.globl	test_i_nonconst
	.type	test_i_nonconst, @function
test_i_nonconst:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR uc[rip]
	movzx	eax, al
	lea	rcx, buffer[rip+252]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	movzx	eax, al
	lea	rcx, buffer[rip+252]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip]
	and	eax, 1
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, abf[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	and	eax, 1
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, BYTE PTR [rax]
	and	eax, 1
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip]
	and	eax, 1
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, abf[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	and	eax, 1
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, BYTE PTR [rax]
	and	eax, 1
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip]
	shr	al
	and	eax, 3
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, abf[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	shr	al
	and	eax, 3
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, BYTE PTR [rax]
	shr	al
	and	eax, 3
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip]
	shr	al, 3
	and	eax, 7
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, abf[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	shr	al, 3
	and	eax, 7
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, BYTE PTR [rax]
	shr	al, 3
	and	eax, 7
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, WORD PTR bf[rip]
	shr	ax, 6
	and	eax, 15
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, abf[rip]
	movzx	eax, WORD PTR [rdx+rax]
	shr	ax, 6
	and	eax, 15
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, WORD PTR [rax]
	shr	ax, 6
	and	eax, 15
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, WORD PTR bf[rip]
	shr	ax, 6
	and	eax, 15
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, WORD PTR [rax]
	shr	ax, 6
	and	eax, 15
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	eax, DWORD PTR bf[rip]
	shr	eax, 14
	and	eax, 31
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	mov	eax, DWORD PTR [rax]
	shr	eax, 14
	and	eax, 31
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, WORD PTR bf[rip+2]
	shr	ax, 3
	and	eax, 63
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, WORD PTR 2[rax]
	shr	ax, 3
	and	eax, 63
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+3]
	shr	al
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR pbf[rip]
	movzx	eax, BYTE PTR 3[rax]
	shr	al
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+4]
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+4]
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+4]
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+4]
	movzx	eax, al
	lea	rcx, buffer[rip+252]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+4]
	movzx	eax, al
	lea	rcx, buffer[rip+255]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+4]
	movzx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+4]
	movzx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+1]
	sal	eax, 2
	sar	al, 4
	movsx	eax, al
	lea	rcx, buffer[rip+254]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+1]
	sal	eax, 2
	sar	al, 4
	movsx	eax, al
	lea	rcx, buffer[rip+253]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	movzx	eax, BYTE PTR bf[rip+1]
	sal	eax, 2
	sar	al, 4
	movsx	eax, al
	lea	rcx, buffer[rip+252]
	mov	edx, eax
	lea	rsi, .LC35[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	test_i_nonconst, .-test_i_nonconst
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"398482.c"
	.text
	.comm	buffer,256,4
	.comm	va,4,4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"\000\000\000\000"
	.align	2
.LC1:
	.ascii	"%ls\000"
	.align	2
.LC2:
	.ascii	"\000\000\000\000\000\000\000\000"
	.align	2
.LC3:
	.ascii	"%1ls\000"
	.align	2
.LC4:
	.ascii	"%*ls\000"
	.align	2
.LC5:
	.ascii	"1\000\000\000\000\000\000\000"
	.align	2
.LC6:
	.ascii	"%.0ls\000"
	.align	2
.LC7:
	.ascii	"%.1ls\000"
	.align	2
.LC8:
	.ascii	"%.2ls\000"
	.align	2
.LC9:
	.ascii	"%.3ls\000"
	.align	2
.LC10:
	.ascii	"%.7ls\000"
	.align	2
.LC11:
	.ascii	"1\000\000\0002\000\000\000\000\000\000\000"
	.align	2
.LC12:
	.ascii	"%.*ls\000"
	.align	2
.LC13:
	.ascii	"1\000\000\0002\000\000\0003\000\000\000\000\000\000"
	.ascii	"\000"
	.align	2
.LC14:
	.ascii	"%.4ls\000"
	.align	2
.LC15:
	.ascii	"%.5ls\000"
	.align	2
.LC16:
	.ascii	"%.6ls\000"
	.text
	.align	2
	.global	test_s_const
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_s_const, %function
test_s_const:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L2
	ldr	r2, .L2+4
	ldr	r1, .L2+8
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+12
	ldr	r2, .L2+4
	ldr	r1, .L2+8
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+12
	ldr	r2, .L2+16
	ldr	r1, .L2+8
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+12
	ldr	r2, .L2+4
	ldr	r1, .L2+20
	mov	r0, r3
	bl	sprintf
	ldr	r0, .L2
	ldr	r3, .L2+4
	mov	r2, #0
	ldr	r1, .L2+24
	bl	sprintf
	ldr	r0, .L2+12
	ldr	r3, .L2+4
	mov	r2, #0
	ldr	r1, .L2+24
	bl	sprintf
	ldr	r0, .L2+12
	ldr	r3, .L2+16
	mov	r2, #0
	ldr	r1, .L2+24
	bl	sprintf
	ldr	r0, .L2+12
	ldr	r3, .L2+4
	mov	r2, #1
	ldr	r1, .L2+24
	bl	sprintf
	ldr	r3, .L2+12
	ldr	r2, .L2+28
	ldr	r1, .L2+8
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+12
	ldr	r2, .L2+28
	ldr	r1, .L2+32
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+32
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+40
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+44
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+48
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+52
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+56
	ldr	r1, .L2+44
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+44
	mov	r0, r3
	bl	sprintf
	ldr	r0, .L2+36
	ldr	r3, .L2+28
	mov	r2, #2
	ldr	r1, .L2+60
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+32
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+36
	ldr	r2, .L2+28
	ldr	r1, .L2+40
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+64
	ldr	r2, .L2+28
	ldr	r1, .L2+44
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+64
	ldr	r2, .L2+56
	ldr	r1, .L2+44
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+64
	ldr	r2, .L2+56
	ldr	r1, .L2+48
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+68
	ldr	r2, .L2+72
	ldr	r1, .L2+48
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+68
	ldr	r2, .L2+72
	ldr	r1, .L2+76
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+68
	ldr	r2, .L2+72
	ldr	r1, .L2+80
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L2+68
	ldr	r2, .L2+72
	ldr	r1, .L2+84
	mov	r0, r3
	bl	sprintf
	nop
	pop	{fp, pc}
.L3:
	.align	2
.L2:
	.word	buffer+256
	.word	.LC0
	.word	.LC1
	.word	buffer+255
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	buffer+254
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.word	.LC12
	.word	buffer+253
	.word	buffer+252
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	.LC16
	.size	test_s_const, .-test_s_const
	.section	.rodata
	.align	2
.LC17:
	.ascii	"%s\000"
	.align	2
.LC18:
	.ascii	"%1s\000"
	.align	2
.LC19:
	.ascii	"%.0s\000"
	.align	2
.LC20:
	.ascii	"%.1s\000"
	.align	2
.LC21:
	.ascii	"%*s\000"
	.align	2
.LC22:
	.ascii	"%.*s\000"
	.align	2
.LC23:
	.ascii	"%-s\000"
	.text
	.align	2
	.global	test_s_nonconst
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_s_nonconst, %function
test_s_nonconst:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r3, .L5
	ldr	r2, [fp, #-16]
	ldr	r1, .L5+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L5+8
	ldr	r2, [fp, #-16]
	ldr	r1, .L5+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L5+8
	ldr	r2, [fp, #-16]
	ldr	r1, .L5+12
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L5+8
	ldr	r2, [fp, #-16]
	ldr	r1, .L5+16
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L5+8
	ldr	r2, [fp, #-16]
	ldr	r1, .L5+20
	mov	r0, r3
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #-16]
	mov	r2, #0
	ldr	r1, .L5+24
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #-16]
	mov	r2, #1
	ldr	r1, .L5+24
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #-16]
	mov	r2, #2
	ldr	r1, .L5+24
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #-16]
	mov	r2, #3
	ldr	r1, .L5+24
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #-16]
	mov	r2, #1
	ldr	r1, .L5+28
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #-16]
	mov	r2, #2
	ldr	r1, .L5+28
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #-16]
	mov	r2, #3
	ldr	r1, .L5+28
	bl	sprintf
	ldr	r3, .L5+8
	ldr	r2, [fp, #-20]
	ldr	r1, .L5+32
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L5+8
	ldr	r2, [fp, #-20]
	ldr	r1, .L5+36
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L5+8
	ldr	r2, [fp, #-20]
	ldr	r1, .L5+40
	mov	r0, r3
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #4]
	mov	r2, r3
	ldr	r1, .L5+44
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #4]
	add	r3, r3, #1
	mov	r2, r3
	ldr	r1, .L5+44
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #4]
	add	r3, r3, #3
	mov	r2, r3
	ldr	r1, .L5+44
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #4]
	add	r3, r3, #10
	mov	r2, r3
	ldr	r1, .L5+44
	bl	sprintf
	ldr	r0, .L5+8
	ldr	r3, [fp, #4]
	add	r3, r3, #10
	mov	r2, r3
	ldr	r1, .L5+44
	bl	sprintf
	ldr	r0, .L5+48
	ldr	r3, [fp, #4]
	add	r3, r3, #10
	mov	r2, r3
	ldr	r1, .L5+44
	bl	sprintf
	ldr	r0, .L5+48
	ldr	r3, [fp, #4]
	add	r3, r3, #10
	mov	r2, r3
	ldr	r1, .L5+44
	bl	sprintf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L6:
	.align	2
.L5:
	.word	buffer+256
	.word	.LC17
	.word	buffer+255
	.word	.LC18
	.word	.LC19
	.word	.LC20
	.word	.LC21
	.word	.LC22
	.word	.LC6
	.word	.LC7
	.word	.LC1
	.word	.LC23
	.word	buffer+254
	.size	test_s_nonconst, .-test_s_nonconst
	.section	.rodata
	.align	2
.LC24:
	.ascii	"%hhi\000"
	.align	2
.LC25:
	.ascii	"%.*hhi\000"
	.align	2
.LC26:
	.ascii	"%#.*hhi\000"
	.align	2
.LC27:
	.ascii	"%+.*hhi\000"
	.align	2
.LC28:
	.ascii	"%-.*hhi\000"
	.align	2
.LC29:
	.ascii	"% .*hhi\000"
	.align	2
.LC30:
	.ascii	"%#.*hhu\000"
	.align	2
.LC31:
	.ascii	"%+.*hhu\000"
	.align	2
.LC32:
	.ascii	"%-.*hhu\000"
	.align	2
.LC33:
	.ascii	"% .*hhu\000"
	.text
	.align	2
	.global	test_hh_nonconst
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_hh_nonconst, %function
test_hh_nonconst:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r3, .L8
	ldr	r2, [fp, #-16]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L8+8
	ldr	r2, [fp, #-16]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L8+12
	ldr	r2, [fp, #-16]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L8+16
	ldr	r2, [fp, #-16]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L8
	ldr	r2, [fp, #-20]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L8+8
	ldr	r2, [fp, #-20]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L8+12
	ldr	r2, [fp, #-20]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L8+16
	ldr	r2, [fp, #-20]
	ldr	r1, .L8+4
	mov	r0, r3
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-16]
	mvn	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+8
	ldr	r3, [fp, #-16]
	mvn	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+12
	ldr	r3, [fp, #-16]
	mvn	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+16
	ldr	r3, [fp, #-16]
	mvn	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-16]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+8
	ldr	r3, [fp, #-16]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+12
	ldr	r3, [fp, #-16]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+16
	ldr	r3, [fp, #-16]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+12
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8+16
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+20
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+24
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+28
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+32
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+36
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #1
	ldr	r1, .L8+24
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #1
	ldr	r1, .L8+28
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #1
	ldr	r1, .L8+32
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #1
	ldr	r1, .L8+36
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-12]
	ldr	r1, .L8+24
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-12]
	ldr	r1, .L8+28
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-12]
	ldr	r1, .L8+32
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-12]
	ldr	r1, .L8+36
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+40
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+44
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+48
	bl	sprintf
	ldr	r0, .L8
	ldr	r3, [fp, #-20]
	mov	r2, #0
	ldr	r1, .L8+52
	bl	sprintf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L9:
	.align	2
.L8:
	.word	buffer+255
	.word	.LC24
	.word	buffer+254
	.word	buffer+253
	.word	buffer+252
	.word	.LC25
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.size	test_hh_nonconst, .-test_hh_nonconst
	.section	.rodata
	.align	2
.LC34:
	.ascii	"%hi\000"
	.text
	.align	2
	.global	test_h_nonconst
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_h_nonconst, %function
test_h_nonconst:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, .L11
	ldr	r3, .L11+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	ldr	r0, .L11+12
	ldr	r3, .L11+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	ldr	r0, .L11+16
	ldr	r3, .L11+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	ldr	r0, .L11+20
	ldr	r3, .L11+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	ldr	r0, .L11
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	ldr	r0, .L11+12
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	ldr	r0, .L11+16
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	ldr	r0, .L11+20
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L11+8
	bl	sprintf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L12:
	.align	2
.L11:
	.word	buffer+255
	.word	uc
	.word	.LC34
	.word	buffer+254
	.word	buffer+253
	.word	buffer+252
	.size	test_h_nonconst, .-test_h_nonconst
	.section	.rodata
	.align	2
.LC35:
	.ascii	"%i\000"
	.text
	.align	2
	.global	test_i_nonconst
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_i_nonconst, %function
test_i_nonconst:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, .L14
	ldr	r3, .L14+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+20
	ldr	r3, .L14+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+20
	ldr	r3, [fp, #-8]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14
	ldr	r3, .L14+24
	ldrb	r3, [r3]
	and	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14
	ldr	r2, .L14+28
	ldr	r3, [fp, #-8]
	ldrb	r3, [r2, r3, lsl #3]
	and	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrb	r3, [r3]
	and	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+24
	ldrb	r3, [r3]
	and	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r2, .L14+28
	ldr	r3, [fp, #-8]
	ldrb	r3, [r2, r3, lsl #3]
	and	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrb	r3, [r3]
	and	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #3
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r2, .L14+28
	ldr	r3, [fp, #-8]
	ldrb	r3, [r2, r3, lsl #3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #3
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #3
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #3
	and	r3, r3, #7
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r2, .L14+28
	ldr	r3, [fp, #-8]
	ldrb	r3, [r2, r3, lsl #3]	@ zero_extendqisi2
	lsr	r3, r3, #3
	and	r3, r3, #7
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsr	r3, r3, #3
	and	r3, r3, #7
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+24
	ldrh	r3, [r3]
	lsr	r3, r3, #6
	and	r3, r3, #15
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r2, .L14+28
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldrh	r3, [r3]
	lsr	r3, r3, #6
	and	r3, r3, #15
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrh	r3, [r3]
	lsr	r3, r3, #6
	and	r3, r3, #15
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+24
	ldrh	r3, [r3]
	lsr	r3, r3, #6
	and	r3, r3, #15
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrh	r3, [r3]
	lsr	r3, r3, #6
	and	r3, r3, #15
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+24
	ldr	r3, [r3]
	lsr	r3, r3, #14
	and	r3, r3, #31
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldr	r3, [r3]
	lsr	r3, r3, #14
	and	r3, r3, #31
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+24
	ldrh	r3, [r3, #2]
	lsr	r3, r3, #3
	and	r3, r3, #63
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrh	r3, [r3, #2]
	lsr	r3, r3, #3
	and	r3, r3, #63
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+24
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+32
	ldr	r3, [r3]
	ldrb	r3, [r3, #3]	@ zero_extendqisi2
	lsr	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14
	ldr	r3, .L14+24
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+24
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+24
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+20
	ldr	r3, .L14+24
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14
	ldr	r3, .L14+24
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+24
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+24
	ldrb	r3, [r3, #4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+12
	ldr	r3, .L14+24
	ldrb	r3, [r3, #1]
	lsl	r3, r3, #2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	asr	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+16
	ldr	r3, .L14+24
	ldrb	r3, [r3, #1]
	lsl	r3, r3, #2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	asr	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	ldr	r0, .L14+20
	ldr	r3, .L14+24
	ldrb	r3, [r3, #1]
	lsl	r3, r3, #2
	lsl	r3, r3, #24
	asr	r3, r3, #24
	asr	r3, r3, #4
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r2, r3
	ldr	r1, .L14+8
	bl	sprintf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L15:
	.align	2
.L14:
	.word	buffer+255
	.word	uc
	.word	.LC35
	.word	buffer+254
	.word	buffer+253
	.word	buffer+252
	.word	bf
	.word	abf
	.word	pbf
	.size	test_i_nonconst, .-test_i_nonconst
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
