	.file	"172373.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_nondet_int
	.type	__VERIFIER_nondet_int, @function
__VERIFIER_nondet_int:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_nondet_int, .-__VERIFIER_nondet_int
	.globl	__bss_start
	.bss
	.align 32
	.type	__bss_start, @object
	.size	__bss_start, 32
__bss_start:
	.zero	32
	.text
	.type	llvm_select_u64, @function
llvm_select_u64:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	cmp	DWORD PTR -20[rbp], 0
	je	.L4
	mov	eax, DWORD PTR -24[rbp]
	jmp	.L5
.L4:
	mov	eax, DWORD PTR -28[rbp]
.L5:
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	llvm_select_u64, .-llvm_select_u64
	.type	llvm_add_u32, @function
llvm_add_u32:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	llvm_add_u32, .-llvm_add_u32
	.type	llvm_add_u64, @function
llvm_add_u64:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	llvm_add_u64, .-llvm_add_u64
	.type	llvm_sub_u32, @function
llvm_sub_u32:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	llvm_sub_u32, .-llvm_sub_u32
	.type	llvm_lshr_u32, @function
llvm_lshr_u32:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	llvm_lshr_u32, .-llvm_lshr_u32
	.type	llvm_lshr_u64, @function
llvm_lshr_u64:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	llvm_lshr_u64, .-llvm_lshr_u64
	.type	llvm_and_u8, @function
llvm_and_u8:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	llvm_and_u8, .-llvm_and_u8
	.type	llvm_xor_u8, @function
llvm_xor_u8:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	xor	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	llvm_xor_u8, .-llvm_xor_u8
	.type	llvm_OC_ctpop_OC_i32, @function
llvm_OC_ctpop_OC_i32:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	lea	rax, -20[rbp]
	mov	rsi, rax
	mov	edi, 32
	mov	eax, 0
	call	LLVMCountPopulation@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	llvm_OC_ctpop_OC_i32, .-llvm_OC_ctpop_OC_i32
	.globl	main
	.type	main, @function
main:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 336
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1204
	mov	QWORD PTR -160[rbp], rax
	mov	rax, QWORD PTR -160[rbp]
	mov	QWORD PTR -152[rbp], rax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1228
	mov	QWORD PTR -144[rbp], rax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1252
	mov	QWORD PTR -136[rbp], rax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1260
	mov	QWORD PTR -128[rbp], rax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1332
	mov	QWORD PTR -120[rbp], rax
	mov	rax, QWORD PTR -160[rbp]
	mov	QWORD PTR -112[rbp], rax
	mov	rax, QWORD PTR -128[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -340[rbp], eax
	mov	rax, QWORD PTR -136[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -336[rbp], eax
	mov	eax, DWORD PTR -336[rbp]
	mov	esi, -8
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -332[rbp], eax
	mov	eax, DWORD PTR -332[rbp]
	cdqe
	mov	rdx, rax
	mov	eax, DWORD PTR -340[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -128[rbp]
	mov	edx, DWORD PTR -332[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -336[rbp]
	mov	esi, -24
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -328[rbp], eax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1040
	mov	QWORD PTR -104[rbp], rax
	cmp	DWORD PTR -332[rbp], 15
	setle	al
	movzx	edx, al
	mov	rax, QWORD PTR -104[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -328[rbp]
	movzx	eax, al
	mov	edi, eax
	call	llvm_OC_ctpop_OC_i32
	mov	DWORD PTR -324[rbp], eax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1048
	mov	QWORD PTR -96[rbp], rax
	mov	eax, DWORD PTR -324[rbp]
	mov	esi, 1
	mov	edi, eax
	call	llvm_and_u8
	mov	esi, 1
	mov	edi, eax
	call	llvm_xor_u8
	mov	rdx, QWORD PTR -96[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1056
	mov	QWORD PTR -88[rbp], rax
	mov	eax, DWORD PTR -332[rbp]
	xor	eax, 16
	xor	eax, DWORD PTR -328[rbp]
	mov	esi, 4
	mov	edi, eax
	call	llvm_lshr_u64
	mov	esi, 1
	mov	edi, eax
	call	llvm_and_u8
	mov	rdx, QWORD PTR -88[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1064
	mov	QWORD PTR -80[rbp], rax
	cmp	DWORD PTR -328[rbp], 0
	sete	al
	movzx	edx, al
	mov	rax, QWORD PTR -80[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -328[rbp]
	mov	esi, 63
	mov	edi, eax
	call	llvm_lshr_u64
	mov	DWORD PTR -320[rbp], eax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1072
	mov	QWORD PTR -72[rbp], rax
	mov	rax, QWORD PTR -72[rbp]
	mov	edx, DWORD PTR -320[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -332[rbp]
	mov	esi, 63
	mov	edi, eax
	call	llvm_lshr_u64
	mov	DWORD PTR -316[rbp], eax
	mov	rax, QWORD PTR -168[rbp]
	add	rax, 1088
	mov	QWORD PTR -64[rbp], rax
	mov	eax, DWORD PTR -320[rbp]
	xor	eax, DWORD PTR -316[rbp]
	mov	edx, DWORD PTR -316[rbp]
	mov	esi, edx
	mov	edi, eax
	call	llvm_add_u64
	cmp	eax, 2
	sete	al
	movzx	edx, al
	mov	rax, QWORD PTR -64[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -152[rbp]
	mov	DWORD PTR [rax], 0
	mov	eax, DWORD PTR -336[rbp]
	mov	esi, -32
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -312[rbp], eax
	mov	eax, DWORD PTR -312[rbp]
	cdqe
	mov	rbx, rax
	mov	eax, DWORD PTR -308[rbp]
	mov	esi, 22
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR [rbx], eax
	mov	rax, QWORD PTR -136[rbp]
	mov	edx, DWORD PTR -312[rbp]
	mov	DWORD PTR [rax], edx
	mov	rdx, QWORD PTR -56[rbp]
	mov	rax, QWORD PTR -168[rbp]
	mov	esi, 0
	mov	rdi, rax
	mov	eax, 0
	call	sub_401106___VERIFIER_nondet_int@PLT
	cdqe
	mov	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -128[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -304[rbp], eax
	mov	rax, QWORD PTR -112[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -300[rbp], eax
	mov	rax, QWORD PTR -120[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -296[rbp], eax
	mov	eax, DWORD PTR -304[rbp]
	mov	esi, -8
	mov	edi, eax
	call	llvm_add_u64
	cdqe
	mov	rdx, rax
	mov	eax, DWORD PTR -300[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -152[rbp]
	mov	DWORD PTR [rax], 0
	mov	rax, QWORD PTR -136[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -292[rbp], eax
	mov	eax, DWORD PTR -292[rbp]
	mov	esi, -8
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -288[rbp], eax
	mov	eax, DWORD PTR -288[rbp]
	cdqe
	mov	rbx, rax
	mov	eax, DWORD PTR -296[rbp]
	mov	esi, 13
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR [rbx], eax
	mov	rax, QWORD PTR -136[rbp]
	mov	edx, DWORD PTR -288[rbp]
	mov	DWORD PTR [rax], edx
	mov	rdx, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -168[rbp]
	mov	esi, 0
	mov	rdi, rax
	mov	eax, 0
	call	sub_401106___VERIFIER_nondet_int@PLT
	cdqe
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -128[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -284[rbp], eax
	mov	eax, DWORD PTR -284[rbp]
	mov	esi, -4
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -280[rbp], eax
	mov	rax, QWORD PTR -112[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -276[rbp], eax
	mov	rax, QWORD PTR -120[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -272[rbp], eax
	mov	eax, DWORD PTR -280[rbp]
	cdqe
	mov	rdx, rax
	mov	eax, DWORD PTR -276[rbp]
	mov	DWORD PTR [rdx], eax
	mov	eax, DWORD PTR -280[rbp]
	cdqe
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -268[rbp], eax
	mov	eax, DWORD PTR -268[rbp]
	mov	esi, -1
	mov	edi, eax
	call	llvm_add_u32
	mov	DWORD PTR -264[rbp], eax
	cmp	DWORD PTR -268[rbp], 0
	sete	al
	movzx	edx, al
	mov	rax, QWORD PTR -104[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -264[rbp]
	movzx	eax, al
	mov	edi, eax
	call	llvm_OC_ctpop_OC_i32
	mov	DWORD PTR -260[rbp], eax
	mov	eax, DWORD PTR -260[rbp]
	mov	esi, 1
	mov	edi, eax
	call	llvm_and_u8
	mov	esi, 1
	mov	edi, eax
	call	llvm_xor_u8
	mov	rdx, QWORD PTR -96[rbp]
	mov	DWORD PTR [rdx], eax
	mov	eax, DWORD PTR -264[rbp]
	xor	eax, DWORD PTR -268[rbp]
	mov	esi, 4
	mov	edi, eax
	call	llvm_lshr_u32
	mov	esi, 1
	mov	edi, eax
	call	llvm_and_u8
	mov	rdx, QWORD PTR -88[rbp]
	mov	DWORD PTR [rdx], eax
	cmp	DWORD PTR -264[rbp], 0
	sete	al
	movzx	edx, al
	mov	rax, QWORD PTR -80[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -264[rbp]
	mov	esi, 31
	mov	edi, eax
	call	llvm_lshr_u32
	mov	DWORD PTR -256[rbp], eax
	mov	eax, DWORD PTR -256[rbp]
	mov	DWORD PTR -252[rbp], eax
	mov	rax, QWORD PTR -72[rbp]
	mov	edx, DWORD PTR -252[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -268[rbp]
	mov	esi, 31
	mov	edi, eax
	call	llvm_lshr_u32
	mov	DWORD PTR -248[rbp], eax
	mov	eax, DWORD PTR -256[rbp]
	xor	eax, DWORD PTR -248[rbp]
	mov	edx, DWORD PTR -248[rbp]
	mov	esi, edx
	mov	edi, eax
	call	llvm_add_u32
	cmp	eax, 2
	sete	al
	movzx	edx, al
	mov	rax, QWORD PTR -64[rbp]
	mov	DWORD PTR [rax], edx
	cmp	DWORD PTR -264[rbp], 0
	sete	r12b
	cmp	DWORD PTR -252[rbp], 0
	setne	al
	movzx	ebx, al
	mov	eax, DWORD PTR -256[rbp]
	xor	eax, DWORD PTR -248[rbp]
	mov	edx, DWORD PTR -248[rbp]
	mov	esi, edx
	mov	edi, eax
	call	llvm_add_u32
	cmp	eax, 2
	sete	al
	movzx	eax, al
	xor	eax, ebx
	and	eax, 1
	or	eax, r12d
	movzx	eax, al
	mov	DWORD PTR -244[rbp], eax
	mov	eax, DWORD PTR -272[rbp]
	mov	esi, 7
	mov	edi, eax
	call	llvm_add_u64
	mov	ebx, eax
	mov	eax, DWORD PTR -244[rbp]
	mov	edx, 2
	mov	esi, 26
	mov	edi, eax
	call	llvm_select_u64
	mov	esi, ebx
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -240[rbp], eax
	cmp	DWORD PTR -244[rbp], 0
	je	.L33
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -184[rbp], rax
	jmp	.L25
.L33:
	nop
.L26:
	mov	eax, DWORD PTR -240[rbp]
	mov	esi, 12
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -236[rbp], eax
	mov	eax, DWORD PTR -284[rbp]
	mov	esi, -8
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -232[rbp], eax
	mov	eax, DWORD PTR -236[rbp]
	mov	DWORD PTR -344[rbp], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -176[rbp], rax
	jmp	.L27
.L34:
	nop
.L28:
	mov	rax, QWORD PTR -144[rbp]
	mov	edx, DWORD PTR -224[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -216[rbp]
	movzx	eax, al
	mov	edi, eax
	call	llvm_OC_ctpop_OC_i32
	mov	DWORD PTR -204[rbp], eax
	mov	rax, QWORD PTR -104[rbp]
	mov	DWORD PTR [rax], 0
	mov	eax, DWORD PTR -204[rbp]
	mov	esi, 1
	mov	edi, eax
	call	llvm_and_u8
	mov	esi, 1
	mov	edi, eax
	call	llvm_xor_u8
	mov	rdx, QWORD PTR -96[rbp]
	mov	DWORD PTR [rdx], eax
	cmp	DWORD PTR -216[rbp], 0
	sete	al
	movzx	edx, al
	mov	rax, QWORD PTR -80[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -72[rbp]
	mov	edx, DWORD PTR -212[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -64[rbp]
	mov	DWORD PTR [rax], 0
	mov	rax, QWORD PTR -88[rbp]
	mov	DWORD PTR [rax], 0
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR -184[rbp], rax
	nop
.L25:
	mov	rax, QWORD PTR -184[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -152[rbp]
	mov	DWORD PTR [rax], 0
	mov	eax, DWORD PTR -284[rbp]
	cdqe
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -192[rbp], eax
	mov	rax, QWORD PTR -128[rbp]
	mov	edx, DWORD PTR -192[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -284[rbp]
	mov	esi, 8
	mov	edi, eax
	call	llvm_add_u64
	cdqe
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -188[rbp], eax
	mov	rax, QWORD PTR -120[rbp]
	mov	edx, DWORD PTR -188[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, DWORD PTR -284[rbp]
	mov	esi, 16
	mov	edi, eax
	call	llvm_add_u64
	mov	rdx, QWORD PTR -136[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rax, QWORD PTR -24[rbp]
	jmp	.L32
.L27:
	mov	eax, DWORD PTR -344[rbp]
	mov	DWORD PTR -228[rbp], eax
	mov	rax, QWORD PTR -176[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	eax, DWORD PTR -232[rbp]
	cdqe
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -224[rbp], eax
	mov	eax, DWORD PTR -280[rbp]
	cdqe
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -220[rbp], eax
	mov	edx, DWORD PTR -220[rbp]
	mov	eax, DWORD PTR -224[rbp]
	mov	esi, edx
	mov	edi, eax
	call	llvm_add_u32
	mov	DWORD PTR -216[rbp], eax
	mov	eax, DWORD PTR -216[rbp]
	mov	esi, 31
	mov	edi, eax
	call	llvm_lshr_u32
	mov	DWORD PTR -212[rbp], eax
	mov	eax, DWORD PTR -228[rbp]
	mov	esi, 10
	mov	edi, eax
	call	llvm_add_u64
	mov	ebx, eax
	cmp	DWORD PTR -212[rbp], 0
	sete	al
	movzx	eax, al
	mov	edx, 2
	mov	esi, -20
	mov	edi, eax
	call	llvm_select_u64
	mov	esi, ebx
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -208[rbp], eax
	cmp	DWORD PTR -212[rbp], 0
	jne	.L34
	nop
.L31:
	mov	eax, DWORD PTR -232[rbp]
	cdqe
	mov	rbx, rax
	mov	edx, DWORD PTR -220[rbp]
	mov	eax, DWORD PTR -224[rbp]
	mov	esi, edx
	mov	edi, eax
	call	llvm_sub_u32
	mov	DWORD PTR [rbx], eax
	mov	eax, DWORD PTR -208[rbp]
	mov	esi, 10
	mov	edi, eax
	call	llvm_add_u64
	mov	DWORD PTR -200[rbp], eax
	mov	eax, DWORD PTR -280[rbp]
	cdqe
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -196[rbp], eax
	mov	eax, DWORD PTR -280[rbp]
	cdqe
	mov	rbx, rax
	mov	eax, DWORD PTR -196[rbp]
	mov	esi, 1
	mov	edi, eax
	call	llvm_add_u32
	mov	DWORD PTR [rbx], eax
	mov	eax, DWORD PTR -200[rbp]
	mov	DWORD PTR -344[rbp], eax
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR -176[rbp], rax
	jmp	.L27
.L32:
	add	rsp, 336
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"172373.c"
	.text
	.align	2
	.global	__VERIFIER_nondet_int
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_nondet_int, %function
__VERIFIER_nondet_int:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__VERIFIER_nondet_int, .-__VERIFIER_nondet_int
	.comm	__bss_start,32,4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_select_u64, %function
llvm_select_u64:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	beq	.L4
	ldr	r3, [fp, #-20]
	b	.L5
.L4:
	ldr	r3, [fp, #-24]
.L5:
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_select_u64, .-llvm_select_u64
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_add_u32, %function
llvm_add_u32:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_add_u32, .-llvm_add_u32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_add_u64, %function
llvm_add_u64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_add_u64, .-llvm_add_u64
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_sub_u32, %function
llvm_sub_u32:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_sub_u32, .-llvm_sub_u32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_lshr_u32, %function
llvm_lshr_u32:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	asr	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_lshr_u32, .-llvm_lshr_u32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_lshr_u64, %function
llvm_lshr_u64:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	asr	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_lshr_u64, .-llvm_lshr_u64
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_and_u8, %function
llvm_and_u8:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	and	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_and_u8, .-llvm_and_u8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_xor_u8, %function
llvm_xor_u8:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	eor	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	llvm_xor_u8, .-llvm_xor_u8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	llvm_OC_ctpop_OC_i32, %function
llvm_OC_ctpop_OC_i32:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	sub	r3, fp, #16
	mov	r1, r3
	mov	r0, #32
	bl	LLVMCountPopulation
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	llvm_OC_ctpop_OC_i32, .-llvm_OC_ctpop_OC_i32
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 248
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #248
	ldr	r3, [fp, #-244]
	add	r3, r3, #1200
	add	r3, r3, #4
	str	r3, [fp, #-240]
	ldr	r3, [fp, #-240]
	str	r3, [fp, #-236]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1216
	add	r3, r3, #12
	str	r3, [fp, #-232]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1248
	add	r3, r3, #4
	str	r3, [fp, #-228]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1248
	add	r3, r3, #12
	str	r3, [fp, #-224]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1328
	add	r3, r3, #4
	str	r3, [fp, #-220]
	ldr	r3, [fp, #-240]
	str	r3, [fp, #-216]
	ldr	r3, [fp, #-224]
	ldr	r3, [r3]
	str	r3, [fp, #-212]
	ldr	r3, [fp, #-228]
	ldr	r3, [r3]
	str	r3, [fp, #-208]
	mvn	r1, #7
	ldr	r0, [fp, #-208]
	bl	llvm_add_u64
	str	r0, [fp, #-204]
	ldr	r3, [fp, #-204]
	ldr	r2, [fp, #-212]
	str	r2, [r3]
	ldr	r3, [fp, #-224]
	ldr	r2, [fp, #-204]
	str	r2, [r3]
	mvn	r1, #23
	ldr	r0, [fp, #-208]
	bl	llvm_add_u64
	str	r0, [fp, #-200]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1040
	str	r3, [fp, #-196]
	ldr	r3, [fp, #-204]
	cmp	r3, #15
	movle	r3, #1
	movgt	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-196]
	str	r2, [r3]
	ldr	r3, [fp, #-200]
	and	r3, r3, #255
	mov	r0, r3
	bl	llvm_OC_ctpop_OC_i32
	str	r0, [fp, #-192]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1040
	add	r3, r3, #8
	str	r3, [fp, #-188]
	mov	r1, #1
	ldr	r0, [fp, #-192]
	bl	llvm_and_u8
	mov	r3, r0
	mov	r1, #1
	mov	r0, r3
	bl	llvm_xor_u8
	mov	r2, r0
	ldr	r3, [fp, #-188]
	str	r2, [r3]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1056
	str	r3, [fp, #-184]
	ldr	r2, [fp, #-204]
	ldr	r3, [fp, #-200]
	eor	r3, r3, r2
	eor	r3, r3, #16
	mov	r1, #4
	mov	r0, r3
	bl	llvm_lshr_u64
	mov	r3, r0
	mov	r1, #1
	mov	r0, r3
	bl	llvm_and_u8
	mov	r2, r0
	ldr	r3, [fp, #-184]
	str	r2, [r3]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1056
	add	r3, r3, #8
	str	r3, [fp, #-180]
	ldr	r3, [fp, #-200]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-180]
	str	r2, [r3]
	mov	r1, #63
	ldr	r0, [fp, #-200]
	bl	llvm_lshr_u64
	str	r0, [fp, #-176]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1072
	str	r3, [fp, #-172]
	ldr	r3, [fp, #-172]
	ldr	r2, [fp, #-176]
	str	r2, [r3]
	mov	r1, #63
	ldr	r0, [fp, #-204]
	bl	llvm_lshr_u64
	str	r0, [fp, #-168]
	ldr	r3, [fp, #-244]
	add	r3, r3, #1088
	str	r3, [fp, #-164]
	ldr	r2, [fp, #-176]
	ldr	r3, [fp, #-168]
	eor	r3, r3, r2
	ldr	r1, [fp, #-168]
	mov	r0, r3
	bl	llvm_add_u64
	mov	r3, r0
	cmp	r3, #2
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-164]
	str	r2, [r3]
	ldr	r3, [fp, #-236]
	mov	r2, #0
	str	r2, [r3]
	mvn	r1, #31
	ldr	r0, [fp, #-208]
	bl	llvm_add_u64
	str	r0, [fp, #-160]
	ldr	r4, [fp, #-160]
	mov	r1, #22
	ldr	r0, [fp, #-156]
	bl	llvm_add_u64
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [fp, #-228]
	ldr	r2, [fp, #-160]
	str	r2, [r3]
	ldr	r2, [fp, #-152]
	mov	r1, #0
	ldr	r0, [fp, #-244]
	bl	sub_401106___VERIFIER_nondet_int
	mov	r3, r0
	str	r3, [fp, #-148]
	ldr	r3, [fp, #-224]
	ldr	r3, [r3]
	str	r3, [fp, #-144]
	ldr	r3, [fp, #-216]
	ldr	r3, [r3]
	str	r3, [fp, #-140]
	ldr	r3, [fp, #-220]
	ldr	r3, [r3]
	str	r3, [fp, #-136]
	mvn	r1, #7
	ldr	r0, [fp, #-144]
	bl	llvm_add_u64
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-140]
	str	r3, [r2]
	ldr	r3, [fp, #-236]
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-228]
	ldr	r3, [r3]
	str	r3, [fp, #-132]
	mvn	r1, #7
	ldr	r0, [fp, #-132]
	bl	llvm_add_u64
	str	r0, [fp, #-128]
	ldr	r4, [fp, #-128]
	mov	r1, #13
	ldr	r0, [fp, #-136]
	bl	llvm_add_u64
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [fp, #-228]
	ldr	r2, [fp, #-128]
	str	r2, [r3]
	ldr	r2, [fp, #-148]
	mov	r1, #0
	ldr	r0, [fp, #-244]
	bl	sub_401106___VERIFIER_nondet_int
	mov	r3, r0
	str	r3, [fp, #-124]
	ldr	r3, [fp, #-224]
	ldr	r3, [r3]
	str	r3, [fp, #-120]
	mvn	r1, #3
	ldr	r0, [fp, #-120]
	bl	llvm_add_u64
	str	r0, [fp, #-116]
	ldr	r3, [fp, #-216]
	ldr	r3, [r3]
	str	r3, [fp, #-112]
	ldr	r3, [fp, #-220]
	ldr	r3, [r3]
	str	r3, [fp, #-108]
	ldr	r3, [fp, #-116]
	ldr	r2, [fp, #-112]
	str	r2, [r3]
	ldr	r3, [fp, #-116]
	ldr	r3, [r3]
	str	r3, [fp, #-104]
	mvn	r1, #0
	ldr	r0, [fp, #-104]
	bl	llvm_add_u32
	str	r0, [fp, #-100]
	ldr	r3, [fp, #-104]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-196]
	str	r2, [r3]
	ldr	r3, [fp, #-100]
	and	r3, r3, #255
	mov	r0, r3
	bl	llvm_OC_ctpop_OC_i32
	str	r0, [fp, #-96]
	mov	r1, #1
	ldr	r0, [fp, #-96]
	bl	llvm_and_u8
	mov	r3, r0
	mov	r1, #1
	mov	r0, r3
	bl	llvm_xor_u8
	mov	r2, r0
	ldr	r3, [fp, #-188]
	str	r2, [r3]
	ldr	r2, [fp, #-100]
	ldr	r3, [fp, #-104]
	eor	r3, r3, r2
	mov	r1, #4
	mov	r0, r3
	bl	llvm_lshr_u32
	mov	r3, r0
	mov	r1, #1
	mov	r0, r3
	bl	llvm_and_u8
	mov	r2, r0
	ldr	r3, [fp, #-184]
	str	r2, [r3]
	ldr	r3, [fp, #-100]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-180]
	str	r2, [r3]
	mov	r1, #31
	ldr	r0, [fp, #-100]
	bl	llvm_lshr_u32
	str	r0, [fp, #-92]
	ldr	r3, [fp, #-92]
	str	r3, [fp, #-88]
	ldr	r3, [fp, #-172]
	ldr	r2, [fp, #-88]
	str	r2, [r3]
	mov	r1, #31
	ldr	r0, [fp, #-104]
	bl	llvm_lshr_u32
	str	r0, [fp, #-84]
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-84]
	eor	r3, r3, r2
	ldr	r1, [fp, #-84]
	mov	r0, r3
	bl	llvm_add_u32
	mov	r3, r0
	cmp	r3, #2
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-164]
	str	r2, [r3]
	ldr	r3, [fp, #-100]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r4, r3, #255
	ldr	r3, [fp, #-88]
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r5, r3
	ldr	r2, [fp, #-92]
	ldr	r3, [fp, #-84]
	eor	r3, r3, r2
	ldr	r1, [fp, #-84]
	mov	r0, r3
	bl	llvm_add_u32
	mov	r3, r0
	cmp	r3, #2
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	eor	r3, r3, r5
	and	r3, r3, #1
	and	r3, r3, #255
	orr	r3, r4, r3
	and	r3, r3, #255
	str	r3, [fp, #-80]
	mov	r2, #2
	mov	r1, #26
	ldr	r0, [fp, #-80]
	bl	llvm_select_u64
	mov	r4, r0
	mov	r1, #7
	ldr	r0, [fp, #-108]
	bl	llvm_add_u64
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	llvm_add_u64
	str	r0, [fp, #-76]
	ldr	r3, [fp, #-80]
	cmp	r3, #0
	beq	.L33
	ldr	r3, [fp, #-124]
	str	r3, [fp, #-256]
	b	.L25
.L33:
	nop
.L26:
	mov	r1, #12
	ldr	r0, [fp, #-76]
	bl	llvm_add_u64
	str	r0, [fp, #-72]
	mvn	r1, #7
	ldr	r0, [fp, #-120]
	bl	llvm_add_u64
	str	r0, [fp, #-68]
	ldr	r3, [fp, #-72]
	str	r3, [fp, #-252]
	ldr	r3, [fp, #-124]
	str	r3, [fp, #-248]
	b	.L27
.L34:
	nop
.L28:
	ldr	r3, [fp, #-232]
	ldr	r2, [fp, #-56]
	str	r2, [r3]
	ldr	r3, [fp, #-48]
	and	r3, r3, #255
	mov	r0, r3
	bl	llvm_OC_ctpop_OC_i32
	str	r0, [fp, #-36]
	ldr	r3, [fp, #-196]
	mov	r2, #0
	str	r2, [r3]
	mov	r1, #1
	ldr	r0, [fp, #-36]
	bl	llvm_and_u8
	mov	r3, r0
	mov	r1, #1
	mov	r0, r3
	bl	llvm_xor_u8
	mov	r2, r0
	ldr	r3, [fp, #-188]
	str	r2, [r3]
	ldr	r3, [fp, #-48]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-180]
	str	r2, [r3]
	ldr	r3, [fp, #-172]
	ldr	r2, [fp, #-44]
	str	r2, [r3]
	ldr	r3, [fp, #-164]
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-184]
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-256]
	nop
.L25:
	ldr	r3, [fp, #-256]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-236]
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-120]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-224]
	ldr	r2, [fp, #-20]
	str	r2, [r3]
	mov	r1, #8
	ldr	r0, [fp, #-120]
	bl	llvm_add_u64
	mov	r3, r0
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-220]
	ldr	r2, [fp, #-16]
	str	r2, [r3]
	mov	r1, #16
	ldr	r0, [fp, #-120]
	bl	llvm_add_u64
	mov	r2, r0
	ldr	r3, [fp, #-228]
	str	r2, [r3]
	ldr	r3, [fp, #-24]
	b	.L32
.L27:
	ldr	r3, [fp, #-252]
	str	r3, [fp, #-64]
	ldr	r3, [fp, #-248]
	str	r3, [fp, #-60]
	ldr	r3, [fp, #-68]
	ldr	r3, [r3]
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-116]
	ldr	r3, [r3]
	str	r3, [fp, #-52]
	ldr	r1, [fp, #-52]
	ldr	r0, [fp, #-56]
	bl	llvm_add_u32
	str	r0, [fp, #-48]
	mov	r1, #31
	ldr	r0, [fp, #-48]
	bl	llvm_lshr_u32
	str	r0, [fp, #-44]
	ldr	r3, [fp, #-44]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, #2
	mvn	r1, #19
	mov	r0, r3
	bl	llvm_select_u64
	mov	r4, r0
	mov	r1, #10
	ldr	r0, [fp, #-64]
	bl	llvm_add_u64
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	llvm_add_u64
	str	r0, [fp, #-40]
	ldr	r3, [fp, #-44]
	cmp	r3, #0
	bne	.L34
	nop
.L31:
	ldr	r4, [fp, #-68]
	ldr	r1, [fp, #-52]
	ldr	r0, [fp, #-56]
	bl	llvm_sub_u32
	mov	r3, r0
	str	r3, [r4]
	mov	r1, #10
	ldr	r0, [fp, #-40]
	bl	llvm_add_u64
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-116]
	ldr	r3, [r3]
	str	r3, [fp, #-28]
	ldr	r4, [fp, #-116]
	mov	r1, #1
	ldr	r0, [fp, #-28]
	bl	llvm_add_u32
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [fp, #-32]
	str	r3, [fp, #-252]
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-248]
	b	.L27
.L32:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
