	.file	"991954.c"
	.intel_syntax noprefix
	.text
	.globl	bitAnd
	.type	bitAnd, @function
bitAnd:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -4[rbp]
	and	eax, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	bitAnd, .-bitAnd
	.globl	getByte
	.type	getByte, @function
getByte:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 3
	mov	edx, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	getByte, .-getByte
	.globl	logicalShift
	.type	logicalShift, @function
logicalShift:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, DWORD PTR -8[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, DWORD PTR -8[rbp]
	mov	esi, -2147483648
	mov	ecx, eax
	sar	esi, cl
	mov	eax, esi
	add	eax, eax
	not	eax
	and	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	logicalShift, .-logicalShift
	.globl	bitCount
	.type	bitCount, @function
bitCount:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	mov	DWORD PTR -20[rbp], 21845
	mov	eax, DWORD PTR -20[rbp]
	sal	eax, 16
	add	DWORD PTR -20[rbp], eax
	mov	DWORD PTR -16[rbp], 13107
	mov	eax, DWORD PTR -16[rbp]
	sal	eax, 16
	add	DWORD PTR -16[rbp], eax
	mov	DWORD PTR -12[rbp], 3855
	mov	eax, DWORD PTR -12[rbp]
	sal	eax, 16
	add	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -8[rbp], 255
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 16
	add	DWORD PTR -8[rbp], eax
	mov	DWORD PTR -4[rbp], 65535
	mov	eax, DWORD PTR -36[rbp]
	and	eax, DWORD PTR -20[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	sar	eax
	and	eax, DWORD PTR -20[rbp]
	add	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, DWORD PTR -16[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 2
	and	eax, DWORD PTR -16[rbp]
	add	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, DWORD PTR -12[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 4
	and	eax, DWORD PTR -12[rbp]
	add	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, DWORD PTR -8[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 8
	and	eax, DWORD PTR -8[rbp]
	add	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	and	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	sar	eax, 16
	and	eax, DWORD PTR -4[rbp]
	add	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	bitCount, .-bitCount
	.globl	bang
	.type	bang, @function
bang:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	neg	eax
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	or	eax, DWORD PTR -4[rbp]
	not	eax
	shr	eax, 31
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	bang, .-bang
	.globl	tmin
	.type	tmin, @function
tmin:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, -2147483648
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	tmin, .-tmin
	.globl	fitsBits
	.type	fitsBits, @function
fitsBits:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, 32
	sub	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, DWORD PTR -8[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	fitsBits, .-fitsBits
	.globl	divpwr2
	.type	divpwr2, @function
divpwr2:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 31
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	sub	eax, 1
	and	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	divpwr2, .-divpwr2
	.globl	negate
	.type	negate, @function
negate:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	neg	eax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	negate, .-negate
	.globl	isPositive
	.type	isPositive, @function
isPositive:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	cdq
	cmp	DWORD PTR -4[rbp], 0
	sete	al
	movzx	eax, al
	or	eax, edx
	test	eax, eax
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	isPositive, .-isPositive
	.globl	isLessOrEqual
	.type	isLessOrEqual, @function
isLessOrEqual:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	mov	edx, eax
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	cmp	eax, -1
	setl	al
	movzx	eax, al
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdq
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	shr	eax, 31
	movzx	eax, al
	or	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	not	eax
	shr	eax, 31
	movzx	edx, al
	mov	eax, DWORD PTR -24[rbp]
	sar	eax, 31
	or	eax, edx
	test	eax, eax
	sete	al
	movzx	eax, al
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	mov	edx, eax
	mov	eax, DWORD PTR -20[rbp]
	add	eax, edx
	cmp	eax, -1
	sete	al
	movzx	eax, al
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	or	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -12[rbp]
	or	eax, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	isLessOrEqual, .-isLessOrEqual
	.globl	ilog2
	.type	ilog2, @function
ilog2:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -12[rbp], 0
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 16
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 31
	sar	eax, 31
	and	eax, 16
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	DWORD PTR -20[rbp], cl
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 8
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 31
	sar	eax, 31
	and	eax, 8
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	DWORD PTR -20[rbp], cl
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 4
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 31
	sar	eax, 31
	and	eax, 4
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	DWORD PTR -20[rbp], cl
	mov	eax, DWORD PTR -20[rbp]
	sar	eax, 2
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 31
	sar	eax, 31
	and	eax, 2
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	DWORD PTR -20[rbp], cl
	mov	eax, DWORD PTR -20[rbp]
	sar	eax
	test	eax, eax
	setne	al
	movzx	eax, al
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	sal	eax, 31
	shr	eax, 31
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	add	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	sar	DWORD PTR -20[rbp], cl
	mov	eax, DWORD PTR -12[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	ilog2, .-ilog2
	.globl	float_neg
	.type	float_neg, @function
float_neg:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	not	eax
	and	eax, 2139095040
	test	eax, eax
	jne	.L26
	mov	eax, DWORD PTR -4[rbp]
	and	eax, 8388607
	test	eax, eax
	je	.L26
	mov	eax, DWORD PTR -4[rbp]
	jmp	.L27
.L26:
	mov	eax, DWORD PTR -4[rbp]
	xor	eax, -2147483648
.L27:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	float_neg, .-float_neg
	.globl	float_i2f
	.type	float_i2f, @function
float_i2f:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -36[rbp], edi
	cmp	DWORD PTR -36[rbp], 0
	jne	.L29
	mov	eax, 0
	jmp	.L30
.L29:
	mov	DWORD PTR -20[rbp], 0
	mov	eax, DWORD PTR -36[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	DWORD PTR -16[rbp], 0
	cmp	DWORD PTR -36[rbp], 0
	jns	.L34
	mov	DWORD PTR -20[rbp], 1
	mov	eax, DWORD PTR -36[rbp]
	neg	eax
	mov	DWORD PTR -12[rbp], eax
.L34:
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -4[rbp], eax
	sal	DWORD PTR -12[rbp]
	add	DWORD PTR -16[rbp], 1
	cmp	DWORD PTR -4[rbp], 0
	js	.L39
	jmp	.L34
.L39:
	nop
	mov	eax, DWORD PTR -12[rbp]
	and	eax, 511
	cmp	eax, 256
	jg	.L35
	mov	eax, DWORD PTR -12[rbp]
	and	eax, 1023
	cmp	eax, 768
	jne	.L36
.L35:
	mov	DWORD PTR -8[rbp], 1
	jmp	.L37
.L36:
	mov	DWORD PTR -8[rbp], 0
.L37:
	mov	eax, DWORD PTR -20[rbp]
	sal	eax, 31
	mov	edx, eax
	mov	eax, 159
	sub	eax, DWORD PTR -16[rbp]
	sal	eax, 23
	add	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	shr	eax, 9
	add	edx, eax
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
.L30:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	float_i2f, .-float_i2f
	.globl	float_twice
	.type	float_twice, @function
float_twice:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -12[rbp], 2139095040
	mov	eax, DWORD PTR -20[rbp]
	and	eax, -2147483648
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	and	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -12[rbp]
	jne	.L41
	mov	eax, DWORD PTR -20[rbp]
	jmp	.L42
.L41:
	cmp	DWORD PTR -4[rbp], 0
	jne	.L43
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, [rax+rax]
	mov	eax, DWORD PTR -8[rbp]
	add	eax, edx
	jmp	.L42
.L43:
	cmp	DWORD PTR -4[rbp], 2130706432
	jne	.L44
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -12[rbp]
	add	eax, edx
	jmp	.L42
.L44:
	mov	eax, DWORD PTR -20[rbp]
	add	eax, 8388608
.L42:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	float_twice, .-float_twice
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"991954.c"
	.text
	.align	2
	.global	bitAnd
	.syntax unified
	.arm
	.fpu softvfp
	.type	bitAnd, %function
bitAnd:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	and	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	bitAnd, .-bitAnd
	.align	2
	.global	getByte
	.syntax unified
	.arm
	.fpu softvfp
	.type	getByte, %function
getByte:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #3
	ldr	r2, [fp, #-8]
	asr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	getByte, .-getByte
	.align	2
	.global	logicalShift
	.syntax unified
	.arm
	.fpu softvfp
	.type	logicalShift, %function
logicalShift:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-12]
	asr	r2, r2, r3
	mov	r1, #-2147483648
	ldr	r3, [fp, #-12]
	asr	r3, r1, r3
	lsl	r3, r3, #1
	mvn	r3, r3
	and	r3, r3, r2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	logicalShift, .-logicalShift
	.align	2
	.global	bitCount
	.syntax unified
	.arm
	.fpu softvfp
	.type	bitCount, %function
bitCount:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, .L9
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #16
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, .L9+4
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #16
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, .L9+8
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	mov	r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #16
	ldr	r2, [fp, #-12]
	add	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, .L9+12
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-24]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	asr	r1, r3, #1
	ldr	r3, [fp, #-24]
	and	r3, r3, r1
	add	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-20]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	asr	r1, r3, #2
	ldr	r3, [fp, #-20]
	and	r3, r3, r1
	add	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-16]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	asr	r1, r3, #4
	ldr	r3, [fp, #-16]
	and	r3, r3, r1
	add	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-12]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	asr	r1, r3, #8
	ldr	r3, [fp, #-12]
	and	r3, r3, r1
	add	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-8]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	asr	r1, r3, #16
	ldr	r3, [fp, #-8]
	and	r3, r3, r1
	add	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-32]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L10:
	.align	2
.L9:
	.word	21845
	.word	13107
	.word	3855
	.word	65535
	.size	bitCount, .-bitCount
	.align	2
	.global	bang
	.syntax unified
	.arm
	.fpu softvfp
	.type	bang, %function
bang:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	rsb	r3, r3, #0
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	mvn	r3, r3
	lsr	r3, r3, #31
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	bang, .-bang
	.align	2
	.global	tmin
	.syntax unified
	.arm
	.fpu softvfp
	.type	tmin, %function
tmin:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #-2147483648
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	tmin, .-tmin
	.align	2
	.global	fitsBits
	.syntax unified
	.arm
	.fpu softvfp
	.type	fitsBits, %function
fitsBits:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-20]
	rsb	r3, r3, #32
	str	r3, [fp, #-12]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-12]
	lsl	r2, r2, r3
	ldr	r3, [fp, #-12]
	asr	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fitsBits, .-fitsBits
	.align	2
	.global	divpwr2
	.syntax unified
	.arm
	.fpu softvfp
	.type	divpwr2, %function
divpwr2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	asr	r3, r3, #31
	str	r3, [fp, #-8]
	mov	r2, #1
	ldr	r3, [fp, #-20]
	lsl	r3, r2, r3
	sub	r2, r3, #1
	ldr	r3, [fp, #-8]
	and	r3, r3, r2
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	asr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	divpwr2, .-divpwr2
	.align	2
	.global	negate
	.syntax unified
	.arm
	.fpu softvfp
	.type	negate, %function
negate:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	rsb	r3, r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	negate, .-negate
	.align	2
	.global	isPositive
	.syntax unified
	.arm
	.fpu softvfp
	.type	isPositive, %function
isPositive:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	asr	r3, r3, #31
	ldr	r2, [fp, #-8]
	cmp	r2, #0
	moveq	r2, #1
	movne	r2, #0
	and	r2, r2, #255
	orr	r3, r3, r2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isPositive, .-isPositive
	.align	2
	.global	isLessOrEqual
	.syntax unified
	.arm
	.fpu softvfp
	.type	isLessOrEqual, %function
isLessOrEqual:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	cmn	r3, #1
	movlt	r3, #1
	movge	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	asr	r3, r3, #31
	ldr	r2, [fp, #-28]
	mvn	r2, r2
	lsr	r2, r2, #31
	and	r2, r2, #255
	orr	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	mvn	r3, r3
	lsr	r3, r3, #31
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, [fp, #-28]
	asr	r3, r3, #31
	orr	r3, r2, r3
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	cmn	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-20]
	orr	r2, r2, r3
	ldr	r3, [fp, #-16]
	and	r2, r2, r3
	ldr	r3, [fp, #-8]
	orr	r3, r2, r3
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isLessOrEqual, .-isLessOrEqual
	.align	2
	.global	ilog2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ilog2, %function
ilog2:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	mov	r3, #0
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	asr	r3, r3, #16
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #31
	asr	r3, r3, #31
	and	r3, r3, #16
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	asr	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	asr	r3, r3, #8
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #31
	asr	r3, r3, #31
	and	r3, r3, #8
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	asr	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	asr	r3, r3, #4
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #31
	asr	r3, r3, #31
	and	r3, r3, #4
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	asr	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	asr	r3, r3, #2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #31
	asr	r3, r3, #31
	and	r3, r3, #2
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	asr	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	asr	r3, r3, #1
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #31
	lsr	r3, r3, #31
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-8]
	asr	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ilog2, .-ilog2
	.align	2
	.global	float_neg
	.syntax unified
	.arm
	.fpu softvfp
	.type	float_neg, %function
float_neg:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mvn	r2, r3
	ldr	r3, .L30
	and	r3, r3, r2
	cmp	r3, #0
	bne	.L28
	ldr	r3, [fp, #-8]
	bic	r3, r3, #-16777216
	bic	r3, r3, #8388608
	cmp	r3, #0
	beq	.L28
	ldr	r3, [fp, #-8]
	b	.L29
.L28:
	ldr	r3, [fp, #-8]
	eor	r3, r3, #-2147483648
.L29:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L31:
	.align	2
.L30:
	.word	2139095040
	.size	float_neg, .-float_neg
	.align	2
	.global	float_i2f
	.syntax unified
	.arm
	.fpu softvfp
	.type	float_i2f, %function
float_i2f:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	cmp	r3, #0
	bne	.L33
	mov	r3, #0
	b	.L34
.L33:
	mov	r3, #0
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-32]
	cmp	r3, #0
	bge	.L38
	mov	r3, #1
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-32]
	rsb	r3, r3, #0
	str	r3, [fp, #-16]
.L38:
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #1
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	blt	.L43
	b	.L38
.L43:
	nop
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #23
	lsr	r3, r3, #23
	cmp	r3, #256
	bgt	.L39
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #22
	lsr	r3, r3, #22
	cmp	r3, #768
	bne	.L40
.L39:
	mov	r3, #1
	str	r3, [fp, #-12]
	b	.L41
.L40:
	mov	r3, #0
	str	r3, [fp, #-12]
.L41:
	ldr	r3, [fp, #-24]
	lsl	r2, r3, #31
	ldr	r3, [fp, #-20]
	rsb	r3, r3, #159
	lsl	r3, r3, #23
	add	r3, r2, r3
	ldr	r2, [fp, #-16]
	lsr	r2, r2, #9
	add	r2, r3, r2
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
.L34:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	float_i2f, .-float_i2f
	.align	2
	.global	float_twice
	.syntax unified
	.arm
	.fpu softvfp
	.type	float_twice, %function
float_twice:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, .L49
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	and	r3, r3, #-2147483648
	str	r3, [fp, #-12]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r2, r3
	bne	.L45
	ldr	r3, [fp, #-24]
	b	.L46
.L45:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L47
	ldr	r3, [fp, #-24]
	lsl	r2, r3, #1
	ldr	r3, [fp, #-12]
	add	r3, r2, r3
	b	.L46
.L47:
	ldr	r3, [fp, #-8]
	cmp	r3, #2130706432
	bne	.L48
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	b	.L46
.L48:
	ldr	r3, [fp, #-24]
	add	r3, r3, #8388608
.L46:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L50:
	.align	2
.L49:
	.word	2139095040
	.size	float_twice, .-float_twice
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
