	.file	"666096.c"
	.intel_syntax noprefix
	.text
	.globl	check_zero_sized_VLA
	.type	check_zero_sized_VLA, @function
check_zero_sized_VLA:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -36[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rcx, rax
	cmp	DWORD PTR -36[rbp], 0
	je	.L2
	mov	rsp, rcx
	jmp	.L1
.L2:
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -24[rbp], rdx
	movsx	rdx, eax
	mov	r10, rdx
	mov	r11d, 0
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rsi, rax
	and	rsi, -4096
	mov	rdx, rsp
	sub	rdx, rsi
.L4:
	cmp	rsp, rdx
	je	.L5
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L4
.L5:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L6
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L6:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -16[rbp], rax
	mov	rsp, rcx
.L1:
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	check_zero_sized_VLA, .-check_zero_sized_VLA
	.globl	check_uninit_sized_VLA
	.type	check_uninit_sized_VLA, @function
check_uninit_sized_VLA:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	eax, DWORD PTR -44[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, eax
	mov	rcx, rdx
	mov	ebx, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L9:
	cmp	rsp, rdx
	je	.L10
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L9
.L10:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L11
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L11:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	check_uninit_sized_VLA, .-check_uninit_sized_VLA
	.type	vla_allocate_signed, @function
vla_allocate_signed:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	eax, edi
	mov	WORD PTR -52[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, ax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, ax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, ax
	mov	rcx, rdx
	mov	ebx, 0
	movsx	rax, ax
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ebx, 16
	mov	edx, 0
	div	rbx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L14:
	cmp	rsp, rdx
	je	.L15
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L14
.L15:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L16
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L16:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	vla_allocate_signed, .-vla_allocate_signed
	.type	vla_allocate_unsigned, @function
vla_allocate_unsigned:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	eax, edi
	mov	WORD PTR -52[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	movzx	eax, WORD PTR -52[rbp]
	movzx	edx, ax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movzx	edx, ax
	mov	r8, rdx
	mov	r9d, 0
	movzx	edx, ax
	mov	rcx, rdx
	mov	ebx, 0
	movzx	eax, ax
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ebx, 16
	mov	edx, 0
	div	rbx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L19:
	cmp	rsp, rdx
	je	.L20
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L19
.L20:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L21
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L21:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	vla_allocate_unsigned, .-vla_allocate_unsigned
	.globl	check_negative_sized_VLA_1
	.type	check_negative_sized_VLA_1, @function
check_negative_sized_VLA_1:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, -1
	call	vla_allocate_signed
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	check_negative_sized_VLA_1, .-check_negative_sized_VLA_1
	.globl	check_negative_sized_VLA_2
	.type	check_negative_sized_VLA_2, @function
check_negative_sized_VLA_2:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 65535
	call	vla_allocate_unsigned
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	check_negative_sized_VLA_2, .-check_negative_sized_VLA_2
	.globl	check_negative_sized_VLA_3
	.type	check_negative_sized_VLA_3, @function
check_negative_sized_VLA_3:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	WORD PTR -42[rbp], -1
	movzx	eax, WORD PTR -42[rbp]
	movsx	rdx, ax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, ax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, ax
	mov	rcx, rdx
	mov	ebx, 0
	movsx	rax, ax
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L26:
	cmp	rsp, rdx
	je	.L27
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L26
.L27:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L28
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L28:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	check_negative_sized_VLA_3, .-check_negative_sized_VLA_3
	.globl	check_negative_sized_VLA_4
	.type	check_negative_sized_VLA_4, @function
check_negative_sized_VLA_4:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	WORD PTR -42[rbp], -1
	movzx	eax, WORD PTR -42[rbp]
	movzx	edx, ax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movzx	edx, ax
	mov	r8, rdx
	mov	r9d, 0
	movzx	edx, ax
	mov	rcx, rdx
	mov	ebx, 0
	movzx	eax, ax
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L31:
	cmp	rsp, rdx
	je	.L32
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L31
.L32:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L33
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L33:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	check_negative_sized_VLA_4, .-check_negative_sized_VLA_4
	.globl	check_negative_sized_VLA_5
	.type	check_negative_sized_VLA_5, @function
check_negative_sized_VLA_5:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	BYTE PTR -41[rbp], -1
	movzx	eax, BYTE PTR -41[rbp]
	movsx	rdx, al
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, al
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, al
	mov	rcx, rdx
	mov	ebx, 0
	movsx	rax, al
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L36:
	cmp	rsp, rdx
	je	.L37
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L36
.L37:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L38
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L38:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	check_negative_sized_VLA_5, .-check_negative_sized_VLA_5
	.globl	check_negative_sized_VLA_6
	.type	check_negative_sized_VLA_6, @function
check_negative_sized_VLA_6:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	BYTE PTR -41[rbp], -1
	movzx	eax, BYTE PTR -41[rbp]
	movzx	edx, al
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movzx	edx, al
	mov	r8, rdx
	mov	r9d, 0
	movzx	edx, al
	mov	rcx, rdx
	mov	ebx, 0
	movzx	eax, al
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L41:
	cmp	rsp, rdx
	je	.L42
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L41
.L42:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L43
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L43:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	check_negative_sized_VLA_6, .-check_negative_sized_VLA_6
	.globl	check_negative_sized_VLA_7
	.type	check_negative_sized_VLA_7, @function
check_negative_sized_VLA_7:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	BYTE PTR -41[rbp], -1
	movsx	eax, BYTE PTR -41[rbp]
	add	eax, 2
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, eax
	mov	rcx, rdx
	mov	ebx, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L46:
	cmp	rsp, rdx
	je	.L47
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L46
.L47:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L48
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L48:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	check_negative_sized_VLA_7, .-check_negative_sized_VLA_7
	.globl	check_negative_sized_VLA_8
	.type	check_negative_sized_VLA_8, @function
check_negative_sized_VLA_8:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	BYTE PTR -41[rbp], 1
	movsx	eax, BYTE PTR -41[rbp]
	sub	eax, 2
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, eax
	mov	rcx, rdx
	mov	ebx, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L51:
	cmp	rsp, rdx
	je	.L52
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L51
.L52:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L53
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L53:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	check_negative_sized_VLA_8, .-check_negative_sized_VLA_8
	.globl	check_negative_sized_VLA_9
	.type	check_negative_sized_VLA_9, @function
check_negative_sized_VLA_9:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	DWORD PTR -44[rbp], 1
	mov	eax, DWORD PTR -44[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, eax
	mov	rcx, rdx
	mov	ebx, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	edi, 16
	mov	edx, 0
	div	rdi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L56:
	cmp	rsp, rdx
	je	.L57
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L56
.L57:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L58
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L58:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	check_negative_sized_VLA_9, .-check_negative_sized_VLA_9
	.type	check_negative_sized_VLA_10_sub, @function
check_negative_sized_VLA_10_sub:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	DWORD PTR -52[rbp], edi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	mov	eax, DWORD PTR -52[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, eax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, eax
	mov	rcx, rdx
	mov	ebx, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ebx, 16
	mov	edx, 0
	div	rbx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L61:
	cmp	rsp, rdx
	je	.L62
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L61
.L62:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L63
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L63:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	check_negative_sized_VLA_10_sub, .-check_negative_sized_VLA_10_sub
	.globl	check_negative_sized_VLA_10
	.type	check_negative_sized_VLA_10, @function
check_negative_sized_VLA_10:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 0
	jns	.L67
	mov	eax, DWORD PTR -4[rbp]
	mov	edi, eax
	call	check_negative_sized_VLA_10_sub
.L67:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	check_negative_sized_VLA_10, .-check_negative_sized_VLA_10
	.type	check_negative_sized_VLA_11_sub, @function
check_negative_sized_VLA_11_sub:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	eax, edi
	mov	WORD PTR -52[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	rsi, rax
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, ax
	sub	rdx, 1
	mov	QWORD PTR -40[rbp], rdx
	movsx	rdx, ax
	mov	r8, rdx
	mov	r9d, 0
	movsx	rdx, ax
	mov	rcx, rdx
	mov	ebx, 0
	movsx	rax, ax
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ebx, 16
	mov	edx, 0
	div	rbx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L69:
	cmp	rsp, rdx
	je	.L70
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L69
.L70:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L71
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L71:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -32[rbp], rax
	mov	rsp, rsi
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	check_negative_sized_VLA_11_sub, .-check_negative_sized_VLA_11_sub
	.globl	check_negative_sized_VLA_11
	.type	check_negative_sized_VLA_11, @function
check_negative_sized_VLA_11:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	cmp	WORD PTR -4[rbp], 0
	jle	.L75
	movsx	eax, WORD PTR -4[rbp]
	mov	edi, eax
	call	check_negative_sized_VLA_11_sub
.L75:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	check_negative_sized_VLA_11, .-check_negative_sized_VLA_11
	.globl	check_VLA_typedef
	.type	check_VLA_typedef, @function
check_VLA_typedef:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	mov	DWORD PTR -28[rbp], -1
	mov	eax, DWORD PTR -28[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -24[rbp], rdx
	cdqe
	mov	rcx, rax
	mov	ebx, 0
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	check_VLA_typedef, .-check_VLA_typedef
	.globl	check_VLA_sizeof
	.type	check_VLA_sizeof, @function
check_VLA_sizeof:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -12[rbp], -1
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	sal	rax, 2
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	check_VLA_sizeof, .-check_VLA_sizeof
	.globl	check_zero_sized_VLA_multi1
	.type	check_zero_sized_VLA_multi1, @function
check_zero_sized_VLA_multi1:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -36[rbp], edi
	mov	rdi, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rdi
	xor	edi, edi
	mov	rcx, rsp
	mov	rdi, rcx
	cmp	DWORD PTR -36[rbp], 0
	je	.L80
	mov	rsp, rdi
	jmp	.L79
.L80:
	mov	ecx, DWORD PTR -36[rbp]
	movsx	rsi, ecx
	sub	rsi, 1
	mov	QWORD PTR -24[rbp], rsi
	movsx	rsi, ecx
	mov	r10, rsi
	mov	r11d, 0
	movsx	rsi, ecx
	mov	rax, rsi
	mov	edx, 0
	imul	r10, rdx, 320
	imul	rsi, rax, 0
	add	rsi, r10
	mov	r10d, 320
	mul	r10
	add	rsi, rdx
	mov	rdx, rsi
	movsx	rdx, ecx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	movsx	rax, ecx
	mov	r8, rax
	mov	r9d, 0
	imul	rdx, r9, 320
	imul	rax, r8, 0
	lea	rsi, [rdx+rax]
	mov	eax, 320
	mul	r8
	add	rsi, rdx
	mov	rdx, rsi
	movsx	rdx, ecx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	mov	rdx, rax
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ecx, 16
	mov	edx, 0
	div	rcx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L82:
	cmp	rsp, rdx
	je	.L83
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L82
.L83:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L84
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L84:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -16[rbp], rax
	mov	rsp, rdi
.L79:
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L85
	call	__stack_chk_fail@PLT
.L85:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	check_zero_sized_VLA_multi1, .-check_zero_sized_VLA_multi1
	.globl	check_zero_sized_VLA_multi2
	.type	check_zero_sized_VLA_multi2, @function
check_zero_sized_VLA_multi2:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 56
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	DWORD PTR -84[rbp], edi
	mov	DWORD PTR -88[rbp], esi
	mov	rdi, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rdi
	xor	edi, edi
	mov	rsi, rsp
	mov	r13, rsi
	cmp	DWORD PTR -84[rbp], 0
	je	.L87
	mov	rsp, r13
	jmp	.L86
.L87:
	mov	esi, DWORD PTR -84[rbp]
	mov	edi, DWORD PTR -88[rbp]
	movsx	r12, esi
	sub	r12, 1
	mov	QWORD PTR -80[rbp], r12
	movsx	r12, esi
	mov	r14, r12
	mov	r15d, 0
	movsx	r12, edi
	sub	r12, 1
	mov	QWORD PTR -72[rbp], r12
	movsx	r12, esi
	mov	r10, r12
	mov	r11d, 0
	movsx	r12, edi
	mov	rax, r12
	mov	edx, 0
	mov	r14, r11
	imul	r14, rax
	mov	r12, rdx
	imul	r12, r10
	add	r12, r14
	mul	r10
	lea	r10, [r12+rdx]
	mov	rdx, r10
	movsx	rax, esi
	mov	r8, rax
	mov	r9d, 0
	movsx	rax, edi
	mov	rcx, rax
	mov	ebx, 0
	mov	rdx, r9
	imul	rdx, rcx
	mov	rax, rbx
	imul	rax, r8
	lea	r10, [rdx+rax]
	mov	rax, r8
	mul	rcx
	lea	rcx, [r10+rdx]
	mov	rdx, rcx
	movsx	rdx, esi
	movsx	rax, edi
	imul	rax, rdx
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ebx, 16
	mov	edx, 0
	div	rbx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L89:
	cmp	rsp, rdx
	je	.L90
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L89
.L90:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L91
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L91:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -64[rbp], rax
	mov	rsp, r13
.L86:
	mov	rax, QWORD PTR -56[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L92
	call	__stack_chk_fail@PLT
.L92:
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	check_zero_sized_VLA_multi2, .-check_zero_sized_VLA_multi2
	.globl	check_VLA_extent
	.type	check_VLA_extent, @function
check_VLA_extent:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 200
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	mov	rax, rsp
	mov	QWORD PTR -216[rbp], rax
	mov	DWORD PTR -124[rbp], 3
	mov	edx, DWORD PTR -124[rbp]
	movsx	rax, edx
	sub	rax, 1
	mov	QWORD PTR -96[rbp], rax
	movsx	rax, edx
	mov	rcx, rax
	mov	ebx, 0
	movsx	rax, edx
	mov	rsi, rax
	mov	edi, 0
	movsx	rax, edx
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ebx, 16
	mov	edx, 0
	div	rbx
	imul	rdx, rax, 16
	mov	rax, rdx
	and	rax, -4096
	mov	rcx, rsp
	sub	rcx, rax
.L94:
	cmp	rsp, rcx
	je	.L95
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L94
.L95:
	mov	rax, rdx
	and	eax, 4095
	sub	rsp, rax
	mov	rax, rdx
	and	eax, 4095
	test	rax, rax
	je	.L96
	mov	rax, rdx
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L96:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -104[rbp], rax
	mov	rax, QWORD PTR -104[rbp]
	mov	rdi, rax
	call	clang_analyzer_getExtent@PLT
	mov	rdx, rax
	mov	eax, DWORD PTR -124[rbp]
	cdqe
	sal	rax, 2
	cmp	rdx, rax
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	clang_analyzer_eval@PLT
	mov	edx, DWORD PTR -124[rbp]
	movsx	rax, edx
	sub	rax, 1
	mov	QWORD PTR -112[rbp], rax
	movsx	rax, edx
	mov	r12, rax
	mov	r13d, 0
	movsx	rax, edx
	mov	r14, rax
	mov	r15d, 0
	movsx	rax, edx
	lea	rdx, 0[0+rax*8]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	esi, 16
	mov	edx, 0
	div	rsi
	imul	rdx, rax, 16
	mov	rax, rdx
	and	rax, -4096
	mov	rcx, rsp
	sub	rcx, rax
.L97:
	cmp	rsp, rcx
	je	.L98
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L97
.L98:
	mov	rax, rdx
	and	eax, 4095
	sub	rsp, rax
	mov	rax, rdx
	and	eax, 4095
	test	rax, rax
	je	.L99
	mov	rax, rdx
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L99:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -120[rbp], rax
	mov	rax, QWORD PTR -120[rbp]
	mov	rdi, rax
	call	clang_analyzer_getExtent@PLT
	mov	rdx, rax
	mov	eax, DWORD PTR -124[rbp]
	add	eax, eax
	cdqe
	sal	rax, 2
	cmp	rdx, rax
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	clang_analyzer_eval@PLT
	mov	edx, DWORD PTR -124[rbp]
	movsx	rax, edx
	sub	rax, 1
	mov	QWORD PTR -88[rbp], rax
	movsx	rax, edx
	mov	QWORD PTR -144[rbp], rax
	mov	QWORD PTR -136[rbp], 0
	movsx	rax, edx
	mov	QWORD PTR -160[rbp], rax
	mov	QWORD PTR -152[rbp], 0
	movsx	rax, edx
	mov	QWORD PTR -176[rbp], rax
	mov	QWORD PTR -168[rbp], 0
	movsx	rax, edx
	lea	rdx, 0[0+rax*8]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	ebx, 16
	mov	edx, 0
	div	rbx
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L100:
	cmp	rsp, rdx
	je	.L101
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L100
.L101:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L102
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L102:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -80[rbp], rax
	mov	rax, QWORD PTR -80[rbp]
	mov	rdi, rax
	call	clang_analyzer_getExtent@PLT
	mov	edx, DWORD PTR -124[rbp]
	add	edx, edx
	movsx	rdx, edx
	sal	rdx, 2
	cmp	rax, rdx
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	clang_analyzer_eval@PLT
	mov	eax, DWORD PTR -124[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -72[rbp], rdx
	movsx	rdx, eax
	mov	QWORD PTR -192[rbp], rdx
	mov	QWORD PTR -184[rbp], 0
	movsx	rdx, eax
	mov	QWORD PTR -208[rbp], rdx
	mov	QWORD PTR -200[rbp], 0
	movsx	rdx, eax
	mov	QWORD PTR -240[rbp], rdx
	mov	QWORD PTR -232[rbp], 0
	cdqe
	sal	rax, 5
	mov	rdx, rax
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	esi, 16
	mov	edx, 0
	div	rsi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L103:
	cmp	rsp, rdx
	je	.L104
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L103
.L104:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L105
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L105:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -64[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	mov	rdi, rax
	call	clang_analyzer_getExtent@PLT
	mov	edx, DWORD PTR -124[rbp]
	sal	edx, 3
	movsx	rdx, edx
	sal	rdx, 2
	cmp	rax, rdx
	sete	al
	movzx	eax, al
	mov	edi, eax
	call	clang_analyzer_eval@PLT
	mov	rsp, QWORD PTR -216[rbp]
	nop
	mov	rax, QWORD PTR -56[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L106
	call	__stack_chk_fail@PLT
.L106:
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	check_VLA_extent, .-check_VLA_extent
	.globl	a
	.bss
	.align 4
	.type	a, @object
	.size	a, 4
a:
	.zero	4
	.text
	.globl	b
	.type	b, @function
b:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 40
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -56[rbp], rax
	xor	eax, eax
	mov	eax, DWORD PTR a[rip]
	add	eax, 1
	mov	DWORD PTR -76[rbp], eax
.L113:
	mov	rax, rsp
	mov	rbx, rax
	mov	eax, DWORD PTR -76[rbp]
	movsx	rdx, eax
	sub	rdx, 1
	mov	QWORD PTR -72[rbp], rdx
	movsx	rdx, eax
	mov	r12, rdx
	mov	r13d, 0
	movsx	rdx, eax
	mov	r14, rdx
	mov	r15d, 0
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	eax, 16
	sub	rax, 1
	add	rax, rdx
	mov	esi, 16
	mov	edx, 0
	div	rsi
	imul	rax, rax, 16
	mov	rcx, rax
	and	rcx, -4096
	mov	rdx, rsp
	sub	rdx, rcx
.L108:
	cmp	rsp, rdx
	je	.L109
	sub	rsp, 4096
	or	QWORD PTR 4088[rsp], 0
	jmp	.L108
.L109:
	mov	rdx, rax
	and	edx, 4095
	sub	rsp, rdx
	mov	rdx, rax
	and	edx, 4095
	test	rdx, rdx
	je	.L110
	and	eax, 4095
	sub	rax, 8
	add	rax, rsp
	or	QWORD PTR [rax], 0
.L110:
	mov	rax, rsp
	add	rax, 3
	shr	rax, 2
	sal	rax, 2
	mov	QWORD PTR -64[rbp], rax
	jmp	.L111
.L112:
	call	foo@PLT
.L111:
	cmp	DWORD PTR -76[rbp], 0
	jg	.L112
	mov	rsp, rbx
	jmp	.L113
	.cfi_endproc
.LFE22:
	.size	b, .-b
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"666096.c"
	.text
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_zero_sized_VLA
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_zero_sized_VLA, %function
check_zero_sized_VLA:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	ldr	r3, .L5
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	beq	.L2
	mov	sp, lr
	b	.L1
.L2:
	ldr	ip, [fp, #-24]
	sub	r3, ip, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
.L1:
	ldr	r3, .L5
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L4
	bl	__stack_chk_fail
.L4:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L6:
	.align	2
.L5:
	.word	.LC0
	.size	check_zero_sized_VLA, .-check_zero_sized_VLA
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_uninit_sized_VLA
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_uninit_sized_VLA, %function
check_uninit_sized_VLA:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L9
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	ldr	ip, [fp, #-20]
	sub	r3, ip, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L9
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L8
	bl	__stack_chk_fail
.L8:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L10:
	.align	2
.L9:
	.word	.LC1
	.size	check_uninit_sized_VLA, .-check_uninit_sized_VLA
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vla_allocate_signed, %function
vla_allocate_signed:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	mov	r3, r0
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, .L13
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	ldrsh	ip, [fp, #-22]
	mov	r3, ip
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L13
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L12
	bl	__stack_chk_fail
.L12:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L14:
	.align	2
.L13:
	.word	.LC2
	.size	vla_allocate_signed, .-vla_allocate_signed
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	vla_allocate_unsigned, %function
vla_allocate_unsigned:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	mov	r3, r0
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, .L17
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	ldrh	ip, [fp, #-22]
	mov	r3, ip
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L17
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L16
	bl	__stack_chk_fail
.L16:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L18:
	.align	2
.L17:
	.word	.LC3
	.size	vla_allocate_unsigned, .-vla_allocate_unsigned
	.align	2
	.global	check_negative_sized_VLA_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_1, %function
check_negative_sized_VLA_1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mvn	r0, #0
	bl	vla_allocate_signed
	nop
	pop	{fp, pc}
	.size	check_negative_sized_VLA_1, .-check_negative_sized_VLA_1
	.align	2
	.global	check_negative_sized_VLA_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_2, %function
check_negative_sized_VLA_2:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L21
	bl	vla_allocate_unsigned
	nop
	pop	{fp, pc}
.L22:
	.align	2
.L21:
	.word	65535
	.size	check_negative_sized_VLA_2, .-check_negative_sized_VLA_2
	.section	.rodata
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_negative_sized_VLA_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_3, %function
check_negative_sized_VLA_3:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L25
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	mvn	r3, #0
	strh	r3, [fp, #-18]	@ movhi
	ldrsh	ip, [fp, #-18]
	mov	r3, ip
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L25
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L24
	bl	__stack_chk_fail
.L24:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L26:
	.align	2
.L25:
	.word	.LC4
	.size	check_negative_sized_VLA_3, .-check_negative_sized_VLA_3
	.section	.rodata
	.align	2
.LC5:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_negative_sized_VLA_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_4, %function
check_negative_sized_VLA_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L29
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	mvn	r3, #0
	strh	r3, [fp, #-18]	@ movhi
	ldrh	ip, [fp, #-18]
	mov	r3, ip
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L29
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L28
	bl	__stack_chk_fail
.L28:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L30:
	.align	2
.L29:
	.word	.LC5
	.size	check_negative_sized_VLA_4, .-check_negative_sized_VLA_4
	.section	.rodata
	.align	2
.LC6:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_negative_sized_VLA_5
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_5, %function
check_negative_sized_VLA_5:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L33
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	mvn	r3, #0
	strb	r3, [fp, #-17]
	ldrsb	ip, [fp, #-17]
	mov	r3, ip
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L33
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L32
	bl	__stack_chk_fail
.L32:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L34:
	.align	2
.L33:
	.word	.LC6
	.size	check_negative_sized_VLA_5, .-check_negative_sized_VLA_5
	.section	.rodata
	.align	2
.LC7:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_negative_sized_VLA_6
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_6, %function
check_negative_sized_VLA_6:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L37
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	mvn	r3, #0
	strb	r3, [fp, #-17]
	ldrb	ip, [fp, #-17]	@ zero_extendqisi2
	mov	r3, ip
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	and	r0, ip, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	and	r0, ip, #255
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L37
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L36
	bl	__stack_chk_fail
.L36:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L38:
	.align	2
.L37:
	.word	.LC7
	.size	check_negative_sized_VLA_6, .-check_negative_sized_VLA_6
	.section	.rodata
	.align	2
.LC8:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_negative_sized_VLA_7
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_7, %function
check_negative_sized_VLA_7:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L41
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	mvn	r3, #0
	strb	r3, [fp, #-17]
	ldrsb	r3, [fp, #-17]
	add	ip, r3, #2
	sub	r3, ip, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L41
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L40
	bl	__stack_chk_fail
.L40:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L42:
	.align	2
.L41:
	.word	.LC8
	.size	check_negative_sized_VLA_7, .-check_negative_sized_VLA_7
	.section	.rodata
	.align	2
.LC9:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_negative_sized_VLA_8
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_8, %function
check_negative_sized_VLA_8:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L45
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	mov	r3, #1
	strb	r3, [fp, #-17]
	ldrsb	r3, [fp, #-17]
	sub	ip, r3, #2
	sub	r3, ip, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L45
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L44
	bl	__stack_chk_fail
.L44:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L46:
	.align	2
.L45:
	.word	.LC9
	.size	check_negative_sized_VLA_8, .-check_negative_sized_VLA_8
	.section	.rodata
	.align	2
.LC10:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_negative_sized_VLA_9
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_9, %function
check_negative_sized_VLA_9:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L49
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	mov	r3, #1
	str	r3, [fp, #-20]
	ldr	ip, [fp, #-20]
	sub	r3, ip, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L49
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L48
	bl	__stack_chk_fail
.L48:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L50:
	.align	2
.L49:
	.word	.LC10
	.size	check_negative_sized_VLA_9, .-check_negative_sized_VLA_9
	.section	.rodata
	.align	2
.LC11:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_10_sub, %function
check_negative_sized_VLA_10_sub:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	ldr	r3, .L53
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	ldr	ip, [fp, #-24]
	sub	r3, ip, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L53
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L52
	bl	__stack_chk_fail
.L52:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L54:
	.align	2
.L53:
	.word	.LC11
	.size	check_negative_sized_VLA_10_sub, .-check_negative_sized_VLA_10_sub
	.align	2
	.global	check_negative_sized_VLA_10
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_10, %function
check_negative_sized_VLA_10:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bge	.L57
	ldr	r0, [fp, #-8]
	bl	check_negative_sized_VLA_10_sub
.L57:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	check_negative_sized_VLA_10, .-check_negative_sized_VLA_10
	.section	.rodata
	.align	2
.LC12:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_11_sub, %function
check_negative_sized_VLA_11_sub:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	mov	r3, r0
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, .L60
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	ldrsh	ip, [fp, #-22]
	mov	r3, ip
	sub	r3, r3, #1
	str	r3, [fp, #-16]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-12]
	mov	sp, lr
	nop
	ldr	r3, .L60
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L59
	bl	__stack_chk_fail
.L59:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L61:
	.align	2
.L60:
	.word	.LC12
	.size	check_negative_sized_VLA_11_sub, .-check_negative_sized_VLA_11_sub
	.align	2
	.global	check_negative_sized_VLA_11
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_negative_sized_VLA_11, %function
check_negative_sized_VLA_11:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrsh	r3, [fp, #-6]
	cmp	r3, #0
	ble	.L64
	ldrsh	r3, [fp, #-6]
	mov	r0, r3
	bl	check_negative_sized_VLA_11_sub
.L64:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	check_negative_sized_VLA_11, .-check_negative_sized_VLA_11
	.align	2
	.global	check_VLA_typedef
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_VLA_typedef, %function
check_VLA_typedef:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mvn	r3, #0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	sub	r2, r3, #1
	str	r2, [fp, #-12]
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	check_VLA_typedef, .-check_VLA_typedef
	.align	2
	.global	check_VLA_sizeof
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_VLA_sizeof, %function
check_VLA_sizeof:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mvn	r3, #0
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	check_VLA_sizeof, .-check_VLA_sizeof
	.section	.rodata
	.align	2
.LC13:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_zero_sized_VLA_multi1
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_zero_sized_VLA_multi1, %function
check_zero_sized_VLA_multi1:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #24
	str	r0, [fp, #-32]
	ldr	r3, .L72
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, sp
	mov	lr, r3
	ldr	r3, [fp, #-32]
	cmp	r3, #0
	beq	.L69
	mov	sp, lr
	b	.L68
.L69:
	ldr	ip, [fp, #-32]
	sub	r3, ip, #1
	str	r3, [fp, #-24]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #2
	orr	r1, r1, r2, lsr #30
	lsl	r0, r2, #2
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #6
	orr	r1, r1, r2, lsr #26
	lsl	r0, r2, #6
	mov	r2, r0
	mov	r3, r1
	mov	r2, ip
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #2
	orr	r1, r1, r2, lsr #30
	lsl	r0, r2, #2
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #6
	orr	r1, r1, r2, lsr #26
	lsl	r0, r2, #6
	mov	r2, r0
	mov	r3, r1
	mov	r2, ip
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-20]
	mov	sp, lr
.L68:
	ldr	r3, .L72
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L71
	bl	__stack_chk_fail
.L71:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L73:
	.align	2
.L72:
	.word	.LC13
	.size	check_zero_sized_VLA_multi1, .-check_zero_sized_VLA_multi1
	.section	.rodata
	.align	2
.LC14:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_zero_sized_VLA_multi2
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_zero_sized_VLA_multi2, %function
check_zero_sized_VLA_multi2:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #24
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	ldr	r3, .L78
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	mov	r3, sp
	mov	r7, r3
	ldr	r3, [fp, #-40]
	cmp	r3, #0
	beq	.L75
	mov	sp, r7
	b	.L74
.L75:
	ldr	ip, [fp, #-40]
	ldr	lr, [fp, #-44]
	sub	r3, ip, #1
	str	r3, [fp, #-36]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	sub	r3, lr, #1
	str	r3, [fp, #-32]
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r3, lr
	mov	r0, r3
	mov	r1, #0
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	r6, r2, r3
	umull	r2, r3, r4, r0
	add	r1, r6, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r3, ip
	mov	r4, r3
	mov	r5, #0
	mov	r3, lr
	mov	r0, r3
	mov	r1, #0
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	r6, r2, r3
	umull	r2, r3, r4, r0
	add	r1, r6, r3
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r3, ip
	mov	r2, lr
	mul	r3, r2, r3
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-28]
	mov	sp, r7
.L74:
	ldr	r3, .L78
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L77
	bl	__stack_chk_fail
.L77:
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L79:
	.align	2
.L78:
	.word	.LC14
	.size	check_zero_sized_VLA_multi2, .-check_zero_sized_VLA_multi2
	.section	.rodata
	.align	2
.LC15:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	check_VLA_extent
	.syntax unified
	.arm
	.fpu softvfp
	.type	check_VLA_extent, %function
check_VLA_extent:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #44
	ldr	r3, .L82
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	mov	r3, sp
	mov	r4, r3
	mov	r3, #3
	str	r3, [fp, #-36]
	ldr	ip, [fp, #-36]
	sub	r3, ip, #1
	str	r3, [fp, #-40]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-44]
	ldr	r0, [fp, #-44]
	bl	clang_analyzer_getExtent
	mov	r2, r0
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	clang_analyzer_eval
	ldr	ip, [fp, #-36]
	sub	r3, ip, #1
	str	r3, [fp, #-48]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #6
	orr	r3, r3, r0, lsr #26
	lsl	r2, r0, #6
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #6
	orr	r3, r3, r0, lsr #26
	lsl	r2, r0, #6
	mov	r3, ip
	lsl	r3, r3, #3
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-52]
	ldr	r0, [fp, #-52]
	bl	clang_analyzer_getExtent
	mov	r2, r0
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	clang_analyzer_eval
	ldr	ip, [fp, #-36]
	sub	r3, ip, #1
	str	r3, [fp, #-32]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #6
	orr	r3, r3, r0, lsr #26
	lsl	r2, r0, #6
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #6
	orr	r3, r3, r0, lsr #26
	lsl	r2, r0, #6
	mov	r3, ip
	lsl	r3, r3, #3
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-28]
	ldr	r0, [fp, #-28]
	bl	clang_analyzer_getExtent
	mov	r2, r0
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #3
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	clang_analyzer_eval
	ldr	ip, [fp, #-36]
	sub	r3, ip, #1
	str	r3, [fp, #-24]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #8
	orr	r3, r3, r0, lsr #24
	lsl	r2, r0, #8
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #8
	orr	r3, r3, r0, lsr #24
	lsl	r2, r0, #8
	mov	r3, ip
	lsl	r3, r3, #5
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-20]
	ldr	r0, [fp, #-20]
	bl	clang_analyzer_getExtent
	mov	r2, r0
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #5
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	clang_analyzer_eval
	mov	sp, r4
	nop
	ldr	r3, .L82
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L81
	bl	__stack_chk_fail
.L81:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L83:
	.align	2
.L82:
	.word	.LC15
	.size	check_VLA_extent, .-check_VLA_extent
	.comm	a,4,4
	.section	.rodata
	.align	2
.LC16:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	b
	.syntax unified
	.arm
	.fpu softvfp
	.type	b, %function
b:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	ldr	r3, .L89
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	ldr	r3, .L89+4
	ldr	r3, [r3]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L87:
	mov	r3, sp
	mov	r4, r3
	ldr	ip, [fp, #-28]
	sub	r3, ip, #1
	str	r3, [fp, #-24]
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r3, ip
	lsl	r3, r3, #2
	add	r3, r3, #7
	lsr	r3, r3, #3
	lsl	r3, r3, #3
	sub	sp, sp, r3
	mov	r3, sp
	add	r3, r3, #3
	lsr	r3, r3, #2
	lsl	r3, r3, #2
	str	r3, [fp, #-20]
	b	.L85
.L86:
	bl	foo
.L85:
	ldr	r3, [fp, #-28]
	cmp	r3, #0
	bgt	.L86
	mov	sp, r4
	b	.L87
.L90:
	.align	2
.L89:
	.word	.LC16
	.word	a
	.size	b, .-b
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
