	.file	"270165.c"
	.intel_syntax noprefix
	.text
	.globl	vdot
	.type	vdot, @function
vdot:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	xmm1, QWORD PTR 16[rbp]
	movsd	xmm0, QWORD PTR 40[rbp]
	mulsd	xmm1, xmm0
	movsd	xmm2, QWORD PTR 24[rbp]
	movsd	xmm0, QWORD PTR 48[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm1, xmm0
	movsd	xmm2, QWORD PTR 32[rbp]
	movsd	xmm0, QWORD PTR 56[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	vdot, .-vdot
	.globl	vcross
	.type	vcross, @function
vcross:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	movsd	xmm1, QWORD PTR 24[rbp]
	movsd	xmm0, QWORD PTR 56[rbp]
	mulsd	xmm0, xmm1
	movsd	xmm2, QWORD PTR 32[rbp]
	movsd	xmm1, QWORD PTR 48[rbp]
	mulsd	xmm1, xmm2
	subsd	xmm0, xmm1
	movsd	QWORD PTR -32[rbp], xmm0
	movsd	xmm1, QWORD PTR 32[rbp]
	movsd	xmm0, QWORD PTR 40[rbp]
	mulsd	xmm0, xmm1
	movsd	xmm2, QWORD PTR 16[rbp]
	movsd	xmm1, QWORD PTR 56[rbp]
	mulsd	xmm1, xmm2
	subsd	xmm0, xmm1
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm1, QWORD PTR 16[rbp]
	movsd	xmm0, QWORD PTR 48[rbp]
	mulsd	xmm0, xmm1
	movsd	xmm2, QWORD PTR 24[rbp]
	movsd	xmm1, QWORD PTR 40[rbp]
	mulsd	xmm1, xmm2
	subsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	mov	rcx, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	mov	QWORD PTR [rcx], rax
	mov	QWORD PTR 8[rcx], rdx
	mov	rax, QWORD PTR -16[rbp]
	mov	QWORD PTR 16[rcx], rax
	mov	rax, QWORD PTR -40[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	vcross, .-vcross
	.globl	vlen
	.type	vlen, @function
vlen:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	xmm1, QWORD PTR 16[rbp]
	movsd	xmm0, QWORD PTR 16[rbp]
	mulsd	xmm1, xmm0
	movsd	xmm2, QWORD PTR 24[rbp]
	movsd	xmm0, QWORD PTR 24[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm1, xmm0
	movsd	xmm2, QWORD PTR 32[rbp]
	movsd	xmm0, QWORD PTR 32[rbp]
	mulsd	xmm0, xmm2
	addsd	xmm1, xmm0
	movq	rax, xmm1
	movq	xmm0, rax
	call	sqrt@PLT
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	vlen, .-vlen
	.globl	vadd
	.type	vadd, @function
vadd:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	movsd	xmm1, QWORD PTR 16[rbp]
	movsd	xmm0, QWORD PTR 40[rbp]
	movapd	xmm2, xmm1
	addsd	xmm2, xmm0
	movsd	xmm1, QWORD PTR 24[rbp]
	movsd	xmm0, QWORD PTR 48[rbp]
	addsd	xmm1, xmm0
	movsd	xmm3, QWORD PTR 32[rbp]
	movsd	xmm0, QWORD PTR 56[rbp]
	addsd	xmm0, xmm3
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR [rax], xmm2
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR 8[rax], xmm1
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR 16[rax], xmm0
	mov	rax, QWORD PTR -40[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	vadd, .-vadd
	.globl	vsub
	.type	vsub, @function
vsub:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	movsd	xmm0, QWORD PTR 16[rbp]
	movsd	xmm1, QWORD PTR 40[rbp]
	movapd	xmm2, xmm0
	subsd	xmm2, xmm1
	movsd	xmm0, QWORD PTR 24[rbp]
	movsd	xmm3, QWORD PTR 48[rbp]
	movapd	xmm1, xmm0
	subsd	xmm1, xmm3
	movsd	xmm0, QWORD PTR 32[rbp]
	movsd	xmm3, QWORD PTR 56[rbp]
	subsd	xmm0, xmm3
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR [rax], xmm2
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR 8[rax], xmm1
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR 16[rax], xmm0
	mov	rax, QWORD PTR -40[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	vsub, .-vsub
	.globl	vscale
	.type	vscale, @function
vscale:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	movsd	QWORD PTR -48[rbp], xmm0
	movsd	xmm0, QWORD PTR 16[rbp]
	movapd	xmm2, xmm0
	mulsd	xmm2, QWORD PTR -48[rbp]
	movsd	xmm0, QWORD PTR 24[rbp]
	movapd	xmm1, xmm0
	mulsd	xmm1, QWORD PTR -48[rbp]
	movsd	xmm0, QWORD PTR 32[rbp]
	mulsd	xmm0, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR [rax], xmm2
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR 8[rax], xmm1
	mov	rax, QWORD PTR -40[rbp]
	movsd	QWORD PTR 16[rax], xmm0
	mov	rax, QWORD PTR -40[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	vscale, .-vscale
	.globl	vneg
	.type	vneg, @function
vneg:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR .LC0[rip]
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	movq	xmm0, rdx
	mov	rdi, rax
	call	vscale
	add	rsp, 24
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	mov	rax, QWORD PTR -24[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	vneg, .-vneg
	.globl	vquo
	.type	vquo, @function
vquo:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	.cfi_offset 3, -24
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	call	vdot
	add	rsp, 48
	movq	rbx, xmm0
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	call	vdot
	add	rsp, 48
	movq	xmm1, rbx
	divsd	xmm1, xmm0
	movq	rax, xmm1
	movq	xmm0, rax
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	vquo, .-vquo
	.globl	vmod
	.type	vmod, @function
vmod:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	call	vquo
	add	rsp, 48
	movq	rax, xmm0
	lea	rdx, -32[rbp]
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	movq	xmm0, rax
	mov	rdi, rdx
	call	vscale
	add	rsp, 24
	mov	rax, QWORD PTR -40[rbp]
	push	QWORD PTR -16[rbp]
	push	QWORD PTR -24[rbp]
	push	QWORD PTR -32[rbp]
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	mov	rdi, rax
	call	vsub
	add	rsp, 48
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	mov	rax, QWORD PTR -40[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	vmod, .-vmod
	.globl	vunit
	.type	vunit, @function
vunit:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	sub	rsp, 8
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	call	vlen
	add	rsp, 32
	movq	rax, xmm0
	mov	QWORD PTR -40[rbp], rax
	movsd	xmm0, QWORD PTR 16[rbp]
	movapd	xmm2, xmm0
	divsd	xmm2, QWORD PTR -40[rbp]
	movsd	xmm0, QWORD PTR 24[rbp]
	movapd	xmm1, xmm0
	divsd	xmm1, QWORD PTR -40[rbp]
	movsd	xmm0, QWORD PTR 32[rbp]
	divsd	xmm0, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -56[rbp]
	movsd	QWORD PTR [rax], xmm2
	mov	rax, QWORD PTR -56[rbp]
	movsd	QWORD PTR 8[rax], xmm1
	mov	rax, QWORD PTR -56[rbp]
	movsd	QWORD PTR 16[rax], xmm0
	mov	rax, QWORD PTR -56[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	vunit, .-vunit
	.globl	varot
	.type	varot, @function
varot:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 280
	.cfi_offset 3, -24
	mov	QWORD PTR -280[rbp], rdi
	movsd	QWORD PTR -288[rbp], xmm0
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	call	vquo
	add	rsp, 48
	movq	rax, xmm0
	lea	rdx, -272[rbp]
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	movq	xmm0, rax
	mov	rdi, rdx
	call	vscale
	add	rsp, 24
	mov	rax, QWORD PTR -288[rbp]
	movq	xmm0, rax
	call	cos@PLT
	movq	rbx, xmm0
	lea	rax, -176[rbp]
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	lea	rax, -240[rbp]
	sub	rsp, 8
	push	QWORD PTR -160[rbp]
	push	QWORD PTR -168[rbp]
	push	QWORD PTR -176[rbp]
	movq	xmm0, rbx
	mov	rdi, rax
	call	vscale
	add	rsp, 32
	mov	rax, QWORD PTR -288[rbp]
	movq	xmm0, rax
	call	sin@PLT
	movq	rbx, xmm0
	lea	rax, -144[rbp]
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	push	QWORD PTR 32[rbp]
	push	QWORD PTR 24[rbp]
	push	QWORD PTR 16[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	lea	rax, -112[rbp]
	sub	rsp, 8
	push	QWORD PTR -128[rbp]
	push	QWORD PTR -136[rbp]
	push	QWORD PTR -144[rbp]
	movq	xmm0, rbx
	mov	rdi, rax
	call	vscale
	add	rsp, 32
	lea	rax, -80[rbp]
	sub	rsp, 8
	push	QWORD PTR 56[rbp]
	push	QWORD PTR 48[rbp]
	push	QWORD PTR 40[rbp]
	mov	rdi, rax
	call	vunit
	add	rsp, 32
	lea	rax, -208[rbp]
	push	QWORD PTR -96[rbp]
	push	QWORD PTR -104[rbp]
	push	QWORD PTR -112[rbp]
	push	QWORD PTR -64[rbp]
	push	QWORD PTR -72[rbp]
	push	QWORD PTR -80[rbp]
	mov	rdi, rax
	call	vcross
	add	rsp, 48
	lea	rax, -48[rbp]
	push	QWORD PTR -192[rbp]
	push	QWORD PTR -200[rbp]
	push	QWORD PTR -208[rbp]
	push	QWORD PTR -224[rbp]
	push	QWORD PTR -232[rbp]
	push	QWORD PTR -240[rbp]
	mov	rdi, rax
	call	vadd
	add	rsp, 48
	mov	rax, QWORD PTR -280[rbp]
	push	QWORD PTR -32[rbp]
	push	QWORD PTR -40[rbp]
	push	QWORD PTR -48[rbp]
	push	QWORD PTR -256[rbp]
	push	QWORD PTR -264[rbp]
	push	QWORD PTR -272[rbp]
	mov	rdi, rax
	call	vadd
	add	rsp, 48
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	mov	rax, QWORD PTR -280[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	varot, .-varot
	.section	.rodata
.LC1:
	.string	"{%.2lf, %.2lf, %.2lf}"
	.text
	.globl	vstr
	.type	vstr, @function
vstr:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	rax, QWORD PTR bp.1[rip]
	and	eax, 7
	mov	QWORD PTR bp.1[rip], rax
	movsd	xmm1, QWORD PTR 32[rbp]
	movsd	xmm0, QWORD PTR 24[rbp]
	mov	rdx, QWORD PTR 16[rbp]
	mov	rcx, QWORD PTR bp.1[rip]
	mov	rax, rcx
	sal	rax, 2
	add	rax, rcx
	sal	rax, 4
	lea	rcx, buf.0[rip]
	add	rax, rcx
	movapd	xmm2, xmm1
	movapd	xmm1, xmm0
	movq	xmm0, rdx
	lea	rdx, .LC1[rip]
	mov	esi, 80
	mov	rdi, rax
	mov	eax, 3
	call	snprintf@PLT
	mov	rdx, QWORD PTR bp.1[rip]
	lea	rax, 1[rdx]
	mov	QWORD PTR bp.1[rip], rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, buf.0[rip]
	add	rax, rdx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	vstr, .-vstr
	.globl	vrand
	.type	vrand, @function
vrand:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 48
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	QWORD PTR -56[rbp], rdi
	call	drand48@PLT
	movq	r12, xmm0
	call	drand48@PLT
	movq	rbx, xmm0
	call	drand48@PLT
	movq	rax, xmm0
	mov	rdx, QWORD PTR -56[rbp]
	mov	QWORD PTR [rdx], r12
	mov	rdx, QWORD PTR -56[rbp]
	mov	QWORD PTR 8[rdx], rbx
	mov	rdx, QWORD PTR -56[rbp]
	mov	QWORD PTR 16[rdx], rax
	mov	rax, QWORD PTR -56[rbp]
	add	rsp, 48
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	vrand, .-vrand
	.section	.rodata
.LC2:
	.string	"%lf %lf\n"
.LC3:
	.string	"%s %s\n"
.LC4:
	.string	"%lf\n"
	.text
	.globl	identities
	.type	identities, @function
identities:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 520
	.cfi_offset 3, -24
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	lea	rax, -464[rbp]
	mov	rdi, rax
	call	vrand
	lea	rax, -432[rbp]
	mov	rdi, rax
	call	vrand
	lea	rax, -400[rbp]
	mov	rdi, rax
	call	vrand
	lea	rax, -272[rbp]
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	mov	rdi, rax
	call	vadd
	add	rsp, 48
	push	QWORD PTR -384[rbp]
	push	QWORD PTR -392[rbp]
	push	QWORD PTR -400[rbp]
	push	QWORD PTR -256[rbp]
	push	QWORD PTR -264[rbp]
	push	QWORD PTR -272[rbp]
	call	vquo
	add	rsp, 48
	movq	rax, xmm0
	mov	QWORD PTR -480[rbp], rax
	push	QWORD PTR -384[rbp]
	push	QWORD PTR -392[rbp]
	push	QWORD PTR -400[rbp]
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	call	vquo
	add	rsp, 48
	movsd	QWORD PTR -520[rbp], xmm0
	push	QWORD PTR -384[rbp]
	push	QWORD PTR -392[rbp]
	push	QWORD PTR -400[rbp]
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	call	vquo
	add	rsp, 48
	addsd	xmm0, QWORD PTR -520[rbp]
	movsd	QWORD PTR -472[rbp], xmm0
	movsd	xmm0, QWORD PTR -472[rbp]
	mov	rax, QWORD PTR -480[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	lea	rdi, .LC2[rip]
	mov	eax, 2
	call	printf@PLT
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -448[rbp], rax
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -432[rbp], rax
	mov	QWORD PTR -424[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -416[rbp], rax
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -400[rbp], rax
	mov	QWORD PTR -392[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -384[rbp], rax
	lea	rax, -240[rbp]
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	mov	rdi, rax
	call	vadd
	add	rsp, 48
	lea	rax, -368[rbp]
	push	QWORD PTR -384[rbp]
	push	QWORD PTR -392[rbp]
	push	QWORD PTR -400[rbp]
	push	QWORD PTR -224[rbp]
	push	QWORD PTR -232[rbp]
	push	QWORD PTR -240[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	lea	rax, -208[rbp]
	push	QWORD PTR -384[rbp]
	push	QWORD PTR -392[rbp]
	push	QWORD PTR -400[rbp]
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	lea	rax, -176[rbp]
	push	QWORD PTR -384[rbp]
	push	QWORD PTR -392[rbp]
	push	QWORD PTR -400[rbp]
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	lea	rax, -336[rbp]
	push	QWORD PTR -192[rbp]
	push	QWORD PTR -200[rbp]
	push	QWORD PTR -208[rbp]
	push	QWORD PTR -160[rbp]
	push	QWORD PTR -168[rbp]
	push	QWORD PTR -176[rbp]
	mov	rdi, rax
	call	vadd
	add	rsp, 48
	sub	rsp, 8
	push	QWORD PTR -320[rbp]
	push	QWORD PTR -328[rbp]
	push	QWORD PTR -336[rbp]
	call	vstr
	add	rsp, 32
	mov	rbx, rax
	sub	rsp, 8
	push	QWORD PTR -352[rbp]
	push	QWORD PTR -360[rbp]
	push	QWORD PTR -368[rbp]
	call	vstr
	add	rsp, 32
	mov	rdx, rbx
	mov	rsi, rax
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -448[rbp], rax
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -432[rbp], rax
	mov	QWORD PTR -424[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -416[rbp], rax
	lea	rax, -144[rbp]
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	push	QWORD PTR -128[rbp]
	push	QWORD PTR -136[rbp]
	push	QWORD PTR -144[rbp]
	call	vdot
	add	rsp, 48
	movq	rax, xmm0
	mov	QWORD PTR -480[rbp], rax
	mov	rax, QWORD PTR -480[rbp]
	movq	xmm0, rax
	lea	rdi, .LC4[rip]
	mov	eax, 1
	call	printf@PLT
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -448[rbp], rax
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	call	vquo
	add	rsp, 48
	movq	rax, xmm0
	movq	xmm0, rax
	lea	rdi, .LC4[rip]
	mov	eax, 1
	call	printf@PLT
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -464[rbp], rax
	mov	QWORD PTR -456[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -448[rbp], rax
	lea	rax, -512[rbp]
	mov	rdi, rax
	call	vrand
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -432[rbp], rax
	mov	QWORD PTR -424[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -416[rbp], rax
	lea	rax, -112[rbp]
	sub	rsp, 8
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	mov	rdi, rax
	call	vneg
	add	rsp, 32
	lea	rax, -512[rbp]
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	push	QWORD PTR -96[rbp]
	push	QWORD PTR -104[rbp]
	push	QWORD PTR -112[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -368[rbp], rax
	mov	QWORD PTR -360[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -352[rbp], rax
	lea	rax, -80[rbp]
	sub	rsp, 8
	push	QWORD PTR -416[rbp]
	push	QWORD PTR -424[rbp]
	push	QWORD PTR -432[rbp]
	mov	rdi, rax
	call	vneg
	add	rsp, 32
	lea	rax, -48[rbp]
	push	QWORD PTR -64[rbp]
	push	QWORD PTR -72[rbp]
	push	QWORD PTR -80[rbp]
	push	QWORD PTR -448[rbp]
	push	QWORD PTR -456[rbp]
	push	QWORD PTR -464[rbp]
	mov	rdi, rax
	call	vmod
	add	rsp, 48
	lea	rax, -512[rbp]
	sub	rsp, 8
	push	QWORD PTR -32[rbp]
	push	QWORD PTR -40[rbp]
	push	QWORD PTR -48[rbp]
	mov	rdi, rax
	call	vneg
	add	rsp, 32
	mov	rax, QWORD PTR -512[rbp]
	mov	rdx, QWORD PTR -504[rbp]
	mov	QWORD PTR -336[rbp], rax
	mov	QWORD PTR -328[rbp], rdx
	mov	rax, QWORD PTR -496[rbp]
	mov	QWORD PTR -320[rbp], rax
	sub	rsp, 8
	push	QWORD PTR -320[rbp]
	push	QWORD PTR -328[rbp]
	push	QWORD PTR -336[rbp]
	call	vstr
	add	rsp, 32
	mov	rbx, rax
	sub	rsp, 8
	push	QWORD PTR -352[rbp]
	push	QWORD PTR -360[rbp]
	push	QWORD PTR -368[rbp]
	call	vstr
	add	rsp, 32
	mov	rdx, rbx
	mov	rsi, rax
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	printf@PLT
	movsd	xmm0, QWORD PTR .LC5[rip]
	movsd	QWORD PTR -368[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -360[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -352[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -336[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC5[rip]
	movsd	QWORD PTR -328[rbp], xmm0
	pxor	xmm0, xmm0
	movsd	QWORD PTR -320[rbp], xmm0
	lea	rax, -304[rbp]
	mov	rdx, QWORD PTR .LC7[rip]
	push	QWORD PTR -320[rbp]
	push	QWORD PTR -328[rbp]
	push	QWORD PTR -336[rbp]
	push	QWORD PTR -352[rbp]
	push	QWORD PTR -360[rbp]
	push	QWORD PTR -368[rbp]
	movq	xmm0, rdx
	mov	rdi, rax
	call	varot
	add	rsp, 48
	sub	rsp, 8
	push	QWORD PTR -288[rbp]
	push	QWORD PTR -296[rbp]
	push	QWORD PTR -304[rbp]
	call	vstr
	add	rsp, 32
	mov	rdi, rax
	call	puts@PLT
	nop
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	identities, .-identities
	.globl	main
	.type	main, @function
main:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 0
	call	time@PLT
	mov	rdi, rax
	call	srand48@PLT
	call	identities
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	main, .-main
	.local	bp.1
	.comm	bp.1,8,8
	.local	buf.0
	.comm	buf.0,640,32
	.section	.rodata
	.align 8
.LC0:
	.long	0
	.long	-1074790400
	.align 8
.LC5:
	.long	0
	.long	1072693248
	.align 8
.LC7:
	.long	1413754136
	.long	1073291771
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"270165.c"
	.text
	.global	__aeabi_dmul
	.global	__aeabi_dadd
	.align	2
	.global	vdot
	.syntax unified
	.arm
	.fpu softvfp
	.type	vdot, %function
vdot:
	@ args = 48, pretend = 16, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #16
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	add	ip, fp, #4
	stm	ip, {r0, r1, r2, r3}
	ldmib	fp, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, lr}
	add	sp, sp, #16
	bx	lr
	.size	vdot, .-vdot
	.global	__aeabi_dsub
	.align	2
	.global	vcross
	.syntax unified
	.arm
	.fpu softvfp
	.type	vcross, %function
vcross:
	@ args = 48, pretend = 8, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #32
	str	r0, [fp, #-40]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	add	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	ldmib	fp, {r0-r1}
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldmib	fp, {r0-r1}
	add	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-40]
	mov	lr, r3
	sub	ip, fp, #36
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	ldr	r0, [fp, #-40]
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, lr}
	add	sp, sp, #8
	bx	lr
	.size	vcross, .-vcross
	.align	2
	.global	vlen
	.syntax unified
	.arm
	.fpu softvfp
	.type	vlen, %function
vlen:
	@ args = 24, pretend = 16, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #16
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	add	ip, fp, #4
	stm	ip, {r0, r1, r2, r3}
	ldmib	fp, {r0-r1}
	ldmib	fp, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r3, fp, #12
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	add	r3, fp, #20
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	sqrt
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, lr}
	add	sp, sp, #16
	bx	lr
	.size	vlen, .-vlen
	.align	2
	.global	vadd
	.syntax unified
	.arm
	.fpu softvfp
	.type	vadd, %function
vadd:
	@ args = 48, pretend = 8, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #32
	str	r0, [fp, #-48]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	ldmib	fp, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-48]
	stm	r1, {r6-r7}
	ldr	r1, [fp, #-48]
	str	r4, [r1, #8]
	str	r5, [r1, #12]
	ldr	r1, [fp, #-48]
	str	r2, [r1, #16]
	str	r3, [r1, #20]
	ldr	r0, [fp, #-48]
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, lr}
	add	sp, sp, #8
	bx	lr
	.size	vadd, .-vadd
	.align	2
	.global	vsub
	.syntax unified
	.arm
	.fpu softvfp
	.type	vsub, %function
vsub:
	@ args = 48, pretend = 8, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #32
	str	r0, [fp, #-48]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	ldmib	fp, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r3, fp, #36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	add	r3, fp, #44
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-48]
	stm	r1, {r6-r7}
	ldr	r1, [fp, #-48]
	str	r4, [r1, #8]
	str	r5, [r1, #12]
	ldr	r1, [fp, #-48]
	str	r2, [r1, #16]
	str	r3, [r1, #20]
	ldr	r0, [fp, #-48]
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, lr}
	add	sp, sp, #8
	bx	lr
	.size	vsub, .-vsub
	.align	2
	.global	vscale
	.syntax unified
	.arm
	.fpu softvfp
	.type	vscale, %function
vscale:
	@ args = 32, pretend = 8, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #32
	str	r0, [fp, #-48]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	ldmib	fp, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	add	r3, fp, #28
	ldmia	r3, {r2-r3}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-48]
	stm	r1, {r6-r7}
	ldr	r1, [fp, #-48]
	str	r4, [r1, #8]
	str	r5, [r1, #12]
	ldr	r1, [fp, #-48]
	str	r2, [r1, #16]
	str	r3, [r1, #20]
	ldr	r0, [fp, #-48]
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, lr}
	add	sp, sp, #8
	bx	lr
	.size	vscale, .-vscale
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	vneg
	.syntax unified
	.arm
	.fpu softvfp
	.type	vneg, %function
vneg:
	@ args = 24, pretend = 8, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-16]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	ldr	r3, .L16
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	lr, [fp, #-16]
	mov	r2, #0
	ldr	r3, .L16+4
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	ip, sp
	add	r3, fp, #12
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	add	r3, fp, #4
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vscale
	ldr	r3, .L16
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L15
	bl	__stack_chk_fail
.L15:
	ldr	r0, [fp, #-16]
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #8
	bx	lr
.L17:
	.align	2
.L16:
	.word	.LC0
	.word	-1074790400
	.size	vneg, .-vneg
	.global	__aeabi_ddiv
	.align	2
	.global	vquo
	.syntax unified
	.arm
	.fpu softvfp
	.type	vquo, %function
vquo:
	@ args = 48, pretend = 16, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #16
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #32
	add	ip, fp, #4
	stm	ip, {r0, r1, r2, r3}
	add	lr, sp, #8
	add	ip, fp, #28
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	add	r3, fp, #20
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	add	r3, fp, #4
	ldm	r3, {r0, r1, r2, r3}
	bl	vdot
	mov	r4, r0
	mov	r5, r1
	add	lr, sp, #8
	add	ip, fp, #28
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	add	r3, fp, #44
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	add	r3, fp, #28
	ldm	r3, {r0, r1, r2, r3}
	bl	vdot
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, lr}
	add	sp, sp, #16
	bx	lr
	.size	vquo, .-vquo
	.section	.rodata
	.align	2
.LC1:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	vmod
	.syntax unified
	.arm
	.fpu softvfp
	.type	vmod, %function
vmod:
	@ args = 48, pretend = 8, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #84
	str	r0, [fp, #-48]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	ldr	r3, .L23
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	add	lr, sp, #8
	add	ip, fp, #28
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	add	r3, fp, #20
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	add	r3, fp, #4
	ldm	r3, {r0, r1, r2, r3}
	bl	vquo
	mov	r2, r0
	mov	r3, r1
	sub	lr, fp, #44
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	ip, sp
	add	r3, fp, #36
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	add	r3, fp, #28
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vscale
	ldr	r4, [fp, #-48]
	add	lr, sp, #16
	sub	ip, fp, #44
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	add	r3, fp, #12
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	add	r3, fp, #4
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vsub
	ldr	r3, .L23
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L22
	bl	__stack_chk_fail
.L22:
	ldr	r0, [fp, #-48]
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, lr}
	add	sp, sp, #8
	bx	lr
.L24:
	.align	2
.L23:
	.word	.LC1
	.size	vmod, .-vmod
	.align	2
	.global	vunit
	.syntax unified
	.arm
	.fpu softvfp
	.type	vunit, %function
vunit:
	@ args = 24, pretend = 8, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #48
	str	r0, [fp, #-56]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	mov	r2, sp
	add	r3, fp, #20
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	add	r3, fp, #4
	ldm	r3, {r0, r1, r2, r3}
	bl	vlen
	str	r0, [fp, #-52]
	str	r1, [fp, #-48]
	ldmib	fp, {r0-r1}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r6, r2
	mov	r7, r3
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	add	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-56]
	stm	r1, {r6-r7}
	ldr	r1, [fp, #-56]
	str	r4, [r1, #8]
	str	r5, [r1, #12]
	ldr	r1, [fp, #-56]
	str	r2, [r1, #16]
	str	r3, [r1, #20]
	ldr	r0, [fp, #-56]
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, lr}
	add	sp, sp, #8
	bx	lr
	.size	vunit, .-vunit
	.section	.rodata
	.align	2
.LC2:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	varot
	.syntax unified
	.arm
	.fpu softvfp
	.type	varot, %function
varot:
	@ args = 56, pretend = 8, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #8
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #252
	str	r0, [fp, #-216]
	add	r1, fp, #4
	stm	r1, {r2, r3}
	ldr	r3, .L30
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	add	lr, sp, #8
	add	ip, fp, #28
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	add	r3, fp, #20
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	add	r3, fp, #4
	ldm	r3, {r0, r1, r2, r3}
	bl	vquo
	mov	r2, r0
	mov	r3, r1
	sub	lr, fp, #212
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	ip, sp
	add	r3, fp, #36
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	add	r3, fp, #28
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vscale
	sub	r4, fp, #140
	add	lr, sp, #16
	add	ip, fp, #28
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	add	r3, fp, #12
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	add	r3, fp, #4
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	add	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	cos
	mov	r2, r0
	mov	r3, r1
	sub	lr, fp, #188
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	ip, sp
	sub	r3, fp, #132
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #140
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vscale
	sub	lr, fp, #116
	mov	ip, sp
	add	r3, fp, #36
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	add	r3, fp, #28
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vunit
	sub	r4, fp, #92
	add	lr, sp, #16
	add	ip, fp, #28
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	add	r3, fp, #12
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	add	r3, fp, #4
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	add	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	sin
	mov	r2, r0
	mov	r3, r1
	sub	lr, fp, #68
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	mov	ip, sp
	sub	r3, fp, #84
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #92
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vscale
	sub	r4, fp, #164
	add	lr, sp, #16
	sub	ip, fp, #68
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #108
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #116
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vcross
	sub	r4, fp, #44
	add	lr, sp, #16
	sub	ip, fp, #164
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #180
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #188
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vadd
	ldr	r4, [fp, #-216]
	add	lr, sp, #16
	sub	ip, fp, #44
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #204
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #212
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vadd
	ldr	r3, .L30
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L29
	bl	__stack_chk_fail
.L29:
	ldr	r0, [fp, #-216]
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, lr}
	add	sp, sp, #8
	bx	lr
.L31:
	.align	2
.L30:
	.word	.LC2
	.size	varot, .-varot
	.section	.rodata
	.align	2
.LC3:
	.ascii	"{%.2lf, %.2lf, %.2lf}\000"
	.text
	.align	2
	.global	vstr
	.syntax unified
	.arm
	.fpu softvfp
	.type	vstr, %function
vstr:
	@ args = 24, pretend = 16, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	sub	sp, sp, #16
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #24
	add	ip, fp, #4
	stm	ip, {r0, r1, r2, r3}
	ldr	r3, .L34
	ldr	r3, [r3]
	and	r3, r3, #7
	ldr	r2, .L34
	str	r3, [r2]
	ldr	r3, .L34
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #4
	ldr	r2, .L34+4
	add	ip, r3, r2
	ldmib	fp, {r2-r3}
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	add	r5, fp, #20
	ldmia	r5, {r4-r5}
	str	r4, [sp, #16]
	str	r5, [sp, #20]
	str	r0, [sp, #8]
	str	r1, [sp, #12]
	stm	sp, {r2-r3}
	ldr	r2, .L34+8
	mov	r1, #80
	mov	r0, ip
	bl	snprintf
	ldr	r3, .L34
	ldr	r2, [r3]
	add	r3, r2, #1
	ldr	r1, .L34
	str	r3, [r1]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #4
	ldr	r2, .L34+4
	add	r3, r3, r2
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, lr}
	add	sp, sp, #16
	bx	lr
.L35:
	.align	2
.L34:
	.word	bp.8321
	.word	buf.8320
	.word	.LC3
	.size	vstr, .-vstr
	.align	2
	.global	vrand
	.syntax unified
	.arm
	.fpu softvfp
	.type	vrand, %function
vrand:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #32
	str	r0, [fp, #-48]
	bl	drand48
	mov	r6, r0
	mov	r7, r1
	bl	drand48
	mov	r4, r0
	mov	r5, r1
	bl	drand48
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-48]
	stm	r1, {r6-r7}
	ldr	r1, [fp, #-48]
	str	r4, [r1, #8]
	str	r5, [r1, #12]
	ldr	r1, [fp, #-48]
	str	r2, [r1, #16]
	str	r3, [r1, #20]
	ldr	r0, [fp, #-48]
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
	.size	vrand, .-vrand
	.section	.rodata
	.align	2
.LC4:
	.ascii	"%lf %lf\012\000"
	.align	2
.LC5:
	.ascii	"%s %s\012\000"
	.align	2
.LC6:
	.ascii	"%lf\012\000"
	.align	2
.LC7:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	identities
	.syntax unified
	.arm
	.fpu softvfp
	.type	identities, %function
identities:
	@ args = 0, pretend = 0, frame = 384
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #432
	ldr	r3, .L40
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	sub	r3, fp, #356
	mov	r0, r3
	bl	vrand
	sub	r3, fp, #332
	mov	r0, r3
	bl	vrand
	sub	r3, fp, #308
	mov	r0, r3
	bl	vrand
	sub	r4, fp, #212
	add	lr, sp, #16
	sub	ip, fp, #332
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #348
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #356
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vadd
	add	lr, sp, #8
	sub	ip, fp, #308
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	sub	r3, fp, #196
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #212
	ldm	r3, {r0, r1, r2, r3}
	bl	vquo
	str	r0, [fp, #-372]
	str	r1, [fp, #-368]
	add	lr, sp, #8
	sub	ip, fp, #308
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	sub	r3, fp, #340
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #356
	ldm	r3, {r0, r1, r2, r3}
	bl	vquo
	mov	r4, r0
	mov	r5, r1
	add	lr, sp, #8
	sub	ip, fp, #308
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	sub	r3, fp, #316
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #332
	ldm	r3, {r0, r1, r2, r3}
	bl	vquo
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-364]
	str	r3, [fp, #-360]
	sub	r3, fp, #364
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	sub	r3, fp, #372
	ldmia	r3, {r2-r3}
	ldr	r0, .L40+4
	bl	printf
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #356
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #332
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #308
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	r4, fp, #188
	add	lr, sp, #16
	sub	ip, fp, #332
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #348
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #356
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vadd
	sub	r4, fp, #284
	add	lr, sp, #16
	sub	ip, fp, #308
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #180
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #188
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	sub	r4, fp, #164
	add	lr, sp, #16
	sub	ip, fp, #308
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #348
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #356
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	sub	r4, fp, #140
	add	lr, sp, #16
	sub	ip, fp, #308
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #324
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #332
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	sub	r4, fp, #260
	add	lr, sp, #16
	sub	ip, fp, #140
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #156
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #164
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vadd
	mov	r2, sp
	sub	r3, fp, #268
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #284
	ldm	r3, {r0, r1, r2, r3}
	bl	vstr
	mov	r4, r0
	mov	r2, sp
	sub	r3, fp, #244
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #260
	ldm	r3, {r0, r1, r2, r3}
	bl	vstr
	mov	r3, r0
	mov	r2, r3
	mov	r1, r4
	ldr	r0, .L40+8
	bl	printf
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #356
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #332
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	r4, fp, #116
	add	lr, sp, #16
	sub	ip, fp, #332
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #348
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #356
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	add	lr, sp, #8
	sub	ip, fp, #332
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	sub	r3, fp, #100
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #116
	ldm	r3, {r0, r1, r2, r3}
	bl	vdot
	str	r0, [fp, #-372]
	str	r1, [fp, #-368]
	sub	r3, fp, #372
	ldmia	r3, {r2-r3}
	ldr	r0, .L40+12
	bl	printf
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #356
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	add	lr, sp, #8
	sub	ip, fp, #356
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	r2, sp
	sub	r3, fp, #340
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #356
	ldm	r3, {r0, r1, r2, r3}
	bl	vquo
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L40+12
	bl	printf
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #356
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	r3, fp, #396
	mov	r0, r3
	bl	vrand
	sub	ip, fp, #332
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	lr, fp, #92
	mov	ip, sp
	sub	r3, fp, #348
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #356
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vneg
	sub	r4, fp, #396
	add	lr, sp, #16
	sub	ip, fp, #332
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #84
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #92
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	sub	ip, fp, #284
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	sub	lr, fp, #68
	mov	ip, sp
	sub	r3, fp, #324
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #332
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vneg
	sub	r4, fp, #44
	add	lr, sp, #16
	sub	ip, fp, #68
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #348
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #356
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	vmod
	sub	lr, fp, #396
	mov	ip, sp
	sub	r3, fp, #36
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #44
	ldm	r3, {r2, r3}
	mov	r0, lr
	bl	vneg
	sub	ip, fp, #260
	sub	lr, fp, #396
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1}
	stm	ip, {r0, r1}
	mov	r2, sp
	sub	r3, fp, #268
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #284
	ldm	r3, {r0, r1, r2, r3}
	bl	vstr
	mov	r4, r0
	mov	r2, sp
	sub	r3, fp, #244
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #260
	ldm	r3, {r0, r1, r2, r3}
	bl	vstr
	mov	r3, r0
	mov	r2, r3
	mov	r1, r4
	ldr	r0, .L40+8
	bl	printf
	mov	r2, #0
	ldr	r3, .L40+16
	str	r2, [fp, #-284]
	str	r3, [fp, #-280]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-276]
	str	r3, [fp, #-272]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-268]
	str	r3, [fp, #-264]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-260]
	str	r3, [fp, #-256]
	mov	r2, #0
	ldr	r3, .L40+16
	str	r2, [fp, #-252]
	str	r3, [fp, #-248]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-244]
	str	r3, [fp, #-240]
	sub	r4, fp, #236
	ldr	r2, .L40+20
	ldr	r3, .L40+24
	str	r2, [sp, #40]
	str	r3, [sp, #44]
	add	lr, sp, #16
	sub	ip, fp, #260
	ldmia	ip!, {r0, r1, r2, r3}
	stmia	lr!, {r0, r1, r2, r3}
	ldm	ip, {r0, r1}
	stm	lr, {r0, r1}
	mov	ip, sp
	sub	r3, fp, #276
	ldm	r3, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	sub	r3, fp, #284
	ldm	r3, {r2, r3}
	mov	r0, r4
	bl	varot
	mov	r2, sp
	sub	r3, fp, #220
	ldm	r3, {r0, r1}
	stm	r2, {r0, r1}
	sub	r3, fp, #236
	ldm	r3, {r0, r1, r2, r3}
	bl	vstr
	mov	r3, r0
	mov	r0, r3
	bl	puts
	nop
	ldr	r3, .L40
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L39
	bl	__stack_chk_fail
.L39:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L41:
	.align	2
.L40:
	.word	.LC7
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	1072693248
	.word	1413754136
	.word	1073291771
	.size	identities, .-identities
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #0
	bl	time
	mov	r3, r0
	mov	r0, r3
	bl	srand48
	bl	identities
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
	.size	main, .-main
	.local	bp.8321
	.comm	bp.8321,4,4
	.local	buf.8320
	.comm	buf.8320,640,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
