	.file	"929556.c"
	.intel_syntax noprefix
	.text
	.globl	buffer
	.bss
	.align 32
	.type	buffer, @object
	.size	buffer, 256
buffer:
	.zero	256
	.text
	.globl	int_range
	.type	int_range, @function
int_range:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	call	int_value@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jl	.L2
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	jge	.L3
.L2:
	mov	eax, DWORD PTR -20[rbp]
	jmp	.L5
.L3:
	mov	eax, DWORD PTR -4[rbp]
.L5:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	int_range, .-int_range
	.globl	uint_range
	.type	uint_range, @function
uint_range:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	call	uint_value@PLT
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jb	.L7
	mov	eax, DWORD PTR -24[rbp]
	cmp	eax, DWORD PTR -4[rbp]
	jnb	.L8
.L7:
	mov	eax, DWORD PTR -20[rbp]
	jmp	.L10
.L8:
	mov	eax, DWORD PTR -4[rbp]
.L10:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	uint_range, .-uint_range
	.section	.rodata
.LC0:
	.string	"%#hho"
.LC1:
	.string	"%#1hho"
.LC2:
	.string	"%#2hho"
.LC3:
	.string	"%#3hho"
.LC4:
	.string	"%#4hho"
.LC5:
	.string	"%#ho"
.LC6:
	.string	"%#.*ho"
.LC7:
	.string	"%#o"
.LC8:
	.string	"%#hhx"
.LC9:
	.string	"%#.*hhx"
.LC10:
	.string	"%#hx"
.LC11:
	.string	"%#x"
	.text
	.globl	test_min_overflow
	.type	test_min_overflow, @function
test_min_overflow:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC0[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC1[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC2[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC3[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC4[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC5[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC6[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC6[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 3
	mov	edi, 2
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC6[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 4
	mov	edi, 3
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC6[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 8
	mov	edi, 7
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC6[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC7[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC8[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC9[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC9[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 3
	mov	edi, 2
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC9[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 4
	mov	edi, 3
	call	int_range
	mov	edx, eax
	lea	rdi, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	ecx, eax
	lea	rsi, .LC9[rip]
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC10[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+256]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC11[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+256]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	test_min_overflow, .-test_min_overflow
	.section	.rodata
.LC12:
	.string	"%#1hhx"
.LC13:
	.string	"%#2hhx"
.LC14:
	.string	"%#3hhx"
.LC15:
	.string	"%#4hhx"
	.text
	.globl	test_likely_overflow
	.type	test_likely_overflow, @function
test_likely_overflow:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC0[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC1[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC2[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC3[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC4[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC3[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC4[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC5[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC7[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC8[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC12[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC13[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC14[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC15[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC12[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC13[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC12[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC13[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC12[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC13[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC12[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC13[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC12[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC13[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC10[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+254]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC11[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+254]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	test_likely_overflow, .-test_likely_overflow
	.globl	test_likely_nul_overflow
	.type	test_likely_nul_overflow, @function
test_likely_nul_overflow:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC0[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC0[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC5[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC5[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC7[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC7[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC8[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC8[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC10[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC10[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	lea	rcx, buffer[rip+253]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, eax
	lea	rsi, .LC11[rip]
	mov	rdi, rcx
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 0
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, -1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 1
	mov	edi, 0
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	mov	esi, 2
	mov	edi, 1
	call	int_range
	mov	edx, eax
	lea	rax, buffer[rip+253]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	sprintf@PLT
	mov	rax, QWORD PTR ptr[rip]
	mov	rsi, rax
	lea	rdi, buffer[rip]
	call	sink@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	test_likely_nul_overflow, .-test_likely_nul_overflow
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"929556.c"
	.text
	.comm	buffer,256,4
	.align	2
	.global	int_range
	.syntax unified
	.arm
	.fpu softvfp
	.type	int_range, %function
int_range:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	bl	int_value
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r2, r3
	blt	.L2
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	bge	.L3
.L2:
	ldr	r3, [fp, #-16]
	b	.L5
.L3:
	ldr	r3, [fp, #-8]
.L5:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	int_range, .-int_range
	.align	2
	.global	uint_range
	.syntax unified
	.arm
	.fpu softvfp
	.type	uint_range, %function
uint_range:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	bl	uint_value
	str	r0, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r2, r3
	bcc	.L7
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	bcs	.L8
.L7:
	ldr	r3, [fp, #-16]
	b	.L10
.L8:
	ldr	r3, [fp, #-8]
.L10:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	uint_range, .-uint_range
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%#hho\000"
	.align	2
.LC1:
	.ascii	"%#1hho\000"
	.align	2
.LC2:
	.ascii	"%#2hho\000"
	.align	2
.LC3:
	.ascii	"%#3hho\000"
	.align	2
.LC4:
	.ascii	"%#4hho\000"
	.align	2
.LC5:
	.ascii	"%#ho\000"
	.align	2
.LC6:
	.ascii	"%#.*ho\000"
	.align	2
.LC7:
	.ascii	"%#o\000"
	.align	2
.LC8:
	.ascii	"%#hhx\000"
	.align	2
.LC9:
	.ascii	"%#.*hhx\000"
	.align	2
.LC10:
	.ascii	"%#hx\000"
	.align	2
.LC11:
	.ascii	"%#x\000"
	.text
	.align	2
	.global	test_min_overflow
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_min_overflow, %function
test_min_overflow:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+16
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+20
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+24
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+28
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+32
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #0
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #3
	mov	r0, #2
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #4
	mov	r0, #3
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #8
	mov	r0, #7
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+40
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+44
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #0
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #3
	mov	r0, #2
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #4
	mov	r0, #3
	bl	int_range
	mov	r2, r0
	ldr	r3, [fp, #-16]
	ldr	r1, .L12+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+52
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r3, .L12
	ldr	r2, [fp, #-16]
	ldr	r1, .L12+56
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	ldr	r4, .L12
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L12+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L12+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L12+12
	bl	sink
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L13:
	.align	2
.L12:
	.word	buffer+256
	.word	.LC0
	.word	ptr
	.word	buffer
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.word	.LC11
	.size	test_min_overflow, .-test_min_overflow
	.section	.rodata
	.align	2
.LC12:
	.ascii	"%#1hhx\000"
	.align	2
.LC13:
	.ascii	"%#2hhx\000"
	.align	2
.LC14:
	.ascii	"%#3hhx\000"
	.align	2
.LC15:
	.ascii	"%#4hhx\000"
	.text
	.align	2
	.global	test_likely_overflow
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_likely_overflow, %function
test_likely_overflow:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+16
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+20
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+24
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+28
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+32
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+36
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+36
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+40
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+44
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+48
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+52
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+56
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+40
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+44
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+48
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+52
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+56
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+60
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+60
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+60
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+60
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+60
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r3, .L15
	ldr	r2, [fp, #-16]
	ldr	r1, .L15+64
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+64
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+64
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+64
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	ldr	r4, .L15
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L15+64
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L15+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L15+12
	bl	sink
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L16:
	.align	2
.L15:
	.word	buffer+254
	.word	.LC0
	.word	ptr
	.word	buffer
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC7
	.word	.LC8
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	.LC10
	.word	.LC11
	.size	test_likely_overflow, .-test_likely_overflow
	.align	2
	.global	test_likely_nul_overflow
	.syntax unified
	.arm
	.fpu softvfp
	.type	test_likely_nul_overflow, %function
test_likely_nul_overflow:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]
	ldr	r3, .L18
	ldr	r2, [fp, #-16]
	ldr	r1, .L18+4
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+4
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r3, .L18
	ldr	r2, [fp, #-16]
	ldr	r1, .L18+16
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+16
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r3, .L18
	ldr	r2, [fp, #-16]
	ldr	r1, .L18+20
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+20
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r3, .L18
	ldr	r2, [fp, #-16]
	ldr	r1, .L18+24
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+24
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r3, .L18
	ldr	r2, [fp, #-16]
	ldr	r1, .L18+28
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+28
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r3, .L18
	ldr	r2, [fp, #-16]
	ldr	r1, .L18+32
	mov	r0, r3
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #0
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mvn	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #1
	mov	r0, #0
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	ldr	r4, .L18
	mov	r1, #2
	mov	r0, #1
	bl	int_range
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L18+32
	mov	r0, r4
	bl	sprintf
	ldr	r3, .L18+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L18+12
	bl	sink
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L19:
	.align	2
.L18:
	.word	buffer+253
	.word	.LC0
	.word	ptr
	.word	buffer
	.word	.LC5
	.word	.LC7
	.word	.LC8
	.word	.LC10
	.word	.LC11
	.size	test_likely_nul_overflow, .-test_likely_nul_overflow
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
