	.file	"682778.c"
	.intel_syntax noprefix
	.text
	.globl	MEMORY
	.bss
	.align 32
	.type	MEMORY, @object
	.size	MEMORY, 262144
MEMORY:
	.zero	262144
	.globl	RUN_BIT
	.align 4
	.type	RUN_BIT, @object
	.size	RUN_BIT, 4
RUN_BIT:
	.zero	4
	.globl	CURRENT_LATCHES
	.align 32
	.type	CURRENT_LATCHES, @object
	.size	CURRENT_LATCHES, 48
CURRENT_LATCHES:
	.zero	48
	.globl	NEXT_LATCHES
	.align 32
	.type	NEXT_LATCHES, @object
	.size	NEXT_LATCHES, 48
NEXT_LATCHES:
	.zero	48
	.globl	INSTRUCTION_COUNT
	.align 4
	.type	INSTRUCTION_COUNT, @object
	.size	INSTRUCTION_COUNT, 4
INSTRUCTION_COUNT:
	.zero	4
	.section	.rodata
	.align 8
.LC0:
	.string	"----------------LC-3b ISIM Help-----------------------"
	.align 8
.LC1:
	.string	"go               -  run program to completion         "
	.align 8
.LC2:
	.string	"run n            -  execute program for n instructions"
	.align 8
.LC3:
	.string	"mdump low high   -  dump memory from low to high      "
	.align 8
.LC4:
	.string	"rdump            -  dump the register & bus values    "
	.align 8
.LC5:
	.string	"?                -  display this help menu            "
	.align 8
.LC6:
	.string	"quit             -  exit the program                  \n"
	.text
	.globl	help
	.type	help, @function
help:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC0[rip]
	call	puts@PLT
	lea	rdi, .LC1[rip]
	call	puts@PLT
	lea	rdi, .LC2[rip]
	call	puts@PLT
	lea	rdi, .LC3[rip]
	call	puts@PLT
	lea	rdi, .LC4[rip]
	call	puts@PLT
	lea	rdi, .LC5[rip]
	call	puts@PLT
	lea	rdi, .LC6[rip]
	call	puts@PLT
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	help, .-help
	.globl	cycle
	.type	cycle, @function
cycle:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	process_instruction
	mov	rax, QWORD PTR NEXT_LATCHES[rip]
	mov	rdx, QWORD PTR NEXT_LATCHES[rip+8]
	mov	QWORD PTR CURRENT_LATCHES[rip], rax
	mov	QWORD PTR CURRENT_LATCHES[rip+8], rdx
	mov	rax, QWORD PTR NEXT_LATCHES[rip+16]
	mov	rdx, QWORD PTR NEXT_LATCHES[rip+24]
	mov	QWORD PTR CURRENT_LATCHES[rip+16], rax
	mov	QWORD PTR CURRENT_LATCHES[rip+24], rdx
	mov	rax, QWORD PTR NEXT_LATCHES[rip+32]
	mov	rdx, QWORD PTR NEXT_LATCHES[rip+40]
	mov	QWORD PTR CURRENT_LATCHES[rip+32], rax
	mov	QWORD PTR CURRENT_LATCHES[rip+40], rdx
	mov	eax, DWORD PTR INSTRUCTION_COUNT[rip]
	add	eax, 1
	mov	DWORD PTR INSTRUCTION_COUNT[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	cycle, .-cycle
	.section	.rodata
	.align 8
.LC7:
	.string	"Can't simulate, Simulator is halted\n"
.LC8:
	.string	"Simulating for %d cycles...\n\n"
.LC9:
	.string	"Simulator halted\n"
	.text
	.globl	run
	.type	run, @function
run:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR RUN_BIT[rip]
	test	eax, eax
	jne	.L4
	lea	rdi, .LC7[rip]
	call	puts@PLT
	jmp	.L3
.L4:
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, eax
	lea	rdi, .LC8[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -4[rbp], 0
	jmp	.L6
.L8:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip]
	test	eax, eax
	jne	.L7
	mov	DWORD PTR RUN_BIT[rip], 0
	lea	rdi, .LC9[rip]
	call	puts@PLT
	jmp	.L3
.L7:
	mov	eax, 0
	call	cycle
	add	DWORD PTR -4[rbp], 1
.L6:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jl	.L8
.L3:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	run, .-run
	.section	.rodata
.LC10:
	.string	"Simulating...\n"
	.text
	.globl	go
	.type	go, @function
go:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR RUN_BIT[rip]
	test	eax, eax
	jne	.L10
	lea	rdi, .LC7[rip]
	call	puts@PLT
	jmp	.L9
.L10:
	lea	rdi, .LC10[rip]
	call	puts@PLT
	jmp	.L12
.L13:
	mov	eax, 0
	call	cycle
.L12:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip]
	test	eax, eax
	jne	.L13
	mov	DWORD PTR RUN_BIT[rip], 0
	lea	rdi, .LC9[rip]
	call	puts@PLT
.L9:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	go, .-go
	.section	.rodata
	.align 8
.LC11:
	.string	"\nMemory content [0x%.4x..0x%.4x] :\n"
	.align 8
.LC12:
	.string	"-------------------------------------"
.LC13:
	.string	"  0x%.4x (%d) : 0x%.2x%.2x\n"
	.align 8
.LC14:
	.string	"-------------------------------------\n"
.LC15:
	.string	" 0x%.4x (%d) : 0x%.2x%.2x\n"
	.text
	.globl	mdump
	.type	mdump, @function
mdump:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -32[rbp], edx
	mov	edx, DWORD PTR -32[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	esi, eax
	lea	rdi, .LC11[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC12[rip]
	call	puts@PLT
	mov	eax, DWORD PTR -28[rbp]
	sar	eax
	mov	DWORD PTR -4[rbp], eax
	jmp	.L15
.L16:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	edi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -4[rbp]
	add	edx, edx
	mov	ecx, DWORD PTR -4[rbp]
	lea	esi, [rcx+rcx]
	mov	r8d, edi
	mov	ecx, eax
	lea	rdi, .LC13[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -4[rbp], 1
.L15:
	mov	eax, DWORD PTR -32[rbp]
	sar	eax
	cmp	DWORD PTR -4[rbp], eax
	jle	.L16
	mov	edi, 10
	call	putchar@PLT
	mov	ecx, DWORD PTR -32[rbp]
	mov	edx, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rsi, .LC11[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	mov	edx, 38
	mov	esi, 1
	lea	rdi, .LC14[rip]
	call	fwrite@PLT
	mov	eax, DWORD PTR -28[rbp]
	sar	eax
	mov	DWORD PTR -4[rbp], eax
	jmp	.L17
.L18:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	edi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	esi, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	lea	ecx, [rax+rax]
	mov	eax, DWORD PTR -4[rbp]
	lea	edx, [rax+rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	r9d, edi
	mov	r8d, esi
	lea	rsi, .LC15[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -4[rbp], 1
.L17:
	mov	eax, DWORD PTR -32[rbp]
	sar	eax
	cmp	DWORD PTR -4[rbp], eax
	jle	.L18
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	fflush@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	mdump, .-mdump
	.section	.rodata
	.align 8
.LC16:
	.string	"\nCurrent register/bus values :"
.LC17:
	.string	"Instruction Count : %d\n"
.LC18:
	.string	"PC                : 0x%.4x\n"
.LC19:
	.string	"CCs: N = %d  Z = %d  P = %d\n"
.LC20:
	.string	"Registers:"
.LC21:
	.string	"%d: 0x%.4x\n"
	.align 8
.LC22:
	.string	"\nCurrent register/bus values :\n"
.LC23:
	.string	"Registers:\n"
	.text
	.globl	rdump
	.type	rdump, @function
rdump:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	lea	rdi, .LC16[rip]
	call	puts@PLT
	lea	rdi, .LC12[rip]
	call	puts@PLT
	mov	eax, DWORD PTR INSTRUCTION_COUNT[rip]
	mov	esi, eax
	lea	rdi, .LC17[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR CURRENT_LATCHES[rip]
	mov	esi, eax
	lea	rdi, .LC18[rip]
	mov	eax, 0
	call	printf@PLT
	mov	ecx, DWORD PTR CURRENT_LATCHES[rip+12]
	mov	edx, DWORD PTR CURRENT_LATCHES[rip+8]
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+4]
	mov	esi, eax
	lea	rdi, .LC19[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rdi, .LC20[rip]
	call	puts@PLT
	mov	DWORD PTR -4[rbp], 0
	jmp	.L20
.L21:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	lea	rdi, .LC21[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -4[rbp], 1
.L20:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L21
	mov	edi, 10
	call	putchar@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	mov	edx, 31
	mov	esi, 1
	lea	rdi, .LC22[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	mov	edx, 38
	mov	esi, 1
	lea	rdi, .LC14[rip]
	call	fwrite@PLT
	mov	edx, DWORD PTR INSTRUCTION_COUNT[rip]
	mov	rax, QWORD PTR -24[rbp]
	lea	rsi, .LC17[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	edx, DWORD PTR CURRENT_LATCHES[rip]
	mov	rax, QWORD PTR -24[rbp]
	lea	rsi, .LC18[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	esi, DWORD PTR CURRENT_LATCHES[rip+12]
	mov	ecx, DWORD PTR CURRENT_LATCHES[rip+8]
	mov	edx, DWORD PTR CURRENT_LATCHES[rip+4]
	mov	rax, QWORD PTR -24[rbp]
	mov	r8d, esi
	lea	rsi, .LC19[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, rax
	mov	edx, 11
	mov	esi, 1
	lea	rdi, .LC23[rip]
	call	fwrite@PLT
	mov	DWORD PTR -4[rbp], 0
	jmp	.L22
.L23:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	ecx, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -4[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	rsi, .LC21[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	add	DWORD PTR -4[rbp], 1
.L22:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L23
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	fflush@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	rdump, .-rdump
	.section	.rodata
.LC24:
	.string	"LC-3b-SIM> "
.LC25:
	.string	"%s"
.LC26:
	.string	"%i %i"
.LC27:
	.string	"Bye."
.LC28:
	.string	"%d"
.LC29:
	.string	"Invalid Command"
	.text
	.globl	get_command
	.type	get_command, @function
get_command:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rdi, .LC24[rip]
	mov	eax, 0
	call	printf@PLT
	lea	rax, -32[rbp]
	mov	rsi, rax
	lea	rdi, .LC25[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	edi, 10
	call	putchar@PLT
	movzx	eax, BYTE PTR -32[rbp]
	movsx	eax, al
	sub	eax, 63
	cmp	eax, 51
	ja	.L25
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, .L27[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L27[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L27:
	.long	.L31-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L30-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L29-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L28-.L27
	.long	.L26-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L30-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L29-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L25-.L27
	.long	.L28-.L27
	.long	.L26-.L27
	.text
.L30:
	mov	eax, 0
	call	go
	jmp	.L32
.L29:
	lea	rdx, -36[rbp]
	lea	rax, -40[rbp]
	mov	rsi, rax
	lea	rdi, .LC26[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	edx, DWORD PTR -36[rbp]
	mov	ecx, DWORD PTR -40[rbp]
	mov	rax, QWORD PTR -56[rbp]
	mov	esi, ecx
	mov	rdi, rax
	call	mdump
	jmp	.L32
.L31:
	mov	eax, 0
	call	help
	jmp	.L32
.L28:
	lea	rdi, .LC27[rip]
	call	puts@PLT
	mov	edi, 0
	call	exit@PLT
.L26:
	movzx	eax, BYTE PTR -31[rbp]
	cmp	al, 100
	je	.L33
	movzx	eax, BYTE PTR -31[rbp]
	cmp	al, 68
	jne	.L34
.L33:
	mov	rax, QWORD PTR -56[rbp]
	mov	rdi, rax
	call	rdump
	jmp	.L32
.L34:
	lea	rax, -36[rbp]
	mov	rsi, rax
	lea	rdi, .LC28[rip]
	mov	eax, 0
	call	__isoc99_scanf@PLT
	mov	eax, DWORD PTR -36[rbp]
	mov	edi, eax
	call	run
	jmp	.L32
.L25:
	lea	rdi, .LC29[rip]
	call	puts@PLT
	nop
.L32:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	get_command, .-get_command
	.globl	init_memory
	.type	init_memory, @function
init_memory:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], 0
	jmp	.L38
.L39:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	DWORD PTR [rdx+rax], 0
	add	DWORD PTR -4[rbp], 1
.L38:
	cmp	DWORD PTR -4[rbp], 32767
	jle	.L39
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	init_memory, .-init_memory
	.section	.rodata
.LC30:
	.string	"r"
	.align 8
.LC31:
	.string	"Error: Can't open program file %s\n"
.LC32:
	.string	"%x\n"
.LC33:
	.string	"Error: Program file is empty"
	.align 8
.LC34:
	.string	"Error: Program file %s is too long to fit in memory. %x\n"
	.align 8
.LC35:
	.string	"Read %d words from program into memory.\n\n"
	.text
	.globl	load_program
	.type	load_program, @function
load_program:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	rax, QWORD PTR -40[rbp]
	lea	rsi, .LC30[rip]
	mov	rdi, rax
	call	fopen@PLT
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	jne	.L41
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rax
	lea	rdi, .LC31[rip]
	mov	eax, 0
	call	printf@PLT
	mov	edi, -1
	call	exit@PLT
.L41:
	lea	rdx, -28[rbp]
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC32[rip]
	mov	rdi, rax
	mov	eax, 0
	call	__isoc99_fscanf@PLT
	cmp	eax, -1
	je	.L42
	mov	eax, DWORD PTR -28[rbp]
	sar	eax
	mov	DWORD PTR -20[rbp], eax
	mov	DWORD PTR -24[rbp], 0
	jmp	.L44
.L42:
	lea	rdi, .LC33[rip]
	call	puts@PLT
	mov	edi, -1
	call	exit@PLT
.L46:
	mov	edx, DWORD PTR -20[rbp]
	mov	eax, DWORD PTR -24[rbp]
	add	eax, edx
	cmp	eax, 32767
	jle	.L45
	mov	edx, DWORD PTR -24[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rax
	lea	rdi, .LC34[rip]
	mov	eax, 0
	call	printf@PLT
	mov	edi, -1
	call	exit@PLT
.L45:
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, DWORD PTR -20[rbp]
	mov	edx, DWORD PTR -24[rbp]
	add	edx, ecx
	movzx	eax, al
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR -28[rbp]
	sar	eax, 8
	mov	ecx, DWORD PTR -20[rbp]
	mov	edx, DWORD PTR -24[rbp]
	add	edx, ecx
	movzx	eax, al
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -24[rbp], 1
.L44:
	lea	rdx, -28[rbp]
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC32[rip]
	mov	rdi, rax
	mov	eax, 0
	call	__isoc99_fscanf@PLT
	cmp	eax, -1
	jne	.L46
	mov	eax, DWORD PTR CURRENT_LATCHES[rip]
	test	eax, eax
	jne	.L47
	mov	eax, DWORD PTR -20[rbp]
	add	eax, eax
	mov	DWORD PTR CURRENT_LATCHES[rip], eax
.L47:
	mov	eax, DWORD PTR -24[rbp]
	mov	esi, eax
	lea	rdi, .LC35[rip]
	mov	eax, 0
	call	printf@PLT
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	load_program, .-load_program
	.globl	initialize
	.type	initialize, @function
initialize:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	eax, 0
	call	init_memory
	mov	DWORD PTR -4[rbp], 0
	jmp	.L50
.L52:
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	load_program
	nop
.L51:
	mov	rax, QWORD PTR -24[rbp]
	lea	rdx, 1[rax]
	mov	QWORD PTR -24[rbp], rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L51
	add	DWORD PTR -4[rbp], 1
.L50:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -28[rbp]
	jl	.L52
	mov	DWORD PTR CURRENT_LATCHES[rip+8], 1
	mov	rax, QWORD PTR CURRENT_LATCHES[rip]
	mov	rdx, QWORD PTR CURRENT_LATCHES[rip+8]
	mov	QWORD PTR NEXT_LATCHES[rip], rax
	mov	QWORD PTR NEXT_LATCHES[rip+8], rdx
	mov	rax, QWORD PTR CURRENT_LATCHES[rip+16]
	mov	rdx, QWORD PTR CURRENT_LATCHES[rip+24]
	mov	QWORD PTR NEXT_LATCHES[rip+16], rax
	mov	QWORD PTR NEXT_LATCHES[rip+24], rdx
	mov	rax, QWORD PTR CURRENT_LATCHES[rip+32]
	mov	rdx, QWORD PTR CURRENT_LATCHES[rip+40]
	mov	QWORD PTR NEXT_LATCHES[rip+32], rax
	mov	QWORD PTR NEXT_LATCHES[rip+40], rdx
	mov	DWORD PTR RUN_BIT[rip], 1
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	initialize, .-initialize
	.section	.rodata
	.align 8
.LC36:
	.string	"Error: usage: %s <program_file_1> <program_file_2> ...\n"
.LC37:
	.string	"LC-3b Simulator\n"
.LC38:
	.string	"w"
.LC39:
	.string	"dumpsim"
	.align 8
.LC40:
	.string	"Error: Can't open dumpsim file"
	.text
	.globl	main
	.type	main, @function
main:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	cmp	DWORD PTR -20[rbp], 1
	jg	.L54
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR [rax]
	mov	rsi, rax
	lea	rdi, .LC36[rip]
	mov	eax, 0
	call	printf@PLT
	mov	edi, 1
	call	exit@PLT
.L54:
	lea	rdi, .LC37[rip]
	call	puts@PLT
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, -1[rax]
	mov	rax, QWORD PTR -32[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	mov	esi, edx
	mov	rdi, rax
	call	initialize
	lea	rsi, .LC38[rip]
	lea	rdi, .LC39[rip]
	call	fopen@PLT
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	jne	.L55
	lea	rdi, .LC40[rip]
	call	puts@PLT
	mov	edi, -1
	call	exit@PLT
.L55:
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	get_command
	jmp	.L55
	.cfi_endproc
.LFE16:
	.size	main, .-main
	.section	.rodata
.LC41:
	.string	"DEBUG"
.LC42:
	.string	"INFO"
.LC43:
	.string	"WARN"
.LC44:
	.string	"ERROR"
	.section	.data.rel.local,"aw"
	.align 32
	.type	enumStrings, @object
	.size	enumStrings, 32
enumStrings:
	.quad	.LC41
	.quad	.LC42
	.quad	.LC43
	.quad	.LC44
	.section	.rodata
.LC45:
	.string	"add"
.LC46:
	.string	"and"
.LC47:
	.string	"br"
.LC48:
	.string	"brn"
.LC49:
	.string	"brp"
.LC50:
	.string	"brnp"
.LC51:
	.string	"brz"
.LC52:
	.string	"brnz"
.LC53:
	.string	"brzp"
.LC54:
	.string	"brnzp"
.LC55:
	.string	"jmp"
.LC56:
	.string	"ret"
.LC57:
	.string	"jsr"
.LC58:
	.string	"jsrr"
.LC59:
	.string	"ldb"
.LC60:
	.string	"ldw"
.LC61:
	.string	"lea"
.LC62:
	.string	"not"
.LC63:
	.string	"rti"
.LC64:
	.string	"lshf"
.LC65:
	.string	"rshfl"
.LC66:
	.string	"rshfa"
.LC67:
	.string	"stb"
.LC68:
	.string	"stw"
.LC69:
	.string	"trap"
.LC70:
	.string	"xor"
.LC71:
	.string	"halt"
.LC72:
	.string	"nop"
.LC73:
	.string	".fill"
	.section	.data.rel.local
	.align 32
	.type	lowerOpcodes, @object
	.size	lowerOpcodes, 232
lowerOpcodes:
	.quad	.LC45
	.quad	.LC46
	.quad	.LC47
	.quad	.LC48
	.quad	.LC49
	.quad	.LC50
	.quad	.LC51
	.quad	.LC52
	.quad	.LC53
	.quad	.LC54
	.quad	.LC55
	.quad	.LC56
	.quad	.LC57
	.quad	.LC58
	.quad	.LC59
	.quad	.LC60
	.quad	.LC61
	.quad	.LC62
	.quad	.LC63
	.quad	.LC64
	.quad	.LC65
	.quad	.LC66
	.quad	.LC67
	.quad	.LC68
	.quad	.LC69
	.quad	.LC70
	.quad	.LC71
	.quad	.LC72
	.quad	.LC73
	.section	.rodata
	.align 32
	.type	opcodes, @object
	.size	opcodes, 116
opcodes:
	.long	1
	.long	5
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	12
	.long	12
	.long	4
	.long	4
	.long	2
	.long	6
	.long	14
	.long	9
	.long	8
	.long	13
	.long	13
	.long	13
	.long	3
	.long	7
	.long	15
	.long	9
	.long	15
	.long	0
	.long	10
	.globl	opcodeEnum
	.align 32
	.type	opcodeEnum, @object
	.size	opcodeEnum, 116
opcodeEnum:
	.long	0
	.long	1
	.long	2
	.long	3
	.long	4
	.long	5
	.long	6
	.long	7
	.long	8
	.long	9
	.long	10
	.long	11
	.long	12
	.long	13
	.long	14
	.long	15
	.long	16
	.long	17
	.long	18
	.long	19
	.long	20
	.long	21
	.long	22
	.long	23
	.long	24
	.long	25
	.long	26
	.long	27
	.long	28
.LC74:
	.string	"Simulating instruction #"
.LC75:
	.string	"current instruction: "
	.text
	.globl	process_instruction
	.type	process_instruction, @function
process_instruction:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, DWORD PTR instruction_num.6[rip]
	lea	edx, 1[rax]
	mov	DWORD PTR instruction_num.6[rip], edx
	push	1
	push	593
	lea	r9, __FUNCTION__.5[rip]
	mov	r8d, 41
	mov	ecx, eax
	mov	edx, 20
	lea	rsi, .LC74[rip]
	mov	edi, 18
	mov	eax, 0
	call	logging
	add	rsp, 16
	mov	eax, DWORD PTR CURRENT_LATCHES[rip]
	mov	DWORD PTR -12[rbp], eax
	sub	rsp, 8
	push	0
	push	597
	lea	rax, __FUNCTION__.5[rip]
	push	rax
	push	41
	mov	eax, DWORD PTR -12[rbp]
	push	rax
	mov	r9d, 0
	lea	r8, .LC75[rip]
	mov	ecx, 18
	mov	edx, 37
	lea	rsi, CURRENT_LATCHES[rip]
	mov	edi, 1
	mov	eax, 0
	call	loggingNoHeader
	add	rsp, 48
	mov	eax, DWORD PTR -12[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	and	eax, 61440
	mov	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	mov	esi, eax
	mov	edi, edx
	call	fetch
	mov	DWORD PTR -8[rbp], eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -12[rbp]
	mov	esi, edx
	mov	edi, eax
	call	decodeAndExecute
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR NEXT_LATCHES[rip], eax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	process_instruction, .-process_instruction
	.section	.rodata
.LC76:
	.string	" into register R"
.LC77:
	.string	"\033[35m<LB> \033[0mLoading "
.LC78:
	.string	"arg: "
.LC79:
	.string	"SR + offset: "
.LC80:
	.string	"MEM_BYTE: "
.LC81:
	.string	"SR1: "
.LC82:
	.string	"SEXT: "
.LC83:
	.string	"offset: "
.LC84:
	.string	"\033[35m<LW> \033[0mLoading "
.LC85:
	.string	"LSHF: "
	.text
	.globl	decodeAndExecute
	.type	decodeAndExecute, @function
decodeAndExecute:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r15
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 40
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	mov	DWORD PTR -68[rbp], edi
	mov	DWORD PTR -72[rbp], esi
	mov	eax, DWORD PTR -68[rbp]
	add	eax, 2
	mov	DWORD PTR -52[rbp], eax
	cmp	DWORD PTR -72[rbp], 27
	ja	.L146
	mov	eax, DWORD PTR -72[rbp]
	lea	rdx, 0[0+rax*4]
	lea	rax, .L60[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L60[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L60:
	.long	.L80-.L60
	.long	.L79-.L60
	.long	.L72-.L60
	.long	.L78-.L60
	.long	.L77-.L60
	.long	.L76-.L60
	.long	.L75-.L60
	.long	.L74-.L60
	.long	.L73-.L60
	.long	.L72-.L60
	.long	.L71-.L60
	.long	.L71-.L60
	.long	.L70-.L60
	.long	.L70-.L60
	.long	.L69-.L60
	.long	.L68-.L60
	.long	.L67-.L60
	.long	.L62-.L60
	.long	.L147-.L60
	.long	.L65-.L60
	.long	.L65-.L60
	.long	.L65-.L60
	.long	.L64-.L60
	.long	.L63-.L60
	.long	.L61-.L60
	.long	.L62-.L60
	.long	.L61-.L60
	.long	.L59-.L60
	.text
.L80:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 32
	test	eax, eax
	jne	.L81
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L81:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 16
	test	eax, eax
	je	.L83
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	or	eax, -32
	jmp	.L84
.L83:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	and	eax, 31
.L84:
	add	eax, esi
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L79:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 32
	test	eax, eax
	jne	.L86
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	and	eax, ecx
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L86:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 16
	test	eax, eax
	je	.L88
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	or	eax, -32
	jmp	.L89
.L88:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 31
.L89:
	and	eax, esi
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L69:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 32
	test	eax, eax
	je	.L90
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	or	eax, -64
	jmp	.L91
.L90:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ecx
	and	eax, 63
.L91:
	add	eax, esi
	mov	WORD PTR -54[rbp], ax
	movsx	r14d, WORD PTR -54[rbp]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	ecx, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 32
	test	eax, eax
	je	.L92
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	movzx	eax, al
	or	eax, 65472
	jmp	.L93
.L92:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 63
.L93:
	add	eax, ecx
	mov	DWORD PTR -76[rbp], eax
	movzx	eax, WORD PTR -54[rbp]
	movzx	eax, ax
	mov	edi, eax
	call	MEM_BYTE
	movsx	r13d, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	r12d, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 32
	test	eax, eax
	je	.L94
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	movzx	eax, al
	or	eax, 65472
	mov	ebx, eax
	jmp	.L95
.L94:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 63
	mov	ebx, eax
.L95:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 63
	mov	DWORD PTR -80[rbp], eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 9
	and	eax, 7
	mov	r15d, eax
	movzx	eax, WORD PTR -54[rbp]
	movzx	eax, ax
	mov	edi, eax
	call	MEM_BYTE
	sar	ax, 8
	cwde
	and	eax, 1
	cmp	eax, 1
	jne	.L96
	movzx	eax, WORD PTR -54[rbp]
	movzx	eax, ax
	mov	edi, eax
	call	MEM_BYTE
	cwde
	movzx	eax, ax
	or	ah, -2
	jmp	.L97
.L96:
	movzx	eax, WORD PTR -54[rbp]
	movzx	eax, ax
	mov	edi, eax
	call	MEM_BYTE
	cwde
	and	eax, 511
.L97:
	push	1
	push	637
	lea	rdx, __FUNCTION__.4[rip]
	push	rdx
	push	41
	push	r14
	push	19
	lea	rdx, .LC78[rip]
	push	rdx
	push	18
	push	37
	mov	edi, DWORD PTR -76[rbp]
	push	rdi
	push	19
	lea	rdx, .LC79[rip]
	push	rdx
	push	18
	push	37
	push	r13
	push	19
	lea	rdx, .LC80[rip]
	push	rdx
	push	18
	push	37
	push	r12
	push	19
	lea	rdx, .LC81[rip]
	push	rdx
	push	18
	push	37
	push	rbx
	push	19
	lea	rdx, .LC82[rip]
	push	rdx
	push	18
	push	37
	mov	ebx, DWORD PTR -80[rbp]
	push	rbx
	push	19
	lea	rdx, .LC83[rip]
	push	rdx
	push	18
	push	37
	push	r15
	push	19
	lea	r9, .LC76[rip]
	mov	r8d, 18
	mov	ecx, eax
	mov	edx, 19
	lea	rsi, .LC77[rip]
	mov	edi, 18
	mov	eax, 0
	call	loggingNoHeader
	add	rsp, 288
	movzx	eax, WORD PTR -54[rbp]
	movzx	eax, ax
	mov	edi, eax
	call	MEM_BYTE
	mov	WORD PTR -54[rbp], ax
	movzx	eax, WORD PTR -54[rbp]
	sar	ax, 8
	cwde
	and	eax, 1
	test	eax, eax
	je	.L98
	movzx	eax, WORD PTR -54[rbp]
	or	ax, -512
	cwde
	jmp	.L99
.L98:
	movsx	eax, WORD PTR -54[rbp]
	and	eax, 511
.L99:
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L68:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 32
	test	eax, eax
	je	.L100
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 126
	or	eax, -128
	jmp	.L101
.L100:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 126
.L101:
	add	eax, ecx
	mov	WORD PTR -54[rbp], ax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	edi, ax
	movsx	esi, WORD PTR -54[rbp]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 32
	test	eax, eax
	je	.L102
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	add	eax, eax
	and	eax, 126
	or	eax, 65408
	mov	edx, eax
	jmp	.L103
.L102:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	add	eax, eax
	and	eax, 126
	mov	edx, eax
.L103:
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	r8d, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, r8d
	and	eax, 32
	test	eax, eax
	je	.L104
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	r8d, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, r8d
	movzx	eax, al
	or	eax, 65472
	jmp	.L105
.L104:
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	r8d, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, r8d
	and	eax, 63
.L105:
	mov	ecx, DWORD PTR -68[rbp]
	mov	r8d, ecx
	shr	r8d, 31
	add	ecx, r8d
	sar	ecx
	movsx	rcx, ecx
	lea	r8, 0[0+rcx*8]
	lea	rcx, MEMORY[rip+4]
	mov	ecx, DWORD PTR [r8+rcx]
	sal	ecx, 8
	mov	r9d, ecx
	mov	ecx, DWORD PTR -68[rbp]
	mov	r8d, ecx
	shr	r8d, 31
	add	ecx, r8d
	sar	ecx
	movsx	rcx, ecx
	lea	r8, 0[0+rcx*8]
	lea	rcx, MEMORY[rip]
	mov	ecx, DWORD PTR [r8+rcx]
	movzx	ecx, cl
	add	ecx, r9d
	and	ecx, 63
	mov	r9d, ecx
	mov	ecx, DWORD PTR -68[rbp]
	mov	r8d, ecx
	shr	r8d, 31
	add	ecx, r8d
	sar	ecx
	movsx	rcx, ecx
	lea	r8, 0[0+rcx*8]
	lea	rcx, MEMORY[rip+4]
	mov	ecx, DWORD PTR [r8+rcx]
	sal	ecx, 8
	mov	r10d, ecx
	mov	ecx, DWORD PTR -68[rbp]
	mov	r8d, ecx
	shr	r8d, 31
	add	ecx, r8d
	sar	ecx
	movsx	rcx, ecx
	lea	r8, 0[0+rcx*8]
	lea	rcx, MEMORY[rip]
	mov	ecx, DWORD PTR [r8+rcx]
	movzx	ecx, cl
	add	ecx, r10d
	sar	ecx, 9
	and	ecx, 7
	mov	r8d, ecx
	movzx	ecx, WORD PTR -54[rbp]
	mov	r10d, ecx
	shr	r10w, 15
	add	ecx, r10d
	sar	cx
	movsx	ecx, cx
	movsx	rcx, ecx
	lea	r10, 0[0+rcx*8]
	lea	rcx, MEMORY[rip+4]
	mov	ecx, DWORD PTR [r10+rcx]
	sal	ecx, 8
	mov	r11d, ecx
	movzx	ecx, WORD PTR -54[rbp]
	mov	r10d, ecx
	shr	r10w, 15
	add	ecx, r10d
	sar	cx
	movsx	ecx, cx
	movsx	rcx, ecx
	lea	r10, 0[0+rcx*8]
	lea	rcx, MEMORY[rip]
	mov	ecx, DWORD PTR [r10+rcx]
	movzx	ecx, cl
	add	ecx, r11d
	movzx	ecx, cx
	sub	rsp, 8
	push	1
	push	650
	lea	r10, __FUNCTION__.4[rip]
	push	r10
	push	41
	push	rdi
	push	19
	lea	rdi, .LC81[rip]
	push	rdi
	push	18
	push	37
	push	rsi
	push	19
	lea	rsi, .LC78[rip]
	push	rsi
	push	18
	push	37
	push	rdx
	push	19
	lea	rdx, .LC85[rip]
	push	rdx
	push	18
	push	37
	push	rax
	push	19
	lea	rax, .LC82[rip]
	push	rax
	push	18
	push	37
	push	r9
	push	19
	lea	rax, .LC83[rip]
	push	rax
	push	18
	push	37
	push	r8
	push	19
	lea	r9, .LC76[rip]
	mov	r8d, 18
	mov	edx, 19
	lea	rsi, .LC84[rip]
	mov	edi, 18
	mov	eax, 0
	call	loggingNoHeader
	add	rsp, 256
	movzx	eax, WORD PTR -54[rbp]
	mov	edx, eax
	shr	dx, 15
	add	eax, edx
	sar	ax
	cwde
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	movzx	eax, WORD PTR -54[rbp]
	mov	edx, eax
	shr	dx, 15
	add	eax, edx
	sar	ax
	cwde
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L65:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 16
	test	eax, eax
	jne	.L106
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	edx, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 15
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L106:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 32
	test	eax, eax
	jne	.L108
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 15
	mov	edx, 65535
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	edx, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, edi
	and	eax, 15
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, esi
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L108:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	and	eax, 32768
	test	eax, eax
	jne	.L109
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 15
	mov	edx, 65535
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	edx, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, edi
	and	eax, 15
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	and	eax, esi
	cwde
	jmp	.L110
.L109:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 15
	mov	edx, eax
	mov	eax, 16
	sub	eax, edx
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	edx, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, edi
	and	eax, 15
	mov	ecx, eax
	sar	edx, cl
	mov	eax, edx
	or	eax, esi
	cwde
.L110:
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L64:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 9
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cwde
	movzx	edx, al
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, esi
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rcx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rcx+rax]
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 32
	test	eax, eax
	je	.L111
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, esi
	or	eax, -64
	jmp	.L112
.L111:
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 63
.L112:
	add	eax, edi
	movzx	eax, ax
	mov	esi, edx
	mov	edi, eax
	call	storeByteValue
	jmp	.L85
.L63:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 9
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movsx	edx, ax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, esi
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rcx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rcx+rax]
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, edi
	and	eax, 32
	test	eax, eax
	je	.L113
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, edi
	add	eax, eax
	and	eax, 126
	or	eax, -128
	jmp	.L114
.L113:
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, edi
	add	eax, eax
	and	eax, 126
.L114:
	add	eax, esi
	movzx	eax, ax
	mov	esi, edx
	mov	edi, eax
	call	storeWordVal
	jmp	.L85
.L62:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 32
	test	eax, eax
	jne	.L115
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	xor	eax, ecx
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L115:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 16
	test	eax, eax
	je	.L117
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	or	eax, -32
	jmp	.L118
.L117:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 31
.L118:
	xor	eax, esi
	cwde
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip+4]
	mov	edx, DWORD PTR [rcx+rdx]
	sal	edx, 8
	mov	esi, edx
	mov	edx, DWORD PTR -68[rbp]
	mov	ecx, edx
	shr	ecx, 31
	add	edx, ecx
	sar	edx
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, MEMORY[rip]
	mov	edx, DWORD PTR [rcx+rdx]
	movzx	edx, dl
	add	edx, esi
	sar	edx, 9
	movsx	edx, dx
	and	edx, 7
	mov	esi, eax
	mov	edi, edx
	call	setRegWithCC
	jmp	.L85
.L78:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+4]
	cmp	eax, 1
	jne	.L148
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 256
	test	eax, eax
	je	.L120
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	jmp	.L121
.L120:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
.L121:
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L148
.L77:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+12]
	cmp	eax, 1
	jne	.L149
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 256
	test	eax, eax
	je	.L123
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	jmp	.L124
.L123:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
.L124:
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L149
.L76:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+4]
	cmp	eax, 1
	jne	.L150
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+12]
	cmp	eax, 1
	jne	.L150
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 256
	test	eax, eax
	je	.L126
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	jmp	.L127
.L126:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
.L127:
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L150
.L75:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+8]
	cmp	eax, 1
	jne	.L151
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 256
	test	eax, eax
	je	.L129
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	jmp	.L130
.L129:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
.L130:
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L151
.L74:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+4]
	cmp	eax, 1
	jne	.L152
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+8]
	cmp	eax, 1
	jne	.L152
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 256
	test	eax, eax
	je	.L132
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	jmp	.L133
.L132:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
.L133:
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L152
.L73:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+8]
	cmp	eax, 1
	jne	.L153
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+12]
	cmp	eax, 1
	jne	.L153
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 256
	test	eax, eax
	je	.L135
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	jmp	.L136
.L135:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
.L136:
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L153
.L72:
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 256
	test	eax, eax
	je	.L137
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	jmp	.L138
.L137:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 1022
.L138:
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L85
.L71:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L85
.L70:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 2048
	test	eax, eax
	jne	.L139
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	sar	eax, 6
	and	eax, 7
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L140
.L139:
	mov	eax, DWORD PTR -68[rbp]
	lea	ecx, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	and	eax, 1024
	test	eax, eax
	je	.L141
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 4094
	or	ah, -16
	jmp	.L142
.L141:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 4094
.L142:
	add	eax, ecx
	mov	DWORD PTR -52[rbp], eax
.L140:
	mov	eax, DWORD PTR -68[rbp]
	add	eax, 2
	mov	DWORD PTR NEXT_LATCHES[rip+44], eax
	jmp	.L85
.L67:
	mov	eax, DWORD PTR -68[rbp]
	lea	esi, 2[rax]
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 256
	test	eax, eax
	je	.L143
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	add	eax, eax
	and	eax, 1022
	or	ah, -4
	mov	edx, eax
	jmp	.L144
.L143:
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	add	eax, eax
	and	eax, 1022
	mov	edx, eax
.L144:
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rcx+rax]
	sal	eax, 8
	mov	edi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	ecx, eax
	shr	ecx, 31
	add	eax, ecx
	sar	eax
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movzx	eax, al
	add	eax, edi
	sar	eax, 9
	and	eax, 7
	lea	ecx, [rdx+rsi]
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, NEXT_LATCHES[rip]
	mov	DWORD PTR [rdx+rax], ecx
	jmp	.L85
.L61:
	mov	eax, DWORD PTR -68[rbp]
	mov	DWORD PTR NEXT_LATCHES[rip+44], eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	add	eax, eax
	and	eax, 510
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	esi, eax
	mov	eax, DWORD PTR -68[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, esi
	add	eax, eax
	and	eax, 510
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 65535
	mov	DWORD PTR -52[rbp], eax
	jmp	.L85
.L59:
	mov	eax, 0
	call	processNop
	jmp	.L85
.L146:
	nop
	jmp	.L85
.L147:
	nop
	jmp	.L85
.L148:
	nop
	jmp	.L85
.L149:
	nop
	jmp	.L85
.L150:
	nop
	jmp	.L85
.L151:
	nop
	jmp	.L85
.L152:
	nop
	jmp	.L85
.L153:
	nop
.L85:
	mov	eax, DWORD PTR -52[rbp]
	lea	rsp, -40[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	r15
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	decodeAndExecute, .-decodeAndExecute
	.globl	MEM_BYTE
	.type	MEM_BYTE, @function
MEM_BYTE:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	WORD PTR -20[rbp], ax
	movzx	eax, WORD PTR -20[rbp]
	and	eax, 1
	test	ax, ax
	jne	.L155
	movzx	eax, WORD PTR -20[rbp]
	shr	ax
	movzx	eax, ax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	and	ax, 255
	mov	WORD PTR -2[rbp], ax
	jmp	.L156
.L155:
	sub	WORD PTR -20[rbp], 1
	movzx	eax, WORD PTR -20[rbp]
	shr	ax
	movzx	eax, ax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	and	ax, 255
	mov	WORD PTR -2[rbp], ax
.L156:
	movzx	eax, WORD PTR -2[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	MEM_BYTE, .-MEM_BYTE
	.section	.rodata
.LC86:
	.string	" into address "
.LC87:
	.string	"<SW> Storing "
	.text
	.globl	storeWordVal
	.type	storeWordVal, @function
storeWordVal:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -20[rbp], dx
	mov	WORD PTR -24[rbp], ax
	movzx	edx, WORD PTR -20[rbp]
	movsx	eax, WORD PTR -24[rbp]
	push	1
	push	754
	lea	rcx, __FUNCTION__.3[rip]
	push	rcx
	push	41
	push	rdx
	push	19
	lea	r9, .LC86[rip]
	mov	r8d, 18
	mov	ecx, eax
	mov	edx, 19
	lea	rsi, .LC87[rip]
	mov	edi, 18
	mov	eax, 0
	call	loggingNoHeader
	add	rsp, 48
	movzx	eax, WORD PTR -20[rbp]
	shr	ax
	movzx	eax, ax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	movsx	eax, WORD PTR -24[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], edx
	movsx	edx, WORD PTR -24[rbp]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	and	edx, 65280
	mov	DWORD PTR [rax], edx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	storeWordVal, .-storeWordVal
	.section	.rodata
.LC88:
	.string	"<SB> Storing "
	.text
	.globl	storeByteValue
	.type	storeByteValue, @function
storeByteValue:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -20[rbp], dx
	mov	WORD PTR -24[rbp], ax
	movzx	edx, WORD PTR -20[rbp]
	movsx	eax, WORD PTR -24[rbp]
	push	1
	push	761
	lea	rcx, __FUNCTION__.2[rip]
	push	rcx
	push	41
	push	rdx
	push	19
	lea	r9, .LC86[rip]
	mov	r8d, 18
	mov	ecx, eax
	mov	edx, 19
	lea	rsi, .LC88[rip]
	mov	edi, 18
	mov	eax, 0
	call	loggingNoHeader
	add	rsp, 48
	movzx	eax, WORD PTR -20[rbp]
	shr	ax
	movzx	eax, ax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, WORD PTR -20[rbp]
	and	eax, 1
	test	ax, ax
	jne	.L160
	movsx	edx, WORD PTR -24[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], edx
	jmp	.L162
.L160:
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, 4[rax]
	movsx	eax, WORD PTR -24[rbp]
	mov	DWORD PTR [rdx], eax
.L162:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	storeByteValue, .-storeByteValue
	.globl	setRegWithCC
	.type	setRegWithCC, @function
setRegWithCC:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	WORD PTR -4[rbp], dx
	mov	WORD PTR -8[rbp], ax
	cmp	WORD PTR -8[rbp], 0
	jle	.L164
	mov	DWORD PTR NEXT_LATCHES[rip+12], 1
	jmp	.L165
.L164:
	mov	DWORD PTR NEXT_LATCHES[rip+12], 0
.L165:
	cmp	WORD PTR -8[rbp], 0
	jne	.L166
	mov	DWORD PTR NEXT_LATCHES[rip+8], 1
	jmp	.L167
.L166:
	mov	DWORD PTR NEXT_LATCHES[rip+8], 0
.L167:
	cmp	WORD PTR -8[rbp], 0
	jns	.L168
	mov	DWORD PTR NEXT_LATCHES[rip+4], 1
	jmp	.L169
.L168:
	mov	DWORD PTR NEXT_LATCHES[rip+4], 0
.L169:
	movsx	edx, WORD PTR -4[rbp]
	movsx	eax, WORD PTR -8[rbp]
	movsx	rdx, edx
	add	rdx, 4
	lea	rcx, 0[0+rdx*4]
	lea	rdx, NEXT_LATCHES[rip]
	mov	DWORD PTR [rcx+rdx], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	setRegWithCC, .-setRegWithCC
	.globl	processNop
	.type	processNop, @function
processNop:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+4]
	mov	DWORD PTR NEXT_LATCHES[rip+4], eax
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+8]
	mov	DWORD PTR NEXT_LATCHES[rip+8], eax
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+12]
	mov	DWORD PTR NEXT_LATCHES[rip+12], eax
	mov	DWORD PTR -4[rbp], 0
	jmp	.L171
.L172:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -4[rbp]
	movsx	rdx, edx
	add	rdx, 4
	lea	rcx, 0[0+rdx*4]
	lea	rdx, NEXT_LATCHES[rip]
	mov	DWORD PTR [rcx+rdx], eax
	add	DWORD PTR -4[rbp], 1
.L171:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L172
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	processNop, .-processNop
	.section	.rodata
.LC89:
	.string	"finding opcode for "
.LC90:
	.string	"Invalid instruction."
.LC91:
	.string	" is for opcode "
.LC92:
	.string	"Value "
	.text
	.globl	fetch
	.type	fetch, @function
fetch:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, DWORD PTR -20[rbp]
	push	0
	push	793
	lea	r9, __FUNCTION__.1[rip]
	mov	r8d, 41
	mov	ecx, eax
	mov	edx, 21
	lea	rsi, .LC89[rip]
	mov	edi, 18
	mov	eax, 0
	call	loggingNoHeader
	add	rsp, 16
	mov	DWORD PTR -4[rbp], 28
	mov	DWORD PTR -8[rbp], 0
	jmp	.L174
.L176:
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, opcodes[rip]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 12
	cmp	DWORD PTR -20[rbp], eax
	jne	.L175
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, opcodeEnum[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -4[rbp], eax
.L175:
	add	DWORD PTR -8[rbp], 1
.L174:
	cmp	DWORD PTR -8[rbp], 28
	jle	.L176
	cmp	DWORD PTR -20[rbp], 0
	jne	.L177
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 3584
	cmp	eax, 2048
	jne	.L178
	mov	DWORD PTR -4[rbp], 3
	jmp	.L177
.L178:
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 3584
	cmp	eax, 512
	jne	.L179
	mov	DWORD PTR -4[rbp], 4
	jmp	.L177
.L179:
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 3584
	cmp	eax, 2560
	jne	.L180
	mov	DWORD PTR -4[rbp], 5
	jmp	.L177
.L180:
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 3584
	cmp	eax, 1024
	jne	.L181
	mov	DWORD PTR -4[rbp], 6
	jmp	.L177
.L181:
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 3584
	cmp	eax, 3072
	jne	.L182
	mov	DWORD PTR -4[rbp], 7
	jmp	.L177
.L182:
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 3584
	cmp	eax, 1536
	jne	.L183
	mov	DWORD PTR -4[rbp], 8
	jmp	.L177
.L183:
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	and	eax, 3584
	cmp	eax, 3584
	jne	.L184
	mov	DWORD PTR -4[rbp], 2
	jmp	.L177
.L184:
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	movzx	eax, ax
	mov	edx, 0
	cmp	eax, edx
	jne	.L185
	mov	DWORD PTR -4[rbp], 27
	jmp	.L177
.L185:
	mov	r8d, 3
	mov	ecx, 811
	lea	rdx, __FUNCTION__.1[rip]
	mov	esi, 41
	lea	rdi, .LC90[rip]
	call	loggingMsg
	mov	edi, 4
	call	exit@PLT
.L177:
	mov	eax, DWORD PTR -4[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, lowerOpcodes[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	push	1
	push	817
	lea	rcx, __FUNCTION__.1[rip]
	push	rcx
	push	41
	push	rdx
	push	18
	lea	r9, .LC91[rip]
	mov	r8d, 18
	mov	ecx, eax
	mov	edx, 21
	lea	rsi, .LC92[rip]
	mov	edi, 18
	mov	eax, 0
	call	loggingNoHeader
	add	rsp, 48
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	fetch, .-fetch
	.globl	printList
	.type	printList, @function
printList:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	sal	DWORD PTR -20[rbp]
	mov	DWORD PTR -16[rbp], 0
	jmp	.L188
.L198:
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, 47
	ja	.L189
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	mov	eax, eax
	add	rax, rdx
	mov	rdx, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR [rdx]
	lea	ecx, 8[rdx]
	mov	rdx, QWORD PTR -32[rbp]
	mov	DWORD PTR [rdx], ecx
	jmp	.L190
.L189:
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR 8[rax]
	lea	rcx, 8[rax]
	mov	rdx, QWORD PTR -32[rbp]
	mov	QWORD PTR 8[rdx], rcx
.L190:
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 37
	je	.L191
	cmp	DWORD PTR -12[rbp], 38
	jne	.L192
.L191:
	mov	QWORD PTR -8[rbp], 0
	cmp	DWORD PTR -12[rbp], 38
	jne	.L195
	add	DWORD PTR -16[rbp], 2
	jmp	.L195
.L192:
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	eax, 47
	ja	.L196
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	mov	eax, eax
	add	rax, rdx
	mov	rdx, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR [rdx]
	lea	ecx, 8[rdx]
	mov	rdx, QWORD PTR -32[rbp]
	mov	DWORD PTR [rdx], ecx
	jmp	.L197
.L196:
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR 8[rax]
	lea	rcx, 8[rax]
	mov	rdx, QWORD PTR -32[rbp]
	mov	QWORD PTR 8[rdx], rcx
.L197:
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
	add	DWORD PTR -16[rbp], 2
.L195:
	mov	edx, DWORD PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	mov	eax, 0
	call	output
.L188:
	mov	eax, DWORD PTR -16[rbp]
	cmp	eax, DWORD PTR -20[rbp]
	jl	.L198
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	printList, .-printList
	.globl	print
	.type	print, @function
print:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 224
	mov	DWORD PTR -212[rbp], edi
	mov	QWORD PTR -168[rbp], rsi
	mov	QWORD PTR -160[rbp], rdx
	mov	QWORD PTR -152[rbp], rcx
	mov	QWORD PTR -144[rbp], r8
	mov	QWORD PTR -136[rbp], r9
	test	al, al
	je	.L200
	movaps	XMMWORD PTR -128[rbp], xmm0
	movaps	XMMWORD PTR -112[rbp], xmm1
	movaps	XMMWORD PTR -96[rbp], xmm2
	movaps	XMMWORD PTR -80[rbp], xmm3
	movaps	XMMWORD PTR -64[rbp], xmm4
	movaps	XMMWORD PTR -48[rbp], xmm5
	movaps	XMMWORD PTR -32[rbp], xmm6
	movaps	XMMWORD PTR -16[rbp], xmm7
.L200:
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -184[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -208[rbp], 8
	mov	DWORD PTR -204[rbp], 48
	lea	rax, 16[rbp]
	mov	QWORD PTR -200[rbp], rax
	lea	rax, -176[rbp]
	mov	QWORD PTR -192[rbp], rax
	lea	rdx, -208[rbp]
	mov	eax, DWORD PTR -212[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	printList
	nop
	mov	rax, QWORD PTR -184[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L201
	call	__stack_chk_fail@PLT
.L201:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	print, .-print
	.globl	println
	.type	println, @function
println:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 224
	mov	DWORD PTR -212[rbp], edi
	mov	QWORD PTR -168[rbp], rsi
	mov	QWORD PTR -160[rbp], rdx
	mov	QWORD PTR -152[rbp], rcx
	mov	QWORD PTR -144[rbp], r8
	mov	QWORD PTR -136[rbp], r9
	test	al, al
	je	.L203
	movaps	XMMWORD PTR -128[rbp], xmm0
	movaps	XMMWORD PTR -112[rbp], xmm1
	movaps	XMMWORD PTR -96[rbp], xmm2
	movaps	XMMWORD PTR -80[rbp], xmm3
	movaps	XMMWORD PTR -64[rbp], xmm4
	movaps	XMMWORD PTR -48[rbp], xmm5
	movaps	XMMWORD PTR -32[rbp], xmm6
	movaps	XMMWORD PTR -16[rbp], xmm7
.L203:
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -184[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -208[rbp], 8
	mov	DWORD PTR -204[rbp], 48
	lea	rax, 16[rbp]
	mov	QWORD PTR -200[rbp], rax
	lea	rax, -176[rbp]
	mov	QWORD PTR -192[rbp], rax
	lea	rdx, -208[rbp]
	mov	eax, DWORD PTR -212[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	printList
	mov	esi, 38
	mov	edi, 0
	mov	eax, 0
	call	output
	nop
	mov	rax, QWORD PTR -184[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L204
	call	__stack_chk_fail@PLT
.L204:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	println, .-println
	.section	.rodata
.LC93:
	.string	"%f"
	.text
	.globl	outputDouble
	.type	outputDouble, @function
outputDouble:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	movsd	QWORD PTR -8[rbp], xmm0
	mov	rax, QWORD PTR -8[rbp]
	movq	xmm0, rax
	lea	rdi, .LC93[rip]
	mov	eax, 1
	call	printf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	outputDouble, .-outputDouble
	.section	.rodata
.LC94:
	.string	"0x%X"
.LC95:
	.string	"PC: 0x%.4X\n"
.LC96:
	.string	"R%d: 0x%.4X  "
.LC97:
	.string	"%p"
.LC98:
	.string	"\033[0m"
.LC99:
	.string	"\033[37m"
.LC100:
	.string	"%d %s(0x%X)%s"
.LC101:
	.string	"%ld %s(0x%lX)%s"
.LC102:
	.string	"%u %s(0x%X)%s"
.LC103:
	.string	"%llu %s(0x%llX)%s"
.LC104:
	.string	"%lu %s(0x%lX)%s"
.LC105:
	.string	"INVALID ARGUMENTS"
	.text
	.globl	output
	.type	output, @function
output:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	cmp	DWORD PTR -28[rbp], 40
	ja	.L207
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, 0[0+rax*4]
	lea	rax, .L209[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L209[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L209:
	.long	.L230-.L209
	.long	.L235-.L209
	.long	.L222-.L209
	.long	.L223-.L209
	.long	.L221-.L209
	.long	.L220-.L209
	.long	.L219-.L209
	.long	.L218-.L209
	.long	.L217-.L209
	.long	.L216-.L209
	.long	.L215-.L209
	.long	.L214-.L209
	.long	.L228-.L209
	.long	.L227-.L209
	.long	.L224-.L209
	.long	.L211-.L209
	.long	.L213-.L209
	.long	.L212-.L209
	.long	.L228-.L209
	.long	.L227-.L209
	.long	.L226-.L209
	.long	.L225-.L209
	.long	.L224-.L209
	.long	.L223-.L209
	.long	.L222-.L209
	.long	.L221-.L209
	.long	.L220-.L209
	.long	.L219-.L209
	.long	.L218-.L209
	.long	.L207-.L209
	.long	.L217-.L209
	.long	.L216-.L209
	.long	.L215-.L209
	.long	.L214-.L209
	.long	.L213-.L209
	.long	.L212-.L209
	.long	.L211-.L209
	.long	.L210-.L209
	.long	.L210-.L209
	.long	.L208-.L209
	.long	.L208-.L209
	.text
.L230:
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip+4]
	mov	eax, DWORD PTR [rdx+rax]
	sal	eax, 8
	mov	ecx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, MEMORY[rip]
	mov	eax, DWORD PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	movzx	eax, ax
	mov	esi, eax
	lea	rdi, .LC94[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L235:
	mov	eax, DWORD PTR CURRENT_LATCHES[rip]
	mov	esi, eax
	lea	rdi, .LC95[rip]
	mov	eax, 0
	call	printf@PLT
	mov	ecx, DWORD PTR CURRENT_LATCHES[rip+12]
	mov	edx, DWORD PTR CURRENT_LATCHES[rip+8]
	mov	eax, DWORD PTR CURRENT_LATCHES[rip+4]
	mov	esi, eax
	lea	rdi, .LC19[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -4[rbp], 0
	jmp	.L232
.L234:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, 4
	lea	rdx, 0[0+rax*4]
	lea	rax, CURRENT_LATCHES[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	lea	rdi, .LC96[rip]
	mov	eax, 0
	call	printf@PLT
	cmp	DWORD PTR -4[rbp], 3
	jne	.L233
	mov	edi, 10
	call	putchar@PLT
.L233:
	add	DWORD PTR -4[rbp], 1
.L232:
	cmp	DWORD PTR -4[rbp], 7
	jle	.L234
	jmp	.L231
.L222:
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	lea	rdi, .LC97[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L223:
	mov	rax, QWORD PTR -24[rbp]
	movsx	eax, al
	mov	edi, eax
	call	putchar@PLT
	jmp	.L231
.L228:
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	lea	rdi, .LC25[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L221:
	mov	rax, QWORD PTR -24[rbp]
	movsx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	movsx	eax, al
	lea	r8, .LC98[rip]
	mov	ecx, edx
	lea	rdx, .LC99[rip]
	mov	esi, eax
	lea	rdi, .LC100[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L220:
	mov	rax, QWORD PTR -24[rbp]
	movsx	edx, ax
	mov	rax, QWORD PTR -24[rbp]
	cwde
	lea	r8, .LC98[rip]
	mov	ecx, edx
	lea	rdx, .LC99[rip]
	mov	esi, eax
	lea	rdi, .LC100[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L219:
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	ecx, edx
	lea	rdx, .LC99[rip]
	mov	esi, eax
	lea	rdi, .LC100[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L218:
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	rcx, rdx
	lea	rdx, .LC99[rip]
	mov	rsi, rax
	lea	rdi, .LC101[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L217:
	mov	rax, QWORD PTR -24[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, al
	lea	r8, .LC98[rip]
	mov	ecx, edx
	lea	rdx, .LC99[rip]
	mov	esi, eax
	lea	rdi, .LC102[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L216:
	mov	rax, QWORD PTR -24[rbp]
	movzx	edx, ax
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, ax
	lea	r8, .LC98[rip]
	mov	ecx, edx
	lea	rdx, .LC99[rip]
	mov	esi, eax
	lea	rdi, .LC102[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L215:
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	ecx, edx
	lea	rdx, .LC99[rip]
	mov	esi, eax
	lea	rdi, .LC102[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L214:
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	rcx, rdx
	lea	rdx, .LC99[rip]
	mov	rsi, rax
	lea	rdi, .LC103[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L227:
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	ecx, edx
	lea	rdx, .LC99[rip]
	mov	esi, eax
	lea	rdi, .LC100[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L226:
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, eax
	lea	rdi, .LC28[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L225:
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, eax
	lea	rdi, .LC94[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L224:
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	rcx, rdx
	lea	rdx, .LC99[rip]
	mov	rsi, rax
	lea	rdi, .LC101[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L211:
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	rcx, rdx
	lea	rdx, .LC99[rip]
	mov	rsi, rax
	lea	rdi, .LC101[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L213:
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	rcx, rdx
	lea	rdx, .LC99[rip]
	mov	rsi, rax
	lea	rdi, .LC104[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L212:
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -24[rbp]
	lea	r8, .LC98[rip]
	mov	rcx, rdx
	lea	rdx, .LC99[rip]
	mov	rsi, rax
	lea	rdi, .LC104[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L231
.L210:
	mov	edi, 10
	call	putchar@PLT
	jmp	.L231
.L208:
	mov	edi, 9
	call	putchar@PLT
	jmp	.L231
.L207:
	lea	rdi, .LC105[rip]
	call	puts@PLT
	nop
.L231:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	output, .-output
	.section	.rodata
.LC106:
	.string	"\033[36m"
.LC107:
	.string	"\033[34m"
.LC108:
	.string	"\033[33m"
.LC109:
	.string	"\033[31m"
	.text
	.globl	setColorPrint
	.type	setColorPrint, @function
setColorPrint:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 3
	je	.L237
	cmp	DWORD PTR -4[rbp], 3
	ja	.L242
	cmp	DWORD PTR -4[rbp], 2
	je	.L239
	cmp	DWORD PTR -4[rbp], 2
	ja	.L242
	cmp	DWORD PTR -4[rbp], 0
	je	.L240
	cmp	DWORD PTR -4[rbp], 1
	je	.L241
	jmp	.L242
.L240:
	lea	rdi, .LC106[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L238
.L241:
	lea	rdi, .LC107[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L238
.L239:
	lea	rdi, .LC108[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L238
.L237:
	lea	rdi, .LC109[rip]
	mov	eax, 0
	call	printf@PLT
	nop
.L238:
.L242:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	setColorPrint, .-setColorPrint
	.section	.rodata
.LC110:
	.string	"\033[36m%s\033[0m"
.LC111:
	.string	"\033[34m%s\033[0m"
.LC112:
	.string	"\033[33m%s\033[0m"
.LC113:
	.string	"\033[31m%s\033[0m"
	.text
	.globl	colorPrint
	.type	colorPrint, @function
colorPrint:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	cmp	DWORD PTR -4[rbp], 3
	je	.L244
	cmp	DWORD PTR -4[rbp], 3
	ja	.L249
	cmp	DWORD PTR -4[rbp], 2
	je	.L246
	cmp	DWORD PTR -4[rbp], 2
	ja	.L249
	cmp	DWORD PTR -4[rbp], 0
	je	.L247
	cmp	DWORD PTR -4[rbp], 1
	je	.L248
	jmp	.L249
.L247:
	mov	rax, QWORD PTR -16[rbp]
	mov	rsi, rax
	lea	rdi, .LC110[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L245
.L248:
	mov	rax, QWORD PTR -16[rbp]
	mov	rsi, rax
	lea	rdi, .LC111[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L245
.L246:
	mov	rax, QWORD PTR -16[rbp]
	mov	rsi, rax
	lea	rdi, .LC112[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L245
.L244:
	mov	rax, QWORD PTR -16[rbp]
	mov	rsi, rax
	lea	rdi, .LC113[rip]
	mov	eax, 0
	call	printf@PLT
	nop
.L245:
.L249:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	colorPrint, .-colorPrint
	.globl	getLogNum
	.type	getLogNum, @function
getLogNum:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR logNum.0[rip]
	lea	edx, 1[rax]
	mov	DWORD PTR logNum.0[rip], edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	getLogNum, .-getLogNum
	.globl	logging
	.type	logging, @function
logging:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 1456
	mov	DWORD PTR -1444[rbp], edi
	mov	QWORD PTR -168[rbp], rsi
	mov	QWORD PTR -160[rbp], rdx
	mov	QWORD PTR -152[rbp], rcx
	mov	QWORD PTR -144[rbp], r8
	mov	QWORD PTR -136[rbp], r9
	test	al, al
	je	.L253
	movaps	XMMWORD PTR -128[rbp], xmm0
	movaps	XMMWORD PTR -112[rbp], xmm1
	movaps	XMMWORD PTR -96[rbp], xmm2
	movaps	XMMWORD PTR -80[rbp], xmm3
	movaps	XMMWORD PTR -64[rbp], xmm4
	movaps	XMMWORD PTR -48[rbp], xmm5
	movaps	XMMWORD PTR -32[rbp], xmm6
	movaps	XMMWORD PTR -16[rbp], xmm7
.L253:
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -184[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -1440[rbp], 0
	mov	DWORD PTR -1416[rbp], 8
	mov	DWORD PTR -1412[rbp], 48
	lea	rax, 16[rbp]
	mov	QWORD PTR -1408[rbp], rax
	lea	rax, -176[rbp]
	mov	QWORD PTR -1400[rbp], rax
	cmp	DWORD PTR -1444[rbp], 41
	je	.L273
	mov	edx, DWORD PTR -1444[rbp]
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	DWORD PTR -1392[rbp+rax*4], edx
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L256
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L257
.L256:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L257:
	mov	rdx, QWORD PTR [rax]
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	QWORD PTR -992[rbp+rax*8], rdx
	add	DWORD PTR -1440[rbp], 1
	jmp	.L258
.L265:
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	edx, DWORD PTR -1436[rbp]
	mov	DWORD PTR -1392[rbp+rax*4], edx
	cmp	DWORD PTR -1436[rbp], 38
	je	.L259
	cmp	DWORD PTR -1436[rbp], 37
	je	.L259
	cmp	DWORD PTR -1436[rbp], 40
	je	.L259
	cmp	DWORD PTR -1436[rbp], 39
	jne	.L260
.L259:
	add	DWORD PTR -1440[rbp], 1
	jmp	.L258
.L260:
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L261
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L262
.L261:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L262:
	mov	rdx, QWORD PTR [rax]
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	QWORD PTR -992[rbp+rax*8], rdx
	add	DWORD PTR -1440[rbp], 1
.L258:
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L263
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L264
.L263:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L264:
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -1436[rbp], eax
	cmp	DWORD PTR -1436[rbp], 41
	jne	.L265
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L266
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L267
.L266:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L267:
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -1424[rbp], rax
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L268
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L269
.L268:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L269:
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -1432[rbp], eax
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L270
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L271
.L270:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L271:
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -1428[rbp], eax
	lea	r8, -1392[rbp]
	lea	rdi, -992[rbp]
	mov	ecx, DWORD PTR -1440[rbp]
	mov	edx, DWORD PTR -1428[rbp]
	mov	esi, DWORD PTR -1432[rbp]
	mov	rax, QWORD PTR -1424[rbp]
	sub	rsp, 8
	push	1
	mov	r9, r8
	mov	r8, rdi
	mov	rdi, rax
	mov	eax, 0
	call	printLog
	add	rsp, 16
	jmp	.L252
.L273:
	nop
.L252:
	mov	rax, QWORD PTR -184[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L272
	call	__stack_chk_fail@PLT
.L272:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	logging, .-logging
	.section	.rodata
	.align 8
.LC114:
	.string	"[%s]: func:'%s' \342\206\222 line:%d (%d)%s\n%s"
.LC115:
	.string	" (%d)%s\n"
	.text
	.globl	loggingMsg
	.type	loggingMsg, @function
loggingMsg:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	DWORD PTR -44[rbp], r8d
	mov	eax, 0
	call	getLogNum
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -44[rbp]
	mov	edi, eax
	call	setColorPrint
	mov	eax, DWORD PTR -44[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, enumStrings[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	esi, DWORD PTR -4[rbp]
	mov	ecx, DWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	sub	rsp, 8
	push	QWORD PTR -24[rbp]
	lea	r9, .LC98[rip]
	mov	r8d, esi
	mov	rsi, rax
	lea	rdi, .LC114[rip]
	mov	eax, 0
	call	printf@PLT
	add	rsp, 16
	mov	eax, DWORD PTR -44[rbp]
	mov	edi, eax
	call	setColorPrint
	mov	eax, DWORD PTR -4[rbp]
	lea	rdx, .LC98[rip]
	mov	esi, eax
	lea	rdi, .LC115[rip]
	mov	eax, 0
	call	printf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	loggingMsg, .-loggingMsg
	.section	.rodata
	.align 8
.LC116:
	.string	"[%s]: func:'%s' \342\206\222 line:%d (%d)\n\033[0m"
.LC117:
	.string	" (%d)\n\033[0m"
	.text
	.globl	printLog
	.type	printLog, @function
printLog:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 80
	mov	QWORD PTR -40[rbp], rdi
	mov	DWORD PTR -44[rbp], esi
	mov	DWORD PTR -48[rbp], edx
	mov	DWORD PTR -52[rbp], ecx
	mov	QWORD PTR -64[rbp], r8
	mov	QWORD PTR -72[rbp], r9
	mov	eax, DWORD PTR 16[rbp]
	mov	BYTE PTR -56[rbp], al
	mov	eax, 0
	call	getLogNum
	mov	DWORD PTR -16[rbp], eax
	cmp	BYTE PTR -56[rbp], 0
	je	.L276
	mov	eax, DWORD PTR -48[rbp]
	mov	edi, eax
	call	setColorPrint
	mov	eax, DWORD PTR -48[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, enumStrings[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	esi, DWORD PTR -16[rbp]
	mov	ecx, DWORD PTR -44[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	r8d, esi
	mov	rsi, rax
	lea	rdi, .LC116[rip]
	mov	eax, 0
	call	printf@PLT
.L276:
	mov	DWORD PTR -20[rbp], 0
	jmp	.L277
.L281:
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR -72[rbp]
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 37
	je	.L278
	cmp	DWORD PTR -12[rbp], 38
	je	.L278
	cmp	DWORD PTR -12[rbp], 40
	je	.L278
	cmp	DWORD PTR -12[rbp], 39
	jne	.L279
.L278:
	mov	QWORD PTR -8[rbp], 0
	jmp	.L280
.L279:
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	mov	rax, QWORD PTR -64[rbp]
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
.L280:
	mov	edx, DWORD PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	output
	add	DWORD PTR -20[rbp], 1
.L277:
	mov	eax, DWORD PTR -20[rbp]
	cmp	eax, DWORD PTR -52[rbp]
	jl	.L281
	mov	eax, DWORD PTR -48[rbp]
	mov	edi, eax
	call	setColorPrint
	mov	eax, DWORD PTR -16[rbp]
	mov	esi, eax
	lea	rdi, .LC117[rip]
	mov	eax, 0
	call	printf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	printLog, .-printLog
	.globl	loggingMsgNoHeader
	.type	loggingMsgNoHeader, @function
loggingMsgNoHeader:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -32[rbp], ecx
	mov	DWORD PTR -44[rbp], r8d
	mov	eax, 0
	call	getLogNum
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	lea	rdi, .LC25[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -44[rbp]
	mov	edi, eax
	call	setColorPrint
	mov	eax, DWORD PTR -4[rbp]
	lea	rdx, .LC98[rip]
	mov	esi, eax
	lea	rdi, .LC115[rip]
	mov	eax, 0
	call	printf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	loggingMsgNoHeader, .-loggingMsgNoHeader
	.globl	loggingNoHeader
	.type	loggingNoHeader, @function
loggingNoHeader:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 1456
	mov	DWORD PTR -1444[rbp], edi
	mov	QWORD PTR -168[rbp], rsi
	mov	QWORD PTR -160[rbp], rdx
	mov	QWORD PTR -152[rbp], rcx
	mov	QWORD PTR -144[rbp], r8
	mov	QWORD PTR -136[rbp], r9
	test	al, al
	je	.L284
	movaps	XMMWORD PTR -128[rbp], xmm0
	movaps	XMMWORD PTR -112[rbp], xmm1
	movaps	XMMWORD PTR -96[rbp], xmm2
	movaps	XMMWORD PTR -80[rbp], xmm3
	movaps	XMMWORD PTR -64[rbp], xmm4
	movaps	XMMWORD PTR -48[rbp], xmm5
	movaps	XMMWORD PTR -32[rbp], xmm6
	movaps	XMMWORD PTR -16[rbp], xmm7
.L284:
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -184[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -1440[rbp], 0
	mov	DWORD PTR -1416[rbp], 8
	mov	DWORD PTR -1412[rbp], 48
	lea	rax, 16[rbp]
	mov	QWORD PTR -1408[rbp], rax
	lea	rax, -176[rbp]
	mov	QWORD PTR -1400[rbp], rax
	cmp	DWORD PTR -1444[rbp], 41
	je	.L304
	mov	edx, DWORD PTR -1444[rbp]
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	DWORD PTR -1392[rbp+rax*4], edx
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L287
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L288
.L287:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L288:
	mov	rdx, QWORD PTR [rax]
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	QWORD PTR -992[rbp+rax*8], rdx
	add	DWORD PTR -1440[rbp], 1
	jmp	.L289
.L296:
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	edx, DWORD PTR -1436[rbp]
	mov	DWORD PTR -1392[rbp+rax*4], edx
	cmp	DWORD PTR -1436[rbp], 38
	je	.L290
	cmp	DWORD PTR -1436[rbp], 37
	je	.L290
	cmp	DWORD PTR -1436[rbp], 40
	je	.L290
	cmp	DWORD PTR -1436[rbp], 39
	jne	.L291
.L290:
	add	DWORD PTR -1440[rbp], 1
	jmp	.L289
.L291:
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L292
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L293
.L292:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L293:
	mov	rdx, QWORD PTR [rax]
	mov	eax, DWORD PTR -1440[rbp]
	cdqe
	mov	QWORD PTR -992[rbp+rax*8], rdx
	add	DWORD PTR -1440[rbp], 1
.L289:
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L294
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L295
.L294:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L295:
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -1436[rbp], eax
	cmp	DWORD PTR -1436[rbp], 41
	jne	.L296
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L297
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L298
.L297:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L298:
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -1424[rbp], rax
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L299
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L300
.L299:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L300:
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -1432[rbp], eax
	mov	eax, DWORD PTR -1416[rbp]
	cmp	eax, 47
	ja	.L301
	mov	rax, QWORD PTR -1400[rbp]
	mov	edx, DWORD PTR -1416[rbp]
	mov	edx, edx
	add	rax, rdx
	mov	edx, DWORD PTR -1416[rbp]
	add	edx, 8
	mov	DWORD PTR -1416[rbp], edx
	jmp	.L302
.L301:
	mov	rax, QWORD PTR -1408[rbp]
	lea	rdx, 8[rax]
	mov	QWORD PTR -1408[rbp], rdx
.L302:
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -1428[rbp], eax
	lea	r8, -1392[rbp]
	lea	rdi, -992[rbp]
	mov	ecx, DWORD PTR -1440[rbp]
	mov	edx, DWORD PTR -1428[rbp]
	mov	esi, DWORD PTR -1432[rbp]
	mov	rax, QWORD PTR -1424[rbp]
	sub	rsp, 8
	push	0
	mov	r9, r8
	mov	r8, rdi
	mov	rdi, rax
	call	printLog
	add	rsp, 16
	jmp	.L283
.L304:
	nop
.L283:
	mov	rax, QWORD PTR -184[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L303
	call	__stack_chk_fail@PLT
.L303:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	loggingNoHeader, .-loggingNoHeader
	.local	instruction_num.6
	.comm	instruction_num.6,4,4
	.section	.rodata
	.align 16
	.type	__FUNCTION__.5, @object
	.size	__FUNCTION__.5, 20
__FUNCTION__.5:
	.string	"process_instruction"
	.align 16
	.type	__FUNCTION__.4, @object
	.size	__FUNCTION__.4, 17
__FUNCTION__.4:
	.string	"decodeAndExecute"
	.align 8
	.type	__FUNCTION__.3, @object
	.size	__FUNCTION__.3, 13
__FUNCTION__.3:
	.string	"storeWordVal"
	.align 8
	.type	__FUNCTION__.2, @object
	.size	__FUNCTION__.2, 15
__FUNCTION__.2:
	.string	"storeByteValue"
	.type	__FUNCTION__.1, @object
	.size	__FUNCTION__.1, 6
__FUNCTION__.1:
	.string	"fetch"
	.local	logNum.0
	.comm	logNum.0,4,4
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"682778.c"
	.text
	.comm	MEMORY,262144,4
	.comm	RUN_BIT,4,4
	.comm	CURRENT_LATCHES,48,4
	.comm	NEXT_LATCHES,48,4
	.comm	INSTRUCTION_COUNT,4,4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"----------------LC-3b ISIM Help--------------------"
	.ascii	"---\000"
	.align	2
.LC1:
	.ascii	"go               -  run program to completion      "
	.ascii	"   \000"
	.align	2
.LC2:
	.ascii	"run n            -  execute program for n instructi"
	.ascii	"ons\000"
	.align	2
.LC3:
	.ascii	"mdump low high   -  dump memory from low to high   "
	.ascii	"   \000"
	.align	2
.LC4:
	.ascii	"rdump            -  dump the register & bus values "
	.ascii	"   \000"
	.align	2
.LC5:
	.ascii	"?                -  display this help menu         "
	.ascii	"   \000"
	.align	2
.LC6:
	.ascii	"quit             -  exit the program               "
	.ascii	"   \012\000"
	.text
	.align	2
	.global	help
	.syntax unified
	.arm
	.fpu softvfp
	.type	help, %function
help:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L2
	bl	puts
	ldr	r0, .L2+4
	bl	puts
	ldr	r0, .L2+8
	bl	puts
	ldr	r0, .L2+12
	bl	puts
	ldr	r0, .L2+16
	bl	puts
	ldr	r0, .L2+20
	bl	puts
	ldr	r0, .L2+24
	bl	puts
	nop
	pop	{fp, pc}
.L3:
	.align	2
.L2:
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.size	help, .-help
	.align	2
	.global	cycle
	.syntax unified
	.arm
	.fpu softvfp
	.type	cycle, %function
cycle:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	process_instruction
	ldr	r2, .L5
	ldr	r3, .L5+4
	mov	ip, r2
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	ldr	r3, .L5+8
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L5+8
	str	r3, [r2]
	nop
	pop	{fp, pc}
.L6:
	.align	2
.L5:
	.word	CURRENT_LATCHES
	.word	NEXT_LATCHES
	.word	INSTRUCTION_COUNT
	.size	cycle, .-cycle
	.section	.rodata
	.align	2
.LC7:
	.ascii	"Can't simulate, Simulator is halted\012\000"
	.align	2
.LC8:
	.ascii	"Simulating for %d cycles...\012\012\000"
	.align	2
.LC9:
	.ascii	"Simulator halted\012\000"
	.text
	.align	2
	.global	run
	.syntax unified
	.arm
	.fpu softvfp
	.type	run, %function
run:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r3, .L13
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L8
	ldr	r0, .L13+4
	bl	puts
	b	.L7
.L8:
	ldr	r1, [fp, #-16]
	ldr	r0, .L13+8
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L10
.L12:
	ldr	r3, .L13+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L11
	ldr	r3, .L13
	mov	r2, #0
	str	r2, [r3]
	ldr	r0, .L13+16
	bl	puts
	b	.L7
.L11:
	bl	cycle
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L10:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r2, r3
	blt	.L12
.L7:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L14:
	.align	2
.L13:
	.word	RUN_BIT
	.word	.LC7
	.word	.LC8
	.word	CURRENT_LATCHES
	.word	.LC9
	.size	run, .-run
	.section	.rodata
	.align	2
.LC10:
	.ascii	"Simulating...\012\000"
	.text
	.align	2
	.global	go
	.syntax unified
	.arm
	.fpu softvfp
	.type	go, %function
go:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L20
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L16
	ldr	r0, .L20+4
	bl	puts
	pop	{fp, pc}
.L16:
	ldr	r0, .L20+8
	bl	puts
	b	.L18
.L19:
	bl	cycle
.L18:
	ldr	r3, .L20+12
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L19
	ldr	r3, .L20
	mov	r2, #0
	str	r2, [r3]
	ldr	r0, .L20+16
	bl	puts
	pop	{fp, pc}
.L21:
	.align	2
.L20:
	.word	RUN_BIT
	.word	.LC7
	.word	.LC10
	.word	CURRENT_LATCHES
	.word	.LC9
	.size	go, .-go
	.section	.rodata
	.align	2
.LC11:
	.ascii	"\012Memory content [0x%.4x..0x%.4x] :\012\000"
	.align	2
.LC12:
	.ascii	"-------------------------------------\000"
	.align	2
.LC13:
	.ascii	"  0x%.4x (%d) : 0x%.2x%.2x\012\000"
	.align	2
.LC14:
	.ascii	"-------------------------------------\012\000"
	.align	2
.LC15:
	.ascii	" 0x%.4x (%d) : 0x%.2x%.2x\012\000"
	.text
	.align	2
	.global	mdump
	.syntax unified
	.arm
	.fpu softvfp
	.type	mdump, %function
mdump:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r0, .L27
	bl	printf
	ldr	r0, .L27+4
	bl	puts
	ldr	r3, [fp, #-20]
	asr	r3, r3, #1
	str	r3, [fp, #-8]
	b	.L23
.L24:
	ldr	r3, [fp, #-8]
	lsl	r1, r3, #1
	ldr	r3, [fp, #-8]
	lsl	r2, r3, #1
	ldr	r0, .L27+8
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r3, r0, r3
	ldr	r0, [r3, #4]
	ldr	ip, .L27+8
	ldr	r3, [fp, #-8]
	ldr	r3, [ip, r3, lsl #3]
	str	r3, [sp]
	mov	r3, r0
	ldr	r0, .L27+12
	bl	printf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L23:
	ldr	r3, [fp, #-24]
	asr	r3, r3, #1
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	ble	.L24
	mov	r0, #10
	bl	putchar
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-20]
	ldr	r1, .L27
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, [fp, #-16]
	mov	r2, #38
	mov	r1, #1
	ldr	r0, .L27+16
	bl	fwrite
	ldr	r3, [fp, #-20]
	asr	r3, r3, #1
	str	r3, [fp, #-8]
	b	.L25
.L26:
	ldr	r3, [fp, #-8]
	lsl	r1, r3, #1
	ldr	r3, [fp, #-8]
	lsl	r0, r3, #1
	ldr	r2, .L27+8
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	ldr	ip, .L27+8
	ldr	r2, [fp, #-8]
	ldr	r2, [ip, r2, lsl #3]
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, r0
	mov	r2, r1
	ldr	r1, .L27+20
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L25:
	ldr	r3, [fp, #-24]
	asr	r3, r3, #1
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	ble	.L26
	ldr	r1, [fp, #-16]
	mov	r0, #10
	bl	fputc
	ldr	r0, [fp, #-16]
	bl	fflush
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L28:
	.align	2
.L27:
	.word	.LC11
	.word	.LC12
	.word	MEMORY
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.size	mdump, .-mdump
	.section	.rodata
	.align	2
.LC16:
	.ascii	"\012Current register/bus values :\000"
	.align	2
.LC17:
	.ascii	"Instruction Count : %d\012\000"
	.align	2
.LC18:
	.ascii	"PC                : 0x%.4x\012\000"
	.align	2
.LC19:
	.ascii	"CCs: N = %d  Z = %d  P = %d\012\000"
	.align	2
.LC20:
	.ascii	"Registers:\000"
	.align	2
.LC21:
	.ascii	"%d: 0x%.4x\012\000"
	.align	2
.LC22:
	.ascii	"\012Current register/bus values :\012\000"
	.align	2
.LC23:
	.ascii	"Registers:\012\000"
	.text
	.align	2
	.global	rdump
	.syntax unified
	.arm
	.fpu softvfp
	.type	rdump, %function
rdump:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	ldr	r0, .L34
	bl	puts
	ldr	r0, .L34+4
	bl	puts
	ldr	r3, .L34+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L34+12
	bl	printf
	ldr	r3, .L34+16
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L34+20
	bl	printf
	ldr	r3, .L34+16
	ldr	r1, [r3, #4]
	ldr	r3, .L34+16
	ldr	r2, [r3, #8]
	ldr	r3, .L34+16
	ldr	r3, [r3, #12]
	ldr	r0, .L34+24
	bl	printf
	ldr	r0, .L34+28
	bl	puts
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L30
.L31:
	ldr	r2, .L34+16
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, r3
	ldr	r1, [fp, #-8]
	ldr	r0, .L34+32
	bl	printf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L30:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L31
	mov	r0, #10
	bl	putchar
	ldr	r3, [fp, #-16]
	mov	r2, #31
	mov	r1, #1
	ldr	r0, .L34+36
	bl	fwrite
	ldr	r3, [fp, #-16]
	mov	r2, #38
	mov	r1, #1
	ldr	r0, .L34+40
	bl	fwrite
	ldr	r3, .L34+8
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r1, .L34+12
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, .L34+16
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r1, .L34+20
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, .L34+16
	ldr	r2, [r3, #4]
	ldr	r3, .L34+16
	ldr	r1, [r3, #8]
	ldr	r3, .L34+16
	ldr	r3, [r3, #12]
	str	r3, [sp]
	mov	r3, r1
	ldr	r1, .L34+24
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, [fp, #-16]
	mov	r2, #11
	mov	r1, #1
	ldr	r0, .L34+44
	bl	fwrite
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L32
.L33:
	ldr	r2, .L34+16
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-8]
	ldr	r1, .L34+32
	ldr	r0, [fp, #-16]
	bl	fprintf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L32:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L33
	ldr	r1, [fp, #-16]
	mov	r0, #10
	bl	fputc
	ldr	r0, [fp, #-16]
	bl	fflush
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L35:
	.align	2
.L34:
	.word	.LC16
	.word	.LC12
	.word	INSTRUCTION_COUNT
	.word	.LC17
	.word	CURRENT_LATCHES
	.word	.LC18
	.word	.LC19
	.word	.LC20
	.word	.LC21
	.word	.LC22
	.word	.LC14
	.word	.LC23
	.size	rdump, .-rdump
	.section	.rodata
	.align	2
.LC24:
	.ascii	"LC-3b-SIM> \000"
	.align	2
.LC25:
	.ascii	"%s\000"
	.align	2
.LC26:
	.ascii	"%i %i\000"
	.align	2
.LC27:
	.ascii	"Bye.\000"
	.align	2
.LC28:
	.ascii	"%d\000"
	.align	2
.LC29:
	.ascii	"Invalid Command\000"
	.align	2
.LC30:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	get_command
	.syntax unified
	.arm
	.fpu softvfp
	.type	get_command, %function
get_command:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-40]
	ldr	r3, .L49
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r0, .L49+4
	bl	printf
	sub	r3, fp, #28
	mov	r1, r3
	ldr	r0, .L49+8
	bl	__isoc99_scanf
	mov	r0, #10
	bl	putchar
	ldrb	r3, [fp, #-28]	@ zero_extendqisi2
	sub	r3, r3, #63
	cmp	r3, #51
	ldrls	pc, [pc, r3, asl #2]
	b	.L37
.L39:
	.word	.L43
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L42
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L41
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L40
	.word	.L38
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L42
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L41
	.word	.L37
	.word	.L37
	.word	.L37
	.word	.L40
	.word	.L38
.L42:
	bl	go
	b	.L44
.L41:
	sub	r2, fp, #32
	sub	r3, fp, #36
	mov	r1, r3
	ldr	r0, .L49+12
	bl	__isoc99_scanf
	ldr	r3, [fp, #-36]
	ldr	r2, [fp, #-32]
	mov	r1, r3
	ldr	r0, [fp, #-40]
	bl	mdump
	b	.L44
.L43:
	bl	help
	b	.L44
.L40:
	ldr	r0, .L49+16
	bl	puts
	mov	r0, #0
	bl	exit
.L38:
	ldrb	r3, [fp, #-27]	@ zero_extendqisi2
	cmp	r3, #100
	beq	.L45
	ldrb	r3, [fp, #-27]	@ zero_extendqisi2
	cmp	r3, #68
	bne	.L46
.L45:
	ldr	r0, [fp, #-40]
	bl	rdump
	b	.L44
.L46:
	sub	r3, fp, #32
	mov	r1, r3
	ldr	r0, .L49+20
	bl	__isoc99_scanf
	ldr	r3, [fp, #-32]
	mov	r0, r3
	bl	run
	b	.L44
.L37:
	ldr	r0, .L49+24
	bl	puts
	nop
.L44:
	nop
	ldr	r3, .L49
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L48
	bl	__stack_chk_fail
.L48:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L50:
	.align	2
.L49:
	.word	.LC30
	.word	.LC24
	.word	.LC25
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.word	.LC29
	.size	get_command, .-get_command
	.align	2
	.global	init_memory
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_memory, %function
init_memory:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L52
.L53:
	ldr	r2, .L54
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #3]
	ldr	r2, .L54
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3, #4]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L52:
	ldr	r3, [fp, #-8]
	cmp	r3, #32768
	blt	.L53
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L55:
	.align	2
.L54:
	.word	MEMORY
	.size	init_memory, .-init_memory
	.section	.rodata
	.align	2
.LC31:
	.ascii	"r\000"
	.align	2
.LC32:
	.ascii	"Error: Can't open program file %s\012\000"
	.align	2
.LC33:
	.ascii	"%x\012\000"
	.align	2
.LC34:
	.ascii	"Error: Program file is empty\000"
	.align	2
.LC35:
	.ascii	"Error: Program file %s is too long to fit in memory"
	.ascii	". %x\012\000"
	.align	2
.LC36:
	.ascii	"Read %d words from program into memory.\012\012\000"
	.align	2
.LC37:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	load_program
	.syntax unified
	.arm
	.fpu softvfp
	.type	load_program, %function
load_program:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-32]
	ldr	r3, .L65
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r1, .L65+4
	ldr	r0, [fp, #-32]
	bl	fopen
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L57
	ldr	r1, [fp, #-32]
	ldr	r0, .L65+8
	bl	printf
	mvn	r0, #0
	bl	exit
.L57:
	sub	r3, fp, #24
	mov	r2, r3
	ldr	r1, .L65+12
	ldr	r0, [fp, #-16]
	bl	__isoc99_fscanf
	mov	r3, r0
	cmn	r3, #1
	beq	.L58
	ldr	r3, [fp, #-24]
	asr	r3, r3, #1
	str	r3, [fp, #-12]
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L60
.L58:
	ldr	r0, .L65+16
	bl	puts
	mvn	r0, #0
	bl	exit
.L62:
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	cmp	r3, #32768
	blt	.L61
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-32]
	ldr	r0, .L65+20
	bl	printf
	mvn	r0, #0
	bl	exit
.L61:
	ldr	r2, [fp, #-24]
	ldr	r1, [fp, #-12]
	ldr	r3, [fp, #-20]
	add	r3, r1, r3
	and	r2, r2, #255
	ldr	r1, .L65+24
	str	r2, [r1, r3, lsl #3]
	ldr	r3, [fp, #-24]
	asr	r2, r3, #8
	ldr	r1, [fp, #-12]
	ldr	r3, [fp, #-20]
	add	r3, r1, r3
	and	r2, r2, #255
	ldr	r1, .L65+24
	lsl	r3, r3, #3
	add	r3, r1, r3
	str	r2, [r3, #4]
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L60:
	sub	r3, fp, #24
	mov	r2, r3
	ldr	r1, .L65+12
	ldr	r0, [fp, #-16]
	bl	__isoc99_fscanf
	mov	r3, r0
	cmn	r3, #1
	bne	.L62
	ldr	r3, .L65+28
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L63
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #1
	ldr	r2, .L65+28
	str	r3, [r2]
.L63:
	ldr	r1, [fp, #-20]
	ldr	r0, .L65+32
	bl	printf
	nop
	ldr	r3, .L65
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L64
	bl	__stack_chk_fail
.L64:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L66:
	.align	2
.L65:
	.word	.LC37
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.word	.LC34
	.word	.LC35
	.word	MEMORY
	.word	CURRENT_LATCHES
	.word	.LC36
	.size	load_program, .-load_program
	.align	2
	.global	initialize
	.syntax unified
	.arm
	.fpu softvfp
	.type	initialize, %function
initialize:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	bl	init_memory
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L68
.L70:
	ldr	r0, [fp, #-16]
	bl	load_program
	nop
.L69:
	ldr	r3, [fp, #-16]
	add	r2, r3, #1
	str	r2, [fp, #-16]
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L69
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L68:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	blt	.L70
	ldr	r3, .L71
	mov	r2, #1
	str	r2, [r3, #8]
	ldr	r2, .L71+4
	ldr	r3, .L71
	mov	ip, r2
	mov	lr, r3
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldmia	lr!, {r0, r1, r2, r3}
	stmia	ip!, {r0, r1, r2, r3}
	ldm	lr, {r0, r1, r2, r3}
	stm	ip, {r0, r1, r2, r3}
	ldr	r3, .L71+8
	mov	r2, #1
	str	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L72:
	.align	2
.L71:
	.word	CURRENT_LATCHES
	.word	NEXT_LATCHES
	.word	RUN_BIT
	.size	initialize, .-initialize
	.section	.rodata
	.align	2
.LC38:
	.ascii	"Error: usage: %s <program_file_1> <program_file_2> "
	.ascii	"...\012\000"
	.align	2
.LC39:
	.ascii	"LC-3b Simulator\012\000"
	.align	2
.LC40:
	.ascii	"w\000"
	.align	2
.LC41:
	.ascii	"dumpsim\000"
	.align	2
.LC42:
	.ascii	"Error: Can't open dumpsim file\000"
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	cmp	r3, #1
	bgt	.L74
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L76
	bl	printf
	mov	r0, #1
	bl	exit
.L74:
	ldr	r0, .L76+4
	bl	puts
	ldr	r3, [fp, #-20]
	add	r3, r3, #4
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	sub	r3, r3, #1
	mov	r1, r3
	mov	r0, r2
	bl	initialize
	ldr	r1, .L76+8
	ldr	r0, .L76+12
	bl	fopen
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L75
	ldr	r0, .L76+16
	bl	puts
	mvn	r0, #0
	bl	exit
.L75:
	ldr	r0, [fp, #-8]
	bl	get_command
	b	.L75
.L77:
	.align	2
.L76:
	.word	.LC38
	.word	.LC39
	.word	.LC40
	.word	.LC41
	.word	.LC42
	.size	main, .-main
	.section	.rodata
	.align	2
.LC43:
	.ascii	"DEBUG\000"
	.align	2
.LC44:
	.ascii	"INFO\000"
	.align	2
.LC45:
	.ascii	"WARN\000"
	.align	2
.LC46:
	.ascii	"ERROR\000"
	.data
	.align	2
	.type	enumStrings, %object
	.size	enumStrings, 16
enumStrings:
	.word	.LC43
	.word	.LC44
	.word	.LC45
	.word	.LC46
	.section	.rodata
	.align	2
.LC47:
	.ascii	"add\000"
	.align	2
.LC48:
	.ascii	"and\000"
	.align	2
.LC49:
	.ascii	"br\000"
	.align	2
.LC50:
	.ascii	"brn\000"
	.align	2
.LC51:
	.ascii	"brp\000"
	.align	2
.LC52:
	.ascii	"brnp\000"
	.align	2
.LC53:
	.ascii	"brz\000"
	.align	2
.LC54:
	.ascii	"brnz\000"
	.align	2
.LC55:
	.ascii	"brzp\000"
	.align	2
.LC56:
	.ascii	"brnzp\000"
	.align	2
.LC57:
	.ascii	"jmp\000"
	.align	2
.LC58:
	.ascii	"ret\000"
	.align	2
.LC59:
	.ascii	"jsr\000"
	.align	2
.LC60:
	.ascii	"jsrr\000"
	.align	2
.LC61:
	.ascii	"ldb\000"
	.align	2
.LC62:
	.ascii	"ldw\000"
	.align	2
.LC63:
	.ascii	"lea\000"
	.align	2
.LC64:
	.ascii	"not\000"
	.align	2
.LC65:
	.ascii	"rti\000"
	.align	2
.LC66:
	.ascii	"lshf\000"
	.align	2
.LC67:
	.ascii	"rshfl\000"
	.align	2
.LC68:
	.ascii	"rshfa\000"
	.align	2
.LC69:
	.ascii	"stb\000"
	.align	2
.LC70:
	.ascii	"stw\000"
	.align	2
.LC71:
	.ascii	"trap\000"
	.align	2
.LC72:
	.ascii	"xor\000"
	.align	2
.LC73:
	.ascii	"halt\000"
	.align	2
.LC74:
	.ascii	"nop\000"
	.align	2
.LC75:
	.ascii	".fill\000"
	.data
	.align	2
	.type	lowerOpcodes, %object
	.size	lowerOpcodes, 116
lowerOpcodes:
	.word	.LC47
	.word	.LC48
	.word	.LC49
	.word	.LC50
	.word	.LC51
	.word	.LC52
	.word	.LC53
	.word	.LC54
	.word	.LC55
	.word	.LC56
	.word	.LC57
	.word	.LC58
	.word	.LC59
	.word	.LC60
	.word	.LC61
	.word	.LC62
	.word	.LC63
	.word	.LC64
	.word	.LC65
	.word	.LC66
	.word	.LC67
	.word	.LC68
	.word	.LC69
	.word	.LC70
	.word	.LC71
	.word	.LC72
	.word	.LC73
	.word	.LC74
	.word	.LC75
	.section	.rodata
	.align	2
	.type	opcodes, %object
	.size	opcodes, 116
opcodes:
	.word	1
	.word	5
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	12
	.word	12
	.word	4
	.word	4
	.word	2
	.word	6
	.word	14
	.word	9
	.word	8
	.word	13
	.word	13
	.word	13
	.word	3
	.word	7
	.word	15
	.word	9
	.word	15
	.word	0
	.word	10
	.global	opcodeEnum
	.align	2
	.type	opcodeEnum, %object
	.size	opcodeEnum, 116
opcodeEnum:
	.word	0
	.word	1
	.word	2
	.word	3
	.word	4
	.word	5
	.word	6
	.word	7
	.word	8
	.word	9
	.word	10
	.word	11
	.word	12
	.word	13
	.word	14
	.word	15
	.word	16
	.word	17
	.word	18
	.word	19
	.word	20
	.word	21
	.word	22
	.word	23
	.word	24
	.word	25
	.word	26
	.word	27
	.word	28
	.align	2
.LC76:
	.ascii	"Simulating instruction #\000"
	.align	2
.LC77:
	.ascii	"current instruction: \000"
	.text
	.align	2
	.global	process_instruction
	.syntax unified
	.arm
	.fpu softvfp
	.type	process_instruction, %function
process_instruction:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	ldr	r3, .L79
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r1, .L79
	str	r2, [r1]
	mov	r2, #1
	str	r2, [sp, #12]
	ldr	r2, .L79+4
	str	r2, [sp, #8]
	ldr	r2, .L79+8
	str	r2, [sp, #4]
	mov	r2, #41
	str	r2, [sp]
	mov	r2, #20
	ldr	r1, .L79+12
	mov	r0, #18
	bl	logging
	ldr	r3, .L79+16
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [sp, #24]
	ldr	r3, .L79+20
	str	r3, [sp, #20]
	ldr	r3, .L79+8
	str	r3, [sp, #16]
	mov	r3, #41
	str	r3, [sp, #12]
	ldr	r3, [fp, #-16]
	str	r3, [sp, #8]
	mov	r3, #0
	str	r3, [sp, #4]
	ldr	r3, .L79+24
	str	r3, [sp]
	mov	r3, #18
	mov	r2, #37
	ldr	r1, .L79+16
	mov	r0, #1
	bl	loggingNoHeader
	ldr	r3, [fp, #-16]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L79+28
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	and	r3, r3, #61440
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	fetch
	str	r0, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-16]
	bl	decodeAndExecute
	str	r0, [fp, #-8]
	ldr	r2, .L79+32
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L80:
	.align	2
.L79:
	.word	instruction_num.5567
	.word	593
	.word	__FUNCTION__.5568
	.word	.LC76
	.word	CURRENT_LATCHES
	.word	597
	.word	.LC77
	.word	MEMORY
	.word	NEXT_LATCHES
	.size	process_instruction, .-process_instruction
	.section	.rodata
	.align	2
.LC78:
	.ascii	"\033[35m<LB> \033[0mLoading \000"
	.align	2
.LC79:
	.ascii	"arg: \000"
	.align	2
.LC80:
	.ascii	"SR + offset: \000"
	.align	2
.LC81:
	.ascii	"MEM_BYTE: \000"
	.align	2
.LC82:
	.ascii	"SR1: \000"
	.align	2
.LC83:
	.ascii	"SEXT: \000"
	.align	2
.LC84:
	.ascii	"offset: \000"
	.align	2
.LC85:
	.ascii	" into register R\000"
	.align	2
.LC86:
	.ascii	"\033[35m<LW> \033[0mLoading \000"
	.align	2
.LC87:
	.ascii	"LSHF: \000"
	.text
	.align	2
	.global	decodeAndExecute
	.syntax unified
	.arm
	.fpu softvfp
	.type	decodeAndExecute, %function
decodeAndExecute:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #172
	str	r0, [fp, #-40]
	str	r1, [fp, #-44]
	ldr	r3, [fp, #-40]
	add	r3, r3, #2
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-44]
	cmp	r3, #27
	ldrls	pc, [pc, r3, asl #2]
	b	.L170
.L84:
	.word	.L104
	.word	.L103
	.word	.L96
	.word	.L102
	.word	.L101
	.word	.L100
	.word	.L99
	.word	.L98
	.word	.L97
	.word	.L96
	.word	.L95
	.word	.L95
	.word	.L94
	.word	.L94
	.word	.L93
	.word	.L92
	.word	.L91
	.word	.L86
	.word	.L170
	.word	.L89
	.word	.L89
	.word	.L89
	.word	.L88
	.word	.L87
	.word	.L85
	.word	.L86
	.word	.L85
	.word	.L83
.L104:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #32
	cmp	r3, #0
	bne	.L105
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	r0, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	ip, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, ip, r3
	and	r3, r3, #7
	ldr	r1, .L177+56
	add	r3, r3, #4
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	bl	setRegWithCC
	b	.L109
.L105:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	ip, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #16
	cmp	r3, #0
	beq	.L107
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mvn	r3, r3, lsl #27
	mvn	r3, r3, lsr #27
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	b	.L108
.L107:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #31
	lsl	r3, r3, #16
	lsr	r3, r3, #16
.L108:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	mov	r0, ip
	bl	setRegWithCC
	b	.L109
.L103:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #32
	cmp	r3, #0
	bne	.L110
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	r0, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	ip, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, ip, r3
	and	r3, r3, #7
	ldr	r1, .L177+56
	add	r3, r3, #4
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	bl	setRegWithCC
	b	.L109
.L110:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	ip, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #16
	cmp	r3, #0
	beq	.L112
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mvn	r3, r3, lsl #27
	mvn	r3, r3, lsr #27
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L113
.L112:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #31
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L113:
	and	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	mov	r0, ip
	bl	setRegWithCC
	b	.L109
.L93:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #32
	cmp	r3, #0
	beq	.L114
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mvn	r3, r3, lsl #26
	mvn	r3, r3, lsr #26
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	b	.L115
.L114:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #63
	lsl	r3, r3, #16
	lsr	r3, r3, #16
.L115:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-34]	@ movhi
	ldrh	r3, [fp, #-34]
	mov	r0, r3
	bl	MEM_BYTE
	mov	r3, r0
	asr	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #1
	cmp	r3, #1
	bne	.L116
	ldrh	r3, [fp, #-34]
	mov	r0, r3
	bl	MEM_BYTE
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	orr	r5, r3, #65024
	b	.L117
.L116:
	ldrh	r3, [fp, #-34]
	mov	r0, r3
	bl	MEM_BYTE
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r5, r3, #23
	lsr	r5, r5, #23
.L117:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	and	r7, r3, #7
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r8, r3, #63
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #32
	cmp	r3, #0
	beq	.L118
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #255
	orr	r4, r3, #65280
	orr	r4, r4, #192
	b	.L119
.L118:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r4, r3, #63
.L119:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r6, r3, #16
	lsr	r6, r6, #16
	ldrh	r3, [fp, #-34]
	mov	r0, r3
	bl	MEM_BYTE
	mov	r3, r0
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r2, r3, #16
	lsr	r2, r2, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	ip, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, ip, r3
	and	r3, r3, #32
	cmp	r3, #0
	beq	.L120
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	ip, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, ip, r3
	and	r3, r3, #255
	orr	r3, r3, #65280
	orr	r3, r3, #192
	b	.L121
.L120:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	ip, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, ip, r3
	and	r3, r3, #63
.L121:
	add	r3, r3, r2
	ldrsh	r2, [fp, #-34]
	mov	r1, #1
	str	r1, [sp, #148]
	ldr	r1, .L177
	str	r1, [sp, #144]
	ldr	r1, .L177+20
	str	r1, [sp, #140]
	mov	r1, #41
	str	r1, [sp, #136]
	str	r2, [sp, #132]
	mov	r2, #19
	str	r2, [sp, #128]
	ldr	r2, .L177+28
	str	r2, [sp, #124]
	mov	r2, #18
	str	r2, [sp, #120]
	mov	r2, #37
	str	r2, [sp, #116]
	str	r3, [sp, #112]
	mov	r3, #19
	str	r3, [sp, #108]
	ldr	r3, .L177+4
	str	r3, [sp, #104]
	mov	r3, #18
	str	r3, [sp, #100]
	mov	r3, #37
	str	r3, [sp, #96]
	str	r0, [sp, #92]
	mov	r3, #19
	str	r3, [sp, #88]
	ldr	r3, .L177+8
	str	r3, [sp, #84]
	mov	r3, #18
	str	r3, [sp, #80]
	mov	r3, #37
	str	r3, [sp, #76]
	str	r6, [sp, #72]
	mov	r3, #19
	str	r3, [sp, #68]
	ldr	r3, .L177+24
	str	r3, [sp, #64]
	mov	r3, #18
	str	r3, [sp, #60]
	mov	r3, #37
	str	r3, [sp, #56]
	str	r4, [sp, #52]
	mov	r3, #19
	str	r3, [sp, #48]
	ldr	r3, .L177+36
	str	r3, [sp, #44]
	mov	r3, #18
	str	r3, [sp, #40]
	mov	r3, #37
	str	r3, [sp, #36]
	str	r8, [sp, #32]
	mov	r3, #19
	str	r3, [sp, #28]
	ldr	r3, .L177+40
	str	r3, [sp, #24]
	mov	r3, #18
	str	r3, [sp, #20]
	mov	r3, #37
	str	r3, [sp, #16]
	str	r7, [sp, #12]
	mov	r3, #19
	str	r3, [sp, #8]
	ldr	r3, .L177+44
	str	r3, [sp, #4]
	mov	r3, #18
	str	r3, [sp]
	mov	r3, r5
	mov	r2, #19
	ldr	r1, .L177+12
	mov	r0, #18
	bl	loggingNoHeader
	ldrh	r3, [fp, #-34]
	mov	r0, r3
	bl	MEM_BYTE
	mov	r3, r0
	strh	r3, [fp, #-34]	@ movhi
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldrsh	r3, [fp, #-34]
	asr	r3, r3, #8
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L122
	ldrh	r3, [fp, #-34]	@ movhi
	mvn	r3, r3, lsl #23
	mvn	r3, r3, lsr #23
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L123
.L122:
	ldrh	r3, [fp, #-34]	@ movhi
	lsl	r3, r3, #23
	lsr	r3, r3, #23
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L123:
	mov	r1, r3
	mov	r0, r2
	bl	setRegWithCC
	b	.L109
.L178:
	.align	2
.L177:
	.word	637
	.word	.LC80
	.word	.LC81
	.word	.LC78
	.word	650
	.word	__FUNCTION__.5582
	.word	.LC82
	.word	.LC79
	.word	.LC87
	.word	.LC83
	.word	.LC84
	.word	.LC85
	.word	.LC86
	.word	65535
	.word	CURRENT_LATCHES
	.word	MEMORY
.L92:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #32
	cmp	r3, #0
	beq	.L124
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #126
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	b	.L125
.L124:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #126
	lsl	r3, r3, #16
	lsr	r3, r3, #16
.L125:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	strh	r3, [fp, #-34]	@ movhi
	ldrsh	r3, [fp, #-34]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldrsh	r3, [fp, #-34]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	lsl	r0, r3, #16
	lsr	r0, r0, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	and	ip, r3, #7
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	lr, r3, #63
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #32
	cmp	r3, #0
	beq	.L126
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #255
	orr	r3, r3, #65280
	orr	r3, r3, #192
	b	.L127
.L126:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #63
.L127:
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	ldr	r1, .L177+60
	lsl	r2, r2, #3
	add	r2, r1, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	r4, r2
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	mov	r1, r2
	ldr	r2, .L177+60
	ldr	r2, [r2, r1, lsl #3]
	and	r2, r2, #255
	add	r2, r4, r2
	and	r2, r2, #32
	cmp	r2, #0
	beq	.L128
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	ldr	r1, .L177+60
	lsl	r2, r2, #3
	add	r2, r1, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	r4, r2
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	mov	r1, r2
	ldr	r2, .L177+60
	ldr	r2, [r2, r1, lsl #3]
	and	r2, r2, #255
	add	r2, r4, r2
	lsl	r2, r2, #1
	and	r2, r2, #126
	orr	r2, r2, #65280
	orr	r2, r2, #128
	b	.L129
.L128:
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	ldr	r1, .L177+60
	lsl	r2, r2, #3
	add	r2, r1, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	r4, r2
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	mov	r1, r2
	ldr	r2, .L177+60
	ldr	r2, [r2, r1, lsl #3]
	and	r2, r2, #255
	add	r2, r4, r2
	lsl	r2, r2, #1
	and	r2, r2, #126
.L129:
	ldrsh	r4, [fp, #-34]
	ldr	r1, [fp, #-40]
	lsr	r5, r1, #31
	add	r1, r5, r1
	asr	r1, r1, #1
	ldr	r5, .L177+60
	lsl	r1, r1, #3
	add	r1, r5, r1
	ldr	r1, [r1, #4]
	lsl	r1, r1, #8
	mov	r6, r1
	ldr	r1, [fp, #-40]
	lsr	r5, r1, #31
	add	r1, r5, r1
	asr	r1, r1, #1
	mov	r5, r1
	ldr	r1, .L177+60
	ldr	r1, [r1, r5, lsl #3]
	and	r1, r1, #255
	add	r1, r6, r1
	asr	r1, r1, #6
	and	r1, r1, #7
	ldr	r5, .L177+56
	add	r1, r1, #4
	ldr	r1, [r5, r1, lsl #2]
	lsl	r1, r1, #16
	lsr	r1, r1, #16
	mov	r5, #1
	str	r5, [sp, #128]
	ldr	r5, .L177+16
	str	r5, [sp, #124]
	ldr	r5, .L177+20
	str	r5, [sp, #120]
	mov	r5, #41
	str	r5, [sp, #116]
	str	r1, [sp, #112]
	mov	r1, #19
	str	r1, [sp, #108]
	ldr	r1, .L177+24
	str	r1, [sp, #104]
	mov	r1, #18
	str	r1, [sp, #100]
	mov	r1, #37
	str	r1, [sp, #96]
	str	r4, [sp, #92]
	mov	r1, #19
	str	r1, [sp, #88]
	ldr	r1, .L177+28
	str	r1, [sp, #84]
	mov	r1, #18
	str	r1, [sp, #80]
	mov	r1, #37
	str	r1, [sp, #76]
	str	r2, [sp, #72]
	mov	r2, #19
	str	r2, [sp, #68]
	ldr	r2, .L177+32
	str	r2, [sp, #64]
	mov	r2, #18
	str	r2, [sp, #60]
	mov	r2, #37
	str	r2, [sp, #56]
	str	r3, [sp, #52]
	mov	r3, #19
	str	r3, [sp, #48]
	ldr	r3, .L177+36
	str	r3, [sp, #44]
	mov	r3, #18
	str	r3, [sp, #40]
	mov	r3, #37
	str	r3, [sp, #36]
	str	lr, [sp, #32]
	mov	r3, #19
	str	r3, [sp, #28]
	ldr	r3, .L177+40
	str	r3, [sp, #24]
	mov	r3, #18
	str	r3, [sp, #20]
	mov	r3, #37
	str	r3, [sp, #16]
	str	ip, [sp, #12]
	mov	r3, #19
	str	r3, [sp, #8]
	ldr	r3, .L177+44
	str	r3, [sp, #4]
	mov	r3, #18
	str	r3, [sp]
	mov	r3, r0
	mov	r2, #19
	ldr	r1, .L177+48
	mov	r0, #18
	bl	loggingNoHeader
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	r0, r3, #16
	ldrsh	r3, [fp, #-34]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrsh	r3, [fp, #-34]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	bl	setRegWithCC
	b	.L109
.L89:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #16
	cmp	r3, #0
	bne	.L130
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	r0, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	ldr	r1, .L177+60
	lsl	r2, r2, #3
	add	r2, r1, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	ip, r2
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	mov	r1, r2
	ldr	r2, .L177+60
	ldr	r2, [r2, r1, lsl #3]
	and	r2, r2, #255
	add	r2, ip, r2
	and	r2, r2, #15
	lsl	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	bl	setRegWithCC
	b	.L109
.L130:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #32
	cmp	r3, #0
	bne	.L132
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	ip, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #15
	ldr	r2, .L177+52
	asr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, [fp, #-40]
	lsr	r0, r2, #31
	add	r2, r0, r2
	asr	r2, r2, #1
	ldr	r0, .L177+60
	lsl	r2, r2, #3
	add	r2, r0, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	lr, r2
	ldr	r2, [fp, #-40]
	lsr	r0, r2, #31
	add	r2, r0, r2
	asr	r2, r2, #1
	mov	r0, r2
	ldr	r2, .L177+60
	ldr	r2, [r2, r0, lsl #3]
	and	r2, r2, #255
	add	r2, lr, r2
	and	r2, r2, #15
	asr	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, r1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	mov	r0, ip
	bl	setRegWithCC
	b	.L109
.L132:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	ip, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	and	r3, r3, #32768
	cmp	r3, #0
	bne	.L133
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #15
	ldr	r2, .L177+52
	asr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, [fp, #-40]
	lsr	r0, r2, #31
	add	r2, r0, r2
	asr	r2, r2, #1
	ldr	r0, .L177+60
	lsl	r2, r2, #3
	add	r2, r0, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	lr, r2
	ldr	r2, [fp, #-40]
	lsr	r0, r2, #31
	add	r2, r0, r2
	asr	r2, r2, #1
	mov	r0, r2
	ldr	r2, .L177+60
	ldr	r2, [r2, r0, lsl #3]
	and	r2, r2, #255
	add	r2, lr, r2
	and	r2, r2, #15
	asr	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, r1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L134
.L133:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #15
	rsb	r3, r3, #16
	ldr	r2, .L177+52
	lsl	r3, r2, r3
	lsl	r3, r3, #16
	asr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, [fp, #-40]
	lsr	r0, r2, #31
	add	r2, r0, r2
	asr	r2, r2, #1
	ldr	r0, .L177+60
	lsl	r2, r2, #3
	add	r2, r0, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	lr, r2
	ldr	r2, [fp, #-40]
	lsr	r0, r2, #31
	add	r2, r0, r2
	asr	r2, r2, #1
	mov	r0, r2
	ldr	r2, .L177+60
	ldr	r2, [r2, r0, lsl #3]
	and	r2, r2, #255
	add	r2, lr, r2
	and	r2, r2, #15
	asr	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r1, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L134:
	mov	r1, r3
	mov	r0, ip
	bl	setRegWithCC
	b	.L109
.L88:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L177+56
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #32
	cmp	r3, #0
	beq	.L135
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mvn	r3, r3, lsl #26
	mvn	r3, r3, lsr #26
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	b	.L136
.L135:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L177+60
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L177+60
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #63
	lsl	r3, r3, #16
	lsr	r3, r3, #16
.L136:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r0, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L177+60
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	and	r3, r3, #7
	ldr	r2, .L179
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	bl	storeByteValue
	b	.L109
.L87:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L179
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #32
	cmp	r3, #0
	beq	.L137
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #126
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	b	.L138
.L137:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #126
	lsl	r3, r3, #16
	lsr	r3, r3, #16
.L138:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r0, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	and	r3, r3, #7
	ldr	r2, .L179
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	bl	storeWordVal
	b	.L109
.L86:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #32
	cmp	r3, #0
	bne	.L139
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	r0, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L179
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	ip, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, ip, r3
	and	r3, r3, #7
	ldr	r1, .L179
	add	r3, r3, #4
	ldr	r3, [r1, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	eor	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	bl	setRegWithCC
	b	.L109
.L139:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #9
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #7
	lsl	r3, r3, #16
	asr	ip, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L179
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #16
	cmp	r3, #0
	beq	.L141
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mvn	r3, r3, lsl #27
	mvn	r3, r3, lsr #27
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L142
.L141:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r1, r3, #16
	ldr	r3, [fp, #-40]
	lsr	r0, r3, #31
	add	r3, r0, r3
	asr	r3, r3, #1
	mov	r0, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r0, lsl #3]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #31
	lsl	r3, r3, #16
	asr	r3, r3, #16
.L142:
	eor	r3, r3, r2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	mov	r0, ip
	bl	setRegWithCC
	b	.L109
.L102:
	ldr	r3, .L179
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L171
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L144
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
	orr	r3, r3, #64512
	b	.L145
.L144:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
.L145:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L171
.L101:
	ldr	r3, .L179
	ldr	r3, [r3, #12]
	cmp	r3, #1
	bne	.L172
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L147
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
	orr	r3, r3, #64512
	b	.L148
.L147:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
.L148:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L172
.L100:
	ldr	r3, .L179
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L173
	ldr	r3, .L179
	ldr	r3, [r3, #12]
	cmp	r3, #1
	bne	.L173
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L150
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
	orr	r3, r3, #64512
	b	.L151
.L150:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
.L151:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L173
.L99:
	ldr	r3, .L179
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L174
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L153
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
	orr	r3, r3, #64512
	b	.L154
.L153:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
.L154:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L174
.L98:
	ldr	r3, .L179
	ldr	r3, [r3, #4]
	cmp	r3, #1
	bne	.L175
	ldr	r3, .L179
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L175
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L156
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
	orr	r3, r3, #64512
	b	.L157
.L156:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
.L157:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L175
.L97:
	ldr	r3, .L179
	ldr	r3, [r3, #8]
	cmp	r3, #1
	bne	.L176
	ldr	r3, .L179
	ldr	r3, [r3, #12]
	cmp	r3, #1
	bne	.L176
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L159
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
	orr	r3, r3, #64512
	b	.L160
.L159:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
.L160:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L176
.L96:
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L161
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
	orr	r3, r3, #64512
	b	.L162
.L161:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r1
.L162:
	add	r3, r3, r2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L109
.L95:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L179
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L109
.L180:
	.align	2
.L179:
	.word	CURRENT_LATCHES
	.word	4094
	.word	1022
	.word	NEXT_LATCHES
	.word	510
	.word	MEMORY
.L94:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #2048
	cmp	r3, #0
	bne	.L163
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	asr	r3, r3, #6
	and	r3, r3, #7
	ldr	r2, .L179
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L164
.L163:
	ldr	r3, [fp, #-40]
	add	r2, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	and	r3, r3, #1024
	cmp	r3, #0
	beq	.L165
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+4
	and	r3, r3, r1
	orr	r3, r3, #61440
	b	.L166
.L165:
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	ldr	r1, .L179+20
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r1, r3, #31
	add	r3, r1, r3
	asr	r3, r3, #1
	mov	r1, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r1, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r1, r3, #1
	ldr	r3, .L179+4
	and	r3, r3, r1
.L166:
	add	r3, r3, r2
	str	r3, [fp, #-32]
.L164:
	ldr	r3, [fp, #-40]
	add	r3, r3, #2
	ldr	r2, .L179+12
	str	r3, [r2, #44]
	b	.L109
.L91:
	ldr	r3, [fp, #-40]
	add	r0, r3, #2
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #256
	cmp	r3, #0
	beq	.L167
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	lsl	r2, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r2
	orr	r3, r3, #64512
	b	.L168
.L167:
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	lsl	r2, r3, #1
	ldr	r3, .L179+8
	and	r3, r3, r2
.L168:
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	ldr	r1, .L179+20
	lsl	r2, r2, #3
	add	r2, r1, r2
	ldr	r2, [r2, #4]
	lsl	r2, r2, #8
	mov	ip, r2
	ldr	r2, [fp, #-40]
	lsr	r1, r2, #31
	add	r2, r1, r2
	asr	r2, r2, #1
	mov	r1, r2
	ldr	r2, .L179+20
	ldr	r2, [r2, r1, lsl #3]
	and	r2, r2, #255
	add	r2, ip, r2
	asr	r2, r2, #9
	and	r1, r2, #7
	add	r2, r3, r0
	ldr	r0, .L179+12
	add	r3, r1, #4
	str	r2, [r0, r3, lsl #2]
	b	.L109
.L85:
	ldr	r2, .L179+12
	ldr	r3, [fp, #-40]
	str	r3, [r2, #44]
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	lsl	r2, r3, #1
	ldr	r3, .L179+16
	and	r3, r3, r2
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L179+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r0, r3
	ldr	r3, [fp, #-40]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r0, r3
	lsl	r2, r3, #1
	ldr	r3, .L179+16
	and	r3, r3, r2
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L179+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	str	r3, [fp, #-32]
	b	.L109
.L83:
	bl	processNop
	b	.L109
.L170:
	nop
	b	.L109
.L171:
	nop
	b	.L109
.L172:
	nop
	b	.L109
.L173:
	nop
	b	.L109
.L174:
	nop
	b	.L109
.L175:
	nop
	b	.L109
.L176:
	nop
.L109:
	ldr	r3, [fp, #-32]
	mov	r0, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
	.size	decodeAndExecute, .-decodeAndExecute
	.align	2
	.global	MEM_BYTE
	.syntax unified
	.arm
	.fpu softvfp
	.type	MEM_BYTE, %function
MEM_BYTE:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-14]	@ movhi
	and	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	cmp	r3, #0
	bne	.L182
	ldrh	r3, [fp, #-14]
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r2, r3
	ldr	r3, .L185
	ldr	r3, [r3, r2, lsl #3]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #255
	strh	r3, [fp, #-6]	@ movhi
	b	.L183
.L182:
	ldrh	r3, [fp, #-14]	@ movhi
	sub	r3, r3, #1
	strh	r3, [fp, #-14]	@ movhi
	ldrh	r3, [fp, #-14]
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L185
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	and	r3, r3, #255
	strh	r3, [fp, #-6]	@ movhi
.L183:
	ldrsh	r3, [fp, #-6]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L186:
	.align	2
.L185:
	.word	MEMORY
	.size	MEM_BYTE, .-MEM_BYTE
	.section	.rodata
	.align	2
.LC88:
	.ascii	"<SW> Storing \000"
	.align	2
.LC89:
	.ascii	" into address \000"
	.text
	.align	2
	.global	storeWordVal
	.syntax unified
	.arm
	.fpu softvfp
	.type	storeWordVal, %function
storeWordVal:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-14]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r2, [fp, #-16]
	ldrh	r3, [fp, #-14]
	mov	r1, #1
	str	r1, [sp, #28]
	ldr	r1, .L188
	str	r1, [sp, #24]
	ldr	r1, .L188+4
	str	r1, [sp, #20]
	mov	r1, #41
	str	r1, [sp, #16]
	str	r3, [sp, #12]
	mov	r3, #19
	str	r3, [sp, #8]
	ldr	r3, .L188+8
	str	r3, [sp, #4]
	mov	r3, #18
	str	r3, [sp]
	mov	r3, r2
	mov	r2, #19
	ldr	r1, .L188+12
	mov	r0, #18
	bl	loggingNoHeader
	ldrh	r3, [fp, #-14]
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #3
	ldr	r2, .L188+16
	add	r3, r3, r2
	str	r3, [fp, #-8]
	ldrh	r3, [fp, #-16]
	and	r2, r3, #255
	ldr	r3, [fp, #-8]
	str	r2, [r3]
	ldrsh	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	and	r2, r2, #65280
	str	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L189:
	.align	2
.L188:
	.word	754
	.word	__FUNCTION__.5617
	.word	.LC89
	.word	.LC88
	.word	MEMORY
	.size	storeWordVal, .-storeWordVal
	.section	.rodata
	.align	2
.LC90:
	.ascii	"<SB> Storing \000"
	.text
	.align	2
	.global	storeByteValue
	.syntax unified
	.arm
	.fpu softvfp
	.type	storeByteValue, %function
storeByteValue:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-14]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-16]	@ movhi
	ldrsh	r2, [fp, #-16]
	ldrh	r3, [fp, #-14]
	mov	r1, #1
	str	r1, [sp, #28]
	ldr	r1, .L194
	str	r1, [sp, #24]
	ldr	r1, .L194+4
	str	r1, [sp, #20]
	mov	r1, #41
	str	r1, [sp, #16]
	str	r3, [sp, #12]
	mov	r3, #19
	str	r3, [sp, #8]
	ldr	r3, .L194+8
	str	r3, [sp, #4]
	mov	r3, #18
	str	r3, [sp]
	mov	r3, r2
	mov	r2, #19
	ldr	r1, .L194+12
	mov	r0, #18
	bl	loggingNoHeader
	ldrh	r3, [fp, #-14]
	lsr	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #3
	ldr	r2, .L194+16
	add	r3, r3, r2
	str	r3, [fp, #-8]
	ldrh	r3, [fp, #-14]	@ movhi
	and	r3, r3, #1
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	cmp	r3, #0
	bne	.L191
	ldrsh	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	str	r2, [r3]
	b	.L193
.L191:
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	ldrsh	r2, [fp, #-16]
	str	r2, [r3]
.L193:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L195:
	.align	2
.L194:
	.word	761
	.word	__FUNCTION__.5623
	.word	.LC89
	.word	.LC90
	.word	MEMORY
	.size	storeByteValue, .-storeByteValue
	.align	2
	.global	setRegWithCC
	.syntax unified
	.arm
	.fpu softvfp
	.type	setRegWithCC, %function
setRegWithCC:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrsh	r3, [fp, #-8]
	cmp	r3, #0
	ble	.L197
	ldr	r3, .L203
	mov	r2, #1
	str	r2, [r3, #12]
	b	.L198
.L197:
	ldr	r3, .L203
	mov	r2, #0
	str	r2, [r3, #12]
.L198:
	ldrsh	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L199
	ldr	r3, .L203
	mov	r2, #1
	str	r2, [r3, #8]
	b	.L200
.L199:
	ldr	r3, .L203
	mov	r2, #0
	str	r2, [r3, #8]
.L200:
	ldrsh	r3, [fp, #-8]
	cmp	r3, #0
	bge	.L201
	ldr	r3, .L203
	mov	r2, #1
	str	r2, [r3, #4]
	b	.L202
.L201:
	ldr	r3, .L203
	mov	r2, #0
	str	r2, [r3, #4]
.L202:
	ldrsh	r3, [fp, #-6]
	ldrsh	r2, [fp, #-8]
	ldr	r1, .L203
	add	r3, r3, #4
	str	r2, [r1, r3, lsl #2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L204:
	.align	2
.L203:
	.word	NEXT_LATCHES
	.size	setRegWithCC, .-setRegWithCC
	.align	2
	.global	processNop
	.syntax unified
	.arm
	.fpu softvfp
	.type	processNop, %function
processNop:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	ldr	r3, .L208
	ldr	r3, [r3, #4]
	ldr	r2, .L208+4
	str	r3, [r2, #4]
	ldr	r3, .L208
	ldr	r3, [r3, #8]
	ldr	r2, .L208+4
	str	r3, [r2, #8]
	ldr	r3, .L208
	ldr	r3, [r3, #12]
	ldr	r2, .L208+4
	str	r3, [r2, #12]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L206
.L207:
	ldr	r2, .L208
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	ldr	r2, [r2, r3, lsl #2]
	ldr	r1, .L208+4
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	str	r2, [r1, r3, lsl #2]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L206:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L207
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L209:
	.align	2
.L208:
	.word	CURRENT_LATCHES
	.word	NEXT_LATCHES
	.size	processNop, .-processNop
	.section	.rodata
	.align	2
.LC91:
	.ascii	"finding opcode for \000"
	.align	2
.LC92:
	.ascii	"Invalid instruction.\000"
	.align	2
.LC93:
	.ascii	"Value \000"
	.align	2
.LC94:
	.ascii	" is for opcode \000"
	.text
	.align	2
	.global	fetch
	.syntax unified
	.arm
	.fpu softvfp
	.type	fetch, %function
fetch:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #0
	str	r3, [sp, #12]
	ldr	r3, .L224
	str	r3, [sp, #8]
	ldr	r3, .L224+4
	str	r3, [sp, #4]
	mov	r3, #41
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	mov	r2, #21
	ldr	r1, .L224+8
	mov	r0, #18
	bl	loggingNoHeader
	mov	r3, #28
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L211
.L213:
	ldr	r2, .L224+12
	ldr	r3, [fp, #-12]
	ldr	r3, [r2, r3, lsl #2]
	lsl	r3, r3, #12
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	bne	.L212
	ldr	r2, .L224+16
	ldr	r3, [fp, #-12]
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-8]
.L212:
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L211:
	ldr	r3, [fp, #-12]
	cmp	r3, #28
	ble	.L213
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L214
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #3584
	cmp	r3, #2048
	bne	.L215
	mov	r3, #3
	str	r3, [fp, #-8]
	b	.L214
.L215:
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #3584
	cmp	r3, #512
	bne	.L216
	mov	r3, #4
	str	r3, [fp, #-8]
	b	.L214
.L216:
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #3584
	cmp	r3, #2560
	bne	.L217
	mov	r3, #5
	str	r3, [fp, #-8]
	b	.L214
.L217:
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #3584
	cmp	r3, #1024
	bne	.L218
	mov	r3, #6
	str	r3, [fp, #-8]
	b	.L214
.L218:
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #3584
	cmp	r3, #3072
	bne	.L219
	mov	r3, #7
	str	r3, [fp, #-8]
	b	.L214
.L219:
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #3584
	cmp	r3, #1536
	bne	.L220
	mov	r3, #8
	str	r3, [fp, #-8]
	b	.L214
.L220:
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	and	r3, r3, #3584
	cmp	r3, #3584
	bne	.L221
	mov	r3, #2
	str	r3, [fp, #-8]
	b	.L214
.L221:
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L224+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-20]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L224+20
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r2, #0
	cmp	r3, r2
	bne	.L222
	mov	r3, #27
	str	r3, [fp, #-8]
	b	.L214
.L222:
	mov	r3, #3
	str	r3, [sp]
	ldr	r3, .L224+24
	ldr	r2, .L224+4
	mov	r1, #41
	ldr	r0, .L224+28
	bl	loggingMsg
	mov	r0, #4
	bl	exit
.L214:
	ldr	r2, .L224+32
	ldr	r3, [fp, #-8]
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #1
	str	r2, [sp, #28]
	ldr	r2, .L224+36
	str	r2, [sp, #24]
	ldr	r2, .L224+4
	str	r2, [sp, #20]
	mov	r2, #41
	str	r2, [sp, #16]
	str	r3, [sp, #12]
	mov	r3, #18
	str	r3, [sp, #8]
	ldr	r3, .L224+40
	str	r3, [sp, #4]
	mov	r3, #18
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	mov	r2, #21
	ldr	r1, .L224+44
	mov	r0, #18
	bl	loggingNoHeader
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L225:
	.align	2
.L224:
	.word	793
	.word	__FUNCTION__.5639
	.word	.LC91
	.word	opcodes
	.word	opcodeEnum
	.word	MEMORY
	.word	811
	.word	.LC92
	.word	lowerOpcodes
	.word	817
	.word	.LC94
	.word	.LC93
	.size	fetch, .-fetch
	.align	2
	.global	printList
	.syntax unified
	.arm
	.fpu softvfp
	.type	printList, %function
printList:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #1
	str	r3, [fp, #-24]
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L227
.L233:
	ldr	r3, [fp, #-28]
	add	r2, r3, #4
	str	r2, [fp, #-28]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #37
	beq	.L228
	ldr	r3, [fp, #-8]
	cmp	r3, #38
	bne	.L229
.L228:
	mov	r3, #0
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r3, #38
	bne	.L232
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	str	r3, [fp, #-16]
	b	.L232
.L229:
	ldr	r3, [fp, #-28]
	add	r2, r3, #4
	str	r2, [fp, #-28]
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	add	r3, r3, #2
	str	r3, [fp, #-16]
.L232:
	ldr	r1, [fp, #-8]
	ldr	r0, [fp, #-12]
	bl	output
.L227:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	blt	.L233
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	printList, .-printList
	.section	.rodata
	.align	2
.LC95:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	print
	.syntax unified
	.arm
	.fpu softvfp
	.type	print, %function
print:
	@ args = 4, pretend = 16, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 1
	push	{r0, r1, r2, r3}
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L236
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	add	r3, fp, #8
	str	r3, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #4]
	bl	printList
	nop
	ldr	r3, .L236
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L235
	bl	__stack_chk_fail
.L235:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #16
	bx	lr
.L237:
	.align	2
.L236:
	.word	.LC95
	.size	print, .-print
	.section	.rodata
	.align	2
.LC96:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	println
	.syntax unified
	.arm
	.fpu softvfp
	.type	println, %function
println:
	@ args = 4, pretend = 16, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 1
	push	{r0, r1, r2, r3}
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L240
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	add	r3, fp, #8
	str	r3, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #4]
	bl	printList
	mov	r1, #38
	mov	r0, #0
	bl	output
	nop
	ldr	r3, .L240
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L239
	bl	__stack_chk_fail
.L239:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #16
	bx	lr
.L241:
	.align	2
.L240:
	.word	.LC96
	.size	println, .-println
	.section	.rodata
	.align	2
.LC97:
	.ascii	"%f\000"
	.text
	.align	2
	.global	outputDouble
	.syntax unified
	.arm
	.fpu softvfp
	.type	outputDouble, %function
outputDouble:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	ldr	r0, .L243
	bl	printf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L244:
	.align	2
.L243:
	.word	.LC97
	.size	outputDouble, .-outputDouble
	.section	.rodata
	.align	2
.LC98:
	.ascii	"0x%X\000"
	.align	2
.LC99:
	.ascii	"PC: 0x%.4X\012\000"
	.align	2
.LC100:
	.ascii	"R%d: 0x%.4X  \000"
	.align	2
.LC101:
	.ascii	"%p\000"
	.align	2
.LC102:
	.ascii	"\033[37m\000"
	.align	2
.LC103:
	.ascii	"%d %s(0x%X)%s\000"
	.align	2
.LC104:
	.ascii	"\033[0m\000"
	.align	2
.LC105:
	.ascii	"%ld %s(0x%lX)%s\000"
	.align	2
.LC106:
	.ascii	"%u %s(0x%X)%s\000"
	.align	2
.LC107:
	.ascii	"%llu %s(0x%llX)%s\000"
	.align	2
.LC108:
	.ascii	"%lu %s(0x%lX)%s\000"
	.align	2
.LC109:
	.ascii	"INVALID ARGUMENTS\000"
	.text
	.align	2
	.global	output
	.syntax unified
	.arm
	.fpu softvfp
	.type	output, %function
output:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-20]
	cmp	r3, #40
	ldrls	pc, [pc, r3, asl #2]
	b	.L246
.L248:
	.word	.L269
	.word	.L274
	.word	.L261
	.word	.L262
	.word	.L260
	.word	.L259
	.word	.L258
	.word	.L257
	.word	.L256
	.word	.L255
	.word	.L254
	.word	.L253
	.word	.L267
	.word	.L266
	.word	.L263
	.word	.L250
	.word	.L252
	.word	.L251
	.word	.L267
	.word	.L266
	.word	.L265
	.word	.L264
	.word	.L263
	.word	.L262
	.word	.L261
	.word	.L260
	.word	.L259
	.word	.L258
	.word	.L257
	.word	.L246
	.word	.L256
	.word	.L255
	.word	.L254
	.word	.L253
	.word	.L252
	.word	.L251
	.word	.L250
	.word	.L249
	.word	.L249
	.word	.L247
	.word	.L247
.L269:
	ldr	r3, [fp, #-16]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	ldr	r2, .L275
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	lsl	r3, r3, #8
	mov	r1, r3
	ldr	r3, [fp, #-16]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L275
	ldr	r3, [r3, r2, lsl #3]
	and	r3, r3, #255
	add	r3, r1, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r1, r3
	ldr	r0, .L275+4
	bl	printf
	b	.L270
.L274:
	ldr	r3, .L275+8
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L275+12
	bl	printf
	ldr	r3, .L275+8
	ldr	r1, [r3, #4]
	ldr	r3, .L275+8
	ldr	r2, [r3, #8]
	ldr	r3, .L275+8
	ldr	r3, [r3, #12]
	ldr	r0, .L275+16
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L271
.L273:
	ldr	r2, .L275+8
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, r3
	ldr	r1, [fp, #-8]
	ldr	r0, .L275+20
	bl	printf
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	bne	.L272
	mov	r0, #10
	bl	putchar
.L272:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L271:
	ldr	r3, [fp, #-8]
	cmp	r3, #7
	ble	.L273
	b	.L270
.L261:
	ldr	r1, [fp, #-16]
	ldr	r0, .L275+24
	bl	printf
	b	.L270
.L262:
	ldr	r3, [fp, #-16]
	and	r3, r3, #255
	mov	r0, r3
	bl	putchar
	b	.L270
.L267:
	ldr	r1, [fp, #-16]
	ldr	r0, .L275+28
	bl	printf
	b	.L270
.L260:
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r1, r3
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r2, r3
	ldr	r3, .L275+32
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L275+36
	ldr	r0, .L275+40
	bl	printf
	b	.L270
.L259:
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r1, r3
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r2, r3
	ldr	r3, .L275+32
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L275+36
	ldr	r0, .L275+40
	bl	printf
	b	.L270
.L258:
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L275+32
	str	r2, [sp]
	ldr	r2, .L275+36
	ldr	r0, .L275+40
	bl	printf
	b	.L270
.L257:
	ldr	r3, [fp, #-16]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r3, [fp, #-16]
	mov	r2, r3
	asr	r3, r2, #31
	ldr	ip, .L275+32
	str	ip, [sp, #16]
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, .L275+36
	str	r3, [sp]
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L275+44
	bl	printf
	b	.L270
.L256:
	ldr	r3, [fp, #-16]
	and	r3, r3, #255
	mov	r1, r3
	ldr	r3, [fp, #-16]
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L275+32
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L275+36
	ldr	r0, .L275+48
	bl	printf
	b	.L270
.L255:
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r1, r3
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r2, r3
	ldr	r3, .L275+32
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L275+36
	ldr	r0, .L275+48
	bl	printf
	b	.L270
.L254:
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L275+32
	str	r2, [sp]
	ldr	r2, .L275+36
	ldr	r0, .L275+48
	bl	printf
	b	.L270
.L253:
	ldr	r3, [fp, #-16]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r3, [fp, #-16]
	mov	r2, r3
	asr	r3, r2, #31
	ldr	ip, .L275+32
	str	ip, [sp, #16]
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, .L275+36
	str	r3, [sp]
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L275+52
	bl	printf
	b	.L270
.L266:
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L275+32
	str	r2, [sp]
	ldr	r2, .L275+36
	ldr	r0, .L275+40
	bl	printf
	b	.L270
.L265:
	ldr	r3, [fp, #-16]
	mov	r1, r3
	ldr	r0, .L275+56
	bl	printf
	b	.L270
.L264:
	ldr	r3, [fp, #-16]
	mov	r1, r3
	ldr	r0, .L275+4
	bl	printf
	b	.L270
.L263:
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L275+32
	str	r2, [sp]
	ldr	r2, .L275+36
	ldr	r0, .L275+44
	bl	printf
	b	.L270
.L250:
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L275+32
	str	r2, [sp]
	ldr	r2, .L275+36
	ldr	r0, .L275+44
	bl	printf
	b	.L270
.L252:
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L275+32
	str	r2, [sp]
	ldr	r2, .L275+36
	ldr	r0, .L275+60
	bl	printf
	b	.L270
.L251:
	ldr	r1, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r2, .L275+32
	str	r2, [sp]
	ldr	r2, .L275+36
	ldr	r0, .L275+60
	bl	printf
	b	.L270
.L249:
	mov	r0, #10
	bl	putchar
	b	.L270
.L247:
	mov	r0, #9
	bl	putchar
	b	.L270
.L246:
	ldr	r0, .L275+64
	bl	puts
	nop
.L270:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L276:
	.align	2
.L275:
	.word	MEMORY
	.word	.LC98
	.word	CURRENT_LATCHES
	.word	.LC99
	.word	.LC19
	.word	.LC100
	.word	.LC101
	.word	.LC25
	.word	.LC104
	.word	.LC102
	.word	.LC103
	.word	.LC105
	.word	.LC106
	.word	.LC107
	.word	.LC28
	.word	.LC108
	.word	.LC109
	.size	output, .-output
	.section	.rodata
	.align	2
.LC110:
	.ascii	"\033[36m\000"
	.align	2
.LC111:
	.ascii	"\033[34m\000"
	.align	2
.LC112:
	.ascii	"\033[33m\000"
	.align	2
.LC113:
	.ascii	"\033[31m\000"
	.text
	.align	2
	.global	setColorPrint
	.syntax unified
	.arm
	.fpu softvfp
	.type	setColorPrint, %function
setColorPrint:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ldrls	pc, [pc, r3, asl #2]
	b	.L284
.L280:
	.word	.L283
	.word	.L282
	.word	.L281
	.word	.L279
.L283:
	ldr	r0, .L285
	bl	printf
	b	.L278
.L282:
	ldr	r0, .L285+4
	bl	printf
	b	.L278
.L281:
	ldr	r0, .L285+8
	bl	printf
	b	.L278
.L279:
	ldr	r0, .L285+12
	bl	printf
	nop
.L278:
.L284:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L286:
	.align	2
.L285:
	.word	.LC110
	.word	.LC111
	.word	.LC112
	.word	.LC113
	.size	setColorPrint, .-setColorPrint
	.section	.rodata
	.align	2
.LC114:
	.ascii	"\033[36m%s\033[0m\000"
	.align	2
.LC115:
	.ascii	"\033[34m%s\033[0m\000"
	.align	2
.LC116:
	.ascii	"\033[33m%s\033[0m\000"
	.align	2
.LC117:
	.ascii	"\033[31m%s\033[0m\000"
	.text
	.align	2
	.global	colorPrint
	.syntax unified
	.arm
	.fpu softvfp
	.type	colorPrint, %function
colorPrint:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r3, [fp, #-8]
	cmp	r3, #3
	ldrls	pc, [pc, r3, asl #2]
	b	.L294
.L290:
	.word	.L293
	.word	.L292
	.word	.L291
	.word	.L289
.L293:
	ldr	r1, [fp, #-12]
	ldr	r0, .L295
	bl	printf
	b	.L288
.L292:
	ldr	r1, [fp, #-12]
	ldr	r0, .L295+4
	bl	printf
	b	.L288
.L291:
	ldr	r1, [fp, #-12]
	ldr	r0, .L295+8
	bl	printf
	b	.L288
.L289:
	ldr	r1, [fp, #-12]
	ldr	r0, .L295+12
	bl	printf
	nop
.L288:
.L294:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L296:
	.align	2
.L295:
	.word	.LC114
	.word	.LC115
	.word	.LC116
	.word	.LC117
	.size	colorPrint, .-colorPrint
	.align	2
	.global	getLogNum
	.syntax unified
	.arm
	.fpu softvfp
	.type	getLogNum, %function
getLogNum:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L299
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r1, .L299
	str	r2, [r1]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L300:
	.align	2
.L299:
	.word	logNum.5738
	.size	getLogNum, .-getLogNum
	.section	.rodata
	.align	2
.LC118:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	logging
	.syntax unified
	.arm
	.fpu softvfp
	.type	logging, %function
logging:
	@ args = 4, pretend = 16, frame = 832
	@ frame_needed = 1, uses_anonymous_args = 1
	push	{r0, r1, r2, r3}
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #848
	ldr	r3, .L310
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-828]
	add	r3, fp, #8
	str	r3, [fp, #-832]
	ldr	r3, [fp, #4]
	cmp	r3, #41
	beq	.L309
	ldr	r2, [fp, #4]
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r3, r1, r3
	str	r2, [r3, #-404]
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r2, [r3]
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r3, r1, r3
	str	r2, [r3, #-804]
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
	b	.L304
.L307:
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r2, [fp, #-824]
	str	r2, [r3, #-404]
	ldr	r3, [fp, #-824]
	cmp	r3, #38
	beq	.L305
	ldr	r3, [fp, #-824]
	cmp	r3, #37
	beq	.L305
	ldr	r3, [fp, #-824]
	cmp	r3, #40
	beq	.L305
	ldr	r3, [fp, #-824]
	cmp	r3, #39
	bne	.L306
.L305:
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
	b	.L304
.L306:
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r2, [r3]
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r3, r1, r3
	str	r2, [r3, #-804]
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
.L304:
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-824]
	ldr	r3, [fp, #-824]
	cmp	r3, #41
	bne	.L307
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-820]
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-812]
	mov	r3, #1
	str	r3, [sp, #8]
	sub	r3, fp, #408
	str	r3, [sp, #4]
	sub	r3, fp, #808
	str	r3, [sp]
	ldr	r3, [fp, #-828]
	ldr	r2, [fp, #-812]
	ldr	r1, [fp, #-816]
	ldr	r0, [fp, #-820]
	bl	printLog
	b	.L301
.L309:
	nop
.L301:
	ldr	r3, .L310
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L308
	bl	__stack_chk_fail
.L308:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #16
	bx	lr
.L311:
	.align	2
.L310:
	.word	.LC118
	.size	logging, .-logging
	.section	.rodata
	.align	2
.LC119:
	.ascii	"[%s]: func:'%s' \342\206\222 line:%d (%d)%s\012%s\000"
	.align	2
.LC120:
	.ascii	" (%d)%s\012\000"
	.text
	.align	2
	.global	loggingMsg
	.syntax unified
	.arm
	.fpu softvfp
	.type	loggingMsg, %function
loggingMsg:
	@ args = 4, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	bl	getLogNum
	str	r0, [fp, #-8]
	ldr	r0, [fp, #4]
	bl	setColorPrint
	ldr	r2, .L313
	ldr	r3, [fp, #4]
	ldr	r1, [r2, r3, lsl #2]
	ldr	r3, [fp, #-16]
	str	r3, [sp, #8]
	ldr	r3, .L313+4
	str	r3, [sp, #4]
	ldr	r3, [fp, #-8]
	str	r3, [sp]
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-24]
	ldr	r0, .L313+8
	bl	printf
	ldr	r0, [fp, #4]
	bl	setColorPrint
	ldr	r2, .L313+4
	ldr	r1, [fp, #-8]
	ldr	r0, .L313+12
	bl	printf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L314:
	.align	2
.L313:
	.word	enumStrings
	.word	.LC104
	.word	.LC119
	.word	.LC120
	.size	loggingMsg, .-loggingMsg
	.section	.rodata
	.align	2
.LC121:
	.ascii	"[%s]: func:'%s' \342\206\222 line:%d (%d)\012\033[0"
	.ascii	"m\000"
	.align	2
.LC122:
	.ascii	" (%d)\012\033[0m\000"
	.text
	.align	2
	.global	printLog
	.syntax unified
	.arm
	.fpu softvfp
	.type	printLog, %function
printLog:
	@ args = 12, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	str	r2, [fp, #-32]
	str	r3, [fp, #-36]
	bl	getLogNum
	str	r0, [fp, #-12]
	ldrb	r3, [fp, #12]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L316
	ldr	r0, [fp, #-32]
	bl	setColorPrint
	ldr	r2, .L322
	ldr	r3, [fp, #-32]
	ldr	r1, [r2, r3, lsl #2]
	ldr	r3, [fp, #-12]
	str	r3, [sp]
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-24]
	ldr	r0, .L322+4
	bl	printf
.L316:
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L317
.L321:
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r2, [fp, #8]
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #37
	beq	.L318
	ldr	r3, [fp, #-8]
	cmp	r3, #38
	beq	.L318
	ldr	r3, [fp, #-8]
	cmp	r3, #40
	beq	.L318
	ldr	r3, [fp, #-8]
	cmp	r3, #39
	bne	.L319
.L318:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L320
.L319:
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	ldr	r2, [fp, #4]
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-16]
.L320:
	ldr	r1, [fp, #-8]
	ldr	r0, [fp, #-16]
	bl	output
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
.L317:
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-36]
	cmp	r2, r3
	blt	.L321
	ldr	r0, [fp, #-32]
	bl	setColorPrint
	ldr	r1, [fp, #-12]
	ldr	r0, .L322+8
	bl	printf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L323:
	.align	2
.L322:
	.word	enumStrings
	.word	.LC121
	.word	.LC122
	.size	printLog, .-printLog
	.align	2
	.global	loggingMsgNoHeader
	.syntax unified
	.arm
	.fpu softvfp
	.type	loggingMsgNoHeader, %function
loggingMsgNoHeader:
	@ args = 4, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	bl	getLogNum
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-16]
	ldr	r0, .L325
	bl	printf
	ldr	r0, [fp, #4]
	bl	setColorPrint
	ldr	r2, .L325+4
	ldr	r1, [fp, #-8]
	ldr	r0, .L325+8
	bl	printf
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L326:
	.align	2
.L325:
	.word	.LC25
	.word	.LC104
	.word	.LC120
	.size	loggingMsgNoHeader, .-loggingMsgNoHeader
	.section	.rodata
	.align	2
.LC123:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	loggingNoHeader
	.syntax unified
	.arm
	.fpu softvfp
	.type	loggingNoHeader, %function
loggingNoHeader:
	@ args = 4, pretend = 16, frame = 832
	@ frame_needed = 1, uses_anonymous_args = 1
	push	{r0, r1, r2, r3}
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #848
	ldr	r3, .L336
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #0
	str	r3, [fp, #-828]
	add	r3, fp, #8
	str	r3, [fp, #-832]
	ldr	r3, [fp, #4]
	cmp	r3, #41
	beq	.L335
	ldr	r2, [fp, #4]
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r3, r1, r3
	str	r2, [r3, #-404]
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r2, [r3]
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r3, r1, r3
	str	r2, [r3, #-804]
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
	b	.L330
.L333:
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r2, fp, #4
	add	r3, r2, r3
	ldr	r2, [fp, #-824]
	str	r2, [r3, #-404]
	ldr	r3, [fp, #-824]
	cmp	r3, #38
	beq	.L331
	ldr	r3, [fp, #-824]
	cmp	r3, #37
	beq	.L331
	ldr	r3, [fp, #-824]
	cmp	r3, #40
	beq	.L331
	ldr	r3, [fp, #-824]
	cmp	r3, #39
	bne	.L332
.L331:
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
	b	.L330
.L332:
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r2, [r3]
	ldr	r3, [fp, #-828]
	lsl	r3, r3, #2
	sub	r1, fp, #4
	add	r3, r1, r3
	str	r2, [r3, #-804]
	ldr	r3, [fp, #-828]
	add	r3, r3, #1
	str	r3, [fp, #-828]
.L330:
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-824]
	ldr	r3, [fp, #-824]
	cmp	r3, #41
	bne	.L333
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-820]
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-816]
	ldr	r3, [fp, #-832]
	add	r2, r3, #4
	str	r2, [fp, #-832]
	ldr	r3, [r3]
	str	r3, [fp, #-812]
	mov	r3, #0
	str	r3, [sp, #8]
	sub	r3, fp, #408
	str	r3, [sp, #4]
	sub	r3, fp, #808
	str	r3, [sp]
	ldr	r3, [fp, #-828]
	ldr	r2, [fp, #-812]
	ldr	r1, [fp, #-816]
	ldr	r0, [fp, #-820]
	bl	printLog
	b	.L327
.L335:
	nop
.L327:
	ldr	r3, .L336
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L334
	bl	__stack_chk_fail
.L334:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #16
	bx	lr
.L337:
	.align	2
.L336:
	.word	.LC123
	.size	loggingNoHeader, .-loggingNoHeader
	.local	instruction_num.5567
	.comm	instruction_num.5567,4,4
	.section	.rodata
	.align	2
	.type	__FUNCTION__.5568, %object
	.size	__FUNCTION__.5568, 20
__FUNCTION__.5568:
	.ascii	"process_instruction\000"
	.align	2
	.type	__FUNCTION__.5582, %object
	.size	__FUNCTION__.5582, 17
__FUNCTION__.5582:
	.ascii	"decodeAndExecute\000"
	.align	2
	.type	__FUNCTION__.5617, %object
	.size	__FUNCTION__.5617, 13
__FUNCTION__.5617:
	.ascii	"storeWordVal\000"
	.align	2
	.type	__FUNCTION__.5623, %object
	.size	__FUNCTION__.5623, 15
__FUNCTION__.5623:
	.ascii	"storeByteValue\000"
	.align	2
	.type	__FUNCTION__.5639, %object
	.size	__FUNCTION__.5639, 6
__FUNCTION__.5639:
	.ascii	"fetch\000"
	.local	logNum.5738
	.comm	logNum.5738,4,4
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
