	.file	"43974.c"
	.intel_syntax noprefix
	.text
	.globl	fp_add
	.type	fp_add, @function
fp_add:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	addss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	fp_add, .-fp_add
	.globl	fp_sub
	.type	fp_sub, @function
fp_sub:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	subss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	fp_sub, .-fp_sub
	.globl	fp_mul
	.type	fp_mul, @function
fp_mul:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	mulss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	fp_mul, .-fp_mul
	.globl	fp_div
	.type	fp_div, @function
fp_div:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	divss	xmm0, DWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	fp_div, .-fp_div
	.globl	fp_neg
	.type	fp_neg, @function
fp_neg:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	movss	xmm1, DWORD PTR .LC0[rip]
	xorps	xmm0, xmm1
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	fp_neg, .-fp_neg
	.globl	dp_add
	.type	dp_add, @function
dp_add:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	addsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	dp_add, .-dp_add
	.globl	dp_sub
	.type	dp_sub, @function
dp_sub:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	subsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	dp_sub, .-dp_sub
	.globl	dp_mul
	.type	dp_mul, @function
dp_mul:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	mulsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	dp_mul, .-dp_mul
	.globl	dp_div
	.type	dp_div, @function
dp_div:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	divsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	dp_div, .-dp_div
	.globl	dp_neg
	.type	dp_neg, @function
dp_neg:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	xmm1, QWORD PTR .LC1[rip]
	xorpd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	dp_neg, .-dp_neg
	.globl	fp_to_dp
	.type	fp_to_dp, @function
fp_to_dp:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	pxor	xmm0, xmm0
	cvtss2sd	xmm0, DWORD PTR -4[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	fp_to_dp, .-fp_to_dp
	.globl	dp_to_fp
	.type	dp_to_fp, @function
dp_to_fp:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	pxor	xmm0, xmm0
	cvtsd2ss	xmm0, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	dp_to_fp, .-dp_to_fp
	.globl	eqsf2
	.type	eqsf2, @function
eqsf2:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	ucomiss	xmm0, DWORD PTR -8[rbp]
	setnp	al
	mov	edx, 0
	movss	xmm0, DWORD PTR -4[rbp]
	ucomiss	xmm0, DWORD PTR -8[rbp]
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	eqsf2, .-eqsf2
	.globl	nesf2
	.type	nesf2, @function
nesf2:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	ucomiss	xmm0, DWORD PTR -8[rbp]
	setp	al
	mov	edx, 1
	movss	xmm0, DWORD PTR -4[rbp]
	ucomiss	xmm0, DWORD PTR -8[rbp]
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	nesf2, .-nesf2
	.globl	gtsf2
	.type	gtsf2, @function
gtsf2:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	comiss	xmm0, DWORD PTR -8[rbp]
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	gtsf2, .-gtsf2
	.globl	gesf2
	.type	gesf2, @function
gesf2:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -4[rbp]
	comiss	xmm0, DWORD PTR -8[rbp]
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	gesf2, .-gesf2
	.globl	ltsf2
	.type	ltsf2, @function
ltsf2:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -8[rbp]
	comiss	xmm0, DWORD PTR -4[rbp]
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	ltsf2, .-ltsf2
	.globl	lesf2
	.type	lesf2, @function
lesf2:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	DWORD PTR -8[rbp], xmm1
	movss	xmm0, DWORD PTR -8[rbp]
	comiss	xmm0, DWORD PTR -4[rbp]
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	lesf2, .-lesf2
	.globl	eqdf2
	.type	eqdf2, @function
eqdf2:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	setnp	al
	mov	edx, 0
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	eqdf2, .-eqdf2
	.globl	nedf2
	.type	nedf2, @function
nedf2:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	setp	al
	mov	edx, 1
	movsd	xmm0, QWORD PTR -8[rbp]
	ucomisd	xmm0, QWORD PTR -16[rbp]
	cmovne	eax, edx
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	nedf2, .-nedf2
	.globl	gtdf2
	.type	gtdf2, @function
gtdf2:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	comisd	xmm0, QWORD PTR -16[rbp]
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	gtdf2, .-gtdf2
	.globl	gedf2
	.type	gedf2, @function
gedf2:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -8[rbp]
	comisd	xmm0, QWORD PTR -16[rbp]
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	gedf2, .-gedf2
	.globl	ltdf2
	.type	ltdf2, @function
ltdf2:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -16[rbp]
	comisd	xmm0, QWORD PTR -8[rbp]
	seta	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	ltdf2, .-ltdf2
	.globl	ledf2
	.type	ledf2, @function
ledf2:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	QWORD PTR -16[rbp], xmm1
	movsd	xmm0, QWORD PTR -16[rbp]
	comisd	xmm0, QWORD PTR -8[rbp]
	setnb	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	ledf2, .-ledf2
	.globl	floatsisf
	.type	floatsisf, @function
floatsisf:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	pxor	xmm0, xmm0
	cvtsi2ss	xmm0, DWORD PTR -4[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	floatsisf, .-floatsisf
	.globl	floatsidf
	.type	floatsidf, @function
floatsidf:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, DWORD PTR -4[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	floatsidf, .-floatsidf
	.globl	fixsfsi
	.type	fixsfsi, @function
fixsfsi:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	fixsfsi, .-fixsfsi
	.globl	fixdfsi
	.type	fixdfsi, @function
fixdfsi:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	eax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	fixdfsi, .-fixdfsi
	.globl	fixunssfsi
	.type	fixunssfsi, @function
fixunssfsi:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	DWORD PTR -4[rbp], xmm0
	movss	xmm0, DWORD PTR -4[rbp]
	cvttss2si	rax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	fixunssfsi, .-fixunssfsi
	.globl	fixunsdfsi
	.type	fixunsdfsi, @function
fixunsdfsi:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	cvttsd2si	rax, xmm0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	fixunsdfsi, .-fixunsdfsi
	.globl	fail_count
	.bss
	.align 4
	.type	fail_count, @object
	.size	fail_count, 4
fail_count:
	.zero	4
	.section	.rodata
.LC2:
	.string	"Test failed: %s\n"
	.text
	.globl	fail
	.type	fail, @function
fail:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, DWORD PTR fail_count[rip]
	add	eax, 1
	mov	DWORD PTR fail_count[rip], eax
	mov	rax, QWORD PTR stderr[rip]
	mov	rdx, QWORD PTR -8[rbp]
	lea	rsi, .LC2[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	fail, .-fail
	.section	.rodata
.LC5:
	.string	"fp_add 1+1"
.LC7:
	.string	"fp_sub 3-2"
.LC9:
	.string	"fp_mul 2*3"
.LC11:
	.string	"fp_div 3/2"
.LC13:
	.string	"fp_neg 1"
.LC16:
	.string	"dp_add 1+1"
.LC18:
	.string	"dp_sub 3-2"
.LC20:
	.string	"dp_mul 2*3"
.LC22:
	.string	"dp_div 3/2"
.LC24:
	.string	"dp_neg 1"
.LC25:
	.string	"fp_to_dp 1.5"
.LC26:
	.string	"dp_to_fp 1.5"
.LC27:
	.string	"floatsisf 1"
.LC28:
	.string	"floatsidf 1"
.LC30:
	.string	"fixsfsi 1.42"
.LC31:
	.string	"fixunssfsi 1.42"
.LC33:
	.string	"fixdfsi 1.42"
.LC34:
	.string	"fixunsdfsi 1.42"
.LC35:
	.string	"eqsf2 1==1"
.LC36:
	.string	"eqsf2 1==2"
.LC37:
	.string	"nesf2 1!=1"
.LC38:
	.string	"gtsf2 2>1"
.LC39:
	.string	"gtsf2 1>1"
.LC41:
	.string	"gtsf2 0>1"
.LC42:
	.string	"gesf2 2>=1"
.LC43:
	.string	"gesf2 1>=1"
.LC44:
	.string	"gesf2 0>=1"
.LC45:
	.string	"ltsf2 1<2"
.LC46:
	.string	"ltsf2 1<1"
.LC47:
	.string	"ltsf2 1<0"
.LC48:
	.string	"lesf2 1<=2"
.LC49:
	.string	"lesf2 1<=1"
.LC50:
	.string	"lesf2 1<=0"
	.text
	.globl	main
	.type	main, @function
main:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	fp_add
	movd	eax, xmm0
	movd	xmm2, eax
	ucomiss	xmm2, DWORD PTR .LC4[rip]
	jp	.L112
	movd	xmm3, eax
	comiss	xmm3, DWORD PTR .LC4[rip]
	je	.L63
.L112:
	lea	rdi, .LC5[rip]
	call	fail
.L63:
	movss	xmm1, DWORD PTR .LC4[rip]
	movss	xmm0, DWORD PTR .LC6[rip]
	call	fp_sub
	movd	eax, xmm0
	movss	xmm0, DWORD PTR .LC3[rip]
	movd	xmm4, eax
	ucomiss	xmm4, xmm0
	jp	.L113
	movss	xmm0, DWORD PTR .LC3[rip]
	movd	xmm5, eax
	comiss	xmm5, xmm0
	je	.L65
.L113:
	lea	rdi, .LC7[rip]
	call	fail
.L65:
	movss	xmm1, DWORD PTR .LC6[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	call	fp_mul
	movd	eax, xmm0
	movd	xmm6, eax
	ucomiss	xmm6, DWORD PTR .LC8[rip]
	jp	.L114
	movd	xmm7, eax
	comiss	xmm7, DWORD PTR .LC8[rip]
	je	.L67
.L114:
	lea	rdi, .LC9[rip]
	call	fail
.L67:
	movss	xmm1, DWORD PTR .LC4[rip]
	movss	xmm0, DWORD PTR .LC6[rip]
	call	fp_div
	movd	eax, xmm0
	movd	xmm2, eax
	ucomiss	xmm2, DWORD PTR .LC10[rip]
	jp	.L115
	movd	xmm3, eax
	comiss	xmm3, DWORD PTR .LC10[rip]
	je	.L69
.L115:
	lea	rdi, .LC11[rip]
	call	fail
.L69:
	movss	xmm0, DWORD PTR .LC3[rip]
	call	fp_neg
	movd	eax, xmm0
	movss	xmm0, DWORD PTR .LC12[rip]
	movd	xmm4, eax
	ucomiss	xmm4, xmm0
	jp	.L116
	movss	xmm0, DWORD PTR .LC12[rip]
	movd	xmm5, eax
	comiss	xmm5, xmm0
	je	.L71
.L116:
	lea	rdi, .LC13[rip]
	call	fail
.L71:
	movsd	xmm0, QWORD PTR .LC14[rip]
	mov	rax, QWORD PTR .LC14[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	dp_add
	movq	rax, xmm0
	movq	xmm6, rax
	ucomisd	xmm6, QWORD PTR .LC15[rip]
	jp	.L117
	movq	xmm7, rax
	comisd	xmm7, QWORD PTR .LC15[rip]
	je	.L73
.L117:
	lea	rdi, .LC16[rip]
	call	fail
.L73:
	movsd	xmm0, QWORD PTR .LC15[rip]
	mov	rax, QWORD PTR .LC17[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	dp_sub
	movq	rax, xmm0
	movsd	xmm0, QWORD PTR .LC14[rip]
	movq	xmm2, rax
	ucomisd	xmm2, xmm0
	jp	.L118
	movsd	xmm0, QWORD PTR .LC14[rip]
	movq	xmm3, rax
	comisd	xmm3, xmm0
	je	.L75
.L118:
	lea	rdi, .LC18[rip]
	call	fail
.L75:
	movsd	xmm0, QWORD PTR .LC17[rip]
	mov	rax, QWORD PTR .LC15[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	dp_mul
	movq	rax, xmm0
	movq	xmm4, rax
	ucomisd	xmm4, QWORD PTR .LC19[rip]
	jp	.L119
	movq	xmm5, rax
	comisd	xmm5, QWORD PTR .LC19[rip]
	je	.L77
.L119:
	lea	rdi, .LC20[rip]
	call	fail
.L77:
	movsd	xmm0, QWORD PTR .LC15[rip]
	mov	rax, QWORD PTR .LC17[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	dp_div
	movq	rax, xmm0
	movq	xmm6, rax
	ucomisd	xmm6, QWORD PTR .LC21[rip]
	jp	.L120
	movq	xmm7, rax
	comisd	xmm7, QWORD PTR .LC21[rip]
	je	.L79
.L120:
	lea	rdi, .LC22[rip]
	call	fail
.L79:
	mov	rax, QWORD PTR .LC14[rip]
	movq	xmm0, rax
	call	dp_neg
	movq	rax, xmm0
	movsd	xmm0, QWORD PTR .LC23[rip]
	movq	xmm2, rax
	ucomisd	xmm2, xmm0
	jp	.L121
	movsd	xmm0, QWORD PTR .LC23[rip]
	movq	xmm3, rax
	comisd	xmm3, xmm0
	je	.L81
.L121:
	lea	rdi, .LC24[rip]
	call	fail
.L81:
	movss	xmm0, DWORD PTR .LC10[rip]
	call	fp_to_dp
	movq	rax, xmm0
	movq	xmm4, rax
	ucomisd	xmm4, QWORD PTR .LC21[rip]
	jp	.L122
	movq	xmm5, rax
	comisd	xmm5, QWORD PTR .LC21[rip]
	je	.L83
.L122:
	lea	rdi, .LC25[rip]
	call	fail
.L83:
	mov	rax, QWORD PTR .LC21[rip]
	movq	xmm0, rax
	call	dp_to_fp
	movd	eax, xmm0
	movd	xmm6, eax
	ucomiss	xmm6, DWORD PTR .LC10[rip]
	jp	.L123
	movd	xmm7, eax
	comiss	xmm7, DWORD PTR .LC10[rip]
	je	.L85
.L123:
	lea	rdi, .LC26[rip]
	call	fail
.L85:
	mov	edi, 1
	call	floatsisf
	movd	eax, xmm0
	movss	xmm0, DWORD PTR .LC3[rip]
	movd	xmm2, eax
	ucomiss	xmm2, xmm0
	jp	.L124
	movss	xmm0, DWORD PTR .LC3[rip]
	movd	xmm3, eax
	comiss	xmm3, xmm0
	je	.L87
.L124:
	lea	rdi, .LC27[rip]
	call	fail
.L87:
	mov	edi, 1
	call	floatsidf
	movq	rax, xmm0
	movsd	xmm0, QWORD PTR .LC14[rip]
	movq	xmm4, rax
	ucomisd	xmm4, xmm0
	jp	.L125
	movsd	xmm0, QWORD PTR .LC14[rip]
	movq	xmm5, rax
	comisd	xmm5, xmm0
	je	.L89
.L125:
	lea	rdi, .LC28[rip]
	call	fail
.L89:
	movss	xmm0, DWORD PTR .LC29[rip]
	call	fixsfsi
	cmp	eax, 1
	je	.L91
	lea	rdi, .LC30[rip]
	call	fail
.L91:
	movss	xmm0, DWORD PTR .LC29[rip]
	call	fixunssfsi
	cmp	eax, 1
	je	.L92
	lea	rdi, .LC31[rip]
	call	fail
.L92:
	mov	rax, QWORD PTR .LC32[rip]
	movq	xmm0, rax
	call	fixdfsi
	cmp	eax, 1
	je	.L93
	lea	rdi, .LC33[rip]
	call	fail
.L93:
	mov	rax, QWORD PTR .LC32[rip]
	movq	xmm0, rax
	call	fixunsdfsi
	cmp	eax, 1
	je	.L94
	lea	rdi, .LC34[rip]
	call	fail
.L94:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	eqsf2
	test	eax, eax
	jne	.L95
	lea	rdi, .LC35[rip]
	call	fail
.L95:
	movss	xmm1, DWORD PTR .LC4[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	eqsf2
	test	eax, eax
	je	.L96
	lea	rdi, .LC36[rip]
	call	fail
.L96:
	movss	xmm1, DWORD PTR .LC4[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	nesf2
	test	eax, eax
	jne	.L97
	lea	rdi, .LC37[rip]
	call	fail
.L97:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	nesf2
	test	eax, eax
	je	.L98
	lea	rdi, .LC37[rip]
	call	fail
.L98:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	call	gtsf2
	test	eax, eax
	jne	.L99
	lea	rdi, .LC38[rip]
	call	fail
.L99:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	gtsf2
	test	eax, eax
	je	.L100
	lea	rdi, .LC39[rip]
	call	fail
.L100:
	movss	xmm1, DWORD PTR .LC3[rip]
	pxor	xmm0, xmm0
	call	gtsf2
	test	eax, eax
	je	.L101
	lea	rdi, .LC41[rip]
	call	fail
.L101:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC4[rip]
	call	gesf2
	test	eax, eax
	jne	.L102
	lea	rdi, .LC42[rip]
	call	fail
.L102:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	gesf2
	test	eax, eax
	jne	.L103
	lea	rdi, .LC43[rip]
	call	fail
.L103:
	movss	xmm1, DWORD PTR .LC3[rip]
	pxor	xmm0, xmm0
	call	gesf2
	test	eax, eax
	je	.L104
	lea	rdi, .LC44[rip]
	call	fail
.L104:
	movss	xmm1, DWORD PTR .LC4[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	ltsf2
	test	eax, eax
	jne	.L105
	lea	rdi, .LC45[rip]
	call	fail
.L105:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	ltsf2
	test	eax, eax
	je	.L106
	lea	rdi, .LC46[rip]
	call	fail
.L106:
	pxor	xmm1, xmm1
	movss	xmm0, DWORD PTR .LC3[rip]
	call	ltsf2
	test	eax, eax
	je	.L107
	lea	rdi, .LC47[rip]
	call	fail
.L107:
	movss	xmm1, DWORD PTR .LC4[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	lesf2
	test	eax, eax
	jne	.L108
	lea	rdi, .LC48[rip]
	call	fail
.L108:
	movss	xmm1, DWORD PTR .LC3[rip]
	movss	xmm0, DWORD PTR .LC3[rip]
	call	lesf2
	test	eax, eax
	jne	.L109
	lea	rdi, .LC49[rip]
	call	fail
.L109:
	pxor	xmm1, xmm1
	movss	xmm0, DWORD PTR .LC3[rip]
	call	lesf2
	test	eax, eax
	je	.L110
	lea	rdi, .LC50[rip]
	call	fail
.L110:
	mov	eax, DWORD PTR fail_count[rip]
	test	eax, eax
	je	.L111
	call	abort@PLT
.L111:
	mov	edi, 0
	call	exit@PLT
	.cfi_endproc
.LFE31:
	.size	main, .-main
	.section	.rodata
	.align 16
.LC0:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.align 16
.LC1:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.align 4
.LC3:
	.long	1065353216
	.align 4
.LC4:
	.long	1073741824
	.align 4
.LC6:
	.long	1077936128
	.align 4
.LC8:
	.long	1086324736
	.align 4
.LC10:
	.long	1069547520
	.align 4
.LC12:
	.long	-1082130432
	.align 8
.LC14:
	.long	0
	.long	1072693248
	.align 8
.LC15:
	.long	0
	.long	1073741824
	.align 8
.LC17:
	.long	0
	.long	1074266112
	.align 8
.LC19:
	.long	0
	.long	1075314688
	.align 8
.LC21:
	.long	0
	.long	1073217536
	.align 8
.LC23:
	.long	0
	.long	-1074790400
	.align 4
.LC29:
	.long	1068876431
	.align 8
.LC32:
	.long	-343597384
	.long	1073133649
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"43974.c"
	.text
	.global	__aeabi_fadd
	.align	2
	.global	fp_add
	.syntax unified
	.arm
	.fpu softvfp
	.type	fp_add, %function
fp_add:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fp_add, .-fp_add
	.global	__aeabi_fsub
	.align	2
	.global	fp_sub
	.syntax unified
	.arm
	.fpu softvfp
	.type	fp_sub, %function
fp_sub:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fsub
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fp_sub, .-fp_sub
	.global	__aeabi_fmul
	.align	2
	.global	fp_mul
	.syntax unified
	.arm
	.fpu softvfp
	.type	fp_mul, %function
fp_mul:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fp_mul, .-fp_mul
	.global	__aeabi_fdiv
	.align	2
	.global	fp_div
	.syntax unified
	.arm
	.fpu softvfp
	.type	fp_div, %function
fp_div:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	str	r1, [fp, #-12]	@ float
	ldr	r1, [fp, #-12]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fp_div, .-fp_div
	.align	2
	.global	fp_neg
	.syntax unified
	.arm
	.fpu softvfp
	.type	fp_neg, %function
fp_neg:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]	@ float
	ldr	r3, [fp, #-8]
	eor	r3, r3, #-2147483648
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fp_neg, .-fp_neg
	.global	__aeabi_dadd
	.align	2
	.global	dp_add
	.syntax unified
	.arm
	.fpu softvfp
	.type	dp_add, %function
dp_add:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	dp_add, .-dp_add
	.global	__aeabi_dsub
	.align	2
	.global	dp_sub
	.syntax unified
	.arm
	.fpu softvfp
	.type	dp_sub, %function
dp_sub:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	dp_sub, .-dp_sub
	.global	__aeabi_dmul
	.align	2
	.global	dp_mul
	.syntax unified
	.arm
	.fpu softvfp
	.type	dp_mul, %function
dp_mul:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	dp_mul, .-dp_mul
	.global	__aeabi_ddiv
	.align	2
	.global	dp_div
	.syntax unified
	.arm
	.fpu softvfp
	.type	dp_div, %function
dp_div:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	dp_div, .-dp_div
	.align	2
	.global	dp_neg
	.syntax unified
	.arm
	.fpu softvfp
	.type	dp_neg, %function
dp_neg:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r2, [fp, #-12]
	ldr	r1, [fp, #-8]
	eor	r3, r1, #-2147483648
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	dp_neg, .-dp_neg
	.global	__aeabi_f2d
	.align	2
	.global	fp_to_dp
	.syntax unified
	.arm
	.fpu softvfp
	.type	fp_to_dp, %function
fp_to_dp:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fp_to_dp, .-fp_to_dp
	.global	__aeabi_d2f
	.align	2
	.global	dp_to_fp
	.syntax unified
	.arm
	.fpu softvfp
	.type	dp_to_fp, %function
dp_to_fp:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	dp_to_fp, .-dp_to_fp
	.global	__aeabi_fcmpeq
	.align	2
	.global	eqsf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	eqsf2, %function
eqsf2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-20]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L26
	mov	r3, #0
	mov	r4, r3
.L26:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	eqsf2, .-eqsf2
	.align	2
	.global	nesf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nesf2, %function
nesf2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-20]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L29
	mov	r3, #0
	mov	r4, r3
.L29:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	nesf2, .-nesf2
	.global	__aeabi_fcmpgt
	.align	2
	.global	gtsf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gtsf2, %function
gtsf2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-20]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L32
	mov	r3, #0
	mov	r4, r3
.L32:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	gtsf2, .-gtsf2
	.global	__aeabi_fcmpge
	.align	2
	.global	gesf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gesf2, %function
gesf2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-20]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L35
	mov	r3, #0
	mov	r4, r3
.L35:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	gesf2, .-gesf2
	.global	__aeabi_fcmplt
	.align	2
	.global	ltsf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ltsf2, %function
ltsf2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-20]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L38
	mov	r3, #0
	mov	r4, r3
.L38:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	ltsf2, .-ltsf2
	.global	__aeabi_fcmple
	.align	2
	.global	lesf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	lesf2, %function
lesf2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]	@ float
	str	r1, [fp, #-20]	@ float
	mov	r3, #1
	mov	r4, r3
	ldr	r1, [fp, #-20]	@ float
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L41
	mov	r3, #0
	mov	r4, r3
.L41:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	lesf2, .-lesf2
	.global	__aeabi_dcmpeq
	.align	2
	.global	eqdf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	eqdf2, %function
eqdf2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L44
	mov	r3, #0
	mov	r4, r3
.L44:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	eqdf2, .-eqdf2
	.align	2
	.global	nedf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	nedf2, %function
nedf2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	beq	.L47
	mov	r3, #0
	mov	r4, r3
.L47:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	nedf2, .-nedf2
	.global	__aeabi_dcmpgt
	.align	2
	.global	gtdf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gtdf2, %function
gtdf2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	bne	.L50
	mov	r3, #0
	mov	r4, r3
.L50:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	gtdf2, .-gtdf2
	.global	__aeabi_dcmpge
	.align	2
	.global	gedf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	gedf2, %function
gedf2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	bne	.L53
	mov	r3, #0
	mov	r4, r3
.L53:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	gedf2, .-gedf2
	.global	__aeabi_dcmplt
	.align	2
	.global	ltdf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ltdf2, %function
ltdf2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L56
	mov	r3, #0
	mov	r4, r3
.L56:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	ltdf2, .-ltdf2
	.global	__aeabi_dcmple
	.align	2
	.global	ledf2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ledf2, %function
ledf2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r3, #1
	mov	r4, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	bne	.L59
	mov	r3, #0
	mov	r4, r3
.L59:
	and	r3, r4, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
	.size	ledf2, .-ledf2
	.global	__aeabi_i2f
	.align	2
	.global	floatsisf
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatsisf, %function
floatsisf:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	floatsisf, .-floatsisf
	.global	__aeabi_i2d
	.align	2
	.global	floatsidf
	.syntax unified
	.arm
	.fpu softvfp
	.type	floatsidf, %function
floatsidf:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	floatsidf, .-floatsidf
	.global	__aeabi_f2iz
	.align	2
	.global	fixsfsi
	.syntax unified
	.arm
	.fpu softvfp
	.type	fixsfsi, %function
fixsfsi:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2iz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fixsfsi, .-fixsfsi
	.global	__aeabi_d2iz
	.align	2
	.global	fixdfsi
	.syntax unified
	.arm
	.fpu softvfp
	.type	fixdfsi, %function
fixdfsi:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2iz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fixdfsi, .-fixdfsi
	.global	__aeabi_f2uiz
	.align	2
	.global	fixunssfsi
	.syntax unified
	.arm
	.fpu softvfp
	.type	fixunssfsi, %function
fixunssfsi:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]	@ float
	ldr	r0, [fp, #-8]	@ float
	bl	__aeabi_f2uiz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fixunssfsi, .-fixunssfsi
	.global	__aeabi_d2uiz
	.align	2
	.global	fixunsdfsi
	.syntax unified
	.arm
	.fpu softvfp
	.type	fixunsdfsi, %function
fixunsdfsi:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2uiz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	fixunsdfsi, .-fixunsdfsi
	.global	fail_count
	.bss
	.align	2
	.type	fail_count, %object
	.size	fail_count, 4
fail_count:
	.space	4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"Test failed: %s\012\000"
	.text
	.align	2
	.global	fail
	.syntax unified
	.arm
	.fpu softvfp
	.type	fail, %function
fail:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L74
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L74
	str	r3, [r2]
	ldr	r3, .L74+4
	ldr	r3, [r3]
	ldr	r2, [fp, #-8]
	ldr	r1, .L74+8
	mov	r0, r3
	bl	fprintf
	nop
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L75:
	.align	2
.L74:
	.word	fail_count
	.word	stderr
	.word	.LC0
	.size	fail, .-fail
	.section	.rodata
	.align	2
.LC1:
	.ascii	"fp_add 1+1\000"
	.align	2
.LC2:
	.ascii	"fp_sub 3-2\000"
	.align	2
.LC3:
	.ascii	"fp_mul 2*3\000"
	.align	2
.LC4:
	.ascii	"fp_div 3/2\000"
	.align	2
.LC5:
	.ascii	"fp_neg 1\000"
	.align	2
.LC6:
	.ascii	"dp_add 1+1\000"
	.align	2
.LC7:
	.ascii	"dp_sub 3-2\000"
	.align	2
.LC8:
	.ascii	"dp_mul 2*3\000"
	.align	2
.LC9:
	.ascii	"dp_div 3/2\000"
	.align	2
.LC10:
	.ascii	"dp_neg 1\000"
	.align	2
.LC11:
	.ascii	"fp_to_dp 1.5\000"
	.align	2
.LC12:
	.ascii	"dp_to_fp 1.5\000"
	.align	2
.LC13:
	.ascii	"floatsisf 1\000"
	.align	2
.LC14:
	.ascii	"floatsidf 1\000"
	.align	2
.LC15:
	.ascii	"fixsfsi 1.42\000"
	.align	2
.LC16:
	.ascii	"fixunssfsi 1.42\000"
	.align	2
.LC17:
	.ascii	"fixdfsi 1.42\000"
	.align	2
.LC18:
	.ascii	"fixunsdfsi 1.42\000"
	.align	2
.LC19:
	.ascii	"eqsf2 1==1\000"
	.align	2
.LC20:
	.ascii	"eqsf2 1==2\000"
	.align	2
.LC21:
	.ascii	"nesf2 1!=1\000"
	.align	2
.LC22:
	.ascii	"gtsf2 2>1\000"
	.align	2
.LC23:
	.ascii	"gtsf2 1>1\000"
	.align	2
.LC24:
	.ascii	"gtsf2 0>1\000"
	.align	2
.LC25:
	.ascii	"gesf2 2>=1\000"
	.align	2
.LC26:
	.ascii	"gesf2 1>=1\000"
	.align	2
.LC27:
	.ascii	"gesf2 0>=1\000"
	.align	2
.LC28:
	.ascii	"ltsf2 1<2\000"
	.align	2
.LC29:
	.ascii	"ltsf2 1<1\000"
	.align	2
.LC30:
	.ascii	"ltsf2 1<0\000"
	.align	2
.LC31:
	.ascii	"lesf2 1<=2\000"
	.align	2
.LC32:
	.ascii	"lesf2 1<=1\000"
	.align	2
.LC33:
	.ascii	"lesf2 1<=0\000"
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r1, #1065353216
	mov	r0, #1065353216
	bl	fp_add
	mov	r3, r0
	mov	r1, #1073741824
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L77
	ldr	r0, .L140
	bl	fail
.L77:
	mov	r1, #1073741824
	ldr	r0, .L140+4
	bl	fp_sub
	mov	r3, r0
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L79
	ldr	r0, .L140+8
	bl	fail
.L79:
	ldr	r1, .L140+4
	mov	r0, #1073741824
	bl	fp_mul
	mov	r3, r0
	ldr	r1, .L140+12
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L81
	ldr	r0, .L140+16
	bl	fail
.L81:
	mov	r1, #1073741824
	ldr	r0, .L140+4
	bl	fp_div
	mov	r3, r0
	mov	r1, #1069547520
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L83
	ldr	r0, .L140+20
	bl	fail
.L83:
	mov	r0, #1065353216
	bl	fp_neg
	mov	r3, r0
	ldr	r1, .L140+24
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L85
	ldr	r0, .L140+28
	bl	fail
.L85:
	mov	r2, #0
	ldr	r3, .L140+32
	mov	r0, #0
	ldr	r1, .L140+32
	bl	dp_add
	mov	r2, #0
	mov	r3, #1073741824
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L87
	ldr	r0, .L140+36
	bl	fail
.L87:
	mov	r2, #0
	mov	r3, #1073741824
	mov	r0, #0
	ldr	r1, .L140+40
	bl	dp_sub
	mov	r2, #0
	ldr	r3, .L140+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L89
	ldr	r0, .L140+44
	bl	fail
.L89:
	mov	r2, #0
	ldr	r3, .L140+40
	mov	r0, #0
	mov	r1, #1073741824
	bl	dp_mul
	mov	r2, #0
	ldr	r3, .L140+48
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L91
	ldr	r0, .L140+52
	bl	fail
.L91:
	mov	r2, #0
	mov	r3, #1073741824
	mov	r0, #0
	ldr	r1, .L140+40
	bl	dp_div
	mov	r2, #0
	ldr	r3, .L140+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L93
	ldr	r0, .L140+60
	bl	fail
.L93:
	mov	r0, #0
	ldr	r1, .L140+32
	bl	dp_neg
	mov	r2, #0
	ldr	r3, .L140+64
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L95
	ldr	r0, .L140+68
	bl	fail
.L95:
	mov	r0, #1069547520
	bl	fp_to_dp
	mov	r2, #0
	ldr	r3, .L140+56
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L97
	ldr	r0, .L140+72
	bl	fail
.L97:
	mov	r0, #0
	ldr	r1, .L140+56
	bl	dp_to_fp
	mov	r3, r0
	mov	r1, #1069547520
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L99
	ldr	r0, .L140+76
	bl	fail
.L99:
	mov	r0, #1
	bl	floatsisf
	mov	r3, r0
	mov	r1, #1065353216
	mov	r0, r3
	bl	__aeabi_fcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L101
	ldr	r0, .L140+80
	bl	fail
.L101:
	mov	r0, #1
	bl	floatsidf
	mov	r2, #0
	ldr	r3, .L140+32
	bl	__aeabi_dcmpeq
	mov	r3, r0
	cmp	r3, #0
	bne	.L103
	ldr	r0, .L140+84
	bl	fail
.L103:
	ldr	r0, .L140+88
	bl	fixsfsi
	mov	r3, r0
	cmp	r3, #1
	beq	.L105
	ldr	r0, .L140+92
	bl	fail
.L105:
	ldr	r0, .L140+88
	bl	fixunssfsi
	mov	r3, r0
	cmp	r3, #1
	beq	.L106
	ldr	r0, .L140+96
	bl	fail
.L106:
	ldr	r0, .L140+100
	ldr	r1, .L140+104
	bl	fixdfsi
	mov	r3, r0
	cmp	r3, #1
	beq	.L107
	ldr	r0, .L140+108
	bl	fail
.L107:
	ldr	r0, .L140+100
	ldr	r1, .L140+104
	bl	fixunsdfsi
	mov	r3, r0
	cmp	r3, #1
	beq	.L108
	ldr	r0, .L140+112
	bl	fail
.L108:
	mov	r1, #1065353216
	mov	r0, #1065353216
	bl	eqsf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L109
	ldr	r0, .L140+116
	bl	fail
.L109:
	mov	r1, #1073741824
	mov	r0, #1065353216
	bl	eqsf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L110
	ldr	r0, .L140+120
	bl	fail
.L110:
	mov	r1, #1073741824
	mov	r0, #1065353216
	bl	nesf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L111
	ldr	r0, .L140+124
	bl	fail
.L111:
	mov	r1, #1065353216
	mov	r0, #1065353216
	bl	nesf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L112
	ldr	r0, .L140+124
	bl	fail
.L112:
	mov	r1, #1065353216
	mov	r0, #1073741824
	bl	gtsf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L113
	ldr	r0, .L140+128
	bl	fail
.L113:
	mov	r1, #1065353216
	mov	r0, #1065353216
	bl	gtsf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L114
	ldr	r0, .L140+132
	bl	fail
.L114:
	mov	r1, #1065353216
	mov	r0, #0
	bl	gtsf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L115
	ldr	r0, .L140+136
	bl	fail
.L115:
	mov	r1, #1065353216
	mov	r0, #1073741824
	bl	gesf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L116
	ldr	r0, .L140+140
	bl	fail
.L116:
	mov	r1, #1065353216
	mov	r0, #1065353216
	bl	gesf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L117
	ldr	r0, .L140+144
	bl	fail
.L117:
	mov	r1, #1065353216
	mov	r0, #0
	bl	gesf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L118
	ldr	r0, .L140+148
	bl	fail
.L118:
	mov	r1, #1073741824
	mov	r0, #1065353216
	bl	ltsf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L119
	ldr	r0, .L140+152
	bl	fail
.L119:
	mov	r1, #1065353216
	mov	r0, #1065353216
	bl	ltsf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L120
	ldr	r0, .L140+156
	bl	fail
.L120:
	mov	r1, #0
	mov	r0, #1065353216
	bl	ltsf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L121
	ldr	r0, .L140+160
	bl	fail
.L121:
	mov	r1, #1073741824
	mov	r0, #1065353216
	bl	lesf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L122
	ldr	r0, .L140+164
	bl	fail
.L122:
	mov	r1, #1065353216
	mov	r0, #1065353216
	bl	lesf2
	mov	r3, r0
	cmp	r3, #0
	bne	.L123
	ldr	r0, .L140+168
	bl	fail
.L123:
	mov	r1, #0
	mov	r0, #1065353216
	bl	lesf2
	mov	r3, r0
	cmp	r3, #0
	beq	.L124
	ldr	r0, .L140+172
	bl	fail
.L124:
	ldr	r3, .L140+176
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L125
	bl	abort
.L125:
	mov	r0, #0
	bl	exit
.L141:
	.align	2
.L140:
	.word	.LC1
	.word	1077936128
	.word	.LC2
	.word	1086324736
	.word	.LC3
	.word	.LC4
	.word	-1082130432
	.word	.LC5
	.word	1072693248
	.word	.LC6
	.word	1074266112
	.word	.LC7
	.word	1075314688
	.word	.LC8
	.word	1073217536
	.word	.LC9
	.word	-1074790400
	.word	.LC10
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	1068876431
	.word	.LC15
	.word	.LC16
	.word	-343597384
	.word	1073133649
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.word	.LC20
	.word	.LC21
	.word	.LC22
	.word	.LC23
	.word	.LC24
	.word	.LC25
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.word	fail_count
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
