	.file	"247151.c"
	.intel_syntax noprefix
	.text
	.local	stack
	.comm	stack,1024,32
	.local	registers
	.comm	registers,48,32
	.globl	instructions
	.bss
	.align 8
	.type	instructions, @object
	.size	instructions, 8
instructions:
	.zero	8
	.globl	instruction_count
	.align 4
	.type	instruction_count, @object
	.size	instruction_count, 4
instruction_count:
	.zero	4
	.globl	instruction_space
	.data
	.align 4
	.type	instruction_space, @object
	.size	instruction_space, 4
instruction_space:
	.long	4
	.type	running, @object
	.size	running, 1
running:
	.byte	1
	.globl	is_jmp
	.bss
	.type	is_jmp, @object
	.size	is_jmp, 1
is_jmp:
	.zero	1
	.section	.rodata
.LC0:
	.string	"0x%04d "
	.text
	.globl	print_stack
	.type	print_stack, @function
print_stack:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], 0
	jmp	.L2
.L4:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, eax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 1
	and	eax, 3
	test	eax, eax
	jne	.L3
	mov	edi, 10
	call	putchar@PLT
.L3:
	add	DWORD PTR -4[rbp], 1
.L2:
	mov	eax, DWORD PTR registers[rip+44]
	cmp	DWORD PTR -4[rbp], eax
	jl	.L4
	mov	eax, DWORD PTR registers[rip+44]
	test	eax, eax
	je	.L6
	mov	edi, 10
	call	putchar@PLT
.L6:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	print_stack, .-print_stack
	.section	.rodata
.LC1:
	.string	"Register Dump:"
.LC2:
	.string	"%04d "
	.text
	.globl	print_registers
	.type	print_registers, @function
print_registers:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	lea	rdi, .LC1[rip]
	call	puts@PLT
	mov	DWORD PTR -4[rbp], 0
	jmp	.L8
.L10:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, registers[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, eax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR -4[rbp]
	add	eax, 1
	and	eax, 3
	test	eax, eax
	jne	.L9
	mov	edi, 10
	call	putchar@PLT
.L9:
	add	DWORD PTR -4[rbp], 1
.L8:
	cmp	DWORD PTR -4[rbp], 11
	jle	.L10
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	print_registers, .-print_registers
	.globl	find_empty_register
	.type	find_empty_register, @function
find_empty_register:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], 0
	jmp	.L12
.L15:
	mov	eax, DWORD PTR registers[rip+32]
	cmp	DWORD PTR -4[rbp], eax
	je	.L13
	mov	eax, DWORD PTR registers[rip+36]
	cmp	DWORD PTR -4[rbp], eax
	je	.L13
	mov	eax, DWORD PTR -4[rbp]
	jmp	.L14
.L13:
	add	DWORD PTR -4[rbp], 1
.L12:
	cmp	DWORD PTR -4[rbp], 11
	jle	.L15
	mov	eax, 8
.L14:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	find_empty_register, .-find_empty_register
	.section	.rodata
.LC3:
	.string	"Finished Execution"
.LC4:
	.string	"%d + %d = %d\n"
.LC5:
	.string	"%d * %d = %d\n"
.LC6:
	.string	"%d / %d = %d\n"
.LC7:
	.string	"%d - %d = %d\n"
.LC8:
	.string	"%d\n"
.LC9:
	.string	"Do Nothing"
.LC10:
	.string	"Unknown Instruction %d\n"
	.text
	.globl	eval
	.type	eval, @function
eval:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	BYTE PTR is_jmp[rip], 0
	cmp	DWORD PTR -4[rbp], 15
	ja	.L17
	mov	eax, DWORD PTR -4[rbp]
	lea	rdx, 0[0+rax*4]
	lea	rax, .L19[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L19[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L19:
	.long	.L34-.L19
	.long	.L33-.L19
	.long	.L32-.L19
	.long	.L31-.L19
	.long	.L30-.L19
	.long	.L29-.L19
	.long	.L28-.L19
	.long	.L27-.L19
	.long	.L26-.L19
	.long	.L25-.L19
	.long	.L24-.L19
	.long	.L23-.L19
	.long	.L22-.L19
	.long	.L21-.L19
	.long	.L20-.L19
	.long	.L18-.L19
	.text
.L34:
	mov	BYTE PTR running[rip], 0
	lea	rdi, .LC3[rip]
	call	puts@PLT
	jmp	.L35
.L33:
	mov	eax, DWORD PTR registers[rip+44]
	add	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 1
	mov	DWORD PTR registers[rip+40], eax
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	edx, DWORD PTR registers[rip+44]
	mov	eax, DWORD PTR [rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, stack[rip]
	mov	DWORD PTR [rcx+rdx], eax
	jmp	.L35
.L32:
	mov	eax, DWORD PTR registers[rip+44]
	sub	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	jmp	.L35
.L31:
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip], eax
	mov	eax, DWORD PTR registers[rip+44]
	sub	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip+4], eax
	mov	edx, DWORD PTR registers[rip+4]
	mov	eax, DWORD PTR registers[rip]
	add	eax, edx
	mov	DWORD PTR registers[rip+8], eax
	mov	edx, DWORD PTR registers[rip+44]
	mov	eax, DWORD PTR registers[rip+8]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, stack[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	ecx, DWORD PTR registers[rip+8]
	mov	edx, DWORD PTR registers[rip]
	mov	eax, DWORD PTR registers[rip+4]
	mov	esi, eax
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L35
.L30:
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip], eax
	mov	eax, DWORD PTR registers[rip+44]
	sub	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip+4], eax
	mov	edx, DWORD PTR registers[rip+4]
	mov	eax, DWORD PTR registers[rip]
	imul	eax, edx
	mov	DWORD PTR registers[rip+8], eax
	mov	edx, DWORD PTR registers[rip+44]
	mov	eax, DWORD PTR registers[rip+8]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, stack[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	ecx, DWORD PTR registers[rip+8]
	mov	edx, DWORD PTR registers[rip]
	mov	eax, DWORD PTR registers[rip+4]
	mov	esi, eax
	lea	rdi, .LC5[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L35
.L29:
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip], eax
	mov	eax, DWORD PTR registers[rip+44]
	sub	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip+4], eax
	mov	eax, DWORD PTR registers[rip+4]
	mov	esi, DWORD PTR registers[rip]
	cdq
	idiv	esi
	mov	DWORD PTR registers[rip+8], eax
	mov	edx, DWORD PTR registers[rip+44]
	mov	eax, DWORD PTR registers[rip+8]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, stack[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	ecx, DWORD PTR registers[rip+8]
	mov	edx, DWORD PTR registers[rip]
	mov	eax, DWORD PTR registers[rip+4]
	mov	esi, eax
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L35
.L28:
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip], eax
	mov	eax, DWORD PTR registers[rip+44]
	sub	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR registers[rip+4], eax
	mov	eax, DWORD PTR registers[rip+4]
	mov	edx, DWORD PTR registers[rip]
	sub	eax, edx
	mov	DWORD PTR registers[rip+8], eax
	mov	edx, DWORD PTR registers[rip+44]
	mov	eax, DWORD PTR registers[rip+8]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, stack[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	ecx, DWORD PTR registers[rip+8]
	mov	edx, DWORD PTR registers[rip]
	mov	eax, DWORD PTR registers[rip+4]
	mov	esi, eax
	lea	rdi, .LC7[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L35
.L27:
	mov	eax, DWORD PTR registers[rip+44]
	sub	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	mov	eax, DWORD PTR registers[rip+44]
	add	eax, 1
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR registers[rip+44]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rcx+rax]
	cmp	edx, eax
	setl	al
	mov	edx, DWORD PTR registers[rip+44]
	movzx	eax, al
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, stack[rip]
	mov	DWORD PTR [rcx+rdx], eax
	jmp	.L35
.L26:
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 1
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	rcx, QWORD PTR instructions[rip]
	mov	edx, DWORD PTR registers[rip+40]
	movsx	rdx, edx
	add	rdx, 2
	sal	rdx, 2
	add	rdx, rcx
	mov	edx, DWORD PTR [rdx]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, registers[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, registers[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 2
	mov	DWORD PTR registers[rip+40], eax
	jmp	.L35
.L25:
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 2
	sal	rax, 2
	add	rax, rdx
	mov	rcx, QWORD PTR instructions[rip]
	mov	edx, DWORD PTR registers[rip+40]
	movsx	rdx, edx
	add	rdx, 1
	sal	rdx, 2
	add	rdx, rcx
	mov	edx, DWORD PTR [rdx]
	mov	eax, DWORD PTR [rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, registers[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 2
	mov	DWORD PTR registers[rip+40], eax
	jmp	.L35
.L24:
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 1
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, registers[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	esi, eax
	lea	rdi, .LC8[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 1
	mov	DWORD PTR registers[rip+40], eax
	jmp	.L35
.L23:
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 1
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, registers[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	rcx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 2
	sal	rax, 2
	add	rax, rcx
	mov	eax, DWORD PTR [rax]
	cmp	edx, eax
	jne	.L36
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 3
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR registers[rip+40], eax
	mov	BYTE PTR is_jmp[rip], 1
	jmp	.L35
.L36:
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 3
	mov	DWORD PTR registers[rip+40], eax
	jmp	.L35
.L22:
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 1
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, registers[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	rcx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 2
	sal	rax, 2
	add	rax, rcx
	mov	eax, DWORD PTR [rax]
	cmp	edx, eax
	je	.L38
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	add	rax, 3
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR registers[rip+40], eax
	mov	BYTE PTR is_jmp[rip], 1
	jmp	.L35
.L38:
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 3
	mov	DWORD PTR registers[rip+40], eax
	jmp	.L35
.L21:
	mov	eax, DWORD PTR registers[rip+44]
	add	eax, 1
	mov	DWORD PTR registers[rip+44], eax
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 1
	mov	DWORD PTR registers[rip+40], eax
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	edx, DWORD PTR registers[rip+44]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, registers[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, stack[rip]
	mov	DWORD PTR [rcx+rdx], eax
	jmp	.L35
.L20:
	mov	eax, DWORD PTR registers[rip+44]
	mov	rcx, QWORD PTR instructions[rip]
	mov	edx, DWORD PTR registers[rip+40]
	movsx	rdx, edx
	add	rdx, 1
	sal	rdx, 2
	add	rdx, rcx
	mov	edx, DWORD PTR [rdx]
	cdqe
	lea	rcx, 0[0+rax*4]
	lea	rax, stack[rip]
	mov	eax, DWORD PTR [rcx+rax]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*4]
	lea	rdx, registers[rip]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 1
	mov	DWORD PTR registers[rip+40], eax
	jmp	.L35
.L18:
	lea	rdi, .LC9[rip]
	call	puts@PLT
	jmp	.L35
.L17:
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	lea	rdi, .LC10[rip]
	mov	eax, 0
	call	printf@PLT
	nop
.L35:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	eval, .-eval
	.section	.rodata
.LC11:
	.string	"error: no input files"
.LC12:
	.string	"r"
	.align 8
.LC13:
	.string	"error: could not read file `%s`\n"
.LC14:
	.string	"%d"
	.text
	.globl	main
	.type	main, @function
main:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -36[rbp], edi
	mov	QWORD PTR -48[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	cmp	DWORD PTR -36[rbp], 1
	jg	.L41
	lea	rdi, .LC11[rip]
	call	puts@PLT
	mov	eax, -1
	jmp	.L49
.L41:
	mov	rax, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	lea	rsi, .LC12[rip]
	mov	rdi, rax
	call	fopen@PLT
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	jne	.L43
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	lea	rdi, .LC13[rip]
	mov	eax, 0
	call	printf@PLT
	mov	eax, -1
	jmp	.L49
.L43:
	mov	eax, DWORD PTR instruction_space[rip]
	cdqe
	sal	rax, 2
	mov	rdi, rax
	call	malloc@PLT
	mov	QWORD PTR instructions[rip], rax
	mov	DWORD PTR -28[rbp], 0
	jmp	.L44
.L45:
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 2
	add	rdx, rax
	mov	eax, DWORD PTR -32[rbp]
	mov	DWORD PTR [rdx], eax
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	esi, eax
	lea	rdi, .LC8[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -28[rbp], 1
	mov	eax, DWORD PTR instruction_space[rip]
	cmp	DWORD PTR -28[rbp], eax
	jl	.L44
	mov	eax, DWORD PTR instruction_space[rip]
	add	eax, eax
	mov	DWORD PTR instruction_space[rip], eax
	mov	eax, DWORD PTR instruction_space[rip]
	cdqe
	lea	rdx, 0[0+rax*4]
	mov	rax, QWORD PTR instructions[rip]
	mov	rsi, rdx
	mov	rdi, rax
	call	realloc@PLT
	mov	QWORD PTR instructions[rip], rax
.L44:
	lea	rdx, -32[rbp]
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC14[rip]
	mov	rdi, rax
	mov	eax, 0
	call	__isoc99_fscanf@PLT
	test	eax, eax
	jg	.L45
	mov	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR instruction_count[rip], eax
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	fclose@PLT
	mov	DWORD PTR registers[rip+44], -1
	jmp	.L46
.L48:
	mov	rdx, QWORD PTR instructions[rip]
	mov	eax, DWORD PTR registers[rip+40]
	cdqe
	sal	rax, 2
	add	rax, rdx
	mov	eax, DWORD PTR [rax]
	mov	edi, eax
	call	eval
	movzx	eax, BYTE PTR is_jmp[rip]
	xor	eax, 1
	test	al, al
	je	.L46
	mov	eax, DWORD PTR registers[rip+40]
	add	eax, 1
	mov	DWORD PTR registers[rip+40], eax
.L46:
	movzx	eax, BYTE PTR running[rip]
	test	al, al
	je	.L47
	mov	edx, DWORD PTR registers[rip+40]
	mov	eax, DWORD PTR instruction_count[rip]
	cmp	edx, eax
	jl	.L48
.L47:
	mov	rax, QWORD PTR instructions[rip]
	mov	rdi, rax
	call	free@PLT
	mov	eax, 0
.L49:
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"247151.c"
	.text
	.local	stack
	.comm	stack,1024,4
	.local	registers
	.comm	registers,48,4
	.comm	instructions,4,4
	.global	instruction_count
	.bss
	.align	2
	.type	instruction_count, %object
	.size	instruction_count, 4
instruction_count:
	.space	4
	.global	instruction_space
	.data
	.align	2
	.type	instruction_space, %object
	.size	instruction_space, 4
instruction_space:
	.word	4
	.type	running, %object
	.size	running, 1
running:
	.byte	1
	.global	is_jmp
	.bss
	.type	is_jmp, %object
	.size	is_jmp, 1
is_jmp:
	.space	1
	.section	.rodata
	.align	2
.LC0:
	.ascii	"0x%04d \000"
	.text
	.align	2
	.global	print_stack
	.syntax unified
	.arm
	.fpu softvfp
	.type	print_stack, %function
print_stack:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L2
.L4:
	ldr	r2, .L7
	ldr	r3, [fp, #-8]
	ldr	r3, [r2, r3, lsl #2]
	mov	r1, r3
	ldr	r0, .L7+4
	bl	printf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	and	r3, r3, #3
	cmp	r3, #0
	bne	.L3
	mov	r0, #10
	bl	putchar
.L3:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L2:
	ldr	r3, .L7+8
	ldr	r3, [r3, #44]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	blt	.L4
	ldr	r3, .L7+8
	ldr	r3, [r3, #44]
	cmp	r3, #0
	beq	.L6
	mov	r0, #10
	bl	putchar
.L6:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L8:
	.align	2
.L7:
	.word	stack
	.word	.LC0
	.word	registers
	.size	print_stack, .-print_stack
	.section	.rodata
	.align	2
.LC1:
	.ascii	"Register Dump:\000"
	.align	2
.LC2:
	.ascii	"%04d \000"
	.text
	.align	2
	.global	print_registers
	.syntax unified
	.arm
	.fpu softvfp
	.type	print_registers, %function
print_registers:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r0, .L13
	bl	puts
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L10
.L12:
	ldr	r2, .L13+4
	ldr	r3, [fp, #-8]
	ldr	r3, [r2, r3, lsl #2]
	mov	r1, r3
	ldr	r0, .L13+8
	bl	printf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	and	r3, r3, #3
	cmp	r3, #0
	bne	.L11
	mov	r0, #10
	bl	putchar
.L11:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L10:
	ldr	r3, [fp, #-8]
	cmp	r3, #11
	ble	.L12
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L14:
	.align	2
.L13:
	.word	.LC1
	.word	registers
	.word	.LC2
	.size	print_registers, .-print_registers
	.align	2
	.global	find_empty_register
	.syntax unified
	.arm
	.fpu softvfp
	.type	find_empty_register, %function
find_empty_register:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L16
.L19:
	ldr	r3, .L20
	ldr	r3, [r3, #32]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	beq	.L17
	ldr	r3, .L20
	ldr	r3, [r3, #36]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	beq	.L17
	ldr	r3, [fp, #-8]
	b	.L18
.L17:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L16:
	ldr	r3, [fp, #-8]
	cmp	r3, #11
	ble	.L19
	mov	r3, #8
.L18:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L21:
	.align	2
.L20:
	.word	registers
	.size	find_empty_register, .-find_empty_register
	.section	.rodata
	.align	2
.LC3:
	.ascii	"Finished Execution\000"
	.align	2
.LC4:
	.ascii	"%d + %d = %d\012\000"
	.align	2
.LC5:
	.ascii	"%d * %d = %d\012\000"
	.global	__aeabi_idiv
	.align	2
.LC6:
	.ascii	"%d / %d = %d\012\000"
	.align	2
.LC7:
	.ascii	"%d - %d = %d\012\000"
	.align	2
.LC8:
	.ascii	"%d\012\000"
	.align	2
.LC9:
	.ascii	"Do Nothing\000"
	.align	2
.LC10:
	.ascii	"Unknown Instruction %d\012\000"
	.text
	.align	2
	.global	eval
	.syntax unified
	.arm
	.fpu softvfp
	.type	eval, %function
eval:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L46
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	cmp	r3, #15
	ldrls	pc, [pc, r3, asl #2]
	b	.L23
.L25:
	.word	.L40
	.word	.L39
	.word	.L38
	.word	.L37
	.word	.L36
	.word	.L35
	.word	.L34
	.word	.L33
	.word	.L32
	.word	.L31
	.word	.L30
	.word	.L29
	.word	.L28
	.word	.L27
	.word	.L26
	.word	.L24
.L40:
	ldr	r3, .L46+4
	mov	r2, #0
	strb	r2, [r3]
	ldr	r0, .L46+8
	bl	puts
	b	.L41
.L39:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	add	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, [r2]
	ldr	r1, .L46+20
	str	r2, [r1, r3, lsl #2]
	b	.L41
.L38:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	sub	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	b	.L41
.L37:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	sub	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2, #4]
	ldr	r3, .L46+12
	ldr	r2, [r3, #4]
	ldr	r3, .L46+12
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L46+12
	str	r3, [r2, #8]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+12
	ldr	r2, [r2, #8]
	ldr	r1, .L46+20
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r1, [r3, #4]
	ldr	r3, .L46+12
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #8]
	ldr	r0, .L46+24
	bl	printf
	b	.L41
.L36:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	sub	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2, #4]
	ldr	r3, .L46+12
	ldr	r3, [r3, #4]
	ldr	r2, .L46+12
	ldr	r2, [r2]
	mul	r3, r2, r3
	ldr	r2, .L46+12
	str	r3, [r2, #8]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+12
	ldr	r2, [r2, #8]
	ldr	r1, .L46+20
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r1, [r3, #4]
	ldr	r3, .L46+12
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #8]
	ldr	r0, .L46+28
	bl	printf
	b	.L41
.L35:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	sub	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2, #4]
	ldr	r3, .L46+12
	ldr	r3, [r3, #4]
	ldr	r2, .L46+12
	ldr	r2, [r2]
	mov	r1, r2
	mov	r0, r3
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L46+12
	str	r2, [r3, #8]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+12
	ldr	r2, [r2, #8]
	ldr	r1, .L46+20
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r1, [r3, #4]
	ldr	r3, .L46+12
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #8]
	ldr	r0, .L46+32
	bl	printf
	b	.L41
.L34:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	sub	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+20
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L46+12
	str	r3, [r2, #4]
	ldr	r3, .L46+12
	ldr	r2, [r3, #4]
	ldr	r3, .L46+12
	ldr	r3, [r3]
	sub	r3, r2, r3
	ldr	r2, .L46+12
	str	r3, [r2, #8]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r2, .L46+12
	ldr	r2, [r2, #8]
	ldr	r1, .L46+20
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r1, [r3, #4]
	ldr	r3, .L46+12
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #8]
	ldr	r0, .L46+36
	bl	printf
	b	.L41
.L33:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	sub	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	add	r3, r3, #1
	ldr	r2, .L46+20
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r1, .L46+20
	ldr	r3, [r1, r3, lsl #2]
	cmp	r2, r3
	movlt	r3, #1
	movge	r3, #0
	and	r2, r3, #255
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	mov	r1, r2
	ldr	r2, .L46+20
	str	r1, [r2, r3, lsl #2]
	b	.L41
.L32:
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L46+16
	ldr	r1, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	ldr	r1, .L46+12
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L46+12
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #2
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	b	.L41
.L31:
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #2
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, .L46+16
	ldr	r1, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	ldr	r2, [r2]
	ldr	r1, .L46+12
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #2
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	b	.L41
.L30:
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r2, .L46+12
	ldr	r3, [r2, r3, lsl #2]
	mov	r1, r3
	ldr	r0, .L46+40
	bl	printf
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	b	.L41
.L29:
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r2, .L46+12
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L46+16
	ldr	r1, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L42
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #3
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	ldr	r3, .L46
	mov	r2, #1
	strb	r2, [r3]
	b	.L41
.L42:
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #3
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	b	.L41
.L28:
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r2, .L46+12
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, .L46+16
	ldr	r1, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #2
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L44
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #3
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	ldr	r3, .L46
	mov	r2, #1
	strb	r2, [r3]
	b	.L41
.L44:
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #3
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	b	.L41
.L27:
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	add	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #44]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	ldr	r3, .L46+16
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #44]
	ldr	r1, .L46+12
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L46+20
	str	r2, [r1, r3, lsl #2]
	b	.L41
.L26:
	ldr	r3, .L46+12
	ldr	r2, [r3, #44]
	ldr	r3, .L46+16
	ldr	r1, [r3]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r3, [r3]
	ldr	r1, .L46+20
	ldr	r2, [r1, r2, lsl #2]
	ldr	r1, .L46+12
	str	r2, [r1, r3, lsl #2]
	ldr	r3, .L46+12
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	ldr	r2, .L46+12
	str	r3, [r2, #40]
	b	.L41
.L24:
	ldr	r0, .L46+44
	bl	puts
	b	.L41
.L23:
	ldr	r1, [fp, #-8]
	ldr	r0, .L46+48
	bl	printf
	nop
.L41:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L47:
	.align	2
.L46:
	.word	is_jmp
	.word	running
	.word	.LC3
	.word	registers
	.word	instructions
	.word	stack
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.word	.LC10
	.size	eval, .-eval
	.section	.rodata
	.align	2
.LC11:
	.ascii	"error: no input files\000"
	.align	2
.LC12:
	.ascii	"r\000"
	.align	2
.LC13:
	.ascii	"error: could not read file `%s`\012\000"
	.align	2
.LC14:
	.ascii	"%d\000"
	.align	2
.LC15:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r3, .L59
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	bgt	.L49
	ldr	r0, .L59+4
	bl	puts
	mvn	r3, #0
	b	.L57
.L49:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3, #4]
	str	r3, [fp, #-16]
	ldr	r1, .L59+8
	ldr	r0, [fp, #-16]
	bl	fopen
	str	r0, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L51
	ldr	r1, [fp, #-16]
	ldr	r0, .L59+12
	bl	printf
	mvn	r3, #0
	b	.L57
.L51:
	ldr	r3, .L59+16
	ldr	r3, [r3]
	lsl	r3, r3, #2
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L59+20
	str	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-20]
	b	.L52
.L53:
	ldr	r3, .L59+20
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [fp, #-24]
	str	r2, [r3]
	ldr	r3, .L59+20
	ldr	r2, [r3]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L59+24
	bl	printf
	ldr	r3, [fp, #-20]
	add	r3, r3, #1
	str	r3, [fp, #-20]
	ldr	r3, .L59+16
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	cmp	r2, r3
	blt	.L52
	ldr	r3, .L59+16
	ldr	r3, [r3]
	lsl	r3, r3, #1
	ldr	r2, .L59+16
	str	r3, [r2]
	ldr	r3, .L59+20
	ldr	r3, [r3]
	ldr	r2, .L59+16
	ldr	r2, [r2]
	lsl	r2, r2, #2
	mov	r1, r2
	mov	r0, r3
	bl	realloc
	mov	r3, r0
	ldr	r2, .L59+20
	str	r3, [r2]
.L52:
	sub	r3, fp, #24
	mov	r2, r3
	ldr	r1, .L59+28
	ldr	r0, [fp, #-12]
	bl	__isoc99_fscanf
	mov	r3, r0
	cmp	r3, #0
	bgt	.L53
	ldr	r2, .L59+32
	ldr	r3, [fp, #-20]
	str	r3, [r2]
	ldr	r0, [fp, #-12]
	bl	fclose
	ldr	r3, .L59+36
	mvn	r2, #0
	str	r2, [r3, #44]
	b	.L54
.L56:
	ldr	r3, .L59+20
	ldr	r2, [r3]
	ldr	r3, .L59+36
	ldr	r3, [r3, #40]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r0, r3
	bl	eval
	ldr	r3, .L59+40
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L54
	ldr	r3, .L59+36
	ldr	r3, [r3, #40]
	add	r3, r3, #1
	ldr	r2, .L59+36
	str	r3, [r2, #40]
.L54:
	ldr	r3, .L59+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L59+36
	ldr	r2, [r3, #40]
	ldr	r3, .L59+32
	ldr	r3, [r3]
	cmp	r2, r3
	blt	.L56
.L55:
	ldr	r3, .L59+20
	ldr	r3, [r3]
	mov	r0, r3
	bl	free
	mov	r3, #0
.L57:
	ldr	r2, .L59
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L58
	bl	__stack_chk_fail
.L58:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L60:
	.align	2
.L59:
	.word	.LC15
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	instruction_space
	.word	instructions
	.word	.LC8
	.word	.LC14
	.word	instruction_count
	.word	registers
	.word	is_jmp
	.word	running
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
