	.file	"487143.c"
	.intel_syntax noprefix
	.text
	.globl	__VERIFIER_assert
	.type	__VERIFIER_assert, @function
__VERIFIER_assert:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 0
	jne	.L5
	nop
.L3:
	mov	eax, 0
	call	__VERIFIER_error@PLT
.L5:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.globl	__global_lock
	.bss
	.align 4
	.type	__global_lock, @object
	.size	__global_lock, 4
__global_lock:
	.zero	4
	.text
	.globl	__VERIFIER_atomic_begin
	.type	__VERIFIER_atomic_begin, @function
__VERIFIER_atomic_begin:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR __global_lock[rip]
	test	eax, eax
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	__VERIFIER_assume@PLT
	mov	DWORD PTR __global_lock[rip], 1
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	__VERIFIER_atomic_begin, .-__VERIFIER_atomic_begin
	.globl	__VERIFIER_atomic_end
	.type	__VERIFIER_atomic_end, @function
__VERIFIER_atomic_end:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR __global_lock[rip]
	cmp	eax, 1
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	__VERIFIER_assume@PLT
	mov	DWORD PTR __global_lock[rip], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	__VERIFIER_atomic_end, .-__VERIFIER_atomic_end
	.globl	__unbuffered_cnt
	.bss
	.align 4
	.type	__unbuffered_cnt, @object
	.size	__unbuffered_cnt, 4
__unbuffered_cnt:
	.zero	4
	.globl	__unbuffered_p0_EAX
	.align 4
	.type	__unbuffered_p0_EAX, @object
	.size	__unbuffered_p0_EAX, 4
__unbuffered_p0_EAX:
	.zero	4
	.globl	__unbuffered_p1_EAX
	.align 4
	.type	__unbuffered_p1_EAX, @object
	.size	__unbuffered_p1_EAX, 4
__unbuffered_p1_EAX:
	.zero	4
	.globl	__unbuffered_p1_EBX
	.align 4
	.type	__unbuffered_p1_EBX, @object
	.size	__unbuffered_p1_EBX, 4
__unbuffered_p1_EBX:
	.zero	4
	.globl	main$tmp_guard0
	.type	main$tmp_guard0, @object
	.size	main$tmp_guard0, 1
main$tmp_guard0:
	.zero	1
	.globl	main$tmp_guard1
	.type	main$tmp_guard1, @object
	.size	main$tmp_guard1, 1
main$tmp_guard1:
	.zero	1
	.globl	x
	.align 4
	.type	x, @object
	.size	x, 4
x:
	.zero	4
	.globl	x$flush_delayed
	.type	x$flush_delayed, @object
	.size	x$flush_delayed, 1
x$flush_delayed:
	.zero	1
	.globl	x$mem_tmp
	.align 4
	.type	x$mem_tmp, @object
	.size	x$mem_tmp, 4
x$mem_tmp:
	.zero	4
	.globl	x$r_buff0_thd0
	.type	x$r_buff0_thd0, @object
	.size	x$r_buff0_thd0, 1
x$r_buff0_thd0:
	.zero	1
	.globl	x$r_buff0_thd1
	.type	x$r_buff0_thd1, @object
	.size	x$r_buff0_thd1, 1
x$r_buff0_thd1:
	.zero	1
	.globl	x$r_buff0_thd2
	.type	x$r_buff0_thd2, @object
	.size	x$r_buff0_thd2, 1
x$r_buff0_thd2:
	.zero	1
	.globl	x$r_buff1_thd0
	.type	x$r_buff1_thd0, @object
	.size	x$r_buff1_thd0, 1
x$r_buff1_thd0:
	.zero	1
	.globl	x$r_buff1_thd1
	.type	x$r_buff1_thd1, @object
	.size	x$r_buff1_thd1, 1
x$r_buff1_thd1:
	.zero	1
	.globl	x$r_buff1_thd2
	.type	x$r_buff1_thd2, @object
	.size	x$r_buff1_thd2, 1
x$r_buff1_thd2:
	.zero	1
	.globl	x$read_delayed
	.type	x$read_delayed, @object
	.size	x$read_delayed, 1
x$read_delayed:
	.zero	1
	.globl	x$read_delayed_var
	.align 8
	.type	x$read_delayed_var, @object
	.size	x$read_delayed_var, 8
x$read_delayed_var:
	.zero	8
	.globl	x$w_buff0
	.align 4
	.type	x$w_buff0, @object
	.size	x$w_buff0, 4
x$w_buff0:
	.zero	4
	.globl	x$w_buff0_used
	.type	x$w_buff0_used, @object
	.size	x$w_buff0_used, 1
x$w_buff0_used:
	.zero	1
	.globl	x$w_buff1
	.align 4
	.type	x$w_buff1, @object
	.size	x$w_buff1, 4
x$w_buff1:
	.zero	4
	.globl	x$w_buff1_used
	.type	x$w_buff1_used, @object
	.size	x$w_buff1_used, 1
x$w_buff1_used:
	.zero	1
	.globl	y
	.align 4
	.type	y, @object
	.size	y, 4
y:
	.zero	4
	.globl	y$flush_delayed
	.type	y$flush_delayed, @object
	.size	y$flush_delayed, 1
y$flush_delayed:
	.zero	1
	.globl	y$mem_tmp
	.align 4
	.type	y$mem_tmp, @object
	.size	y$mem_tmp, 4
y$mem_tmp:
	.zero	4
	.globl	y$r_buff0_thd0
	.type	y$r_buff0_thd0, @object
	.size	y$r_buff0_thd0, 1
y$r_buff0_thd0:
	.zero	1
	.globl	y$r_buff0_thd1
	.type	y$r_buff0_thd1, @object
	.size	y$r_buff0_thd1, 1
y$r_buff0_thd1:
	.zero	1
	.globl	y$r_buff0_thd2
	.type	y$r_buff0_thd2, @object
	.size	y$r_buff0_thd2, 1
y$r_buff0_thd2:
	.zero	1
	.globl	y$r_buff1_thd0
	.type	y$r_buff1_thd0, @object
	.size	y$r_buff1_thd0, 1
y$r_buff1_thd0:
	.zero	1
	.globl	y$r_buff1_thd1
	.type	y$r_buff1_thd1, @object
	.size	y$r_buff1_thd1, 1
y$r_buff1_thd1:
	.zero	1
	.globl	y$r_buff1_thd2
	.type	y$r_buff1_thd2, @object
	.size	y$r_buff1_thd2, 1
y$r_buff1_thd2:
	.zero	1
	.globl	y$read_delayed
	.type	y$read_delayed, @object
	.size	y$read_delayed, 1
y$read_delayed:
	.zero	1
	.globl	y$read_delayed_var
	.align 8
	.type	y$read_delayed_var, @object
	.size	y$read_delayed_var, 8
y$read_delayed_var:
	.zero	8
	.globl	y$w_buff0
	.align 4
	.type	y$w_buff0, @object
	.size	y$w_buff0, 4
y$w_buff0:
	.zero	4
	.globl	y$w_buff0_used
	.type	y$w_buff0_used, @object
	.size	y$w_buff0_used, 1
y$w_buff0_used:
	.zero	1
	.globl	y$w_buff1
	.align 4
	.type	y$w_buff1, @object
	.size	y$w_buff1, 4
y$w_buff1:
	.zero	4
	.globl	y$w_buff1_used
	.type	y$w_buff1_used, @object
	.size	y$w_buff1_used, 1
y$w_buff1_used:
	.zero	1
	.globl	weak$$choice0
	.type	weak$$choice0, @object
	.size	weak$$choice0, 1
weak$$choice0:
	.zero	1
	.globl	weak$$choice2
	.type	weak$$choice2, @object
	.size	weak$$choice2, 1
weak$$choice2:
	.zero	1
	.text
	.globl	P0
	.type	P0, @function
P0:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	DWORD PTR x[rip], 1
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L11
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L12
.L11:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L13
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	test	al, al
	je	.L13
	mov	eax, DWORD PTR x$w_buff1[rip]
	jmp	.L15
.L13:
	mov	eax, DWORD PTR x[rip]
	jmp	.L15
.L12:
	mov	eax, DWORD PTR x$w_buff0[rip]
.L15:
	mov	DWORD PTR x[rip], eax
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L16
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L17
.L16:
	mov	eax, 1
	jmp	.L18
.L17:
	mov	eax, 0
.L18:
	and	eax, 1
	test	al, al
	je	.L19
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L19
	mov	eax, 1
	jmp	.L20
.L19:
	mov	eax, 0
.L20:
	mov	BYTE PTR x$w_buff0_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L21
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L22
.L21:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L23
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	test	al, al
	jne	.L22
.L23:
	mov	eax, 1
	jmp	.L24
.L22:
	mov	eax, 0
.L24:
	and	eax, 1
	test	al, al
	je	.L25
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L25
	mov	eax, 1
	jmp	.L26
.L25:
	mov	eax, 0
.L26:
	mov	BYTE PTR x$w_buff1_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L27
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L28
.L27:
	mov	eax, 1
	jmp	.L29
.L28:
	mov	eax, 0
.L29:
	and	eax, 1
	test	al, al
	je	.L30
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	movzx	eax, al
	test	eax, eax
	je	.L30
	mov	eax, 1
	jmp	.L31
.L30:
	mov	eax, 0
.L31:
	mov	BYTE PTR x$r_buff0_thd1[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L32
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L33
.L32:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L34
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	test	al, al
	jne	.L33
.L34:
	mov	eax, 1
	jmp	.L35
.L33:
	mov	eax, 0
.L35:
	and	eax, 1
	test	al, al
	je	.L36
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	movzx	eax, al
	test	eax, eax
	je	.L36
	mov	eax, 1
	jmp	.L37
.L36:
	mov	eax, 0
.L37:
	mov	BYTE PTR x$r_buff1_thd1[rip], al
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice0[rip], al
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice2[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	mov	BYTE PTR x$flush_delayed[rip], al
	mov	eax, DWORD PTR x[rip]
	mov	DWORD PTR x$mem_tmp[rip], eax
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L38
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L39
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L38
.L39:
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L40
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	test	al, al
	je	.L38
.L40:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L41
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	je	.L41
	mov	eax, DWORD PTR x$w_buff0[rip]
	jmp	.L43
.L41:
	mov	eax, DWORD PTR x$w_buff1[rip]
	jmp	.L43
.L38:
	mov	eax, DWORD PTR x[rip]
.L43:
	mov	DWORD PTR x[rip], eax
	mov	eax, DWORD PTR x$w_buff0[rip]
	mov	DWORD PTR x$w_buff0[rip], eax
	mov	eax, DWORD PTR x$w_buff1[rip]
	mov	DWORD PTR x$w_buff1[rip], eax
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L44
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L45
.L44:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L46
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L47
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L46
.L47:
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L48
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L48
.L46:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L45
.L48:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L50
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L51
.L50:
	mov	eax, 1
	jmp	.L52
.L51:
	mov	eax, 0
.L52:
	and	eax, 1
	test	al, al
	je	.L53
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L53
	mov	eax, 1
	jmp	.L45
.L53:
	mov	eax, 0
.L45:
	mov	BYTE PTR x$w_buff0_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L55
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L56
.L55:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L57
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L58
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L57
.L58:
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L59
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L59
.L57:
	mov	eax, 1
	jmp	.L60
.L59:
	mov	eax, 0
.L60:
	and	eax, 1
	test	al, al
	je	.L61
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L61
	mov	eax, 1
	jmp	.L56
.L61:
	mov	eax, 0
.L56:
	mov	BYTE PTR x$w_buff1_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L63
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L64
.L63:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L65
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L66
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L65
.L66:
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L67
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L67
.L65:
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L64
.L67:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L69
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L70
.L69:
	mov	eax, 1
	jmp	.L71
.L70:
	mov	eax, 0
.L71:
	and	eax, 1
	test	al, al
	je	.L72
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	movzx	eax, al
	test	eax, eax
	je	.L72
	mov	eax, 1
	jmp	.L64
.L72:
	mov	eax, 0
.L64:
	mov	BYTE PTR x$r_buff0_thd1[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L74
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L75
.L74:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L76
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L77
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L76
.L77:
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L78
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	xor	eax, 1
	test	al, al
	je	.L78
.L76:
	mov	eax, 1
	jmp	.L79
.L78:
	mov	eax, 0
.L79:
	and	eax, 1
	test	al, al
	je	.L80
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	movzx	eax, al
	test	eax, eax
	je	.L80
	mov	eax, 1
	jmp	.L75
.L80:
	mov	eax, 0
.L75:
	mov	BYTE PTR x$r_buff1_thd1[rip], al
	mov	eax, DWORD PTR x[rip]
	mov	DWORD PTR __unbuffered_p0_EAX[rip], eax
	movzx	eax, BYTE PTR x$flush_delayed[rip]
	test	al, al
	je	.L82
	mov	eax, DWORD PTR x$mem_tmp[rip]
	jmp	.L83
.L82:
	mov	eax, DWORD PTR x[rip]
.L83:
	mov	DWORD PTR x[rip], eax
	mov	BYTE PTR x$flush_delayed[rip], 0
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L84
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L85
.L84:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L86
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	test	al, al
	je	.L86
	mov	eax, DWORD PTR x$w_buff1[rip]
	jmp	.L88
.L86:
	mov	eax, DWORD PTR x[rip]
	jmp	.L88
.L85:
	mov	eax, DWORD PTR x$w_buff0[rip]
.L88:
	mov	DWORD PTR x[rip], eax
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L89
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L90
.L89:
	mov	eax, 1
	jmp	.L91
.L90:
	mov	eax, 0
.L91:
	and	eax, 1
	test	al, al
	je	.L92
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L92
	mov	eax, 1
	jmp	.L93
.L92:
	mov	eax, 0
.L93:
	mov	BYTE PTR x$w_buff0_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L94
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L95
.L94:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L96
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	test	al, al
	jne	.L95
.L96:
	mov	eax, 1
	jmp	.L97
.L95:
	mov	eax, 0
.L97:
	and	eax, 1
	test	al, al
	je	.L98
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L98
	mov	eax, 1
	jmp	.L99
.L98:
	mov	eax, 0
.L99:
	mov	BYTE PTR x$w_buff1_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L100
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L101
.L100:
	mov	eax, 1
	jmp	.L102
.L101:
	mov	eax, 0
.L102:
	and	eax, 1
	test	al, al
	je	.L103
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	movzx	eax, al
	test	eax, eax
	je	.L103
	mov	eax, 1
	jmp	.L104
.L103:
	mov	eax, 0
.L104:
	mov	BYTE PTR x$r_buff0_thd1[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L105
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	test	al, al
	jne	.L106
.L105:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L107
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	test	al, al
	jne	.L106
.L107:
	mov	eax, 1
	jmp	.L108
.L106:
	mov	eax, 0
.L108:
	and	eax, 1
	test	al, al
	je	.L109
	movzx	eax, BYTE PTR x$r_buff1_thd1[rip]
	movzx	eax, al
	test	eax, eax
	je	.L109
	mov	eax, 1
	jmp	.L110
.L109:
	mov	eax, 0
.L110:
	mov	BYTE PTR x$r_buff1_thd1[rip], al
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, DWORD PTR __unbuffered_cnt[rip]
	add	eax, 1
	mov	DWORD PTR __unbuffered_cnt[rip], eax
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	nondet_1@PLT
	cdqe
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	P0, .-P0
	.globl	P1
	.type	P1, @function
P1:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, DWORD PTR x$w_buff0[rip]
	mov	DWORD PTR x$w_buff1[rip], eax
	mov	DWORD PTR x$w_buff0[rip], 2
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	mov	BYTE PTR x$w_buff1_used[rip], al
	mov	BYTE PTR x$w_buff0_used[rip], 1
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L113
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	je	.L114
.L113:
	mov	eax, 1
	jmp	.L115
.L114:
	mov	eax, 0
.L115:
	mov	edi, eax
	call	__VERIFIER_assert
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	mov	BYTE PTR x$r_buff1_thd0[rip], al
	movzx	eax, BYTE PTR x$r_buff0_thd1[rip]
	mov	BYTE PTR x$r_buff1_thd1[rip], al
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	mov	BYTE PTR x$r_buff1_thd2[rip], al
	mov	BYTE PTR x$r_buff0_thd2[rip], 1
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, DWORD PTR y$w_buff0[rip]
	mov	DWORD PTR y$w_buff1[rip], eax
	mov	DWORD PTR y$w_buff0[rip], 1
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	mov	BYTE PTR y$w_buff1_used[rip], al
	mov	BYTE PTR y$w_buff0_used[rip], 1
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L116
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	je	.L117
.L116:
	mov	eax, 1
	jmp	.L118
.L117:
	mov	eax, 0
.L118:
	mov	edi, eax
	call	__VERIFIER_assert
	movzx	eax, BYTE PTR y$r_buff0_thd0[rip]
	mov	BYTE PTR y$r_buff1_thd0[rip], al
	movzx	eax, BYTE PTR y$r_buff0_thd1[rip]
	mov	BYTE PTR y$r_buff1_thd1[rip], al
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	mov	BYTE PTR y$r_buff1_thd2[rip], al
	mov	BYTE PTR y$r_buff0_thd2[rip], 1
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice0[rip], al
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice2[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	mov	BYTE PTR y$flush_delayed[rip], al
	mov	eax, DWORD PTR y[rip]
	mov	DWORD PTR y$mem_tmp[rip], eax
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L119
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L120
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	test	al, al
	je	.L119
.L120:
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L121
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	test	al, al
	je	.L119
.L121:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L122
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	je	.L122
	mov	eax, DWORD PTR y$w_buff0[rip]
	jmp	.L124
.L122:
	mov	eax, DWORD PTR y$w_buff1[rip]
	jmp	.L124
.L119:
	mov	eax, DWORD PTR y[rip]
.L124:
	mov	DWORD PTR y[rip], eax
	mov	eax, DWORD PTR y$w_buff0[rip]
	mov	DWORD PTR y$w_buff0[rip], eax
	mov	eax, DWORD PTR y$w_buff1[rip]
	mov	DWORD PTR y$w_buff1[rip], eax
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L125
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L126
.L125:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L127
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L128
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L127
.L128:
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L129
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L129
.L127:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L126
.L129:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L131
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L132
.L131:
	mov	eax, 1
	jmp	.L133
.L132:
	mov	eax, 0
.L133:
	and	eax, 1
	test	al, al
	je	.L134
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L134
	mov	eax, 1
	jmp	.L126
.L134:
	mov	eax, 0
.L126:
	mov	BYTE PTR y$w_buff0_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L136
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L137
.L136:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L138
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L139
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L138
.L139:
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L140
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L140
.L138:
	mov	eax, 1
	jmp	.L141
.L140:
	mov	eax, 0
.L141:
	and	eax, 1
	test	al, al
	je	.L142
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L142
	mov	eax, 1
	jmp	.L137
.L142:
	mov	eax, 0
.L137:
	mov	BYTE PTR y$w_buff1_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L144
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L145
.L144:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L146
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L147
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L146
.L147:
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L148
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L148
.L146:
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L145
.L148:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L150
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L151
.L150:
	mov	eax, 1
	jmp	.L152
.L151:
	mov	eax, 0
.L152:
	and	eax, 1
	test	al, al
	je	.L153
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L153
	mov	eax, 1
	jmp	.L145
.L153:
	mov	eax, 0
.L145:
	mov	BYTE PTR y$r_buff0_thd2[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L155
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L156
.L155:
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L157
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L158
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L157
.L158:
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L159
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L159
.L157:
	mov	eax, 1
	jmp	.L160
.L159:
	mov	eax, 0
.L160:
	and	eax, 1
	test	al, al
	je	.L161
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L161
	mov	eax, 1
	jmp	.L156
.L161:
	mov	eax, 0
.L156:
	mov	BYTE PTR y$r_buff1_thd2[rip], al
	mov	eax, DWORD PTR y[rip]
	mov	DWORD PTR __unbuffered_p1_EAX[rip], eax
	movzx	eax, BYTE PTR y$flush_delayed[rip]
	test	al, al
	je	.L163
	mov	eax, DWORD PTR y$mem_tmp[rip]
	jmp	.L164
.L163:
	mov	eax, DWORD PTR y[rip]
.L164:
	mov	DWORD PTR y[rip], eax
	mov	BYTE PTR y$flush_delayed[rip], 0
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice0[rip], al
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice2[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	mov	BYTE PTR x$flush_delayed[rip], al
	mov	eax, DWORD PTR x[rip]
	mov	DWORD PTR x$mem_tmp[rip], eax
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L165
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L166
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L165
.L166:
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L167
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	test	al, al
	je	.L165
.L167:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L168
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	je	.L168
	mov	eax, DWORD PTR x$w_buff0[rip]
	jmp	.L170
.L168:
	mov	eax, DWORD PTR x$w_buff1[rip]
	jmp	.L170
.L165:
	mov	eax, DWORD PTR x[rip]
.L170:
	mov	DWORD PTR x[rip], eax
	mov	eax, DWORD PTR x$w_buff0[rip]
	mov	DWORD PTR x$w_buff0[rip], eax
	mov	eax, DWORD PTR x$w_buff1[rip]
	mov	DWORD PTR x$w_buff1[rip], eax
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L171
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L172
.L171:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L173
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L174
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L173
.L174:
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L175
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L175
.L173:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L172
.L175:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L177
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L178
.L177:
	mov	eax, 1
	jmp	.L179
.L178:
	mov	eax, 0
.L179:
	and	eax, 1
	test	al, al
	je	.L180
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L180
	mov	eax, 1
	jmp	.L172
.L180:
	mov	eax, 0
.L172:
	mov	BYTE PTR x$w_buff0_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L182
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L183
.L182:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L184
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L185
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L184
.L185:
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L186
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L186
.L184:
	mov	eax, 1
	jmp	.L187
.L186:
	mov	eax, 0
.L187:
	and	eax, 1
	test	al, al
	je	.L188
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L188
	mov	eax, 1
	jmp	.L183
.L188:
	mov	eax, 0
.L183:
	mov	BYTE PTR x$w_buff1_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L190
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L191
.L190:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L192
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L193
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L192
.L193:
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L194
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L194
.L192:
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L191
.L194:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L196
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L197
.L196:
	mov	eax, 1
	jmp	.L198
.L197:
	mov	eax, 0
.L198:
	and	eax, 1
	test	al, al
	je	.L199
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L199
	mov	eax, 1
	jmp	.L191
.L199:
	mov	eax, 0
.L191:
	mov	BYTE PTR x$r_buff0_thd2[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L201
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L202
.L201:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L203
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L204
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L203
.L204:
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L205
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	xor	eax, 1
	test	al, al
	je	.L205
.L203:
	mov	eax, 1
	jmp	.L206
.L205:
	mov	eax, 0
.L206:
	and	eax, 1
	test	al, al
	je	.L207
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L207
	mov	eax, 1
	jmp	.L202
.L207:
	mov	eax, 0
.L202:
	mov	BYTE PTR x$r_buff1_thd2[rip], al
	mov	eax, DWORD PTR x[rip]
	mov	DWORD PTR __unbuffered_p1_EBX[rip], eax
	movzx	eax, BYTE PTR x$flush_delayed[rip]
	test	al, al
	je	.L209
	mov	eax, DWORD PTR x$mem_tmp[rip]
	jmp	.L210
.L209:
	mov	eax, DWORD PTR x[rip]
.L210:
	mov	DWORD PTR x[rip], eax
	mov	BYTE PTR x$flush_delayed[rip], 0
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L211
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L212
.L211:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L213
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	test	al, al
	je	.L213
	mov	eax, DWORD PTR x$w_buff1[rip]
	jmp	.L215
.L213:
	mov	eax, DWORD PTR x[rip]
	jmp	.L215
.L212:
	mov	eax, DWORD PTR x$w_buff0[rip]
.L215:
	mov	DWORD PTR x[rip], eax
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L216
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L217
.L216:
	mov	eax, 1
	jmp	.L218
.L217:
	mov	eax, 0
.L218:
	and	eax, 1
	test	al, al
	je	.L219
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L219
	mov	eax, 1
	jmp	.L220
.L219:
	mov	eax, 0
.L220:
	mov	BYTE PTR x$w_buff0_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L221
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L222
.L221:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L223
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	test	al, al
	jne	.L222
.L223:
	mov	eax, 1
	jmp	.L224
.L222:
	mov	eax, 0
.L224:
	and	eax, 1
	test	al, al
	je	.L225
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L225
	mov	eax, 1
	jmp	.L226
.L225:
	mov	eax, 0
.L226:
	mov	BYTE PTR x$w_buff1_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L227
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L228
.L227:
	mov	eax, 1
	jmp	.L229
.L228:
	mov	eax, 0
.L229:
	and	eax, 1
	test	al, al
	je	.L230
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L230
	mov	eax, 1
	jmp	.L231
.L230:
	mov	eax, 0
.L231:
	mov	BYTE PTR x$r_buff0_thd2[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L232
	movzx	eax, BYTE PTR x$r_buff0_thd2[rip]
	test	al, al
	jne	.L233
.L232:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L234
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	test	al, al
	jne	.L233
.L234:
	mov	eax, 1
	jmp	.L235
.L233:
	mov	eax, 0
.L235:
	and	eax, 1
	test	al, al
	je	.L236
	movzx	eax, BYTE PTR x$r_buff1_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L236
	mov	eax, 1
	jmp	.L237
.L236:
	mov	eax, 0
.L237:
	mov	BYTE PTR x$r_buff1_thd2[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L238
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L239
.L238:
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	test	al, al
	je	.L240
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	test	al, al
	je	.L240
	mov	eax, DWORD PTR y$w_buff1[rip]
	jmp	.L242
.L240:
	mov	eax, DWORD PTR y[rip]
	jmp	.L242
.L239:
	mov	eax, DWORD PTR y$w_buff0[rip]
.L242:
	mov	DWORD PTR y[rip], eax
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L243
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L244
.L243:
	mov	eax, 1
	jmp	.L245
.L244:
	mov	eax, 0
.L245:
	and	eax, 1
	test	al, al
	je	.L246
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L246
	mov	eax, 1
	jmp	.L247
.L246:
	mov	eax, 0
.L247:
	mov	BYTE PTR y$w_buff0_used[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L248
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L249
.L248:
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	test	al, al
	je	.L250
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	test	al, al
	jne	.L249
.L250:
	mov	eax, 1
	jmp	.L251
.L249:
	mov	eax, 0
.L251:
	and	eax, 1
	test	al, al
	je	.L252
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L252
	mov	eax, 1
	jmp	.L253
.L252:
	mov	eax, 0
.L253:
	mov	BYTE PTR y$w_buff1_used[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L254
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L255
.L254:
	mov	eax, 1
	jmp	.L256
.L255:
	mov	eax, 0
.L256:
	and	eax, 1
	test	al, al
	je	.L257
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L257
	mov	eax, 1
	jmp	.L258
.L257:
	mov	eax, 0
.L258:
	mov	BYTE PTR y$r_buff0_thd2[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L259
	movzx	eax, BYTE PTR y$r_buff0_thd2[rip]
	test	al, al
	jne	.L260
.L259:
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	test	al, al
	je	.L261
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	test	al, al
	jne	.L260
.L261:
	mov	eax, 1
	jmp	.L262
.L260:
	mov	eax, 0
.L262:
	and	eax, 1
	test	al, al
	je	.L263
	movzx	eax, BYTE PTR y$r_buff1_thd2[rip]
	movzx	eax, al
	test	eax, eax
	je	.L263
	mov	eax, 1
	jmp	.L264
.L263:
	mov	eax, 0
.L264:
	mov	BYTE PTR y$r_buff1_thd2[rip], al
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, DWORD PTR __unbuffered_cnt[rip]
	add	eax, 1
	mov	DWORD PTR __unbuffered_cnt[rip], eax
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	nondet_1@PLT
	cdqe
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	P1, .-P1
	.globl	fence
	.type	fence, @function
fence:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	fence, .-fence
	.globl	isync
	.type	isync, @function
isync:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	isync, .-isync
	.globl	lwfence
	.type	lwfence, @function
lwfence:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	lwfence, .-lwfence
	.globl	main
	.type	main, @function
main:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	ecx, 0
	lea	rdx, P0[rip]
	mov	esi, 0
	mov	edi, 0
	call	pthread_create@PLT
	mov	ecx, 0
	lea	rdx, P1[rip]
	mov	esi, 0
	mov	edi, 0
	call	pthread_create@PLT
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, DWORD PTR __unbuffered_cnt[rip]
	cmp	eax, 2
	sete	al
	mov	BYTE PTR main$tmp_guard0[rip], al
	mov	eax, 0
	call	__VERIFIER_atomic_end
	movzx	eax, BYTE PTR main$tmp_guard0[rip]
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	__VERIFIER_assume@PLT
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L270
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L271
.L270:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L272
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	test	al, al
	je	.L272
	mov	eax, DWORD PTR x$w_buff1[rip]
	jmp	.L274
.L272:
	mov	eax, DWORD PTR x[rip]
	jmp	.L274
.L271:
	mov	eax, DWORD PTR x$w_buff0[rip]
.L274:
	mov	DWORD PTR x[rip], eax
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L275
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L276
.L275:
	mov	eax, 1
	jmp	.L277
.L276:
	mov	eax, 0
.L277:
	and	eax, 1
	test	al, al
	je	.L278
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L278
	mov	eax, 1
	jmp	.L279
.L278:
	mov	eax, 0
.L279:
	mov	BYTE PTR x$w_buff0_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L280
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L281
.L280:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L282
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	test	al, al
	jne	.L281
.L282:
	mov	eax, 1
	jmp	.L283
.L281:
	mov	eax, 0
.L283:
	and	eax, 1
	test	al, al
	je	.L284
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L284
	mov	eax, 1
	jmp	.L285
.L284:
	mov	eax, 0
.L285:
	mov	BYTE PTR x$w_buff1_used[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L286
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L287
.L286:
	mov	eax, 1
	jmp	.L288
.L287:
	mov	eax, 0
.L288:
	and	eax, 1
	test	al, al
	je	.L289
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	movzx	eax, al
	test	eax, eax
	je	.L289
	mov	eax, 1
	jmp	.L290
.L289:
	mov	eax, 0
.L290:
	mov	BYTE PTR x$r_buff0_thd0[rip], al
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L291
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L292
.L291:
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L293
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	test	al, al
	jne	.L292
.L293:
	mov	eax, 1
	jmp	.L294
.L292:
	mov	eax, 0
.L294:
	and	eax, 1
	test	al, al
	je	.L295
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	movzx	eax, al
	test	eax, eax
	je	.L295
	mov	eax, 1
	jmp	.L296
.L295:
	mov	eax, 0
.L296:
	mov	BYTE PTR x$r_buff1_thd0[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L297
	movzx	eax, BYTE PTR y$r_buff0_thd0[rip]
	test	al, al
	jne	.L298
.L297:
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	test	al, al
	je	.L299
	movzx	eax, BYTE PTR y$r_buff1_thd0[rip]
	test	al, al
	je	.L299
	mov	eax, DWORD PTR y$w_buff1[rip]
	jmp	.L301
.L299:
	mov	eax, DWORD PTR y[rip]
	jmp	.L301
.L298:
	mov	eax, DWORD PTR y$w_buff0[rip]
.L301:
	mov	DWORD PTR y[rip], eax
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L302
	movzx	eax, BYTE PTR y$r_buff0_thd0[rip]
	test	al, al
	jne	.L303
.L302:
	mov	eax, 1
	jmp	.L304
.L303:
	mov	eax, 0
.L304:
	and	eax, 1
	test	al, al
	je	.L305
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L305
	mov	eax, 1
	jmp	.L306
.L305:
	mov	eax, 0
.L306:
	mov	BYTE PTR y$w_buff0_used[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L307
	movzx	eax, BYTE PTR y$r_buff0_thd0[rip]
	test	al, al
	jne	.L308
.L307:
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	test	al, al
	je	.L309
	movzx	eax, BYTE PTR y$r_buff1_thd0[rip]
	test	al, al
	jne	.L308
.L309:
	mov	eax, 1
	jmp	.L310
.L308:
	mov	eax, 0
.L310:
	and	eax, 1
	test	al, al
	je	.L311
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L311
	mov	eax, 1
	jmp	.L312
.L311:
	mov	eax, 0
.L312:
	mov	BYTE PTR y$w_buff1_used[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L313
	movzx	eax, BYTE PTR y$r_buff0_thd0[rip]
	test	al, al
	jne	.L314
.L313:
	mov	eax, 1
	jmp	.L315
.L314:
	mov	eax, 0
.L315:
	and	eax, 1
	test	al, al
	je	.L316
	movzx	eax, BYTE PTR y$r_buff0_thd0[rip]
	movzx	eax, al
	test	eax, eax
	je	.L316
	mov	eax, 1
	jmp	.L317
.L316:
	mov	eax, 0
.L317:
	mov	BYTE PTR y$r_buff0_thd0[rip], al
	movzx	eax, BYTE PTR y$w_buff0_used[rip]
	test	al, al
	je	.L318
	movzx	eax, BYTE PTR y$r_buff0_thd0[rip]
	test	al, al
	jne	.L319
.L318:
	movzx	eax, BYTE PTR y$w_buff1_used[rip]
	test	al, al
	je	.L320
	movzx	eax, BYTE PTR y$r_buff1_thd0[rip]
	test	al, al
	jne	.L319
.L320:
	mov	eax, 1
	jmp	.L321
.L319:
	mov	eax, 0
.L321:
	and	eax, 1
	test	al, al
	je	.L322
	movzx	eax, BYTE PTR y$r_buff1_thd0[rip]
	movzx	eax, al
	test	eax, eax
	je	.L322
	mov	eax, 1
	jmp	.L323
.L322:
	mov	eax, 0
.L323:
	mov	BYTE PTR y$r_buff1_thd0[rip], al
	mov	eax, 0
	call	__VERIFIER_atomic_end
	mov	eax, 0
	call	__VERIFIER_atomic_begin
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice0[rip], al
	mov	eax, 0
	call	nondet_0@PLT
	test	eax, eax
	setne	al
	mov	BYTE PTR weak$$choice2[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	mov	BYTE PTR x$flush_delayed[rip], al
	mov	eax, DWORD PTR x[rip]
	mov	DWORD PTR x$mem_tmp[rip], eax
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L324
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L325
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	test	al, al
	je	.L324
.L325:
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L326
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	test	al, al
	je	.L324
.L326:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L327
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	je	.L327
	mov	eax, DWORD PTR x$w_buff0[rip]
	jmp	.L329
.L327:
	mov	eax, DWORD PTR x$w_buff1[rip]
	jmp	.L329
.L324:
	mov	eax, DWORD PTR x[rip]
.L329:
	mov	DWORD PTR x[rip], eax
	mov	eax, DWORD PTR x$w_buff0[rip]
	mov	DWORD PTR x$w_buff0[rip], eax
	mov	eax, DWORD PTR x$w_buff1[rip]
	mov	DWORD PTR x$w_buff1[rip], eax
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L330
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L331
.L330:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L332
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L333
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L332
.L333:
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L334
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L334
.L332:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L331
.L334:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L336
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L337
.L336:
	mov	eax, 1
	jmp	.L338
.L337:
	mov	eax, 0
.L338:
	and	eax, 1
	test	al, al
	je	.L339
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L339
	mov	eax, 1
	jmp	.L331
.L339:
	mov	eax, 0
.L331:
	mov	BYTE PTR x$w_buff0_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L341
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L342
.L341:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L343
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L344
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L343
.L344:
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L345
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L345
.L343:
	mov	eax, 1
	jmp	.L346
.L345:
	mov	eax, 0
.L346:
	and	eax, 1
	test	al, al
	je	.L347
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	movzx	eax, al
	test	eax, eax
	je	.L347
	mov	eax, 1
	jmp	.L342
.L347:
	mov	eax, 0
.L342:
	mov	BYTE PTR x$w_buff1_used[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L349
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L350
.L349:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L351
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L352
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L351
.L352:
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L353
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L353
.L351:
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L350
.L353:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	test	al, al
	je	.L355
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	test	al, al
	jne	.L356
.L355:
	mov	eax, 1
	jmp	.L357
.L356:
	mov	eax, 0
.L357:
	and	eax, 1
	test	al, al
	je	.L358
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	movzx	eax, al
	test	eax, eax
	je	.L358
	mov	eax, 1
	jmp	.L350
.L358:
	mov	eax, 0
.L350:
	mov	BYTE PTR x$r_buff0_thd0[rip], al
	movzx	eax, BYTE PTR weak$$choice2[rip]
	test	al, al
	je	.L360
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	movzx	eax, al
	test	eax, eax
	setne	al
	jmp	.L361
.L360:
	movzx	eax, BYTE PTR x$w_buff0_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L362
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L363
	movzx	eax, BYTE PTR x$w_buff1_used[rip]
	xor	eax, 1
	test	al, al
	jne	.L362
.L363:
	movzx	eax, BYTE PTR x$r_buff0_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L364
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	xor	eax, 1
	test	al, al
	je	.L364
.L362:
	mov	eax, 1
	jmp	.L365
.L364:
	mov	eax, 0
.L365:
	and	eax, 1
	test	al, al
	je	.L366
	movzx	eax, BYTE PTR x$r_buff1_thd0[rip]
	movzx	eax, al
	test	eax, eax
	je	.L366
	mov	eax, 1
	jmp	.L361
.L366:
	mov	eax, 0
.L361:
	mov	BYTE PTR x$r_buff1_thd0[rip], al
	mov	eax, DWORD PTR x[rip]
	cmp	eax, 2
	jne	.L368
	mov	eax, DWORD PTR __unbuffered_p0_EAX[rip]
	cmp	eax, 1
	jne	.L368
	mov	eax, DWORD PTR __unbuffered_p1_EAX[rip]
	cmp	eax, 1
	jne	.L368
	mov	eax, DWORD PTR __unbuffered_p1_EBX[rip]
	test	eax, eax
	je	.L369
.L368:
	mov	eax, 1
	jmp	.L370
.L369:
	mov	eax, 0
.L370:
	and	eax, 1
	mov	BYTE PTR main$tmp_guard1[rip], al
	movzx	eax, BYTE PTR x$flush_delayed[rip]
	test	al, al
	je	.L371
	mov	eax, DWORD PTR x$mem_tmp[rip]
	jmp	.L372
.L371:
	mov	eax, DWORD PTR x[rip]
.L372:
	mov	DWORD PTR x[rip], eax
	mov	BYTE PTR x$flush_delayed[rip], 0
	mov	eax, 0
	call	__VERIFIER_atomic_end
	movzx	eax, BYTE PTR main$tmp_guard1[rip]
	movzx	eax, al
	mov	edi, eax
	call	__VERIFIER_assert
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"487143.c"
	.text
	.align	2
	.global	__VERIFIER_assert
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_assert, %function
__VERIFIER_assert:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L5
	nop
.L3:
	bl	__VERIFIER_error
.L5:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__VERIFIER_assert, .-__VERIFIER_assert
	.comm	__global_lock,4,4
	.align	2
	.global	__VERIFIER_atomic_begin
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_atomic_begin, %function
__VERIFIER_atomic_begin:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L8
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L8
	mov	r2, #1
	str	r2, [r3]
	nop
	pop	{fp, pc}
.L9:
	.align	2
.L8:
	.word	__global_lock
	.size	__VERIFIER_atomic_begin, .-__VERIFIER_atomic_begin
	.align	2
	.global	__VERIFIER_atomic_end
	.syntax unified
	.arm
	.fpu softvfp
	.type	__VERIFIER_atomic_end, %function
__VERIFIER_atomic_end:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L12
	ldr	r3, [r3]
	cmp	r3, #1
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	__VERIFIER_assume
	ldr	r3, .L12
	mov	r2, #0
	str	r2, [r3]
	nop
	pop	{fp, pc}
.L13:
	.align	2
.L12:
	.word	__global_lock
	.size	__VERIFIER_atomic_end, .-__VERIFIER_atomic_end
	.global	__unbuffered_cnt
	.bss
	.align	2
	.type	__unbuffered_cnt, %object
	.size	__unbuffered_cnt, 4
__unbuffered_cnt:
	.space	4
	.global	__unbuffered_p0_EAX
	.align	2
	.type	__unbuffered_p0_EAX, %object
	.size	__unbuffered_p0_EAX, 4
__unbuffered_p0_EAX:
	.space	4
	.global	__unbuffered_p1_EAX
	.align	2
	.type	__unbuffered_p1_EAX, %object
	.size	__unbuffered_p1_EAX, 4
__unbuffered_p1_EAX:
	.space	4
	.global	__unbuffered_p1_EBX
	.align	2
	.type	__unbuffered_p1_EBX, %object
	.size	__unbuffered_p1_EBX, 4
__unbuffered_p1_EBX:
	.space	4
	.comm	main$tmp_guard0,1,1
	.comm	main$tmp_guard1,1,1
	.global	x
	.align	2
	.type	x, %object
	.size	x, 4
x:
	.space	4
	.comm	x$flush_delayed,1,1
	.comm	x$mem_tmp,4,4
	.comm	x$r_buff0_thd0,1,1
	.comm	x$r_buff0_thd1,1,1
	.comm	x$r_buff0_thd2,1,1
	.comm	x$r_buff1_thd0,1,1
	.comm	x$r_buff1_thd1,1,1
	.comm	x$r_buff1_thd2,1,1
	.comm	x$read_delayed,1,1
	.comm	x$read_delayed_var,4,4
	.comm	x$w_buff0,4,4
	.comm	x$w_buff0_used,1,1
	.comm	x$w_buff1,4,4
	.comm	x$w_buff1_used,1,1
	.global	y
	.align	2
	.type	y, %object
	.size	y, 4
y:
	.space	4
	.comm	y$flush_delayed,1,1
	.comm	y$mem_tmp,4,4
	.comm	y$r_buff0_thd0,1,1
	.comm	y$r_buff0_thd1,1,1
	.comm	y$r_buff0_thd2,1,1
	.comm	y$r_buff1_thd0,1,1
	.comm	y$r_buff1_thd1,1,1
	.comm	y$r_buff1_thd2,1,1
	.comm	y$read_delayed,1,1
	.comm	y$read_delayed_var,4,4
	.comm	y$w_buff0,4,4
	.comm	y$w_buff0_used,1,1
	.comm	y$w_buff1,4,4
	.comm	y$w_buff1_used,1,1
	.comm	weak$$choice0,1,1
	.comm	weak$$choice2,1,1
	.text
	.align	2
	.global	P0
	.syntax unified
	.arm
	.fpu softvfp
	.type	P0, %function
P0:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L116
	mov	r2, #1
	str	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L15
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L16
.L15:
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L17
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L17
	ldr	r3, .L116+20
	ldr	r3, [r3]
	b	.L19
.L17:
	ldr	r3, .L116
	ldr	r3, [r3]
	b	.L19
.L16:
	ldr	r3, .L116+24
	ldr	r3, [r3]
.L19:
	ldr	r2, .L116
	str	r3, [r2]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L20
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L21
.L20:
	mov	r3, #1
	b	.L22
.L21:
	mov	r3, #0
.L22:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L23
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L23
	mov	r2, #1
	b	.L24
.L23:
	mov	r2, #0
.L24:
	ldr	r3, .L116+4
	strb	r2, [r3]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L25
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
.L25:
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L27
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L26
.L27:
	mov	r3, #1
	b	.L28
.L26:
	mov	r3, #0
.L28:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L29
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L29
	mov	r2, #1
	b	.L30
.L29:
	mov	r2, #0
.L30:
	ldr	r3, .L116+12
	strb	r2, [r3]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L31
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L32
.L31:
	mov	r3, #1
	b	.L33
.L32:
	mov	r3, #0
.L33:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L34
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L34
	mov	r2, #1
	b	.L35
.L34:
	mov	r2, #0
.L35:
	ldr	r3, .L116+8
	strb	r2, [r3]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L36
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
.L36:
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L38
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L37
.L38:
	mov	r3, #1
	b	.L39
.L37:
	mov	r3, #0
.L39:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L40
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L40
	mov	r2, #1
	b	.L41
.L40:
	mov	r2, #0
.L41:
	ldr	r3, .L116+16
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L116+28
	strb	r2, [r3]
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L116+32
	strb	r2, [r3]
	ldr	r3, .L116+32
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L116+36
	strb	r2, [r3]
	ldr	r3, .L116
	ldr	r3, [r3]
	ldr	r2, .L116+40
	str	r3, [r2]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L43:
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L42
.L44:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L45
	ldr	r3, .L116+24
	ldr	r3, [r3]
	b	.L47
.L45:
	ldr	r3, .L116+20
	ldr	r3, [r3]
	b	.L47
.L42:
	ldr	r3, .L116
	ldr	r3, [r3]
.L47:
	ldr	r2, .L116
	str	r3, [r2]
	ldr	r3, .L116+24
	ldr	r3, [r3]
	ldr	r2, .L116+24
	str	r3, [r2]
	ldr	r3, .L116+20
	ldr	r3, [r3]
	ldr	r2, .L116+20
	str	r3, [r2]
	ldr	r3, .L116+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L48
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L49
.L48:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L50
.L51:
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L52
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L52
.L50:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L49
.L52:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L54
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L55
.L54:
	mov	r3, #1
	b	.L56
.L55:
	mov	r3, #0
.L56:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L57
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L57
	mov	r3, #1
	b	.L49
.L57:
	mov	r3, #0
.L49:
	ldr	r2, .L116+4
	strb	r3, [r2]
	ldr	r3, .L116+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L59
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L60
.L59:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L61
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L62
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L61
.L62:
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L63
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L63
.L61:
	mov	r3, #1
	b	.L64
.L63:
	mov	r3, #0
.L64:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L65
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L65
	mov	r3, #1
	b	.L60
.L65:
	mov	r3, #0
.L60:
	ldr	r2, .L116+12
	strb	r3, [r2]
	ldr	r3, .L116+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L67
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L68
.L67:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L69
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L70
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L69
.L70:
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L71
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L71
.L69:
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L68
.L71:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L73
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
.L73:
	mov	r3, #1
	b	.L75
.L74:
	mov	r3, #0
.L75:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L76
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L76
	mov	r3, #1
	b	.L68
.L76:
	mov	r3, #0
.L68:
	ldr	r2, .L116+8
	strb	r3, [r2]
	ldr	r3, .L116+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L79
.L78:
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L80
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L81
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L80
.L81:
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L82
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L82
.L80:
	mov	r3, #1
	b	.L83
.L82:
	mov	r3, #0
.L83:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L84
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L84
	mov	r3, #1
	b	.L79
.L84:
	mov	r3, #0
.L79:
	ldr	r2, .L116+16
	strb	r3, [r2]
	ldr	r3, .L116
	ldr	r3, [r3]
	ldr	r2, .L116+44
	str	r3, [r2]
	ldr	r3, .L116+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L86
	ldr	r3, .L116+40
	ldr	r3, [r3]
	b	.L87
.L86:
	ldr	r3, .L116
	ldr	r3, [r3]
.L87:
	ldr	r2, .L116
	str	r3, [r2]
	ldr	r3, .L116+36
	mov	r2, #0
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L88
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L89
.L88:
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L90
	ldr	r3, .L116+20
	ldr	r3, [r3]
	b	.L92
.L90:
	ldr	r3, .L116
	ldr	r3, [r3]
	b	.L92
.L89:
	ldr	r3, .L116+24
	ldr	r3, [r3]
.L92:
	ldr	r2, .L116
	str	r3, [r2]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L93
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L94
.L93:
	mov	r3, #1
	b	.L95
.L94:
	mov	r3, #0
.L95:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L96
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	mov	r2, #1
	b	.L97
.L96:
	mov	r2, #0
.L97:
	ldr	r3, .L116+4
	strb	r2, [r3]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L98
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
.L98:
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L100
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L99
.L100:
	mov	r3, #1
	b	.L101
.L99:
	mov	r3, #0
.L101:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L102
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L102
	mov	r2, #1
	b	.L103
.L102:
	mov	r2, #0
.L103:
	ldr	r3, .L116+12
	strb	r2, [r3]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L104
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L105
.L104:
	mov	r3, #1
	b	.L106
.L105:
	mov	r3, #0
.L106:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L107
	mov	r2, #1
	b	.L108
.L107:
	mov	r2, #0
.L108:
	ldr	r3, .L116+8
	strb	r2, [r3]
	ldr	r3, .L116+4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L109
	ldr	r3, .L116+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
.L109:
	ldr	r3, .L116+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L111
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L110
.L111:
	mov	r3, #1
	b	.L112
.L110:
	mov	r3, #0
.L112:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L113
	ldr	r3, .L116+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L113
	mov	r2, #1
	b	.L114
.L113:
	mov	r2, #0
.L114:
	ldr	r3, .L116+16
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L116+48
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L116+48
	str	r3, [r2]
	bl	__VERIFIER_atomic_end
	bl	nondet_1
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L117:
	.align	2
.L116:
	.word	x
	.word	x$w_buff0_used
	.word	x$r_buff0_thd1
	.word	x$w_buff1_used
	.word	x$r_buff1_thd1
	.word	x$w_buff1
	.word	x$w_buff0
	.word	weak$$choice0
	.word	weak$$choice2
	.word	x$flush_delayed
	.word	x$mem_tmp
	.word	__unbuffered_p0_EAX
	.word	__unbuffered_cnt
	.size	P0, .-P0
	.align	2
	.global	P1
	.syntax unified
	.arm
	.fpu softvfp
	.type	P1, %function
P1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L272
	ldr	r3, [r3]
	ldr	r2, .L272+4
	str	r3, [r2]
	ldr	r3, .L272
	mov	r2, #2
	str	r2, [r3]
	ldr	r3, .L272+8
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+12
	strb	r2, [r3]
	ldr	r3, .L272+8
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L119
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L120
.L119:
	mov	r3, #1
	b	.L121
.L120:
	mov	r3, #0
.L121:
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, .L272+16
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+20
	strb	r2, [r3]
	ldr	r3, .L272+24
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+28
	strb	r2, [r3]
	ldr	r3, .L272+32
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+36
	strb	r2, [r3]
	ldr	r3, .L272+32
	mov	r2, #1
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L272+40
	ldr	r3, [r3]
	ldr	r2, .L272+44
	str	r3, [r2]
	ldr	r3, .L272+40
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L272+104
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+112
	strb	r2, [r3]
	ldr	r3, .L272+104
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L122
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L123
.L122:
	mov	r3, #1
	b	.L124
.L123:
	mov	r3, #0
.L124:
	mov	r0, r3
	bl	__VERIFIER_assert
	ldr	r3, .L272+48
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+52
	strb	r2, [r3]
	ldr	r3, .L272+56
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+60
	strb	r2, [r3]
	ldr	r3, .L272+108
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+116
	strb	r2, [r3]
	ldr	r3, .L272+108
	mov	r2, #1
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L272+64
	strb	r2, [r3]
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L272+68
	strb	r2, [r3]
	ldr	r3, .L272+68
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+72
	strb	r2, [r3]
	ldr	r3, .L272+76
	ldr	r3, [r3]
	ldr	r2, .L272+80
	str	r3, [r2]
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L126
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
.L126:
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L127
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L125
.L127:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L128
	ldr	r3, .L272+40
	ldr	r3, [r3]
	b	.L130
.L128:
	ldr	r3, .L272+44
	ldr	r3, [r3]
	b	.L130
.L125:
	ldr	r3, .L272+76
	ldr	r3, [r3]
.L130:
	ldr	r2, .L272+76
	str	r3, [r2]
	ldr	r3, .L272+40
	ldr	r3, [r3]
	ldr	r2, .L272+40
	str	r3, [r2]
	ldr	r3, .L272+44
	ldr	r3, [r3]
	ldr	r2, .L272+44
	str	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L131
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L132
.L131:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L133
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L134
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L133
.L134:
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L135
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L135
.L133:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L132
.L135:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L137
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L138
.L137:
	mov	r3, #1
	b	.L139
.L138:
	mov	r3, #0
.L139:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L140
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L140
	mov	r3, #1
	b	.L132
.L140:
	mov	r3, #0
.L132:
	ldr	r2, .L272+104
	strb	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L142
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L143
.L142:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L144
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L145
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L144
.L145:
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L146
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L146
.L144:
	mov	r3, #1
	b	.L147
.L146:
	mov	r3, #0
.L147:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L148
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L148
	mov	r3, #1
	b	.L143
.L148:
	mov	r3, #0
.L143:
	ldr	r2, .L272+112
	strb	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L150
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L151
.L150:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L152
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L153
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L152
.L153:
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L154
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L154
.L152:
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L151
.L154:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L156
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L157
.L156:
	mov	r3, #1
	b	.L158
.L157:
	mov	r3, #0
.L158:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L159
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L159
	mov	r3, #1
	b	.L151
.L159:
	mov	r3, #0
.L151:
	ldr	r2, .L272+108
	strb	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L161
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L162
.L161:
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L163
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L164
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L163
.L164:
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L165
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L165
.L163:
	mov	r3, #1
	b	.L166
.L165:
	mov	r3, #0
.L166:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L167
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L167
	mov	r3, #1
	b	.L162
.L167:
	mov	r3, #0
.L162:
	ldr	r2, .L272+116
	strb	r3, [r2]
	ldr	r3, .L272+76
	ldr	r3, [r3]
	ldr	r2, .L272+84
	str	r3, [r2]
	ldr	r3, .L272+72
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L169
	ldr	r3, .L272+80
	ldr	r3, [r3]
	b	.L170
.L169:
	ldr	r3, .L272+76
	ldr	r3, [r3]
.L170:
	ldr	r2, .L272+76
	str	r3, [r2]
	ldr	r3, .L272+72
	mov	r2, #0
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L272+64
	strb	r2, [r3]
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L272+68
	strb	r2, [r3]
	ldr	r3, .L272+68
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L272+88
	strb	r2, [r3]
	ldr	r3, .L272+92
	ldr	r3, [r3]
	ldr	r2, .L272+96
	str	r3, [r2]
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L172
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
.L172:
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L173
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L171
.L173:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L174
	ldr	r3, .L272
	ldr	r3, [r3]
	b	.L176
.L174:
	ldr	r3, .L272+4
	ldr	r3, [r3]
	b	.L176
.L171:
	ldr	r3, .L272+92
	ldr	r3, [r3]
.L176:
	ldr	r2, .L272+92
	str	r3, [r2]
	ldr	r3, .L272
	ldr	r3, [r3]
	ldr	r2, .L272
	str	r3, [r2]
	ldr	r3, .L272+4
	ldr	r3, [r3]
	ldr	r2, .L272+4
	str	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L177
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L178
.L177:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L179
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L180
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L179
.L180:
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L181
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L181
.L179:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L178
.L181:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L183
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L184
.L183:
	mov	r3, #1
	b	.L185
.L184:
	mov	r3, #0
.L185:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L186
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L186
	mov	r3, #1
	b	.L178
.L186:
	mov	r3, #0
.L178:
	ldr	r2, .L272+8
	strb	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L188
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L189
.L188:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L190
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L191
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L190
.L191:
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L192
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L192
.L190:
	mov	r3, #1
	b	.L193
.L192:
	mov	r3, #0
.L193:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L194
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L194
	mov	r3, #1
	b	.L189
.L194:
	mov	r3, #0
.L189:
	ldr	r2, .L272+12
	strb	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L196
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L197
.L196:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L198
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L199
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L198
.L199:
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L200
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L200
.L198:
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L197
.L200:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L202
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L203
.L202:
	mov	r3, #1
	b	.L204
.L203:
	mov	r3, #0
.L204:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L205
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L205
	mov	r3, #1
	b	.L197
.L205:
	mov	r3, #0
.L197:
	ldr	r2, .L272+32
	strb	r3, [r2]
	ldr	r3, .L272+68
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L207
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L208
.L207:
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L209
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L210
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L209
.L210:
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L211
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L211
.L209:
	mov	r3, #1
	b	.L212
.L211:
	mov	r3, #0
.L212:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L213
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L213
	mov	r3, #1
	b	.L208
.L213:
	mov	r3, #0
.L208:
	ldr	r2, .L272+36
	strb	r3, [r2]
	ldr	r3, .L272+92
	ldr	r3, [r3]
	ldr	r2, .L272+100
	str	r3, [r2]
	ldr	r3, .L272+88
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L215
	ldr	r3, .L272+96
	ldr	r3, [r3]
	b	.L216
.L215:
	ldr	r3, .L272+92
	ldr	r3, [r3]
.L216:
	ldr	r2, .L272+92
	str	r3, [r2]
	ldr	r3, .L272+88
	mov	r2, #0
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L217
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L218
.L217:
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L219
	ldr	r3, .L272+4
	ldr	r3, [r3]
	b	.L221
.L219:
	ldr	r3, .L272+92
	ldr	r3, [r3]
	b	.L221
.L218:
	ldr	r3, .L272
	ldr	r3, [r3]
.L221:
	ldr	r2, .L272+92
	str	r3, [r2]
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L223
.L222:
	mov	r3, #1
	b	.L224
.L223:
	mov	r3, #0
.L224:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L225
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L225
	mov	r2, #1
	b	.L226
.L225:
	mov	r2, #0
.L226:
	ldr	r3, .L272+8
	strb	r2, [r3]
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L227
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
.L227:
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L229
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L228
.L229:
	mov	r3, #1
	b	.L230
.L228:
	mov	r3, #0
.L230:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L231
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L231
	mov	r2, #1
	b	.L232
.L231:
	mov	r2, #0
.L232:
	ldr	r3, .L272+12
	strb	r2, [r3]
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L233
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L234
.L233:
	mov	r3, #1
	b	.L235
.L234:
	mov	r3, #0
.L235:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L236
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L236
	mov	r2, #1
	b	.L237
.L236:
	mov	r2, #0
.L237:
	ldr	r3, .L272+32
	strb	r2, [r3]
	ldr	r3, .L272+8
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L238
	ldr	r3, .L272+32
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
.L238:
	ldr	r3, .L272+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L240
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L239
.L240:
	mov	r3, #1
	b	.L241
.L239:
	mov	r3, #0
.L241:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L242
	ldr	r3, .L272+36
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L242
	mov	r2, #1
	b	.L243
.L242:
	mov	r2, #0
.L243:
	ldr	r3, .L272+36
	strb	r2, [r3]
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L244
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L245
.L244:
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L246
	ldr	r3, .L272+44
	ldr	r3, [r3]
	b	.L248
.L246:
	ldr	r3, .L272+76
	ldr	r3, [r3]
	b	.L248
.L245:
	ldr	r3, .L272+40
	ldr	r3, [r3]
.L248:
	ldr	r2, .L272+76
	str	r3, [r2]
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L249
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L250
.L249:
	mov	r3, #1
	b	.L251
.L250:
	mov	r3, #0
.L251:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L252
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L252
	mov	r2, #1
	b	.L253
.L252:
	mov	r2, #0
.L253:
	ldr	r3, .L272+104
	strb	r2, [r3]
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L254
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
.L254:
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L256
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L255
.L256:
	mov	r3, #1
	b	.L257
.L255:
	mov	r3, #0
.L257:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L258
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L258
	mov	r2, #1
	b	.L259
.L258:
	mov	r2, #0
.L259:
	ldr	r3, .L272+112
	strb	r2, [r3]
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L260
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L261
.L260:
	mov	r3, #1
	b	.L262
.L273:
	.align	2
.L272:
	.word	x$w_buff0
	.word	x$w_buff1
	.word	x$w_buff0_used
	.word	x$w_buff1_used
	.word	x$r_buff0_thd0
	.word	x$r_buff1_thd0
	.word	x$r_buff0_thd1
	.word	x$r_buff1_thd1
	.word	x$r_buff0_thd2
	.word	x$r_buff1_thd2
	.word	y$w_buff0
	.word	y$w_buff1
	.word	y$r_buff0_thd0
	.word	y$r_buff1_thd0
	.word	y$r_buff0_thd1
	.word	y$r_buff1_thd1
	.word	weak$$choice0
	.word	weak$$choice2
	.word	y$flush_delayed
	.word	y
	.word	y$mem_tmp
	.word	__unbuffered_p1_EAX
	.word	x$flush_delayed
	.word	x
	.word	x$mem_tmp
	.word	__unbuffered_p1_EBX
	.word	y$w_buff0_used
	.word	y$r_buff0_thd2
	.word	y$w_buff1_used
	.word	y$r_buff1_thd2
	.word	__unbuffered_cnt
.L261:
	mov	r3, #0
.L262:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L263
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L263
	mov	r2, #1
	b	.L264
.L263:
	mov	r2, #0
.L264:
	ldr	r3, .L272+108
	strb	r2, [r3]
	ldr	r3, .L272+104
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L265
	ldr	r3, .L272+108
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
.L265:
	ldr	r3, .L272+112
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L267
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L266
.L267:
	mov	r3, #1
	b	.L268
.L266:
	mov	r3, #0
.L268:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L269
	ldr	r3, .L272+116
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L269
	mov	r2, #1
	b	.L270
.L269:
	mov	r2, #0
.L270:
	ldr	r3, .L272+116
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L272+120
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L272+120
	str	r3, [r2]
	bl	__VERIFIER_atomic_end
	bl	nondet_1
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	P1, .-P1
	.align	2
	.global	fence
	.syntax unified
	.arm
	.fpu softvfp
	.type	fence, %function
fence:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	fence, .-fence
	.align	2
	.global	isync
	.syntax unified
	.arm
	.fpu softvfp
	.type	isync, %function
isync:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	isync, .-isync
	.align	2
	.global	lwfence
	.syntax unified
	.arm
	.fpu softvfp
	.type	lwfence, %function
lwfence:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	lwfence, .-lwfence
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r3, #0
	ldr	r2, .L382
	mov	r1, #0
	mov	r0, #0
	bl	pthread_create
	mov	r3, #0
	ldr	r2, .L382+4
	mov	r1, #0
	mov	r0, #0
	bl	pthread_create
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L382+8
	ldr	r3, [r3]
	cmp	r3, #2
	moveq	r3, #1
	movne	r3, #0
	and	r2, r3, #255
	ldr	r3, .L382+12
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	ldr	r3, .L382+12
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r3
	bl	__VERIFIER_assume
	bl	__VERIFIER_atomic_begin
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L278
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L279
.L278:
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L280
	ldr	r3, .L382+32
	ldr	r3, [r3]
	b	.L282
.L280:
	ldr	r3, .L382+36
	ldr	r3, [r3]
	b	.L282
.L279:
	ldr	r3, .L382+40
	ldr	r3, [r3]
.L282:
	ldr	r2, .L382+36
	str	r3, [r2]
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L283
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L284
.L283:
	mov	r3, #1
	b	.L285
.L284:
	mov	r3, #0
.L285:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L286
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L286
	mov	r2, #1
	b	.L287
.L286:
	mov	r2, #0
.L287:
	ldr	r3, .L382+16
	strb	r2, [r3]
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L288
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
.L288:
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L290
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L289
.L290:
	mov	r3, #1
	b	.L291
.L289:
	mov	r3, #0
.L291:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L292
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L292
	mov	r2, #1
	b	.L293
.L292:
	mov	r2, #0
.L293:
	ldr	r3, .L382+24
	strb	r2, [r3]
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L294
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L295
.L294:
	mov	r3, #1
	b	.L296
.L295:
	mov	r3, #0
.L296:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L297
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L297
	mov	r2, #1
	b	.L298
.L297:
	mov	r2, #0
.L298:
	ldr	r3, .L382+20
	strb	r2, [r3]
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L299
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
.L299:
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L300
.L301:
	mov	r3, #1
	b	.L302
.L300:
	mov	r3, #0
.L302:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L303
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L303
	mov	r2, #1
	b	.L304
.L303:
	mov	r2, #0
.L304:
	ldr	r3, .L382+28
	strb	r2, [r3]
	ldr	r3, .L382+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L305
	ldr	r3, .L382+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L306
.L305:
	ldr	r3, .L382+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L382+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L307
	ldr	r3, .L382+60
	ldr	r3, [r3]
	b	.L309
.L307:
	ldr	r3, .L382+64
	ldr	r3, [r3]
	b	.L309
.L306:
	ldr	r3, .L382+68
	ldr	r3, [r3]
.L309:
	ldr	r2, .L382+64
	str	r3, [r2]
	ldr	r3, .L382+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L310
	ldr	r3, .L382+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L311
.L310:
	mov	r3, #1
	b	.L312
.L311:
	mov	r3, #0
.L312:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L313
	ldr	r3, .L382+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L313
	mov	r2, #1
	b	.L314
.L313:
	mov	r2, #0
.L314:
	ldr	r3, .L382+44
	strb	r2, [r3]
	ldr	r3, .L382+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L315
	ldr	r3, .L382+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
.L315:
	ldr	r3, .L382+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L317
	ldr	r3, .L382+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L316
.L317:
	mov	r3, #1
	b	.L318
.L316:
	mov	r3, #0
.L318:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L319
	ldr	r3, .L382+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L319
	mov	r2, #1
	b	.L320
.L319:
	mov	r2, #0
.L320:
	ldr	r3, .L382+52
	strb	r2, [r3]
	ldr	r3, .L382+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	ldr	r3, .L382+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L322
.L321:
	mov	r3, #1
	b	.L323
.L322:
	mov	r3, #0
.L323:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L324
	ldr	r3, .L382+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L324
	mov	r2, #1
	b	.L325
.L324:
	mov	r2, #0
.L325:
	ldr	r3, .L382+48
	strb	r2, [r3]
	ldr	r3, .L382+44
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L326
	ldr	r3, .L382+48
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
.L326:
	ldr	r3, .L382+52
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L328
	ldr	r3, .L382+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L327
.L328:
	mov	r3, #1
	b	.L329
.L327:
	mov	r3, #0
.L329:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L330
	ldr	r3, .L382+56
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L330
	mov	r2, #1
	b	.L331
.L330:
	mov	r2, #0
.L331:
	ldr	r3, .L382+56
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	bl	__VERIFIER_atomic_begin
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L382+72
	strb	r2, [r3]
	bl	nondet_0
	mov	r3, r0
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r2, r3, #255
	ldr	r3, .L382+76
	strb	r2, [r3]
	ldr	r3, .L382+76
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, .L382+80
	strb	r2, [r3]
	ldr	r3, .L382+36
	ldr	r3, [r3]
	ldr	r2, .L382+84
	str	r3, [r2]
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L333
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L333:
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L334
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L332
.L334:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L335
	ldr	r3, .L382+40
	ldr	r3, [r3]
	b	.L337
.L335:
	ldr	r3, .L382+32
	ldr	r3, [r3]
	b	.L337
.L332:
	ldr	r3, .L382+36
	ldr	r3, [r3]
.L337:
	ldr	r2, .L382+36
	str	r3, [r2]
	ldr	r3, .L382+40
	ldr	r3, [r3]
	ldr	r2, .L382+40
	str	r3, [r2]
	ldr	r3, .L382+32
	ldr	r3, [r3]
	ldr	r2, .L382+32
	str	r3, [r2]
	ldr	r3, .L382+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L338
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L339
.L338:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L340
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L341
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L340
.L341:
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L342
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L342
.L340:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L339
.L342:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L344
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L345
.L344:
	mov	r3, #1
	b	.L346
.L345:
	mov	r3, #0
.L346:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L347
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L347
	mov	r3, #1
	b	.L339
.L347:
	mov	r3, #0
.L339:
	ldr	r2, .L382+16
	strb	r3, [r2]
	ldr	r3, .L382+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L349
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L350
.L349:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L351
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L352
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L351
.L352:
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L353
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L353
.L351:
	mov	r3, #1
	b	.L354
.L353:
	mov	r3, #0
.L354:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L355
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L355
	mov	r3, #1
	b	.L350
.L355:
	mov	r3, #0
.L350:
	ldr	r2, .L382+24
	strb	r3, [r2]
	ldr	r3, .L382+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L357
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L358
.L357:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L359
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L360
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L359
.L360:
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L361
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L361
.L359:
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L358
.L361:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L364
.L363:
	mov	r3, #1
	b	.L365
.L364:
	mov	r3, #0
.L365:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L366
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L366
	mov	r3, #1
	b	.L358
.L366:
	mov	r3, #0
.L358:
	ldr	r2, .L382+20
	strb	r3, [r2]
	ldr	r3, .L382+76
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L368
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	b	.L369
.L368:
	ldr	r3, .L382+16
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L370
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L371
	ldr	r3, .L382+24
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	bne	.L370
.L371:
	ldr	r3, .L382+20
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L372
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	eor	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L372
.L370:
	mov	r3, #1
	b	.L373
.L372:
	mov	r3, #0
.L373:
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L374
	ldr	r3, .L382+28
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L374
	mov	r3, #1
	b	.L369
.L374:
	mov	r3, #0
.L369:
	ldr	r2, .L382+28
	strb	r3, [r2]
	ldr	r3, .L382+36
	ldr	r3, [r3]
	cmp	r3, #2
	bne	.L376
	ldr	r3, .L382+88
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L376
	ldr	r3, .L382+92
	ldr	r3, [r3]
	cmp	r3, #1
	bne	.L376
	ldr	r3, .L382+96
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L377
.L376:
	mov	r3, #1
	b	.L378
.L377:
	mov	r3, #0
.L378:
	and	r3, r3, #1
	and	r2, r3, #255
	ldr	r3, .L382+100
	strb	r2, [r3]
	ldr	r3, .L382+80
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L379
	ldr	r3, .L382+84
	ldr	r3, [r3]
	b	.L380
.L379:
	ldr	r3, .L382+36
	ldr	r3, [r3]
.L380:
	ldr	r2, .L382+36
	str	r3, [r2]
	ldr	r3, .L382+80
	mov	r2, #0
	strb	r2, [r3]
	bl	__VERIFIER_atomic_end
	ldr	r3, .L382+100
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r3
	bl	__VERIFIER_assert
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
.L383:
	.align	2
.L382:
	.word	P0
	.word	P1
	.word	__unbuffered_cnt
	.word	main$tmp_guard0
	.word	x$w_buff0_used
	.word	x$r_buff0_thd0
	.word	x$w_buff1_used
	.word	x$r_buff1_thd0
	.word	x$w_buff1
	.word	x
	.word	x$w_buff0
	.word	y$w_buff0_used
	.word	y$r_buff0_thd0
	.word	y$w_buff1_used
	.word	y$r_buff1_thd0
	.word	y$w_buff1
	.word	y
	.word	y$w_buff0
	.word	weak$$choice0
	.word	weak$$choice2
	.word	x$flush_delayed
	.word	x$mem_tmp
	.word	__unbuffered_p0_EAX
	.word	__unbuffered_p1_EAX
	.word	__unbuffered_p1_EBX
	.word	main$tmp_guard1
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
