	.file	"212251.c"
	.intel_syntax noprefix
	.text
	.globl	mpadd
	.type	mpadd, @function
mpadd:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	DWORD PTR -44[rbp], ecx
	mov	WORD PTR -6[rbp], 0
	mov	eax, DWORD PTR -44[rbp]
	mov	DWORD PTR -4[rbp], eax
	jmp	.L2
.L3:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	edx, eax
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	movzx	eax, al
	add	eax, edx
	mov	WORD PTR -6[rbp], ax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR -6[rbp]
	mov	BYTE PTR [rax], dl
	sub	DWORD PTR -4[rbp], 1
.L2:
	cmp	DWORD PTR -4[rbp], 0
	jg	.L3
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	mov	BYTE PTR [rax], dl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	mpadd, .-mpadd
	.globl	mpsub
	.type	mpsub, @function
mpsub:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	QWORD PTR -48[rbp], rcx
	mov	DWORD PTR -52[rbp], r8d
	mov	WORD PTR -6[rbp], 256
	mov	eax, DWORD PTR -52[rbp]
	mov	DWORD PTR -4[rbp], eax
	jmp	.L5
.L6:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	edx, DWORD PTR -4[rbp]
	movsx	rcx, edx
	mov	rdx, QWORD PTR -48[rbp]
	add	rdx, rcx
	movzx	edx, BYTE PTR [rdx]
	movzx	edx, dl
	sub	eax, edx
	mov	ecx, eax
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	movzx	eax, al
	add	eax, ecx
	add	ax, 255
	mov	WORD PTR -6[rbp], ax
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR -6[rbp]
	mov	BYTE PTR [rax], dl
	sub	DWORD PTR -4[rbp], 1
.L5:
	cmp	DWORD PTR -4[rbp], 0
	jg	.L6
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	movzx	eax, al
	lea	edx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	mpsub, .-mpsub
	.globl	mpsad
	.type	mpsad, @function
mpsad:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	mov	DWORD PTR -40[rbp], ecx
	mov	eax, DWORD PTR -40[rbp]
	sal	eax, 8
	mov	WORD PTR -6[rbp], ax
	mov	eax, DWORD PTR -36[rbp]
	mov	DWORD PTR -4[rbp], eax
	jmp	.L8
.L9:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	edx, al
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	movzx	eax, al
	add	eax, edx
	mov	WORD PTR -6[rbp], ax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR -6[rbp]
	mov	BYTE PTR [rax], dl
	sub	DWORD PTR -4[rbp], 1
.L8:
	cmp	DWORD PTR -4[rbp], 0
	jg	.L9
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	mov	BYTE PTR [rax], dl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	mpsad, .-mpsad
	.globl	mpsmu
	.type	mpsmu, @function
mpsmu:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	mov	DWORD PTR -40[rbp], ecx
	mov	WORD PTR -6[rbp], 0
	mov	eax, DWORD PTR -36[rbp]
	mov	DWORD PTR -4[rbp], eax
	jmp	.L11
.L12:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	edx, DWORD PTR -40[rbp]
	imul	edx, eax
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	movzx	eax, al
	add	eax, edx
	mov	WORD PTR -6[rbp], ax
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR -6[rbp]
	mov	BYTE PTR [rax], dl
	sub	DWORD PTR -4[rbp], 1
.L11:
	cmp	DWORD PTR -4[rbp], 0
	jg	.L12
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	mov	BYTE PTR [rax], dl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	mpsmu, .-mpsmu
	.globl	mpsdv
	.type	mpsdv, @function
mpsdv:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	mov	DWORD PTR -40[rbp], ecx
	mov	QWORD PTR -48[rbp], r8
	mov	rax, QWORD PTR -48[rbp]
	mov	DWORD PTR [rax], 0
	mov	DWORD PTR -8[rbp], 1
	jmp	.L14
.L15:
	mov	rax, QWORD PTR -48[rbp]
	mov	eax, DWORD PTR [rax]
	sal	eax, 8
	mov	ecx, eax
	mov	eax, DWORD PTR -8[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	add	eax, ecx
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	cdq
	idiv	DWORD PTR -40[rbp]
	mov	ecx, eax
	mov	eax, DWORD PTR -8[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	edx, ecx
	mov	BYTE PTR [rax], dl
	mov	eax, DWORD PTR -4[rbp]
	cdq
	idiv	DWORD PTR -40[rbp]
	mov	rax, QWORD PTR -48[rbp]
	mov	DWORD PTR [rax], edx
	add	DWORD PTR -8[rbp], 1
.L14:
	mov	eax, DWORD PTR -8[rbp]
	cmp	eax, DWORD PTR -36[rbp]
	jle	.L15
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	mpsdv, .-mpsdv
	.globl	mpneg
	.type	mpneg, @function
mpneg:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	WORD PTR -6[rbp], 256
	mov	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR -4[rbp], eax
	jmp	.L17
.L18:
	movzx	eax, WORD PTR -6[rbp]
	shr	ax, 8
	movzx	eax, al
	mov	edx, DWORD PTR -4[rbp]
	movsx	rcx, edx
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	movzx	edx, BYTE PTR [rdx]
	movzx	edx, dl
	sub	eax, edx
	add	ax, 255
	mov	WORD PTR -6[rbp], ax
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	edx, WORD PTR -6[rbp]
	mov	BYTE PTR [rax], dl
	sub	DWORD PTR -4[rbp], 1
.L17:
	cmp	DWORD PTR -4[rbp], 0
	jg	.L18
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	mpneg, .-mpneg
	.globl	mpmov
	.type	mpmov, @function
mpmov:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	DWORD PTR -36[rbp], edx
	mov	DWORD PTR -4[rbp], 1
	jmp	.L20
.L21:
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -4[rbp]
	movsx	rcx, edx
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -4[rbp], 1
.L20:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -36[rbp]
	jle	.L21
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	mpmov, .-mpmov
	.globl	mplsh
	.type	mplsh, @function
mplsh:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -4[rbp], 1
	jmp	.L23
.L24:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 1[rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	mov	edx, DWORD PTR -4[rbp]
	movsx	rcx, edx
	mov	rdx, QWORD PTR -24[rbp]
	add	rdx, rcx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR [rdx], al
	add	DWORD PTR -4[rbp], 1
.L23:
	mov	eax, DWORD PTR -4[rbp]
	cmp	eax, DWORD PTR -28[rbp]
	jle	.L24
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	mplsh, .-mplsh
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"212251.c"
	.text
	.align	2
	.global	mpadd
	.syntax unified
	.arm
	.fpu softvfp
	.type	mpadd, %function
mpadd:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	mov	r3, #0
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-28]
	str	r3, [fp, #-8]
	b	.L2
.L3:
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-8]
	ldr	r1, [fp, #-24]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrh	r2, [fp, #-10]	@ movhi
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
.L2:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bgt	.L3
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	and	r2, r2, #255
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mpadd, .-mpadd
	.align	2
	.global	mpsub
	.syntax unified
	.arm
	.fpu softvfp
	.type	mpsub, %function
mpsub:
	@ args = 4, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	mov	r3, #256
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #4]
	str	r3, [fp, #-8]
	b	.L5
.L6:
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-24]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-8]
	ldr	r1, [fp, #-28]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #255
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldrh	r2, [fp, #-10]	@ movhi
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
.L5:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bgt	.L6
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	sub	r2, r3, #1
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mpsub, .-mpsub
	.align	2
	.global	mpsad
	.syntax unified
	.arm
	.fpu softvfp
	.type	mpsad, %function
mpsad:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	lsl	r3, r3, #8
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-24]
	str	r3, [fp, #-8]
	b	.L8
.L9:
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrh	r2, [fp, #-10]	@ movhi
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
.L8:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bgt	.L9
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	and	r2, r2, #255
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mpsad, .-mpsad
	.align	2
	.global	mpsmu
	.syntax unified
	.arm
	.fpu softvfp
	.type	mpsmu, %function
mpsmu:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	mov	r3, #0
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-24]
	str	r3, [fp, #-8]
	b	.L11
.L12:
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, [fp, #-28]
	lsl	r2, r2, #16
	lsr	r2, r2, #16
	mul	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrh	r2, [fp, #-10]	@ movhi
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
.L11:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bgt	.L12
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	and	r2, r2, #255
	strb	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mpsmu, .-mpsmu
	.global	__aeabi_idiv
	.global	__aeabi_idivmod
	.align	2
	.global	mpsdv
	.syntax unified
	.arm
	.fpu softvfp
	.type	mpsdv, %function
mpsdv:
	@ args = 4, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	ldr	r3, [fp, #4]
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #1
	str	r3, [fp, #-12]
	b	.L14
.L15:
	ldr	r3, [fp, #4]
	ldr	r3, [r3]
	lsl	r3, r3, #8
	ldr	r2, [fp, #-12]
	ldr	r1, [fp, #-20]
	add	r2, r1, r2
	ldrb	r2, [r2]	@ zero_extendqisi2
	add	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r1, [fp, #-28]
	ldr	r0, [fp, #-8]
	bl	__aeabi_idiv
	mov	r3, r0
	mov	r1, r3
	ldr	r3, [fp, #-12]
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	and	r2, r1, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	__aeabi_idivmod
	mov	r3, r1
	mov	r2, r3
	ldr	r3, [fp, #4]
	str	r2, [r3]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L14:
	ldr	r2, [fp, #-12]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	ble	.L15
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	mpsdv, .-mpsdv
	.align	2
	.global	mpneg
	.syntax unified
	.arm
	.fpu softvfp
	.type	mpneg, %function
mpneg:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #256
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-20]
	str	r3, [fp, #-8]
	b	.L17
.L18:
	ldrh	r3, [fp, #-10]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r3, r3, #255
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	ldr	r3, [fp, #-8]
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r3, #255
	strh	r3, [fp, #-10]	@ movhi
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrh	r2, [fp, #-10]	@ movhi
	and	r2, r2, #255
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	sub	r3, r3, #1
	str	r3, [fp, #-8]
.L17:
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bgt	.L18
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mpneg, .-mpneg
	.align	2
	.global	mpmov
	.syntax unified
	.arm
	.fpu softvfp
	.type	mpmov, %function
mpmov:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L20
.L21:
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L20:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	ble	.L21
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mpmov, .-mpmov
	.align	2
	.global	mplsh
	.syntax unified
	.arm
	.fpu softvfp
	.type	mplsh, %function
mplsh:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, #1
	str	r3, [fp, #-8]
	b	.L23
.L24:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	ldr	r2, [fp, #-16]
	add	r2, r2, r3
	ldr	r3, [fp, #-8]
	ldr	r1, [fp, #-16]
	add	r3, r1, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L23:
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	ble	.L24
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	mplsh, .-mplsh
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
