	.file	"625416.c"
	.intel_syntax noprefix
	.text
	.globl	string_literal
	.type	string_literal, @function
string_literal:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	edi, 0
	mov	eax, 0
	call	__builtin_arm_wsr@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	string_literal, .-string_literal
	.section	.rodata
.LC0:
	.string	"sysreg"
	.text
	.globl	wsr_1
	.type	wsr_1, @function
wsr_1:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__builtin_arm_wsr@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	wsr_1, .-wsr_1
	.globl	wsrp_1
	.type	wsrp_1, @function
wsrp_1:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__builtin_arm_wsrp@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	wsrp_1, .-wsrp_1
	.globl	wsr64_1
	.type	wsr64_1, @function
wsr64_1:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__builtin_arm_wsr64@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	wsr64_1, .-wsr64_1
	.globl	rsr_1
	.type	rsr_1, @function
rsr_1:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__builtin_arm_rsr@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	rsr_1, .-rsr_1
	.globl	rsrp_1
	.type	rsrp_1, @function
rsrp_1:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__builtin_arm_rsrp@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	rsrp_1, .-rsrp_1
	.globl	rsr64_1
	.type	rsr64_1, @function
rsr64_1:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	__builtin_arm_rsr64@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	rsr64_1, .-rsr64_1
	.section	.rodata
.LC1:
	.string	"0:1:2:3:4"
	.text
	.globl	wsr_2
	.type	wsr_2, @function
wsr_2:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__builtin_arm_wsr@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	wsr_2, .-wsr_2
	.globl	wsrp_2
	.type	wsrp_2, @function
wsrp_2:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__builtin_arm_wsrp@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	wsrp_2, .-wsrp_2
	.globl	wsr64_2
	.type	wsr64_2, @function
wsr64_2:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__builtin_arm_wsr64@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	wsr64_2, .-wsr64_2
	.section	.rodata
.LC2:
	.string	"0:1:15:15:4"
	.text
	.globl	rsr_2
	.type	rsr_2, @function
rsr_2:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__builtin_arm_rsr@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	rsr_2, .-rsr_2
	.globl	rsrp_2
	.type	rsrp_2, @function
rsrp_2:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	__builtin_arm_rsrp@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	rsrp_2, .-rsrp_2
	.globl	rsr64_2
	.type	rsr64_2, @function
rsr64_2:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	__builtin_arm_rsr64@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	rsr64_2, .-rsr64_2
	.section	.rodata
.LC3:
	.string	"0:1:2"
	.text
	.globl	wsr_3
	.type	wsr_3, @function
wsr_3:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	__builtin_arm_wsr@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	wsr_3, .-wsr_3
	.globl	wsrp_3
	.type	wsrp_3, @function
wsrp_3:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	__builtin_arm_wsrp@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	wsrp_3, .-wsrp_3
	.globl	wsr64_3
	.type	wsr64_3, @function
wsr64_3:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	__builtin_arm_wsr64@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	wsr64_3, .-wsr64_3
	.globl	rsr_3
	.type	rsr_3, @function
rsr_3:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	__builtin_arm_rsr@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	rsr_3, .-rsr_3
	.section	.rodata
.LC4:
	.string	"0:1:2:3:8"
	.text
	.globl	rsr_4
	.type	rsr_4, @function
rsr_4:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	__builtin_arm_rsr@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	rsr_4, .-rsr_4
	.section	.rodata
.LC5:
	.string	"0:8:1:2:3"
	.text
	.globl	rsr_5
	.type	rsr_5, @function
rsr_5:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC5[rip]
	mov	eax, 0
	call	__builtin_arm_rsr@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	rsr_5, .-rsr_5
	.section	.rodata
.LC6:
	.string	"0:1:16:16:2"
	.text
	.globl	rsr_6
	.type	rsr_6, @function
rsr_6:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	__builtin_arm_rsr@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	rsr_6, .-rsr_6
	.globl	rsrp_3
	.type	rsrp_3, @function
rsrp_3:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	__builtin_arm_rsrp@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	rsrp_3, .-rsrp_3
	.globl	rsr64_3
	.type	rsr64_3, @function
rsr64_3:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC3[rip]
	mov	eax, 0
	call	__builtin_arm_rsr64@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	rsr64_3, .-rsr64_3
	.globl	rsr64_4
	.type	rsr64_4, @function
rsr64_4:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	__builtin_arm_rsr64@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	rsr64_4, .-rsr64_4
	.section	.rodata
.LC7:
	.string	"0:8:2:3:4"
	.text
	.globl	rsr64_5
	.type	rsr64_5, @function
rsr64_5:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC7[rip]
	mov	eax, 0
	call	__builtin_arm_rsr64@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	rsr64_5, .-rsr64_5
	.globl	rsr64_6
	.type	rsr64_6, @function
rsr64_6:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	__builtin_arm_rsr64@PLT
	cdqe
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	rsr64_6, .-rsr64_6
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"625416.c"
	.text
	.align	2
	.global	string_literal
	.syntax unified
	.arm
	.fpu softvfp
	.type	string_literal, %function
string_literal:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	mov	r0, #0
	bl	__builtin_arm_wsr
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	string_literal, .-string_literal
	.section	.rodata
	.align	2
.LC0:
	.ascii	"sysreg\000"
	.text
	.align	2
	.global	wsr_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsr_1, %function
wsr_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L3
	bl	__builtin_arm_wsr
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L4:
	.align	2
.L3:
	.word	.LC0
	.size	wsr_1, .-wsr_1
	.align	2
	.global	wsrp_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsrp_1, %function
wsrp_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L6
	bl	__builtin_arm_wsrp
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L7:
	.align	2
.L6:
	.word	.LC0
	.size	wsrp_1, .-wsrp_1
	.align	2
	.global	wsr64_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsr64_1, %function
wsr64_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L9
	bl	__builtin_arm_wsr64
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L10:
	.align	2
.L9:
	.word	.LC0
	.size	wsr64_1, .-wsr64_1
	.align	2
	.global	rsr_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr_1, %function
rsr_1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L13
	bl	__builtin_arm_rsr
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L14:
	.align	2
.L13:
	.word	.LC0
	.size	rsr_1, .-rsr_1
	.align	2
	.global	rsrp_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsrp_1, %function
rsrp_1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L17
	bl	__builtin_arm_rsrp
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L18:
	.align	2
.L17:
	.word	.LC0
	.size	rsrp_1, .-rsrp_1
	.align	2
	.global	rsr64_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr64_1, %function
rsr64_1:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L21
	bl	__builtin_arm_rsr64
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L22:
	.align	2
.L21:
	.word	.LC0
	.size	rsr64_1, .-rsr64_1
	.section	.rodata
	.align	2
.LC1:
	.ascii	"0:1:2:3:4\000"
	.text
	.align	2
	.global	wsr_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsr_2, %function
wsr_2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L24
	bl	__builtin_arm_wsr
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L25:
	.align	2
.L24:
	.word	.LC1
	.size	wsr_2, .-wsr_2
	.align	2
	.global	wsrp_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsrp_2, %function
wsrp_2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L27
	bl	__builtin_arm_wsrp
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L28:
	.align	2
.L27:
	.word	.LC1
	.size	wsrp_2, .-wsrp_2
	.align	2
	.global	wsr64_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsr64_2, %function
wsr64_2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L30
	bl	__builtin_arm_wsr64
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L31:
	.align	2
.L30:
	.word	.LC1
	.size	wsr64_2, .-wsr64_2
	.section	.rodata
	.align	2
.LC2:
	.ascii	"0:1:15:15:4\000"
	.text
	.align	2
	.global	rsr_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr_2, %function
rsr_2:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L34
	bl	__builtin_arm_rsr
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L35:
	.align	2
.L34:
	.word	.LC2
	.size	rsr_2, .-rsr_2
	.align	2
	.global	rsrp_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsrp_2, %function
rsrp_2:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L38
	bl	__builtin_arm_rsrp
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L39:
	.align	2
.L38:
	.word	.LC1
	.size	rsrp_2, .-rsrp_2
	.align	2
	.global	rsr64_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr64_2, %function
rsr64_2:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L42
	bl	__builtin_arm_rsr64
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L43:
	.align	2
.L42:
	.word	.LC2
	.size	rsr64_2, .-rsr64_2
	.section	.rodata
	.align	2
.LC3:
	.ascii	"0:1:2\000"
	.text
	.align	2
	.global	wsr_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsr_3, %function
wsr_3:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L45
	bl	__builtin_arm_wsr
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L46:
	.align	2
.L45:
	.word	.LC3
	.size	wsr_3, .-wsr_3
	.align	2
	.global	wsrp_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsrp_3, %function
wsrp_3:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L48
	bl	__builtin_arm_wsrp
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L49:
	.align	2
.L48:
	.word	.LC3
	.size	wsrp_3, .-wsrp_3
	.align	2
	.global	wsr64_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	wsr64_3, %function
wsr64_3:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L51
	bl	__builtin_arm_wsr64
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L52:
	.align	2
.L51:
	.word	.LC3
	.size	wsr64_3, .-wsr64_3
	.align	2
	.global	rsr_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr_3, %function
rsr_3:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L55
	bl	__builtin_arm_rsr
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L56:
	.align	2
.L55:
	.word	.LC3
	.size	rsr_3, .-rsr_3
	.section	.rodata
	.align	2
.LC4:
	.ascii	"0:1:2:3:8\000"
	.text
	.align	2
	.global	rsr_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr_4, %function
rsr_4:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L59
	bl	__builtin_arm_rsr
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L60:
	.align	2
.L59:
	.word	.LC4
	.size	rsr_4, .-rsr_4
	.section	.rodata
	.align	2
.LC5:
	.ascii	"0:8:1:2:3\000"
	.text
	.align	2
	.global	rsr_5
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr_5, %function
rsr_5:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L63
	bl	__builtin_arm_rsr
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L64:
	.align	2
.L63:
	.word	.LC5
	.size	rsr_5, .-rsr_5
	.section	.rodata
	.align	2
.LC6:
	.ascii	"0:1:16:16:2\000"
	.text
	.align	2
	.global	rsr_6
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr_6, %function
rsr_6:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L67
	bl	__builtin_arm_rsr
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L68:
	.align	2
.L67:
	.word	.LC6
	.size	rsr_6, .-rsr_6
	.align	2
	.global	rsrp_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsrp_3, %function
rsrp_3:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L71
	bl	__builtin_arm_rsrp
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L72:
	.align	2
.L71:
	.word	.LC3
	.size	rsrp_3, .-rsrp_3
	.align	2
	.global	rsr64_3
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr64_3, %function
rsr64_3:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L75
	bl	__builtin_arm_rsr64
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L76:
	.align	2
.L75:
	.word	.LC3
	.size	rsr64_3, .-rsr64_3
	.align	2
	.global	rsr64_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr64_4, %function
rsr64_4:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L79
	bl	__builtin_arm_rsr64
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L80:
	.align	2
.L79:
	.word	.LC4
	.size	rsr64_4, .-rsr64_4
	.section	.rodata
	.align	2
.LC7:
	.ascii	"0:8:2:3:4\000"
	.text
	.align	2
	.global	rsr64_5
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr64_5, %function
rsr64_5:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L83
	bl	__builtin_arm_rsr64
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L84:
	.align	2
.L83:
	.word	.LC7
	.size	rsr64_5, .-rsr64_5
	.align	2
	.global	rsr64_6
	.syntax unified
	.arm
	.fpu softvfp
	.type	rsr64_6, %function
rsr64_6:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L87
	bl	__builtin_arm_rsr64
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L88:
	.align	2
.L87:
	.word	.LC6
	.size	rsr64_6, .-rsr64_6
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
