	.file	"350611.c"
	.intel_syntax noprefix
	.text
	.globl	width
	.bss
	.align 4
	.type	width, @object
	.size	width, 4
width:
	.zero	4
	.globl	length
	.align 4
	.type	length, @object
	.size	length, 4
length:
	.zero	4
	.globl	vdest
	.align 4
	.type	vdest, @object
	.size	vdest, 4
vdest:
	.zero	4
	.globl	hdest
	.align 4
	.type	hdest, @object
	.size	hdest, 4
hdest:
	.zero	4
	.globl	code
	.align 4
	.type	code, @object
	.size	code, 4
code:
	.zero	4
	.globl	refv
	.align 4
	.type	refv, @object
	.size	refv, 4
refv:
	.zero	4
	.globl	refh
	.align 4
	.type	refh, @object
	.size	refh, 4
refh:
	.zero	4
	.globl	spot
	.align 4
	.type	spot, @object
	.size	spot, 4
spot:
	.zero	4
	.globl	start
	.align 4
	.type	start, @object
	.size	start, 4
start:
	.zero	4
	.globl	Bduring
	.align 4
	.type	Bduring, @object
	.size	Bduring, 4
Bduring:
	.zero	4
	.globl	Wduring
	.align 4
	.type	Wduring, @object
	.size	Wduring, 4
Wduring:
	.zero	4
	.globl	notfirsttime
	.align 4
	.type	notfirsttime, @object
	.size	notfirsttime, 4
notfirsttime:
	.zero	4
	.globl	build
	.align 4
	.type	build, @object
	.size	build, 4
build:
	.zero	4
	.globl	refvdest
	.align 4
	.type	refvdest, @object
	.size	refvdest, 4
refvdest:
	.zero	4
	.globl	refhdest
	.align 4
	.type	refhdest, @object
	.size	refhdest, 4
refhdest:
	.zero	4
	.globl	destwidth
	.align 4
	.type	destwidth, @object
	.size	destwidth, 4
destwidth:
	.zero	4
	.globl	scale
	.data
	.align 4
	.type	scale, @object
	.size	scale, 4
scale:
	.long	50
	.globl	hscale
	.bss
	.align 4
	.type	hscale, @object
	.size	hscale, 4
hscale:
	.zero	4
	.globl	filep
	.align 8
	.type	filep, @object
	.size	filep, 8
filep:
	.zero	8
	.globl	ibuff
	.align 32
	.type	ibuff, @object
	.size	ibuff, 90000
ibuff:
	.zero	90000
	.globl	ebuff
	.align 32
	.type	ebuff, @object
	.size	ebuff, 300
ebuff:
	.zero	300
	.globl	lastline
	.align 32
	.type	lastline, @object
	.size	lastline, 300
lastline:
	.zero	300
	.globl	Black
	.align 32
	.type	Black, @object
	.size	Black, 600
Black:
	.zero	600
	.globl	WtoB
	.align 32
	.type	WtoB, @object
	.size	WtoB, 600
WtoB:
	.zero	600
	.globl	BtoW
	.align 32
	.type	BtoW, @object
	.size	BtoW, 600
BtoW:
	.zero	600
	.globl	White
	.align 32
	.type	White, @object
	.size	White, 600
White:
	.zero	600
	.section	.rodata
.LC0:
	.string	"%s, unknown option flag"
.LC1:
	.string	"r"
.LC2:
	.string	"can't open file \"%s\""
.LC3:
	.string	"fontheader\n"
.LC4:
	.string	"not a character font file"
.LC5:
	.string	"fontheader"
.LC6:
	.string	"input line too long"
.LC7:
	.string	"%s %f"
.LC8:
	.string	"mag"
.LC11:
	.string	"mag %d\n"
.LC12:
	.string	"linesp"
.LC14:
	.string	"linesp %.2f\n"
.LC15:
	.string	"wordsp"
.LC16:
	.string	"wordsp %.2f\n"
.LC17:
	.string	"%s"
.LC18:
	.string	":%d, width = %f"
.LC19:
	.string	"bad glyph header, %s"
.LC20:
	.string	":%d, width = %.2f\n"
.LC21:
	.string	"unexpected end of input"
	.align 8
.LC22:
	.string	"glyph %d - two reference points"
	.align 8
.LC23:
	.string	"illegal character '%c' in map."
.LC24:
	.string	"No position point in glyph %d"
	.text
	.globl	main
	.type	main, @function
main:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	sub	rsp, 40
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	DWORD PTR -52[rbp], edi
	mov	QWORD PTR -64[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -40[rbp], rax
	xor	eax, eax
	jmp	.L2
.L6:
	mov	rax, QWORD PTR -64[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	cmp	eax, 115
	jne	.L3
	mov	rax, QWORD PTR -64[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	add	rax, 2
	mov	rdi, rax
	mov	eax, 0
	call	atoi@PLT
	mov	DWORD PTR scale[rip], eax
	jmp	.L4
.L3:
	mov	rax, QWORD PTR -64[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	mov	rsi, rax
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	error
.L4:
	sub	DWORD PTR -52[rbp], 1
	add	QWORD PTR -64[rbp], 8
.L2:
	cmp	DWORD PTR -52[rbp], 1
	jle	.L5
	mov	rax, QWORD PTR -64[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	movzx	eax, BYTE PTR [rax]
	cmp	al, 45
	je	.L6
.L5:
	cmp	DWORD PTR -52[rbp], 2
	jne	.L7
	mov	rax, QWORD PTR -64[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	lea	rsi, .LC1[rip]
	mov	rdi, rax
	call	fopen@PLT
	mov	QWORD PTR filep[rip], rax
	mov	rax, QWORD PTR filep[rip]
	test	rax, rax
	jne	.L8
	mov	rax, QWORD PTR -64[rbp]
	add	rax, 8
	mov	rax, QWORD PTR [rax]
	mov	rsi, rax
	lea	rdi, .LC2[rip]
	mov	eax, 0
	call	error
	jmp	.L8
.L7:
	mov	rax, QWORD PTR stdin[rip]
	mov	QWORD PTR filep[rip], rax
.L8:
	mov	eax, DWORD PTR scale[rip]
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR hscale[rip], eax
	mov	rax, QWORD PTR filep[rip]
	mov	rdx, rax
	mov	esi, 300
	lea	rdi, ibuff[rip]
	call	fgets@PLT
	lea	rsi, .LC3[rip]
	lea	rdi, ibuff[rip]
	call	strcmp@PLT
	test	eax, eax
	je	.L9
	lea	rdi, .LC4[rip]
	mov	eax, 0
	call	error
.L9:
	lea	rdi, .LC5[rip]
	call	puts@PLT
	jmp	.L10
.L62:
	mov	esi, 10
	lea	rdi, ibuff[rip]
	call	index@PLT
	test	rax, rax
	jne	.L11
	lea	rdi, .LC6[rip]
	mov	eax, 0
	call	error
.L11:
	movzx	eax, BYTE PTR ibuff[rip]
	cmp	al, 58
	je	.L12
	lea	rax, -44[rbp]
	mov	rcx, rax
	lea	rdx, ebuff[rip]
	lea	rsi, .LC7[rip]
	lea	rdi, ibuff[rip]
	mov	eax, 0
	call	__isoc99_sscanf@PLT
	lea	rsi, .LC8[rip]
	lea	rdi, ebuff[rip]
	call	strcmp@PLT
	test	eax, eax
	jne	.L13
	mov	eax, DWORD PTR scale[rip]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	movss	xmm0, DWORD PTR -44[rbp]
	mulss	xmm0, xmm1
	cvtss2sd	xmm0, xmm0
	movsd	xmm2, QWORD PTR .LC9[rip]
	movapd	xmm1, xmm0
	divsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC10[rip]
	addsd	xmm0, xmm1
	cvttsd2si	eax, xmm0
	mov	esi, eax
	lea	rdi, .LC11[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L10
.L13:
	lea	rsi, .LC12[rip]
	lea	rdi, ebuff[rip]
	call	strcmp@PLT
	test	eax, eax
	jne	.L14
	mov	eax, DWORD PTR scale[rip]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	movss	xmm0, DWORD PTR -44[rbp]
	mulss	xmm0, xmm1
	cvtss2sd	xmm0, xmm0
	movsd	xmm2, QWORD PTR .LC9[rip]
	movapd	xmm1, xmm0
	divsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	addsd	xmm1, xmm0
	movq	rax, xmm1
	movq	xmm0, rax
	lea	rdi, .LC14[rip]
	mov	eax, 1
	call	printf@PLT
	jmp	.L10
.L14:
	lea	rsi, .LC15[rip]
	lea	rdi, ebuff[rip]
	call	strcmp@PLT
	test	eax, eax
	jne	.L15
	mov	eax, DWORD PTR scale[rip]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	movss	xmm0, DWORD PTR -44[rbp]
	mulss	xmm0, xmm1
	cvtss2sd	xmm0, xmm0
	movsd	xmm2, QWORD PTR .LC9[rip]
	movapd	xmm1, xmm0
	divsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	addsd	xmm1, xmm0
	movq	rax, xmm1
	movq	xmm0, rax
	lea	rdi, .LC16[rip]
	mov	eax, 1
	call	printf@PLT
	jmp	.L10
.L15:
	lea	rsi, ibuff[rip]
	lea	rdi, .LC17[rip]
	mov	eax, 0
	call	printf@PLT
	jmp	.L10
.L12:
	lea	rax, -44[rbp]
	mov	rcx, rax
	lea	rdx, code[rip]
	lea	rsi, .LC18[rip]
	lea	rdi, ibuff[rip]
	mov	eax, 0
	call	__isoc99_sscanf@PLT
	cmp	eax, 2
	je	.L16
	lea	rsi, ibuff[rip]
	lea	rdi, .LC19[rip]
	mov	eax, 0
	call	error
.L16:
	mov	eax, DWORD PTR scale[rip]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	movss	xmm0, DWORD PTR -44[rbp]
	mulss	xmm0, xmm1
	cvtss2sd	xmm0, xmm0
	movsd	xmm2, QWORD PTR .LC9[rip]
	movapd	xmm1, xmm0
	divsd	xmm1, xmm2
	movsd	xmm0, QWORD PTR .LC13[rip]
	addsd	xmm1, xmm0
	movq	rdx, xmm1
	mov	eax, DWORD PTR code[rip]
	movq	xmm0, rdx
	mov	esi, eax
	lea	rdi, .LC20[rip]
	mov	eax, 1
	call	printf@PLT
	mov	rax, QWORD PTR filep[rip]
	mov	rdx, rax
	mov	esi, 300
	lea	rdi, ibuff[rip]
	call	fgets@PLT
	test	rax, rax
	jne	.L17
	lea	rdi, .LC21[rip]
	mov	eax, 0
	call	error
.L17:
	lea	rdi, ibuff[rip]
	call	strlen@PLT
	sub	eax, 1
	mov	DWORD PTR width[rip], eax
	mov	DWORD PTR refh[rip], -1
	mov	DWORD PTR length[rip], 0
	jmp	.L18
.L30:
	mov	ebx, 0
	jmp	.L19
.L28:
	movzx	eax, BYTE PTR [r12]
	movsx	eax, al
	cmp	eax, 120
	je	.L20
	cmp	eax, 120
	jg	.L21
	cmp	eax, 88
	je	.L22
	cmp	eax, 88
	jg	.L21
	cmp	eax, 64
	je	.L23
	cmp	eax, 64
	jg	.L21
	cmp	eax, 46
	je	.L24
	cmp	eax, 46
	jg	.L21
	cmp	eax, 42
	je	.L23
	cmp	eax, 42
	jg	.L21
	cmp	eax, 10
	je	.L24
	cmp	eax, 13
	je	.L24
	jmp	.L21
.L23:
	mov	BYTE PTR [r12], 1
	jmp	.L25
.L24:
	mov	BYTE PTR [r12], 0
	jmp	.L25
.L20:
	mov	BYTE PTR [r12], 0
	jmp	.L26
.L22:
	mov	BYTE PTR [r12], 1
.L26:
	mov	eax, DWORD PTR refh[rip]
	test	eax, eax
	js	.L27
	mov	eax, DWORD PTR code[rip]
	mov	esi, eax
	lea	rdi, .LC22[rip]
	mov	eax, 0
	call	error
.L27:
	mov	DWORD PTR refh[rip], ebx
	mov	eax, DWORD PTR length[rip]
	mov	DWORD PTR refv[rip], eax
	jmp	.L25
.L21:
	movzx	eax, BYTE PTR [r12]
	movsx	eax, al
	mov	esi, eax
	lea	rdi, .LC23[rip]
	mov	eax, 0
	call	error
.L25:
	add	ebx, 1
	add	r12, 1
.L19:
	mov	eax, DWORD PTR width[rip]
	cmp	ebx, eax
	jle	.L28
	mov	rax, QWORD PTR filep[rip]
	mov	edx, DWORD PTR length[rip]
	add	edx, 1
	movsx	rdx, edx
	imul	rdx, rdx, 300
	lea	rcx, ibuff[rip]
	add	rcx, rdx
	mov	rdx, rax
	mov	esi, 300
	mov	rdi, rcx
	call	fgets@PLT
	test	rax, rax
	jne	.L29
	lea	rdi, .LC21[rip]
	mov	eax, 0
	call	error
.L29:
	mov	eax, DWORD PTR length[rip]
	add	eax, 1
	mov	DWORD PTR length[rip], eax
.L18:
	mov	eax, DWORD PTR length[rip]
	cdqe
	imul	rax, rax, 300
	lea	rdx, ibuff[rip]
	lea	r12, [rax+rdx]
	movzx	eax, BYTE PTR [r12]
	cmp	al, 10
	jne	.L30
	mov	eax, DWORD PTR refh[rip]
	test	eax, eax
	jns	.L31
	mov	eax, DWORD PTR code[rip]
	mov	esi, eax
	lea	rdi, .LC24[rip]
	mov	eax, 0
	call	error
.L31:
	mov	edx, DWORD PTR refv[rip]
	mov	eax, DWORD PTR scale[rip]
	imul	edx, eax
	mov	eax, DWORD PTR hscale[rip]
	add	eax, edx
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR refvdest[rip], eax
	mov	edx, DWORD PTR refh[rip]
	mov	eax, DWORD PTR scale[rip]
	imul	eax, edx
	mov	edx, DWORD PTR hscale[rip]
	sub	eax, edx
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	sar	eax, 31
	sub	edx, eax
	mov	eax, DWORD PTR refh[rip]
	test	eax, eax
	je	.L32
	mov	eax, 2
	jmp	.L33
.L32:
	mov	eax, 1
.L33:
	add	eax, edx
	mov	DWORD PTR refhdest[rip], eax
	mov	eax, DWORD PTR width[rip]
	mov	ecx, DWORD PTR refh[rip]
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR scale[rip]
	imul	eax, edx
	mov	edx, DWORD PTR hscale[rip]
	sub	eax, edx
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	sar	eax, 31
	sub	edx, eax
	mov	eax, DWORD PTR refhdest[rip]
	add	eax, edx
	mov	DWORD PTR destwidth[rip], eax
	mov	DWORD PTR vdest[rip], 0
	mov	DWORD PTR notfirsttime[rip], 0
	mov	DWORD PTR build[rip], 0
	mov	ebx, 0
	jmp	.L34
.L35:
	movsx	rax, ebx
	lea	rdx, lastline[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR build[rip]
	movsx	rdx, ebx
	lea	rcx, lastline[rip]
	movzx	edx, BYTE PTR [rdx+rcx]
	movsx	rsi, ebx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, White[rip]
	add	rcx, rsi
	mov	BYTE PTR [rcx], dl
	mov	edx, DWORD PTR build[rip]
	movsx	rcx, ebx
	cdqe
	imul	rax, rax, 300
	add	rcx, rax
	lea	rax, White[rip]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, ebx
	movsx	rcx, edx
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, WtoB[rip]
	add	rcx, rsi
	mov	BYTE PTR [rcx], al
	mov	eax, DWORD PTR build[rip]
	movsx	rcx, ebx
	movsx	rdx, edx
	imul	rdx, rdx, 300
	add	rcx, rdx
	lea	rdx, WtoB[rip]
	add	rdx, rcx
	movzx	edx, BYTE PTR [rdx]
	movsx	rsi, ebx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, BtoW[rip]
	add	rcx, rsi
	mov	BYTE PTR [rcx], dl
	mov	edx, DWORD PTR build[rip]
	movsx	rcx, ebx
	cdqe
	imul	rax, rax, 300
	add	rcx, rax
	lea	rax, BtoW[rip]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movsx	rcx, ebx
	movsx	rdx, edx
	imul	rdx, rdx, 300
	add	rcx, rdx
	lea	rdx, Black[rip]
	add	rdx, rcx
	mov	BYTE PTR [rdx], al
	add	ebx, 1
.L34:
	mov	eax, DWORD PTR width[rip]
	cmp	ebx, eax
	jle	.L35
	mov	r13d, 0
	jmp	.L36
.L59:
	movsx	rax, r13d
	imul	rax, rax, 300
	lea	rdx, ibuff[rip]
	lea	r12, [rax+rdx]
	mov	DWORD PTR hdest[rip], 1
	mov	DWORD PTR start[rip], 0
	mov	DWORD PTR Bduring[rip], 0
	mov	DWORD PTR Wduring[rip], 0
	mov	eax, DWORD PTR build[rip]
	movsx	rdx, eax
	imul	rdx, rdx, 300
	lea	rcx, White[rip]
	movzx	edx, BYTE PTR [rdx+rcx]
	lea	ecx, 1[rdx]
	cdqe
	imul	rax, rax, 300
	lea	rdx, White[rip]
	mov	BYTE PTR [rax+rdx], cl
	mov	ebx, 0
	jmp	.L37
.L47:
	mov	eax, DWORD PTR refh[rip]
	mov	edx, ebx
	sub	edx, eax
	mov	eax, DWORD PTR scale[rip]
	imul	edx, eax
	mov	eax, DWORD PTR hscale[rip]
	add	eax, edx
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	sar	eax, 31
	sub	edx, eax
	mov	eax, DWORD PTR refhdest[rip]
	add	edx, eax
	mov	eax, DWORD PTR refh[rip]
	cmp	ebx, eax
	setl	al
	movzx	ecx, al
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR code[rip], eax
	mov	edx, DWORD PTR hdest[rip]
	mov	eax, DWORD PTR code[rip]
	cmp	edx, eax
	je	.L38
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	je	.L39
	mov	eax, DWORD PTR Wduring[rip]
	test	eax, eax
	je	.L40
.L39:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	jne	.L41
	mov	eax, DWORD PTR Bduring[rip]
	test	eax, eax
	je	.L41
	mov	eax, DWORD PTR spot[rip]
	test	eax, eax
	jne	.L41
.L40:
	mov	eax, DWORD PTR build[rip]
	mov	edx, DWORD PTR hdest[rip]
	movsx	rsi, edx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, Black[rip]
	add	rcx, rsi
	movzx	ecx, BYTE PTR [rcx]
	add	ecx, 1
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, Black[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
.L41:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	je	.L42
	mov	eax, DWORD PTR spot[rip]
	test	eax, eax
	jne	.L42
	mov	eax, DWORD PTR build[rip]
	mov	edx, DWORD PTR hdest[rip]
	movsx	rsi, edx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, BtoW[rip]
	add	rcx, rsi
	movzx	ecx, BYTE PTR [rcx]
	add	ecx, 1
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, BtoW[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
.L42:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	jne	.L43
	mov	eax, DWORD PTR spot[rip]
	test	eax, eax
	je	.L43
	mov	eax, DWORD PTR build[rip]
	mov	edx, DWORD PTR hdest[rip]
	movsx	rsi, edx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, WtoB[rip]
	add	rcx, rsi
	movzx	ecx, BYTE PTR [rcx]
	add	ecx, 1
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, WtoB[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
.L43:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	jne	.L44
	mov	eax, DWORD PTR Bduring[rip]
	test	eax, eax
	je	.L45
.L44:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	je	.L46
	mov	eax, DWORD PTR Wduring[rip]
	test	eax, eax
	je	.L46
	mov	eax, DWORD PTR spot[rip]
	test	eax, eax
	je	.L46
.L45:
	mov	eax, DWORD PTR build[rip]
	mov	edx, DWORD PTR hdest[rip]
	movsx	rsi, edx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, White[rip]
	add	rcx, rsi
	movzx	ecx, BYTE PTR [rcx]
	add	ecx, 1
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, White[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
.L46:
	mov	eax, DWORD PTR code[rip]
	mov	DWORD PTR hdest[rip], eax
	mov	eax, DWORD PTR spot[rip]
	mov	DWORD PTR start[rip], eax
	mov	DWORD PTR Bduring[rip], 0
	mov	DWORD PTR Wduring[rip], 0
.L38:
	movzx	eax, BYTE PTR [r12]
	movsx	eax, al
	mov	DWORD PTR spot[rip], eax
	mov	edx, DWORD PTR Bduring[rip]
	mov	eax, DWORD PTR spot[rip]
	or	eax, edx
	mov	DWORD PTR Bduring[rip], eax
	mov	eax, DWORD PTR spot[rip]
	test	eax, eax
	sete	al
	movzx	edx, al
	mov	eax, DWORD PTR Wduring[rip]
	or	eax, edx
	mov	DWORD PTR Wduring[rip], eax
	add	ebx, 1
	add	r12, 1
.L37:
	mov	eax, DWORD PTR width[rip]
	cmp	ebx, eax
	jle	.L47
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	je	.L48
	mov	eax, DWORD PTR Wduring[rip]
	test	eax, eax
	je	.L49
.L48:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	jne	.L50
	mov	eax, DWORD PTR Bduring[rip]
	test	eax, eax
	je	.L50
.L49:
	mov	eax, DWORD PTR build[rip]
	mov	edx, DWORD PTR hdest[rip]
	movsx	rsi, edx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, Black[rip]
	add	rcx, rsi
	movzx	ecx, BYTE PTR [rcx]
	add	ecx, 1
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, Black[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
.L50:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	je	.L51
	mov	eax, DWORD PTR build[rip]
	mov	edx, DWORD PTR hdest[rip]
	movsx	rsi, edx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, BtoW[rip]
	add	rcx, rsi
	movzx	ecx, BYTE PTR [rcx]
	add	ecx, 1
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, BtoW[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
.L51:
	mov	eax, DWORD PTR start[rip]
	test	eax, eax
	jne	.L52
	mov	eax, DWORD PTR Bduring[rip]
	test	eax, eax
	jne	.L52
	mov	eax, DWORD PTR build[rip]
	mov	edx, DWORD PTR hdest[rip]
	movsx	rsi, edx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, White[rip]
	add	rcx, rsi
	movzx	ecx, BYTE PTR [rcx]
	add	ecx, 1
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, White[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
.L52:
	mov	eax, DWORD PTR refv[rip]
	cmp	r13d, eax
	setge	al
	movzx	edx, al
	mov	eax, DWORD PTR refvdest[rip]
	lea	esi, [rdx+rax]
	mov	eax, DWORD PTR refv[rip]
	lea	ecx, 1[r13]
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR scale[rip]
	imul	edx, eax
	mov	eax, DWORD PTR hscale[rip]
	add	eax, edx
	movsx	rdx, eax
	imul	rdx, rdx, 1374389535
	shr	rdx, 32
	sar	edx, 5
	sar	eax, 31
	sub	eax, edx
	add	eax, esi
	mov	DWORD PTR code[rip], eax
	mov	edx, DWORD PTR code[rip]
	mov	eax, DWORD PTR vdest[rip]
	cmp	edx, eax
	jne	.L53
	mov	eax, DWORD PTR length[rip]
	sub	eax, 1
	cmp	r13d, eax
	jne	.L54
.L53:
	mov	eax, DWORD PTR notfirsttime[rip]
	test	eax, eax
	je	.L55
	mov	eax, DWORD PTR refvdest[rip]
	lea	edx, 1[rax]
	mov	eax, DWORD PTR vdest[rip]
	cmp	edx, eax
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	outline
	jmp	.L56
.L55:
	mov	DWORD PTR notfirsttime[rip], 1
.L56:
	mov	eax, DWORD PTR code[rip]
	mov	DWORD PTR vdest[rip], eax
	mov	eax, DWORD PTR build[rip]
	test	eax, eax
	sete	al
	movzx	eax, al
	mov	DWORD PTR build[rip], eax
	mov	ebx, 0
	jmp	.L57
.L58:
	mov	eax, DWORD PTR build[rip]
	movsx	rcx, ebx
	movsx	rdx, eax
	imul	rdx, rdx, 300
	add	rcx, rdx
	lea	rdx, White[rip]
	add	rdx, rcx
	mov	BYTE PTR [rdx], 0
	mov	edx, DWORD PTR build[rip]
	movsx	rcx, ebx
	cdqe
	imul	rax, rax, 300
	add	rcx, rax
	lea	rax, White[rip]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movsx	rsi, ebx
	movsx	rcx, edx
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, WtoB[rip]
	add	rcx, rsi
	mov	BYTE PTR [rcx], al
	mov	eax, DWORD PTR build[rip]
	movsx	rcx, ebx
	movsx	rdx, edx
	imul	rdx, rdx, 300
	add	rcx, rdx
	lea	rdx, WtoB[rip]
	add	rdx, rcx
	movzx	edx, BYTE PTR [rdx]
	movsx	rsi, ebx
	movsx	rcx, eax
	imul	rcx, rcx, 300
	add	rsi, rcx
	lea	rcx, BtoW[rip]
	add	rcx, rsi
	mov	BYTE PTR [rcx], dl
	mov	edx, DWORD PTR build[rip]
	movsx	rcx, ebx
	cdqe
	imul	rax, rax, 300
	add	rcx, rax
	lea	rax, BtoW[rip]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	movsx	rcx, ebx
	movsx	rdx, edx
	imul	rdx, rdx, 300
	add	rcx, rdx
	lea	rdx, Black[rip]
	add	rdx, rcx
	mov	BYTE PTR [rdx], al
	add	ebx, 1
.L57:
	mov	eax, DWORD PTR width[rip]
	cmp	ebx, eax
	jle	.L58
.L54:
	add	r13d, 1
.L36:
	mov	eax, DWORD PTR length[rip]
	cmp	r13d, eax
	jl	.L59
	mov	ebx, 0
	jmp	.L60
.L61:
	mov	eax, DWORD PTR build[rip]
	movsx	rdx, ebx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, White[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], 1
	add	ebx, 1
.L60:
	mov	eax, DWORD PTR width[rip]
	cmp	ebx, eax
	jle	.L61
	mov	eax, DWORD PTR length[rip]
	lea	edx, -1[rax]
	mov	eax, DWORD PTR refv[rip]
	cmp	edx, eax
	sete	al
	movzx	eax, al
	mov	edi, eax
	mov	eax, 0
	call	outline
	mov	edi, 10
	call	putchar@PLT
.L10:
	mov	rax, QWORD PTR filep[rip]
	mov	rdx, rax
	mov	esi, 300
	lea	rdi, ibuff[rip]
	call	fgets@PLT
	test	rax, rax
	jne	.L62
	mov	edi, 0
	call	exit@PLT
	.cfi_endproc
.LFE0:
	.size	main, .-main
	.globl	outline
	.type	outline, @function
outline:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 32
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	mov	DWORD PTR -52[rbp], edi
	mov	eax, DWORD PTR build[rip]
	test	eax, eax
	sete	al
	movzx	r13d, al
	mov	r14d, 0
	mov	ebx, 1
	jmp	.L65
.L111:
	lea	eax, 1[rbx]
	movsx	rdx, eax
	movsx	rax, r13d
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, Black[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L66
	lea	eax, 1[rbx]
	movsx	rdx, eax
	movsx	rax, r13d
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, WtoB[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	je	.L67
.L66:
	mov	eax, 1
	jmp	.L68
.L67:
	mov	eax, 0
.L68:
	mov	DWORD PTR -48[rbp], eax
	mov	eax, DWORD PTR build[rip]
	lea	edx, -1[rbx]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, Black[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L69
	mov	eax, DWORD PTR build[rip]
	lea	edx, -1[rbx]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, WtoB[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	je	.L70
.L69:
	mov	eax, 1
	jmp	.L71
.L70:
	mov	eax, 0
.L71:
	mov	DWORD PTR -44[rbp], eax
	mov	eax, DWORD PTR build[rip]
	movsx	rdx, ebx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, Black[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L72
	mov	eax, DWORD PTR build[rip]
	movsx	rdx, ebx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, WtoB[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	je	.L73
.L72:
	mov	eax, 1
	jmp	.L74
.L73:
	mov	eax, 0
.L74:
	mov	DWORD PTR -40[rbp], eax
	mov	eax, DWORD PTR build[rip]
	lea	edx, 1[rbx]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, Black[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L75
	mov	eax, DWORD PTR build[rip]
	lea	edx, 1[rbx]
	movsx	rdx, edx
	cdqe
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, WtoB[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	je	.L76
.L75:
	mov	eax, 1
	jmp	.L77
.L76:
	mov	eax, 0
.L77:
	mov	DWORD PTR -36[rbp], eax
	movsx	rdx, ebx
	movsx	rax, r13d
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, BtoW[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L78
	mov	ecx, 8
	jmp	.L79
.L78:
	mov	ecx, 0
.L79:
	movsx	rdx, ebx
	movsx	rax, r13d
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, WtoB[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L80
	mov	eax, 4
	jmp	.L81
.L80:
	mov	eax, 0
.L81:
	or	ecx, eax
	movsx	rdx, ebx
	movsx	rax, r13d
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, White[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	jne	.L82
	mov	eax, 2
	jmp	.L83
.L82:
	mov	eax, 0
.L83:
	or	ecx, eax
	movsx	rdx, ebx
	movsx	rax, r13d
	imul	rax, rax, 300
	add	rdx, rax
	lea	rax, Black[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	sete	al
	movzx	eax, al
	or	ecx, eax
	mov	r12d, ecx
	cmp	r12d, 15
	ja	.L84
	mov	eax, r12d
	lea	rdx, 0[0+rax*4]
	lea	rax, .L86[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L86[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L86:
	.long	.L85-.L86
	.long	.L88-.L86
	.long	.L87-.L86
	.long	.L85-.L86
	.long	.L89-.L86
	.long	.L88-.L86
	.long	.L91-.L86
	.long	.L88-.L86
	.long	.L89-.L86
	.long	.L90-.L86
	.long	.L87-.L86
	.long	.L87-.L86
	.long	.L89-.L86
	.long	.L88-.L86
	.long	.L87-.L86
	.long	.L85-.L86
	.text
.L87:
	mov	r12d, 1
	jmp	.L84
.L88:
	mov	r12d, 0
	jmp	.L84
.L89:
	cmp	DWORD PTR -40[rbp], 0
	je	.L92
	movsx	rax, ebx
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	sete	al
	movzx	r12d, al
	jmp	.L84
.L92:
	mov	r12d, 1
	jmp	.L84
.L91:
	cmp	DWORD PTR -48[rbp], 0
	je	.L94
	lea	eax, 1[rbx]
	cdqe
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L94
	cmp	DWORD PTR -36[rbp], 0
	je	.L94
	cmp	DWORD PTR -40[rbp], 0
	jne	.L95
	movsx	rax, ebx
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L94
.L95:
	mov	r12d, 0
	jmp	.L84
.L94:
	mov	r12d, 1
	jmp	.L84
.L90:
	movsx	rax, ebx
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L97
	lea	eax, 1[rbx]
	cdqe
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L98
.L97:
	cmp	DWORD PTR -40[rbp], 0
	je	.L99
	cmp	DWORD PTR -36[rbp], 0
	jne	.L98
.L99:
	test	r14d, r14d
	jne	.L98
	cmp	DWORD PTR -48[rbp], 0
	je	.L100
.L98:
	mov	r12d, 1
	jmp	.L84
.L100:
	mov	r12d, 0
	jmp	.L84
.L85:
	movsx	rax, ebx
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	edx, al
	mov	eax, DWORD PTR -40[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -48[rbp]
	add	eax, edx
	lea	ecx, [r14+rax]
	lea	eax, 1[rbx]
	cdqe
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	lea	edx, [rcx+rax]
	mov	eax, DWORD PTR -44[rbp]
	lea	ecx, [rdx+rax]
	lea	eax, -1[rbx]
	cdqe
	lea	rdx, lastline[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	lea	edx, [rcx+rax]
	mov	eax, DWORD PTR -36[rbp]
	add	eax, edx
	cmp	eax, 4
	jle	.L102
	mov	r12d, 0
	jmp	.L112
.L102:
	mov	r12d, 1
.L112:
	nop
.L84:
	test	r12d, r12d
	je	.L104
	cmp	DWORD PTR -52[rbp], 0
	je	.L105
	mov	eax, DWORD PTR refhdest[rip]
	cmp	ebx, eax
	je	.L106
.L105:
	mov	edi, 64
	call	putchar@PLT
	jmp	.L108
.L106:
	mov	edi, 88
	call	putchar@PLT
	jmp	.L108
.L104:
	cmp	DWORD PTR -52[rbp], 0
	je	.L109
	mov	eax, DWORD PTR refhdest[rip]
	cmp	ebx, eax
	je	.L110
.L109:
	mov	edi, 46
	call	putchar@PLT
	jmp	.L108
.L110:
	mov	edi, 120
	call	putchar@PLT
.L108:
	lea	eax, -1[rbx]
	mov	ecx, r14d
	cdqe
	lea	rdx, lastline[rip]
	mov	BYTE PTR [rax+rdx], cl
	mov	r14d, r12d
	add	ebx, 1
.L65:
	mov	eax, DWORD PTR destwidth[rip]
	cmp	ebx, eax
	jle	.L111
	lea	eax, -1[rbx]
	mov	ecx, r14d
	cdqe
	lea	rdx, lastline[rip]
	mov	BYTE PTR [rax+rdx], cl
	mov	edi, 10
	call	putchar@PLT
	nop
	add	rsp, 32
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	outline, .-outline
	.section	.rodata
.LC25:
	.string	"scalech: "
	.text
	.globl	error
	.type	error, @function
error:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	mov	DWORD PTR -16[rbp], edx
	mov	DWORD PTR -20[rbp], ecx
	mov	DWORD PTR -24[rbp], r8d
	mov	rax, QWORD PTR stderr[rip]
	mov	rcx, rax
	mov	edx, 9
	mov	esi, 1
	lea	rdi, .LC25[rip]
	call	fwrite@PLT
	mov	rax, QWORD PTR stderr[rip]
	mov	r8d, DWORD PTR -24[rbp]
	mov	edi, DWORD PTR -20[rbp]
	mov	ecx, DWORD PTR -16[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	rsi, QWORD PTR -8[rbp]
	mov	r9d, r8d
	mov	r8d, edi
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	mov	rax, QWORD PTR stderr[rip]
	mov	rsi, rax
	mov	edi, 10
	call	fputc@PLT
	mov	edi, 1
	call	exit@PLT
	.cfi_endproc
.LFE2:
	.size	error, .-error
	.section	.rodata
	.align 8
.LC9:
	.long	0
	.long	1079574528
	.align 8
.LC10:
	.long	-1717986918
	.long	1069128089
	.align 8
.LC13:
	.long	-755914244
	.long	1062232653
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"350611.c"
	.text
	.comm	width,4,4
	.comm	length,4,4
	.comm	vdest,4,4
	.comm	hdest,4,4
	.comm	code,4,4
	.comm	refv,4,4
	.comm	refh,4,4
	.comm	spot,4,4
	.comm	start,4,4
	.comm	Bduring,4,4
	.comm	Wduring,4,4
	.comm	notfirsttime,4,4
	.comm	build,4,4
	.comm	refvdest,4,4
	.comm	refhdest,4,4
	.comm	destwidth,4,4
	.global	scale
	.data
	.align	2
	.type	scale, %object
	.size	scale, 4
scale:
	.word	50
	.comm	hscale,4,4
	.comm	filep,4,4
	.comm	ibuff,90000,4
	.comm	ebuff,300,4
	.comm	lastline,300,4
	.comm	Black,600,4
	.comm	WtoB,600,4
	.comm	BtoW,600,4
	.comm	White,600,4
	.section	.rodata
	.align	2
.LC0:
	.ascii	"%s, unknown option flag\000"
	.align	2
.LC1:
	.ascii	"r\000"
	.align	2
.LC2:
	.ascii	"can't open file \"%s\"\000"
	.align	2
.LC3:
	.ascii	"fontheader\012\000"
	.align	2
.LC4:
	.ascii	"not a character font file\000"
	.align	2
.LC5:
	.ascii	"fontheader\000"
	.align	2
.LC6:
	.ascii	"input line too long\000"
	.align	2
.LC7:
	.ascii	"%s %f\000"
	.align	2
.LC8:
	.ascii	"mag\000"
	.global	__aeabi_i2f
	.global	__aeabi_fmul
	.global	__aeabi_f2d
	.global	__aeabi_ddiv
	.global	__aeabi_dadd
	.global	__aeabi_d2iz
	.align	2
.LC9:
	.ascii	"mag %d\012\000"
	.align	2
.LC10:
	.ascii	"linesp\000"
	.align	2
.LC11:
	.ascii	"linesp %.2f\012\000"
	.align	2
.LC12:
	.ascii	"wordsp\000"
	.align	2
.LC13:
	.ascii	"wordsp %.2f\012\000"
	.align	2
.LC14:
	.ascii	"%s\000"
	.align	2
.LC15:
	.ascii	":%d, width = %f\000"
	.align	2
.LC16:
	.ascii	"bad glyph header, %s\000"
	.align	2
.LC17:
	.ascii	":%d, width = %.2f\012\000"
	.align	2
.LC18:
	.ascii	"unexpected end of input\000"
	.align	2
.LC19:
	.ascii	"glyph %d - two reference points\000"
	.align	2
.LC20:
	.ascii	"illegal character '%c' in map.\000"
	.align	2
.LC21:
	.ascii	"No position point in glyph %d\000"
	.align	2
.LC22:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #20
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	ldr	r3, .L64
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	mov	r3,#0
	b	.L2
.L6:
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r3, [r3]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #115
	bne	.L3
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r3, [r3]
	add	r3, r3, #2
	mov	r0, r3
	bl	atoi
	mov	r3, r0
	ldr	r2, .L64+156
	str	r3, [r2]
	b	.L4
.L3:
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L64+4
	bl	error
.L4:
	ldr	r3, [fp, #-32]
	sub	r3, r3, #1
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	str	r3, [fp, #-36]
.L2:
	ldr	r3, [fp, #-32]
	cmp	r3, #1
	ble	.L5
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #45
	beq	.L6
.L5:
	ldr	r3, [fp, #-32]
	cmp	r3, #2
	bne	.L7
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r3, [r3]
	ldr	r1, .L64+8
	mov	r0, r3
	bl	fopen
	mov	r3, r0
	ldr	r2, .L64+216
	str	r3, [r2]
	ldr	r3, .L64+216
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L8
	ldr	r3, [fp, #-36]
	add	r3, r3, #4
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L64+12
	bl	error
	b	.L8
.L7:
	ldr	r3, .L64+16
	ldr	r3, [r3]
	ldr	r2, .L64+216
	str	r3, [r2]
.L8:
	ldr	r3, .L64+156
	ldr	r3, [r3]
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L64+160
	str	r2, [r3]
	ldr	r3, .L64+216
	ldr	r3, [r3]
	mov	r2, r3
	mov	r1, #300
	ldr	r0, .L64+220
	bl	fgets
	ldr	r1, .L64+20
	ldr	r0, .L64+220
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	beq	.L9
	ldr	r0, .L64+24
	bl	error
.L9:
	ldr	r0, .L64+28
	bl	puts
	b	.L10
.L62:
	mov	r1, #10
	ldr	r0, .L64+220
	bl	index
	mov	r3, r0
	cmp	r3, #0
	bne	.L11
	ldr	r0, .L64+32
	bl	error
.L11:
	ldr	r3, .L64+220
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #58
	beq	.L12
	sub	r3, fp, #28
	ldr	r2, .L64+36
	ldr	r1, .L64+40
	ldr	r0, .L64+220
	bl	__isoc99_sscanf
	ldr	r1, .L64+44
	ldr	r0, .L64+36
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L13
	ldr	r3, .L64+156
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r2, r0
	ldr	r3, [fp, #-28]	@ float
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, #0
	ldr	r3, .L64+48
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L64+52
	ldr	r3, .L64+56
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	mov	r1, r3
	ldr	r0, .L64+60
	bl	printf
	b	.L10
.L13:
	ldr	r1, .L64+64
	ldr	r0, .L64+36
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L14
	ldr	r3, .L64+156
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r2, r0
	ldr	r3, [fp, #-28]	@ float
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, #0
	ldr	r3, .L64+48
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L64+68
	ldr	r3, .L64+72
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L64+76
	bl	printf
	b	.L10
.L14:
	ldr	r1, .L64+80
	ldr	r0, .L64+36
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L15
	ldr	r3, .L64+156
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r2, r0
	ldr	r3, [fp, #-28]	@ float
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, #0
	ldr	r3, .L64+48
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L64+68
	ldr	r3, .L64+72
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L64+84
	bl	printf
	b	.L10
.L15:
	ldr	r1, .L64+220
	ldr	r0, .L64+88
	bl	printf
	b	.L10
.L12:
	sub	r3, fp, #28
	ldr	r2, .L64+176
	ldr	r1, .L64+92
	ldr	r0, .L64+220
	bl	__isoc99_sscanf
	mov	r3, r0
	cmp	r3, #2
	beq	.L16
	ldr	r1, .L64+220
	ldr	r0, .L64+96
	bl	error
.L16:
	ldr	r3, .L64+176
	ldr	r4, [r3]
	ldr	r3, .L64+156
	ldr	r3, [r3]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r2, r0
	ldr	r3, [fp, #-28]	@ float
	mov	r1, r3
	mov	r0, r2
	bl	__aeabi_fmul
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, #0
	ldr	r3, .L64+48
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L64+68
	ldr	r3, .L64+72
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	ldr	r0, .L64+100
	bl	printf
	ldr	r3, .L64+216
	ldr	r3, [r3]
	mov	r2, r3
	mov	r1, #300
	ldr	r0, .L64+220
	bl	fgets
	mov	r3, r0
	cmp	r3, #0
	bne	.L17
	ldr	r0, .L64+104
	bl	error
.L17:
	ldr	r0, .L64+220
	bl	strlen
	mov	r3, r0
	sub	r3, r3, #1
	mov	r2, r3
	ldr	r3, .L64+204
	str	r2, [r3]
	ldr	r3, .L64+132
	mvn	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+208
	mov	r2, #0
	str	r2, [r3]
	b	.L18
.L30:
	mov	r4, #0
	b	.L19
.L28:
	ldrb	r3, [r5]	@ zero_extendqisi2
	cmp	r3, #120
	beq	.L20
	cmp	r3, #120
	bgt	.L21
	cmp	r3, #88
	beq	.L22
	cmp	r3, #88
	bgt	.L21
	cmp	r3, #64
	beq	.L23
	cmp	r3, #64
	bgt	.L21
	cmp	r3, #46
	beq	.L24
	cmp	r3, #46
	bgt	.L21
	cmp	r3, #42
	beq	.L23
	cmp	r3, #42
	bgt	.L21
	cmp	r3, #10
	beq	.L24
	cmp	r3, #13
	beq	.L24
	b	.L21
.L23:
	mov	r3, #1
	strb	r3, [r5]
	b	.L25
.L24:
	mov	r3, #0
	strb	r3, [r5]
	b	.L25
.L20:
	mov	r3, #0
	strb	r3, [r5]
	b	.L26
.L22:
	mov	r3, #1
	strb	r3, [r5]
.L26:
	ldr	r3, .L64+132
	ldr	r3, [r3]
	cmp	r3, #0
	blt	.L27
	ldr	r3, .L64+176
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L64+108
	bl	error
.L27:
	ldr	r3, .L64+132
	str	r4, [r3]
	ldr	r3, .L64+208
	ldr	r3, [r3]
	ldr	r2, .L64+212
	str	r3, [r2]
	b	.L25
.L21:
	ldrb	r3, [r5]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, .L64+112
	bl	error
.L25:
	add	r4, r4, #1
	add	r5, r5, #1
.L19:
	ldr	r3, .L64+204
	ldr	r3, [r3]
	cmp	r4, r3
	ble	.L28
	ldr	r3, .L64+208
	ldr	r3, [r3]
	add	r2, r3, #1
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	ldr	r3, .L64+220
	add	r3, r2, r3
	ldr	r2, .L64+216
	ldr	r2, [r2]
	mov	r1, #300
	mov	r0, r3
	bl	fgets
	mov	r3, r0
	cmp	r3, #0
	bne	.L29
	ldr	r0, .L64+104
	bl	error
.L29:
	ldr	r3, .L64+208
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L64+208
	str	r3, [r2]
.L18:
	ldr	r3, .L64+208
	ldr	r2, [r3]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	ldr	r3, .L64+220
	add	r5, r2, r3
	ldrb	r3, [r5]	@ zero_extendqisi2
	cmp	r3, #10
	bne	.L30
	ldr	r3, .L64+132
	ldr	r3, [r3]
	cmp	r3, #0
	bge	.L31
	ldr	r3, .L64+176
	ldr	r3, [r3]
	mov	r1, r3
	ldr	r0, .L64+116
	bl	error
.L31:
	ldr	r3, .L64+212
	ldr	r3, [r3]
	ldr	r2, .L64+156
	ldr	r2, [r2]
	mul	r2, r3, r2
	ldr	r3, .L64+160
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+164
	smull	r1, r2, r3, r2
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L64+168
	str	r3, [r2]
	ldr	r3, .L64+132
	ldr	r3, [r3]
	ldr	r2, .L64+156
	ldr	r2, [r2]
	mul	r2, r3, r2
	ldr	r3, .L64+160
	ldr	r3, [r3]
	sub	r3, r2, r3
	ldr	r2, .L64+164
	smull	r1, r2, r3, r2
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L64+132
	ldr	r2, [r2]
	cmp	r2, #0
	beq	.L32
	mov	r2, #2
	b	.L33
.L32:
	mov	r2, #1
.L33:
	add	r3, r2, r3
	ldr	r2, .L64+128
	str	r3, [r2]
	ldr	r3, .L64+204
	ldr	r2, [r3]
	ldr	r3, .L64+132
	ldr	r3, [r3]
	sub	r3, r2, r3
	ldr	r2, .L64+156
	ldr	r2, [r2]
	mul	r2, r3, r2
	ldr	r3, .L64+160
	ldr	r3, [r3]
	sub	r3, r2, r3
	ldr	r2, .L64+164
	smull	r1, r2, r3, r2
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r2, r2, r3
	ldr	r3, .L64+128
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+120
	str	r3, [r2]
	ldr	r3, .L64+180
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+172
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+196
	mov	r2, #0
	str	r2, [r3]
	mov	r4, #0
	b	.L34
.L35:
	ldr	r3, .L64+124
	mov	r2, #0
	strb	r2, [r3, r4]
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+124
	ldrb	ip, [r3, r4]	@ zero_extendqisi2
	ldr	r0, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r4
	mov	r2, ip
	strb	r2, [r3]
	ldr	r3, .L64+196
	ldr	r0, [r3]
	ldr	ip, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r4
	ldrb	ip, [r3]	@ zero_extendqisi2
	ldr	r1, .L64+184
	mov	r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	mov	r2, ip
	strb	r2, [r3]
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	ip, .L64+184
	mov	r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r4
	ldrb	ip, [r3]	@ zero_extendqisi2
	ldr	r0, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r4
	mov	r2, ip
	strb	r2, [r3]
	ldr	r3, .L64+196
	ldr	r0, [r3]
	ldr	ip, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r4
	ldrb	ip, [r3]	@ zero_extendqisi2
	ldr	r1, .L64+192
	mov	r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	mov	r2, ip
	strb	r2, [r3]
	add	r4, r4, #1
.L34:
	ldr	r3, .L64+204
	ldr	r3, [r3]
	cmp	r4, r3
	ble	.L35
	mov	r6, #0
	b	.L36
.L59:
	mov	r3, r6
	lsl	r3, r3, #2
	add	r3, r3, r6
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	ldr	r3, .L64+220
	add	r5, r2, r3
	ldr	r3, .L64+152
	mov	r2, #1
	str	r2, [r3]
	ldr	r3, .L64+144
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+148
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+140
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r0, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	ip, r3, #255
	ldr	r0, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	mov	r2, ip
	strb	r2, [r3]
	mov	r4, #0
	b	.L37
.L65:
	.align	2
.L64:
	.word	.LC22
	.word	.LC0
	.word	.LC1
	.word	.LC2
	.word	stdin
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	ebuff
	.word	.LC7
	.word	.LC8
	.word	1079574528
	.word	-1717986918
	.word	1069128089
	.word	.LC9
	.word	.LC10
	.word	-755914244
	.word	1062232653
	.word	.LC11
	.word	.LC12
	.word	.LC13
	.word	.LC14
	.word	.LC15
	.word	.LC16
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.word	.LC20
	.word	.LC21
	.word	destwidth
	.word	lastline
	.word	refhdest
	.word	refh
	.word	spot
	.word	Wduring
	.word	start
	.word	Bduring
	.word	hdest
	.word	scale
	.word	hscale
	.word	1374389535
	.word	refvdest
	.word	notfirsttime
	.word	code
	.word	vdest
	.word	WtoB
	.word	BtoW
	.word	Black
	.word	build
	.word	White
	.word	width
	.word	length
	.word	refv
	.word	filep
	.word	ibuff
.L47:
	ldr	r3, .L64+132
	ldr	r3, [r3]
	sub	r3, r4, r3
	ldr	r2, .L64+156
	ldr	r2, [r2]
	mul	r2, r3, r2
	ldr	r3, .L64+160
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+164
	smull	r1, r2, r3, r2
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r2, r2, r3
	ldr	r3, .L64+128
	ldr	r3, [r3]
	add	r3, r2, r3
	ldr	r2, .L64+132
	ldr	r2, [r2]
	cmp	r4, r2
	movlt	r2, #1
	movge	r2, #0
	and	r2, r2, #255
	sub	r3, r3, r2
	ldr	r2, .L64+176
	str	r3, [r2]
	ldr	r3, .L64+152
	ldr	r2, [r3]
	ldr	r3, .L64+176
	ldr	r3, [r3]
	cmp	r2, r3
	beq	.L38
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L39
	ldr	r3, .L64+140
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L40
.L39:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L41
	ldr	r3, .L64+148
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L41
	ldr	r3, .L64+136
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L41
.L40:
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+152
	ldr	r0, [r3]
	ldr	ip, .L64+192
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	lr, r3, #255
	ldr	ip, .L64+192
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	mov	r2, lr
	strb	r2, [r3]
.L41:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L42
	ldr	r3, .L64+136
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L42
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+152
	ldr	r0, [r3]
	ldr	ip, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	lr, r3, #255
	ldr	ip, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	mov	r2, lr
	strb	r2, [r3]
.L42:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L43
	ldr	r3, .L64+136
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L43
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+152
	ldr	r0, [r3]
	ldr	ip, .L64+184
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	lr, r3, #255
	ldr	ip, .L64+184
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	mov	r2, lr
	strb	r2, [r3]
.L43:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L44
	ldr	r3, .L64+148
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L45
.L44:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L64+140
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L46
	ldr	r3, .L64+136
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L46
.L45:
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+152
	ldr	r0, [r3]
	ldr	ip, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	lr, r3, #255
	ldr	ip, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	mov	r2, lr
	strb	r2, [r3]
.L46:
	ldr	r3, .L64+176
	ldr	r3, [r3]
	ldr	r2, .L64+152
	str	r3, [r2]
	ldr	r3, .L64+136
	ldr	r3, [r3]
	ldr	r2, .L64+144
	str	r3, [r2]
	ldr	r3, .L64+148
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, .L64+140
	mov	r2, #0
	str	r2, [r3]
.L38:
	ldrb	r3, [r5]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, .L64+136
	str	r2, [r3]
	ldr	r3, .L64+148
	ldr	r2, [r3]
	ldr	r3, .L64+136
	ldr	r3, [r3]
	orr	r3, r2, r3
	ldr	r2, .L64+148
	str	r3, [r2]
	ldr	r3, .L64+136
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L64+140
	ldr	r3, [r3]
	orr	r3, r2, r3
	ldr	r2, .L64+140
	str	r3, [r2]
	add	r4, r4, #1
	add	r5, r5, #1
.L37:
	ldr	r3, .L64+204
	ldr	r3, [r3]
	cmp	r4, r3
	ble	.L47
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L48
	ldr	r3, .L64+140
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L49
.L48:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L50
	ldr	r3, .L64+148
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L50
.L49:
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+152
	ldr	r0, [r3]
	ldr	ip, .L64+192
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	lr, r3, #255
	ldr	ip, .L64+192
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	mov	r2, lr
	strb	r2, [r3]
.L50:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L51
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+152
	ldr	r0, [r3]
	ldr	ip, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	lr, r3, #255
	ldr	ip, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	mov	r2, lr
	strb	r2, [r3]
.L51:
	ldr	r3, .L64+144
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L64+148
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L52
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r3, .L64+152
	ldr	r0, [r3]
	ldr	ip, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #1
	and	lr, r3, #255
	ldr	ip, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r0
	mov	r2, lr
	strb	r2, [r3]
.L52:
	ldr	r3, .L64+212
	ldr	r3, [r3]
	cmp	r6, r3
	movge	r3, #1
	movlt	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L64+168
	ldr	r3, [r3]
	add	r2, r2, r3
	ldr	r3, .L64+212
	ldr	r1, [r3]
	add	r3, r6, #1
	sub	r3, r1, r3
	ldr	r1, .L64+156
	ldr	r1, [r1]
	mul	r1, r3, r1
	ldr	r3, .L64+160
	ldr	r3, [r3]
	add	r3, r1, r3
	ldr	r1, .L64+164
	smull	r0, r1, r3, r1
	asr	r1, r1, #5
	asr	r3, r3, #31
	sub	r3, r3, r1
	add	r3, r2, r3
	ldr	r2, .L64+176
	str	r3, [r2]
	ldr	r3, .L64+176
	ldr	r2, [r3]
	ldr	r3, .L64+180
	ldr	r3, [r3]
	cmp	r2, r3
	bne	.L53
	ldr	r3, .L64+208
	ldr	r3, [r3]
	sub	r3, r3, #1
	cmp	r6, r3
	bne	.L54
.L53:
	ldr	r3, .L64+172
	ldr	r3, [r3]
	cmp	r3, #0
	beq	.L55
	ldr	r3, .L64+168
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, .L64+180
	ldr	r3, [r3]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	outline
	b	.L56
.L55:
	ldr	r3, .L64+172
	mov	r2, #1
	str	r2, [r3]
.L56:
	ldr	r3, .L64+176
	ldr	r3, [r3]
	ldr	r2, .L64+180
	str	r3, [r2]
	ldr	r3, .L64+196
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L64+196
	str	r2, [r3]
	mov	r4, #0
	b	.L57
.L58:
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	r0, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r4
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, .L64+196
	ldr	r0, [r3]
	ldr	ip, .L64+200
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r4
	ldrb	ip, [r3]	@ zero_extendqisi2
	ldr	r1, .L64+184
	mov	r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	mov	r2, ip
	strb	r2, [r3]
	ldr	r3, .L64+196
	ldr	r1, [r3]
	ldr	ip, .L64+184
	mov	r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r4
	ldrb	ip, [r3]	@ zero_extendqisi2
	ldr	r0, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r4
	mov	r2, ip
	strb	r2, [r3]
	ldr	r3, .L64+196
	ldr	r0, [r3]
	ldr	ip, .L64+188
	mov	r3, r1
	lsl	r3, r3, #2
	add	r3, r3, r1
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, ip, r2
	add	r3, r3, r4
	ldrb	ip, [r3]	@ zero_extendqisi2
	ldr	r1, .L64+192
	mov	r3, r0
	lsl	r3, r3, #2
	add	r3, r3, r0
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	mov	r2, ip
	strb	r2, [r3]
	add	r4, r4, #1
.L57:
	ldr	r3, .L64+204
	ldr	r3, [r3]
	cmp	r4, r3
	ble	.L58
.L54:
	add	r6, r6, #1
.L36:
	ldr	r3, .L64+208
	ldr	r3, [r3]
	cmp	r6, r3
	blt	.L59
	mov	r4, #0
	b	.L60
.L61:
	ldr	r3, .L64+196
	ldr	r2, [r3]
	ldr	r1, .L64+200
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	mov	r2, #1
	strb	r2, [r3]
	add	r4, r4, #1
.L60:
	ldr	r3, .L64+204
	ldr	r3, [r3]
	cmp	r4, r3
	ble	.L61
	ldr	r3, .L64+208
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, .L64+212
	ldr	r3, [r3]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	bl	outline
	mov	r0, #10
	bl	putchar
.L10:
	ldr	r3, .L64+216
	ldr	r3, [r3]
	mov	r2, r3
	mov	r1, #300
	ldr	r0, .L64+220
	bl	fgets
	mov	r3, r0
	cmp	r3, #0
	bne	.L62
	mov	r0, #0
	bl	exit
	.size	main, .-main
	.align	2
	.global	outline
	.syntax unified
	.arm
	.fpu softvfp
	.type	outline, %function
outline:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, fp, lr}
	add	fp, sp, #20
	sub	sp, sp, #24
	str	r0, [fp, #-40]
	ldr	r3, .L115
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r6, r3
	mov	r7, #0
	mov	r4, #1
	b	.L67
.L113:
	add	r1, r4, #1
	ldr	r0, .L115+4
	mov	r3, r6
	lsl	r3, r3, #2
	add	r3, r3, r6
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r1
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L68
	add	r1, r4, #1
	ldr	r0, .L115+8
	mov	r3, r6
	lsl	r3, r3, #2
	add	r3, r3, r6
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r1
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L69
.L68:
	mov	r3, #1
	b	.L70
.L69:
	mov	r3, #0
.L70:
	str	r3, [fp, #-36]
	ldr	r3, .L115
	ldr	r2, [r3]
	sub	r1, r4, #1
	ldr	r0, .L115+4
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r1
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L71
	ldr	r3, .L115
	ldr	r2, [r3]
	sub	r1, r4, #1
	ldr	r0, .L115+8
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r1
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L72
.L71:
	mov	r3, #1
	b	.L73
.L72:
	mov	r3, #0
.L73:
	str	r3, [fp, #-32]
	ldr	r3, .L115
	ldr	r2, [r3]
	ldr	r1, .L115+4
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L74
	ldr	r3, .L115
	ldr	r2, [r3]
	ldr	r1, .L115+8
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L75
.L74:
	mov	r3, #1
	b	.L76
.L75:
	mov	r3, #0
.L76:
	str	r3, [fp, #-28]
	ldr	r3, .L115
	ldr	r2, [r3]
	add	r1, r4, #1
	ldr	r0, .L115+4
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r1
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L77
	ldr	r3, .L115
	ldr	r2, [r3]
	add	r1, r4, #1
	ldr	r0, .L115+8
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r1
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L78
.L77:
	mov	r3, #1
	b	.L79
.L78:
	mov	r3, #0
.L79:
	str	r3, [fp, #-24]
	ldr	r1, .L115+12
	mov	r3, r6
	lsl	r3, r3, #2
	add	r3, r3, r6
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r1, r2
	add	r3, r3, r4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L80
	mov	r1, #8
	b	.L81
.L80:
	mov	r1, #0
.L81:
	ldr	r0, .L115+8
	mov	r3, r6
	lsl	r3, r3, #2
	add	r3, r3, r6
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L82
	mov	r3, #4
	b	.L83
.L82:
	mov	r3, #0
.L83:
	orr	r1, r1, r3
	ldr	r0, .L115+16
	mov	r3, r6
	lsl	r3, r3, #2
	add	r3, r3, r6
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L84
	mov	r3, #2
	b	.L85
.L84:
	mov	r3, #0
.L85:
	orr	r1, r3, r1
	ldr	r0, .L115+4
	mov	r3, r6
	lsl	r3, r3, #2
	add	r3, r3, r6
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	add	r3, r0, r2
	add	r3, r3, r4
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	orr	r5, r1, r3
	cmp	r5, #15
	ldrls	pc, [pc, r5, asl #2]
	b	.L86
.L88:
	.word	.L87
	.word	.L90
	.word	.L89
	.word	.L87
	.word	.L91
	.word	.L90
	.word	.L93
	.word	.L90
	.word	.L91
	.word	.L92
	.word	.L89
	.word	.L89
	.word	.L91
	.word	.L90
	.word	.L89
	.word	.L87
.L89:
	mov	r5, #1
	b	.L86
.L90:
	mov	r5, #0
	b	.L86
.L91:
	ldr	r3, [fp, #-28]
	cmp	r3, #0
	beq	.L94
	ldr	r3, .L115+20
	ldrb	r3, [r3, r4]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r5, r3
	b	.L86
.L94:
	mov	r5, #1
	b	.L86
.L93:
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	beq	.L96
	add	r3, r4, #1
	ldr	r2, .L115+20
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	beq	.L96
	ldr	r3, [fp, #-28]
	cmp	r3, #0
	bne	.L97
	ldr	r3, .L115+20
	ldrb	r3, [r3, r4]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L96
.L97:
	mov	r5, #0
	b	.L86
.L96:
	mov	r5, #1
	b	.L86
.L92:
	ldr	r3, .L115+20
	ldrb	r3, [r3, r4]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L99
	add	r3, r4, #1
	ldr	r2, .L115+20
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L100
.L99:
	ldr	r3, [fp, #-28]
	cmp	r3, #0
	beq	.L101
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L100
.L101:
	cmp	r7, #0
	bne	.L100
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	beq	.L102
.L100:
	mov	r5, #1
	b	.L86
.L102:
	mov	r5, #0
	b	.L86
.L87:
	ldr	r3, .L115+20
	ldrb	r3, [r3, r4]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-28]
	add	r2, r2, r3
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	add	r3, r7, r3
	add	r2, r4, #1
	ldr	r1, .L115+20
	ldrb	r2, [r1, r2]	@ zero_extendqisi2
	add	r2, r3, r2
	ldr	r3, [fp, #-32]
	add	r3, r2, r3
	sub	r2, r4, #1
	ldr	r1, .L115+20
	ldrb	r2, [r1, r2]	@ zero_extendqisi2
	add	r2, r3, r2
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	cmp	r3, #4
	ble	.L104
	mov	r5, #0
	b	.L114
.L104:
	mov	r5, #1
.L114:
	nop
.L86:
	cmp	r5, #0
	beq	.L106
	ldr	r3, [fp, #-40]
	cmp	r3, #0
	beq	.L107
	ldr	r3, .L115+24
	ldr	r3, [r3]
	cmp	r4, r3
	beq	.L108
.L107:
	mov	r0, #64
	bl	putchar
	b	.L110
.L108:
	mov	r0, #88
	bl	putchar
	b	.L110
.L106:
	ldr	r3, [fp, #-40]
	cmp	r3, #0
	beq	.L111
	ldr	r3, .L115+24
	ldr	r3, [r3]
	cmp	r4, r3
	beq	.L112
.L111:
	mov	r0, #46
	bl	putchar
	b	.L110
.L112:
	mov	r0, #120
	bl	putchar
.L110:
	sub	r3, r4, #1
	and	r1, r7, #255
	ldr	r2, .L115+20
	strb	r1, [r2, r3]
	mov	r7, r5
	add	r4, r4, #1
.L67:
	ldr	r3, .L115+28
	ldr	r3, [r3]
	cmp	r4, r3
	ble	.L113
	sub	r3, r4, #1
	and	r1, r7, #255
	ldr	r2, .L115+20
	strb	r1, [r2, r3]
	mov	r0, #10
	bl	putchar
	nop
	mov	r0, r3
	sub	sp, fp, #20
	@ sp needed
	pop	{r4, r5, r6, r7, fp, pc}
.L116:
	.align	2
.L115:
	.word	build
	.word	Black
	.word	WtoB
	.word	BtoW
	.word	White
	.word	lastline
	.word	refhdest
	.word	destwidth
	.size	outline, .-outline
	.section	.rodata
	.align	2
.LC23:
	.ascii	"scalech: \000"
	.text
	.align	2
	.global	error
	.syntax unified
	.arm
	.fpu softvfp
	.type	error, %function
error:
	@ args = 4, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r3, .L118
	ldr	r3, [r3]
	mov	r2, #9
	mov	r1, #1
	ldr	r0, .L118+4
	bl	fwrite
	ldr	r3, .L118
	ldr	r0, [r3]
	ldr	r3, [fp, #4]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-12]
	ldr	r1, [fp, #-8]
	bl	fprintf
	ldr	r3, .L118
	ldr	r3, [r3]
	mov	r1, r3
	mov	r0, #10
	bl	fputc
	mov	r0, #1
	bl	exit
.L119:
	.align	2
.L118:
	.word	stderr
	.word	.LC23
	.size	error, .-error
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
