	.file	"506576.c"
	.intel_syntax noprefix
	.text
	.globl	outputs
	.bss
	.align 32
	.type	outputs, @object
	.size	outputs, 3248
outputs:
	.zero	3248
	.globl	channelTable
	.align 8
	.type	channelTable, @object
	.size	channelTable, 8
channelTable:
	.zero	8
	.globl	STARTING_SIZE
	.section	.rodata
	.align 4
	.type	STARTING_SIZE, @object
	.size	STARTING_SIZE, 4
STARTING_SIZE:
	.long	511
	.local	eventHeap
	.comm	eventHeap,24,16
	.local	sim_ticks
	.comm	sim_ticks,8,8
	.local	current_node
	.comm	current_node,8,8
	.local	sim_seed
	.comm	sim_seed,4,4
	.globl	simTimeBuf
	.bss
	.align 32
	.type	simTimeBuf, @object
	.size	simTimeBuf, 128
simTimeBuf:
	.zero	128
	.globl	csmaInitHigh
	.data
	.align 4
	.type	csmaInitHigh, @object
	.size	csmaInitHigh, 4
csmaInitHigh:
	.long	640
	.globl	csmaInitLow
	.align 4
	.type	csmaInitLow, @object
	.size	csmaInitLow, 4
csmaInitLow:
	.long	20
	.globl	csmaHigh
	.align 4
	.type	csmaHigh, @object
	.size	csmaHigh, 4
csmaHigh:
	.long	160
	.globl	csmaLow
	.align 4
	.type	csmaLow, @object
	.size	csmaLow, 4
csmaLow:
	.long	20
	.globl	csmaSymbolsPerSec
	.align 4
	.type	csmaSymbolsPerSec, @object
	.size	csmaSymbolsPerSec, 4
csmaSymbolsPerSec:
	.long	65536
	.globl	csmaBitsPerSymbol
	.align 4
	.type	csmaBitsPerSymbol, @object
	.size	csmaBitsPerSymbol, 4
csmaBitsPerSymbol:
	.long	4
	.globl	csmaPreambleLength
	.align 4
	.type	csmaPreambleLength, @object
	.size	csmaPreambleLength, 4
csmaPreambleLength:
	.long	12
	.globl	csmaExponentBase
	.align 4
	.type	csmaExponentBase, @object
	.size	csmaExponentBase, 4
csmaExponentBase:
	.long	1
	.globl	csmaMaxIterations
	.bss
	.align 4
	.type	csmaMaxIterations, @object
	.size	csmaMaxIterations, 4
csmaMaxIterations:
	.zero	4
	.globl	csmaMinFreeSamples
	.data
	.align 4
	.type	csmaMinFreeSamples, @object
	.size	csmaMinFreeSamples, 4
csmaMinFreeSamples:
	.long	1
	.globl	csmaRxTxDelay
	.align 4
	.type	csmaRxTxDelay, @object
	.size	csmaRxTxDelay, 4
csmaRxTxDelay:
	.long	11
	.globl	csmaAckTime
	.align 4
	.type	csmaAckTime, @object
	.size	csmaAckTime, 4
csmaAckTime:
	.long	34
	.globl	connectivity
	.bss
	.align 32
	.type	connectivity, @object
	.size	connectivity, 8008
connectivity:
	.zero	8008
	.globl	localNoise
	.align 32
	.type	localNoise, @object
	.size	localNoise, 16016
localNoise:
	.zero	16016
	.globl	sensitivity
	.data
	.align 8
	.type	sensitivity, @object
	.size	sensitivity, 8
sensitivity:
	.long	0
	.long	1074790400
	.local	randU
	.comm	randU,776,32
	.local	randC
	.comm	randC,8,8
	.local	randCD
	.comm	randCD,8,8
	.local	randCM
	.comm	randCM,8,8
	.local	i97
	.comm	i97,4,4
	.local	j97
	.comm	j97,4,4
	.local	test
	.comm	test,4,4
	.globl	numCase1
	.bss
	.align 4
	.type	numCase1, @object
	.size	numCase1, 4
numCase1:
	.zero	4
	.globl	numCase2
	.align 4
	.type	numCase2, @object
	.size	numCase2, 4
numCase2:
	.zero	4
	.globl	numTotal
	.align 4
	.type	numTotal, @object
	.size	numTotal, 4
numTotal:
	.zero	4
	.globl	FreqKeyNum
	.align 4
	.type	FreqKeyNum, @object
	.size	FreqKeyNum, 4
FreqKeyNum:
	.zero	4
	.globl	noiseData
	.align 32
	.type	noiseData, @object
	.size	noiseData, 80000
noiseData:
	.zero	80000
	.globl	dummy
	.align 4
	.type	dummy, @object
	.size	dummy, 4
dummy:
	.zero	4
	.globl	atm128RegFile
	.align 32
	.type	atm128RegFile, @object
	.size	atm128RegFile, 160000
atm128RegFile:
	.zero	160000
	.globl	SimSchedulerBasicP$m_head
	.align 32
	.type	SimSchedulerBasicP$m_head, @object
	.size	SimSchedulerBasicP$m_head, 1000
SimSchedulerBasicP$m_head:
	.zero	1000
	.globl	SimSchedulerBasicP$m_tail
	.align 32
	.type	SimSchedulerBasicP$m_tail, @object
	.size	SimSchedulerBasicP$m_tail, 1000
SimSchedulerBasicP$m_tail:
	.zero	1000
	.globl	SimSchedulerBasicP$m_next
	.align 32
	.type	SimSchedulerBasicP$m_next, @object
	.size	SimSchedulerBasicP$m_next, 7000
SimSchedulerBasicP$m_next:
	.zero	7000
	.globl	SimSchedulerBasicP$sim_scheduler_event_pending
	.align 32
	.type	SimSchedulerBasicP$sim_scheduler_event_pending, @object
	.size	SimSchedulerBasicP$sim_scheduler_event_pending, 1000
SimSchedulerBasicP$sim_scheduler_event_pending:
	.zero	1000
	.globl	SimSchedulerBasicP$sim_scheduler_event
	.align 32
	.type	SimSchedulerBasicP$sim_scheduler_event, @object
	.size	SimSchedulerBasicP$sim_scheduler_event, 48000
SimSchedulerBasicP$sim_scheduler_event:
	.zero	48000
	.globl	SimMoteP$euid
	.align 32
	.type	SimMoteP$euid, @object
	.size	SimMoteP$euid, 8000
SimMoteP$euid:
	.zero	8000
	.globl	SimMoteP$startTime
	.align 32
	.type	SimMoteP$startTime, @object
	.size	SimMoteP$startTime, 8000
SimMoteP$startTime:
	.zero	8000
	.globl	SimMoteP$isOn
	.align 32
	.type	SimMoteP$isOn, @object
	.size	SimMoteP$isOn, 1000
SimMoteP$isOn:
	.zero	1000
	.globl	SimMoteP$bootEvent
	.align 32
	.type	SimMoteP$bootEvent, @object
	.size	SimMoteP$bootEvent, 8000
SimMoteP$bootEvent:
	.zero	8000
	.globl	TossimActiveMessageC$buffer
	.align 32
	.type	TossimActiveMessageC$buffer, @object
	.size	TossimActiveMessageC$buffer, 41000
TossimActiveMessageC$buffer:
	.zero	41000
	.globl	TossimActiveMessageC$bufferPointer
	.align 32
	.type	TossimActiveMessageC$bufferPointer, @object
	.size	TossimActiveMessageC$bufferPointer, 8000
TossimActiveMessageC$bufferPointer:
	.zero	8000
	.globl	TossimPacketModelC$initialized
	.align 32
	.type	TossimPacketModelC$initialized, @object
	.size	TossimPacketModelC$initialized, 1000
TossimPacketModelC$initialized:
	.zero	1000
	.globl	TossimPacketModelC$running
	.align 32
	.type	TossimPacketModelC$running, @object
	.size	TossimPacketModelC$running, 1000
TossimPacketModelC$running:
	.zero	1000
	.globl	TossimPacketModelC$backoffCount
	.align 32
	.type	TossimPacketModelC$backoffCount, @object
	.size	TossimPacketModelC$backoffCount, 1000
TossimPacketModelC$backoffCount:
	.zero	1000
	.globl	TossimPacketModelC$neededFreeSamples
	.align 32
	.type	TossimPacketModelC$neededFreeSamples, @object
	.size	TossimPacketModelC$neededFreeSamples, 1000
TossimPacketModelC$neededFreeSamples:
	.zero	1000
	.globl	TossimPacketModelC$sending
	.align 32
	.type	TossimPacketModelC$sending, @object
	.size	TossimPacketModelC$sending, 8000
TossimPacketModelC$sending:
	.zero	8000
	.globl	TossimPacketModelC$transmitting
	.align 32
	.type	TossimPacketModelC$transmitting, @object
	.size	TossimPacketModelC$transmitting, 1000
TossimPacketModelC$transmitting:
	.zero	1000
	.globl	TossimPacketModelC$sendingLength
	.align 32
	.type	TossimPacketModelC$sendingLength, @object
	.size	TossimPacketModelC$sendingLength, 1000
TossimPacketModelC$sendingLength:
	.zero	1000
	.globl	TossimPacketModelC$destNode
	.align 32
	.type	TossimPacketModelC$destNode, @object
	.size	TossimPacketModelC$destNode, 4000
TossimPacketModelC$destNode:
	.zero	4000
	.globl	TossimPacketModelC$sendEvent
	.align 32
	.type	TossimPacketModelC$sendEvent, @object
	.size	TossimPacketModelC$sendEvent, 48000
TossimPacketModelC$sendEvent:
	.zero	48000
	.globl	TossimPacketModelC$error
	.align 32
	.type	TossimPacketModelC$error, @object
	.size	TossimPacketModelC$error, 1000
TossimPacketModelC$error:
	.zero	1000
	.globl	CpmModelC$outgoing
	.align 32
	.type	CpmModelC$outgoing, @object
	.size	CpmModelC$outgoing, 8000
CpmModelC$outgoing:
	.zero	8000
	.globl	CpmModelC$requestAck
	.align 32
	.type	CpmModelC$requestAck, @object
	.size	CpmModelC$requestAck, 1000
CpmModelC$requestAck:
	.zero	1000
	.globl	CpmModelC$receiving
	.align 32
	.type	CpmModelC$receiving, @object
	.size	CpmModelC$receiving, 1000
CpmModelC$receiving:
	.zero	1000
	.globl	CpmModelC$transmitting
	.align 32
	.type	CpmModelC$transmitting, @object
	.size	CpmModelC$transmitting, 1000
CpmModelC$transmitting:
	.zero	1000
	.globl	CpmModelC$transmissionEndTime
	.align 32
	.type	CpmModelC$transmissionEndTime, @object
	.size	CpmModelC$transmissionEndTime, 8000
CpmModelC$transmissionEndTime:
	.zero	8000
	.globl	CpmModelC$outstandingReceptionHead
	.align 32
	.type	CpmModelC$outstandingReceptionHead, @object
	.size	CpmModelC$outstandingReceptionHead, 8000
CpmModelC$outstandingReceptionHead:
	.zero	8000
	.globl	CpmModelC$clearThreshold
	.align 32
	.type	CpmModelC$clearThreshold, @object
	.size	CpmModelC$clearThreshold, 8000
CpmModelC$clearThreshold:
	.zero	8000
	.globl	ActiveMessageAddressC$set
	.align 32
	.type	ActiveMessageAddressC$set, @object
	.size	ActiveMessageAddressC$set, 1000
ActiveMessageAddressC$set:
	.zero	1000
	.globl	ActiveMessageAddressC$addr
	.align 32
	.type	ActiveMessageAddressC$addr, @object
	.size	ActiveMessageAddressC$addr, 2000
ActiveMessageAddressC$addr:
	.zero	2000
	.globl	sendAckC$counter
	.align 32
	.type	sendAckC$counter, @object
	.size	sendAckC$counter, 1000
sendAckC$counter:
	.zero	1000
	.globl	sendAckC$packet
	.align 32
	.type	sendAckC$packet, @object
	.size	sendAckC$packet, 41000
sendAckC$packet:
	.zero	41000
	.globl	AMQueueImplP$0$current
	.align 32
	.type	AMQueueImplP$0$current, @object
	.size	AMQueueImplP$0$current, 1000
AMQueueImplP$0$current:
	.zero	1000
	.globl	AMQueueImplP$0$queue
	.align 32
	.type	AMQueueImplP$0$queue, @object
	.size	AMQueueImplP$0$queue, 8000
AMQueueImplP$0$queue:
	.zero	8000
	.globl	AMQueueImplP$0$cancelMask
	.align 32
	.type	AMQueueImplP$0$cancelMask, @object
	.size	AMQueueImplP$0$cancelMask, 1000
AMQueueImplP$0$cancelMask:
	.zero	1000
	.globl	Atm128AlarmAsyncP$0$set
	.align 32
	.type	Atm128AlarmAsyncP$0$set, @object
	.size	Atm128AlarmAsyncP$0$set, 1000
Atm128AlarmAsyncP$0$set:
	.zero	1000
	.globl	Atm128AlarmAsyncP$0$t0
	.align 32
	.type	Atm128AlarmAsyncP$0$t0, @object
	.size	Atm128AlarmAsyncP$0$t0, 4000
Atm128AlarmAsyncP$0$t0:
	.zero	4000
	.globl	Atm128AlarmAsyncP$0$dt
	.align 32
	.type	Atm128AlarmAsyncP$0$dt, @object
	.size	Atm128AlarmAsyncP$0$dt, 4000
Atm128AlarmAsyncP$0$dt:
	.zero	4000
	.globl	Atm128AlarmAsyncP$0$base
	.align 32
	.type	Atm128AlarmAsyncP$0$base, @object
	.size	Atm128AlarmAsyncP$0$base, 4000
Atm128AlarmAsyncP$0$base:
	.zero	4000
	.globl	HplAtm128Timer0AsyncP$inOverflow
	.align 32
	.type	HplAtm128Timer0AsyncP$inOverflow, @object
	.size	HplAtm128Timer0AsyncP$inOverflow, 1000
HplAtm128Timer0AsyncP$inOverflow:
	.zero	1000
	.globl	HplAtm128Timer0AsyncP$lastZero
	.align 32
	.type	HplAtm128Timer0AsyncP$lastZero, @object
	.size	HplAtm128Timer0AsyncP$lastZero, 8000
HplAtm128Timer0AsyncP$lastZero:
	.zero	8000
	.globl	HplAtm128Timer0AsyncP$oldScale
	.align 32
	.type	HplAtm128Timer0AsyncP$oldScale, @object
	.size	HplAtm128Timer0AsyncP$oldScale, 1000
HplAtm128Timer0AsyncP$oldScale:
	.zero	1000
	.globl	HplAtm128Timer0AsyncP$compare
	.align 32
	.type	HplAtm128Timer0AsyncP$compare, @object
	.size	HplAtm128Timer0AsyncP$compare, 8000
HplAtm128Timer0AsyncP$compare:
	.zero	8000
	.globl	HplAtm128Timer0AsyncP$overflow
	.align 32
	.type	HplAtm128Timer0AsyncP$overflow, @object
	.size	HplAtm128Timer0AsyncP$overflow, 8000
HplAtm128Timer0AsyncP$overflow:
	.zero	8000
	.globl	AlarmToTimerC$0$m_dt
	.align 32
	.type	AlarmToTimerC$0$m_dt, @object
	.size	AlarmToTimerC$0$m_dt, 4000
AlarmToTimerC$0$m_dt:
	.zero	4000
	.globl	AlarmToTimerC$0$m_oneshot
	.align 32
	.type	AlarmToTimerC$0$m_oneshot, @object
	.size	AlarmToTimerC$0$m_oneshot, 1000
AlarmToTimerC$0$m_oneshot:
	.zero	1000
	.globl	VirtualizeTimerC$0$m_timers
	.align 32
	.type	VirtualizeTimerC$0$m_timers, @object
	.size	VirtualizeTimerC$0$m_timers, 24000
VirtualizeTimerC$0$m_timers:
	.zero	24000
	.globl	RandomMlcgC$seed
	.align 32
	.type	RandomMlcgC$seed, @object
	.size	RandomMlcgC$seed, 4000
RandomMlcgC$seed:
	.zero	4000
	.text
	.type	init_heap, @function
init_heap:
.LFB0:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 0
	mov	edx, 511
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR 16[rax], edx
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 16[rax]
	cdqe
	sal	eax, 4
	mov	edi, eax
	call	malloc@PLT
	mov	rdx, rax
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 8[rax], rdx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	init_heap, .-init_heap
	.type	expand_heap, @function
expand_heap:
.LFB1:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 16[rax]
	add	eax, eax
	add	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	sal	eax, 4
	mov	edi, eax
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 16[rax]
	cdqe
	sal	eax, 4
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, QWORD PTR 8[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR 8[rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	DWORD PTR 16[rax], edx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	expand_heap, .-expand_heap
	.type	heap_insert, @function
heap_insert:
.LFB2:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 16[rax]
	cmp	DWORD PTR -4[rbp], eax
	jne	.L4
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	expand_heap
.L4:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	add	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR 8[rdx], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	add	rdx, rax
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rdx], rax
	mov	edx, DWORD PTR -4[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	up_heap
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	lea	edx, 1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	heap_insert, .-heap_insert
	.type	is_empty, @function
is_empty:
.LFB3:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	test	eax, eax
	sete	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	is_empty, .-is_empty
	.type	heap_is_empty, @function
heap_is_empty:
.LFB4:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	is_empty
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	heap_is_empty, .-heap_is_empty
	.type	heap_get_min_key, @function
heap_get_min_key:
.LFB5:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	is_empty
	test	eax, eax
	je	.L10
	mov	rax, -1
	jmp	.L11
.L10:
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	rax, QWORD PTR 8[rax]
.L11:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	heap_get_min_key, .-heap_get_min_key
	.type	sim_log_eq, @function
sim_log_eq:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	sete	al
	movzx	eax, al
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	sim_log_eq, .-sim_log_eq
	.type	sim_log_hash, @function
sim_log_hash:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	DWORD PTR -16[rbp], 0
	jmp	.L15
.L16:
	mov	eax, DWORD PTR -16[rbp]
	sal	eax, 6
	mov	edx, eax
	mov	eax, DWORD PTR -12[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -16[rbp]
	sal	eax, 16
	add	eax, edx
	sub	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -16[rbp], eax
.L15:
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, 1[rax]
	mov	QWORD PTR -8[rbp], rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L16
	mov	eax, DWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	sim_log_hash, .-sim_log_hash
	.section	.rodata
.LC0:
	.string	"w"
	.text
	.type	sim_log_init, @function
sim_log_init:
.LFB8:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	lea	rdx, sim_log_eq[rip]
	lea	rsi, sim_log_hash[rip]
	mov	edi, 128
	call	create_hashtable@PLT
	mov	QWORD PTR channelTable[rip], rax
	mov	DWORD PTR -20[rbp], 0
	jmp	.L19
.L20:
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	DWORD PTR [rdx+rax], 1
	mov	edi, 8
	call	malloc@PLT
	mov	rcx, rax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rbx, QWORD PTR [rdx+rax]
	lea	rsi, .LC0[rip]
	mov	edi, 1
	call	fdopen@PLT
	mov	QWORD PTR [rbx], rax
	add	DWORD PTR -20[rbp], 1
.L19:
	cmp	DWORD PTR -20[rbp], 202
	jle	.L20
	nop
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	sim_log_init, .-sim_log_init
	.type	sim_noise_hash, @function
sim_noise_hash:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	DWORD PTR -16[rbp], 0
	mov	DWORD PTR -12[rbp], 0
	jmp	.L22
.L23:
	mov	eax, DWORD PTR -12[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	edx, al
	mov	eax, DWORD PTR -16[rbp]
	sal	eax, 6
	add	edx, eax
	mov	eax, DWORD PTR -16[rbp]
	sal	eax, 16
	add	eax, edx
	sub	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -16[rbp], eax
	add	DWORD PTR -12[rbp], 1
.L22:
	cmp	DWORD PTR -12[rbp], 19
	jle	.L23
	mov	eax, DWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	sim_noise_hash, .-sim_noise_hash
	.type	sim_noise_eq, @function
sim_noise_eq:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rcx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 20
	mov	rsi, rcx
	mov	rdi, rax
	call	memcmp@PLT
	test	eax, eax
	sete	al
	movzx	eax, al
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	sim_noise_eq, .-sim_noise_eq
	.type	SimMoteP$SimMote$isOn, @function
SimMoteP$SimMote$isOn:
.LFB11:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, SimMoteP$isOn[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	SimMoteP$SimMote$isOn, .-SimMoteP$SimMote$isOn
	.type	sim_log_add_channel, @function
sim_log_add_channel:
.LFB12:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	rax, QWORD PTR channelTable[rip]
	mov	rdx, QWORD PTR -40[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	jne	.L30
	mov	rax, QWORD PTR -40[rbp]
	mov	rdi, rax
	call	strlen@PLT
	add	eax, 1
	mov	edi, eax
	call	malloc@PLT
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	strcpy@PLT
	mov	rax, QWORD PTR -40[rbp]
	mov	rdi, rax
	call	strlen@PLT
	mov	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	mov	BYTE PTR [rax], 0
	mov	edi, 24
	call	malloc@PLT
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -16[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR 8[rax], 0
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR 12[rax], 8
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	cdqe
	sal	eax, 3
	mov	edi, eax
	call	malloc@PLT
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR 16[rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	cdqe
	lea	edx, 0[0+rax*8]
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	rax, QWORD PTR channelTable[rip]
	mov	rdx, QWORD PTR -24[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	hashtable_insert@PLT
.L30:
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	cmp	edx, eax
	jne	.L31
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	add	eax, eax
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	eax, 3
	mov	edi, eax
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 12[rax]
	cdqe
	lea	edx, 0[0+rax*8]
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR 16[rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -28[rbp]
	mov	DWORD PTR 12[rax], edx
.L31:
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	cdqe
	sal	rax, 3
	add	rdx, rax
	mov	rax, QWORD PTR -48[rbp]
	mov	QWORD PTR [rdx], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	lea	edx, 1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR 8[rax], edx
	mov	eax, 0
	call	sim_log_commit_change
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	sim_log_add_channel, .-sim_log_add_channel
	.type	sim_log_remove_channel, @function
sim_log_remove_channel:
.LFB13:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	rax, QWORD PTR channelTable[rip]
	mov	rdx, QWORD PTR -40[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	jne	.L33
	mov	eax, 0
	jmp	.L34
.L33:
	mov	DWORD PTR -20[rbp], 0
	jmp	.L35
.L37:
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	cmp	rax, QWORD PTR -8[rbp]
	jne	.L36
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR 8[rax]
	mov	edx, DWORD PTR -20[rbp]
	add	edx, 1
	sub	eax, edx
	mov	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	mov	rcx, QWORD PTR 16[rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	add	rax, 1
	sal	rax, 3
	add	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	mov	rsi, QWORD PTR 16[rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 3
	add	rax, rsi
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR 8[rax]
	cdqe
	sal	rax, 3
	sub	rax, 8
	add	rax, rdx
	mov	QWORD PTR [rax], 0
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR 8[rax]
	lea	edx, -1[rax]
	mov	rax, QWORD PTR -16[rbp]
	mov	DWORD PTR 8[rax], edx
.L36:
	add	DWORD PTR -20[rbp], 1
.L35:
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR 8[rax]
	cmp	DWORD PTR -20[rbp], eax
	jl	.L37
	mov	eax, 1
.L34:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	sim_log_remove_channel, .-sim_log_remove_channel
	.type	sim_gain_allocate_link, @function
sim_gain_allocate_link:
.LFB14:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	edi, 24
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 16[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC1[rip]
	movsd	QWORD PTR 8[rax], xmm0
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	sim_gain_allocate_link, .-sim_gain_allocate_link
	.type	RandomInitialise, @function
RandomInitialise:
.LFB15:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -52[rbp], edi
	mov	DWORD PTR -56[rbp], esi
	cmp	DWORD PTR -52[rbp], 0
	js	.L41
	cmp	DWORD PTR -52[rbp], 31328
	jg	.L41
	cmp	DWORD PTR -56[rbp], 0
	js	.L41
	cmp	DWORD PTR -56[rbp], 30081
	jle	.L42
.L41:
	mov	DWORD PTR -52[rbp], 1802
	mov	DWORD PTR -56[rbp], 9373
.L42:
	mov	eax, DWORD PTR -52[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -1189002245
	shr	rdx, 32
	add	edx, eax
	sar	edx, 7
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	imul	rdx, rdx, -1189002245
	shr	rdx, 32
	add	edx, eax
	sar	edx, 7
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	ecx, edx, 177
	sub	eax, ecx
	mov	edx, eax
	lea	eax, 2[rdx]
	mov	DWORD PTR -40[rbp], eax
	mov	eax, DWORD PTR -52[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -1189002245
	shr	rdx, 32
	add	edx, eax
	sar	edx, 7
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	ecx, edx, 177
	sub	eax, ecx
	mov	edx, eax
	lea	eax, 2[rdx]
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -56[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1626496491
	shr	rdx, 32
	sar	edx, 6
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	movsx	rdx, eax
	imul	rdx, rdx, -1206451487
	shr	rdx, 32
	add	edx, eax
	sar	edx, 7
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	ecx, edx, 178
	sub	eax, ecx
	mov	edx, eax
	lea	eax, 1[rdx]
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -56[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, 1626496491
	shr	rdx, 32
	sar	edx, 6
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	edx, edx, 169
	sub	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	DWORD PTR -44[rbp], 0
	jmp	.L43
.L47:
	pxor	xmm0, xmm0
	movsd	QWORD PTR -16[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC3[rip]
	movsd	QWORD PTR -8[rbp], xmm0
	mov	DWORD PTR -24[rbp], 0
	jmp	.L44
.L46:
	mov	eax, DWORD PTR -40[rbp]
	imul	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -1223705765
	shr	rdx, 32
	add	edx, eax
	sar	edx, 7
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	ecx, edx, 179
	sub	eax, ecx
	mov	edx, eax
	mov	eax, edx
	imul	eax, DWORD PTR -32[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -1223705765
	shr	rdx, 32
	add	edx, eax
	sar	edx, 7
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	mov	DWORD PTR -20[rbp], edx
	mov	edx, DWORD PTR -20[rbp]
	imul	edx, edx, 179
	sub	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	mov	DWORD PTR -40[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	imul	eax, eax, 53
	add	eax, 1
	movsx	rdx, eax
	imul	rdx, rdx, 1626496491
	shr	rdx, 32
	sar	edx, 6
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	mov	DWORD PTR -28[rbp], edx
	mov	edx, DWORD PTR -28[rbp]
	imul	edx, edx, 169
	sub	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	imul	eax, DWORD PTR -20[rbp]
	cdq
	shr	edx, 26
	add	eax, edx
	and	eax, 63
	sub	eax, edx
	cmp	eax, 31
	jle	.L45
	movsd	xmm0, QWORD PTR -16[rbp]
	addsd	xmm0, QWORD PTR -8[rbp]
	movsd	QWORD PTR -16[rbp], xmm0
.L45:
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC3[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	add	DWORD PTR -24[rbp], 1
.L44:
	cmp	DWORD PTR -24[rbp], 23
	jle	.L46
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, randU[rip]
	movsd	xmm0, QWORD PTR -16[rbp]
	movsd	QWORD PTR [rdx+rax], xmm0
	add	DWORD PTR -44[rbp], 1
.L43:
	cmp	DWORD PTR -44[rbp], 96
	jle	.L47
	movsd	xmm0, QWORD PTR .LC4[rip]
	movsd	QWORD PTR randC[rip], xmm0
	movsd	xmm0, QWORD PTR .LC5[rip]
	movsd	QWORD PTR randCD[rip], xmm0
	movsd	xmm0, QWORD PTR .LC6[rip]
	movsd	QWORD PTR randCM[rip], xmm0
	mov	DWORD PTR i97[rip], 97
	mov	DWORD PTR j97[rip], 33
	mov	DWORD PTR test[rip], 1
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	RandomInitialise, .-RandomInitialise
	.type	sim_noise_alarm, @function
sim_noise_alarm:
.LFB16:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR dummy[rip], 5
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	sim_noise_alarm, .-sim_noise_alarm
	.type	getHeader, @function
getHeader:
.LFB17:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 7
	sub	rax, 7
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	getHeader, .-getHeader
	.section	.rodata
	.align 8
.LC7:
	.string	"Delivering packet to %i at %s\n"
.LC8:
	.string	"Packet"
	.text
	.type	TossimActiveMessageC$active_message_deliver_handle, @function
TossimActiveMessageC$active_message_deliver_handle:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR 24[rax]
	mov	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_time_string
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	mov	r8, rbx
	mov	ecx, eax
	lea	rdx, .LC7[rip]
	lea	rsi, .LC8[rip]
	mov	edi, 108
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$Model$receive
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	TossimActiveMessageC$active_message_deliver_handle, .-TossimActiveMessageC$active_message_deliver_handle
	.type	TossimActiveMessageC$allocate_deliver_event, @function
TossimActiveMessageC$allocate_deliver_event:
.LFB19:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	edi, 48
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 8[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, TossimActiveMessageC$active_message_deliver_handle[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, sim_queue_cleanup_event[rip]
	mov	QWORD PTR 40[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 17[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 16[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	QWORD PTR 24[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	TossimActiveMessageC$allocate_deliver_event, .-TossimActiveMessageC$allocate_deliver_event
	.type	TossimActiveMessageC$Packet$maxPayloadLength, @function
TossimActiveMessageC$Packet$maxPayloadLength:
.LFB20:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 28
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	TossimActiveMessageC$Packet$maxPayloadLength, .-TossimActiveMessageC$Packet$maxPayloadLength
	.type	ActiveMessageAddressC$amAddress, @function
ActiveMessageAddressC$amAddress:
.LFB21:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	ActiveMessageAddressC$ActiveMessageAddress$amAddress
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	ActiveMessageAddressC$amAddress, .-ActiveMessageAddressC$amAddress
	.type	TossimActiveMessageC$amAddress, @function
TossimActiveMessageC$amAddress:
.LFB22:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	ActiveMessageAddressC$amAddress
	mov	WORD PTR -2[rbp], ax
	movzx	eax, WORD PTR -2[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	TossimActiveMessageC$amAddress, .-TossimActiveMessageC$amAddress
	.type	TossimActiveMessageC$AMPacket$address, @function
TossimActiveMessageC$AMPacket$address:
.LFB23:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	TossimActiveMessageC$amAddress
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	TossimActiveMessageC$AMPacket$address, .-TossimActiveMessageC$AMPacket$address
	.type	TossimActiveMessageC$AMPacket$isForMe, @function
TossimActiveMessageC$AMPacket$isForMe:
.LFB24:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$destination
	mov	ebx, eax
	call	TossimActiveMessageC$AMPacket$address
	cmp	bx, ax
	je	.L63
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$destination
	cmp	ax, -1
	jne	.L64
.L63:
	mov	eax, 1
	jmp	.L65
.L64:
	mov	eax, 0
.L65:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	TossimActiveMessageC$AMPacket$isForMe, .-TossimActiveMessageC$AMPacket$isForMe
	.type	__nesc_ntoh_uint16, @function
__nesc_ntoh_uint16:
.LFB25:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	eax, 8
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	or	eax, edx
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	__nesc_ntoh_uint16, .-__nesc_ntoh_uint16
	.type	__nesc_ntoh_uint8, @function
__nesc_ntoh_uint8:
.LFB26:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR [rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	__nesc_ntoh_uint8, .-__nesc_ntoh_uint8
	.type	Atm128AlarmAsyncP$0$Alarm$getNow, @function
Atm128AlarmAsyncP$0$Alarm$getNow:
.LFB27:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	Atm128AlarmAsyncP$0$Counter$get
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	Atm128AlarmAsyncP$0$Alarm$getNow, .-Atm128AlarmAsyncP$0$Alarm$getNow
	.type	AlarmToTimerC$0$Alarm$getNow, @function
AlarmToTimerC$0$Alarm$getNow:
.LFB28:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	Atm128AlarmAsyncP$0$Alarm$getNow
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	AlarmToTimerC$0$Alarm$getNow, .-AlarmToTimerC$0$Alarm$getNow
	.type	AlarmToTimerC$0$Timer$getNow, @function
AlarmToTimerC$0$Timer$getNow:
.LFB29:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	AlarmToTimerC$0$Alarm$getNow
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	AlarmToTimerC$0$Timer$getNow, .-AlarmToTimerC$0$Timer$getNow
	.type	VirtualizeTimerC$0$TimerFrom$getNow, @function
VirtualizeTimerC$0$TimerFrom$getNow:
.LFB30:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	AlarmToTimerC$0$Timer$getNow
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	VirtualizeTimerC$0$TimerFrom$getNow, .-VirtualizeTimerC$0$TimerFrom$getNow
	.type	VirtualizeTimerC$0$Timer$startOneShot, @function
VirtualizeTimerC$0$Timer$startOneShot:
.LFB31:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	DWORD PTR -8[rbp], esi
	mov	BYTE PTR -4[rbp], al
	call	VirtualizeTimerC$0$TimerFrom$getNow
	mov	esi, eax
	movzx	eax, BYTE PTR -4[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	ecx, 1
	mov	edi, eax
	call	VirtualizeTimerC$0$startTimer
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	VirtualizeTimerC$0$Timer$startOneShot, .-VirtualizeTimerC$0$Timer$startOneShot
	.type	FakeSensorP$0$Timer0$startOneShot, @function
FakeSensorP$0$Timer0$startOneShot:
.LFB32:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	edi, 1
	call	VirtualizeTimerC$0$Timer$startOneShot
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	FakeSensorP$0$Timer0$startOneShot, .-FakeSensorP$0$Timer0$startOneShot
	.type	FakeSensorP$0$Read$read, @function
FakeSensorP$0$Read$read:
.LFB33:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 10
	call	FakeSensorP$0$Timer0$startOneShot
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	FakeSensorP$0$Read$read, .-FakeSensorP$0$Read$read
	.type	sendAckC$Read$read, @function
sendAckC$Read$read:
.LFB34:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	FakeSensorP$0$Read$read
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	sendAckC$Read$read, .-sendAckC$Read$read
	.type	sendAckC$sendResp, @function
sendAckC$sendResp:
.LFB35:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	sendAckC$Read$read
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	sendAckC$sendResp, .-sendAckC$sendResp
	.section	.rodata
.LC9:
	.string	"Received packet at time %s\n"
.LC10:
	.string	"radio_rec"
.LC11:
	.string	">>>Pack \n"
.LC12:
	.string	"radio_pack"
.LC13:
	.string	"\t\t Payload Received\n"
.LC14:
	.string	"\t\t type: %hhu \n "
.LC15:
	.string	"\t\t data: %hhu \n"
	.text
	.type	sendAckC$Receive$receive, @function
sendAckC$Receive$receive:
.LFB36:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	mov	eax, edx
	mov	BYTE PTR -52[rbp], al
	mov	rax, QWORD PTR -48[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 3
	mov	rdi, rax
	call	__nesc_ntoh_uint16
	mov	ebx, eax
	mov	eax, 0
	call	sim_node
	mov	ecx, ebx
	lea	rdx, sendAckC$counter[rip]
	mov	BYTE PTR [rax+rdx], cl
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	cmp	al, 1
	jne	.L87
	call	sendAckC$sendResp
.L87:
	mov	eax, 0
	call	sim_time_string
	mov	rcx, rax
	lea	rdx, .LC9[rip]
	lea	rsi, .LC10[rip]
	mov	edi, 162
	mov	eax, 0
	call	sim_log_debug
	lea	rdx, .LC11[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 163
	mov	eax, 0
	call	sim_log_debug
	lea	rdx, .LC13[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 164
	mov	eax, 0
	call	sim_log_debug_clear
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	movzx	eax, al
	mov	ecx, eax
	lea	rdx, .LC14[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 165
	mov	eax, 0
	call	sim_log_debug_clear
	mov	rax, QWORD PTR -24[rbp]
	add	rax, 1
	mov	rdi, rax
	call	__nesc_ntoh_uint16
	movzx	eax, ax
	mov	ecx, eax
	lea	rdx, .LC15[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 166
	mov	eax, 0
	call	sim_log_debug_clear
	mov	rax, QWORD PTR -40[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	sendAckC$Receive$receive, .-sendAckC$Receive$receive
	.type	TossimActiveMessageC$Receive$default$receive, @function
TossimActiveMessageC$Receive$default$receive:
.LFB37:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	eax, ecx
	mov	edx, edi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	TossimActiveMessageC$Receive$default$receive, .-TossimActiveMessageC$Receive$default$receive
	.type	TossimActiveMessageC$Receive$receive, @function
TossimActiveMessageC$Receive$receive:
.LFB38:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	eax, ecx
	mov	edx, edi
	mov	BYTE PTR -20[rbp], dl
	mov	BYTE PTR -24[rbp], al
	movzx	eax, BYTE PTR -20[rbp]
	cmp	eax, 6
	jne	.L92
	movzx	edx, BYTE PTR -24[rbp]
	mov	rcx, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	sendAckC$Receive$receive
	mov	QWORD PTR -8[rbp], rax
	jmp	.L93
.L92:
	movzx	ecx, BYTE PTR -24[rbp]
	movzx	eax, BYTE PTR -20[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	rsi, QWORD PTR -32[rbp]
	mov	edi, eax
	call	TossimActiveMessageC$Receive$default$receive
	mov	QWORD PTR -8[rbp], rax
	nop
.L93:
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	TossimActiveMessageC$Receive$receive, .-TossimActiveMessageC$Receive$receive
	.type	VirtualizeTimerC$0$updateFromTimer$postTask, @function
VirtualizeTimerC$0$updateFromTimer$postTask:
.LFB39:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edi, 6
	call	SimSchedulerBasicP$TaskBasic$postTask
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	VirtualizeTimerC$0$updateFromTimer$postTask, .-VirtualizeTimerC$0$updateFromTimer$postTask
	.type	SimSchedulerBasicP$isWaiting, @function
SimSchedulerBasicP$isWaiting:
.LFB40:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -4[rbp]
	movsx	rcx, eax
	mov	rax, rdx
	sal	rax, 3
	sub	rax, rdx
	lea	rdx, [rax+rcx]
	lea	rax, SimSchedulerBasicP$m_next[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	cmp	al, -1
	jne	.L98
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_tail[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	cmp	BYTE PTR -4[rbp], al
	jne	.L99
.L98:
	mov	eax, 1
	jmp	.L100
.L99:
	mov	eax, 0
.L100:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	SimSchedulerBasicP$isWaiting, .-SimSchedulerBasicP$isWaiting
	.type	SimSchedulerBasicP$pushTask, @function
SimSchedulerBasicP$pushTask:
.LFB41:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	eax, edi
	mov	BYTE PTR -20[rbp], al
	movzx	eax, BYTE PTR -20[rbp]
	mov	edi, eax
	call	SimSchedulerBasicP$isWaiting
	test	al, al
	jne	.L103
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	cmp	al, -1
	jne	.L104
	mov	eax, 0
	call	sim_node
	lea	rcx, SimSchedulerBasicP$m_head[rip]
	movzx	edx, BYTE PTR -20[rbp]
	mov	BYTE PTR [rax+rcx], dl
	mov	eax, 0
	call	sim_node
	lea	rcx, SimSchedulerBasicP$m_tail[rip]
	movzx	edx, BYTE PTR -20[rbp]
	mov	BYTE PTR [rax+rcx], dl
	jmp	.L105
.L104:
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_tail[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	movsx	rdx, eax
	mov	rax, rbx
	sal	rax, 3
	sub	rax, rbx
	add	rdx, rax
	lea	rax, SimSchedulerBasicP$m_next[rip]
	add	rdx, rax
	movzx	eax, BYTE PTR -20[rbp]
	mov	BYTE PTR [rdx], al
	mov	eax, 0
	call	sim_node
	lea	rcx, SimSchedulerBasicP$m_tail[rip]
	movzx	edx, BYTE PTR -20[rbp]
	mov	BYTE PTR [rax+rcx], dl
.L105:
	mov	eax, 1
	jmp	.L106
.L103:
	mov	eax, 0
.L106:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	SimSchedulerBasicP$pushTask, .-SimSchedulerBasicP$pushTask
	.type	SimSchedulerBasicP$sim_config_task_latency, @function
SimSchedulerBasicP$sim_config_task_latency:
.LFB42:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 100
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	SimSchedulerBasicP$sim_config_task_latency, .-SimSchedulerBasicP$sim_config_task_latency
	.type	SimMoteP$SimMote$getStartTime, @function
SimMoteP$SimMote$getStartTime:
.LFB43:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$startTime[rip]
	mov	rax, QWORD PTR [rdx+rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	SimMoteP$SimMote$getStartTime, .-SimMoteP$SimMote$getStartTime
	.type	HplAtm128Timer0AsyncP$notify_clockTicksPerSec, @function
HplAtm128Timer0AsyncP$notify_clockTicksPerSec:
.LFB44:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 32768
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	HplAtm128Timer0AsyncP$notify_clockTicksPerSec, .-HplAtm128Timer0AsyncP$notify_clockTicksPerSec
	.type	HplAtm128Timer0AsyncP$sim_to_clock, @function
HplAtm128Timer0AsyncP$sim_to_clock:
.LFB45:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	call	HplAtm128Timer0AsyncP$notify_clockTicksPerSec
	mov	rdx, QWORD PTR -8[rbp]
	imul	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	cqo
	idiv	rcx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	HplAtm128Timer0AsyncP$sim_to_clock, .-HplAtm128Timer0AsyncP$sim_to_clock
	.type	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag, @function
Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag:
.LFB46:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE46:
	.size	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag, .-Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag
	.type	TossimActiveMessageC$Snoop$default$receive, @function
TossimActiveMessageC$Snoop$default$receive:
.LFB47:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	eax, ecx
	mov	edx, edi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE47:
	.size	TossimActiveMessageC$Snoop$default$receive, .-TossimActiveMessageC$Snoop$default$receive
	.type	TossimActiveMessageC$Snoop$receive, @function
TossimActiveMessageC$Snoop$receive:
.LFB48:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 40
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	eax, ecx
	mov	edx, edi
	mov	BYTE PTR -20[rbp], dl
	mov	BYTE PTR -24[rbp], al
	movzx	ecx, BYTE PTR -24[rbp]
	movzx	eax, BYTE PTR -20[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	rsi, QWORD PTR -32[rbp]
	mov	edi, eax
	call	TossimActiveMessageC$Snoop$default$receive
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE48:
	.size	TossimActiveMessageC$Snoop$receive, .-TossimActiveMessageC$Snoop$receive
	.type	SimSchedulerBasicP$sim_scheduler_event_handle, @function
SimSchedulerBasicP$sim_scheduler_event_handle:
.LFB52:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event_pending[rip]
	mov	BYTE PTR [rax+rdx], 0
	call	SimSchedulerBasicP$Scheduler$runNextTask
	test	al, al
	je	.L123
	call	SimSchedulerBasicP$sim_scheduler_submit_event
.L123:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE52:
	.size	SimSchedulerBasicP$sim_scheduler_event_handle, .-SimSchedulerBasicP$sim_scheduler_event_handle
	.type	SimSchedulerBasicP$sim_scheduler_event_init, @function
SimSchedulerBasicP$sim_scheduler_event_init:
.LFB53:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	sim_node
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR 8[rdx], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 16[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 24[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event_handle[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, sim_queue_cleanup_none[rip]
	mov	QWORD PTR 40[rax], rdx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE53:
	.size	SimSchedulerBasicP$sim_scheduler_event_init, .-SimSchedulerBasicP$sim_scheduler_event_init
	.section	.rodata
.LC16:
	.string	"Initializing scheduler.\n"
.LC17:
	.string	"Scheduler"
	.text
	.type	SimSchedulerBasicP$Scheduler$init, @function
SimSchedulerBasicP$Scheduler$init:
.LFB54:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdx, .LC16[rip]
	lea	rsi, .LC17[rip]
	mov	edi, 95
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 3
	sub	rax, rdx
	lea	rdx, SimSchedulerBasicP$m_next[rip]
	add	rax, rdx
	mov	edx, 7
	mov	esi, 255
	mov	rdi, rax
	call	memset@PLT
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	mov	BYTE PTR [rax+rdx], -1
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_tail[rip]
	mov	BYTE PTR [rax+rdx], -1
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event_pending[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event[rip]
	add	rax, rdx
	mov	rdi, rax
	call	SimSchedulerBasicP$sim_scheduler_event_init
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE54:
	.size	SimSchedulerBasicP$Scheduler$init, .-SimSchedulerBasicP$Scheduler$init
	.type	SimMainP$Scheduler$init, @function
SimMainP$Scheduler$init:
.LFB55:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	SimSchedulerBasicP$Scheduler$init
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE55:
	.size	SimMainP$Scheduler$init, .-SimMainP$Scheduler$init
	.type	SimSchedulerBasicP$popTask, @function
SimSchedulerBasicP$popTask:
.LFB56:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 16
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	cmp	al, -1
	je	.L128
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	mov	BYTE PTR -17[rbp], al
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	r12d, al
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movsx	rcx, r12d
	mov	rax, rbx
	sal	rax, 3
	sub	rax, rbx
	add	rcx, rax
	lea	rax, SimSchedulerBasicP$m_next[rip]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	lea	rcx, SimSchedulerBasicP$m_head[rip]
	mov	BYTE PTR [rdx+rcx], al
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	cmp	al, -1
	jne	.L129
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$m_tail[rip]
	mov	BYTE PTR [rax+rdx], -1
.L129:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -17[rbp]
	movsx	rcx, eax
	mov	rax, rdx
	sal	rax, 3
	sub	rax, rdx
	lea	rdx, [rax+rcx]
	lea	rax, SimSchedulerBasicP$m_next[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], -1
	movzx	eax, BYTE PTR -17[rbp]
	jmp	.L130
.L128:
	mov	eax, -1
.L130:
	add	rsp, 16
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE56:
	.size	SimSchedulerBasicP$popTask, .-SimSchedulerBasicP$popTask
	.type	sendAckC$SplitControl$start, @function
sendAckC$SplitControl$start:
.LFB57:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	TossimPacketModelC$Control$start
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE57:
	.size	sendAckC$SplitControl$start, .-sendAckC$SplitControl$start
	.type	VirtualizeTimerC$0$Timer$startPeriodic, @function
VirtualizeTimerC$0$Timer$startPeriodic:
.LFB58:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	DWORD PTR -8[rbp], esi
	mov	BYTE PTR -4[rbp], al
	call	VirtualizeTimerC$0$TimerFrom$getNow
	mov	esi, eax
	movzx	eax, BYTE PTR -4[rbp]
	mov	edx, DWORD PTR -8[rbp]
	mov	ecx, 0
	mov	edi, eax
	call	VirtualizeTimerC$0$startTimer
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE58:
	.size	VirtualizeTimerC$0$Timer$startPeriodic, .-VirtualizeTimerC$0$Timer$startPeriodic
	.type	sendAckC$MilliTimer$startPeriodic, @function
sendAckC$MilliTimer$startPeriodic:
.LFB59:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, eax
	mov	edi, 0
	call	VirtualizeTimerC$0$Timer$startPeriodic
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE59:
	.size	sendAckC$MilliTimer$startPeriodic, .-sendAckC$MilliTimer$startPeriodic
	.section	.rodata
.LC18:
	.string	"Radio on!\n"
.LC19:
	.string	"radio"
.LC20:
	.string	"radio error, restart radio\n"
.LC21:
	.string	"radio_err"
	.text
	.type	sendAckC$SplitControl$startDone, @function
sendAckC$SplitControl$startDone:
.LFB60:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	cmp	BYTE PTR -4[rbp], 0
	jne	.L136
	lea	rdx, .LC18[rip]
	lea	rsi, .LC19[rip]
	mov	edi, 154
	mov	eax, 0
	call	sim_log_debug
	movzx	eax, WORD PTR TOS_NODE_ID[rip]
	cmp	ax, 1
	jne	.L138
	mov	edi, 1000
	call	sendAckC$MilliTimer$startPeriodic
	jmp	.L138
.L136:
	lea	rdx, .LC20[rip]
	lea	rsi, .LC21[rip]
	mov	edi, 155
	mov	eax, 0
	call	sim_log_error
	call	sendAckC$SplitControl$start
.L138:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE60:
	.size	sendAckC$SplitControl$startDone, .-sendAckC$SplitControl$startDone
	.type	TossimPacketModelC$Control$startDone, @function
TossimPacketModelC$Control$startDone:
.LFB61:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	mov	edi, eax
	call	sendAckC$SplitControl$startDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE61:
	.size	TossimPacketModelC$Control$startDone, .-TossimPacketModelC$Control$startDone
	.type	TossimPacketModelC$startDoneTask$runTask, @function
TossimPacketModelC$startDoneTask$runTask:
.LFB62:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	edi, 0
	call	TossimPacketModelC$Control$startDone
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE62:
	.size	TossimPacketModelC$startDoneTask$runTask, .-TossimPacketModelC$startDoneTask$runTask
	.type	sendAckC$SplitControl$stopDone, @function
sendAckC$SplitControl$stopDone:
.LFB63:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE63:
	.size	sendAckC$SplitControl$stopDone, .-sendAckC$SplitControl$stopDone
	.type	TossimPacketModelC$Control$stopDone, @function
TossimPacketModelC$Control$stopDone:
.LFB64:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	mov	edi, eax
	call	sendAckC$SplitControl$stopDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE64:
	.size	TossimPacketModelC$Control$stopDone, .-TossimPacketModelC$Control$stopDone
	.type	TossimPacketModelC$stopDoneTask$runTask, @function
TossimPacketModelC$stopDoneTask$runTask:
.LFB65:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	edi, 0
	call	TossimPacketModelC$Control$stopDone
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE65:
	.size	TossimPacketModelC$stopDoneTask$runTask, .-TossimPacketModelC$stopDoneTask$runTask
	.type	__nesc_hton_uint16, @function
__nesc_hton_uint16:
.LFB66:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -28[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	movzx	edx, WORD PTR -28[rbp]
	mov	BYTE PTR [rax], dl
	movzx	eax, WORD PTR -28[rbp]
	shr	ax, 8
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], dl
	movzx	eax, WORD PTR -28[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE66:
	.size	__nesc_hton_uint16, .-__nesc_hton_uint16
	.type	__nesc_hton_uint8, @function
__nesc_hton_uint8:
.LFB67:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -28[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, BYTE PTR -28[rbp]
	mov	BYTE PTR [rax], dl
	movzx	eax, BYTE PTR -28[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE67:
	.size	__nesc_hton_uint8, .-__nesc_hton_uint8
	.type	__nesc_hton_int8, @function
__nesc_hton_int8:
.LFB68:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	movzx	eax, BYTE PTR -12[rbp]
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	__nesc_hton_uint8
	movzx	eax, BYTE PTR -12[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE68:
	.size	__nesc_hton_int8, .-__nesc_hton_int8
	.type	TossimActiveMessageC$AMSend$sendDone, @function
TossimActiveMessageC$AMSend$sendDone:
.LFB69:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	ecx, edi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	edx, BYTE PTR -8[rbp]
	movzx	eax, BYTE PTR -4[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	AMQueueImplP$0$AMSend$sendDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE69:
	.size	TossimActiveMessageC$AMSend$sendDone, .-TossimActiveMessageC$AMSend$sendDone
	.type	TossimActiveMessageC$Model$sendDone, @function
TossimActiveMessageC$Model$sendDone:
.LFB70:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -28[rbp], al
	movzx	ebx, BYTE PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$type
	movzx	eax, al
	mov	rcx, QWORD PTR -24[rbp]
	mov	edx, ebx
	mov	rsi, rcx
	mov	edi, eax
	call	TossimActiveMessageC$AMSend$sendDone
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE70:
	.size	TossimActiveMessageC$Model$sendDone, .-TossimActiveMessageC$Model$sendDone
	.type	TossimPacketModelC$Packet$sendDone, @function
TossimPacketModelC$Packet$sendDone:
.LFB71:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	movzx	edx, BYTE PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	TossimActiveMessageC$Model$sendDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE71:
	.size	TossimPacketModelC$Packet$sendDone, .-TossimPacketModelC$Packet$sendDone
	.type	TossimPacketModelC$getMetadata, @function
TossimPacketModelC$getMetadata:
.LFB72:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 37
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE72:
	.size	TossimPacketModelC$getMetadata, .-TossimPacketModelC$getMetadata
	.type	TossimPacketModelC$sendDoneTask$runTask, @function
TossimPacketModelC$sendDoneTask$runTask:
.LFB73:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$getMetadata
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	esi, 0
	mov	rdi, rax
	call	__nesc_hton_uint8
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, 0
	mov	rdi, rax
	call	__nesc_hton_int8
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 2
	mov	esi, 0
	mov	rdi, rax
	call	__nesc_hton_uint16
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L156
	mov	edx, 0
	jmp	.L157
.L156:
	mov	edx, 4
.L157:
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	TossimPacketModelC$Packet$sendDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE73:
	.size	TossimPacketModelC$sendDoneTask$runTask, .-TossimPacketModelC$sendDoneTask$runTask
	.type	AMQueueEntryP$0$AMSend$sendDone, @function
AMQueueEntryP$0$AMSend$sendDone:
.LFB74:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	movzx	edx, BYTE PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	sendAckC$AMSend$sendDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE74:
	.size	AMQueueEntryP$0$AMSend$sendDone, .-AMQueueEntryP$0$AMSend$sendDone
	.type	AMQueueEntryP$0$Send$sendDone, @function
AMQueueEntryP$0$Send$sendDone:
.LFB75:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	movzx	edx, BYTE PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	AMQueueEntryP$0$AMSend$sendDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE75:
	.size	AMQueueEntryP$0$Send$sendDone, .-AMQueueEntryP$0$Send$sendDone
	.type	AMQueueImplP$0$Send$default$sendDone, @function
AMQueueImplP$0$Send$default$sendDone:
.LFB76:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	ecx, edi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE76:
	.size	AMQueueImplP$0$Send$default$sendDone, .-AMQueueImplP$0$Send$default$sendDone
	.type	AMQueueImplP$0$Send$sendDone, @function
AMQueueImplP$0$Send$sendDone:
.LFB77:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	ecx, edi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	test	eax, eax
	jne	.L162
	movzx	edx, BYTE PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	AMQueueEntryP$0$Send$sendDone
	jmp	.L163
.L162:
	movzx	edx, BYTE PTR -8[rbp]
	movzx	eax, BYTE PTR -4[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	AMQueueImplP$0$Send$default$sendDone
	nop
.L163:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE77:
	.size	AMQueueImplP$0$Send$sendDone, .-AMQueueImplP$0$Send$sendDone
	.type	AMQueueImplP$0$sendDone, @function
AMQueueImplP$0$sendDone:
.LFB78:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	ecx, edi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -4[rbp]
	cdqe
	add	rax, rdx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	QWORD PTR [rdx+rax], 0
	call	AMQueueImplP$0$tryToSend
	movzx	edx, BYTE PTR -8[rbp]
	movzx	eax, BYTE PTR -4[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	AMQueueImplP$0$Send$sendDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE78:
	.size	AMQueueImplP$0$sendDone, .-AMQueueImplP$0$sendDone
	.type	AMQueueImplP$0$errorTask$runTask, @function
AMQueueImplP$0$errorTask$runTask:
.LFB79:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	cdqe
	add	rax, rbx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	rbx, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	edx, 1
	mov	rsi, rbx
	mov	edi, eax
	call	AMQueueImplP$0$sendDone
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE79:
	.size	AMQueueImplP$0$errorTask$runTask, .-AMQueueImplP$0$errorTask$runTask
	.type	AMQueueImplP$0$CancelTask$runTask, @function
AMQueueImplP$0$CancelTask$runTask:
.LFB80:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	BYTE PTR -12[rbp], 0
	jmp	.L167
.L172:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -12[rbp]
	cdqe
	add	rdx, rax
	lea	rax, AMQueueImplP$0$cancelMask[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	test	al, al
	je	.L168
	mov	BYTE PTR -10[rbp], 1
	mov	BYTE PTR -11[rbp], 0
	jmp	.L169
.L171:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -12[rbp]
	cdqe
	add	rdx, rax
	lea	rax, AMQueueImplP$0$cancelMask[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	and	al, BYTE PTR -10[rbp]
	test	al, al
	je	.L170
	movzx	eax, BYTE PTR -12[rbp]
	lea	edx, 0[0+rax*8]
	movzx	eax, BYTE PTR -11[rbp]
	add	eax, edx
	mov	BYTE PTR -9[rbp], al
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -9[rbp]
	cdqe
	add	rax, rdx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -8[rbp], rax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -9[rbp]
	cdqe
	add	rax, rdx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -12[rbp]
	cdqe
	lea	rcx, [rdx+rax]
	lea	rax, AMQueueImplP$0$cancelMask[rip]
	add	rax, rcx
	movzx	eax, BYTE PTR [rax]
	mov	ecx, eax
	movzx	eax, BYTE PTR -10[rbp]
	not	eax
	and	ecx, eax
	movzx	eax, BYTE PTR -12[rbp]
	cdqe
	add	rdx, rax
	lea	rax, AMQueueImplP$0$cancelMask[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
	movzx	eax, BYTE PTR -9[rbp]
	mov	rcx, QWORD PTR -8[rbp]
	mov	edx, 3
	mov	rsi, rcx
	mov	edi, eax
	call	AMQueueImplP$0$Send$sendDone
.L170:
	sal	BYTE PTR -10[rbp]
	movzx	eax, BYTE PTR -11[rbp]
	add	eax, 1
	mov	BYTE PTR -11[rbp], al
.L169:
	cmp	BYTE PTR -11[rbp], 7
	jbe	.L171
.L168:
	movzx	eax, BYTE PTR -12[rbp]
	add	eax, 1
	mov	BYTE PTR -12[rbp], al
.L167:
	cmp	BYTE PTR -12[rbp], 0
	je	.L172
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE80:
	.size	AMQueueImplP$0$CancelTask$runTask, .-AMQueueImplP$0$CancelTask$runTask
	.type	VirtualizeTimerC$0$TimerFrom$fired, @function
VirtualizeTimerC$0$TimerFrom$fired:
.LFB81:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	VirtualizeTimerC$0$TimerFrom$getNow
	mov	edi, eax
	call	VirtualizeTimerC$0$fireTimers
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE81:
	.size	VirtualizeTimerC$0$TimerFrom$fired, .-VirtualizeTimerC$0$TimerFrom$fired
	.type	AlarmToTimerC$0$Timer$fired, @function
AlarmToTimerC$0$Timer$fired:
.LFB82:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	VirtualizeTimerC$0$TimerFrom$fired
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE82:
	.size	AlarmToTimerC$0$Timer$fired, .-AlarmToTimerC$0$Timer$fired
	.type	Atm128AlarmAsyncP$0$Alarm$getAlarm, @function
Atm128AlarmAsyncP$0$Alarm$getAlarm:
.LFB83:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -21[rbp], al
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$t0[rip]
	mov	ebx, DWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$dt[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, ebx
	mov	DWORD PTR -20[rbp], eax
	movzx	eax, BYTE PTR -21[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	mov	eax, DWORD PTR -20[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE83:
	.size	Atm128AlarmAsyncP$0$Alarm$getAlarm, .-Atm128AlarmAsyncP$0$Alarm$getAlarm
	.type	AlarmToTimerC$0$Alarm$getAlarm, @function
AlarmToTimerC$0$Alarm$getAlarm:
.LFB84:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	Atm128AlarmAsyncP$0$Alarm$getAlarm
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE84:
	.size	AlarmToTimerC$0$Alarm$getAlarm, .-AlarmToTimerC$0$Alarm$getAlarm
	.type	AlarmToTimerC$0$Alarm$startAt, @function
AlarmToTimerC$0$Alarm$startAt:
.LFB85:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	call	Atm128AlarmAsyncP$0$Alarm$startAt
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE85:
	.size	AlarmToTimerC$0$Alarm$startAt, .-AlarmToTimerC$0$Alarm$startAt
	.type	AlarmToTimerC$0$start, @function
AlarmToTimerC$0$start:
.LFB86:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	eax, edx
	mov	BYTE PTR -12[rbp], al
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*4]
	lea	rdx, AlarmToTimerC$0$m_dt[rip]
	mov	eax, DWORD PTR -8[rbp]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, 0
	call	sim_node
	lea	rcx, AlarmToTimerC$0$m_oneshot[rip]
	movzx	edx, BYTE PTR -12[rbp]
	mov	BYTE PTR [rax+rcx], dl
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	call	AlarmToTimerC$0$Alarm$startAt
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE86:
	.size	AlarmToTimerC$0$start, .-AlarmToTimerC$0$start
	.type	AlarmToTimerC$0$fired$runTask, @function
AlarmToTimerC$0$fired$runTask:
.LFB87:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_node
	lea	rdx, AlarmToTimerC$0$m_oneshot[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L182
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, AlarmToTimerC$0$m_dt[rip]
	mov	ebx, DWORD PTR [rdx+rax]
	call	AlarmToTimerC$0$Alarm$getAlarm
	mov	edx, 0
	mov	esi, ebx
	mov	edi, eax
	call	AlarmToTimerC$0$start
.L182:
	call	AlarmToTimerC$0$Timer$fired
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE87:
	.size	AlarmToTimerC$0$fired$runTask, .-AlarmToTimerC$0$fired$runTask
	.type	AlarmToTimerC$0$Timer$startOneShotAt, @function
AlarmToTimerC$0$Timer$startOneShotAt:
.LFB88:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	ecx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	edx, 1
	mov	esi, ecx
	mov	edi, eax
	call	AlarmToTimerC$0$start
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE88:
	.size	AlarmToTimerC$0$Timer$startOneShotAt, .-AlarmToTimerC$0$Timer$startOneShotAt
	.type	VirtualizeTimerC$0$TimerFrom$startOneShotAt, @function
VirtualizeTimerC$0$TimerFrom$startOneShotAt:
.LFB89:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	DWORD PTR -8[rbp], esi
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	call	AlarmToTimerC$0$Timer$startOneShotAt
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE89:
	.size	VirtualizeTimerC$0$TimerFrom$startOneShotAt, .-VirtualizeTimerC$0$TimerFrom$startOneShotAt
	.type	Atm128AlarmAsyncP$0$Alarm$stop, @function
Atm128AlarmAsyncP$0$Alarm$stop:
.LFB90:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -1[rbp], al
	mov	eax, 0
	call	sim_node
	lea	rdx, Atm128AlarmAsyncP$0$set[rip]
	mov	BYTE PTR [rax+rdx], 0
	movzx	eax, BYTE PTR -1[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE90:
	.size	Atm128AlarmAsyncP$0$Alarm$stop, .-Atm128AlarmAsyncP$0$Alarm$stop
	.type	AlarmToTimerC$0$Alarm$stop, @function
AlarmToTimerC$0$Alarm$stop:
.LFB91:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	Atm128AlarmAsyncP$0$Alarm$stop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE91:
	.size	AlarmToTimerC$0$Alarm$stop, .-AlarmToTimerC$0$Alarm$stop
	.type	AlarmToTimerC$0$Timer$stop, @function
AlarmToTimerC$0$Timer$stop:
.LFB92:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	AlarmToTimerC$0$Alarm$stop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE92:
	.size	AlarmToTimerC$0$Timer$stop, .-AlarmToTimerC$0$Timer$stop
	.type	VirtualizeTimerC$0$TimerFrom$stop, @function
VirtualizeTimerC$0$TimerFrom$stop:
.LFB93:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	AlarmToTimerC$0$Timer$stop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE93:
	.size	VirtualizeTimerC$0$TimerFrom$stop, .-VirtualizeTimerC$0$TimerFrom$stop
	.type	VirtualizeTimerC$0$updateFromTimer$runTask, @function
VirtualizeTimerC$0$updateFromTimer$runTask:
.LFB94:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	call	VirtualizeTimerC$0$TimerFrom$getNow
	mov	DWORD PTR -20[rbp], eax
	mov	DWORD PTR -24[rbp], 2147483647
	mov	BYTE PTR -27[rbp], 0
	call	VirtualizeTimerC$0$TimerFrom$stop
	mov	WORD PTR -26[rbp], 0
	jmp	.L190
.L192:
	mov	eax, 0
	call	sim_node
	mov	rcx, rax
	movzx	eax, WORD PTR -26[rbp]
	cdqe
	mov	rdx, rax
	add	rdx, rdx
	add	rdx, rax
	lea	rax, 0[0+rdx*4]
	mov	rdx, rax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 3
	add	rdx, rax
	lea	rax, VirtualizeTimerC$0$m_timers[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR 8[rax]
	and	eax, 2
	test	al, al
	je	.L191
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, edx
	mov	DWORD PTR -16[rbp], eax
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	sub	eax, DWORD PTR -16[rbp]
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	cmp	eax, DWORD PTR -24[rbp]
	jge	.L191
	mov	eax, DWORD PTR -12[rbp]
	mov	DWORD PTR -24[rbp], eax
	mov	BYTE PTR -27[rbp], 1
.L191:
	movzx	eax, WORD PTR -26[rbp]
	add	eax, 1
	mov	WORD PTR -26[rbp], ax
.L190:
	cmp	WORD PTR -26[rbp], 1
	jbe	.L192
	cmp	BYTE PTR -27[rbp], 0
	je	.L195
	cmp	DWORD PTR -24[rbp], 0
	jg	.L194
	mov	eax, DWORD PTR -20[rbp]
	mov	edi, eax
	call	VirtualizeTimerC$0$fireTimers
	jmp	.L195
.L194:
	mov	edx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	call	VirtualizeTimerC$0$TimerFrom$startOneShotAt
.L195:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE94:
	.size	VirtualizeTimerC$0$updateFromTimer$runTask, .-VirtualizeTimerC$0$updateFromTimer$runTask
	.type	SimSchedulerBasicP$TaskBasic$default$runTask, @function
SimSchedulerBasicP$TaskBasic$default$runTask:
.LFB95:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE95:
	.size	SimSchedulerBasicP$TaskBasic$default$runTask, .-SimSchedulerBasicP$TaskBasic$default$runTask
	.type	SimSchedulerBasicP$TaskBasic$runTask, @function
SimSchedulerBasicP$TaskBasic$runTask:
.LFB96:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	cmp	eax, 6
	ja	.L198
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, .L200[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L200[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L200:
	.long	.L206-.L200
	.long	.L205-.L200
	.long	.L204-.L200
	.long	.L203-.L200
	.long	.L202-.L200
	.long	.L201-.L200
	.long	.L199-.L200
	.text
.L206:
	call	TossimPacketModelC$startDoneTask$runTask
	jmp	.L207
.L205:
	call	TossimPacketModelC$stopDoneTask$runTask
	jmp	.L207
.L204:
	call	TossimPacketModelC$sendDoneTask$runTask
	jmp	.L207
.L203:
	call	AMQueueImplP$0$CancelTask$runTask
	jmp	.L207
.L202:
	call	AMQueueImplP$0$errorTask$runTask
	jmp	.L207
.L201:
	call	AlarmToTimerC$0$fired$runTask
	jmp	.L207
.L199:
	call	VirtualizeTimerC$0$updateFromTimer$runTask
	jmp	.L207
.L198:
	movzx	eax, BYTE PTR -4[rbp]
	mov	edi, eax
	call	SimSchedulerBasicP$TaskBasic$default$runTask
	nop
.L207:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE96:
	.size	SimSchedulerBasicP$TaskBasic$runTask, .-SimSchedulerBasicP$TaskBasic$runTask
	.type	sendAckC$AMSend$send, @function
sendAckC$AMSend$send:
.LFB97:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, edi
	mov	QWORD PTR -32[rbp], rsi
	mov	WORD PTR -20[rbp], ax
	mov	eax, edx
	mov	BYTE PTR -24[rbp], al
	movzx	edx, BYTE PTR -24[rbp]
	movzx	eax, WORD PTR -20[rbp]
	mov	rcx, QWORD PTR -32[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	AMQueueEntryP$0$AMSend$send
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE97:
	.size	sendAckC$AMSend$send, .-sendAckC$AMSend$send
	.type	TossimPacketModelC$PacketAcknowledgements$requestAck, @function
TossimPacketModelC$PacketAcknowledgements$requestAck:
.LFB98:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$getMetadata
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	esi, 1
	mov	rdi, rax
	call	__nesc_hton_uint8
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE98:
	.size	TossimPacketModelC$PacketAcknowledgements$requestAck, .-TossimPacketModelC$PacketAcknowledgements$requestAck
	.type	sendAckC$ack$requestAck, @function
sendAckC$ack$requestAck:
.LFB99:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$PacketAcknowledgements$requestAck
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE99:
	.size	sendAckC$ack$requestAck, .-sendAckC$ack$requestAck
	.type	TossimActiveMessageC$Packet$getPayload, @function
TossimActiveMessageC$Packet$getPayload:
.LFB100:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	cmp	BYTE PTR -12[rbp], 28
	ja	.L215
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 7
	jmp	.L216
.L215:
	mov	eax, 0
.L216:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE100:
	.size	TossimActiveMessageC$Packet$getPayload, .-TossimActiveMessageC$Packet$getPayload
	.type	sendAckC$Packet$getPayload, @function
sendAckC$Packet$getPayload:
.LFB101:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -28[rbp], al
	movzx	edx, BYTE PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	TossimActiveMessageC$Packet$getPayload
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE101:
	.size	sendAckC$Packet$getPayload, .-sendAckC$Packet$getPayload
	.section	.rodata
.LC22:
	.string	"Preparing the message... \n"
.LC23:
	.string	"packet n. %u\n"
.LC24:
	.string	"counter"
	.align 8
.LC25:
	.string	"Packet passed to lower layer successfully!\n"
.LC26:
	.string	"radio_send"
.LC27:
	.string	"\t Payload Sent\n"
	.text
	.type	sendAckC$sendReq, @function
sendAckC$sendReq:
.LFB102:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	esi, 5
	mov	rdi, rax
	call	sendAckC$Packet$getPayload
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	je	.L222
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, 1
	mov	rdi, rax
	call	__nesc_hton_uint8
	mov	eax, 0
	call	sim_node
	lea	rdx, sendAckC$counter[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	lea	ecx, 1[rdx]
	lea	rdx, sendAckC$counter[rip]
	mov	BYTE PTR [rax+rdx], cl
	lea	rdx, sendAckC$counter[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 3
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint16
	lea	rdx, .LC22[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 148
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 3
	mov	rdi, rax
	call	__nesc_ntoh_uint16
	movzx	eax, ax
	mov	ecx, eax
	lea	rdx, .LC23[rip]
	lea	rsi, .LC24[rip]
	mov	edi, 149
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	rdi, rax
	call	sendAckC$ack$requestAck
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	edx, 5
	mov	rsi, rax
	mov	edi, 2
	call	sendAckC$AMSend$send
	test	al, al
	jne	.L219
	lea	rdx, .LC25[rip]
	lea	rsi, .LC26[rip]
	mov	edi, 150
	mov	eax, 0
	call	sim_log_debug
	lea	rdx, .LC27[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 151
	mov	eax, 0
	call	sim_log_debug_clear
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	movzx	eax, al
	mov	ecx, eax
	lea	rdx, .LC14[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 152
	mov	eax, 0
	call	sim_log_debug_clear
	jmp	.L219
.L222:
	nop
.L219:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE102:
	.size	sendAckC$sendReq, .-sendAckC$sendReq
	.type	sendAckC$MilliTimer$fired, @function
sendAckC$MilliTimer$fired:
.LFB103:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	sendAckC$sendReq
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE103:
	.size	sendAckC$MilliTimer$fired, .-sendAckC$MilliTimer$fired
	.type	RandomMlcgC$Random$rand16, @function
RandomMlcgC$Random$rand16:
.LFB104:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	RandomMlcgC$Random$rand32
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE104:
	.size	RandomMlcgC$Random$rand16, .-RandomMlcgC$Random$rand16
	.type	FakeSensorP$0$Random$rand16, @function
FakeSensorP$0$Random$rand16:
.LFB105:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	RandomMlcgC$Random$rand16
	mov	WORD PTR -2[rbp], ax
	movzx	eax, WORD PTR -2[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE105:
	.size	FakeSensorP$0$Random$rand16, .-FakeSensorP$0$Random$rand16
	.section	.rodata
.LC28:
	.string	"Measurement READ OK\n"
.LC29:
	.string	"read"
	.text
	.type	sendAckC$Read$readDone, @function
sendAckC$Read$readDone:
.LFB106:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -20[rbp], dl
	mov	WORD PTR -24[rbp], ax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	esi, 5
	mov	rdi, rax
	call	sendAckC$Packet$getPayload
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, 2
	mov	rdi, rax
	call	__nesc_hton_uint8
	mov	eax, 0
	call	sim_node
	lea	rdx, sendAckC$counter[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 3
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint16
	movzx	eax, WORD PTR -24[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 1
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint16
	lea	rdx, .LC28[rip]
	lea	rsi, .LC29[rip]
	mov	edi, 167
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	rdi, rax
	call	sendAckC$ack$requestAck
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	edx, 5
	mov	rsi, rax
	mov	edi, 1
	call	sendAckC$AMSend$send
	test	al, al
	jne	.L230
	lea	rdx, .LC25[rip]
	lea	rsi, .LC26[rip]
	mov	edi, 168
	mov	eax, 0
	call	sim_log_debug
	lea	rdx, .LC27[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 169
	mov	eax, 0
	call	sim_log_debug_clear
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	movzx	eax, al
	mov	ecx, eax
	lea	rdx, .LC14[rip]
	lea	rsi, .LC12[rip]
	mov	edi, 170
	mov	eax, 0
	call	sim_log_debug_clear
.L230:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE106:
	.size	sendAckC$Read$readDone, .-sendAckC$Read$readDone
	.type	FakeSensorP$0$Read$readDone, @function
FakeSensorP$0$Read$readDone:
.LFB107:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	WORD PTR -8[rbp], ax
	movzx	edx, WORD PTR -8[rbp]
	movzx	eax, BYTE PTR -4[rbp]
	mov	esi, edx
	mov	edi, eax
	call	sendAckC$Read$readDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE107:
	.size	FakeSensorP$0$Read$readDone, .-FakeSensorP$0$Read$readDone
	.type	FakeSensorP$0$Timer0$fired, @function
FakeSensorP$0$Timer0$fired:
.LFB108:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	FakeSensorP$0$Random$rand16
	movzx	eax, ax
	mov	esi, eax
	mov	edi, 0
	call	FakeSensorP$0$Read$readDone
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE108:
	.size	FakeSensorP$0$Timer0$fired, .-FakeSensorP$0$Timer0$fired
	.type	VirtualizeTimerC$0$Timer$default$fired, @function
VirtualizeTimerC$0$Timer$default$fired:
.LFB109:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE109:
	.size	VirtualizeTimerC$0$Timer$default$fired, .-VirtualizeTimerC$0$Timer$default$fired
	.type	VirtualizeTimerC$0$Timer$fired, @function
VirtualizeTimerC$0$Timer$fired:
.LFB110:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	test	eax, eax
	je	.L235
	cmp	eax, 1
	je	.L236
	jmp	.L239
.L235:
	call	sendAckC$MilliTimer$fired
	jmp	.L238
.L236:
	call	FakeSensorP$0$Timer0$fired
	jmp	.L238
.L239:
	movzx	eax, BYTE PTR -4[rbp]
	mov	edi, eax
	call	VirtualizeTimerC$0$Timer$default$fired
	nop
.L238:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE110:
	.size	VirtualizeTimerC$0$Timer$fired, .-VirtualizeTimerC$0$Timer$fired
	.type	TossimActiveMessageC$getHeader, @function
TossimActiveMessageC$getHeader:
.LFB111:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 7
	sub	rax, 7
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE111:
	.size	TossimActiveMessageC$getHeader, .-TossimActiveMessageC$getHeader
	.type	TossimActiveMessageC$AMPacket$setDestination, @function
TossimActiveMessageC$AMPacket$setDestination:
.LFB112:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -28[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	mov	QWORD PTR -8[rbp], rax
	movzx	edx, WORD PTR -28[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	__nesc_hton_uint16
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE112:
	.size	TossimActiveMessageC$AMPacket$setDestination, .-TossimActiveMessageC$AMPacket$setDestination
	.type	AMQueueEntryP$0$AMPacket$setDestination, @function
AMQueueEntryP$0$AMPacket$setDestination:
.LFB113:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -12[rbp], ax
	movzx	edx, WORD PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$setDestination
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE113:
	.size	AMQueueEntryP$0$AMPacket$setDestination, .-AMQueueEntryP$0$AMPacket$setDestination
	.type	TossimActiveMessageC$AMPacket$setType, @function
TossimActiveMessageC$AMPacket$setType:
.LFB114:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -28[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, BYTE PTR -28[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 6
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint8
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE114:
	.size	TossimActiveMessageC$AMPacket$setType, .-TossimActiveMessageC$AMPacket$setType
	.type	AMQueueEntryP$0$AMPacket$setType, @function
AMQueueEntryP$0$AMPacket$setType:
.LFB115:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	movzx	edx, BYTE PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$setType
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE115:
	.size	AMQueueEntryP$0$AMPacket$setType, .-AMQueueEntryP$0$AMPacket$setType
	.type	AMQueueImplP$0$AMSend$send, @function
AMQueueImplP$0$AMSend$send:
.LFB116:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	eax, esi
	mov	QWORD PTR -32[rbp], rdx
	mov	edx, ecx
	mov	ecx, edi
	mov	BYTE PTR -20[rbp], cl
	mov	WORD PTR -24[rbp], ax
	mov	eax, edx
	mov	BYTE PTR -36[rbp], al
	movzx	ecx, BYTE PTR -36[rbp]
	movzx	esi, WORD PTR -24[rbp]
	movzx	eax, BYTE PTR -20[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	edi, eax
	call	TossimActiveMessageC$AMSend$send
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE116:
	.size	AMQueueImplP$0$AMSend$send, .-AMQueueImplP$0$AMSend$send
	.type	AMQueueImplP$0$AMPacket$destination, @function
AMQueueImplP$0$AMPacket$destination:
.LFB117:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$destination
	mov	WORD PTR -2[rbp], ax
	movzx	eax, WORD PTR -2[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE117:
	.size	AMQueueImplP$0$AMPacket$destination, .-AMQueueImplP$0$AMPacket$destination
	.type	AMQueueImplP$0$AMPacket$type, @function
AMQueueImplP$0$AMPacket$type:
.LFB118:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$type
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE118:
	.size	AMQueueImplP$0$AMPacket$type, .-AMQueueImplP$0$AMPacket$type
	.type	TossimActiveMessageC$Packet$setPayloadLength, @function
TossimActiveMessageC$Packet$setPayloadLength:
.LFB119:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 16
	.cfi_offset 3, -24
	mov	QWORD PTR -16[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -20[rbp], al
	movzx	ebx, BYTE PTR -20[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	add	rax, 4
	mov	esi, ebx
	mov	rdi, rax
	call	__nesc_hton_uint8
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE119:
	.size	TossimActiveMessageC$Packet$setPayloadLength, .-TossimActiveMessageC$Packet$setPayloadLength
	.type	AMQueueImplP$0$Packet$setPayloadLength, @function
AMQueueImplP$0$Packet$setPayloadLength:
.LFB120:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	movzx	edx, BYTE PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	TossimActiveMessageC$Packet$setPayloadLength
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE120:
	.size	AMQueueImplP$0$Packet$setPayloadLength, .-AMQueueImplP$0$Packet$setPayloadLength
	.section	.rodata
	.align 8
.LC30:
	.string	"AMQueue: request to send from %hhu (%p): passed checks\n"
.LC31:
	.string	"AMQueue"
	.align 8
.LC32:
	.string	"%s: request to send from %hhu (%p): queue empty\n"
.LC33:
	.string	"%s: underlying send failed.\n"
	.align 8
.LC34:
	.string	"AMQueue: request to send from %hhu (%p): queue not empty\n"
	.text
	.type	AMQueueImplP$0$Send$send, @function
AMQueueImplP$0$Send$send:
.LFB121:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	ecx, edi
	mov	QWORD PTR -32[rbp], rsi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -20[rbp], dl
	mov	BYTE PTR -24[rbp], al
	cmp	BYTE PTR -20[rbp], 0
	je	.L255
	mov	eax, 1
	jmp	.L256
.L255:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -20[rbp]
	cdqe
	add	rax, rdx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L257
	mov	eax, 5
	jmp	.L256
.L257:
	movzx	eax, BYTE PTR -20[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC30[rip]
	lea	rsi, .LC31[rip]
	mov	edi, 171
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -20[rbp]
	cdqe
	add	rax, rdx
	lea	rcx, 0[0+rax*8]
	lea	rdx, AMQueueImplP$0$queue[rip]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	movzx	edx, BYTE PTR -24[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	AMQueueImplP$0$Packet$setPayloadLength
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L258
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	AMQueueImplP$0$AMPacket$type
	mov	BYTE PTR -4[rbp], al
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	AMQueueImplP$0$AMPacket$destination
	mov	WORD PTR -2[rbp], ax
	movzx	eax, BYTE PTR -20[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	r9, rdx
	mov	r8d, eax
	lea	rcx, __FUNCTION__.2[rip]
	lea	rdx, .LC32[rip]
	lea	rsi, .LC31[rip]
	mov	edi, 172
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rcx, AMQueueImplP$0$current[rip]
	movzx	edx, BYTE PTR -20[rbp]
	mov	BYTE PTR [rax+rcx], dl
	movzx	ecx, BYTE PTR -24[rbp]
	movzx	esi, WORD PTR -2[rbp]
	movzx	eax, BYTE PTR -4[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	edi, eax
	call	AMQueueImplP$0$AMSend$send
	mov	BYTE PTR -3[rbp], al
	cmp	BYTE PTR -3[rbp], 0
	je	.L259
	lea	rcx, __FUNCTION__.2[rip]
	lea	rdx, .LC33[rip]
	lea	rsi, .LC31[rip]
	mov	edi, 173
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -20[rbp]
	cdqe
	add	rax, rdx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	QWORD PTR [rdx+rax], 0
.L259:
	movzx	eax, BYTE PTR -3[rbp]
	jmp	.L256
.L258:
	movzx	eax, BYTE PTR -20[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC34[rip]
	lea	rsi, .LC31[rip]
	mov	edi, 174
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
.L256:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE121:
	.size	AMQueueImplP$0$Send$send, .-AMQueueImplP$0$Send$send
	.type	AMQueueEntryP$0$Send$send, @function
AMQueueEntryP$0$Send$send:
.LFB122:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -28[rbp], al
	movzx	edx, BYTE PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rax
	mov	edi, 0
	call	AMQueueImplP$0$Send$send
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE122:
	.size	AMQueueEntryP$0$Send$send, .-AMQueueEntryP$0$Send$send
	.type	CpmModelC$free_receive_message, @function
CpmModelC$free_receive_message:
.LFB123:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE123:
	.size	CpmModelC$free_receive_message, .-CpmModelC$free_receive_message
	.type	CpmModelC$Model$shouldAck, @function
CpmModelC$Model$shouldAck:
.LFB124:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$GainRadioModel$shouldAck
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE124:
	.size	CpmModelC$Model$shouldAck, .-CpmModelC$Model$shouldAck
	.type	TossimPacketModelC$Packet$receive, @function
TossimPacketModelC$Packet$receive:
.LFB125:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$Model$receive
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE125:
	.size	TossimPacketModelC$Packet$receive, .-TossimPacketModelC$Packet$receive
	.type	TossimPacketModelC$GainRadioModel$receive, @function
TossimPacketModelC$GainRadioModel$receive:
.LFB126:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L268
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$transmitting[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L268
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$Packet$receive
.L268:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE126:
	.size	TossimPacketModelC$GainRadioModel$receive, .-TossimPacketModelC$GainRadioModel$receive
	.type	CpmModelC$Model$receive, @function
CpmModelC$Model$receive:
.LFB127:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$GainRadioModel$receive
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE127:
	.size	CpmModelC$Model$receive, .-CpmModelC$Model$receive
	.type	CpmModelC$checkReceive, @function
CpmModelC$checkReceive:
.LFB128:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	call	CpmModelC$noise_hash_generation
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -8[rbp], rax
	movsd	xmm0, QWORD PTR -16[rbp]
	movsd	xmm1, QWORD PTR .LC35[rip]
	divsd	xmm0, xmm1
	mov	rax, QWORD PTR .LC35[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	jmp	.L271
.L273:
	mov	rax, QWORD PTR -8[rbp]
	cmp	rax, QWORD PTR -24[rbp]
	je	.L272
	mov	rax, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR 24[rax]
	movsd	xmm1, QWORD PTR .LC35[rip]
	divsd	xmm0, xmm1
	mov	rax, QWORD PTR .LC35[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movsd	xmm1, QWORD PTR -16[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
.L272:
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 56[rax]
	mov	QWORD PTR -8[rbp], rax
.L271:
	cmp	QWORD PTR -8[rbp], 0
	jne	.L273
	mov	rax, QWORD PTR -16[rbp]
	movq	xmm0, rax
	call	log@PLT
	movsd	xmm1, QWORD PTR .LC35[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC36[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	mov	rax, QWORD PTR -24[rbp]
	movsd	xmm0, QWORD PTR 24[rax]
	subsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	call	CpmModelC$shouldReceive
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE128:
	.size	CpmModelC$checkReceive, .-CpmModelC$checkReceive
	.section	.rodata
	.align 8
.LC37:
	.string	"Handling reception event @ %s.\n"
.LC38:
	.string	"CpmModelC"
	.align 8
.LC39:
	.string	"Incoming packet list structure is corrupted: entry is not the head and no entry points to it.\n"
.LC40:
	.string	"Packet from %i to %i\n"
.LC41:
	.string	"CpmModelC,SNRLoss"
	.align 8
.LC42:
	.string	" - lost packet from %i as SNR was too low.\n"
.LC43:
	.string	"  -signaling reception\n"
.LC44:
	.string	" acknowledgment requested, "
	.align 8
.LC45:
	.string	" no acknowledgment requested.\n"
.LC46:
	.string	" scheduling ack.\n"
	.align 8
.LC48:
	.string	"Packet was technically lost, but TOSSIM introduces an ack false positive rate.\n"
.LC49:
	.string	"  -packet was lost.\n"
	.text
	.type	CpmModelC$sim_gain_receive_handle, @function
CpmModelC$sim_gain_receive_handle:
.LFB129:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR 24[rax]
	mov	QWORD PTR -16[rbp], rax
	mov	QWORD PTR -32[rbp], 0
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_time_string
	mov	rcx, rax
	lea	rdx, .LC37[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 128
	mov	eax, 0
	call	sim_log_debug
	jmp	.L276
.L278:
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 56[rax]
	cmp	QWORD PTR -16[rbp], rax
	jne	.L277
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -32[rbp], rax
.L277:
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 56[rax]
	mov	QWORD PTR -24[rbp], rax
.L276:
	cmp	QWORD PTR -24[rbp], 0
	jne	.L278
	cmp	QWORD PTR -32[rbp], 0
	je	.L279
	mov	rax, QWORD PTR -16[rbp]
	mov	rdx, QWORD PTR 56[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR 56[rax], rdx
	jmp	.L280
.L279:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	rax, QWORD PTR [rdx+rax]
	cmp	QWORD PTR -16[rbp], rax
	jne	.L281
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR 56[rax]
	lea	rcx, 0[0+rdx*8]
	lea	rdx, CpmModelC$outstandingReceptionHead[rip]
	mov	QWORD PTR [rcx+rdx], rax
	jmp	.L280
.L281:
	lea	rdx, .LC39[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 129
	mov	eax, 0
	call	sim_log_error
.L280:
	mov	eax, 0
	call	sim_node
	mov	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR [rax]
	mov	r8d, edx
	mov	ecx, eax
	lea	rdx, .LC40[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 130
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	CpmModelC$checkReceive
	test	al, al
	jne	.L282
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR [rax]
	mov	ecx, eax
	lea	rdx, .LC42[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 131
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -16[rbp]
	mov	BYTE PTR 41[rax], 1
.L282:
	mov	rax, QWORD PTR -16[rbp]
	movzx	eax, BYTE PTR 41[rax]
	test	al, al
	jne	.L283
	mov	rax, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR 48[rax]
	add	rax, 37
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	movzx	eax, BYTE PTR 40[rax]
	movsx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	__nesc_hton_int8
	lea	rdx, .LC43[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 132
	mov	eax, 0
	call	sim_log_debug_clear
	mov	rax, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR 48[rax]
	mov	rdi, rax
	call	CpmModelC$Model$receive
	mov	rax, QWORD PTR -16[rbp]
	movzx	eax, BYTE PTR 42[rax]
	test	al, al
	je	.L284
	lea	rdx, .LC44[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 133
	mov	eax, 0
	call	sim_log_debug_clear
	jmp	.L285
.L284:
	lea	rdx, .LC45[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 134
	mov	eax, 0
	call	sim_log_debug_clear
.L285:
	mov	rax, QWORD PTR -16[rbp]
	movzx	eax, BYTE PTR 42[rax]
	test	al, al
	je	.L286
	mov	rax, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR 48[rax]
	mov	rdi, rax
	call	CpmModelC$Model$shouldAck
	test	al, al
	je	.L286
	lea	rdx, .LC46[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 135
	mov	eax, 0
	call	sim_log_debug_clear
	mov	eax, 0
	call	sim_time
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR [rax]
	mov	rdx, QWORD PTR -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	CpmModelC$sim_gain_schedule_ack
	jmp	.L287
.L286:
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	CpmModelC$free_receive_message
.L287:
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$receiving[rip]
	mov	BYTE PTR [rax+rdx], 0
	jmp	.L296
.L283:
	call	RandomUniform
	movsd	xmm1, QWORD PTR .LC47[rip]
	comisd	xmm1, xmm0
	jbe	.L295
	lea	rdx, .LC48[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 136
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -16[rbp]
	movzx	eax, BYTE PTR 42[rax]
	test	al, al
	je	.L291
	mov	rax, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR 48[rax]
	mov	rdi, rax
	call	CpmModelC$Model$shouldAck
	test	al, al
	je	.L291
	lea	rdx, .LC46[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 137
	mov	eax, 0
	call	sim_log_debug_clear
	mov	eax, 0
	call	sim_time
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR [rax]
	mov	rdx, QWORD PTR -16[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	CpmModelC$sim_gain_schedule_ack
	jmp	.L293
.L291:
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	CpmModelC$free_receive_message
	jmp	.L293
.L295:
	mov	rax, QWORD PTR -16[rbp]
	mov	rdi, rax
	call	CpmModelC$free_receive_message
.L293:
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$receiving[rip]
	mov	BYTE PTR [rax+rdx], 0
	lea	rdx, .LC49[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 138
	mov	eax, 0
	call	sim_log_debug_clear
.L296:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE129:
	.size	CpmModelC$sim_gain_receive_handle, .-CpmModelC$sim_gain_receive_handle
	.type	CpmModelC$allocate_receive_event, @function
CpmModelC$allocate_receive_event:
.LFB130:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	edi, 48
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	eax, 0
	call	sim_node
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR 8[rdx], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, CpmModelC$sim_gain_receive_handle[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, sim_queue_cleanup_event[rip]
	mov	QWORD PTR 40[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 17[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 16[rax], 1
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	QWORD PTR 24[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE130:
	.size	CpmModelC$allocate_receive_event, .-CpmModelC$allocate_receive_event
	.type	CpmModelC$allocate_receive_message, @function
CpmModelC$allocate_receive_message:
.LFB131:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 64
	call	malloc@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE131:
	.size	CpmModelC$allocate_receive_message, .-CpmModelC$allocate_receive_message
	.section	.rodata
	.align 8
.LC50:
	.string	"Lost packet from %i due to %i being off\n"
	.align 8
.LC51:
	.string	"Lost packet from %i to %i due to SNR being too low (%i)\n"
	.align 8
.LC52:
	.string	"Lost packet from %i due to %i being mid-reception\n"
	.align 8
.LC53:
	.string	"Lost packet from %i due to %i being mid-transmission, transmissionEndTime %llu\n"
	.align 8
.LC54:
	.string	"Going to lose packet from %i with signal %lf as am receiving a packet from %i with signal %lf\n"
.LC55:
	.string	"Gain,SNRLoss"
	.text
	.type	CpmModelC$enqueue_receive_event, @function
CpmModelC$enqueue_receive_event:
.LFB132:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 88
	.cfi_offset 3, -24
	mov	DWORD PTR -52[rbp], edi
	mov	QWORD PTR -64[rbp], rsi
	mov	QWORD PTR -72[rbp], rdx
	mov	eax, ecx
	movsd	QWORD PTR -80[rbp], xmm0
	movsd	QWORD PTR -88[rbp], xmm1
	mov	BYTE PTR -56[rbp], al
	call	CpmModelC$allocate_receive_message
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	mov	rdi, rax
	call	CpmModelC$packetNoise
	movq	rax, xmm0
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR -52[rbp]
	mov	DWORD PTR [rax], edx
	mov	eax, 0
	call	sim_time
	mov	rdx, QWORD PTR -40[rbp]
	mov	QWORD PTR 8[rdx], rax
	mov	rax, QWORD PTR -40[rbp]
	mov	rdx, QWORD PTR -64[rbp]
	mov	QWORD PTR 16[rax], rdx
	mov	rax, QWORD PTR -40[rbp]
	movsd	xmm0, QWORD PTR -80[rbp]
	movsd	QWORD PTR 24[rax], xmm0
	mov	rax, QWORD PTR -40[rbp]
	movsd	xmm0, QWORD PTR -88[rbp]
	movsd	QWORD PTR 32[rax], xmm0
	movsd	xmm0, QWORD PTR -80[rbp]
	movsd	xmm1, QWORD PTR .LC35[rip]
	divsd	xmm0, xmm1
	mov	rax, QWORD PTR .LC35[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movsd	QWORD PTR -96[rbp], xmm0
	movsd	xmm0, QWORD PTR -32[rbp]
	movsd	xmm1, QWORD PTR .LC35[rip]
	divsd	xmm0, xmm1
	mov	rax, QWORD PTR .LC35[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movapd	xmm2, xmm0
	addsd	xmm2, QWORD PTR -96[rbp]
	movq	rax, xmm2
	movq	xmm0, rax
	call	log@PLT
	movsd	xmm1, QWORD PTR .LC35[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC36[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	floor@PLT
	cvttsd2si	eax, xmm0
	mov	edx, eax
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR 40[rax], dl
	mov	rax, QWORD PTR -40[rbp]
	mov	rdx, QWORD PTR -72[rbp]
	mov	QWORD PTR 48[rax], rdx
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR 41[rax], 0
	mov	rax, QWORD PTR -40[rbp]
	movzx	edx, BYTE PTR -56[rbp]
	mov	BYTE PTR 42[rax], dl
	mov	eax, 0
	call	sim_node
	mov	edi, eax
	call	sim_mote_is_on
	test	al, al
	jne	.L302
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	eax, DWORD PTR -52[rbp]
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC50[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 139
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR 41[rax], 1
	jmp	.L303
.L302:
	movsd	xmm0, QWORD PTR -80[rbp]
	subsd	xmm0, QWORD PTR -32[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	call	CpmModelC$shouldReceive
	test	al, al
	jne	.L304
	movsd	xmm0, QWORD PTR -80[rbp]
	subsd	xmm0, QWORD PTR -32[rbp]
	cvttsd2si	ebx, xmm0
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	eax, DWORD PTR -52[rbp]
	mov	r9d, ebx
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC51[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 140
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR 41[rax], 1
	jmp	.L303
.L304:
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$receiving[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L305
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	eax, DWORD PTR -52[rbp]
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC52[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 141
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR 41[rax], 1
	jmp	.L303
.L305:
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$transmitting[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L306
	mov	rax, QWORD PTR -40[rbp]
	mov	rbx, QWORD PTR 8[rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$transmissionEndTime[rip]
	mov	rax, QWORD PTR [rdx+rax]
	cmp	rbx, rax
	jge	.L306
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$transmissionEndTime[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR 16[rax]
	cmp	rdx, rax
	jg	.L306
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$transmissionEndTime[rip]
	mov	rbx, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	eax, DWORD PTR -52[rbp]
	mov	r9, rbx
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC53[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 142
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -40[rbp]
	mov	BYTE PTR 41[rax], 1
	jmp	.L303
.L306:
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$receiving[rip]
	mov	BYTE PTR [rax+rdx], 1
.L303:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -48[rbp], rax
	jmp	.L307
.L309:
	mov	rax, QWORD PTR -48[rbp]
	movsd	xmm0, QWORD PTR 24[rax]
	mov	rax, QWORD PTR -40[rbp]
	movsd	xmm1, QWORD PTR 24[rax]
	subsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	CpmModelC$shouldReceive
	test	al, al
	jne	.L308
	mov	rax, QWORD PTR -40[rbp]
	movsd	xmm0, QWORD PTR 24[rax]
	mov	rax, QWORD PTR -48[rbp]
	mov	rdx, QWORD PTR 24[rax]
	mov	rax, QWORD PTR -48[rbp]
	mov	eax, DWORD PTR [rax]
	mov	ecx, DWORD PTR -52[rbp]
	movapd	xmm1, xmm0
	mov	r8d, ecx
	movq	xmm0, rdx
	mov	ecx, eax
	lea	rdx, .LC54[rip]
	lea	rsi, .LC55[rip]
	mov	edi, 143
	mov	eax, 2
	call	sim_log_debug
	mov	rax, QWORD PTR -48[rbp]
	mov	BYTE PTR 41[rax], 1
.L308:
	mov	rax, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR 56[rax]
	mov	QWORD PTR -48[rbp], rax
.L307:
	cmp	QWORD PTR -48[rbp], 0
	jne	.L309
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR 56[rax], rdx
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, CpmModelC$outstandingReceptionHead[rip]
	mov	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	rdx, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -64[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	CpmModelC$allocate_receive_event
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE132:
	.size	CpmModelC$enqueue_receive_event, .-CpmModelC$enqueue_receive_event
	.section	.rodata
	.align 8
.LC56:
	.string	"Enqueing reception event for %i at %llu with power %lf.\n"
	.text
	.type	CpmModelC$sim_gain_put, @function
CpmModelC$sim_gain_put:
.LFB133:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	eax, ecx
	movsd	QWORD PTR -48[rbp], xmm0
	movsd	QWORD PTR -56[rbp], xmm1
	mov	BYTE PTR -24[rbp], al
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -4[rbp], eax
	mov	rdx, QWORD PTR -48[rbp]
	mov	rcx, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR -20[rbp]
	movq	xmm0, rdx
	mov	r8, rcx
	mov	ecx, eax
	lea	rdx, .LC56[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 144
	mov	eax, 1
	call	sim_log_debug
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	movzx	ecx, BYTE PTR -24[rbp]
	movsd	xmm0, QWORD PTR -56[rbp]
	mov	rdi, QWORD PTR -48[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	rsi, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rdi
	mov	edi, eax
	call	CpmModelC$enqueue_receive_event
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE133:
	.size	CpmModelC$sim_gain_put, .-CpmModelC$sim_gain_put
	.section	.rodata
	.align 8
.LC57:
	.string	"Node %i transmitting to %i, finishes at %llu.\n"
	.align 8
.LC58:
	.string	"Lost packet from %i because %i has outstanding reception, startTime %llu endTime %llu\n"
	.text
	.type	CpmModelC$Model$putOnAirTo, @function
CpmModelC$Model$putOnAirTo:
.LFB134:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 80
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	DWORD PTR -52[rbp], edi
	mov	QWORD PTR -64[rbp], rsi
	mov	eax, edx
	mov	QWORD PTR -72[rbp], rcx
	movsd	QWORD PTR -80[rbp], xmm0
	movsd	QWORD PTR -88[rbp], xmm1
	mov	BYTE PTR -56[rbp], al
	mov	eax, 0
	call	sim_node
	mov	edi, eax
	call	sim_gain_first
	mov	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_node
	lea	rcx, CpmModelC$requestAck[rip]
	movzx	edx, BYTE PTR -56[rbp]
	mov	BYTE PTR [rax+rcx], dl
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, CpmModelC$outgoing[rip]
	mov	rax, QWORD PTR -64[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, CpmModelC$transmissionEndTime[rip]
	mov	rax, QWORD PTR -72[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	eax, 0
	call	sim_node
	mov	rcx, QWORD PTR -72[rbp]
	mov	edx, DWORD PTR -52[rbp]
	mov	r9, rcx
	mov	r8d, edx
	mov	rcx, rax
	lea	rdx, .LC57[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 145
	mov	eax, 0
	call	sim_log_debug
	jmp	.L312
.L313:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -36[rbp], eax
	mov	eax, 0
	call	sim_node
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	mov	esi, edx
	mov	edi, eax
	call	sim_gain_value
	movq	rax, xmm0
	movq	xmm2, rax
	addsd	xmm2, QWORD PTR -88[rbp]
	movsd	QWORD PTR -96[rbp], xmm2
	mov	eax, 0
	call	sim_node
	mov	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	mov	esi, eax
	mov	edi, edx
	call	sim_gain_value
	movq	rax, xmm0
	movq	xmm3, rax
	addsd	xmm3, QWORD PTR -80[rbp]
	movq	rdi, xmm3
	movzx	ecx, BYTE PTR -56[rbp]
	mov	rdx, QWORD PTR -72[rbp]
	mov	rsi, QWORD PTR -64[rbp]
	mov	eax, DWORD PTR -36[rbp]
	movsd	xmm1, QWORD PTR -96[rbp]
	movq	xmm0, rdi
	mov	edi, eax
	call	CpmModelC$sim_gain_put
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	sim_gain_next
	mov	QWORD PTR -24[rbp], rax
.L312:
	cmp	QWORD PTR -24[rbp], 0
	jne	.L313
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -32[rbp], rax
	jmp	.L314
.L315:
	mov	rax, QWORD PTR -32[rbp]
	mov	BYTE PTR 41[rax], 1
	mov	rax, QWORD PTR -32[rbp]
	mov	rbx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	r12, QWORD PTR 8[rax]
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR [rax]
	sub	rsp, 8
	push	rbx
	mov	r9, r12
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC58[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 146
	mov	eax, 0
	call	sim_log_debug
	add	rsp, 16
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR 56[rax]
	mov	QWORD PTR -32[rbp], rax
.L314:
	cmp	QWORD PTR -32[rbp], 0
	jne	.L315
	nop
	nop
	lea	rsp, -16[rbp]
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE134:
	.size	CpmModelC$Model$putOnAirTo, .-CpmModelC$Model$putOnAirTo
	.type	TossimPacketModelC$GainRadioModel$putOnAirTo, @function
TossimPacketModelC$GainRadioModel$putOnAirTo:
.LFB135:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, edx
	mov	QWORD PTR -24[rbp], rcx
	movsd	QWORD PTR -32[rbp], xmm0
	movsd	QWORD PTR -40[rbp], xmm1
	mov	BYTE PTR -8[rbp], al
	movzx	edx, BYTE PTR -8[rbp]
	movsd	xmm0, QWORD PTR -40[rbp]
	mov	rdi, QWORD PTR -32[rbp]
	mov	rcx, QWORD PTR -24[rbp]
	mov	rsi, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR -4[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rdi
	mov	edi, eax
	call	CpmModelC$Model$putOnAirTo
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE135:
	.size	TossimPacketModelC$GainRadioModel$putOnAirTo, .-TossimPacketModelC$GainRadioModel$putOnAirTo
	.section	.rodata
	.align 8
.LC59:
	.string	"PACKET: Signaling send done at %llu.\n"
.LC60:
	.string	"TossimPacketModelC"
	.text
	.type	TossimPacketModelC$send_transmit_done, @function
TossimPacketModelC$send_transmit_done:
.LFB136:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -8[rbp], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$transmitting[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, 0
	call	sim_time
	mov	rcx, rax
	lea	rdx, .LC59[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 120
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L318
	mov	edx, 0
	jmp	.L319
.L318:
	mov	edx, 4
.L319:
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	TossimPacketModelC$Packet$sendDone
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE136:
	.size	TossimPacketModelC$send_transmit_done, .-TossimPacketModelC$send_transmit_done
	.section	.rodata
	.align 8
.LC61:
	.string	"PACKET: Broadcasting packet to everyone.\n"
.LC62:
	.string	"PACKET: Send done at %llu.\n"
	.text
	.type	TossimPacketModelC$send_transmit, @function
TossimPacketModelC$send_transmit:
.LFB137:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r13
	push	r12
	push	rbx
	sub	rsp, 40
	.cfi_offset 13, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	mov	QWORD PTR -56[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimPacketModelC$getMetadata
	mov	QWORD PTR -40[rbp], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$sendingLength[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 3
	cdqe
	mov	QWORD PTR -48[rbp], rax
	mov	eax, 0
	call	sim_csma_bits_per_symbol
	movsx	rcx, eax
	mov	rax, QWORD PTR -48[rbp]
	cqo
	idiv	rcx
	mov	QWORD PTR -48[rbp], rax
	mov	eax, 0
	call	sim_csma_preamble_length
	cdqe
	add	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 1
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	test	al, al
	je	.L321
	mov	eax, 0
	call	sim_csma_ack_time
	cdqe
	add	QWORD PTR -48[rbp], rax
.L321:
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rbx, rax
	mov	eax, 0
	call	sim_csma_symbols_per_sec
	movsx	rcx, eax
	mov	rax, rbx
	cqo
	idiv	rcx
	mov	rdx, rax
	mov	rax, QWORD PTR -48[rbp]
	imul	rax, rdx
	mov	QWORD PTR -48[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -48[rbp]
	add	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -56[rbp]
	lea	rdx, TossimPacketModelC$send_transmit_done[rip]
	mov	QWORD PTR 32[rax], rdx
	lea	rdx, .LC61[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 118
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -56[rbp]
	mov	r13, QWORD PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 1
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	movzx	r12d, al
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rbx, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, TossimPacketModelC$destNode[rip]
	mov	eax, DWORD PTR [rdx+rax]
	pxor	xmm1, xmm1
	pxor	xmm0, xmm0
	mov	rcx, r13
	mov	edx, r12d
	mov	rsi, rbx
	mov	edi, eax
	call	TossimPacketModelC$GainRadioModel$putOnAirTo
	mov	rax, QWORD PTR -40[rbp]
	add	rax, 1
	mov	esi, 0
	mov	rdi, rax
	call	__nesc_hton_uint8
	mov	eax, 0
	call	sim_csma_rxtx_delay
	movsx	r12, eax
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rbx, rax
	mov	eax, 0
	call	sim_csma_symbols_per_sec
	movsx	rsi, eax
	mov	rax, rbx
	cqo
	idiv	rsi
	mov	rdx, r12
	imul	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rax, QWORD PTR [rax]
	add	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -56[rbp]
	mov	rax, QWORD PTR [rax]
	mov	rcx, rax
	lea	rdx, .LC62[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 119
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -56[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	nop
	add	rsp, 40
	pop	rbx
	pop	r12
	pop	r13
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE137:
	.size	TossimPacketModelC$send_transmit, .-TossimPacketModelC$send_transmit
	.section	.rodata
	.align 8
.LC63:
	.string	"setPendingTransmission: transmitting %i @ %s\n"
	.text
	.type	CpmModelC$Model$setPendingTransmission, @function
CpmModelC$Model$setPendingTransmission:
.LFB138:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$transmitting[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	eax, 0
	call	sim_time_string
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$transmitting[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	r8, rbx
	mov	ecx, eax
	lea	rdx, .LC63[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 147
	mov	eax, 0
	call	sim_log_debug
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE138:
	.size	CpmModelC$Model$setPendingTransmission, .-CpmModelC$Model$setPendingTransmission
	.type	TossimPacketModelC$GainRadioModel$setPendingTransmission, @function
TossimPacketModelC$GainRadioModel$setPendingTransmission:
.LFB139:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	CpmModelC$Model$setPendingTransmission
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE139:
	.size	TossimPacketModelC$GainRadioModel$setPendingTransmission, .-TossimPacketModelC$GainRadioModel$setPendingTransmission
	.section	.rodata
	.align 8
.LC64:
	.string	"Checking clear channel @ %s: %f <= %f \n"
	.text
	.type	CpmModelC$Model$clearChannel, @function
CpmModelC$Model$clearChannel:
.LFB140:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$clearThreshold[rip]
	movsd	xmm2, QWORD PTR [rdx+rax]
	movsd	QWORD PTR -24[rbp], xmm2
	mov	edi, 0
	call	CpmModelC$packetNoise
	movq	rbx, xmm0
	mov	eax, 0
	call	sim_time_string
	movsd	xmm1, QWORD PTR -24[rbp]
	movq	xmm0, rbx
	mov	rcx, rax
	lea	rdx, .LC64[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 126
	mov	eax, 2
	call	sim_log_debug
	mov	edi, 0
	call	CpmModelC$packetNoise
	movsd	QWORD PTR -24[rbp], xmm0
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$clearThreshold[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	comisd	xmm0, QWORD PTR -24[rbp]
	seta	al
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE140:
	.size	CpmModelC$Model$clearChannel, .-CpmModelC$Model$clearChannel
	.type	TossimPacketModelC$GainRadioModel$clearChannel, @function
TossimPacketModelC$GainRadioModel$clearChannel:
.LFB141:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	CpmModelC$Model$clearChannel
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE141:
	.size	TossimPacketModelC$GainRadioModel$clearChannel, .-TossimPacketModelC$GainRadioModel$clearChannel
	.section	.rodata
	.align 8
.LC65:
	.string	"PACKET: Failed to send packet due to busy channel.\n"
	.text
	.type	TossimPacketModelC$send_backoff, @function
TossimPacketModelC$send_backoff:
.LFB142:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	QWORD PTR -56[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$backoffCount[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	lea	ecx, 1[rdx]
	lea	rdx, TossimPacketModelC$backoffCount[rip]
	mov	BYTE PTR [rax+rdx], cl
	call	TossimPacketModelC$GainRadioModel$clearChannel
	test	al, al
	je	.L329
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$neededFreeSamples[rip]
	movzx	edx, BYTE PTR [rax+rdx]
	lea	ecx, -1[rdx]
	lea	rdx, TossimPacketModelC$neededFreeSamples[rip]
	mov	BYTE PTR [rax+rdx], cl
	jmp	.L330
.L329:
	mov	eax, 0
	call	sim_csma_min_free_samples
	mov	ebx, eax
	mov	eax, 0
	call	sim_node
	mov	ecx, ebx
	lea	rdx, TossimPacketModelC$neededFreeSamples[rip]
	mov	BYTE PTR [rax+rdx], cl
.L330:
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$neededFreeSamples[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L331
	mov	eax, 0
	call	sim_csma_rxtx_delay
	cdqe
	mov	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rbx, rax
	mov	eax, 0
	call	sim_csma_symbols_per_sec
	movsx	rsi, eax
	mov	rax, rbx
	cqo
	idiv	rsi
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	imul	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	add	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR [rax], rdx
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$transmitting[rip]
	mov	BYTE PTR [rax+rdx], 1
	call	TossimPacketModelC$GainRadioModel$setPendingTransmission
	mov	rax, QWORD PTR -56[rbp]
	lea	rdx, TossimPacketModelC$send_transmit[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -56[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	jmp	.L335
.L331:
	mov	eax, 0
	call	sim_csma_max_iterations
	test	eax, eax
	je	.L333
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$backoffCount[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	ebx, al
	mov	eax, 0
	call	sim_csma_max_iterations
	cmp	ebx, eax
	jg	.L334
.L333:
	mov	eax, 0
	call	sim_random
	cdqe
	mov	QWORD PTR -40[rbp], rax
	mov	eax, 0
	call	sim_csma_high
	mov	ebx, eax
	mov	eax, 0
	call	sim_csma_low
	mov	edx, eax
	mov	eax, ebx
	sub	eax, edx
	cdqe
	mov	QWORD PTR -32[rbp], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$backoffCount[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	pxor	xmm2, xmm2
	cvtsi2sd	xmm2, eax
	movsd	QWORD PTR -64[rbp], xmm2
	mov	eax, 0
	call	sim_csma_exponent_base
	pxor	xmm3, xmm3
	cvtsi2sd	xmm3, eax
	movq	rax, xmm3
	movsd	xmm1, QWORD PTR -64[rbp]
	movq	xmm0, rax
	call	pow@PLT
	pxor	xmm1, xmm1
	cvtsi2sd	xmm1, QWORD PTR -32[rbp]
	mulsd	xmm0, xmm1
	cvttsd2si	rax, xmm0
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	cqo
	idiv	QWORD PTR -32[rbp]
	mov	QWORD PTR -40[rbp], rdx
	mov	eax, 0
	call	sim_csma_init_low
	cdqe
	add	QWORD PTR -40[rbp], rax
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rbx, rax
	mov	eax, 0
	call	sim_csma_symbols_per_sec
	movsx	rsi, eax
	mov	rax, rbx
	cqo
	idiv	rsi
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	imul	rax, rdx
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -56[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	nop
	jmp	.L335
.L334:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -48[rbp], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	QWORD PTR [rdx+rax], 0
	lea	rdx, .LC65[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 117
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -48[rbp]
	mov	esi, 5
	mov	rdi, rax
	call	TossimPacketModelC$Packet$sendDone
.L335:
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE142:
	.size	TossimPacketModelC$send_backoff, .-TossimPacketModelC$send_backoff
	.section	.rodata
.LC66:
	.string	"Starting CMSA with %lli.\n"
	.text
	.type	TossimPacketModelC$start_csma, @function
TossimPacketModelC$start_csma:
.LFB143:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_random
	cdqe
	mov	QWORD PTR -32[rbp], rax
	mov	eax, 0
	call	sim_csma_init_high
	mov	ebx, eax
	mov	eax, 0
	call	sim_csma_init_low
	mov	edx, eax
	mov	eax, ebx
	sub	eax, edx
	movsx	rcx, eax
	mov	rax, QWORD PTR -32[rbp]
	cqo
	idiv	rcx
	mov	QWORD PTR -32[rbp], rdx
	mov	eax, 0
	call	sim_csma_init_low
	cdqe
	add	QWORD PTR -32[rbp], rax
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rbx, rax
	mov	eax, 0
	call	sim_csma_symbols_per_sec
	movsx	rsi, eax
	mov	rax, rbx
	cqo
	idiv	rsi
	mov	rdx, rax
	mov	rax, QWORD PTR -32[rbp]
	imul	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	mov	rcx, rax
	lea	rdx, .LC66[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 116
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_time
	mov	rdx, QWORD PTR -32[rbp]
	add	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rbx
	add	rax, rax
	add	rax, rbx
	sal	rax, 4
	mov	rcx, rax
	lea	rax, TossimPacketModelC$sendEvent[rip+8]
	mov	QWORD PTR [rcx+rax], rdx
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	mov	rcx, rax
	lea	rdx, TossimPacketModelC$sendEvent[rip]
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, TossimPacketModelC$sendEvent[rip+16]
	mov	BYTE PTR [rdx+rax], 0
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, TossimPacketModelC$sendEvent[rip+17]
	mov	BYTE PTR [rdx+rax], 0
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	mov	rcx, rax
	lea	rax, TossimPacketModelC$sendEvent[rip+32]
	lea	rdx, TossimPacketModelC$send_backoff[rip]
	mov	QWORD PTR [rcx+rax], rdx
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	mov	rcx, rax
	lea	rax, TossimPacketModelC$sendEvent[rip+40]
	lea	rdx, sim_queue_cleanup_none[rip]
	mov	QWORD PTR [rcx+rax], rdx
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	lea	rdx, TossimPacketModelC$sendEvent[rip]
	add	rax, rdx
	mov	rdi, rax
	call	sim_queue_insert
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE143:
	.size	TossimPacketModelC$start_csma, .-TossimPacketModelC$start_csma
	.section	.rodata
	.align 8
.LC67:
	.string	"TossimPacketModelC: Send.send() called, but not initialized!\n"
	.align 8
.LC68:
	.string	"TossimPacketModelC: Send.send() called, but not running!\n"
	.text
	.type	TossimPacketModelC$Packet$send, @function
TossimPacketModelC$Packet$send:
.LFB144:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	eax, edx
	mov	BYTE PTR -24[rbp], al
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$initialized[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L338
	lea	rdx, .LC67[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 114
	mov	eax, 0
	call	sim_log_error
	mov	eax, 4
	jmp	.L339
.L338:
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L340
	lea	rdx, .LC68[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 115
	mov	eax, 0
	call	sim_log_error
	mov	eax, 4
	jmp	.L339
.L340:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L341
	mov	eax, 5
	jmp	.L339
.L341:
	mov	eax, 0
	call	sim_node
	lea	rcx, TossimPacketModelC$sendingLength[rip]
	movzx	edx, BYTE PTR -24[rbp]
	mov	BYTE PTR [rax+rcx], dl
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*4]
	lea	rdx, TossimPacketModelC$destNode[rip]
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$backoffCount[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, 0
	call	sim_csma_min_free_samples
	mov	ebx, eax
	mov	eax, 0
	call	sim_node
	mov	ecx, ebx
	lea	rdx, TossimPacketModelC$neededFreeSamples[rip]
	mov	BYTE PTR [rax+rdx], cl
	call	TossimPacketModelC$start_csma
	mov	eax, 0
.L339:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE144:
	.size	TossimPacketModelC$Packet$send, .-TossimPacketModelC$Packet$send
	.type	TossimActiveMessageC$Model$send, @function
TossimActiveMessageC$Model$send:
.LFB145:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	eax, edx
	mov	BYTE PTR -24[rbp], al
	movzx	edx, BYTE PTR -24[rbp]
	mov	rcx, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	TossimPacketModelC$Packet$send
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE145:
	.size	TossimActiveMessageC$Model$send, .-TossimActiveMessageC$Model$send
	.type	CpmModelC$timeInMs, @function
CpmModelC$timeInMs:
.LFB146:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	eax, 0
	call	sim_time
	mov	QWORD PTR -16[rbp], rax
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	cqo
	idiv	rcx
	mov	QWORD PTR -24[rbp], rdx
	mov	eax, 0
	call	sim_ticks_per_sec
	cmp	rax, 1000000000
	jle	.L345
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rcx, rax
	movabs	rdx, 1237940039285380275
	mov	rax, rcx
	imul	rdx
	mov	rax, rdx
	sar	rax, 26
	sar	rcx, 63
	sub	rax, rcx
	mov	rdi, rax
	mov	rax, QWORD PTR -24[rbp]
	cqo
	idiv	rdi
	mov	QWORD PTR -24[rbp], rax
	jmp	.L346
.L345:
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rdi, rax
	mov	eax, 1000000000
	cqo
	idiv	rdi
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	imul	rax, rdx
	mov	QWORD PTR -24[rbp], rax
.L346:
	mov	rcx, QWORD PTR -24[rbp]
	movabs	rdx, 3777893186295716171
	mov	rax, rcx
	imul	rdx
	mov	rax, rdx
	sar	rax, 11
	sar	rcx, 63
	mov	rdx, rcx
	sub	rax, rdx
	mov	DWORD PTR -40[rbp], eax
	mov	ecx, DWORD PTR -40[rbp]
	movsx	rax, ecx
	imul	rax, rax, 1717986919
	shr	rax, 32
	sar	eax, 2
	mov	esi, ecx
	sar	esi, 31
	sub	eax, esi
	mov	edx, eax
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	add	eax, eax
	sub	ecx, eax
	mov	edx, ecx
	cmp	edx, 4
	jle	.L347
	mov	edx, DWORD PTR -40[rbp]
	movsx	rax, edx
	imul	rax, rax, 1717986919
	shr	rax, 32
	sar	eax, 2
	mov	esi, edx
	sar	esi, 31
	sub	eax, esi
	mov	ecx, eax
	mov	eax, ecx
	sal	eax, 2
	add	eax, ecx
	add	eax, eax
	mov	ecx, edx
	sub	ecx, eax
	mov	eax, 10
	sub	eax, ecx
	add	DWORD PTR -40[rbp], eax
	jmp	.L348
.L347:
	mov	ecx, DWORD PTR -40[rbp]
	movsx	rax, ecx
	imul	rax, rax, 1717986919
	shr	rax, 32
	sar	eax, 2
	mov	esi, ecx
	sar	esi, 31
	sub	eax, esi
	mov	edx, eax
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	add	eax, eax
	sub	ecx, eax
	mov	edx, ecx
	sub	DWORD PTR -40[rbp], edx
.L348:
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, DWORD PTR -40[rbp]
	movsd	xmm1, QWORD PTR .LC69[rip]
	divsd	xmm0, xmm1
	cvtsd2ss	xmm0, xmm0
	cvtss2sd	xmm0, xmm0
	movsd	QWORD PTR -8[rbp], xmm0
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rdi, rax
	mov	rax, QWORD PTR -16[rbp]
	cqo
	idiv	rdi
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	edx, edx, 60
	sub	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	edx, edx, 60
	sub	eax, edx
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	imul	edx, eax, 3600
	mov	eax, DWORD PTR -32[rbp]
	imul	eax, eax, 60
	add	edx, eax
	mov	eax, DWORD PTR -36[rbp]
	add	eax, edx
	imul	eax, eax, 1000
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	xmm1, QWORD PTR -8[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE146:
	.size	CpmModelC$timeInMs, .-CpmModelC$timeInMs
	.type	AMQueueImplP$0$nextPacket, @function
AMQueueImplP$0$nextPacket:
.LFB147:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_node
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	BYTE PTR -17[rbp], 0
	jmp	.L351
.L354:
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	cdqe
	add	rax, rbx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L352
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	shr	al, 3
	movzx	eax, al
	cdqe
	lea	rdx, [rbx+rax]
	lea	rax, AMQueueImplP$0$cancelMask[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	ebx, al
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	and	eax, 7
	mov	ecx, eax
	sar	ebx, cl
	mov	eax, ebx
	and	eax, 1
	test	eax, eax
	je	.L353
.L352:
	mov	eax, 0
	call	sim_node
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	mov	BYTE PTR [rax+rdx], 0
	movzx	eax, BYTE PTR -17[rbp]
	add	eax, 1
	mov	BYTE PTR -17[rbp], al
.L351:
	cmp	BYTE PTR -17[rbp], 0
	je	.L354
.L353:
	cmp	BYTE PTR -17[rbp], 0
	je	.L356
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	mov	BYTE PTR [rax+rdx], 1
.L356:
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE147:
	.size	AMQueueImplP$0$nextPacket, .-AMQueueImplP$0$nextPacket
	.type	TossimActiveMessageC$Packet$payloadLength, @function
TossimActiveMessageC$Packet$payloadLength:
.LFB148:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 8
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	add	rax, 4
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE148:
	.size	TossimActiveMessageC$Packet$payloadLength, .-TossimActiveMessageC$Packet$payloadLength
	.type	AMQueueImplP$0$Packet$payloadLength, @function
AMQueueImplP$0$Packet$payloadLength:
.LFB149:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$Packet$payloadLength
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE149:
	.size	AMQueueImplP$0$Packet$payloadLength, .-AMQueueImplP$0$Packet$payloadLength
	.type	AMQueueImplP$0$errorTask$postTask, @function
AMQueueImplP$0$errorTask$postTask:
.LFB150:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edi, 4
	call	SimSchedulerBasicP$TaskBasic$postTask
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE150:
	.size	AMQueueImplP$0$errorTask$postTask, .-AMQueueImplP$0$errorTask$postTask
	.type	TossimPacketModelC$PacketAcknowledgements$wasAcked, @function
TossimPacketModelC$PacketAcknowledgements$wasAcked:
.LFB151:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$getMetadata
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE151:
	.size	TossimPacketModelC$PacketAcknowledgements$wasAcked, .-TossimPacketModelC$PacketAcknowledgements$wasAcked
	.type	sendAckC$ack$wasAcked, @function
sendAckC$ack$wasAcked:
.LFB152:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$PacketAcknowledgements$wasAcked
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE152:
	.size	sendAckC$ack$wasAcked, .-sendAckC$ack$wasAcked
	.type	VirtualizeTimerC$0$Timer$stop, @function
VirtualizeTimerC$0$Timer$stop:
.LFB153:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	mov	eax, 0
	call	sim_node
	mov	rcx, rax
	movzx	eax, BYTE PTR -4[rbp]
	cdqe
	mov	rdx, rax
	add	rdx, rdx
	add	rdx, rax
	lea	rax, 0[0+rdx*4]
	mov	rdx, rax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 3
	add	rdx, rax
	lea	rax, VirtualizeTimerC$0$m_timers[rip]
	add	rax, rdx
	movzx	edx, BYTE PTR 8[rax]
	and	edx, -3
	mov	BYTE PTR 8[rax], dl
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE153:
	.size	VirtualizeTimerC$0$Timer$stop, .-VirtualizeTimerC$0$Timer$stop
	.type	sendAckC$MilliTimer$stop, @function
sendAckC$MilliTimer$stop:
.LFB154:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 0
	call	VirtualizeTimerC$0$Timer$stop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE154:
	.size	sendAckC$MilliTimer$stop, .-sendAckC$MilliTimer$stop
	.section	.rodata
.LC75:
	.string	"SNR is %lf, PRR is %lf\n"
.LC76:
	.string	"CpmModelC,SNR"
	.text
	.type	CpmModelC$prr_estimate_from_snr, @function
CpmModelC$prr_estimate_from_snr:
.LFB155:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	movsd	QWORD PTR -56[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC70[rip]
	movsd	QWORD PTR -32[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC71[rip]
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm0, QWORD PTR -56[rbp]
	subsd	xmm0, QWORD PTR -24[rbp]
	movsd	QWORD PTR -16[rbp], xmm0
	movsd	xmm0, QWORD PTR -32[rbp]
	mulsd	xmm0, QWORD PTR -16[rbp]
	movsd	xmm1, QWORD PTR .LC72[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	erfc@PLT
	movsd	xmm1, QWORD PTR .LC3[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC73[rip]
	subsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movsd	xmm0, QWORD PTR .LC74[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movq	rax, xmm0
	mov	QWORD PTR -40[rbp], rax
	movsd	xmm0, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	lea	rdx, .LC75[rip]
	lea	rsi, .LC76[rip]
	mov	edi, 127
	mov	eax, 2
	call	sim_log_debug
	movsd	xmm0, QWORD PTR -40[rbp]
	movsd	xmm1, QWORD PTR .LC73[rip]
	comisd	xmm0, xmm1
	jbe	.L377
	movsd	xmm0, QWORD PTR .LC77[rip]
	movsd	QWORD PTR -40[rbp], xmm0
	jmp	.L372
.L377:
	pxor	xmm0, xmm0
	comisd	xmm0, QWORD PTR -40[rbp]
	jbe	.L372
	movsd	xmm0, QWORD PTR .LC78[rip]
	movsd	QWORD PTR -40[rbp], xmm0
.L372:
	movsd	xmm0, QWORD PTR -40[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE155:
	.size	CpmModelC$prr_estimate_from_snr, .-CpmModelC$prr_estimate_from_snr
	.section	.rodata
	.align 8
.LC79:
	.string	"Received packet addressed to me so ack it\n"
.LC80:
	.string	"Acks"
	.text
	.type	TossimActiveMessageC$Model$shouldAck, @function
TossimActiveMessageC$Model$shouldAck:
.LFB156:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	QWORD PTR -40[rbp], rdi
	mov	rax, QWORD PTR -40[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	__nesc_ntoh_uint16
	mov	ebx, eax
	call	TossimActiveMessageC$amAddress
	cmp	bx, ax
	jne	.L379
	lea	rdx, .LC79[rip]
	lea	rsi, .LC80[rip]
	mov	edi, 107
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 1
	jmp	.L380
.L379:
	mov	eax, 0
.L380:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE156:
	.size	TossimActiveMessageC$Model$shouldAck, .-TossimActiveMessageC$Model$shouldAck
	.type	TossimPacketModelC$Packet$shouldAck, @function
TossimPacketModelC$Packet$shouldAck:
.LFB157:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$Model$shouldAck
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE157:
	.size	TossimPacketModelC$Packet$shouldAck, .-TossimPacketModelC$Packet$shouldAck
	.section	.rodata
	.align 8
.LC81:
	.string	"Requested ack for 0x%x, but outgoing packet is 0x%x.\n"
	.text
	.type	TossimPacketModelC$GainRadioModel$acked, @function
TossimPacketModelC$GainRadioModel$acked:
.LFB158:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L385
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimPacketModelC$getMetadata
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 1
	mov	esi, 1
	mov	rdi, rax
	call	__nesc_hton_uint8
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rax, QWORD PTR [rdx+rax]
	cmp	QWORD PTR -24[rbp], rax
	je	.L385
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$error[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	r8, rdx
	mov	rcx, rax
	lea	rdx, .LC81[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 121
	mov	eax, 0
	call	sim_log_debug
.L385:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE158:
	.size	TossimPacketModelC$GainRadioModel$acked, .-TossimPacketModelC$GainRadioModel$acked
	.type	CpmModelC$Model$acked, @function
CpmModelC$Model$acked:
.LFB159:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$GainRadioModel$acked
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE159:
	.size	CpmModelC$Model$acked, .-CpmModelC$Model$acked
	.section	.rodata
.LC82:
	.string	"SNR is %lf, ARR is %lf\n"
	.text
	.type	CpmModelC$arr_estimate_from_snr, @function
CpmModelC$arr_estimate_from_snr:
.LFB160:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	movsd	QWORD PTR -56[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC70[rip]
	movsd	QWORD PTR -32[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC71[rip]
	movsd	QWORD PTR -24[rbp], xmm0
	movsd	xmm0, QWORD PTR -56[rbp]
	subsd	xmm0, QWORD PTR -24[rbp]
	movsd	QWORD PTR -16[rbp], xmm0
	movsd	xmm0, QWORD PTR -32[rbp]
	mulsd	xmm0, QWORD PTR -16[rbp]
	movsd	xmm1, QWORD PTR .LC72[rip]
	divsd	xmm0, xmm1
	movq	rax, xmm0
	movq	xmm0, rax
	call	erfc@PLT
	movsd	xmm1, QWORD PTR .LC3[rip]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR .LC73[rip]
	subsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movsd	xmm0, QWORD PTR .LC74[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movq	rax, xmm0
	mov	QWORD PTR -40[rbp], rax
	movsd	xmm0, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -56[rbp]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	lea	rdx, .LC82[rip]
	lea	rsi, .LC41[rip]
	mov	edi, 124
	mov	eax, 2
	call	sim_log_debug
	movsd	xmm0, QWORD PTR -40[rbp]
	movsd	xmm1, QWORD PTR .LC73[rip]
	comisd	xmm0, xmm1
	jbe	.L395
	movsd	xmm0, QWORD PTR .LC77[rip]
	movsd	QWORD PTR -40[rbp], xmm0
	jmp	.L390
.L395:
	pxor	xmm0, xmm0
	comisd	xmm0, QWORD PTR -40[rbp]
	jbe	.L390
	movsd	xmm0, QWORD PTR .LC78[rip]
	movsd	QWORD PTR -40[rbp], xmm0
.L390:
	movsd	xmm0, QWORD PTR -40[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE160:
	.size	CpmModelC$arr_estimate_from_snr, .-CpmModelC$arr_estimate_from_snr
	.type	CpmModelC$shouldAckReceive, @function
CpmModelC$shouldAckReceive:
.LFB161:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	movsd	QWORD PTR -24[rbp], xmm0
	mov	rax, QWORD PTR -24[rbp]
	movq	xmm0, rax
	call	CpmModelC$arr_estimate_from_snr
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	call	RandomUniform
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	movsd	xmm0, QWORD PTR -16[rbp]
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	jb	.L397
	movsd	xmm0, QWORD PTR .LC73[rip]
	comisd	xmm0, QWORD PTR -16[rbp]
	jb	.L397
	movsd	xmm0, QWORD PTR -16[rbp]
	comisd	xmm0, QWORD PTR -8[rbp]
	jbe	.L406
	movsd	xmm0, QWORD PTR .LC73[rip]
	movsd	QWORD PTR -16[rbp], xmm0
	jmp	.L397
.L406:
	pxor	xmm0, xmm0
	movsd	QWORD PTR -16[rbp], xmm0
.L397:
	movsd	xmm0, QWORD PTR -16[rbp]
	cvttsd2si	eax, xmm0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE161:
	.size	CpmModelC$shouldAckReceive, .-CpmModelC$shouldAckReceive
	.type	CpmModelC$sim_gain_ack_handle, @function
CpmModelC$sim_gain_ack_handle:
.LFB162:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, CpmModelC$requestAck[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L408
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outgoing[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L408
	mov	eax, 0
	call	sim_node
	mov	edi, eax
	call	sim_mote_is_on
	test	al, al
	je	.L408
	mov	rax, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR 24[rax]
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	movsd	xmm0, QWORD PTR 32[rax]
	movsd	QWORD PTR -24[rbp], xmm0
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	CpmModelC$packetNoise
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	movsd	xmm0, QWORD PTR -24[rbp]
	subsd	xmm0, QWORD PTR -16[rbp]
	movsd	QWORD PTR -8[rbp], xmm0
	mov	rax, QWORD PTR -8[rbp]
	movq	xmm0, rax
	call	CpmModelC$shouldAckReceive
	test	eax, eax
	je	.L408
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outgoing[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	CpmModelC$Model$acked
.L408:
	mov	rax, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR 24[rax]
	mov	rdi, rax
	call	CpmModelC$free_receive_message
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE162:
	.size	CpmModelC$sim_gain_ack_handle, .-CpmModelC$sim_gain_ack_handle
	.type	Atm128AlarmAsyncP$0$Compare$set, @function
Atm128AlarmAsyncP$0$Compare$set:
.LFB163:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	mov	edi, eax
	call	HplAtm128Timer0AsyncP$Compare$set
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE163:
	.size	Atm128AlarmAsyncP$0$Compare$set, .-Atm128AlarmAsyncP$0$Compare$set
	.type	Atm128AlarmAsyncP$0$Timer$get, @function
Atm128AlarmAsyncP$0$Timer$get:
.LFB164:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	HplAtm128Timer0AsyncP$Timer0$get
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE164:
	.size	Atm128AlarmAsyncP$0$Timer$get, .-Atm128AlarmAsyncP$0$Timer$get
	.type	HplAtm128Timer0AsyncP$TimerAsync$compareBusy, @function
HplAtm128Timer0AsyncP$TimerAsync$compareBusy:
.LFB165:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 48[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	and	eax, 2
	test	eax, eax
	setne	al
	movzx	eax, al
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE165:
	.size	HplAtm128Timer0AsyncP$TimerAsync$compareBusy, .-HplAtm128Timer0AsyncP$TimerAsync$compareBusy
	.type	Atm128AlarmAsyncP$0$TimerAsync$compareBusy, @function
Atm128AlarmAsyncP$0$TimerAsync$compareBusy:
.LFB166:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	HplAtm128Timer0AsyncP$TimerAsync$compareBusy
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE166:
	.size	Atm128AlarmAsyncP$0$TimerAsync$compareBusy, .-Atm128AlarmAsyncP$0$TimerAsync$compareBusy
	.type	Atm128AlarmAsyncP$0$setOcr0, @function
Atm128AlarmAsyncP$0$setOcr0:
.LFB167:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	eax, edi
	mov	BYTE PTR -20[rbp], al
	nop
.L417:
	call	Atm128AlarmAsyncP$0$TimerAsync$compareBusy
	test	eax, eax
	jne	.L417
	call	Atm128AlarmAsyncP$0$Timer$get
	cmp	BYTE PTR -20[rbp], al
	jne	.L418
	movzx	eax, BYTE PTR -20[rbp]
	add	eax, 1
	mov	BYTE PTR -20[rbp], al
.L418:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	edx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR -20[rbp]
	add	eax, edx
	lea	ebx, 1[rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	ebx, eax
	jnb	.L419
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	eax, DWORD PTR [rdx+rax]
	not	eax
	mov	BYTE PTR -20[rbp], al
.L419:
	movzx	eax, BYTE PTR -20[rbp]
	mov	edi, eax
	call	Atm128AlarmAsyncP$0$Compare$set
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE167:
	.size	Atm128AlarmAsyncP$0$setOcr0, .-Atm128AlarmAsyncP$0$setOcr0
	.section	.rodata
.LC83:
	.string	"Cancelling compare at 0x%p\n"
.LC84:
	.string	"HplAtm128CompareC"
	.text
	.type	HplAtm128Timer0AsyncP$cancel_compare, @function
HplAtm128Timer0AsyncP$cancel_compare:
.LFB168:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$compare[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rcx, rax
	lea	rdx, .LC83[rip]
	lea	rsi, .LC84[rip]
	mov	edi, 202
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$compare[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L422
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$compare[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	BYTE PTR 17[rax], 1
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$compare[rip]
	mov	rax, QWORD PTR [rdx+rax]
	lea	rdx, sim_queue_cleanup_total[rip]
	mov	QWORD PTR 40[rax], rdx
.L422:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE168:
	.size	HplAtm128Timer0AsyncP$cancel_compare, .-HplAtm128Timer0AsyncP$cancel_compare
	.type	HplAtm128Timer0AsyncP$notify_changed, @function
HplAtm128Timer0AsyncP$notify_changed:
.LFB169:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	call	HplAtm128Timer0AsyncP$Timer0$getScale
	mov	BYTE PTR -17[rbp], al
	cmp	BYTE PTR -17[rbp], 0
	je	.L424
	mov	eax, 0
	call	sim_node
	lea	rdx, HplAtm128Timer0AsyncP$oldScale[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L424
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_time
	lea	rcx, 0[0+rbx*8]
	lea	rdx, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	QWORD PTR [rcx+rdx], rax
.L424:
	mov	eax, 0
	call	sim_node
	lea	rcx, HplAtm128Timer0AsyncP$oldScale[rip]
	movzx	edx, BYTE PTR -17[rbp]
	mov	BYTE PTR [rax+rcx], dl
	call	HplAtm128Timer0AsyncP$schedule_new_compare
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE169:
	.size	HplAtm128Timer0AsyncP$notify_changed, .-HplAtm128Timer0AsyncP$notify_changed
	.section	.rodata
.LC85:
	.string	"Cancelling overflow %p.\n"
.LC86:
	.string	"HplAtm128Timer0AsyncP"
	.text
	.type	HplAtm128Timer0AsyncP$cancel_overflow, @function
HplAtm128Timer0AsyncP$cancel_overflow:
.LFB170:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$overflow[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L427
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$overflow[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	BYTE PTR 17[rax], 1
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$overflow[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rcx, rax
	lea	rdx, .LC85[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 201
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$overflow[rip]
	mov	rax, QWORD PTR [rdx+rax]
	lea	rdx, sim_queue_cleanup_total[rip]
	mov	QWORD PTR 40[rax], rdx
.L427:
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE170:
	.size	HplAtm128Timer0AsyncP$cancel_overflow, .-HplAtm128Timer0AsyncP$cancel_overflow
	.section	.rodata
.LC87:
	.string	"Overflow interrupt at %s\n"
.LC88:
	.string	"Setting overflow bit at %s\n"
	.text
	.type	HplAtm128Timer0AsyncP$timer0_overflow_handle, @function
HplAtm128Timer0AsyncP$timer0_overflow_handle:
.LFB171:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR 17[rax]
	test	al, al
	jne	.L433
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+55]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	and	eax, 1
	test	eax, eax
	je	.L431
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rcx, rax
	lea	rax, atm128RegFile[rip+54]
	movzx	eax, BYTE PTR [rcx+rax]
	and	eax, -2
	mov	ecx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+54]
	mov	BYTE PTR [rdx+rax], cl
	mov	eax, 0
	call	sim_time_string
	mov	rcx, rax
	lea	rdx, .LC87[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 198
	mov	eax, 0
	call	sim_log_debug
	call	INTERRUPT_16
	jmp	.L432
.L431:
	mov	eax, 0
	call	sim_time_string
	mov	rcx, rax
	lea	rdx, .LC88[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 199
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rcx, rax
	lea	rax, atm128RegFile[rip+54]
	movzx	eax, BYTE PTR [rcx+rax]
	or	eax, 1
	mov	ecx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+54]
	mov	BYTE PTR [rdx+rax], cl
.L432:
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$configure_overflow
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	jmp	.L428
.L433:
	nop
.L428:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE171:
	.size	HplAtm128Timer0AsyncP$timer0_overflow_handle, .-HplAtm128Timer0AsyncP$timer0_overflow_handle
	.type	HplAtm128Timer0AsyncP$allocate_overflow, @function
HplAtm128Timer0AsyncP$allocate_overflow:
.LFB172:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	sim_queue_allocate_event
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, HplAtm128Timer0AsyncP$timer0_overflow_handle[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, sim_queue_cleanup_none[rip]
	mov	QWORD PTR 40[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE172:
	.size	HplAtm128Timer0AsyncP$allocate_overflow, .-HplAtm128Timer0AsyncP$allocate_overflow
	.type	HplAtm128Timer0AsyncP$schedule_new_overflow, @function
HplAtm128Timer0AsyncP$schedule_new_overflow:
.LFB173:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	HplAtm128Timer0AsyncP$allocate_overflow
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$configure_overflow
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$overflow[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L437
	call	HplAtm128Timer0AsyncP$cancel_overflow
.L437:
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, HplAtm128Timer0AsyncP$overflow[rip]
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE173:
	.size	HplAtm128Timer0AsyncP$schedule_new_overflow, .-HplAtm128Timer0AsyncP$schedule_new_overflow
	.type	HplAtm128Timer0AsyncP$clock_to_sim, @function
HplAtm128Timer0AsyncP$clock_to_sim:
.LFB174:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rdx, QWORD PTR -8[rbp]
	imul	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	call	HplAtm128Timer0AsyncP$notify_clockTicksPerSec
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	cqo
	idiv	rcx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE174:
	.size	HplAtm128Timer0AsyncP$clock_to_sim, .-HplAtm128Timer0AsyncP$clock_to_sim
	.section	.rodata
	.align 8
.LC89:
	.string	"HplAtm128Timer0AsyncP: Setting timer: %hhu\n"
	.text
	.type	HplAtm128Timer0AsyncP$Timer0$set, @function
HplAtm128Timer0AsyncP$Timer0$set:
.LFB175:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, edi
	mov	BYTE PTR -20[rbp], al
	call	HplAtm128Timer0AsyncP$Timer0$get
	mov	BYTE PTR -9[rbp], al
	movzx	eax, BYTE PTR -20[rbp]
	mov	ecx, eax
	lea	rdx, .LC89[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 191
	mov	eax, 0
	call	sim_log_debug
	movzx	eax, BYTE PTR -20[rbp]
	cmp	al, BYTE PTR -9[rbp]
	je	.L445
	movzx	eax, BYTE PTR -9[rbp]
	movzx	edx, BYTE PTR -20[rbp]
	sub	eax, edx
	cdqe
	mov	QWORD PTR -8[rbp], rax
	call	HplAtm128Timer0AsyncP$shiftFromScale
	movzx	eax, ax
	mov	ecx, eax
	sal	QWORD PTR -8[rbp], cl
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$clock_to_sim
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, BYTE PTR -20[rbp]
	cmp	al, BYTE PTR -9[rbp]
	jnb	.L443
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rcx, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	rcx, QWORD PTR [rdx+rcx]
	mov	rdx, QWORD PTR -8[rbp]
	add	rcx, rdx
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	QWORD PTR [rdx+rax], rcx
	jmp	.L444
.L443:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rcx, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	rdx, QWORD PTR [rdx+rcx]
	sub	rdx, QWORD PTR -8[rbp]
	lea	rcx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	QWORD PTR [rcx+rax], rdx
.L444:
	call	HplAtm128Timer0AsyncP$schedule_new_overflow
	call	HplAtm128Timer0AsyncP$notify_changed
	jmp	.L440
.L445:
	nop
.L440:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE175:
	.size	HplAtm128Timer0AsyncP$Timer0$set, .-HplAtm128Timer0AsyncP$Timer0$set
	.section	.rodata
.LC90:
	.string	"Beginning compare 0x%p at %s\n"
	.align 8
.LC91:
	.string	"Handling compare at 0x%p @ %s\n"
.LC92:
	.string	"%s: CTC is set, clear timer.\n"
.LC93:
	.string	"%s: TCCR is 0x%hhx, %i, %i\n"
.LC94:
	.string	"TIFR is %hhx\n"
.LC95:
	.string	"Compare interrupt @ %s\n"
	.text
	.type	HplAtm128Timer0AsyncP$timer0_compare_handle, @function
HplAtm128Timer0AsyncP$timer0_compare_handle:
.LFB176:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 160
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	QWORD PTR -168[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -24[rbp], rax
	xor	eax, eax
	mov	eax, 0
	call	sim_time_string
	mov	rdx, rax
	mov	rax, QWORD PTR -168[rbp]
	mov	r8, rdx
	mov	rcx, rax
	lea	rdx, .LC90[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 181
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -168[rbp]
	movzx	eax, BYTE PTR 17[rax]
	test	al, al
	jne	.L455
	lea	rax, -160[rbp]
	mov	esi, 128
	mov	rdi, rax
	call	sim_print_now
	mov	eax, 0
	call	sim_time_string
	mov	rdx, rax
	mov	rax, QWORD PTR -168[rbp]
	mov	r8, rdx
	mov	rcx, rax
	lea	rdx, .LC91[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 182
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+51]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	and	eax, 8
	test	eax, eax
	je	.L449
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+51]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	and	eax, 64
	test	eax, eax
	jne	.L449
	lea	rcx, __FUNCTION__.0[rip]
	lea	rdx, .LC92[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 183
	mov	eax, 0
	call	sim_log_debug
	mov	edi, 0
	call	HplAtm128Timer0AsyncP$Timer0$set
	jmp	.L450
.L449:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+51]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	and	eax, 64
	test	eax, eax
	setne	al
	movzx	ebx, al
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+51]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	and	eax, 8
	test	eax, eax
	setne	al
	movzx	r12d, al
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 51[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sub	rsp, 8
	push	rbx
	mov	r9d, r12d
	mov	r8d, eax
	lea	rcx, __FUNCTION__.0[rip]
	lea	rdx, .LC93[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 184
	mov	eax, 0
	call	sim_log_debug
	add	rsp, 16
.L450:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+55]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	and	eax, 2
	test	eax, eax
	je	.L451
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 54[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	ecx, eax
	lea	rdx, .LC94[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 185
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rcx, rax
	lea	rax, atm128RegFile[rip+54]
	movzx	eax, BYTE PTR [rcx+rax]
	and	eax, -3
	mov	ecx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+54]
	mov	BYTE PTR [rdx+rax], cl
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 54[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	ecx, eax
	lea	rdx, .LC94[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 186
	mov	eax, 0
	call	sim_log_debug
	lea	rax, -160[rbp]
	mov	rcx, rax
	lea	rdx, .LC95[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 187
	mov	eax, 0
	call	sim_log_debug
	call	INTERRUPT_15
	jmp	.L452
.L451:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rcx, rax
	lea	rax, atm128RegFile[rip+54]
	movzx	eax, BYTE PTR [rcx+rax]
	or	eax, 2
	mov	ecx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+54]
	mov	BYTE PTR [rdx+rax], cl
.L452:
	mov	rax, QWORD PTR -168[rbp]
	movzx	eax, BYTE PTR 17[rax]
	test	al, al
	jne	.L446
	mov	rax, QWORD PTR -168[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$configure_compare
	mov	rax, QWORD PTR -168[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	jmp	.L446
.L455:
	nop
.L446:
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L454
	call	__stack_chk_fail@PLT
.L454:
	lea	rsp, -16[rbp]
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE176:
	.size	HplAtm128Timer0AsyncP$timer0_compare_handle, .-HplAtm128Timer0AsyncP$timer0_compare_handle
	.section	.rodata
.LC96:
	.string	"Allocated compare at 0x%p\n"
	.text
	.type	HplAtm128Timer0AsyncP$allocate_compare, @function
HplAtm128Timer0AsyncP$allocate_compare:
.LFB177:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	sim_queue_allocate_event
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	lea	rdx, .LC96[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 188
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, HplAtm128Timer0AsyncP$timer0_compare_handle[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, sim_queue_cleanup_none[rip]
	mov	QWORD PTR 40[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE177:
	.size	HplAtm128Timer0AsyncP$allocate_compare, .-HplAtm128Timer0AsyncP$allocate_compare
	.type	Atm128AlarmAsyncP$0$Timer$overflow, @function
Atm128AlarmAsyncP$0$Timer$overflow:
.LFB178:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE178:
	.size	Atm128AlarmAsyncP$0$Timer$overflow, .-Atm128AlarmAsyncP$0$Timer$overflow
	.type	HplAtm128Timer0AsyncP$Timer0$overflow, @function
HplAtm128Timer0AsyncP$Timer0$overflow:
.LFB179:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	Atm128AlarmAsyncP$0$Timer$overflow
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE179:
	.size	HplAtm128Timer0AsyncP$Timer0$overflow, .-HplAtm128Timer0AsyncP$Timer0$overflow
	.type	CounterToLocalTimeC$0$Counter$overflow, @function
CounterToLocalTimeC$0$Counter$overflow:
.LFB180:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE180:
	.size	CounterToLocalTimeC$0$Counter$overflow, .-CounterToLocalTimeC$0$Counter$overflow
	.type	Atm128AlarmAsyncP$0$Counter$overflow, @function
Atm128AlarmAsyncP$0$Counter$overflow:
.LFB181:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	CounterToLocalTimeC$0$Counter$overflow
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE181:
	.size	Atm128AlarmAsyncP$0$Counter$overflow, .-Atm128AlarmAsyncP$0$Counter$overflow
	.type	__nesc_enable_interrupt, @function
__nesc_enable_interrupt:
.LFB182:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 63[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	movzx	eax, dl
	movsx	rcx, eax
	mov	rax, rbx
	sal	rax, 2
	add	rax, rbx
	sal	rax, 5
	add	rcx, rax
	lea	rax, atm128RegFile[rip]
	add	rax, rcx
	movzx	ecx, BYTE PTR [rax]
	movzx	eax, dl
	mov	edx, ecx
	or	edx, -128
	movsx	rcx, eax
	mov	rax, rbx
	sal	rax, 2
	add	rax, rbx
	sal	rax, 5
	add	rcx, rax
	lea	rax, atm128RegFile[rip]
	add	rax, rcx
	mov	BYTE PTR [rax], dl
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE182:
	.size	__nesc_enable_interrupt, .-__nesc_enable_interrupt
	.type	Atm128AlarmAsyncP$0$Compare$get, @function
Atm128AlarmAsyncP$0$Compare$get:
.LFB183:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	HplAtm128Timer0AsyncP$Compare$get
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE183:
	.size	Atm128AlarmAsyncP$0$Compare$get, .-Atm128AlarmAsyncP$0$Compare$get
	.type	Atm128AlarmAsyncP$0$Compare$fired, @function
Atm128AlarmAsyncP$0$Compare$fired:
.LFB184:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	call	Atm128AlarmAsyncP$0$Compare$get
	movzx	eax, al
	lea	ebx, 1[rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rcx, Atm128AlarmAsyncP$0$base[rip]
	mov	edx, DWORD PTR [rdx+rcx]
	lea	ecx, [rbx+rdx]
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	eax, DWORD PTR [rdx+rax]
	test	eax, eax
	sete	al
	movzx	eax, al
	mov	DWORD PTR -20[rbp], eax
	mov	eax, 0
	call	__nesc_enable_interrupt
	call	Atm128AlarmAsyncP$0$setInterrupt
	cmp	DWORD PTR -20[rbp], 0
	je	.L467
	call	Atm128AlarmAsyncP$0$Counter$overflow
.L467:
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE184:
	.size	Atm128AlarmAsyncP$0$Compare$fired, .-Atm128AlarmAsyncP$0$Compare$fired
	.type	HplAtm128Timer0AsyncP$Compare$fired, @function
HplAtm128Timer0AsyncP$Compare$fired:
.LFB185:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	Atm128AlarmAsyncP$0$Compare$fired
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE185:
	.size	HplAtm128Timer0AsyncP$Compare$fired, .-HplAtm128Timer0AsyncP$Compare$fired
	.type	AlarmToTimerC$0$fired$postTask, @function
AlarmToTimerC$0$fired$postTask:
.LFB186:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edi, 5
	call	SimSchedulerBasicP$TaskBasic$postTask
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE186:
	.size	AlarmToTimerC$0$fired$postTask, .-AlarmToTimerC$0$fired$postTask
	.type	AlarmToTimerC$0$Alarm$fired, @function
AlarmToTimerC$0$Alarm$fired:
.LFB187:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	AlarmToTimerC$0$fired$postTask
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE187:
	.size	AlarmToTimerC$0$Alarm$fired, .-AlarmToTimerC$0$Alarm$fired
	.type	Atm128AlarmAsyncP$0$Alarm$fired, @function
Atm128AlarmAsyncP$0$Alarm$fired:
.LFB188:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	AlarmToTimerC$0$Alarm$fired
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE188:
	.size	Atm128AlarmAsyncP$0$Alarm$fired, .-Atm128AlarmAsyncP$0$Alarm$fired
	.type	TossimPacketModelC$startDoneTask$postTask, @function
TossimPacketModelC$startDoneTask$postTask:
.LFB189:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edi, 0
	call	SimSchedulerBasicP$TaskBasic$postTask
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE189:
	.size	TossimPacketModelC$startDoneTask$postTask, .-TossimPacketModelC$startDoneTask$postTask
	.type	MotePlatformP$SubInit$default$init, @function
MotePlatformP$SubInit$default$init:
.LFB190:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE190:
	.size	MotePlatformP$SubInit$default$init, .-MotePlatformP$SubInit$default$init
	.type	MotePlatformP$SubInit$init, @function
MotePlatformP$SubInit$init:
.LFB191:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	MotePlatformP$SubInit$default$init
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE191:
	.size	MotePlatformP$SubInit$init, .-MotePlatformP$SubInit$init
	.type	HplAtm128GeneralIOPinP$4$IO$clr, @function
HplAtm128GeneralIOPinP$4$IO$clr:
.LFB192:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rcx, rax
	lea	rax, atm128RegFile[rip+27]
	movzx	eax, BYTE PTR [rcx+rax]
	and	eax, -17
	mov	ecx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+27]
	mov	BYTE PTR [rdx+rax], cl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE192:
	.size	HplAtm128GeneralIOPinP$4$IO$clr, .-HplAtm128GeneralIOPinP$4$IO$clr
	.type	MotePlatformP$SerialIdPin$clr, @function
MotePlatformP$SerialIdPin$clr:
.LFB193:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	HplAtm128GeneralIOPinP$4$IO$clr
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE193:
	.size	MotePlatformP$SerialIdPin$clr, .-MotePlatformP$SerialIdPin$clr
	.type	HplAtm128GeneralIOPinP$4$IO$makeInput, @function
HplAtm128GeneralIOPinP$4$IO$makeInput:
.LFB194:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rcx, rax
	lea	rax, atm128RegFile[rip+26]
	movzx	eax, BYTE PTR [rcx+rax]
	and	eax, -17
	mov	ecx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+26]
	mov	BYTE PTR [rdx+rax], cl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE194:
	.size	HplAtm128GeneralIOPinP$4$IO$makeInput, .-HplAtm128GeneralIOPinP$4$IO$makeInput
	.type	MotePlatformP$SerialIdPin$makeInput, @function
MotePlatformP$SerialIdPin$makeInput:
.LFB195:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	HplAtm128GeneralIOPinP$4$IO$makeInput
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE195:
	.size	MotePlatformP$SerialIdPin$makeInput, .-MotePlatformP$SerialIdPin$makeInput
	.type	MotePlatformP$PlatformInit$init, @function
MotePlatformP$PlatformInit$init:
.LFB196:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 21[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], 0
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 20[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], -1
	call	MotePlatformP$SerialIdPin$makeInput
	call	MotePlatformP$SerialIdPin$clr
	call	MotePlatformP$SubInit$init
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE196:
	.size	MotePlatformP$PlatformInit$init, .-MotePlatformP$PlatformInit$init
	.type	PlatformP$MoteInit$init, @function
PlatformP$MoteInit$init:
.LFB197:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	MotePlatformP$PlatformInit$init
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE197:
	.size	PlatformP$MoteInit$init, .-PlatformP$MoteInit$init
	.type	ecombine, @function
ecombine:
.LFB198:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edx, edi
	mov	eax, esi
	mov	BYTE PTR -4[rbp], dl
	mov	BYTE PTR -8[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	cmp	al, BYTE PTR -8[rbp]
	jne	.L488
	movzx	eax, BYTE PTR -4[rbp]
	jmp	.L490
.L488:
	mov	eax, 1
.L490:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE198:
	.size	ecombine, .-ecombine
	.type	MeasureClockC$Init$init, @function
MeasureClockC$Init$init:
.LFB199:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE199:
	.size	MeasureClockC$Init$init, .-MeasureClockC$Init$init
	.type	PlatformP$MeasureClock$init, @function
PlatformP$MeasureClock$init:
.LFB200:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	MeasureClockC$Init$init
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE200:
	.size	PlatformP$MeasureClock$init, .-PlatformP$MeasureClock$init
	.type	PlatformP$Init$init, @function
PlatformP$Init$init:
.LFB201:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	PlatformP$MeasureClock$init
	mov	BYTE PTR -1[rbp], al
	call	PlatformP$MoteInit$init
	movzx	edx, al
	movzx	eax, BYTE PTR -1[rbp]
	mov	esi, edx
	mov	edi, eax
	call	ecombine
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE201:
	.size	PlatformP$Init$init, .-PlatformP$Init$init
	.type	SimMainP$PlatformInit$init, @function
SimMainP$PlatformInit$init:
.LFB202:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	PlatformP$Init$init
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE202:
	.size	SimMainP$PlatformInit$init, .-SimMainP$PlatformInit$init
	.type	SimMainP$Scheduler$runNextTask, @function
SimMainP$Scheduler$runNextTask:
.LFB203:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	SimSchedulerBasicP$Scheduler$runNextTask
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE203:
	.size	SimMainP$Scheduler$runNextTask, .-SimMainP$Scheduler$runNextTask
	.section	.rodata
	.align 8
.LC97:
	.string	"TossimPacketModelC: Init.init() called\n"
	.text
	.type	TossimPacketModelC$Init$init, @function
TossimPacketModelC$Init$init:
.LFB204:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdx, .LC97[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 109
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$initialized[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, TossimPacketModelC$sendEvent[rip+17]
	mov	BYTE PTR [rdx+rax], 1
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE204:
	.size	TossimPacketModelC$Init$init, .-TossimPacketModelC$Init$init
	.type	HplAtm128Timer0AsyncP$Compare$start, @function
HplAtm128Timer0AsyncP$Compare$start:
.LFB205:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rcx, rax
	lea	rax, atm128RegFile[rip+55]
	movzx	eax, BYTE PTR [rcx+rax]
	or	eax, 2
	mov	ecx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+55]
	mov	BYTE PTR [rdx+rax], cl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE205:
	.size	HplAtm128Timer0AsyncP$Compare$start, .-HplAtm128Timer0AsyncP$Compare$start
	.type	Atm128AlarmAsyncP$0$Compare$start, @function
Atm128AlarmAsyncP$0$Compare$start:
.LFB206:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	HplAtm128Timer0AsyncP$Compare$start
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE206:
	.size	Atm128AlarmAsyncP$0$Compare$start, .-Atm128AlarmAsyncP$0$Compare$start
	.section	.rodata
.LC98:
	.string	"Setting control to be 0x%hhx\n"
	.text
	.type	HplAtm128Timer0AsyncP$Timer0Ctrl$setControl, @function
HplAtm128Timer0AsyncP$Timer0Ctrl$setControl:
.LFB207:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	movzx	eax, al
	mov	ecx, eax
	lea	rdx, .LC98[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 193
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 51[rax]
	lea	rax, atm128RegFile[rip]
	add	rdx, rax
	movzx	eax, BYTE PTR -1[rbp]
	mov	BYTE PTR [rdx], al
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE207:
	.size	HplAtm128Timer0AsyncP$Timer0Ctrl$setControl, .-HplAtm128Timer0AsyncP$Timer0Ctrl$setControl
	.type	Atm128AlarmAsyncP$0$TimerCtrl$setControl, @function
Atm128AlarmAsyncP$0$TimerCtrl$setControl:
.LFB208:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	BYTE PTR -1[rbp], dil
	movzx	eax, BYTE PTR -1[rbp]
	mov	edi, eax
	call	HplAtm128Timer0AsyncP$Timer0Ctrl$setControl
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE208:
	.size	Atm128AlarmAsyncP$0$TimerCtrl$setControl, .-Atm128AlarmAsyncP$0$TimerCtrl$setControl
	.type	HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous, @function
HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous:
.LFB209:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 48[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	edx, BYTE PTR [rax]
	or	edx, 8
	mov	BYTE PTR [rax], dl
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE209:
	.size	HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous, .-HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous
	.type	Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous, @function
Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous:
.LFB210:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE210:
	.size	Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous, .-Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous
	.type	Atm128AlarmAsyncP$0$Init$init, @function
Atm128AlarmAsyncP$0$Init$init:
.LFB211:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous
	mov	BYTE PTR -1[rbp], 0
	movzx	eax, BYTE PTR -1[rbp]
	and	eax, -8
	or	eax, 3
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	or	eax, 8
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	mov	edi, eax
	call	Atm128AlarmAsyncP$0$TimerCtrl$setControl
	mov	edi, 230
	call	Atm128AlarmAsyncP$0$Compare$set
	call	Atm128AlarmAsyncP$0$Compare$start
	call	Atm128AlarmAsyncP$0$setInterrupt
	mov	eax, 0
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE211:
	.size	Atm128AlarmAsyncP$0$Init$init, .-Atm128AlarmAsyncP$0$Init$init
	.type	RandomMlcgC$Init$init, @function
RandomMlcgC$Init$init:
.LFB212:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	movzx	eax, WORD PTR TOS_NODE_ID[rip]
	movzx	eax, ax
	lea	ebx, 1[rax]
	mov	eax, 0
	call	sim_node
	mov	ecx, ebx
	lea	rdx, 0[0+rax*4]
	lea	rax, RandomMlcgC$seed[rip]
	mov	DWORD PTR [rdx+rax], ecx
	mov	eax, 0
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE212:
	.size	RandomMlcgC$Init$init, .-RandomMlcgC$Init$init
	.type	SimMainP$SoftwareInit$init, @function
SimMainP$SoftwareInit$init:
.LFB213:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	RandomMlcgC$Init$init
	mov	BYTE PTR -1[rbp], al
	call	RandomMlcgC$Init$init
	movzx	edx, al
	movzx	eax, BYTE PTR -1[rbp]
	mov	esi, edx
	mov	edi, eax
	call	ecombine
	mov	BYTE PTR -1[rbp], al
	call	Atm128AlarmAsyncP$0$Init$init
	movzx	edx, al
	movzx	eax, BYTE PTR -1[rbp]
	mov	esi, edx
	mov	edi, eax
	call	ecombine
	mov	BYTE PTR -1[rbp], al
	call	TossimPacketModelC$Init$init
	movzx	edx, al
	movzx	eax, BYTE PTR -1[rbp]
	mov	esi, edx
	mov	edi, eax
	call	ecombine
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE213:
	.size	SimMainP$SoftwareInit$init, .-SimMainP$SoftwareInit$init
	.section	.rodata
.LC99:
	.string	"Application booted.\n"
.LC100:
	.string	"boot"
	.text
	.type	sendAckC$Boot$booted, @function
sendAckC$Boot$booted:
.LFB214:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdx, .LC99[rip]
	lea	rsi, .LC100[rip]
	mov	edi, 153
	mov	eax, 0
	call	sim_log_debug
	call	sendAckC$SplitControl$start
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE214:
	.size	sendAckC$Boot$booted, .-sendAckC$Boot$booted
	.type	SimMainP$Boot$booted, @function
SimMainP$Boot$booted:
.LFB215:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	sendAckC$Boot$booted
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE215:
	.size	SimMainP$Boot$booted, .-SimMainP$Boot$booted
	.type	SimMoteP$SimMote$getEuid, @function
SimMoteP$SimMote$getEuid:
.LFB216:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$euid[rip]
	mov	rax, QWORD PTR [rdx+rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE216:
	.size	SimMoteP$SimMote$getEuid, .-SimMoteP$SimMote$getEuid
	.type	SimMoteP$SimMote$setEuid, @function
SimMoteP$SimMote$setEuid:
.LFB217:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, SimMoteP$euid[rip]
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE217:
	.size	SimMoteP$SimMote$setEuid, .-SimMoteP$SimMote$setEuid
	.type	SimMoteP$SimMote$getVariableInfo, @function
SimMoteP$SimMote$getVariableInfo:
.LFB218:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	eax, 0
	call	sim_node
	mov	edi, eax
	mov	rcx, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	call	__nesc_nido_resolve
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE218:
	.size	SimMoteP$SimMote$getVariableInfo, .-SimMoteP$SimMote$getVariableInfo
	.type	SimMoteP$SimMote$turnOff, @function
SimMoteP$SimMote$turnOff:
.LFB219:
	.cfi_startproc
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, SimMoteP$isOn[rip]
	mov	BYTE PTR [rax+rdx], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE219:
	.size	SimMoteP$SimMote$turnOff, .-SimMoteP$SimMote$turnOff
	.section	.rodata
	.align 8
.LC101:
	.string	"Turning on mote %i at time %s.\n"
.LC102:
	.string	"SimMoteP"
	.text
	.type	SimMoteP$sim_mote_boot_handle, @function
SimMoteP$sim_mote_boot_handle:
.LFB220:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 160
	mov	QWORD PTR -152[rbp], rdi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -144[rbp]
	mov	esi, 128
	mov	rdi, rax
	call	sim_print_now
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, 0
	call	sim_node
	mov	edx, eax
	lea	rax, -144[rbp]
	mov	r8, rax
	mov	ecx, edx
	lea	rdx, .LC101[rip]
	lea	rsi, .LC102[rip]
	mov	edi, 103
	mov	eax, 0
	call	sim_log_debug
	call	SimMoteP$SimMote$turnOn
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L524
	call	__stack_chk_fail@PLT
.L524:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE220:
	.size	SimMoteP$sim_mote_boot_handle, .-SimMoteP$sim_mote_boot_handle
	.globl	sim_queue_init
	.type	sim_queue_init, @function
sim_queue_init:
.LFB221:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, eventHeap[rip]
	call	init_heap
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE221:
	.size	sim_queue_init, .-sim_queue_init
	.section	.rodata
.LC103:
	.string	"Inserting 0x%p\n"
.LC104:
	.string	"Queue"
	.text
	.globl	sim_queue_insert
	.type	sim_queue_insert, @function
sim_queue_insert:
.LFB222:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	lea	rdx, .LC103[rip]
	lea	rsi, .LC104[rip]
	mov	edi, 0
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, eventHeap[rip]
	call	heap_insert
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE222:
	.size	sim_queue_insert, .-sim_queue_insert
	.section	.rodata
.LC105:
	.string	"DEBUG (%i): "
	.text
	.type	sim_log_debug, @function
sim_log_debug:
.LFB223:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 256
	mov	QWORD PTR -240[rbp], rsi
	mov	QWORD PTR -248[rbp], rdx
	mov	QWORD PTR -152[rbp], rcx
	mov	QWORD PTR -144[rbp], r8
	mov	QWORD PTR -136[rbp], r9
	test	al, al
	je	.L528
	movaps	XMMWORD PTR -128[rbp], xmm0
	movaps	XMMWORD PTR -112[rbp], xmm1
	movaps	XMMWORD PTR -96[rbp], xmm2
	movaps	XMMWORD PTR -80[rbp], xmm3
	movaps	XMMWORD PTR -64[rbp], xmm4
	movaps	XMMWORD PTR -48[rbp], xmm5
	movaps	XMMWORD PTR -32[rbp], xmm6
	movaps	XMMWORD PTR -16[rbp], xmm7
.L528:
	mov	eax, edi
	mov	WORD PTR -228[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -184[rbp], rax
	xor	eax, eax
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	jne	.L529
	movzx	eax, WORD PTR -228[rbp]
	mov	rdx, QWORD PTR -240[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	fillInOutput
.L529:
	mov	DWORD PTR -220[rbp], 0
	jmp	.L530
.L531:
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -220[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -216[rbp], rax
	mov	DWORD PTR -208[rbp], 24
	mov	DWORD PTR -204[rbp], 48
	lea	rax, 16[rbp]
	mov	QWORD PTR -200[rbp], rax
	lea	rax, -176[rbp]
	mov	QWORD PTR -192[rbp], rax
	mov	eax, 0
	call	sim_node
	mov	edx, eax
	mov	rax, QWORD PTR -216[rbp]
	lea	rsi, .LC105[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	lea	rdx, -208[rbp]
	mov	rcx, QWORD PTR -248[rbp]
	mov	rax, QWORD PTR -216[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	vfprintf@PLT
	mov	rax, QWORD PTR -216[rbp]
	mov	rdi, rax
	call	fflush@PLT
	add	DWORD PTR -220[rbp], 1
.L530:
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	DWORD PTR -220[rbp], eax
	jl	.L531
	nop
	mov	rax, QWORD PTR -184[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L532
	call	__stack_chk_fail@PLT
.L532:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE223:
	.size	sim_log_debug, .-sim_log_debug
	.type	fillInOutput, @function
fillInOutput:
.LFB224:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 88
	.cfi_offset 3, -24
	mov	DWORD PTR -84[rbp], edi
	mov	QWORD PTR -96[rbp], rsi
	mov	rax, QWORD PTR -96[rbp]
	mov	QWORD PTR -56[rbp], rax
	mov	rax, QWORD PTR -96[rbp]
	mov	QWORD PTR -48[rbp], rax
	mov	DWORD PTR -76[rbp], 0
	mov	rax, QWORD PTR -96[rbp]
	mov	rdi, rax
	call	strlen@PLT
	add	eax, 1
	mov	edi, eax
	call	malloc@PLT
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -96[rbp]
	mov	rdi, rax
	call	strlen@PLT
	lea	edx, 1[rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	jmp	.L534
.L538:
	mov	rax, QWORD PTR -48[rbp]
	mov	esi, 44
	mov	rdi, rax
	call	strrchr@PLT
	mov	QWORD PTR -56[rbp], rax
	cmp	QWORD PTR -56[rbp], 0
	jne	.L535
	mov	rdx, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	strcpy@PLT
	jmp	.L536
.L535:
	mov	rax, QWORD PTR -56[rbp]
	sub	rax, QWORD PTR -48[rbp]
	mov	edx, eax
	mov	rcx, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -56[rbp]
	sub	rax, QWORD PTR -48[rbp]
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	BYTE PTR [rax], 0
.L536:
	mov	rax, QWORD PTR channelTable[rip]
	mov	rdx, QWORD PTR -40[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	je	.L537
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR 8[rax]
	add	DWORD PTR -76[rbp], eax
.L537:
	mov	rax, QWORD PTR -56[rbp]
	add	rax, 1
	mov	QWORD PTR -48[rbp], rax
.L534:
	cmp	QWORD PTR -56[rbp], 0
	jne	.L538
	mov	rax, QWORD PTR -96[rbp]
	mov	QWORD PTR -56[rbp], rax
	mov	rax, QWORD PTR -96[rbp]
	mov	QWORD PTR -48[rbp], rax
	mov	eax, DWORD PTR -76[rbp]
	cdqe
	sal	eax, 3
	mov	edi, eax
	call	malloc@PLT
	mov	rcx, rax
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	DWORD PTR [rdx+rax], 0
	jmp	.L539
.L549:
	mov	rax, QWORD PTR -48[rbp]
	mov	esi, 44
	mov	rdi, rax
	call	strrchr@PLT
	mov	QWORD PTR -56[rbp], rax
	cmp	QWORD PTR -56[rbp], 0
	jne	.L540
	mov	rdx, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	strcpy@PLT
	jmp	.L541
.L540:
	mov	rax, QWORD PTR -56[rbp]
	sub	rax, QWORD PTR -48[rbp]
	mov	edx, eax
	mov	rcx, QWORD PTR -48[rbp]
	mov	rax, QWORD PTR -40[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -56[rbp]
	sub	rax, QWORD PTR -48[rbp]
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	BYTE PTR [rax], 0
.L541:
	mov	rax, QWORD PTR channelTable[rip]
	mov	rdx, QWORD PTR -40[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	je	.L542
	mov	DWORD PTR -72[rbp], 0
	jmp	.L543
.L548:
	mov	DWORD PTR -64[rbp], 0
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -60[rbp], eax
	mov	DWORD PTR -68[rbp], 0
	jmp	.L544
.L546:
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -68[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	fileno@PLT
	mov	ebx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	fileno@PLT
	cmp	ebx, eax
	jne	.L545
	mov	DWORD PTR -64[rbp], 1
	mov	eax, DWORD PTR -60[rbp]
	mov	DWORD PTR -68[rbp], eax
.L545:
	add	DWORD PTR -68[rbp], 1
.L544:
	mov	eax, DWORD PTR -68[rbp]
	cmp	eax, DWORD PTR -60[rbp]
	jl	.L546
	cmp	DWORD PTR -64[rbp], 0
	jne	.L547
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	eax, DWORD PTR -72[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	mov	edx, DWORD PTR -84[rbp]
	movsx	rdx, edx
	mov	rcx, rdx
	sal	rcx, 4
	lea	rdx, outputs[rip+8]
	mov	rcx, QWORD PTR [rcx+rdx]
	mov	edx, DWORD PTR -60[rbp]
	movsx	rdx, edx
	sal	rdx, 3
	add	rdx, rcx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR [rdx], rax
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	eax, DWORD PTR [rdx+rax]
	lea	ecx, 1[rax]
	mov	eax, DWORD PTR -84[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	DWORD PTR [rdx+rax], ecx
.L547:
	add	DWORD PTR -72[rbp], 1
.L543:
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 8[rax]
	cmp	DWORD PTR -72[rbp], eax
	jl	.L548
.L542:
	mov	rax, QWORD PTR -56[rbp]
	add	rax, 1
	mov	QWORD PTR -48[rbp], rax
.L539:
	cmp	QWORD PTR -56[rbp], 0
	jne	.L549
	nop
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE224:
	.size	fillInOutput, .-fillInOutput
	.globl	sim_node
	.type	sim_node, @function
sim_node:
.LFB225:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	rax, QWORD PTR current_node[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE225:
	.size	sim_node, .-sim_node
	.type	up_heap, @function
up_heap:
.LFB226:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	cmp	DWORD PTR -28[rbp], 0
	je	.L555
	mov	eax, DWORD PTR -28[rbp]
	sub	eax, 1
	mov	edx, eax
	shr	edx, 31
	add	eax, edx
	sar	eax
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	add	rax, rdx
	mov	rdx, QWORD PTR 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 4
	add	rax, rcx
	mov	rax, QWORD PTR 8[rax]
	cmp	rdx, rax
	jle	.L552
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	add	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rcx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 4
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	call	swap
	mov	edx, DWORD PTR -4[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	up_heap
	jmp	.L552
.L555:
	nop
.L552:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE226:
	.size	up_heap, .-up_heap
	.type	swap, @function
swap:
.LFB227:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR 8[rax], rdx
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -16[rbp]
	mov	QWORD PTR 8[rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR [rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR [rax], rdx
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE227:
	.size	swap, .-swap
	.globl	sim_queue_pop
	.type	sim_queue_pop, @function
sim_queue_pop:
.LFB228:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -16[rbp]
	mov	rsi, rax
	lea	rdi, eventHeap[rip]
	call	heap_pop_min_data
	mov	rdx, QWORD PTR -8[rbp]
	sub	rdx, QWORD PTR fs:40
	je	.L559
	call	__stack_chk_fail@PLT
.L559:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE228:
	.size	sim_queue_pop, .-sim_queue_pop
	.type	heap_pop_min_data, @function
heap_pop_min_data:
.LFB229:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	QWORD PTR -32[rbp], rsi
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	sub	eax, 1
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	je	.L561
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	rdx, QWORD PTR 8[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rax], rdx
.L561:
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	sal	rax, 4
	add	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	rdx, QWORD PTR [rdx]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	sal	rax, 4
	add	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	rdx, QWORD PTR 8[rdx]
	mov	QWORD PTR 8[rax], rdx
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	lea	edx, -1[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, 0
	mov	rdi, rax
	call	down_heap
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE229:
	.size	heap_pop_min_data, .-heap_pop_min_data
	.type	down_heap, @function
down_heap:
.LFB230:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -56[rbp], rdi
	mov	DWORD PTR -60[rbp], esi
	mov	eax, DWORD PTR -60[rbp]
	add	eax, 1
	add	eax, eax
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -60[rbp]
	add	eax, eax
	add	eax, 1
	mov	DWORD PTR -32[rbp], eax
	mov	rax, QWORD PTR -56[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -36[rbp], eax
	jge	.L564
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	sal	rax, 4
	add	rax, rdx
	mov	rax, QWORD PTR 8[rax]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	sal	rax, 4
	add	rax, rdx
	mov	rax, QWORD PTR 8[rax]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	cmp	rax, QWORD PTR -8[rbp]
	jge	.L565
	mov	eax, DWORD PTR -32[rbp]
	jmp	.L566
.L565:
	mov	eax, DWORD PTR -36[rbp]
.L566:
	mov	DWORD PTR -28[rbp], eax
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 4
	add	rax, rdx
	mov	rdx, QWORD PTR 8[rax]
	mov	rax, QWORD PTR -56[rbp]
	mov	rcx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -60[rbp]
	cdqe
	sal	rax, 4
	add	rax, rcx
	mov	rax, QWORD PTR 8[rax]
	cmp	rdx, rax
	jge	.L563
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	sal	rax, 4
	add	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rcx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -60[rbp]
	cdqe
	sal	rax, 4
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	call	swap
	mov	edx, DWORD PTR -28[rbp]
	mov	rax, QWORD PTR -56[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	down_heap
	jmp	.L563
.L564:
	mov	rax, QWORD PTR -56[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -32[rbp], eax
	jge	.L569
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	sal	rax, 4
	add	rax, rdx
	mov	rax, QWORD PTR 8[rax]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -60[rbp]
	cdqe
	sal	rax, 4
	add	rax, rdx
	mov	rax, QWORD PTR 8[rax]
	cmp	QWORD PTR -24[rbp], rax
	jge	.L563
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -32[rbp]
	cdqe
	sal	rax, 4
	add	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rcx, QWORD PTR 8[rax]
	mov	eax, DWORD PTR -60[rbp]
	cdqe
	sal	rax, 4
	add	rax, rcx
	mov	rsi, rdx
	mov	rdi, rax
	call	swap
	jmp	.L563
.L569:
	nop
.L563:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE230:
	.size	down_heap, .-down_heap
	.globl	sim_queue_is_empty
	.type	sim_queue_is_empty, @function
sim_queue_is_empty:
.LFB231:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, eventHeap[rip]
	call	heap_is_empty
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE231:
	.size	sim_queue_is_empty, .-sim_queue_is_empty
	.globl	sim_queue_peek_time
	.type	sim_queue_peek_time, @function
sim_queue_peek_time:
.LFB232:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	lea	rdi, eventHeap[rip]
	call	heap_is_empty
	test	eax, eax
	je	.L573
	mov	rax, -1
	jmp	.L574
.L573:
	lea	rdi, eventHeap[rip]
	call	heap_get_min_key
.L574:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE232:
	.size	sim_queue_peek_time, .-sim_queue_peek_time
	.section	.rodata
.LC106:
	.string	"cleanup_none: 0x%p\n"
	.text
	.globl	sim_queue_cleanup_none
	.type	sim_queue_cleanup_none, @function
sim_queue_cleanup_none:
.LFB233:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	lea	rdx, .LC106[rip]
	lea	rsi, .LC104[rip]
	mov	edi, 1
	mov	eax, 0
	call	sim_log_debug
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE233:
	.size	sim_queue_cleanup_none, .-sim_queue_cleanup_none
	.section	.rodata
.LC107:
	.string	"cleanup_event: 0x%p\n"
	.text
	.globl	sim_queue_cleanup_event
	.type	sim_queue_cleanup_event, @function
sim_queue_cleanup_event:
.LFB234:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	lea	rdx, .LC107[rip]
	lea	rsi, .LC104[rip]
	mov	edi, 2
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE234:
	.size	sim_queue_cleanup_event, .-sim_queue_cleanup_event
	.section	.rodata
.LC108:
	.string	"cleanup_data: 0x%p\n"
	.text
	.globl	sim_queue_cleanup_data
	.type	sim_queue_cleanup_data, @function
sim_queue_cleanup_data:
.LFB235:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	lea	rdx, .LC108[rip]
	lea	rsi, .LC104[rip]
	mov	edi, 3
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 24[rax]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 24[rax], 0
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE235:
	.size	sim_queue_cleanup_data, .-sim_queue_cleanup_data
	.section	.rodata
.LC109:
	.string	"cleanup_total: 0x%p\n"
	.text
	.globl	sim_queue_cleanup_total
	.type	sim_queue_cleanup_total, @function
sim_queue_cleanup_total:
.LFB236:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rcx, rax
	lea	rdx, .LC109[rip]
	lea	rsi, .LC104[rip]
	mov	edi, 4
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 24[rax]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 24[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE236:
	.size	sim_queue_cleanup_total, .-sim_queue_cleanup_total
	.globl	sim_init
	.type	sim_init, @function
sim_init:
.LFB237:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, 0
	call	sim_queue_init
	mov	eax, 0
	call	sim_log_init
	mov	eax, 0
	call	sim_log_commit_change
	mov	eax, 0
	call	sim_noise_init
	lea	rax, -32[rbp]
	mov	esi, 0
	mov	rdi, rax
	call	gettimeofday@PLT
	mov	rax, QWORD PTR -24[rbp]
	test	rax, rax
	je	.L580
	mov	rax, QWORD PTR -24[rbp]
	mov	edi, eax
	call	sim_random_seed
	jmp	.L583
.L580:
	mov	rax, QWORD PTR -32[rbp]
	mov	edi, eax
	call	sim_random_seed
.L583:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L582
	call	__stack_chk_fail@PLT
.L582:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE237:
	.size	sim_init, .-sim_init
	.type	sim_log_commit_change, @function
sim_log_commit_change:
.LFB238:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], 0
	jmp	.L585
.L587:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L586
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	DWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	free@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	QWORD PTR [rdx+rax], 0
.L586:
	add	DWORD PTR -4[rbp], 1
.L585:
	cmp	DWORD PTR -4[rbp], 202
	jle	.L587
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE238:
	.size	sim_log_commit_change, .-sim_log_commit_change
	.globl	sim_noise_init
	.type	sim_noise_init, @function
sim_noise_init:
.LFB239:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], 0
	jmp	.L589
.L590:
	lea	rdx, sim_noise_eq[rip]
	lea	rsi, sim_noise_hash[rip]
	mov	edi, 128
	call	create_hashtable@PLT
	mov	rdx, rax
	mov	eax, DWORD PTR -4[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	sal	rax, 2
	add	rax, rcx
	sal	rax, 4
	mov	rcx, rax
	lea	rax, noiseData[rip+48]
	mov	QWORD PTR [rcx+rax], rdx
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+44]
	mov	DWORD PTR [rdx+rax], 0
	mov	edi, 128
	call	malloc@PLT
	mov	rcx, rax
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+64]
	mov	DWORD PTR [rdx+rax], 128
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+68]
	mov	DWORD PTR [rdx+rax], 0
	add	DWORD PTR -4[rbp], 1
.L589:
	cmp	DWORD PTR -4[rbp], 999
	jle	.L590
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE239:
	.size	sim_noise_init, .-sim_noise_init
	.globl	sim_random_seed
	.type	sim_random_seed, @function
sim_random_seed:
.LFB240:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 0
	jne	.L592
	mov	DWORD PTR -4[rbp], 1
.L592:
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR sim_seed[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE240:
	.size	sim_random_seed, .-sim_random_seed
	.globl	sim_end
	.type	sim_end, @function
sim_end:
.LFB241:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_queue_init
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE241:
	.size	sim_end, .-sim_end
	.globl	sim_random
	.type	sim_random, @function
sim_random:
.LFB242:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR sim_seed[rip]
	cdqe
	imul	rax, rax, 33614
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR -16[rbp], eax
	shr	DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 32
	mov	DWORD PTR -12[rbp], eax
	mov	edx, DWORD PTR -12[rbp]
	mov	eax, DWORD PTR -16[rbp]
	add	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	test	eax, eax
	jns	.L595
	and	DWORD PTR -20[rbp], 2147483647
	add	DWORD PTR -20[rbp], 1
.L595:
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR sim_seed[rip], eax
	mov	eax, DWORD PTR -20[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE242:
	.size	sim_random, .-sim_random
	.globl	sim_time
	.type	sim_time, @function
sim_time:
.LFB243:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	rax, QWORD PTR sim_ticks[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE243:
	.size	sim_time, .-sim_time
	.globl	sim_set_time
	.type	sim_set_time, @function
sim_set_time:
.LFB244:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR sim_ticks[rip], rax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE244:
	.size	sim_set_time, .-sim_set_time
	.globl	sim_ticks_per_sec
	.type	sim_ticks_per_sec, @function
sim_ticks_per_sec:
.LFB245:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movabs	rax, 10000000000
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE245:
	.size	sim_ticks_per_sec, .-sim_ticks_per_sec
	.globl	sim_set_node
	.type	sim_set_node, @function
sim_set_node:
.LFB246:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR current_node[rip], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	WORD PTR TOS_NODE_ID[rip], ax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE246:
	.size	sim_set_node, .-sim_set_node
	.section	.rodata
	.align 8
.LC110:
	.string	"CORE: popping event 0x%p for %i at %llu with handler %p... "
.LC111:
	.string	"Tossim"
	.align 8
.LC112:
	.string	" mote is on (or forced event), run it.\n"
.LC113:
	.string	"\n"
	.text
	.globl	sim_run_next_event
	.type	sim_run_next_event, @function
sim_run_next_event:
.LFB247:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	sub	rsp, 16
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	BYTE PTR -25[rbp], 0
	mov	eax, 0
	call	sim_queue_is_empty
	test	al, al
	jne	.L604
	mov	eax, 0
	call	sim_queue_pop
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR [rax]
	mov	rdi, rax
	call	sim_set_time
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	rdi, rax
	call	sim_set_node
	mov	rax, QWORD PTR -24[rbp]
	mov	rbx, QWORD PTR 32[rax]
	mov	eax, 0
	call	sim_time
	mov	r12, rax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	sub	rsp, 8
	push	rbx
	mov	r9, r12
	mov	r8, rdx
	mov	rcx, rax
	lea	rdx, .LC110[rip]
	lea	rsi, .LC111[rip]
	mov	edi, 5
	mov	eax, 0
	call	sim_log_debug
	add	rsp, 16
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 8[rax]
	mov	edi, eax
	call	sim_mote_is_on
	test	al, al
	jne	.L605
	mov	rax, QWORD PTR -24[rbp]
	movzx	eax, BYTE PTR 16[rax]
	test	al, al
	je	.L606
.L605:
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 32[rax]
	test	rax, rax
	je	.L606
	mov	BYTE PTR -25[rbp], 1
	lea	rdx, .LC112[rip]
	lea	rsi, .LC111[rip]
	mov	edi, 6
	mov	eax, 0
	call	sim_log_debug_clear
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 32[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rdx
	jmp	.L607
.L606:
	lea	rdx, .LC113[rip]
	lea	rsi, .LC111[rip]
	mov	edi, 7
	mov	eax, 0
	call	sim_log_debug_clear
.L607:
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 40[rax]
	test	rax, rax
	je	.L604
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 40[rax]
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	rdx
.L604:
	movzx	eax, BYTE PTR -25[rbp]
	lea	rsp, -16[rbp]
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE247:
	.size	sim_run_next_event, .-sim_run_next_event
	.globl	sim_mote_is_on
	.type	sim_mote_is_on, @function
sim_mote_is_on:
.LFB248:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	call	SimMoteP$SimMote$isOn
	mov	BYTE PTR -5[rbp], al
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	movzx	eax, BYTE PTR -5[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE248:
	.size	sim_mote_is_on, .-sim_mote_is_on
	.type	sim_log_debug_clear, @function
sim_log_debug_clear:
.LFB249:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 256
	mov	QWORD PTR -240[rbp], rsi
	mov	QWORD PTR -248[rbp], rdx
	mov	QWORD PTR -152[rbp], rcx
	mov	QWORD PTR -144[rbp], r8
	mov	QWORD PTR -136[rbp], r9
	test	al, al
	je	.L612
	movaps	XMMWORD PTR -128[rbp], xmm0
	movaps	XMMWORD PTR -112[rbp], xmm1
	movaps	XMMWORD PTR -96[rbp], xmm2
	movaps	XMMWORD PTR -80[rbp], xmm3
	movaps	XMMWORD PTR -64[rbp], xmm4
	movaps	XMMWORD PTR -48[rbp], xmm5
	movaps	XMMWORD PTR -32[rbp], xmm6
	movaps	XMMWORD PTR -16[rbp], xmm7
.L612:
	mov	eax, edi
	mov	WORD PTR -228[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -184[rbp], rax
	xor	eax, eax
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	jne	.L613
	movzx	eax, WORD PTR -228[rbp]
	mov	rdx, QWORD PTR -240[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	fillInOutput
.L613:
	mov	DWORD PTR -220[rbp], 0
	jmp	.L614
.L615:
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -220[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -216[rbp], rax
	mov	DWORD PTR -208[rbp], 24
	mov	DWORD PTR -204[rbp], 48
	lea	rax, 16[rbp]
	mov	QWORD PTR -200[rbp], rax
	lea	rax, -176[rbp]
	mov	QWORD PTR -192[rbp], rax
	lea	rdx, -208[rbp]
	mov	rcx, QWORD PTR -248[rbp]
	mov	rax, QWORD PTR -216[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	vfprintf@PLT
	mov	rax, QWORD PTR -216[rbp]
	mov	rdi, rax
	call	fflush@PLT
	add	DWORD PTR -220[rbp], 1
.L614:
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	DWORD PTR -220[rbp], eax
	jl	.L615
	nop
	mov	rax, QWORD PTR -184[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L616
	call	__stack_chk_fail@PLT
.L616:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE249:
	.size	sim_log_debug_clear, .-sim_log_debug_clear
	.section	.rodata
.LC114:
	.string	"%i:%i:%i.%09llu"
	.text
	.globl	sim_print_time
	.type	sim_print_time, @function
sim_print_time:
.LFB250:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	QWORD PTR -40[rbp], rdi
	mov	DWORD PTR -44[rbp], esi
	mov	QWORD PTR -56[rbp], rdx
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rcx, rax
	mov	rax, QWORD PTR -56[rbp]
	cqo
	idiv	rcx
	mov	QWORD PTR -8[rbp], rdx
	mov	eax, 0
	call	sim_ticks_per_sec
	cmp	rax, 1000000000
	jle	.L618
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rcx, rax
	movabs	rdx, 1237940039285380275
	mov	rax, rcx
	imul	rdx
	mov	rax, rdx
	sar	rax, 26
	sar	rcx, 63
	sub	rax, rcx
	mov	rsi, rax
	mov	rax, QWORD PTR -8[rbp]
	cqo
	idiv	rsi
	mov	QWORD PTR -8[rbp], rax
	jmp	.L619
.L618:
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rsi, rax
	mov	eax, 1000000000
	cqo
	idiv	rsi
	mov	rdx, rax
	mov	rax, QWORD PTR -8[rbp]
	imul	rax, rdx
	mov	QWORD PTR -8[rbp], rax
.L619:
	mov	eax, 0
	call	sim_ticks_per_sec
	mov	rdi, rax
	mov	rax, QWORD PTR -56[rbp]
	cqo
	idiv	rdi
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	edx, edx, 60
	sub	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	movsx	rdx, eax
	imul	rdx, rdx, -2004318071
	shr	rdx, 32
	add	edx, eax
	sar	edx, 5
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	edx, edx, 60
	sub	eax, edx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -44[rbp]
	cdqe
	lea	rdx, -1[rax]
	mov	rax, QWORD PTR -40[rbp]
	add	rax, rdx
	mov	BYTE PTR [rax], 0
	mov	eax, DWORD PTR -44[rbp]
	sub	eax, 1
	mov	edi, eax
	mov	esi, DWORD PTR -20[rbp]
	mov	ecx, DWORD PTR -16[rbp]
	mov	edx, DWORD PTR -12[rbp]
	mov	rax, QWORD PTR -40[rbp]
	sub	rsp, 8
	push	QWORD PTR -8[rbp]
	mov	r9d, esi
	mov	r8d, ecx
	mov	ecx, edx
	lea	rdx, .LC114[rip]
	mov	esi, edi
	mov	rdi, rax
	mov	eax, 0
	call	snprintf@PLT
	add	rsp, 16
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE250:
	.size	sim_print_time, .-sim_print_time
	.globl	sim_print_now
	.type	sim_print_now, @function
sim_print_now:
.LFB251:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	DWORD PTR -12[rbp], esi
	mov	eax, 0
	call	sim_time
	mov	rdx, rax
	mov	ecx, DWORD PTR -12[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, ecx
	mov	rdi, rax
	call	sim_print_time
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE251:
	.size	sim_print_now, .-sim_print_now
	.globl	sim_time_string
	.type	sim_time_string, @function
sim_time_string:
.LFB252:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	esi, 128
	lea	rdi, simTimeBuf[rip]
	call	sim_print_now
	lea	rax, simTimeBuf[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE252:
	.size	sim_time_string, .-sim_time_string
	.globl	sim_add_channel
	.type	sim_add_channel, @function
sim_add_channel:
.LFB253:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	sim_log_add_channel
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE253:
	.size	sim_add_channel, .-sim_add_channel
	.globl	sim_remove_channel
	.type	sim_remove_channel, @function
sim_remove_channel:
.LFB254:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	rdx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	sim_log_remove_channel
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE254:
	.size	sim_remove_channel, .-sim_remove_channel
	.globl	sim_csma_init_high
	.type	sim_csma_init_high, @function
sim_csma_init_high:
.LFB255:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaInitHigh[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE255:
	.size	sim_csma_init_high, .-sim_csma_init_high
	.globl	sim_csma_init_low
	.type	sim_csma_init_low, @function
sim_csma_init_low:
.LFB256:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaInitLow[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE256:
	.size	sim_csma_init_low, .-sim_csma_init_low
	.globl	sim_csma_high
	.type	sim_csma_high, @function
sim_csma_high:
.LFB257:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaHigh[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE257:
	.size	sim_csma_high, .-sim_csma_high
	.globl	sim_csma_low
	.type	sim_csma_low, @function
sim_csma_low:
.LFB258:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaLow[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE258:
	.size	sim_csma_low, .-sim_csma_low
	.globl	sim_csma_symbols_per_sec
	.type	sim_csma_symbols_per_sec, @function
sim_csma_symbols_per_sec:
.LFB259:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaSymbolsPerSec[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE259:
	.size	sim_csma_symbols_per_sec, .-sim_csma_symbols_per_sec
	.globl	sim_csma_bits_per_symbol
	.type	sim_csma_bits_per_symbol, @function
sim_csma_bits_per_symbol:
.LFB260:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaBitsPerSymbol[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE260:
	.size	sim_csma_bits_per_symbol, .-sim_csma_bits_per_symbol
	.globl	sim_csma_preamble_length
	.type	sim_csma_preamble_length, @function
sim_csma_preamble_length:
.LFB261:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaPreambleLength[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE261:
	.size	sim_csma_preamble_length, .-sim_csma_preamble_length
	.globl	sim_csma_exponent_base
	.type	sim_csma_exponent_base, @function
sim_csma_exponent_base:
.LFB262:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaExponentBase[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE262:
	.size	sim_csma_exponent_base, .-sim_csma_exponent_base
	.globl	sim_csma_max_iterations
	.type	sim_csma_max_iterations, @function
sim_csma_max_iterations:
.LFB263:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaMaxIterations[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE263:
	.size	sim_csma_max_iterations, .-sim_csma_max_iterations
	.globl	sim_csma_min_free_samples
	.type	sim_csma_min_free_samples, @function
sim_csma_min_free_samples:
.LFB264:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaMinFreeSamples[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE264:
	.size	sim_csma_min_free_samples, .-sim_csma_min_free_samples
	.globl	sim_csma_rxtx_delay
	.type	sim_csma_rxtx_delay, @function
sim_csma_rxtx_delay:
.LFB265:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaRxTxDelay[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE265:
	.size	sim_csma_rxtx_delay, .-sim_csma_rxtx_delay
	.globl	sim_csma_ack_time
	.type	sim_csma_ack_time, @function
sim_csma_ack_time:
.LFB266:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, DWORD PTR csmaAckTime[rip]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE266:
	.size	sim_csma_ack_time, .-sim_csma_ack_time
	.globl	sim_csma_set_init_high
	.type	sim_csma_set_init_high, @function
sim_csma_set_init_high:
.LFB267:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaInitHigh[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE267:
	.size	sim_csma_set_init_high, .-sim_csma_set_init_high
	.globl	sim_csma_set_init_low
	.type	sim_csma_set_init_low, @function
sim_csma_set_init_low:
.LFB268:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaInitLow[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE268:
	.size	sim_csma_set_init_low, .-sim_csma_set_init_low
	.globl	sim_csma_set_high
	.type	sim_csma_set_high, @function
sim_csma_set_high:
.LFB269:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaHigh[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE269:
	.size	sim_csma_set_high, .-sim_csma_set_high
	.globl	sim_csma_set_low
	.type	sim_csma_set_low, @function
sim_csma_set_low:
.LFB270:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaLow[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE270:
	.size	sim_csma_set_low, .-sim_csma_set_low
	.globl	sim_csma_set_symbols_per_sec
	.type	sim_csma_set_symbols_per_sec, @function
sim_csma_set_symbols_per_sec:
.LFB271:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaSymbolsPerSec[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE271:
	.size	sim_csma_set_symbols_per_sec, .-sim_csma_set_symbols_per_sec
	.globl	sim_csma_set_bits_per_symbol
	.type	sim_csma_set_bits_per_symbol, @function
sim_csma_set_bits_per_symbol:
.LFB272:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaBitsPerSymbol[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE272:
	.size	sim_csma_set_bits_per_symbol, .-sim_csma_set_bits_per_symbol
	.globl	sim_csma_set_preamble_length
	.type	sim_csma_set_preamble_length, @function
sim_csma_set_preamble_length:
.LFB273:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaPreambleLength[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE273:
	.size	sim_csma_set_preamble_length, .-sim_csma_set_preamble_length
	.globl	sim_csma_set_exponent_base
	.type	sim_csma_set_exponent_base, @function
sim_csma_set_exponent_base:
.LFB274:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaExponentBase[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE274:
	.size	sim_csma_set_exponent_base, .-sim_csma_set_exponent_base
	.globl	sim_csma_set_max_iterations
	.type	sim_csma_set_max_iterations, @function
sim_csma_set_max_iterations:
.LFB275:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaMaxIterations[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE275:
	.size	sim_csma_set_max_iterations, .-sim_csma_set_max_iterations
	.globl	sim_csma_set_min_free_samples
	.type	sim_csma_set_min_free_samples, @function
sim_csma_set_min_free_samples:
.LFB276:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaMinFreeSamples[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE276:
	.size	sim_csma_set_min_free_samples, .-sim_csma_set_min_free_samples
	.globl	sim_csma_set_rxtx_delay
	.type	sim_csma_set_rxtx_delay, @function
sim_csma_set_rxtx_delay:
.LFB277:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaRxTxDelay[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE277:
	.size	sim_csma_set_rxtx_delay, .-sim_csma_set_rxtx_delay
	.globl	sim_csma_set_ack_time
	.type	sim_csma_set_ack_time, @function
sim_csma_set_ack_time:
.LFB278:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	mov	DWORD PTR csmaAckTime[rip], eax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE278:
	.size	sim_csma_set_ack_time, .-sim_csma_set_ack_time
	.globl	sim_gain_first
	.type	sim_gain_first, @function
sim_gain_first:
.LFB279:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	cmp	DWORD PTR -4[rbp], 1000
	jle	.L665
	mov	rax, QWORD PTR connectivity[rip+8000]
	jmp	.L666
.L665:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, connectivity[rip]
	mov	rax, QWORD PTR [rdx+rax]
.L666:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE279:
	.size	sim_gain_first, .-sim_gain_first
	.globl	sim_gain_next
	.type	sim_gain_next, @function
sim_gain_next:
.LFB280:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 16[rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE280:
	.size	sim_gain_next, .-sim_gain_next
	.section	.rodata
	.align 8
.LC115:
	.string	"Adding link from %i to %i with gain %f\n"
.LC116:
	.string	"Gain"
	.text
	.globl	sim_gain_add
	.type	sim_gain_add, @function
sim_gain_add:
.LFB281:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	movsd	QWORD PTR -32[rbp], xmm0
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -20[rbp], 1000
	jle	.L670
	mov	DWORD PTR -20[rbp], 1000
.L670:
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, DWORD PTR -20[rbp]
	mov	edi, eax
	call	sim_gain_first
	mov	QWORD PTR -8[rbp], rax
	jmp	.L671
.L674:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -24[rbp], eax
	jne	.L672
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	jmp	.L673
.L672:
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	QWORD PTR -8[rbp], rax
.L671:
	cmp	QWORD PTR -8[rbp], 0
	jne	.L674
.L673:
	cmp	QWORD PTR -8[rbp], 0
	jne	.L675
	mov	eax, DWORD PTR -24[rbp]
	mov	edi, eax
	call	sim_gain_allocate_link
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, connectivity[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 16[rax], rdx
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	lea	rcx, 0[0+rax*8]
	lea	rdx, connectivity[rip]
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR [rcx+rdx], rax
.L675:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR -32[rbp]
	movsd	QWORD PTR 8[rax], xmm0
	mov	rdx, QWORD PTR -32[rbp]
	mov	ecx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	movq	xmm0, rdx
	mov	r8d, ecx
	mov	ecx, eax
	lea	rdx, .LC115[rip]
	lea	rsi, .LC116[rip]
	mov	edi, 8
	mov	eax, 1
	call	sim_log_debug
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE281:
	.size	sim_gain_add, .-sim_gain_add
	.section	.rodata
	.align 8
.LC117:
	.string	"Getting link from %i to %i with gain %f\n"
	.align 8
.LC118:
	.string	"Getting default link from %i to %i with gain %f\n"
	.text
	.globl	sim_gain_value
	.type	sim_gain_value, @function
sim_gain_value:
.LFB282:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, DWORD PTR -20[rbp]
	mov	edi, eax
	call	sim_gain_first
	mov	QWORD PTR -8[rbp], rax
	jmp	.L677
.L680:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -24[rbp], eax
	jne	.L678
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR 8[rax]
	mov	ecx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	movq	xmm0, rdx
	mov	r8d, ecx
	mov	ecx, eax
	lea	rdx, .LC117[rip]
	lea	rsi, .LC116[rip]
	mov	edi, 9
	mov	eax, 1
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR 8[rax]
	jmp	.L679
.L678:
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	QWORD PTR -8[rbp], rax
.L677:
	cmp	QWORD PTR -8[rbp], 0
	jne	.L680
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	rdx, QWORD PTR .LC73[rip]
	mov	ecx, DWORD PTR -24[rbp]
	mov	eax, DWORD PTR -20[rbp]
	movq	xmm0, rdx
	mov	r8d, ecx
	mov	ecx, eax
	lea	rdx, .LC118[rip]
	lea	rsi, .LC116[rip]
	mov	edi, 10
	mov	eax, 1
	call	sim_log_debug
	movsd	xmm0, QWORD PTR .LC73[rip]
.L679:
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE282:
	.size	sim_gain_value, .-sim_gain_value
	.globl	sim_gain_connected
	.type	sim_gain_connected, @function
sim_gain_connected:
.LFB283:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, DWORD PTR -20[rbp]
	mov	edi, eax
	call	sim_gain_first
	mov	QWORD PTR -8[rbp], rax
	jmp	.L682
.L685:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -24[rbp], eax
	jne	.L683
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, 1
	jmp	.L684
.L683:
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	QWORD PTR -8[rbp], rax
.L682:
	cmp	QWORD PTR -8[rbp], 0
	jne	.L685
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, 0
.L684:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE283:
	.size	sim_gain_connected, .-sim_gain_connected
	.globl	sim_gain_remove
	.type	sim_gain_remove, @function
sim_gain_remove:
.LFB284:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -36[rbp], edi
	mov	DWORD PTR -40[rbp], esi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -28[rbp], eax
	cmp	DWORD PTR -36[rbp], 1000
	jle	.L687
	mov	DWORD PTR -36[rbp], 1000
.L687:
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, DWORD PTR -36[rbp]
	mov	edi, eax
	call	sim_gain_first
	mov	QWORD PTR -24[rbp], rax
	mov	QWORD PTR -16[rbp], 0
	jmp	.L688
.L692:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	cmp	DWORD PTR -40[rbp], eax
	jne	.L689
	cmp	QWORD PTR -16[rbp], 0
	jne	.L690
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	edx, DWORD PTR -36[rbp]
	movsx	rdx, edx
	lea	rcx, 0[0+rdx*8]
	lea	rdx, connectivity[rip]
	mov	QWORD PTR [rcx+rdx], rax
	jmp	.L691
.L690:
	mov	rax, QWORD PTR -24[rbp]
	mov	rdx, QWORD PTR 16[rax]
	mov	rax, QWORD PTR -16[rbp]
	mov	QWORD PTR 16[rax], rdx
.L691:
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	sim_gain_deallocate_link
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR -24[rbp], rax
	jmp	.L688
.L689:
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR 16[rax]
	mov	QWORD PTR -24[rbp], rax
.L688:
	cmp	QWORD PTR -24[rbp], 0
	jne	.L692
	mov	eax, DWORD PTR -28[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE284:
	.size	sim_gain_remove, .-sim_gain_remove
	.globl	sim_gain_deallocate_link
	.type	sim_gain_deallocate_link, @function
sim_gain_deallocate_link:
.LFB285:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE285:
	.size	sim_gain_deallocate_link, .-sim_gain_deallocate_link
	.globl	sim_gain_set_noise_floor
	.type	sim_gain_set_noise_floor, @function
sim_gain_set_noise_floor:
.LFB286:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -4[rbp], edi
	movsd	QWORD PTR -16[rbp], xmm0
	movsd	QWORD PTR -24[rbp], xmm1
	cmp	DWORD PTR -4[rbp], 1000
	jle	.L695
	mov	DWORD PTR -4[rbp], 1000
.L695:
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, localNoise[rip]
	movsd	xmm0, QWORD PTR -16[rbp]
	movsd	QWORD PTR [rdx+rax], xmm0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, localNoise[rip+8]
	movsd	xmm0, QWORD PTR -24[rbp]
	movsd	QWORD PTR [rdx+rax], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE286:
	.size	sim_gain_set_noise_floor, .-sim_gain_set_noise_floor
	.globl	sim_gain_sample_noise
	.type	sim_gain_sample_noise, @function
sim_gain_sample_noise:
.LFB287:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	DWORD PTR -20[rbp], edi
	cmp	DWORD PTR -20[rbp], 1000
	jle	.L697
	mov	DWORD PTR -20[rbp], 1000
.L697:
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, localNoise[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movsd	QWORD PTR -16[rbp], xmm0
	mov	eax, 0
	call	sim_random
	movsx	rdx, eax
	imul	rdx, rdx, 1125899907
	shr	rdx, 32
	sar	edx, 19
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	imul	ecx, edx, 2000000
	sub	eax, ecx
	mov	edx, eax
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, edx
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC119[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	xmm1, QWORD PTR .LC73[rip]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, localNoise[rip+8]
	movsd	xmm0, QWORD PTR [rdx+rax]
	movsd	xmm1, QWORD PTR -8[rbp]
	mulsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -16[rbp]
	addsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE287:
	.size	sim_gain_sample_noise, .-sim_gain_sample_noise
	.globl	sim_gain_set_sensitivity
	.type	sim_gain_set_sensitivity, @function
sim_gain_set_sensitivity:
.LFB288:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	QWORD PTR -8[rbp], xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	QWORD PTR sensitivity[rip], xmm0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE288:
	.size	sim_gain_set_sensitivity, .-sim_gain_set_sensitivity
	.globl	sim_gain_sensitivity
	.type	sim_gain_sensitivity, @function
sim_gain_sensitivity:
.LFB289:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	movsd	xmm0, QWORD PTR sensitivity[rip]
	movq	rax, xmm0
	movq	xmm0, rax
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE289:
	.size	sim_gain_sensitivity, .-sim_gain_sensitivity
	.globl	sim_noise_create_model
	.type	sim_noise_create_model, @function
sim_noise_create_model:
.LFB290:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	WORD PTR -4[rbp], ax
	movzx	eax, WORD PTR -4[rbp]
	mov	edi, eax
	call	makeNoiseModel
	movzx	eax, WORD PTR -4[rbp]
	mov	edi, eax
	call	makePmfDistr
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE290:
	.size	sim_noise_create_model, .-sim_noise_create_model
	.section	.rodata
.LC120:
	.string	"Setting history %i to be %i\n"
.LC121:
	.string	"Insert"
	.text
	.globl	makeNoiseModel
	.type	makeNoiseModel, @function
makeNoiseModel:
.LFB291:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, edi
	mov	WORD PTR -20[rbp], ax
	mov	DWORD PTR -4[rbp], 0
	jmp	.L704
.L705:
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	edi, eax
	call	search_bin_num
	mov	edx, eax
	movzx	eax, WORD PTR -20[rbp]
	mov	ecx, edx
	mov	edx, DWORD PTR -4[rbp]
	movsx	rsi, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, [rax+rsi]
	lea	rax, noiseData[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
	movzx	eax, WORD PTR -20[rbp]
	mov	edx, DWORD PTR -4[rbp]
	movsx	rcx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, [rax+rcx]
	lea	rax, noiseData[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	edx, al
	mov	eax, DWORD PTR -4[rbp]
	mov	r8d, edx
	mov	ecx, eax
	lea	rdx, .LC120[rip]
	lea	rsi, .LC121[rip]
	mov	edi, 44
	mov	eax, 0
	call	sim_log_debug
	add	DWORD PTR -4[rbp], 1
.L704:
	cmp	DWORD PTR -4[rbp], 19
	jle	.L705
	mov	DWORD PTR -4[rbp], 20
	jmp	.L706
.L707:
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	edx, al
	movzx	eax, WORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	call	sim_noise_add
	movzx	eax, WORD PTR -20[rbp]
	mov	edi, eax
	call	arrangeKey
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	edi, eax
	call	search_bin_num
	mov	edx, eax
	movzx	eax, WORD PTR -20[rbp]
	mov	ecx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+19]
	mov	BYTE PTR [rdx+rax], cl
	add	DWORD PTR -4[rbp], 1
.L706:
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+68]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -4[rbp]
	cmp	edx, eax
	ja	.L707
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+72]
	mov	BYTE PTR [rdx+rax], 1
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE291:
	.size	makeNoiseModel, .-makeNoiseModel
	.globl	search_bin_num
	.type	search_bin_num, @function
search_bin_num:
.LFB292:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, edi
	mov	BYTE PTR -20[rbp], al
	cmp	BYTE PTR -20[rbp], -4
	jge	.L709
	cmp	BYTE PTR -20[rbp], -115
	jge	.L710
.L709:
	mov	BYTE PTR -20[rbp], -115
.L710:
	movsx	eax, BYTE PTR -20[rbp]
	add	eax, 115
	movsx	rdx, eax
	imul	rdx, rdx, 1717986919
	shr	rdx, 32
	sar	edx
	sar	eax, 31
	mov	ecx, eax
	mov	eax, edx
	sub	eax, ecx
	add	eax, 1
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE292:
	.size	search_bin_num, .-search_bin_num
	.section	.rodata
.LC122:
	.string	"Adding noise value %hhi\n"
	.align 8
.LC124:
	.string	"Inserting %p into table %p with key "
.LC125:
	.string	"%0.3hhi "
	.text
	.globl	sim_noise_add
	.type	sim_noise_add, @function
sim_noise_add:
.LFB293:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 64
	mov	eax, edi
	mov	edx, esi
	mov	WORD PTR -52[rbp], ax
	mov	eax, edx
	mov	BYTE PTR -56[rbp], al
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+48]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -24[rbp], rax
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, noiseData[rip]
	add	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -32[rbp], rax
	movsx	eax, BYTE PTR -56[rbp]
	mov	ecx, eax
	lea	rdx, .LC122[rip]
	lea	rsi, .LC121[rip]
	mov	edi, 13
	mov	eax, 0
	call	sim_log_debug
	cmp	QWORD PTR -32[rbp], 0
	jne	.L713
	mov	edi, 488
	call	malloc@PLT
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	edx, 20
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR 20[rax], 0
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR 24[rax], 8
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 24[rax]
	mov	edi, eax
	call	malloc@PLT
	mov	rdx, rax
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 24[rax]
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR 32[rax]
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	BYTE PTR 40[rax], 0
	mov	DWORD PTR -44[rbp], 0
	jmp	.L714
.L715:
	mov	rax, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR -44[rbp]
	movsx	rdx, edx
	add	rdx, 8
	pxor	xmm0, xmm0
	movss	DWORD PTR 12[rax+rdx*4], xmm0
	add	DWORD PTR -44[rbp], 1
.L714:
	cmp	DWORD PTR -44[rbp], 110
	jle	.L715
	mov	rdx, QWORD PTR -32[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	hashtable_insert@PLT
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	r8, rdx
	mov	rcx, rax
	lea	rdx, .LC124[rip]
	lea	rsi, .LC121[rip]
	mov	edi, 14
	mov	eax, 0
	call	sim_log_debug
	mov	DWORD PTR -40[rbp], 0
	jmp	.L716
.L717:
	mov	eax, DWORD PTR -40[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	ecx, eax
	lea	rdx, .LC125[rip]
	lea	rsi, .LC121[rip]
	mov	edi, 15
	mov	eax, 0
	call	sim_log_debug_clear
	add	DWORD PTR -40[rbp], 1
.L716:
	cmp	DWORD PTR -40[rbp], 19
	jle	.L717
	lea	rdx, .LC113[rip]
	lea	rsi, .LC121[rip]
	mov	edi, 16
	mov	eax, 0
	call	sim_log_debug_clear
.L713:
	mov	rax, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR 20[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 24[rax]
	cmp	edx, eax
	jne	.L718
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 24[rax]
	add	eax, eax
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	mov	edi, eax
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 24[rax]
	mov	edx, eax
	mov	rax, QWORD PTR -32[rbp]
	mov	rcx, QWORD PTR 32[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rax, QWORD PTR 32[rax]
	mov	rdi, rax
	call	free@PLT
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -32[rbp]
	mov	edx, DWORD PTR -36[rbp]
	mov	DWORD PTR 24[rax], edx
.L718:
	mov	rax, QWORD PTR -32[rbp]
	mov	rdx, QWORD PTR 32[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 20[rax]
	cdqe
	add	rdx, rax
	movzx	eax, BYTE PTR -56[rbp]
	mov	BYTE PTR [rdx], al
	mov	rax, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR 20[rax]
	lea	edx, 1[rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR 20[rax], edx
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE293:
	.size	sim_noise_add, .-sim_noise_add
	.globl	arrangeKey
	.type	arrangeKey, @function
arrangeKey:
.LFB294:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, edi
	mov	WORD PTR -20[rbp], ax
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, noiseData[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	lea	rcx, 1[rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 19
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE294:
	.size	arrangeKey, .-arrangeKey
	.section	.rodata
.LC126:
	.string	"FreqKey = "
.LC127:
	.string	"HASH"
.LC128:
	.string	"%d,"
	.text
	.globl	makePmfDistr
	.type	makePmfDistr, @function
makePmfDistr:
.LFB295:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	eax, edi
	mov	WORD PTR -36[rbp], ax
	movzx	eax, WORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, noiseData[rip]
	add	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	movzx	eax, WORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, 16[rax]
	lea	rax, noiseData[rip]
	add	rax, rdx
	add	rax, 4
	mov	QWORD PTR -8[rbp], rax
	mov	DWORD PTR FreqKeyNum[rip], 0
	mov	DWORD PTR -20[rbp], 0
	jmp	.L721
.L722:
	movzx	eax, WORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	edi, eax
	call	search_bin_num
	mov	edx, eax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rcx, eax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, rcx
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -20[rbp], 1
.L721:
	cmp	DWORD PTR -20[rbp], 19
	jle	.L722
	mov	DWORD PTR -20[rbp], 20
	jmp	.L723
.L724:
	movzx	eax, WORD PTR -36[rbp]
	mov	edi, eax
	call	sim_noise_dist
	movzx	eax, WORD PTR -36[rbp]
	mov	edi, eax
	call	arrangeKey
	movzx	eax, WORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	edi, eax
	call	search_bin_num
	mov	edx, eax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 19
	mov	BYTE PTR [rax], dl
	add	DWORD PTR -20[rbp], 1
.L723:
	movzx	eax, WORD PTR -36[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+68]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -20[rbp]
	cmp	edx, eax
	ja	.L724
	lea	rdx, .LC126[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 21
	mov	eax, 0
	call	sim_log_debug_clear
	mov	DWORD PTR -20[rbp], 0
	jmp	.L725
.L726:
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	ecx, eax
	lea	rdx, .LC128[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 22
	mov	eax, 0
	call	sim_log_debug_clear
	add	DWORD PTR -20[rbp], 1
.L725:
	cmp	DWORD PTR -20[rbp], 19
	jle	.L726
	lea	rdx, .LC113[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 23
	mov	eax, 0
	call	sim_log_debug_clear
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE295:
	.size	makePmfDistr, .-makePmfDistr
	.section	.rodata
.LC129:
	.string	"Noise is found to be %i\n"
.LC130:
	.string	"Noise_output"
	.align 8
.LC132:
	.string	"Setting most frequent key (%i): "
.LC133:
	.string	"HashZeroDebug"
.LC134:
	.string	"[%hhu] "
	.text
	.globl	sim_noise_dist
	.type	sim_noise_dist, @function
sim_noise_dist:
.LFB296:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 80
	mov	eax, edi
	mov	WORD PTR -68[rbp], ax
	pxor	xmm0, xmm0
	movss	DWORD PTR -44[rbp], xmm0
	movzx	eax, WORD PTR -68[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+48]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -32[rbp], rax
	movzx	eax, WORD PTR -68[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, noiseData[rip]
	add	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movzx	eax, WORD PTR -68[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, 16[rax]
	lea	rax, noiseData[rip]
	add	rax, rdx
	add	rax, 4
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR 40[rax]
	cmp	al, 1
	je	.L738
	mov	DWORD PTR -48[rbp], 0
	jmp	.L730
.L731:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -48[rbp]
	movsx	rdx, edx
	add	rdx, 8
	pxor	xmm0, xmm0
	movss	DWORD PTR 12[rax+rdx*4], xmm0
	add	DWORD PTR -48[rbp], 1
.L730:
	cmp	DWORD PTR -48[rbp], 110
	jle	.L731
	mov	DWORD PTR -48[rbp], 0
	jmp	.L732
.L733:
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR 32[rax]
	mov	eax, DWORD PTR -48[rbp]
	cdqe
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	ecx, eax
	lea	rdx, .LC129[rip]
	lea	rsi, .LC130[rip]
	mov	edi, 17
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR 32[rax]
	mov	eax, DWORD PTR -48[rbp]
	cdqe
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	add	eax, 115
	mov	BYTE PTR -49[rbp], al
	movzx	edx, BYTE PTR -49[rbp]
	mov	rax, QWORD PTR -8[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR 12[rax+rdx*4]
	movss	DWORD PTR -36[rbp], xmm0
	movss	xmm1, DWORD PTR -36[rbp]
	movss	xmm0, DWORD PTR .LC131[rip]
	addss	xmm0, xmm1
	movss	DWORD PTR -36[rbp], xmm0
	movzx	edx, BYTE PTR -49[rbp]
	mov	rax, QWORD PTR -8[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR -36[rbp]
	movss	DWORD PTR 12[rax+rdx*4], xmm0
	add	DWORD PTR -48[rbp], 1
.L732:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 20[rax]
	cmp	DWORD PTR -48[rbp], eax
	jl	.L733
	mov	DWORD PTR -48[rbp], 0
	jmp	.L734
.L735:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -48[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR 12[rax+rdx*4]
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 20[rax]
	pxor	xmm1, xmm1
	cvtsi2ss	xmm1, eax
	divss	xmm0, xmm1
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -48[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	DWORD PTR 12[rax+rdx*4], xmm0
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -48[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR 12[rax+rdx*4]
	movss	xmm1, DWORD PTR -44[rbp]
	addss	xmm0, xmm1
	movss	DWORD PTR -44[rbp], xmm0
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -48[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR -44[rbp]
	movss	DWORD PTR 12[rax+rdx*4], xmm0
	add	DWORD PTR -48[rbp], 1
.L734:
	cmp	DWORD PTR -48[rbp], 110
	jle	.L735
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 40[rax], 1
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 20[rax]
	mov	edx, eax
	mov	eax, DWORD PTR FreqKeyNum[rip]
	cmp	edx, eax
	jbe	.L727
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 20[rax]
	mov	DWORD PTR FreqKeyNum[rip], eax
	mov	rcx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	edx, 20
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	eax, DWORD PTR FreqKeyNum[rip]
	mov	ecx, eax
	lea	rdx, .LC132[rip]
	lea	rsi, .LC133[rip]
	mov	edi, 18
	mov	eax, 0
	call	sim_log_debug
	mov	DWORD PTR -40[rbp], 0
	jmp	.L736
.L737:
	mov	eax, DWORD PTR -40[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	ecx, eax
	lea	rdx, .LC134[rip]
	lea	rsi, .LC133[rip]
	mov	edi, 19
	mov	eax, 0
	call	sim_log_debug_clear
	add	DWORD PTR -40[rbp], 1
.L736:
	cmp	DWORD PTR -40[rbp], 19
	jle	.L737
	lea	rdx, .LC113[rip]
	lea	rsi, .LC133[rip]
	mov	edi, 20
	mov	eax, 0
	call	sim_log_debug_clear
	jmp	.L727
.L738:
	nop
.L727:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE296:
	.size	sim_noise_dist, .-sim_noise_dist
	.section	.rodata
	.align 8
.LC135:
	.string	"Adding noise value %i for %i of %i\n"
	.text
	.globl	sim_noise_trace_add
	.type	sim_noise_trace_add, @function
sim_noise_trace_add:
.LFB297:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, edi
	mov	edx, esi
	mov	WORD PTR -20[rbp], ax
	mov	eax, edx
	mov	BYTE PTR -24[rbp], al
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+68]
	mov	ecx, DWORD PTR [rdx+rax]
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+64]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	ecx, eax
	jne	.L740
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+64]
	mov	eax, DWORD PTR [rdx+rax]
	add	eax, eax
	mov	edi, eax
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+64]
	mov	edx, DWORD PTR [rdx+rax]
	movzx	eax, WORD PTR -20[rbp]
	movsx	rcx, eax
	mov	rax, rcx
	sal	rax, 2
	add	rax, rcx
	sal	rax, 4
	mov	rcx, rax
	lea	rax, noiseData[rip+56]
	mov	rcx, QWORD PTR [rcx+rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	free@PLT
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+64]
	mov	edx, DWORD PTR [rdx+rax]
	movzx	eax, WORD PTR -20[rbp]
	lea	ecx, [rdx+rdx]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+64]
	mov	DWORD PTR [rdx+rax], ecx
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rcx, rax
	lea	rdx, noiseData[rip+56]
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR [rcx+rdx], rax
.L740:
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rcx, QWORD PTR [rdx+rax]
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+68]
	mov	eax, DWORD PTR [rdx+rax]
	mov	eax, eax
	lea	rdx, [rcx+rax]
	movzx	eax, BYTE PTR -24[rbp]
	mov	BYTE PTR [rdx], al
	movzx	edx, WORD PTR -20[rbp]
	movsx	rcx, edx
	mov	rax, rcx
	sal	rax, 2
	add	rax, rcx
	sal	rax, 4
	mov	rcx, rax
	lea	rax, noiseData[rip+68]
	mov	eax, DWORD PTR [rcx+rax]
	lea	ecx, 1[rax]
	movsx	rdx, edx
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+68]
	mov	DWORD PTR [rdx+rax], ecx
	movsx	esi, BYTE PTR -24[rbp]
	movzx	ecx, WORD PTR -20[rbp]
	movzx	eax, WORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+68]
	mov	eax, DWORD PTR [rdx+rax]
	mov	r9d, esi
	mov	r8d, ecx
	mov	ecx, eax
	lea	rdx, .LC135[rip]
	lea	rsi, .LC121[rip]
	mov	edi, 12
	mov	eax, 0
	call	sim_log_debug
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE297:
	.size	sim_noise_trace_add, .-sim_noise_trace_add
	.globl	search_noise_from_bin_num
	.type	search_noise_from_bin_num, @function
search_noise_from_bin_num:
.LFB298:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	DWORD PTR -20[rbp], edi
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, 1
	mov	edx, eax
	mov	eax, edx
	sal	eax, 2
	add	eax, edx
	sub	eax, 115
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE298:
	.size	search_noise_from_bin_num, .-search_noise_from_bin_num
	.section	.rodata
.LC136:
	.string	"Did not pattern match"
.LC137:
	.string	"Noise_c"
.LC138:
	.string	"(N)Noise\n"
.LC139:
	.string	"Defaulting to common hash.\n"
.LC140:
	.string	"Key = "
.LC141:
	.string	"Printing Key\n"
.LC142:
	.string	"noise_hash->numElements=%d\n"
.LC143:
	.string	"(E)Noise = %d\n"
.LC144:
	.string	"In case 1: %i of %i\n"
.LC145:
	.string	"Noise: %i\n"
.LC146:
	.string	"NoiseAudit"
.LC147:
	.string	"In case 2: %i of %i\n"
.LC148:
	.string	"IN:for i=%d\n"
.LC149:
	.string	"Selected Bin = %d -> "
.LC150:
	.string	"OUT:for i=%d\n"
	.text
	.globl	sim_noise_gen
	.type	sim_noise_gen, @function
sim_noise_gen:
.LFB299:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 80
	mov	eax, edi
	mov	WORD PTR -68[rbp], ax
	mov	DWORD PTR -44[rbp], 0
	movzx	eax, WORD PTR -68[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+48]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -32[rbp], rax
	movzx	eax, WORD PTR -68[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, noiseData[rip]
	add	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movzx	eax, WORD PTR -68[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, 16[rax]
	lea	rax, noiseData[rip]
	add	rax, rdx
	add	rax, 4
	mov	QWORD PTR -16[rbp], rax
	call	RandomUniform
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -40[rbp], rax
	cmp	QWORD PTR -40[rbp], 0
	jne	.L744
	lea	rdx, .LC136[rip]
	lea	rsi, .LC137[rip]
	mov	edi, 24
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_noise_alarm
	mov	BYTE PTR -49[rbp], 0
	lea	rdx, .LC138[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 25
	mov	eax, 0
	call	sim_log_debug_clear
	lea	rdx, .LC139[rip]
	lea	rsi, .LC133[rip]
	mov	edi, 26
	mov	eax, 0
	call	sim_log_debug
	mov	rcx, QWORD PTR -16[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	edx, 20
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	rdx, QWORD PTR -24[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	hashtable_search@PLT
	mov	QWORD PTR -40[rbp], rax
.L744:
	lea	rdx, .LC140[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 27
	mov	eax, 0
	call	sim_log_debug_clear
	mov	DWORD PTR -48[rbp], 0
	jmp	.L745
.L746:
	mov	eax, DWORD PTR -48[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	ecx, eax
	lea	rdx, .LC128[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 28
	mov	eax, 0
	call	sim_log_debug_clear
	add	DWORD PTR -48[rbp], 1
.L745:
	cmp	DWORD PTR -48[rbp], 19
	jle	.L746
	lea	rdx, .LC113[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 29
	mov	eax, 0
	call	sim_log_debug_clear
	lea	rdx, .LC141[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 30
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 20[rax]
	mov	ecx, eax
	lea	rdx, .LC142[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 31
	mov	eax, 0
	call	sim_log_debug
	mov	eax, DWORD PTR numTotal[rip]
	add	eax, 1
	mov	DWORD PTR numTotal[rip], eax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, DWORD PTR 20[rax]
	cmp	eax, 1
	jne	.L747
	mov	rax, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR 32[rax]
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR -49[rbp], al
	movsx	eax, BYTE PTR -49[rbp]
	mov	ecx, eax
	lea	rdx, .LC143[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 32
	mov	eax, 0
	call	sim_log_debug_clear
	mov	eax, DWORD PTR numCase1[rip]
	add	eax, 1
	mov	DWORD PTR numCase1[rip], eax
	mov	edx, DWORD PTR numTotal[rip]
	mov	eax, DWORD PTR numCase1[rip]
	mov	r8d, edx
	mov	ecx, eax
	lea	rdx, .LC144[rip]
	lea	rsi, .LC137[rip]
	mov	edi, 33
	mov	eax, 0
	call	sim_log_debug
	movsx	eax, BYTE PTR -49[rbp]
	mov	ecx, eax
	lea	rdx, .LC145[rip]
	lea	rsi, .LC146[rip]
	mov	edi, 34
	mov	eax, 0
	call	sim_log_debug
	movzx	eax, BYTE PTR -49[rbp]
	jmp	.L748
.L747:
	mov	eax, DWORD PTR numCase2[rip]
	add	eax, 1
	mov	DWORD PTR numCase2[rip], eax
	mov	edx, DWORD PTR numTotal[rip]
	mov	eax, DWORD PTR numCase2[rip]
	mov	r8d, edx
	mov	ecx, eax
	lea	rdx, .LC147[rip]
	lea	rsi, .LC137[rip]
	mov	edi, 35
	mov	eax, 0
	call	sim_log_debug
	mov	DWORD PTR -48[rbp], 0
	jmp	.L749
.L756:
	mov	eax, DWORD PTR -48[rbp]
	mov	ecx, eax
	lea	rdx, .LC148[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 36
	mov	eax, 0
	call	sim_log_debug
	cmp	DWORD PTR -48[rbp], 0
	jne	.L750
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR -48[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR 12[rax+rdx*4]
	cvtss2sd	xmm0, xmm0
	comisd	xmm0, QWORD PTR -8[rbp]
	jb	.L751
	mov	eax, DWORD PTR -48[rbp]
	mov	DWORD PTR -44[rbp], eax
	mov	eax, DWORD PTR -48[rbp]
	add	eax, 1
	mov	ecx, eax
	lea	rdx, .LC149[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 37
	mov	eax, 0
	call	sim_log_debug_clear
	jmp	.L753
.L750:
	mov	eax, DWORD PTR -48[rbp]
	lea	edx, -1[rax]
	mov	rax, QWORD PTR -40[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR 12[rax+rdx*4]
	pxor	xmm1, xmm1
	cvtss2sd	xmm1, xmm0
	movsd	xmm0, QWORD PTR -8[rbp]
	comisd	xmm0, xmm1
	jbe	.L751
	mov	rax, QWORD PTR -40[rbp]
	mov	edx, DWORD PTR -48[rbp]
	movsx	rdx, edx
	add	rdx, 8
	movss	xmm0, DWORD PTR 12[rax+rdx*4]
	cvtss2sd	xmm0, xmm0
	comisd	xmm0, QWORD PTR -8[rbp]
	jb	.L751
	mov	eax, DWORD PTR -48[rbp]
	mov	DWORD PTR -44[rbp], eax
	mov	eax, DWORD PTR -48[rbp]
	add	eax, 1
	mov	ecx, eax
	lea	rdx, .LC149[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 38
	mov	eax, 0
	call	sim_log_debug_clear
	jmp	.L753
.L751:
	add	DWORD PTR -48[rbp], 1
.L749:
	cmp	DWORD PTR -48[rbp], 109
	jle	.L756
.L753:
	mov	eax, DWORD PTR -48[rbp]
	mov	ecx, eax
	lea	rdx, .LC150[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 39
	mov	eax, 0
	call	sim_log_debug
	mov	eax, DWORD PTR -48[rbp]
	sub	eax, 115
	mov	BYTE PTR -49[rbp], al
	movsx	eax, BYTE PTR -49[rbp]
	mov	ecx, eax
	lea	rdx, .LC145[rip]
	lea	rsi, .LC146[rip]
	mov	edi, 40
	mov	eax, 0
	call	sim_log_debug
	movzx	eax, BYTE PTR -49[rbp]
.L748:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE299:
	.size	sim_noise_gen, .-sim_noise_gen
	.type	RandomUniform, @function
RandomUniform:
.LFB300:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, DWORD PTR test[rip]
	test	eax, eax
	jne	.L761
	mov	eax, 0
	call	sim_random
	movsx	rdx, eax
	imul	rdx, rdx, -2048845677
	shr	rdx, 32
	add	edx, eax
	sar	edx, 14
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	mov	DWORD PTR -16[rbp], edx
	mov	edx, DWORD PTR -16[rbp]
	imul	edx, edx, 31329
	sub	eax, edx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, 0
	call	sim_random
	movsx	rdx, eax
	imul	rdx, rdx, -1955736387
	shr	rdx, 32
	add	edx, eax
	sar	edx, 14
	mov	ecx, eax
	sar	ecx, 31
	sub	edx, ecx
	mov	DWORD PTR -12[rbp], edx
	mov	edx, DWORD PTR -12[rbp]
	imul	edx, edx, 30082
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	edx, DWORD PTR -12[rbp]
	mov	eax, DWORD PTR -16[rbp]
	mov	esi, edx
	mov	edi, eax
	call	RandomInitialise
.L761:
	mov	eax, DWORD PTR i97[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, randU[rip]
	movsd	xmm0, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR j97[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, randU[rip]
	movsd	xmm1, QWORD PTR [rdx+rax]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	pxor	xmm0, xmm0
	comisd	xmm0, QWORD PTR -8[rbp]
	jb	.L762
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC73[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
.L762:
	mov	eax, DWORD PTR i97[rip]
	sub	eax, 1
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, randU[rip]
	movsd	xmm0, QWORD PTR -8[rbp]
	movsd	QWORD PTR [rdx+rax], xmm0
	mov	eax, DWORD PTR i97[rip]
	sub	eax, 1
	mov	DWORD PTR i97[rip], eax
	mov	eax, DWORD PTR i97[rip]
	test	eax, eax
	jne	.L764
	mov	DWORD PTR i97[rip], 97
.L764:
	mov	eax, DWORD PTR j97[rip]
	sub	eax, 1
	mov	DWORD PTR j97[rip], eax
	mov	eax, DWORD PTR j97[rip]
	test	eax, eax
	jne	.L765
	mov	DWORD PTR j97[rip], 97
.L765:
	movsd	xmm0, QWORD PTR randC[rip]
	movsd	xmm1, QWORD PTR randCD[rip]
	subsd	xmm0, xmm1
	movsd	QWORD PTR randC[rip], xmm0
	movsd	xmm1, QWORD PTR randC[rip]
	pxor	xmm0, xmm0
	comisd	xmm0, xmm1
	jbe	.L766
	movsd	xmm1, QWORD PTR randC[rip]
	movsd	xmm0, QWORD PTR randCM[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR randC[rip], xmm0
.L766:
	movsd	xmm1, QWORD PTR randC[rip]
	movsd	xmm0, QWORD PTR -8[rbp]
	subsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
	pxor	xmm0, xmm0
	comisd	xmm0, QWORD PTR -8[rbp]
	jbe	.L768
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC73[rip]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -8[rbp], xmm0
.L768:
	movsd	xmm0, QWORD PTR -8[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE300:
	.size	RandomUniform, .-RandomUniform
	.section	.rodata
	.align 8
.LC151:
	.string	"Tried to generate noise from an uninitialized radio model of node %hu.\n"
.LC152:
	.string	"TOSSIM"
.LC153:
	.string	"delta_t = %d\n"
.LC154:
	.string	"Generated noise of zero.\n"
	.text
	.globl	sim_noise_generate
	.type	sim_noise_generate, @function
sim_noise_generate:
.LFB301:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	eax, edi
	mov	DWORD PTR -56[rbp], esi
	mov	WORD PTR -52[rbp], ax
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+44]
	mov	eax, DWORD PTR [rdx+rax]
	mov	DWORD PTR -28[rbp], eax
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+72]
	movzx	eax, BYTE PTR [rdx+rax]
	test	al, al
	jne	.L775
	movzx	eax, WORD PTR -52[rbp]
	mov	ecx, eax
	lea	rdx, .LC151[rip]
	lea	rsi, .LC152[rip]
	mov	edi, 41
	mov	eax, 0
	call	sim_log_error
	mov	eax, 127
	jmp	.L776
.L775:
	cmp	DWORD PTR -56[rbp], 19
	ja	.L777
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rcx, rax
	lea	rdx, noiseData[rip+44]
	mov	eax, DWORD PTR -56[rbp]
	mov	DWORD PTR [rcx+rdx], eax
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -56[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	edi, eax
	call	search_bin_num
	mov	edx, eax
	movzx	eax, WORD PTR -52[rbp]
	mov	ecx, edx
	mov	esi, DWORD PTR -56[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	lea	rdx, [rax+rsi]
	lea	rax, noiseData[rip]
	add	rax, rdx
	mov	BYTE PTR [rax], cl
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -56[rbp]
	add	rdx, rax
	movzx	eax, WORD PTR -52[rbp]
	movzx	edx, BYTE PTR [rdx]
	movsx	rcx, eax
	mov	rax, rcx
	sal	rax, 2
	add	rax, rcx
	sal	rax, 4
	mov	rcx, rax
	lea	rax, noiseData[rip+40]
	mov	BYTE PTR [rcx+rax], dl
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+56]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -56[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	jmp	.L776
.L777:
	cmp	DWORD PTR -28[rbp], 0
	jne	.L778
	mov	eax, DWORD PTR -56[rbp]
	sub	eax, 19
	mov	DWORD PTR -32[rbp], eax
	jmp	.L779
.L778:
	mov	eax, DWORD PTR -56[rbp]
	sub	eax, DWORD PTR -28[rbp]
	mov	DWORD PTR -32[rbp], eax
.L779:
	mov	eax, DWORD PTR -32[rbp]
	mov	ecx, eax
	lea	rdx, .LC153[rip]
	lea	rsi, .LC127[rip]
	mov	edi, 42
	mov	eax, 0
	call	sim_log_debug_clear
	cmp	DWORD PTR -32[rbp], 0
	jne	.L780
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+40]
	movzx	eax, BYTE PTR [rdx+rax]
	mov	BYTE PTR -37[rbp], al
	jmp	.L781
.L780:
	mov	eax, DWORD PTR -32[rbp]
	mov	edi, eax
	call	malloc@PLT
	mov	QWORD PTR -24[rbp], rax
	mov	DWORD PTR -36[rbp], 0
	jmp	.L782
.L783:
	movzx	eax, WORD PTR -52[rbp]
	mov	ecx, DWORD PTR -36[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	lea	rbx, [rcx+rdx]
	mov	edi, eax
	call	sim_noise_gen
	mov	BYTE PTR [rbx], al
	movzx	eax, WORD PTR -52[rbp]
	mov	edi, eax
	call	arrangeKey
	mov	edx, DWORD PTR -36[rbp]
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movsx	eax, al
	mov	edi, eax
	call	search_bin_num
	mov	edx, eax
	movzx	eax, WORD PTR -52[rbp]
	mov	ecx, edx
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, noiseData[rip+19]
	mov	BYTE PTR [rdx+rax], cl
	add	DWORD PTR -36[rbp], 1
.L782:
	mov	eax, DWORD PTR -36[rbp]
	cmp	eax, DWORD PTR -32[rbp]
	jb	.L783
	mov	eax, DWORD PTR -32[rbp]
	sub	eax, 1
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	mov	BYTE PTR -37[rbp], al
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rcx, rax
	lea	rdx, noiseData[rip+40]
	movzx	eax, BYTE PTR -37[rbp]
	mov	BYTE PTR [rcx+rdx], al
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	free@PLT
.L781:
	movzx	eax, WORD PTR -52[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 4
	mov	rcx, rax
	lea	rdx, noiseData[rip+44]
	mov	eax, DWORD PTR -56[rbp]
	mov	DWORD PTR [rcx+rdx], eax
	cmp	BYTE PTR -37[rbp], 0
	jne	.L784
	lea	rdx, .LC154[rip]
	lea	rsi, .LC133[rip]
	mov	edi, 43
	mov	eax, 0
	call	sim_log_debug
.L784:
	movzx	eax, BYTE PTR -37[rbp]
.L776:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE301:
	.size	sim_noise_generate, .-sim_noise_generate
	.section	.rodata
.LC155:
	.string	"ERROR (%i): "
	.text
	.type	sim_log_error, @function
sim_log_error:
.LFB302:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 256
	mov	QWORD PTR -240[rbp], rsi
	mov	QWORD PTR -248[rbp], rdx
	mov	QWORD PTR -152[rbp], rcx
	mov	QWORD PTR -144[rbp], r8
	mov	QWORD PTR -136[rbp], r9
	test	al, al
	je	.L786
	movaps	XMMWORD PTR -128[rbp], xmm0
	movaps	XMMWORD PTR -112[rbp], xmm1
	movaps	XMMWORD PTR -96[rbp], xmm2
	movaps	XMMWORD PTR -80[rbp], xmm3
	movaps	XMMWORD PTR -64[rbp], xmm4
	movaps	XMMWORD PTR -48[rbp], xmm5
	movaps	XMMWORD PTR -32[rbp], xmm6
	movaps	XMMWORD PTR -16[rbp], xmm7
.L786:
	mov	eax, edi
	mov	WORD PTR -228[rbp], ax
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -184[rbp], rax
	xor	eax, eax
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	jne	.L787
	movzx	eax, WORD PTR -228[rbp]
	mov	rdx, QWORD PTR -240[rbp]
	mov	rsi, rdx
	mov	edi, eax
	call	fillInOutput
.L787:
	mov	DWORD PTR -220[rbp], 0
	jmp	.L788
.L789:
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip+8]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -220[rbp]
	cdqe
	sal	rax, 3
	add	rax, rdx
	mov	rax, QWORD PTR [rax]
	mov	QWORD PTR -216[rbp], rax
	mov	DWORD PTR -208[rbp], 24
	mov	DWORD PTR -204[rbp], 48
	lea	rax, 16[rbp]
	mov	QWORD PTR -200[rbp], rax
	lea	rax, -176[rbp]
	mov	QWORD PTR -192[rbp], rax
	mov	eax, 0
	call	sim_node
	mov	edx, eax
	mov	rax, QWORD PTR -216[rbp]
	lea	rsi, .LC155[rip]
	mov	rdi, rax
	mov	eax, 0
	call	fprintf@PLT
	lea	rdx, -208[rbp]
	mov	rcx, QWORD PTR -248[rbp]
	mov	rax, QWORD PTR -216[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	vfprintf@PLT
	mov	rax, QWORD PTR -216[rbp]
	mov	rdi, rax
	call	fflush@PLT
	add	DWORD PTR -220[rbp], 1
.L788:
	movzx	eax, WORD PTR -228[rbp]
	cdqe
	sal	rax, 4
	mov	rdx, rax
	lea	rax, outputs[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	DWORD PTR -220[rbp], eax
	jl	.L789
	nop
	mov	rax, QWORD PTR -184[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L790
	call	__stack_chk_fail@PLT
.L790:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE302:
	.size	sim_log_error, .-sim_log_error
	.globl	sim_packet_set_source
	.type	sim_packet_set_source, @function
sim_packet_set_source:
.LFB303:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -28[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, WORD PTR -28[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 2
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint16
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE303:
	.size	sim_packet_set_source, .-sim_packet_set_source
	.globl	sim_packet_source
	.type	sim_packet_source, @function
sim_packet_source:
.LFB304:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 2
	mov	rdi, rax
	call	__nesc_ntoh_uint16
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE304:
	.size	sim_packet_source, .-sim_packet_source
	.globl	sim_packet_set_destination
	.type	sim_packet_set_destination, @function
sim_packet_set_destination:
.LFB305:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -28[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	movzx	edx, WORD PTR -28[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	__nesc_hton_uint16
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE305:
	.size	sim_packet_set_destination, .-sim_packet_set_destination
	.globl	sim_packet_destination
	.type	sim_packet_destination, @function
sim_packet_destination:
.LFB306:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	__nesc_ntoh_uint16
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE306:
	.size	sim_packet_destination, .-sim_packet_destination
	.globl	sim_packet_set_length
	.type	sim_packet_set_length, @function
sim_packet_set_length:
.LFB307:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -28[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, BYTE PTR -28[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 4
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint8
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE307:
	.size	sim_packet_set_length, .-sim_packet_set_length
	.globl	sim_packet_length
	.type	sim_packet_length, @function
sim_packet_length:
.LFB308:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 4
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	movzx	eax, al
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE308:
	.size	sim_packet_length, .-sim_packet_length
	.globl	sim_packet_set_type
	.type	sim_packet_set_type, @function
sim_packet_set_type:
.LFB309:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -28[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, BYTE PTR -28[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 6
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint8
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE309:
	.size	sim_packet_set_type, .-sim_packet_set_type
	.globl	sim_packet_type
	.type	sim_packet_type, @function
sim_packet_type:
.LFB310:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	getHeader
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 6
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE310:
	.size	sim_packet_type, .-sim_packet_type
	.globl	sim_packet_data
	.type	sim_packet_data, @function
sim_packet_data:
.LFB311:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 7
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE311:
	.size	sim_packet_data, .-sim_packet_data
	.globl	sim_packet_set_strength
	.type	sim_packet_set_strength, @function
sim_packet_set_strength:
.LFB312:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -28[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	add	rax, 37
	mov	QWORD PTR -8[rbp], rax
	movzx	eax, WORD PTR -28[rbp]
	movsx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	__nesc_hton_int8
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE312:
	.size	sim_packet_set_strength, .-sim_packet_set_strength
	.section	.rodata
	.align 8
.LC156:
	.string	"sim_packet.c: Delivering packet %p to %i at %llu\n"
	.text
	.globl	sim_packet_deliver
	.type	sim_packet_deliver, @function
sim_packet_deliver:
.LFB313:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	eax, 0
	call	sim_time
	cmp	QWORD PTR -24[rbp], rax
	jge	.L807
	mov	eax, 0
	call	sim_time
	mov	QWORD PTR -24[rbp], rax
.L807:
	mov	rcx, QWORD PTR -24[rbp]
	mov	edx, DWORD PTR -4[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	r9, rcx
	mov	r8d, edx
	mov	rcx, rax
	lea	rdx, .LC156[rip]
	lea	rsi, .LC8[rip]
	mov	edi, 45
	mov	eax, 0
	call	sim_log_debug
	mov	rdx, QWORD PTR -24[rbp]
	mov	rcx, QWORD PTR -16[rbp]
	mov	eax, DWORD PTR -4[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	active_message_deliver
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE313:
	.size	sim_packet_deliver, .-sim_packet_deliver
	.globl	active_message_deliver
	.type	active_message_deliver, @function
active_message_deliver:
.LFB314:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	rdx, QWORD PTR -40[rbp]
	mov	rcx, QWORD PTR -32[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	TossimActiveMessageC$allocate_deliver_event
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE314:
	.size	active_message_deliver, .-active_message_deliver
	.section	.rodata
	.align 8
.LC157:
	.string	"Received active message (%p) of type %hhu and length %hhu for me @ %s.\n"
.LC158:
	.string	"AM"
	.align 8
.LC159:
	.string	"Snooped on active message of type %hhu and length %hhu for %hu @ %s.\n"
	.text
	.type	TossimActiveMessageC$Model$receive, @function
TossimActiveMessageC$Model$receive:
.LFB315:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r14
	push	r13
	push	r12
	push	rbx
	sub	rsp, 32
	.cfi_offset 14, -24
	.cfi_offset 13, -32
	.cfi_offset 12, -40
	.cfi_offset 3, -48
	mov	QWORD PTR -56[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rcx, QWORD PTR -56[rbp]
	mov	edx, 41
	mov	rsi, rcx
	mov	rdi, rax
	call	memcpy@PLT
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimActiveMessageC$Packet$payloadLength
	mov	BYTE PTR -41[rbp], al
	call	TossimActiveMessageC$Packet$maxPayloadLength
	movzx	ebx, al
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	esi, ebx
	mov	rdi, rax
	call	TossimActiveMessageC$Packet$getPayload
	mov	QWORD PTR -40[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$isForMe
	test	al, al
	je	.L810
	mov	eax, 0
	call	sim_time_string
	mov	rbx, rax
	movzx	r13d, BYTE PTR -41[rbp]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$type
	movzx	r12d, al
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	sub	rsp, 8
	push	rbx
	mov	r9d, r13d
	mov	r8d, r12d
	mov	rcx, rax
	lea	rdx, .LC157[rip]
	lea	rsi, .LC158[rip]
	mov	edi, 105
	mov	eax, 0
	call	sim_log_debug
	add	rsp, 16
	movzx	r13d, BYTE PTR -41[rbp]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	r12, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$type
	movzx	ebx, al
	mov	eax, 0
	call	sim_node
	mov	r14, rax
	mov	rax, QWORD PTR -40[rbp]
	mov	ecx, r13d
	mov	rdx, rax
	mov	rsi, r12
	mov	edi, ebx
	call	TossimActiveMessageC$Receive$receive
	lea	rcx, 0[0+r14*8]
	lea	rdx, TossimActiveMessageC$bufferPointer[rip]
	mov	QWORD PTR [rcx+rdx], rax
	jmp	.L812
.L810:
	mov	eax, 0
	call	sim_time_string
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$destination
	movzx	r13d, ax
	movzx	r12d, BYTE PTR -41[rbp]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$type
	movzx	eax, al
	sub	rsp, 8
	push	rbx
	mov	r9d, r13d
	mov	r8d, r12d
	mov	ecx, eax
	lea	rdx, .LC159[rip]
	lea	rsi, .LC158[rip]
	mov	edi, 106
	mov	eax, 0
	call	sim_log_debug
	add	rsp, 16
	movzx	r13d, BYTE PTR -41[rbp]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	r12, QWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	TossimActiveMessageC$AMPacket$type
	movzx	ebx, al
	mov	eax, 0
	call	sim_node
	mov	r14, rax
	mov	rax, QWORD PTR -40[rbp]
	mov	ecx, r13d
	mov	rdx, rax
	mov	rsi, r12
	mov	edi, ebx
	call	TossimActiveMessageC$Snoop$receive
	lea	rcx, 0[0+r14*8]
	lea	rdx, TossimActiveMessageC$bufferPointer[rip]
	mov	QWORD PTR [rcx+rdx], rax
.L812:
	nop
	lea	rsp, -32[rbp]
	pop	rbx
	pop	r12
	pop	r13
	pop	r14
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE315:
	.size	TossimActiveMessageC$Model$receive, .-TossimActiveMessageC$Model$receive
	.type	TossimActiveMessageC$AMPacket$destination, @function
TossimActiveMessageC$AMPacket$destination:
.LFB316:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	__nesc_ntoh_uint16
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE316:
	.size	TossimActiveMessageC$AMPacket$destination, .-TossimActiveMessageC$AMPacket$destination
	.type	ActiveMessageAddressC$ActiveMessageAddress$amAddress, @function
ActiveMessageAddressC$ActiveMessageAddress$amAddress:
.LFB317:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, ActiveMessageAddressC$set[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L816
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, WORD PTR TOS_NODE_ID[rip]
	lea	rcx, [rdx+rdx]
	lea	rdx, ActiveMessageAddressC$addr[rip]
	mov	WORD PTR [rcx+rdx], ax
	mov	eax, 0
	call	sim_node
	lea	rdx, ActiveMessageAddressC$set[rip]
	mov	BYTE PTR [rax+rdx], 1
.L816:
	mov	eax, 0
	call	sim_node
	lea	rdx, [rax+rax]
	lea	rax, ActiveMessageAddressC$addr[rip]
	movzx	eax, WORD PTR [rdx+rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE317:
	.size	ActiveMessageAddressC$ActiveMessageAddress$amAddress, .-ActiveMessageAddressC$ActiveMessageAddress$amAddress
	.type	TossimActiveMessageC$AMPacket$type, @function
TossimActiveMessageC$AMPacket$type:
.LFB318:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 24
	mov	QWORD PTR -24[rbp], rdi
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	add	rax, 6
	mov	rdi, rax
	call	__nesc_ntoh_uint8
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE318:
	.size	TossimActiveMessageC$AMPacket$type, .-TossimActiveMessageC$AMPacket$type
	.type	VirtualizeTimerC$0$startTimer, @function
VirtualizeTimerC$0$startTimer:
.LFB319:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -24[rbp], esi
	mov	DWORD PTR -28[rbp], edx
	mov	eax, ecx
	mov	edx, edi
	mov	BYTE PTR -20[rbp], dl
	mov	BYTE PTR -32[rbp], al
	mov	eax, 0
	call	sim_node
	mov	rcx, rax
	movzx	eax, BYTE PTR -20[rbp]
	cdqe
	mov	rdx, rax
	add	rdx, rdx
	add	rdx, rax
	lea	rax, 0[0+rdx*4]
	mov	rdx, rax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 3
	add	rdx, rax
	lea	rax, VirtualizeTimerC$0$m_timers[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR -28[rbp]
	mov	DWORD PTR 4[rax], edx
	movzx	eax, BYTE PTR -32[rbp]
	and	eax, 1
	mov	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	ecx, edx
	and	ecx, 1
	movzx	edx, BYTE PTR 8[rax]
	and	edx, -2
	or	edx, ecx
	mov	BYTE PTR 8[rax], dl
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, BYTE PTR 8[rax]
	or	edx, 2
	mov	BYTE PTR 8[rax], dl
	call	VirtualizeTimerC$0$updateFromTimer$postTask
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE319:
	.size	VirtualizeTimerC$0$startTimer, .-VirtualizeTimerC$0$startTimer
	.section	.rodata
.LC160:
	.string	"Posting task %hhu.\n"
	.align 8
.LC161:
	.string	"Posting task %hhu, but already posted.\n"
	.text
	.type	SimSchedulerBasicP$TaskBasic$postTask, @function
SimSchedulerBasicP$TaskBasic$postTask:
.LFB320:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	eax, edi
	mov	BYTE PTR -20[rbp], al
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -2[rbp], al
	movzx	eax, BYTE PTR -20[rbp]
	mov	edi, eax
	call	SimSchedulerBasicP$pushTask
	test	al, al
	je	.L822
	mov	eax, 0
	jmp	.L823
.L822:
	mov	eax, 5
.L823:
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -2[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	cmp	BYTE PTR -1[rbp], 0
	jne	.L824
	movzx	eax, BYTE PTR -20[rbp]
	mov	ecx, eax
	lea	rdx, .LC160[rip]
	lea	rsi, .LC17[rip]
	mov	edi, 98
	mov	eax, 0
	call	sim_log_debug
	call	SimSchedulerBasicP$sim_scheduler_submit_event
	jmp	.L825
.L824:
	movzx	eax, BYTE PTR -20[rbp]
	mov	ecx, eax
	lea	rdx, .LC161[rip]
	lea	rsi, .LC17[rip]
	mov	edi, 99
	mov	eax, 0
	call	sim_log_debug
.L825:
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE320:
	.size	SimSchedulerBasicP$TaskBasic$postTask, .-SimSchedulerBasicP$TaskBasic$postTask
	.type	SimSchedulerBasicP$sim_scheduler_submit_event, @function
SimSchedulerBasicP$sim_scheduler_submit_event:
.LFB321:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event_pending[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L829
	mov	eax, 0
	call	sim_time
	mov	rbx, rax
	call	SimSchedulerBasicP$sim_config_task_latency
	movsx	r12, eax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	lea	rcx, [rbx+r12]
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	mov	rdx, rax
	lea	rax, SimSchedulerBasicP$sim_scheduler_event[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event[rip]
	add	rax, rdx
	mov	rdi, rax
	call	sim_queue_insert
	mov	eax, 0
	call	sim_node
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event_pending[rip]
	mov	BYTE PTR [rax+rdx], 1
.L829:
	nop
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE321:
	.size	SimSchedulerBasicP$sim_scheduler_submit_event, .-SimSchedulerBasicP$sim_scheduler_submit_event
	.type	Atm128AlarmAsyncP$0$Counter$get, @function
Atm128AlarmAsyncP$0$Counter$get:
.LFB322:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -22[rbp], al
	call	Atm128AlarmAsyncP$0$Timer$get
	mov	BYTE PTR -21[rbp], al
	call	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag
	and	eax, 2
	test	al, al
	je	.L831
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	ebx, DWORD PTR [rdx+rax]
	call	Atm128AlarmAsyncP$0$Compare$get
	movzx	eax, al
	add	ebx, eax
	call	Atm128AlarmAsyncP$0$Timer$get
	movzx	eax, al
	add	eax, ebx
	add	eax, 1
	mov	DWORD PTR -20[rbp], eax
	jmp	.L832
.L831:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	edx, DWORD PTR [rdx+rax]
	movzx	eax, BYTE PTR -21[rbp]
	add	eax, edx
	mov	DWORD PTR -20[rbp], eax
.L832:
	movzx	eax, BYTE PTR -22[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	mov	eax, DWORD PTR -20[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE322:
	.size	Atm128AlarmAsyncP$0$Counter$get, .-Atm128AlarmAsyncP$0$Counter$get
	.section	.rodata
	.align 8
.LC162:
	.string	"HplAtm128Timer0AsyncP: Getting timer: %hhu\n"
	.text
	.type	HplAtm128Timer0AsyncP$Timer0$get, @function
HplAtm128Timer0AsyncP$Timer0$get:
.LFB323:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_time
	mov	rbx, rax
	call	HplAtm128Timer0AsyncP$last_zero
	mov	rdx, rax
	mov	rax, rbx
	sub	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$sim_to_clock
	mov	QWORD PTR -24[rbp], rax
	call	HplAtm128Timer0AsyncP$shiftFromScale
	movzx	eax, ax
	mov	ecx, eax
	sar	QWORD PTR -24[rbp], cl
	mov	rax, QWORD PTR -24[rbp]
	mov	BYTE PTR -25[rbp], al
	movzx	eax, BYTE PTR -25[rbp]
	mov	ecx, eax
	lea	rdx, .LC162[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 190
	mov	eax, 0
	call	sim_log_debug
	movzx	eax, BYTE PTR -25[rbp]
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE323:
	.size	HplAtm128Timer0AsyncP$Timer0$get, .-HplAtm128Timer0AsyncP$Timer0$get
	.type	HplAtm128Timer0AsyncP$last_zero, @function
HplAtm128Timer0AsyncP$last_zero:
.LFB324:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	r12
	push	rbx
	.cfi_offset 12, -24
	.cfi_offset 3, -32
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	jne	.L837
	mov	eax, 0
	call	sim_node
	mov	r12d, eax
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	edi, r12d
	call	sim_mote_start_time
	lea	rcx, 0[0+rbx*8]
	lea	rdx, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	QWORD PTR [rcx+rdx], rax
.L837:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	rax, QWORD PTR [rdx+rax]
	pop	rbx
	pop	r12
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE324:
	.size	HplAtm128Timer0AsyncP$last_zero, .-HplAtm128Timer0AsyncP$last_zero
	.globl	sim_mote_start_time
	.type	sim_mote_start_time, @function
sim_mote_start_time:
.LFB325:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	call	SimMoteP$SimMote$getStartTime
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE325:
	.size	sim_mote_start_time, .-sim_mote_start_time
	.type	HplAtm128Timer0AsyncP$shiftFromScale, @function
HplAtm128Timer0AsyncP$shiftFromScale:
.LFB326:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	HplAtm128Timer0AsyncP$Timer0$getScale
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	cmp	eax, 7
	ja	.L842
	mov	eax, eax
	lea	rdx, 0[0+rax*4]
	lea	rax, .L844[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cdqe
	lea	rdx, .L844[rip]
	add	rax, rdx
	notrack jmp	rax
	.section	.rodata
	.align 4
	.align 4
.L844:
	.long	.L851-.L844
	.long	.L850-.L844
	.long	.L849-.L844
	.long	.L848-.L844
	.long	.L847-.L844
	.long	.L846-.L844
	.long	.L845-.L844
	.long	.L843-.L844
	.text
.L851:
	mov	eax, 0
	jmp	.L852
.L850:
	mov	eax, 0
	jmp	.L852
.L849:
	mov	eax, 3
	jmp	.L852
.L848:
	mov	eax, 5
	jmp	.L852
.L847:
	mov	eax, 6
	jmp	.L852
.L846:
	mov	eax, 7
	jmp	.L852
.L845:
	mov	eax, 8
	jmp	.L852
.L843:
	mov	eax, 10
	jmp	.L852
.L842:
	mov	eax, 255
.L852:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE326:
	.size	HplAtm128Timer0AsyncP$shiftFromScale, .-HplAtm128Timer0AsyncP$shiftFromScale
	.type	HplAtm128Timer0AsyncP$Timer0$getScale, @function
HplAtm128Timer0AsyncP$Timer0$getScale:
.LFB327:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 51[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	and	eax, 7
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE327:
	.size	HplAtm128Timer0AsyncP$Timer0$getScale, .-HplAtm128Timer0AsyncP$Timer0$getScale
	.type	HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag, @function
HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag:
.LFB328:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	mov	rdx, rax
	lea	rax, atm128RegFile[rip+54]
	movzx	eax, BYTE PTR [rdx+rax]
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -1[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE328:
	.size	HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag, .-HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag
	.section	.rodata
	.align 8
.LC163:
	.string	"HplAtm128Timer0AsyncP: Getting compare: %hhu\n"
	.text
	.type	HplAtm128Timer0AsyncP$Compare$get, @function
HplAtm128Timer0AsyncP$Compare$get:
.LFB329:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 49[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	mov	ecx, eax
	lea	rdx, .LC163[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 196
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 49[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE329:
	.size	HplAtm128Timer0AsyncP$Compare$get, .-HplAtm128Timer0AsyncP$Compare$get
	.globl	sim_packet_max_length
	.type	sim_packet_max_length, @function
sim_packet_max_length:
.LFB330:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 28
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE330:
	.size	sim_packet_max_length, .-sim_packet_max_length
	.globl	sim_packet_allocate
	.type	sim_packet_allocate, @function
sim_packet_allocate:
.LFB331:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	edi, 41
	call	malloc@PLT
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE331:
	.size	sim_packet_allocate, .-sim_packet_allocate
	.section	.rodata
	.align 8
.LC164:
	.string	"sim_packet.c: Freeing packet %p\n"
	.text
	.globl	sim_packet_free
	.type	sim_packet_free, @function
sim_packet_free:
.LFB332:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	rax, QWORD PTR -8[rbp]
	mov	rsi, rax
	lea	rdi, .LC164[rip]
	mov	eax, 0
	call	printf@PLT
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	free@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE332:
	.size	sim_packet_free, .-sim_packet_free
	.section	.rodata
	.align 8
.LC165:
	.string	"Mote %li signaling boot at time %s.\n"
.LC166:
	.string	"SimMainP"
	.text
	.globl	sim_main_start_mote
	.type	sim_main_start_mote, @function
sim_main_start_mote:
.LFB333:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 160
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -145[rbp], al
	call	SimMainP$Scheduler$init
	call	SimMainP$PlatformInit$init
	nop
.L865:
	call	SimMainP$Scheduler$runNextTask
	test	al, al
	jne	.L865
	call	SimMainP$SoftwareInit$init
	nop
.L866:
	call	SimMainP$Scheduler$runNextTask
	test	al, al
	jne	.L866
	movzx	eax, BYTE PTR -145[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	mov	eax, 0
	call	__nesc_enable_interrupt
	lea	rax, -144[rbp]
	mov	esi, 128
	mov	rdi, rax
	call	sim_print_now
	mov	eax, 0
	call	sim_node
	lea	rdx, -144[rbp]
	mov	r8, rdx
	mov	rcx, rax
	lea	rdx, .LC165[rip]
	lea	rsi, .LC166[rip]
	mov	edi, 94
	mov	eax, 0
	call	sim_log_debug
	call	SimMainP$Boot$booted
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L868
	call	__stack_chk_fail@PLT
.L868:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE333:
	.size	sim_main_start_mote, .-sim_main_start_mote
	.section	.rodata
	.align 8
.LC167:
	.string	"Told to run next task, but no task to run.\n"
.LC168:
	.string	"Running task %hhu.\n"
	.text
	.type	SimSchedulerBasicP$Scheduler$runNextTask, @function
SimSchedulerBasicP$Scheduler$runNextTask:
.LFB334:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -3[rbp], al
	call	SimSchedulerBasicP$popTask
	mov	BYTE PTR -2[rbp], al
	cmp	BYTE PTR -2[rbp], -1
	jne	.L870
	lea	rdx, .LC167[rip]
	lea	rsi, .LC17[rip]
	mov	edi, 96
	mov	eax, 0
	call	sim_log_debug
	mov	BYTE PTR -1[rbp], 0
	movzx	eax, BYTE PTR -3[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	movzx	eax, BYTE PTR -1[rbp]
	jmp	.L871
.L870:
	movzx	eax, BYTE PTR -3[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	movzx	eax, BYTE PTR -2[rbp]
	mov	ecx, eax
	lea	rdx, .LC168[rip]
	lea	rsi, .LC17[rip]
	mov	edi, 97
	mov	eax, 0
	call	sim_log_debug
	movzx	eax, BYTE PTR -2[rbp]
	mov	edi, eax
	call	SimSchedulerBasicP$TaskBasic$runTask
	mov	eax, 1
.L871:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE334:
	.size	SimSchedulerBasicP$Scheduler$runNextTask, .-SimSchedulerBasicP$Scheduler$runNextTask
	.type	VirtualizeTimerC$0$fireTimers, @function
VirtualizeTimerC$0$fireTimers:
.LFB335:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	WORD PTR -14[rbp], 0
	jmp	.L873
.L878:
	mov	eax, 0
	call	sim_node
	mov	rcx, rax
	movzx	eax, WORD PTR -14[rbp]
	cdqe
	mov	rdx, rax
	add	rdx, rdx
	add	rdx, rax
	lea	rax, 0[0+rdx*4]
	mov	rdx, rax
	mov	rax, rcx
	add	rax, rax
	add	rax, rcx
	sal	rax, 3
	add	rdx, rax
	lea	rax, VirtualizeTimerC$0$m_timers[rip]
	add	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR 8[rax]
	and	eax, 2
	test	al, al
	je	.L874
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR [rax]
	mov	eax, DWORD PTR -20[rbp]
	sub	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	cmp	DWORD PTR -12[rbp], eax
	jb	.L874
	mov	rax, QWORD PTR -8[rbp]
	movzx	eax, BYTE PTR 8[rax]
	and	eax, 1
	test	al, al
	je	.L875
	mov	rax, QWORD PTR -8[rbp]
	movzx	edx, BYTE PTR 8[rax]
	and	edx, -3
	mov	BYTE PTR 8[rax], dl
	jmp	.L876
.L875:
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR 4[rax]
	add	edx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], edx
.L876:
	movzx	eax, WORD PTR -14[rbp]
	movzx	eax, al
	mov	edi, eax
	call	VirtualizeTimerC$0$Timer$fired
	jmp	.L877
.L874:
	movzx	eax, WORD PTR -14[rbp]
	add	eax, 1
	mov	WORD PTR -14[rbp], ax
.L873:
	cmp	WORD PTR -14[rbp], 1
	jbe	.L878
.L877:
	call	VirtualizeTimerC$0$updateFromTimer$postTask
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE335:
	.size	VirtualizeTimerC$0$fireTimers, .-VirtualizeTimerC$0$fireTimers
	.type	AMQueueEntryP$0$AMSend$send, @function
AMQueueEntryP$0$AMSend$send:
.LFB336:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	QWORD PTR -16[rbp], rsi
	mov	WORD PTR -4[rbp], ax
	mov	eax, edx
	mov	BYTE PTR -8[rbp], al
	movzx	edx, WORD PTR -4[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	AMQueueEntryP$0$AMPacket$setDestination
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, 6
	mov	rdi, rax
	call	AMQueueEntryP$0$AMPacket$setType
	movzx	edx, BYTE PTR -8[rbp]
	mov	rax, QWORD PTR -16[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	AMQueueEntryP$0$Send$send
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE336:
	.size	AMQueueEntryP$0$AMSend$send, .-AMQueueEntryP$0$AMSend$send
	.section	.rodata
	.align 8
.LC169:
	.string	"AM: Sending packet (id=%hhu, len=%hhu) to %hu\n"
	.text
	.type	TossimActiveMessageC$AMSend$send, @function
TossimActiveMessageC$AMSend$send:
.LFB337:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	eax, esi
	mov	QWORD PTR -32[rbp], rdx
	mov	edx, ecx
	mov	ecx, edi
	mov	BYTE PTR -20[rbp], cl
	mov	WORD PTR -24[rbp], ax
	mov	eax, edx
	mov	BYTE PTR -36[rbp], al
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	TossimActiveMessageC$getHeader
	mov	QWORD PTR -8[rbp], rax
	movzx	ecx, WORD PTR -24[rbp]
	movzx	edx, BYTE PTR -36[rbp]
	movzx	eax, BYTE PTR -20[rbp]
	mov	r9d, ecx
	mov	r8d, edx
	mov	ecx, eax
	lea	rdx, .LC169[rip]
	lea	rsi, .LC158[rip]
	mov	edi, 104
	mov	eax, 0
	call	sim_log_debug
	movzx	eax, BYTE PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 6
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint8
	movzx	edx, WORD PTR -24[rbp]
	mov	rax, QWORD PTR -8[rbp]
	mov	esi, edx
	mov	rdi, rax
	call	__nesc_hton_uint16
	call	TossimActiveMessageC$AMPacket$address
	movzx	eax, ax
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 2
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint16
	movzx	eax, BYTE PTR -36[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	add	rdx, 4
	mov	esi, eax
	mov	rdi, rdx
	call	__nesc_hton_uint8
	movzx	eax, BYTE PTR -36[rbp]
	add	eax, 9
	movzx	edx, al
	movzx	eax, WORD PTR -24[rbp]
	mov	rcx, QWORD PTR -32[rbp]
	mov	rsi, rcx
	mov	edi, eax
	call	TossimActiveMessageC$Model$send
	mov	BYTE PTR -9[rbp], al
	movzx	eax, BYTE PTR -9[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE337:
	.size	TossimActiveMessageC$AMSend$send, .-TossimActiveMessageC$AMSend$send
	.type	CpmModelC$packetNoise, @function
CpmModelC$packetNoise:
.LFB338:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	call	CpmModelC$noise_hash_generation
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -8[rbp], rax
	movsd	xmm0, QWORD PTR -16[rbp]
	movsd	xmm1, QWORD PTR .LC35[rip]
	divsd	xmm0, xmm1
	mov	rax, QWORD PTR .LC35[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	jmp	.L884
.L886:
	mov	rax, QWORD PTR -8[rbp]
	cmp	rax, QWORD PTR -24[rbp]
	je	.L885
	mov	rax, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR 24[rax]
	movsd	xmm1, QWORD PTR .LC35[rip]
	divsd	xmm0, xmm1
	mov	rax, QWORD PTR .LC35[rip]
	movapd	xmm1, xmm0
	movq	xmm0, rax
	call	pow@PLT
	movsd	xmm1, QWORD PTR -16[rbp]
	addsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
.L885:
	mov	rax, QWORD PTR -8[rbp]
	mov	rax, QWORD PTR 56[rax]
	mov	QWORD PTR -8[rbp], rax
.L884:
	cmp	QWORD PTR -8[rbp], 0
	jne	.L886
	mov	rax, QWORD PTR -16[rbp]
	movq	xmm0, rax
	call	log@PLT
	movsd	xmm1, QWORD PTR .LC35[rip]
	mulsd	xmm0, xmm1
	movsd	xmm1, QWORD PTR .LC36[rip]
	divsd	xmm0, xmm1
	movsd	QWORD PTR -16[rbp], xmm0
	movsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE338:
	.size	CpmModelC$packetNoise, .-CpmModelC$packetNoise
	.section	.rodata
.LC170:
	.string	"IN: noise_hash_generation()\n"
	.align 8
.LC171:
	.string	"%s: OUT: noise_hash_generation(): %lf\n"
.LC172:
	.string	"CpmModelC,Tal"
	.text
	.type	CpmModelC$noise_hash_generation, @function
CpmModelC$noise_hash_generation:
.LFB339:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	call	CpmModelC$timeInMs
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC35[rip]
	mulsd	xmm0, xmm1
	cvttsd2si	rcx, xmm0
	movabs	rdx, 7378697629483820647
	mov	rax, rcx
	imul	rdx
	mov	rax, rdx
	sar	rax, 2
	sar	rcx, 63
	mov	rdx, rcx
	sub	rax, rdx
	mov	DWORD PTR -20[rbp], eax
	movsd	xmm1, QWORD PTR -8[rbp]
	movsd	xmm0, QWORD PTR .LC35[rip]
	mulsd	xmm0, xmm1
	cvttsd2si	rcx, xmm0
	movabs	rdx, 7378697629483820647
	mov	rax, rcx
	imul	rdx
	mov	rax, rdx
	sar	rax, 2
	mov	rsi, rcx
	sar	rsi, 63
	sub	rax, rsi
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	add	rax, rax
	sub	rcx, rax
	mov	rdx, rcx
	mov	BYTE PTR -23[rbp], dl
	mov	eax, 0
	call	sim_node
	mov	WORD PTR -22[rbp], ax
	lea	rdx, .LC170[rip]
	lea	rsi, .LC38[rip]
	mov	edi, 122
	mov	eax, 0
	call	sim_log_debug
	cmp	BYTE PTR -23[rbp], 4
	jbe	.L889
	cmp	BYTE PTR -23[rbp], 9
	ja	.L889
	mov	eax, DWORD PTR -20[rbp]
	lea	edx, 1[rax]
	movzx	eax, WORD PTR -22[rbp]
	mov	esi, edx
	mov	edi, eax
	call	sim_noise_generate
	movsx	eax, al
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -16[rbp], xmm0
	jmp	.L890
.L889:
	movzx	eax, WORD PTR -22[rbp]
	mov	edx, DWORD PTR -20[rbp]
	mov	esi, edx
	mov	edi, eax
	call	sim_noise_generate
	movsx	eax, al
	pxor	xmm0, xmm0
	cvtsi2sd	xmm0, eax
	movsd	QWORD PTR -16[rbp], xmm0
.L890:
	mov	eax, 0
	call	sim_time_string
	mov	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	movq	xmm0, rax
	mov	rcx, rdx
	lea	rdx, .LC171[rip]
	lea	rsi, .LC172[rip]
	mov	edi, 123
	mov	eax, 1
	call	sim_log_debug
	movsd	xmm0, QWORD PTR -16[rbp]
	movq	rax, xmm0
	movq	xmm0, rax
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE339:
	.size	CpmModelC$noise_hash_generation, .-CpmModelC$noise_hash_generation
	.section	.rodata
	.align 8
.LC173:
	.string	"%s received send done for %p, signaling for %p.\n"
.LC174:
	.string	"PointerBug"
	.text
	.type	AMQueueImplP$0$AMSend$sendDone, @function
AMQueueImplP$0$AMSend$sendDone:
.LFB340:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	ecx, edi
	mov	QWORD PTR -32[rbp], rsi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -20[rbp], dl
	mov	BYTE PTR -24[rbp], al
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L896
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	cdqe
	add	rax, rbx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	rax, QWORD PTR [rdx+rax]
	cmp	QWORD PTR -32[rbp], rax
	jne	.L895
	movzx	ebx, BYTE PTR -24[rbp]
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	mov	rcx, QWORD PTR -32[rbp]
	mov	edx, ebx
	mov	rsi, rcx
	mov	edi, eax
	call	AMQueueImplP$0$sendDone
	jmp	.L892
.L895:
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	cdqe
	add	rax, rbx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	rdx, QWORD PTR [rdx+rax]
	mov	rax, QWORD PTR -32[rbp]
	mov	r9, rdx
	mov	r8, rax
	lea	rcx, __FUNCTION__.1[rip]
	lea	rdx, .LC173[rip]
	lea	rsi, .LC174[rip]
	mov	edi, 175
	mov	eax, 0
	call	sim_log_debug
	jmp	.L892
.L896:
	nop
.L892:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE340:
	.size	AMQueueImplP$0$AMSend$sendDone, .-AMQueueImplP$0$AMSend$sendDone
	.type	AMQueueImplP$0$tryToSend, @function
AMQueueImplP$0$tryToSend:
.LFB341:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	call	AMQueueImplP$0$nextPacket
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L899
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, AMQueueImplP$0$current[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	cdqe
	add	rax, rbx
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	AMQueueImplP$0$AMPacket$type
	mov	BYTE PTR -29[rbp], al
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	AMQueueImplP$0$AMPacket$destination
	mov	WORD PTR -26[rbp], ax
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	AMQueueImplP$0$Packet$payloadLength
	mov	BYTE PTR -28[rbp], al
	movzx	ecx, BYTE PTR -28[rbp]
	movzx	esi, WORD PTR -26[rbp]
	movzx	eax, BYTE PTR -29[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	mov	edi, eax
	call	AMQueueImplP$0$AMSend$send
	mov	BYTE PTR -27[rbp], al
	cmp	BYTE PTR -27[rbp], 0
	je	.L899
	call	AMQueueImplP$0$errorTask$postTask
.L899:
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE341:
	.size	AMQueueImplP$0$tryToSend, .-AMQueueImplP$0$tryToSend
	.section	.rodata
.LC175:
	.string	"Packet sent..."
.LC176:
	.string	" at time %s \n"
.LC177:
	.string	"Send done error!"
	.align 8
.LC178:
	.string	"  [\342\210\232] Packet acknoledgment OK\n"
.LC179:
	.string	"radio_ack"
	.align 8
.LC180:
	.string	"  [x] Packet acknoledgment FAILED\n"
.LC181:
	.string	"  Sending again...\n"
	.text
	.type	sendAckC$AMSend$sendDone, @function
sendAckC$AMSend$sendDone:
.LFB342:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -12[rbp], al
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	cmp	QWORD PTR -8[rbp], rax
	jne	.L901
	cmp	BYTE PTR -12[rbp], 0
	jne	.L901
	lea	rdx, .LC175[rip]
	lea	rsi, .LC26[rip]
	mov	edi, 156
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_time_string
	mov	rcx, rax
	lea	rdx, .LC176[rip]
	lea	rsi, .LC26[rip]
	mov	edi, 157
	mov	eax, 0
	call	sim_log_debug_clear
	jmp	.L902
.L901:
	lea	rdx, .LC177[rip]
	lea	rsi, .LC26[rip]
	mov	edi, 158
	mov	eax, 0
	call	sim_log_error
.L902:
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	sendAckC$ack$wasAcked
	cmp	al, 1
	jne	.L903
	call	sendAckC$MilliTimer$stop
	lea	rdx, .LC178[rip]
	lea	rsi, .LC179[rip]
	mov	edi, 159
	mov	eax, 0
	call	sim_log_debug
	jmp	.L905
.L903:
	lea	rdx, .LC180[rip]
	lea	rsi, .LC179[rip]
	mov	edi, 160
	mov	eax, 0
	call	sim_log_error
	lea	rdx, .LC181[rip]
	lea	rsi, .LC179[rip]
	mov	edi, 161
	mov	eax, 0
	call	sim_log_error
.L905:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE342:
	.size	sendAckC$AMSend$sendDone, .-sendAckC$AMSend$sendDone
	.type	CpmModelC$shouldReceive, @function
CpmModelC$shouldReceive:
.LFB343:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	movsd	QWORD PTR -24[rbp], xmm0
	mov	rax, QWORD PTR -24[rbp]
	movq	xmm0, rax
	call	CpmModelC$prr_estimate_from_snr
	movq	rax, xmm0
	mov	QWORD PTR -16[rbp], rax
	call	RandomUniform
	movq	rax, xmm0
	mov	QWORD PTR -8[rbp], rax
	movsd	xmm0, QWORD PTR -16[rbp]
	pxor	xmm1, xmm1
	comisd	xmm0, xmm1
	jb	.L907
	movsd	xmm0, QWORD PTR .LC73[rip]
	comisd	xmm0, QWORD PTR -16[rbp]
	jb	.L907
	movsd	xmm0, QWORD PTR -16[rbp]
	comisd	xmm0, QWORD PTR -8[rbp]
	jbe	.L916
	movsd	xmm0, QWORD PTR .LC73[rip]
	movsd	QWORD PTR -16[rbp], xmm0
	jmp	.L907
.L916:
	pxor	xmm0, xmm0
	movsd	QWORD PTR -16[rbp], xmm0
.L907:
	cvttsd2si	eax, QWORD PTR -16[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE343:
	.size	CpmModelC$shouldReceive, .-CpmModelC$shouldReceive
	.type	TossimPacketModelC$GainRadioModel$shouldAck, @function
TossimPacketModelC$GainRadioModel$shouldAck:
.LFB344:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$running[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	je	.L918
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$transmitting[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L918
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	TossimPacketModelC$Packet$shouldAck
	jmp	.L919
.L918:
	mov	eax, 0
.L919:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE344:
	.size	TossimPacketModelC$GainRadioModel$shouldAck, .-TossimPacketModelC$GainRadioModel$shouldAck
	.type	CpmModelC$sim_gain_schedule_ack, @function
CpmModelC$sim_gain_schedule_ack:
.LFB345:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	edi, 48
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -20[rbp]
	movsx	rdx, eax
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR 8[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 16[rax], 1
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR 17[rax], 0
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	QWORD PTR [rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, CpmModelC$sim_gain_ack_handle[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	lea	rdx, sim_queue_cleanup_event[rip]
	mov	QWORD PTR 40[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	mov	rdx, QWORD PTR -40[rbp]
	mov	QWORD PTR 24[rax], rdx
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	sim_queue_insert
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE345:
	.size	CpmModelC$sim_gain_schedule_ack, .-CpmModelC$sim_gain_schedule_ack
	.type	RandomMlcgC$Random$rand32, @function
RandomMlcgC$Random$rand32:
.LFB346:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -21[rbp], al
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, RandomMlcgC$seed[rip]
	mov	eax, DWORD PTR [rdx+rax]
	mov	eax, eax
	imul	rax, rax, 33614
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR -16[rbp], eax
	shr	DWORD PTR -16[rbp]
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 32
	mov	DWORD PTR -12[rbp], eax
	mov	edx, DWORD PTR -12[rbp]
	mov	eax, DWORD PTR -16[rbp]
	add	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	test	eax, eax
	jns	.L922
	and	DWORD PTR -20[rbp], 2147483647
	add	DWORD PTR -20[rbp], 1
.L922:
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*4]
	lea	rdx, RandomMlcgC$seed[rip]
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR [rcx+rdx], eax
	movzx	eax, BYTE PTR -21[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	mov	eax, DWORD PTR -20[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE346:
	.size	RandomMlcgC$Random$rand32, .-RandomMlcgC$Random$rand32
	.type	Atm128AlarmAsyncP$0$Alarm$startAt, @function
Atm128AlarmAsyncP$0$Alarm$startAt:
.LFB347:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	DWORD PTR -24[rbp], esi
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -1[rbp], al
	mov	eax, 0
	call	sim_node
	lea	rdx, Atm128AlarmAsyncP$0$set[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*4]
	lea	rdx, Atm128AlarmAsyncP$0$t0[rip]
	mov	eax, DWORD PTR -20[rbp]
	mov	DWORD PTR [rcx+rdx], eax
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*4]
	lea	rdx, Atm128AlarmAsyncP$0$dt[rip]
	mov	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR [rcx+rdx], eax
	movzx	eax, BYTE PTR -1[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	call	Atm128AlarmAsyncP$0$setInterrupt
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE347:
	.size	Atm128AlarmAsyncP$0$Alarm$startAt, .-Atm128AlarmAsyncP$0$Alarm$startAt
	.section	.rodata
	.align 8
.LC182:
	.string	"Atm128AlarmAsyncP: TIFR is %hhx\n"
.LC183:
	.string	"Atm128AlarmAsyncP"
	.align 8
.LC184:
	.string	"Atm128AlarmAsyncP: under min: %hhu.\n"
.LC185:
	.string	"Atm128AlarmAsyncP: OCF set.\n"
	.align 8
.LC186:
	.string	"Atm128AlarmAsyncP: no alarm set, set at max.\n"
	.align 8
.LC187:
	.string	"Atm128AlarmAsyncP: now-t0 = %llu, dt = %llu\n"
	.text
	.type	Atm128AlarmAsyncP$0$setInterrupt, @function
Atm128AlarmAsyncP$0$setInterrupt:
.LFB348:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 24
	.cfi_offset 3, -24
	mov	BYTE PTR -29[rbp], 0
	call	__nesc_atomic_start@PLT
	mov	BYTE PTR -27[rbp], al
	call	Atm128AlarmAsyncP$0$Compare$get
	mov	ebx, eax
	call	Atm128AlarmAsyncP$0$Timer$get
	mov	edx, eax
	mov	eax, ebx
	sub	eax, edx
	add	eax, 1
	mov	BYTE PTR -26[rbp], al
	call	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag
	mov	BYTE PTR -25[rbp], al
	movzx	eax, BYTE PTR -25[rbp]
	mov	ecx, eax
	lea	rdx, .LC182[rip]
	lea	rsi, .LC183[rip]
	mov	edi, 176
	mov	eax, 0
	call	sim_log_debug
	cmp	BYTE PTR -26[rbp], 0
	je	.L926
	cmp	BYTE PTR -26[rbp], 1
	jbe	.L927
.L926:
	movzx	eax, BYTE PTR -25[rbp]
	and	eax, 2
	test	eax, eax
	je	.L928
.L927:
	cmp	BYTE PTR -26[rbp], 1
	ja	.L929
	movzx	eax, BYTE PTR -26[rbp]
	mov	ecx, eax
	lea	rdx, .LC184[rip]
	lea	rsi, .LC183[rip]
	mov	edi, 177
	mov	eax, 0
	call	sim_log_debug
	jmp	.L930
.L929:
	lea	rdx, .LC185[rip]
	lea	rsi, .LC183[rip]
	mov	edi, 178
	mov	eax, 0
	call	sim_log_debug
.L930:
	movzx	eax, BYTE PTR -27[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	jmp	.L925
.L928:
	mov	eax, 0
	call	sim_node
	lea	rdx, Atm128AlarmAsyncP$0$set[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L932
	mov	BYTE PTR -28[rbp], -26
	lea	rdx, .LC186[rip]
	lea	rsi, .LC183[rip]
	mov	edi, 179
	mov	eax, 0
	call	sim_log_debug
	jmp	.L933
.L932:
	call	Atm128AlarmAsyncP$0$Counter$get
	mov	DWORD PTR -24[rbp], eax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$dt[rip]
	mov	ebx, DWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$t0[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, edx
	mov	r8d, ebx
	mov	ecx, eax
	lea	rdx, .LC187[rip]
	lea	rsi, .LC183[rip]
	mov	edi, 180
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$t0[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, DWORD PTR -24[rbp]
	sub	eax, edx
	mov	ebx, eax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$dt[rip]
	mov	eax, DWORD PTR [rdx+rax]
	cmp	ebx, eax
	jb	.L934
	mov	eax, 0
	call	sim_node
	lea	rdx, Atm128AlarmAsyncP$0$set[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	BYTE PTR -29[rbp], 1
	mov	BYTE PTR -28[rbp], -26
	jmp	.L933
.L934:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$t0[rip]
	mov	ebx, DWORD PTR [rdx+rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$dt[rip]
	mov	eax, DWORD PTR [rdx+rax]
	add	ebx, eax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	mov	edx, DWORD PTR [rdx+rax]
	mov	eax, ebx
	sub	eax, edx
	mov	DWORD PTR -20[rbp], eax
	cmp	DWORD PTR -20[rbp], 230
	jbe	.L935
	mov	BYTE PTR -28[rbp], -26
	jmp	.L933
.L935:
	mov	eax, DWORD PTR -20[rbp]
	cmp	al, 1
	ja	.L936
	mov	BYTE PTR -28[rbp], 2
	jmp	.L933
.L936:
	mov	eax, DWORD PTR -20[rbp]
	mov	BYTE PTR -28[rbp], al
.L933:
	movzx	eax, BYTE PTR -28[rbp]
	sub	eax, 1
	mov	BYTE PTR -28[rbp], al
	movzx	eax, BYTE PTR -28[rbp]
	mov	edi, eax
	call	Atm128AlarmAsyncP$0$setOcr0
	movzx	eax, BYTE PTR -27[rbp]
	mov	edi, eax
	call	__nesc_atomic_end@PLT
	cmp	BYTE PTR -29[rbp], 0
	je	.L925
	call	Atm128AlarmAsyncP$0$Alarm$fired
.L925:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE348:
	.size	Atm128AlarmAsyncP$0$setInterrupt, .-Atm128AlarmAsyncP$0$setInterrupt
	.section	.rodata
	.align 8
.LC188:
	.string	"HplAtm128Timer0AsyncP: Setting compare: %hhu\n"
	.text
	.type	HplAtm128Timer0AsyncP$Compare$set, @function
HplAtm128Timer0AsyncP$Compare$set:
.LFB349:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, edi
	mov	BYTE PTR -4[rbp], al
	movzx	eax, BYTE PTR -4[rbp]
	mov	ecx, eax
	lea	rdx, .LC188[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 197
	mov	eax, 0
	call	sim_log_debug
	cmp	BYTE PTR -4[rbp], 0
	je	.L938
	cmp	BYTE PTR -4[rbp], -3
	jbe	.L939
.L938:
	mov	BYTE PTR -4[rbp], 1
.L939:
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 49[rax]
	lea	rax, atm128RegFile[rip]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	cmp	BYTE PTR -4[rbp], al
	je	.L941
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 5
	lea	rdx, 49[rax]
	lea	rax, atm128RegFile[rip]
	add	rdx, rax
	movzx	eax, BYTE PTR -4[rbp]
	mov	BYTE PTR [rdx], al
	call	HplAtm128Timer0AsyncP$schedule_new_compare
.L941:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE349:
	.size	HplAtm128Timer0AsyncP$Compare$set, .-HplAtm128Timer0AsyncP$Compare$set
	.type	HplAtm128Timer0AsyncP$schedule_new_compare, @function
HplAtm128Timer0AsyncP$schedule_new_compare:
.LFB350:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$compare[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L943
	call	HplAtm128Timer0AsyncP$cancel_compare
.L943:
	call	HplAtm128Timer0AsyncP$Timer0$getScale
	test	al, al
	je	.L945
	call	HplAtm128Timer0AsyncP$allocate_compare
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$configure_compare
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, HplAtm128Timer0AsyncP$compare[rip]
	mov	rax, QWORD PTR -8[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	rdi, rax
	call	sim_queue_insert
.L945:
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE350:
	.size	HplAtm128Timer0AsyncP$schedule_new_compare, .-HplAtm128Timer0AsyncP$schedule_new_compare
	.type	sim_queue_allocate_event, @function
sim_queue_allocate_event:
.LFB351:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	edi, 48
	call	malloc@PLT
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	mov	edx, 48
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, 0
	call	sim_node
	mov	rdx, QWORD PTR -8[rbp]
	mov	QWORD PTR 8[rdx], rax
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE351:
	.size	sim_queue_allocate_event, .-sim_queue_allocate_event
	.globl	INTERRUPT_16
	.type	INTERRUPT_16, @function
INTERRUPT_16:
.LFB352:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, HplAtm128Timer0AsyncP$inOverflow[rip]
	mov	BYTE PTR [rax+rdx], 1
	call	HplAtm128Timer0AsyncP$Timer0$overflow
	mov	eax, 0
	call	sim_node
	lea	rdx, HplAtm128Timer0AsyncP$inOverflow[rip]
	mov	BYTE PTR [rax+rdx], 0
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE352:
	.size	INTERRUPT_16, .-INTERRUPT_16
	.section	.rodata
	.align 8
.LC189:
	.string	"Scheduling new overflow for %i at time %llu\n"
	.text
	.type	HplAtm128Timer0AsyncP$configure_overflow, @function
HplAtm128Timer0AsyncP$configure_overflow:
.LFB353:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -24[rbp], 0
	call	HplAtm128Timer0AsyncP$Timer0$get
	mov	BYTE PTR -26[rbp], al
	mov	BYTE PTR -25[rbp], 0
	movzx	eax, BYTE PTR -25[rbp]
	sub	al, BYTE PTR -26[rbp]
	movzx	eax, al
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	jne	.L950
	mov	QWORD PTR -24[rbp], 256
.L950:
	call	HplAtm128Timer0AsyncP$shiftFromScale
	movzx	eax, ax
	mov	ecx, eax
	sal	QWORD PTR -24[rbp], cl
	mov	rax, QWORD PTR -24[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$clock_to_sim
	mov	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_time
	add	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_time
	mov	rbx, rax
	call	HplAtm128Timer0AsyncP$last_zero
	sub	rbx, rax
	call	HplAtm128Timer0AsyncP$shiftFromScale
	movzx	eax, ax
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	movsx	rcx, eax
	mov	rax, rbx
	cqo
	idiv	rcx
	mov	rax, rdx
	sub	QWORD PTR -24[rbp], rax
	mov	eax, 0
	call	sim_node
	mov	rdx, QWORD PTR -24[rbp]
	mov	r8, rdx
	mov	rcx, rax
	lea	rdx, .LC189[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 200
	mov	eax, 0
	call	sim_log_debug
	mov	rax, QWORD PTR -40[rbp]
	mov	rdx, QWORD PTR -24[rbp]
	mov	QWORD PTR [rax], rdx
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE353:
	.size	HplAtm128Timer0AsyncP$configure_overflow, .-HplAtm128Timer0AsyncP$configure_overflow
	.globl	INTERRUPT_15
	.type	INTERRUPT_15, @function
INTERRUPT_15:
.LFB354:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	call	HplAtm128Timer0AsyncP$Compare$fired
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE354:
	.size	INTERRUPT_15, .-INTERRUPT_15
	.section	.rodata
	.align 8
.LC190:
	.string	"Configuring new compare of %i for %i at time %llu  (@ %llu)\n"
	.text
	.type	HplAtm128Timer0AsyncP$configure_compare, @function
HplAtm128Timer0AsyncP$configure_compare:
.LFB355:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 56
	.cfi_offset 3, -24
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -32[rbp], 0
	mov	QWORD PTR -24[rbp], 0
	call	HplAtm128Timer0AsyncP$Timer0$get
	mov	BYTE PTR -34[rbp], al
	call	HplAtm128Timer0AsyncP$Compare$get
	mov	BYTE PTR -33[rbp], al
	movzx	eax, BYTE PTR -33[rbp]
	sub	al, BYTE PTR -34[rbp]
	movzx	eax, al
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	jne	.L953
	mov	QWORD PTR -32[rbp], 256
.L953:
	mov	rax, QWORD PTR -32[rbp]
	lea	rbx, 1[rax]
	call	HplAtm128Timer0AsyncP$shiftFromScale
	movzx	eax, ax
	mov	ecx, eax
	sal	rbx, cl
	mov	rax, rbx
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$clock_to_sim
	mov	QWORD PTR -32[rbp], rax
	mov	eax, 0
	call	sim_time
	add	QWORD PTR -32[rbp], rax
	mov	eax, 0
	call	sim_time
	mov	QWORD PTR -24[rbp], rax
	call	HplAtm128Timer0AsyncP$last_zero
	sub	QWORD PTR -24[rbp], rax
	call	HplAtm128Timer0AsyncP$shiftFromScale
	movzx	eax, ax
	mov	edx, 1
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	cdqe
	mov	rdi, rax
	call	HplAtm128Timer0AsyncP$clock_to_sim
	mov	rcx, rax
	mov	rax, QWORD PTR -24[rbp]
	cqo
	idiv	rcx
	mov	QWORD PTR -24[rbp], rdx
	mov	rax, QWORD PTR -24[rbp]
	sub	QWORD PTR -32[rbp], rax
	mov	eax, 0
	call	sim_time
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	mov	rdx, rax
	movzx	eax, BYTE PTR -33[rbp]
	mov	rcx, QWORD PTR -32[rbp]
	sub	rsp, 8
	push	rbx
	mov	r9, rcx
	mov	r8, rdx
	mov	ecx, eax
	lea	rdx, .LC190[rip]
	lea	rsi, .LC86[rip]
	mov	edi, 189
	mov	eax, 0
	call	sim_log_debug
	add	rsp, 16
	mov	rax, QWORD PTR -56[rbp]
	mov	rdx, QWORD PTR -32[rbp]
	mov	QWORD PTR [rax], rdx
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE355:
	.size	HplAtm128Timer0AsyncP$configure_compare, .-HplAtm128Timer0AsyncP$configure_compare
	.section	.rodata
	.align 8
.LC191:
	.string	"TossimPacketModelC: Control.start() called before initialization!\n"
	.align 8
.LC192:
	.string	"TossimPacketModelC: Control.start() called.\n"
	.text
	.type	TossimPacketModelC$Control$start, @function
TossimPacketModelC$Control$start:
.LFB356:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 0
	call	sim_node
	lea	rdx, TossimPacketModelC$initialized[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L955
	lea	rdx, .LC191[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 110
	mov	eax, 0
	call	sim_log_error
	mov	eax, 1
	jmp	.L956
.L955:
	lea	rdx, .LC192[rip]
	lea	rsi, .LC60[rip]
	mov	edi, 111
	mov	eax, 0
	call	sim_log_debug
	call	TossimPacketModelC$startDoneTask$postTask
	mov	eax, 0
.L956:
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE356:
	.size	TossimPacketModelC$Control$start, .-TossimPacketModelC$Control$start
	.globl	sim_mote_euid
	.type	sim_mote_euid, @function
sim_mote_euid:
.LFB357:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	call	SimMoteP$SimMote$getEuid
	mov	QWORD PTR -8[rbp], rax
	mov	eax, DWORD PTR -12[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	rax, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE357:
	.size	sim_mote_euid, .-sim_mote_euid
	.globl	sim_mote_set_euid
	.type	sim_mote_set_euid, @function
sim_mote_set_euid:
.LFB358:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	rax, QWORD PTR -32[rbp]
	mov	rdi, rax
	call	SimMoteP$SimMote$setEuid
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE358:
	.size	sim_mote_set_euid, .-sim_mote_set_euid
	.section	.rodata
	.align 8
.LC193:
	.string	"Fetched %s of %i to be %p with len %i (result %i)\n"
	.text
	.globl	sim_mote_get_variable_info
	.type	sim_mote_get_variable_info, @function
sim_mote_get_variable_info:
.LFB359:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	QWORD PTR -40[rbp], rdx
	mov	QWORD PTR -48[rbp], rcx
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	rdx, QWORD PTR -48[rbp]
	mov	rcx, QWORD PTR -40[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	rsi, rcx
	mov	rdi, rax
	call	SimMoteP$SimMote$getVariableInfo
	mov	DWORD PTR -4[rbp], eax
	mov	rax, QWORD PTR -48[rbp]
	mov	edx, DWORD PTR [rax]
	mov	rax, QWORD PTR -40[rbp]
	mov	rdi, QWORD PTR [rax]
	mov	esi, DWORD PTR -20[rbp]
	mov	rax, QWORD PTR -32[rbp]
	mov	ecx, DWORD PTR -4[rbp]
	push	rcx
	push	rdx
	mov	r9, rdi
	mov	r8d, esi
	mov	rcx, rax
	lea	rdx, .LC193[rip]
	lea	rsi, .LC102[rip]
	mov	edi, 101
	mov	eax, 0
	call	sim_log_debug
	add	rsp, 16
	mov	eax, DWORD PTR -8[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, DWORD PTR -4[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE359:
	.size	sim_mote_get_variable_info, .-sim_mote_get_variable_info
	.section	.rodata
.LC194:
	.string	"Setting start time to %llu\n"
	.text
	.globl	sim_mote_set_start_time
	.type	sim_mote_set_start_time, @function
sim_mote_set_start_time:
.LFB360:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	QWORD PTR -32[rbp], rsi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, 0
	call	sim_node
	lea	rcx, 0[0+rax*8]
	lea	rdx, SimMoteP$startTime[rip]
	mov	rax, QWORD PTR -32[rbp]
	mov	QWORD PTR [rcx+rdx], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$startTime[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rcx, rax
	lea	rdx, .LC194[rip]
	lea	rsi, .LC102[rip]
	mov	edi, 102
	mov	eax, 0
	call	sim_log_debug
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE360:
	.size	sim_mote_set_start_time, .-sim_mote_set_start_time
	.globl	sim_mote_turn_on
	.type	sim_mote_turn_on, @function
sim_mote_turn_on:
.LFB361:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	call	SimMoteP$SimMote$turnOn
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE361:
	.size	sim_mote_turn_on, .-sim_mote_turn_on
	.type	SimMoteP$SimMote$turnOn, @function
SimMoteP$SimMote$turnOn:
.LFB362:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 8
	.cfi_offset 3, -24
	mov	eax, 0
	call	sim_node
	lea	rdx, SimMoteP$isOn[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	test	al, al
	jne	.L968
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L967
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	BYTE PTR 17[rax], 1
.L967:
	mov	eax, 0
	call	sim_node
	mov	edi, eax
	call	__nesc_nido_initialise
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_time
	lea	rcx, 0[0+rbx*8]
	lea	rdx, SimMoteP$startTime[rip]
	mov	QWORD PTR [rcx+rdx], rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$startTime[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rcx, rax
	lea	rdx, .LC194[rip]
	lea	rsi, .LC102[rip]
	mov	edi, 100
	mov	eax, 0
	call	sim_log_debug
	mov	eax, 0
	call	sim_node
	lea	rdx, SimMoteP$isOn[rip]
	mov	BYTE PTR [rax+rdx], 1
	call	sim_main_start_mote
.L968:
	nop
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE362:
	.size	SimMoteP$SimMote$turnOn, .-SimMoteP$SimMote$turnOn
	.globl	sim_mote_turn_off
	.type	sim_mote_turn_off, @function
sim_mote_turn_off:
.LFB363:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -20[rbp], edi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -4[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	call	SimMoteP$SimMote$turnOff
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE363:
	.size	sim_mote_turn_off, .-sim_mote_turn_off
	.globl	sim_mote_enqueue_boot_event
	.type	sim_mote_enqueue_boot_event, @function
sim_mote_enqueue_boot_event:
.LFB364:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	push	rbx
	sub	rsp, 40
	.cfi_offset 3, -24
	mov	DWORD PTR -36[rbp], edi
	mov	eax, 0
	call	sim_node
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	test	rax, rax
	je	.L971
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rbx, QWORD PTR [rax]
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$startTime[rip]
	mov	rax, QWORD PTR [rdx+rax]
	cmp	rbx, rax
	jne	.L972
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	BYTE PTR 17[rax], 0
	jmp	.L970
.L972:
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	BYTE PTR 17[rax], 1
.L971:
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	edi, 48
	call	malloc@PLT
	mov	rcx, rax
	lea	rdx, 0[0+rbx*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, 0
	call	sim_node
	mov	rbx, rax
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	lea	rcx, 0[0+rbx*8]
	lea	rdx, SimMoteP$startTime[rip]
	mov	rdx, QWORD PTR [rcx+rdx]
	mov	QWORD PTR [rax], rdx
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	edx, DWORD PTR -36[rbp]
	movsx	rdx, edx
	mov	QWORD PTR 8[rax], rdx
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	BYTE PTR 16[rax], 1
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	QWORD PTR 24[rax], 0
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	lea	rdx, SimMoteP$sim_mote_boot_handle[rip]
	mov	QWORD PTR 32[rax], rdx
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	lea	rdx, sim_queue_cleanup_event[rip]
	mov	QWORD PTR 40[rax], rdx
	mov	eax, 0
	call	sim_node
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	mov	rax, QWORD PTR [rdx+rax]
	mov	rdi, rax
	call	sim_queue_insert
	mov	eax, DWORD PTR -20[rbp]
	cdqe
	mov	rdi, rax
	call	sim_set_node
.L970:
	mov	rbx, QWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE364:
	.size	sim_mote_enqueue_boot_event, .-sim_mote_enqueue_boot_event
	.section	.rodata
.LC195:
	.string	"SimSchedulerBasicP$m_head"
.LC196:
	.string	"SimSchedulerBasicP$m_tail"
.LC197:
	.string	"SimSchedulerBasicP$m_next"
	.align 8
.LC198:
	.string	"SimSchedulerBasicP$sim_scheduler_event_pending"
	.align 8
.LC199:
	.string	"SimSchedulerBasicP$sim_scheduler_event"
.LC200:
	.string	"SimMoteP$euid"
.LC201:
	.string	"SimMoteP$startTime"
.LC202:
	.string	"SimMoteP$isOn"
.LC203:
	.string	"SimMoteP$bootEvent"
.LC204:
	.string	"TossimActiveMessageC$buffer"
	.align 8
.LC205:
	.string	"TossimActiveMessageC$bufferPointer"
	.align 8
.LC206:
	.string	"TossimPacketModelC$initialized"
.LC207:
	.string	"TossimPacketModelC$running"
	.align 8
.LC208:
	.string	"TossimPacketModelC$backoffCount"
	.align 8
.LC209:
	.string	"TossimPacketModelC$neededFreeSamples"
.LC210:
	.string	"TossimPacketModelC$sending"
	.align 8
.LC211:
	.string	"TossimPacketModelC$transmitting"
	.align 8
.LC212:
	.string	"TossimPacketModelC$sendingLength"
.LC213:
	.string	"TossimPacketModelC$destNode"
.LC214:
	.string	"TossimPacketModelC$sendEvent"
.LC215:
	.string	"TossimPacketModelC$error"
.LC216:
	.string	"CpmModelC$outgoing"
.LC217:
	.string	"CpmModelC$requestAck"
.LC218:
	.string	"CpmModelC$receiving"
.LC219:
	.string	"CpmModelC$transmitting"
.LC220:
	.string	"CpmModelC$transmissionEndTime"
	.align 8
.LC221:
	.string	"CpmModelC$outstandingReceptionHead"
.LC222:
	.string	"CpmModelC$clearThreshold"
.LC223:
	.string	"ActiveMessageAddressC$set"
.LC224:
	.string	"ActiveMessageAddressC$addr"
.LC225:
	.string	"sendAckC$counter"
.LC226:
	.string	"sendAckC$packet"
	.align 8
.LC227:
	.string	"/*AMQueueP.AMQueueImplP*/AMQueueImplP$0$current"
	.align 8
.LC228:
	.string	"/*AMQueueP.AMQueueImplP*/AMQueueImplP$0$queue"
	.align 8
.LC229:
	.string	"/*AMQueueP.AMQueueImplP*/AMQueueImplP$0$cancelMask"
	.align 8
.LC230:
	.string	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmAsyncP*/Atm128AlarmAsyncP$0$set"
	.align 8
.LC231:
	.string	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmAsyncP*/Atm128AlarmAsyncP$0$t0"
	.align 8
.LC232:
	.string	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmAsyncP*/Atm128AlarmAsyncP$0$dt"
	.align 8
.LC233:
	.string	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmAsyncP*/Atm128AlarmAsyncP$0$base"
	.align 8
.LC234:
	.string	"HplAtm128Timer0AsyncP$inOverflow"
	.align 8
.LC235:
	.string	"HplAtm128Timer0AsyncP$lastZero"
	.align 8
.LC236:
	.string	"HplAtm128Timer0AsyncP$oldScale"
.LC237:
	.string	"HplAtm128Timer0AsyncP$compare"
	.align 8
.LC238:
	.string	"HplAtm128Timer0AsyncP$overflow"
	.align 8
.LC239:
	.string	"/*HilTimerMilliC.AlarmToTimerC*/AlarmToTimerC$0$m_dt"
	.align 8
.LC240:
	.string	"/*HilTimerMilliC.AlarmToTimerC*/AlarmToTimerC$0$m_oneshot"
	.align 8
.LC241:
	.string	"/*HilTimerMilliC.VirtualizeTimerC*/VirtualizeTimerC$0$m_timers"
.LC242:
	.string	"RandomMlcgC$seed"
	.text
	.type	__nesc_nido_resolve, @function
__nesc_nido_resolve:
.LFB365:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	DWORD PTR -4[rbp], edi
	mov	QWORD PTR -16[rbp], rsi
	mov	QWORD PTR -24[rbp], rdx
	mov	QWORD PTR -32[rbp], rcx
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC195[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L975
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L975:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC196[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L977
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimSchedulerBasicP$m_tail[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L977:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC197[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L978
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 3
	sub	rax, rdx
	lea	rdx, SimSchedulerBasicP$m_next[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 7
	mov	eax, 0
	jmp	.L976
.L978:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC198[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L979
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event_pending[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L979:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC199[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L980
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 48
	mov	eax, 0
	jmp	.L976
.L980:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC200[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L981
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$euid[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L981:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC201[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L982
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$startTime[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L982:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC202[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L983
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimMoteP$isOn[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L983:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC203[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L984
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L984:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC204[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L985
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, TossimActiveMessageC$buffer[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 41
	mov	eax, 0
	jmp	.L976
.L985:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC205[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L986
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L986:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC206[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L987
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$initialized[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L987:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC207[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L988
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$running[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L988:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC208[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L989
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$backoffCount[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L989:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC209[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L990
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$neededFreeSamples[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L990:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC210[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L991
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L991:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC211[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L992
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$transmitting[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L992:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC212[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L993
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$sendingLength[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L993:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC213[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L994
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, TossimPacketModelC$destNode[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 4
	mov	eax, 0
	jmp	.L976
.L994:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC214[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L995
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	lea	rdx, TossimPacketModelC$sendEvent[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 48
	mov	eax, 0
	jmp	.L976
.L995:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC215[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L996
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$error[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L996:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC216[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L997
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outgoing[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L997:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC217[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L998
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, CpmModelC$requestAck[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L998:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC218[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L999
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, CpmModelC$receiving[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L999:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC219[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1000
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, CpmModelC$transmitting[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1000:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC220[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1001
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$transmissionEndTime[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L1001:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC221[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1002
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L1002:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC222[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1003
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$clearThreshold[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L1003:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC223[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1004
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, ActiveMessageAddressC$set[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1004:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC224[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1005
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, ActiveMessageAddressC$addr[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 2
	mov	eax, 0
	jmp	.L976
.L1005:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC225[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1006
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, sendAckC$counter[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1006:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC226[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1007
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 41
	mov	eax, 0
	jmp	.L976
.L1007:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC227[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1008
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, AMQueueImplP$0$current[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1008:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC228[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1009
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L1009:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC229[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1010
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, AMQueueImplP$0$cancelMask[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1010:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC230[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1011
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, Atm128AlarmAsyncP$0$set[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1011:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC231[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1012
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$t0[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 4
	mov	eax, 0
	jmp	.L976
.L1012:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC232[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1013
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$dt[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 4
	mov	eax, 0
	jmp	.L976
.L1013:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC233[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1014
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 4
	mov	eax, 0
	jmp	.L976
.L1014:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC234[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1015
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, HplAtm128Timer0AsyncP$inOverflow[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1015:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC235[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1016
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$lastZero[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L1016:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC236[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1017
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, HplAtm128Timer0AsyncP$oldScale[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1017:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC237[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1018
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$compare[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L1018:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC238[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1019
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$overflow[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 8
	mov	eax, 0
	jmp	.L976
.L1019:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC239[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1020
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, AlarmToTimerC$0$m_dt[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 4
	mov	eax, 0
	jmp	.L976
.L1020:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC240[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1021
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, AlarmToTimerC$0$m_oneshot[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 1
	mov	eax, 0
	jmp	.L976
.L1021:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC241[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1022
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 3
	lea	rdx, VirtualizeTimerC$0$m_timers[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 24
	mov	eax, 0
	jmp	.L976
.L1022:
	mov	rax, QWORD PTR -16[rbp]
	lea	rsi, .LC242[rip]
	mov	rdi, rax
	call	strcmp@PLT
	test	eax, eax
	jne	.L1023
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, RandomMlcgC$seed[rip]
	add	rax, rdx
	mov	edx, eax
	mov	rax, QWORD PTR -24[rbp]
	mov	DWORD PTR [rax], edx
	mov	rax, QWORD PTR -32[rbp]
	mov	DWORD PTR [rax], 4
	mov	eax, 0
	jmp	.L976
.L1023:
	mov	eax, -1
.L976:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE365:
	.size	__nesc_nido_resolve, .-__nesc_nido_resolve
	.type	__nesc_nido_initialise, @function
__nesc_nido_initialise:
.LFB366:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	DWORD PTR -4[rbp], edi
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimSchedulerBasicP$m_head[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimSchedulerBasicP$m_tail[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 3
	sub	rax, rdx
	lea	rdx, SimSchedulerBasicP$m_next[rip]
	add	rax, rdx
	mov	edx, 7
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event_pending[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	lea	rdx, SimSchedulerBasicP$sim_scheduler_event[rip]
	add	rax, rdx
	mov	edx, 48
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$euid[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$startTime[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, SimMoteP$isOn[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, SimMoteP$bootEvent[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, TossimActiveMessageC$buffer[rip]
	add	rax, rdx
	mov	edx, 41
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, TossimActiveMessageC$buffer[rip]
	lea	rcx, [rax+rdx]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimActiveMessageC$bufferPointer[rip]
	mov	QWORD PTR [rdx+rax], rcx
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$initialized[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$running[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$backoffCount[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$neededFreeSamples[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, TossimPacketModelC$sending[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$transmitting[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$sendingLength[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, TossimPacketModelC$destNode[rip]
	add	rax, rdx
	mov	edx, 4
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 4
	lea	rdx, TossimPacketModelC$sendEvent[rip]
	add	rax, rdx
	mov	edx, 48
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, TossimPacketModelC$error[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outgoing[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, CpmModelC$requestAck[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, CpmModelC$receiving[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, CpmModelC$transmitting[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$transmissionEndTime[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$outstandingReceptionHead[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, CpmModelC$clearThreshold[rip]
	movsd	xmm0, QWORD PTR .LC243[rip]
	movsd	QWORD PTR [rdx+rax], xmm0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, ActiveMessageAddressC$set[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, [rax+rax]
	lea	rax, ActiveMessageAddressC$addr[rip]
	add	rax, rdx
	mov	edx, 2
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, sendAckC$counter[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	sal	rax, 2
	add	rax, rdx
	sal	rax, 3
	add	rax, rdx
	lea	rdx, sendAckC$packet[rip]
	add	rax, rdx
	mov	edx, 41
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, AMQueueImplP$0$current[rip]
	mov	BYTE PTR [rax+rdx], 1
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, AMQueueImplP$0$queue[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, AMQueueImplP$0$cancelMask[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, Atm128AlarmAsyncP$0$set[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$t0[rip]
	add	rax, rdx
	mov	edx, 4
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$dt[rip]
	add	rax, rdx
	mov	edx, 4
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, Atm128AlarmAsyncP$0$base[rip]
	add	rax, rdx
	mov	edx, 4
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, HplAtm128Timer0AsyncP$inOverflow[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$lastZero[rip]
	mov	QWORD PTR [rdx+rax], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, HplAtm128Timer0AsyncP$oldScale[rip]
	mov	BYTE PTR [rax+rdx], 0
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$compare[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*8]
	lea	rax, HplAtm128Timer0AsyncP$overflow[rip]
	add	rax, rdx
	mov	edx, 8
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, AlarmToTimerC$0$m_dt[rip]
	add	rax, rdx
	mov	edx, 4
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, AlarmToTimerC$0$m_oneshot[rip]
	add	rax, rdx
	mov	edx, 1
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	movsx	rdx, eax
	mov	rax, rdx
	add	rax, rax
	add	rax, rdx
	sal	rax, 3
	lea	rdx, VirtualizeTimerC$0$m_timers[rip]
	add	rax, rdx
	mov	edx, 24
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	lea	rdx, 0[0+rax*4]
	lea	rax, RandomMlcgC$seed[rip]
	add	rax, rdx
	mov	edx, 4
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE366:
	.size	__nesc_nido_initialise, .-__nesc_nido_initialise
	.section	.rodata
	.align 16
	.type	__FUNCTION__.2, @object
	.size	__FUNCTION__.2, 25
__FUNCTION__.2:
	.string	"AMQueueImplP$0$Send$send"
	.align 16
	.type	__FUNCTION__.1, @object
	.size	__FUNCTION__.1, 31
__FUNCTION__.1:
	.string	"AMQueueImplP$0$AMSend$sendDone"
	.align 32
	.type	__FUNCTION__.0, @object
	.size	__FUNCTION__.0, 44
__FUNCTION__.0:
	.string	"HplAtm128Timer0AsyncP$timer0_compare_handle"
	.align 8
.LC1:
	.long	0
	.long	-1050471728
	.align 8
.LC3:
	.long	0
	.long	1071644672
	.align 8
.LC4:
	.long	0
	.long	1066802960
	.align 8
.LC5:
	.long	1073741824
	.long	1071461100
	.align 8
.LC6:
	.long	-1610612736
	.long	1072693247
	.align 8
.LC35:
	.long	0
	.long	1076101120
	.align 8
.LC36:
	.long	-1145744106
	.long	1073900465
	.align 8
.LC47:
	.long	-755914244
	.long	1062232653
	.align 8
.LC69:
	.long	0
	.long	1079574528
	.align 8
.LC70:
	.long	-1422493168
	.long	1072650046
	.align 8
.LC71:
	.long	1326285901
	.long	1073943727
	.align 8
.LC72:
	.long	1719614413
	.long	1073127582
	.align 8
.LC73:
	.long	0
	.long	1072693248
	.align 8
.LC74:
	.long	0
	.long	1078394880
	.align 8
.LC77:
	.long	-1717986918
	.long	1072798105
	.align 8
.LC78:
	.long	-1717986918
	.long	-1078355559
	.align 8
.LC119:
	.long	0
	.long	1093567616
	.align 4
.LC131:
	.long	1065353216
	.align 8
.LC243:
	.long	0
	.long	-1068367872
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"506576.c"
	.text
	.comm	outputs,1624,4
	.global	channelTable
	.bss
	.align	2
	.type	channelTable, %object
	.size	channelTable, 4
channelTable:
	.space	4
	.global	STARTING_SIZE
	.section	.rodata
	.align	2
	.type	STARTING_SIZE, %object
	.size	STARTING_SIZE, 4
STARTING_SIZE:
	.word	511
	.local	eventHeap
	.comm	eventHeap,12,4
	.local	sim_ticks
	.comm	sim_ticks,8,8
	.local	current_node
	.comm	current_node,4,4
	.local	sim_seed
	.comm	sim_seed,4,4
	.comm	simTimeBuf,128,4
	.global	csmaInitHigh
	.data
	.align	2
	.type	csmaInitHigh, %object
	.size	csmaInitHigh, 4
csmaInitHigh:
	.word	640
	.global	csmaInitLow
	.align	2
	.type	csmaInitLow, %object
	.size	csmaInitLow, 4
csmaInitLow:
	.word	20
	.global	csmaHigh
	.align	2
	.type	csmaHigh, %object
	.size	csmaHigh, 4
csmaHigh:
	.word	160
	.global	csmaLow
	.align	2
	.type	csmaLow, %object
	.size	csmaLow, 4
csmaLow:
	.word	20
	.global	csmaSymbolsPerSec
	.align	2
	.type	csmaSymbolsPerSec, %object
	.size	csmaSymbolsPerSec, 4
csmaSymbolsPerSec:
	.word	65536
	.global	csmaBitsPerSymbol
	.align	2
	.type	csmaBitsPerSymbol, %object
	.size	csmaBitsPerSymbol, 4
csmaBitsPerSymbol:
	.word	4
	.global	csmaPreambleLength
	.align	2
	.type	csmaPreambleLength, %object
	.size	csmaPreambleLength, 4
csmaPreambleLength:
	.word	12
	.global	csmaExponentBase
	.align	2
	.type	csmaExponentBase, %object
	.size	csmaExponentBase, 4
csmaExponentBase:
	.word	1
	.global	csmaMaxIterations
	.bss
	.align	2
	.type	csmaMaxIterations, %object
	.size	csmaMaxIterations, 4
csmaMaxIterations:
	.space	4
	.global	csmaMinFreeSamples
	.data
	.align	2
	.type	csmaMinFreeSamples, %object
	.size	csmaMinFreeSamples, 4
csmaMinFreeSamples:
	.word	1
	.global	csmaRxTxDelay
	.align	2
	.type	csmaRxTxDelay, %object
	.size	csmaRxTxDelay, 4
csmaRxTxDelay:
	.word	11
	.global	csmaAckTime
	.align	2
	.type	csmaAckTime, %object
	.size	csmaAckTime, 4
csmaAckTime:
	.word	34
	.comm	connectivity,4004,4
	.comm	localNoise,16016,8
	.global	sensitivity
	.align	3
	.type	sensitivity, %object
	.size	sensitivity, 8
sensitivity:
	.word	0
	.word	1074790400
	.local	randU
	.comm	randU,776,8
	.local	randC
	.comm	randC,8,8
	.local	randCD
	.comm	randCD,8,8
	.local	randCM
	.comm	randCM,8,8
	.local	i97
	.comm	i97,4,4
	.local	j97
	.comm	j97,4,4
	.local	test
	.comm	test,4,4
	.global	numCase1
	.bss
	.align	2
	.type	numCase1, %object
	.size	numCase1, 4
numCase1:
	.space	4
	.global	numCase2
	.align	2
	.type	numCase2, %object
	.size	numCase2, 4
numCase2:
	.space	4
	.global	numTotal
	.align	2
	.type	numTotal, %object
	.size	numTotal, 4
numTotal:
	.space	4
	.global	FreqKeyNum
	.align	2
	.type	FreqKeyNum, %object
	.size	FreqKeyNum, 4
FreqKeyNum:
	.space	4
	.comm	noiseData,68000,4
	.comm	dummy,4,4
	.comm	atm128RegFile,160000,4
	.comm	SimSchedulerBasicP$m_head,1000,4
	.comm	SimSchedulerBasicP$m_tail,1000,4
	.comm	SimSchedulerBasicP$m_next,7000,4
	.comm	SimSchedulerBasicP$sim_scheduler_event_pending,1000,4
	.comm	SimSchedulerBasicP$sim_scheduler_event,32000,8
	.comm	SimMoteP$euid,8000,8
	.comm	SimMoteP$startTime,8000,8
	.comm	SimMoteP$isOn,1000,4
	.comm	SimMoteP$bootEvent,4000,4
	.comm	TossimActiveMessageC$buffer,41000,4
	.comm	TossimActiveMessageC$bufferPointer,4000,4
	.comm	TossimPacketModelC$initialized,1000,4
	.comm	TossimPacketModelC$running,1000,4
	.comm	TossimPacketModelC$backoffCount,1000,4
	.comm	TossimPacketModelC$neededFreeSamples,1000,4
	.comm	TossimPacketModelC$sending,4000,4
	.comm	TossimPacketModelC$transmitting,1000,4
	.comm	TossimPacketModelC$sendingLength,1000,4
	.comm	TossimPacketModelC$destNode,4000,4
	.comm	TossimPacketModelC$sendEvent,32000,8
	.comm	TossimPacketModelC$error,1000,4
	.comm	CpmModelC$outgoing,4000,4
	.comm	CpmModelC$requestAck,1000,4
	.comm	CpmModelC$receiving,1000,4
	.comm	CpmModelC$transmitting,1000,4
	.comm	CpmModelC$transmissionEndTime,8000,8
	.comm	CpmModelC$outstandingReceptionHead,4000,4
	.comm	CpmModelC$clearThreshold,8000,8
	.comm	ActiveMessageAddressC$set,1000,4
	.comm	ActiveMessageAddressC$addr,2000,4
	.comm	sendAckC$counter,1000,4
	.comm	sendAckC$packet,41000,4
	.comm	AMQueueImplP$0$current,1000,4
	.comm	AMQueueImplP$0$queue,4000,4
	.comm	AMQueueImplP$0$cancelMask,1000,4
	.comm	Atm128AlarmAsyncP$0$set,1000,4
	.comm	Atm128AlarmAsyncP$0$t0,4000,4
	.comm	Atm128AlarmAsyncP$0$dt,4000,4
	.comm	Atm128AlarmAsyncP$0$base,4000,4
	.comm	HplAtm128Timer0AsyncP$inOverflow,1000,4
	.comm	HplAtm128Timer0AsyncP$lastZero,8000,8
	.comm	HplAtm128Timer0AsyncP$oldScale,1000,4
	.comm	HplAtm128Timer0AsyncP$compare,4000,4
	.comm	HplAtm128Timer0AsyncP$overflow,4000,4
	.comm	AlarmToTimerC$0$m_dt,4000,4
	.comm	AlarmToTimerC$0$m_oneshot,1000,4
	.comm	VirtualizeTimerC$0$m_timers,24000,4
	.comm	RandomMlcgC$seed,4000,4
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	init_heap, %function
init_heap:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3]
	ldr	r2, .L2
	ldr	r3, [fp, #-8]
	str	r2, [r3, #8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #8]
	lsl	r3, r3, #4
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-8]
	str	r2, [r3, #4]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L3:
	.align	2
.L2:
	.word	511
	.size	init_heap, .-init_heap
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	expand_heap, %function
expand_heap:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	lsl	r3, r3, #1
	add	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #4
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r1, [r3, #4]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	lsl	r3, r3, #4
	mov	r2, r3
	ldr	r0, [fp, #-8]
	bl	memcpy
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #4]
	mov	r0, r3
	bl	free
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-8]
	str	r2, [r3, #4]
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-12]
	str	r2, [r3, #8]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	expand_heap, .-expand_heap
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	heap_insert, %function
heap_insert:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	bne	.L6
	ldr	r0, [fp, #-16]
	bl	expand_heap
.L6:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	add	r1, r2, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	add	r3, r2, r3
	ldr	r2, [fp, #-20]
	str	r2, [r3]
	ldr	r1, [fp, #-8]
	ldr	r0, [fp, #-16]
	bl	up_heap
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	add	r2, r3, #1
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	heap_insert, .-heap_insert
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	is_empty, %function
is_empty:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	is_empty, .-is_empty
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	heap_is_empty, %function
heap_is_empty:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	is_empty
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	heap_is_empty, .-heap_is_empty
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	heap_get_min_key, %function
heap_get_min_key:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	is_empty
	mov	r3, r0
	cmp	r3, #0
	beq	.L12
	mvn	r2, #0
	mvn	r3, #0
	b	.L13
.L12:
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #4]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
.L13:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	heap_get_min_key, .-heap_get_min_key
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_eq, %function
sim_log_eq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_log_eq, .-sim_log_eq
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_hash, %function
sim_log_hash:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L17
.L18:
	ldr	r3, [fp, #-12]
	lsl	r2, r3, #6
	ldr	r3, [fp, #-8]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #16
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	str	r3, [fp, #-12]
.L17:
	ldr	r3, [fp, #-16]
	add	r2, r3, #1
	str	r2, [fp, #-16]
	ldrb	r3, [r3]	@ zero_extendqisi2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L18
	ldr	r3, [fp, #-12]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sim_log_hash, .-sim_log_hash
	.section	.rodata
	.align	2
.LC0:
	.ascii	"w\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_init, %function
sim_log_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	ldr	r2, .L23
	ldr	r1, .L23+4
	mov	r0, #128
	bl	create_hashtable
	mov	r3, r0
	ldr	r2, .L23+8
	str	r3, [r2]
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L21
.L22:
	ldr	r2, .L23+12
	ldr	r3, [fp, #-16]
	mov	r1, #1
	str	r1, [r2, r3, lsl #3]
	mov	r0, #4
	bl	malloc
	mov	r3, r0
	mov	r1, r3
	ldr	r2, .L23+12
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #3
	add	r3, r2, r3
	str	r1, [r3, #4]
	ldr	r2, .L23+12
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r4, [r3, #4]
	ldr	r1, .L23+16
	mov	r0, #1
	bl	fdopen
	mov	r3, r0
	str	r3, [r4]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L21:
	ldr	r3, [fp, #-16]
	cmp	r3, #202
	ble	.L22
	nop
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L24:
	.align	2
.L23:
	.word	sim_log_eq
	.word	sim_log_hash
	.word	channelTable
	.word	outputs
	.word	.LC0
	.size	sim_log_init, .-sim_log_init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_hash, %function
sim_noise_hash:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-12]
	b	.L26
.L27:
	ldr	r3, [fp, #-12]
	ldr	r2, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #6
	add	r2, r2, r3
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #16
	add	r2, r2, r3
	ldr	r3, [fp, #-16]
	sub	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-12]
	add	r3, r3, #1
	str	r3, [fp, #-12]
.L26:
	ldr	r3, [fp, #-12]
	cmp	r3, #19
	ble	.L27
	ldr	r3, [fp, #-16]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sim_noise_hash, .-sim_noise_hash
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_eq, %function
sim_noise_eq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r2, #20
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	memcmp
	mov	r3, r0
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_noise_eq, .-sim_noise_eq
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$SimMote$isOn, %function
SimMoteP$SimMote$isOn:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L33
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r0, r3
	pop	{fp, pc}
.L34:
	.align	2
.L33:
	.word	SimMoteP$isOn
	.size	SimMoteP$SimMote$isOn, .-SimMoteP$SimMote$isOn
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_add_channel, %function
sim_log_add_channel:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r3, .L38
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	hashtable_search
	str	r0, [fp, #-20]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bne	.L36
	ldr	r0, [fp, #-24]
	bl	strlen
	mov	r3, r0
	add	r3, r3, #1
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-24]
	ldr	r0, [fp, #-16]
	bl	strcpy
	ldr	r0, [fp, #-24]
	bl	strlen
	mov	r2, r0
	ldr	r3, [fp, #-16]
	add	r3, r3, r2
	mov	r2, #0
	strb	r2, [r3]
	mov	r0, #16
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #0
	str	r2, [r3, #4]
	ldr	r3, [fp, #-20]
	mov	r2, #8
	str	r2, [r3, #8]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #8]
	lsl	r3, r3, #2
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-20]
	str	r2, [r3, #12]
	ldr	r3, [fp, #-20]
	ldr	r0, [r3, #12]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #8]
	lsl	r3, r3, #2
	mov	r2, r3
	mov	r1, #0
	bl	memset
	ldr	r3, .L38
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	hashtable_insert
.L36:
	ldr	r3, [fp, #-20]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #8]
	cmp	r2, r3
	bne	.L37
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #8]
	lsl	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #2
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-20]
	ldr	r1, [r3, #12]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #8]
	lsl	r3, r3, #2
	mov	r2, r3
	ldr	r0, [fp, #-8]
	bl	memcpy
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #12]
	mov	r0, r3
	bl	free
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-8]
	str	r2, [r3, #12]
	ldr	r3, [fp, #-20]
	ldr	r2, [fp, #-12]
	str	r2, [r3, #8]
.L37:
	ldr	r3, [fp, #-20]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #4]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [fp, #-28]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #4]
	add	r2, r3, #1
	ldr	r3, [fp, #-20]
	str	r2, [r3, #4]
	bl	sim_log_commit_change
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L39:
	.align	2
.L38:
	.word	channelTable
	.size	sim_log_add_channel, .-sim_log_add_channel
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_remove_channel, %function
sim_log_remove_channel:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r3, .L46
	ldr	r3, [r3]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	hashtable_search
	str	r0, [fp, #-12]
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L41
	mov	r3, #0
	b	.L42
.L41:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L43
.L45:
	ldr	r3, [fp, #-12]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-8]
	cmp	r2, r3
	bne	.L44
	ldr	r3, [fp, #-12]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	add	r0, r2, r3
	ldr	r3, [fp, #-12]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	lsl	r3, r3, #2
	add	r1, r2, r3
	ldr	r3, [fp, #-12]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	sub	r3, r2, r3
	mov	r2, r3
	bl	memcpy
	ldr	r3, [fp, #-12]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #4]
	sub	r3, r3, #-1073741823
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #4]
	sub	r2, r3, #1
	ldr	r3, [fp, #-12]
	str	r2, [r3, #4]
.L44:
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L43:
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #4]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L45
	mov	r3, #1
.L42:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L47:
	.align	2
.L46:
	.word	channelTable
	.size	sim_log_remove_channel, .-sim_log_remove_channel
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_allocate_link, %function
sim_gain_allocate_link:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r0, #24
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3, #16]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	str	r2, [r3]
	ldr	r1, [fp, #-8]
	mov	r2, #0
	ldr	r3, .L50
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L51:
	.align	2
.L50:
	.word	-1050471728
	.size	sim_gain_allocate_link, .-sim_gain_allocate_link
	.global	__aeabi_dadd
	.global	__aeabi_dmul
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	RandomInitialise, %function
RandomInitialise:
	@ args = 0, pretend = 0, frame = 56
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, [fp, #-56]
	cmp	r3, #0
	blt	.L53
	ldr	r3, [fp, #-56]
	ldr	r2, .L60
	cmp	r3, r2
	bgt	.L53
	ldr	r3, [fp, #-60]
	cmp	r3, #0
	blt	.L53
	ldr	r3, [fp, #-60]
	ldr	r2, .L60+4
	cmp	r3, r2
	ble	.L54
.L53:
	ldr	r3, .L60+8
	str	r3, [fp, #-56]
	ldr	r3, .L60+12
	str	r3, [fp, #-60]
.L54:
	ldr	r3, [fp, #-56]
	ldr	r2, .L60+16
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r2, r2, #7
	asr	r3, r3, #31
	sub	r1, r2, r3
	ldr	r3, .L60+16
	smull	r2, r3, r1, r3
	add	r3, r3, r1
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	sub	r2, r1, r2
	add	r3, r2, #2
	str	r3, [fp, #-44]
	ldr	r1, [fp, #-56]
	ldr	r3, .L60+16
	smull	r2, r3, r1, r3
	add	r3, r3, r1
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r2
	lsl	r2, r3, #2
	sub	r2, r2, r3
	sub	r2, r1, r2
	add	r3, r2, #2
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-60]
	ldr	r2, .L60+20
	smull	r1, r2, r3, r2
	asr	r2, r2, #6
	asr	r3, r3, #31
	sub	r3, r2, r3
	ldr	r2, .L60+24
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r1, r2, #7
	asr	r2, r3, #31
	sub	r2, r1, r2
	mov	r1, #178
	mul	r2, r1, r2
	sub	r2, r3, r2
	add	r3, r2, #1
	str	r3, [fp, #-36]
	ldr	r1, [fp, #-60]
	ldr	r3, .L60+20
	smull	r2, r3, r1, r3
	asr	r2, r3, #6
	asr	r3, r1, #31
	sub	r0, r2, r3
	mov	r2, r0
	lsl	r2, r2, #1
	add	r2, r2, r0
	lsl	r3, r2, #3
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r0
	sub	r3, r1, r3
	str	r3, [fp, #-32]
	mov	r3, #0
	str	r3, [fp, #-48]
	b	.L55
.L59:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	mov	r2, #0
	ldr	r3, .L60+28
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L56
.L58:
	ldr	r3, [fp, #-44]
	ldr	r2, [fp, #-40]
	mul	r0, r2, r3
	ldr	r3, .L60+32
	smull	r2, r3, r0, r3
	add	r3, r3, r0
	asr	r2, r3, #7
	asr	r3, r0, #31
	sub	r1, r2, r3
	mov	r2, r1
	lsl	r2, r2, #1
	add	r2, r2, r1
	lsl	r3, r2, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r1
	sub	r1, r0, r3
	ldr	r3, [fp, #-36]
	mul	r1, r3, r1
	ldr	r3, .L60+32
	smull	r2, r3, r1, r3
	add	r3, r3, r1
	asr	r2, r3, #7
	asr	r3, r1, #31
	sub	r0, r2, r3
	mov	r2, r0
	lsl	r2, r2, #1
	add	r2, r2, r0
	lsl	r3, r2, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	sub	r3, r3, r0
	sub	r3, r1, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-40]
	str	r3, [fp, #-44]
	ldr	r3, [fp, #-36]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-24]
	str	r3, [fp, #-36]
	ldr	r2, [fp, #-32]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	add	r1, r3, #1
	ldr	r3, .L60+20
	smull	r2, r3, r1, r3
	asr	r2, r3, #6
	asr	r3, r1, #31
	sub	r0, r2, r3
	mov	r2, r0
	lsl	r2, r2, #1
	add	r2, r2, r0
	lsl	r3, r2, #3
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r0
	sub	r3, r1, r3
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-32]
	ldr	r2, [fp, #-24]
	mul	r3, r2, r3
	rsbs	r2, r3, #0
	and	r3, r3, #63
	and	r2, r2, #63
	rsbpl	r3, r2, #0
	cmp	r3, #31
	ble	.L57
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
.L57:
	mov	r2, #0
	ldr	r3, .L60+28
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L56:
	ldr	r3, [fp, #-28]
	cmp	r3, #23
	ble	.L58
	ldr	r2, .L60+36
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r1, r2, r3
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-48]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L55:
	ldr	r3, [fp, #-48]
	cmp	r3, #96
	ble	.L59
	ldr	r1, .L60+40
	mov	r2, #0
	ldr	r3, .L60+44
	stm	r1, {r2-r3}
	ldr	r1, .L60+48
	mov	r2, #1073741824
	ldr	r3, .L60+52
	stm	r1, {r2-r3}
	ldr	r1, .L60+56
	mov	r2, #-1610612736
	ldr	r3, .L60+60
	stm	r1, {r2-r3}
	ldr	r3, .L60+64
	mov	r2, #97
	str	r2, [r3]
	ldr	r3, .L60+68
	mov	r2, #33
	str	r2, [r3]
	ldr	r3, .L60+72
	mov	r2, #1
	str	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L61:
	.align	2
.L60:
	.word	31328
	.word	30081
	.word	1802
	.word	9373
	.word	-1189002245
	.word	1626496491
	.word	-1206451487
	.word	1071644672
	.word	-1223705765
	.word	randU
	.word	randC
	.word	1066802960
	.word	randCD
	.word	1071461100
	.word	randCM
	.word	1072693247
	.word	i97
	.word	j97
	.word	test
	.size	RandomInitialise, .-RandomInitialise
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_alarm, %function
sim_noise_alarm:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L63
	mov	r2, #5
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L64:
	.align	2
.L63:
	.word	dummy
	.size	sim_noise_alarm, .-sim_noise_alarm
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	getHeader, %function
getHeader:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #7
	sub	r3, r3, #7
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	getHeader, .-getHeader
	.section	.rodata
	.align	2
.LC1:
	.ascii	"Delivering packet to %i at %s\012\000"
	.align	2
.LC2:
	.ascii	"Packet\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$active_message_deliver_handle, %function
TossimActiveMessageC$active_message_deliver_handle:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	mov	r4, r3
	bl	sim_time_string
	mov	r3, r0
	str	r3, [sp]
	mov	r3, r4
	ldr	r2, .L68
	ldr	r1, .L68+4
	mov	r0, #108
	bl	sim_log_debug
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$Model$receive
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L69:
	.align	2
.L68:
	.word	.LC1
	.word	.LC2
	.size	TossimActiveMessageC$active_message_deliver_handle, .-TossimActiveMessageC$active_message_deliver_handle
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$allocate_deliver_event, %function
TossimActiveMessageC$allocate_deliver_event:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r0, #32
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	str	r2, [r3, #8]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-8]
	ldr	r2, .L72
	str	r2, [r3, #20]
	ldr	r3, [fp, #-8]
	ldr	r2, .L72+4
	str	r2, [r3, #24]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	strb	r2, [r3, #13]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	strb	r2, [r3, #12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	str	r2, [r3, #16]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L73:
	.align	2
.L72:
	.word	TossimActiveMessageC$active_message_deliver_handle
	.word	sim_queue_cleanup_event
	.size	TossimActiveMessageC$allocate_deliver_event, .-TossimActiveMessageC$allocate_deliver_event
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Packet$maxPayloadLength, %function
TossimActiveMessageC$Packet$maxPayloadLength:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #28
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	TossimActiveMessageC$Packet$maxPayloadLength, .-TossimActiveMessageC$Packet$maxPayloadLength
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ActiveMessageAddressC$amAddress, %function
ActiveMessageAddressC$amAddress:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	ActiveMessageAddressC$ActiveMessageAddress$amAddress
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
	.size	ActiveMessageAddressC$amAddress, .-ActiveMessageAddressC$amAddress
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$amAddress, %function
TossimActiveMessageC$amAddress:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	ActiveMessageAddressC$amAddress
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$amAddress, .-TossimActiveMessageC$amAddress
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMPacket$address, %function
TossimActiveMessageC$AMPacket$address:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	TossimActiveMessageC$amAddress
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
	.size	TossimActiveMessageC$AMPacket$address, .-TossimActiveMessageC$AMPacket$address
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMPacket$isForMe, %function
TossimActiveMessageC$AMPacket$isForMe:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$AMPacket$destination
	mov	r3, r0
	mov	r4, r3
	bl	TossimActiveMessageC$AMPacket$address
	mov	r3, r0
	cmp	r4, r3
	beq	.L83
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$AMPacket$destination
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L87
	cmp	r2, r3
	bne	.L84
.L83:
	mov	r3, #1
	b	.L85
.L84:
	mov	r3, #0
.L85:
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L88:
	.align	2
.L87:
	.word	65535
	.size	TossimActiveMessageC$AMPacket$isForMe, .-TossimActiveMessageC$AMPacket$isForMe
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_ntoh_uint16, %function
__nesc_ntoh_uint16:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #8
	lsl	r3, r3, #16
	asr	r2, r3, #16
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	asr	r3, r3, #16
	orr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__nesc_ntoh_uint16, .-__nesc_ntoh_uint16
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_ntoh_uint8, %function
__nesc_ntoh_uint8:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__nesc_ntoh_uint8, .-__nesc_ntoh_uint8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Alarm$getNow, %function
Atm128AlarmAsyncP$0$Alarm$getNow:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	Atm128AlarmAsyncP$0$Counter$get
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Alarm$getNow, .-Atm128AlarmAsyncP$0$Alarm$getNow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Alarm$getNow, %function
AlarmToTimerC$0$Alarm$getNow:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	Atm128AlarmAsyncP$0$Alarm$getNow
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Alarm$getNow, .-AlarmToTimerC$0$Alarm$getNow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Timer$getNow, %function
AlarmToTimerC$0$Timer$getNow:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	AlarmToTimerC$0$Alarm$getNow
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Timer$getNow, .-AlarmToTimerC$0$Timer$getNow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$TimerFrom$getNow, %function
VirtualizeTimerC$0$TimerFrom$getNow:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	AlarmToTimerC$0$Timer$getNow
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$TimerFrom$getNow, .-VirtualizeTimerC$0$TimerFrom$getNow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$Timer$startOneShot, %function
VirtualizeTimerC$0$Timer$startOneShot:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	str	r1, [fp, #-12]
	strb	r3, [fp, #-5]
	bl	VirtualizeTimerC$0$TimerFrom$getNow
	mov	r1, r0
	ldrb	r0, [fp, #-5]	@ zero_extendqisi2
	mov	r3, #1
	ldr	r2, [fp, #-12]
	bl	VirtualizeTimerC$0$startTimer
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$Timer$startOneShot, .-VirtualizeTimerC$0$Timer$startOneShot
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	FakeSensorP$0$Timer0$startOneShot, %function
FakeSensorP$0$Timer0$startOneShot:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	mov	r0, #1
	bl	VirtualizeTimerC$0$Timer$startOneShot
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	FakeSensorP$0$Timer0$startOneShot, .-FakeSensorP$0$Timer0$startOneShot
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	FakeSensorP$0$Read$read, %function
FakeSensorP$0$Read$read:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #10
	bl	FakeSensorP$0$Timer0$startOneShot
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
	.size	FakeSensorP$0$Read$read, .-FakeSensorP$0$Read$read
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$Read$read, %function
sendAckC$Read$read:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	FakeSensorP$0$Read$read
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sendAckC$Read$read, .-sendAckC$Read$read
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$sendResp, %function
sendAckC$sendResp:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sendAckC$Read$read
	nop
	pop	{fp, pc}
	.size	sendAckC$sendResp, .-sendAckC$sendResp
	.section	.rodata
	.align	2
.LC3:
	.ascii	"Received packet at time %s\012\000"
	.align	2
.LC4:
	.ascii	"radio_rec\000"
	.align	2
.LC5:
	.ascii	">>>Pack \012\000"
	.align	2
.LC6:
	.ascii	"radio_pack\000"
	.align	2
.LC7:
	.ascii	"\011\011 Payload Received\012\000"
	.align	2
.LC8:
	.ascii	"\011\011 type: %hhu \012 \000"
	.align	2
.LC9:
	.ascii	"\011\011 data: %hhu \012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$Receive$receive, %function
sendAckC$Receive$receive:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	mov	r3, r2
	strb	r3, [fp, #-29]
	ldr	r3, [fp, #-28]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	mov	r0, r3
	bl	__nesc_ntoh_uint16
	mov	r3, r0
	mov	r4, r3
	bl	sim_node
	mov	r3, r0
	and	r1, r4, #255
	ldr	r2, .L111
	strb	r1, [r2, r3]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	cmp	r3, #1
	bne	.L109
	bl	sendAckC$sendResp
.L109:
	bl	sim_time_string
	mov	r3, r0
	ldr	r2, .L111+4
	ldr	r1, .L111+8
	mov	r0, #162
	bl	sim_log_debug
	ldr	r2, .L111+12
	ldr	r1, .L111+16
	mov	r0, #163
	bl	sim_log_debug
	ldr	r2, .L111+20
	ldr	r1, .L111+16
	mov	r0, #164
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	ldr	r2, .L111+24
	ldr	r1, .L111+16
	mov	r0, #165
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	mov	r0, r3
	bl	__nesc_ntoh_uint16
	mov	r3, r0
	ldr	r2, .L111+28
	ldr	r1, .L111+16
	mov	r0, #166
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-24]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L112:
	.align	2
.L111:
	.word	sendAckC$counter
	.word	.LC3
	.word	.LC4
	.word	.LC5
	.word	.LC6
	.word	.LC7
	.word	.LC8
	.word	.LC9
	.size	sendAckC$Receive$receive, .-sendAckC$Receive$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Receive$default$receive, %function
TossimActiveMessageC$Receive$default$receive:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	mov	r2, r3
	mov	r3, r0
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldr	r3, [fp, #-12]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	TossimActiveMessageC$Receive$default$receive, .-TossimActiveMessageC$Receive$default$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Receive$receive, %function
TossimActiveMessageC$Receive$receive:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	mov	r2, r3
	mov	r3, r0
	strb	r3, [fp, #-13]
	mov	r3, r2
	strb	r3, [fp, #-14]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	cmp	r3, #6
	bne	.L116
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, [fp, #-24]
	ldr	r0, [fp, #-20]
	bl	sendAckC$Receive$receive
	str	r0, [fp, #-8]
	b	.L117
.L116:
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	ldrb	r0, [fp, #-13]	@ zero_extendqisi2
	ldr	r2, [fp, #-24]
	ldr	r1, [fp, #-20]
	bl	TossimActiveMessageC$Receive$default$receive
	str	r0, [fp, #-8]
	nop
.L117:
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$Receive$receive, .-TossimActiveMessageC$Receive$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$updateFromTimer$postTask, %function
VirtualizeTimerC$0$updateFromTimer$postTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r0, #6
	bl	SimSchedulerBasicP$TaskBasic$postTask
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$updateFromTimer$postTask, .-VirtualizeTimerC$0$updateFromTimer$postTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$isWaiting, %function
SimSchedulerBasicP$isWaiting:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	sim_node
	mov	r1, r0
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	ldr	r0, .L126
	mov	r3, r1
	lsl	r3, r3, #3
	sub	r3, r3, r1
	add	r3, r0, r3
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #255
	bne	.L122
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L126+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	cmp	r2, r3
	bne	.L123
.L122:
	mov	r3, #1
	b	.L124
.L123:
	mov	r3, #0
.L124:
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L127:
	.align	2
.L126:
	.word	SimSchedulerBasicP$m_next
	.word	SimSchedulerBasicP$m_tail
	.size	SimSchedulerBasicP$isWaiting, .-SimSchedulerBasicP$isWaiting
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$pushTask, %function
SimSchedulerBasicP$pushTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-13]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	mov	r0, r3
	bl	SimSchedulerBasicP$isWaiting
	mov	r3, r0
	cmp	r3, #0
	bne	.L129
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L133
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #255
	bne	.L130
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L133
	ldrb	r3, [fp, #-13]
	strb	r3, [r1, r2]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L133+4
	ldrb	r3, [fp, #-13]
	strb	r3, [r1, r2]
	b	.L131
.L130:
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L133+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r2, .L133+8
	mov	r3, r4
	lsl	r3, r3, #3
	sub	r3, r3, r4
	add	r3, r2, r3
	add	r3, r3, r1
	ldrb	r2, [fp, #-13]
	strb	r2, [r3]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L133+4
	ldrb	r3, [fp, #-13]
	strb	r3, [r1, r2]
.L131:
	mov	r3, #1
	b	.L132
.L129:
	mov	r3, #0
.L132:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L134:
	.align	2
.L133:
	.word	SimSchedulerBasicP$m_head
	.word	SimSchedulerBasicP$m_tail
	.word	SimSchedulerBasicP$m_next
	.size	SimSchedulerBasicP$pushTask, .-SimSchedulerBasicP$pushTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$sim_config_task_latency, %function
SimSchedulerBasicP$sim_config_task_latency:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #100
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	SimSchedulerBasicP$sim_config_task_latency, .-SimSchedulerBasicP$sim_config_task_latency
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$SimMote$getStartTime, %function
SimMoteP$SimMote$getStartTime:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L139
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	pop	{fp, pc}
.L140:
	.align	2
.L139:
	.word	SimMoteP$startTime
	.size	SimMoteP$SimMote$getStartTime, .-SimMoteP$SimMote$getStartTime
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$notify_clockTicksPerSec, %function
HplAtm128Timer0AsyncP$notify_clockTicksPerSec:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r2, #32768
	mov	r3, #0
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	HplAtm128Timer0AsyncP$notify_clockTicksPerSec, .-HplAtm128Timer0AsyncP$notify_clockTicksPerSec
	.global	__aeabi_ldivmod
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$sim_to_clock, %function
HplAtm128Timer0AsyncP$sim_to_clock:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	bl	HplAtm128Timer0AsyncP$notify_clockTicksPerSec
	ldr	r3, [fp, #-8]
	mul	r2, r0, r3
	ldr	r3, [fp, #-12]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-12]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	HplAtm128Timer0AsyncP$sim_to_clock, .-HplAtm128Timer0AsyncP$sim_to_clock
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag, %function
Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag
	mov	r3, r0
	strb	r3, [fp, #-8]
	ldrb	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag, .-Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Snoop$default$receive, %function
TossimActiveMessageC$Snoop$default$receive:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	mov	r2, r3
	mov	r3, r0
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldr	r3, [fp, #-12]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	TossimActiveMessageC$Snoop$default$receive, .-TossimActiveMessageC$Snoop$default$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Snoop$receive, %function
TossimActiveMessageC$Snoop$receive:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	mov	r2, r3
	mov	r3, r0
	strb	r3, [fp, #-13]
	mov	r3, r2
	strb	r3, [fp, #-14]
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	ldrb	r0, [fp, #-13]	@ zero_extendqisi2
	ldr	r2, [fp, #-24]
	ldr	r1, [fp, #-20]
	bl	TossimActiveMessageC$Snoop$default$receive
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$Snoop$receive, .-TossimActiveMessageC$Snoop$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$sim_scheduler_event_handle, %function
SimSchedulerBasicP$sim_scheduler_event_handle:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L154
	mov	r1, #0
	strb	r1, [r2, r3]
	bl	SimSchedulerBasicP$Scheduler$runNextTask
	mov	r3, r0
	cmp	r3, #0
	beq	.L153
	bl	SimSchedulerBasicP$sim_scheduler_submit_event
.L153:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L155:
	.align	2
.L154:
	.word	SimSchedulerBasicP$sim_scheduler_event_pending
	.size	SimSchedulerBasicP$sim_scheduler_event_handle, .-SimSchedulerBasicP$sim_scheduler_event_handle
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$sim_scheduler_event_init, %function
SimSchedulerBasicP$sim_scheduler_event_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	bl	sim_node
	mov	r2, r0
	ldr	r3, [fp, #-8]
	str	r2, [r3, #8]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	strb	r2, [r3, #12]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3, #16]
	ldr	r3, [fp, #-8]
	ldr	r2, .L157
	str	r2, [r3, #20]
	ldr	r3, [fp, #-8]
	ldr	r2, .L157+4
	str	r2, [r3, #24]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L158:
	.align	2
.L157:
	.word	SimSchedulerBasicP$sim_scheduler_event_handle
	.word	sim_queue_cleanup_none
	.size	SimSchedulerBasicP$sim_scheduler_event_init, .-SimSchedulerBasicP$sim_scheduler_event_init
	.section	.rodata
	.align	2
.LC10:
	.ascii	"Initializing scheduler.\012\000"
	.align	2
.LC11:
	.ascii	"Scheduler\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$Scheduler$init, %function
SimSchedulerBasicP$Scheduler$init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r2, .L160
	ldr	r1, .L160+4
	mov	r0, #95
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	ldr	r2, .L160+8
	add	r3, r3, r2
	mov	r2, #7
	mov	r1, #255
	mov	r0, r3
	bl	memset
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L160+12
	mvn	r1, #0
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L160+16
	mvn	r1, #0
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L160+20
	mov	r1, #0
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r3, r0
	lsl	r3, r3, #5
	ldr	r2, .L160+24
	add	r3, r3, r2
	mov	r0, r3
	bl	SimSchedulerBasicP$sim_scheduler_event_init
	nop
	pop	{fp, pc}
.L161:
	.align	2
.L160:
	.word	.LC10
	.word	.LC11
	.word	SimSchedulerBasicP$m_next
	.word	SimSchedulerBasicP$m_head
	.word	SimSchedulerBasicP$m_tail
	.word	SimSchedulerBasicP$sim_scheduler_event_pending
	.word	SimSchedulerBasicP$sim_scheduler_event
	.size	SimSchedulerBasicP$Scheduler$init, .-SimSchedulerBasicP$Scheduler$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMainP$Scheduler$init, %function
SimMainP$Scheduler$init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	SimSchedulerBasicP$Scheduler$init
	nop
	pop	{fp, pc}
	.size	SimMainP$Scheduler$init, .-SimMainP$Scheduler$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$popTask, %function
SimSchedulerBasicP$popTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #8
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L167
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #255
	beq	.L164
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L167
	ldrb	r3, [r2, r3]
	strb	r3, [fp, #-13]
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L167
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r5, r3
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L167+4
	mov	r3, r4
	lsl	r3, r3, #3
	sub	r3, r3, r4
	add	r3, r1, r3
	add	r3, r3, r5
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, .L167
	strb	r1, [r3, r2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L167
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #255
	bne	.L165
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L167+8
	mvn	r1, #0
	strb	r1, [r2, r3]
.L165:
	bl	sim_node
	mov	r1, r0
	ldrb	r2, [fp, #-13]	@ zero_extendqisi2
	ldr	r0, .L167+4
	mov	r3, r1
	lsl	r3, r3, #3
	sub	r3, r3, r1
	add	r3, r0, r3
	add	r3, r3, r2
	mvn	r2, #0
	strb	r2, [r3]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	b	.L166
.L164:
	mov	r3, #255
.L166:
	mov	r0, r3
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L168:
	.align	2
.L167:
	.word	SimSchedulerBasicP$m_head
	.word	SimSchedulerBasicP$m_next
	.word	SimSchedulerBasicP$m_tail
	.size	SimSchedulerBasicP$popTask, .-SimSchedulerBasicP$popTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$SplitControl$start, %function
sendAckC$SplitControl$start:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	TossimPacketModelC$Control$start
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sendAckC$SplitControl$start, .-sendAckC$SplitControl$start
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$Timer$startPeriodic, %function
VirtualizeTimerC$0$Timer$startPeriodic:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	str	r1, [fp, #-12]
	strb	r3, [fp, #-5]
	bl	VirtualizeTimerC$0$TimerFrom$getNow
	mov	r1, r0
	ldrb	r0, [fp, #-5]	@ zero_extendqisi2
	mov	r3, #0
	ldr	r2, [fp, #-12]
	bl	VirtualizeTimerC$0$startTimer
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$Timer$startPeriodic, .-VirtualizeTimerC$0$Timer$startPeriodic
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$MilliTimer$startPeriodic, %function
sendAckC$MilliTimer$startPeriodic:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	mov	r0, #0
	bl	VirtualizeTimerC$0$Timer$startPeriodic
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sendAckC$MilliTimer$startPeriodic, .-sendAckC$MilliTimer$startPeriodic
	.section	.rodata
	.align	2
.LC12:
	.ascii	"Radio on!\012\000"
	.align	2
.LC13:
	.ascii	"radio\000"
	.align	2
.LC14:
	.ascii	"radio error, restart radio\012\000"
	.align	2
.LC15:
	.ascii	"radio_err\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$SplitControl$startDone, %function
sendAckC$SplitControl$startDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L174
	ldr	r2, .L177
	ldr	r1, .L177+4
	mov	r0, #154
	bl	sim_log_debug
	ldr	r3, .L177+8
	ldrh	r3, [r3]
	cmp	r3, #1
	bne	.L176
	mov	r0, #1000
	bl	sendAckC$MilliTimer$startPeriodic
	b	.L176
.L174:
	ldr	r2, .L177+12
	ldr	r1, .L177+16
	mov	r0, #155
	bl	sim_log_error
	bl	sendAckC$SplitControl$start
.L176:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L178:
	.align	2
.L177:
	.word	.LC12
	.word	.LC13
	.word	TOS_NODE_ID
	.word	.LC14
	.word	.LC15
	.size	sendAckC$SplitControl$startDone, .-sendAckC$SplitControl$startDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Control$startDone, %function
TossimPacketModelC$Control$startDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	sendAckC$SplitControl$startDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$Control$startDone, .-TossimPacketModelC$Control$startDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$startDoneTask$runTask, %function
TossimPacketModelC$startDoneTask$runTask:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L181
	mov	r1, #1
	strb	r1, [r2, r3]
	mov	r0, #0
	bl	TossimPacketModelC$Control$startDone
	nop
	pop	{fp, pc}
.L182:
	.align	2
.L181:
	.word	TossimPacketModelC$running
	.size	TossimPacketModelC$startDoneTask$runTask, .-TossimPacketModelC$startDoneTask$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$SplitControl$stopDone, %function
sendAckC$SplitControl$stopDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sendAckC$SplitControl$stopDone, .-sendAckC$SplitControl$stopDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Control$stopDone, %function
TossimPacketModelC$Control$stopDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	sendAckC$SplitControl$stopDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$Control$stopDone, .-TossimPacketModelC$Control$stopDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$stopDoneTask$runTask, %function
TossimPacketModelC$stopDoneTask$runTask:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L186
	mov	r1, #0
	strb	r1, [r2, r3]
	mov	r0, #0
	bl	TossimPacketModelC$Control$stopDone
	nop
	pop	{fp, pc}
.L187:
	.align	2
.L186:
	.word	TossimPacketModelC$running
	.size	TossimPacketModelC$stopDoneTask$runTask, .-TossimPacketModelC$stopDoneTask$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_hton_uint16, %function
__nesc_hton_uint16:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, r1
	strh	r3, [fp, #-18]	@ movhi
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	ldrh	r2, [fp, #-18]	@ movhi
	and	r2, r2, #255
	strb	r2, [r3]
	ldrh	r3, [fp, #-18]
	lsr	r3, r3, #8
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	and	r2, r3, #255
	ldr	r3, [fp, #-8]
	strb	r2, [r3]
	ldrh	r3, [fp, #-18]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__nesc_hton_uint16, .-__nesc_hton_uint16
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_hton_uint8, %function
__nesc_hton_uint8:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, r1
	strb	r3, [fp, #-17]
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r2, [fp, #-17]
	strb	r2, [r3]
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	__nesc_hton_uint8, .-__nesc_hton_uint8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_hton_int8, %function
__nesc_hton_int8:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	__nesc_hton_uint8
	ldrsb	r3, [fp, #-9]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__nesc_hton_int8, .-__nesc_hton_int8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMSend$sendDone, %function
TossimActiveMessageC$AMSend$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	str	r1, [fp, #-12]
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-6]	@ zero_extendqisi2
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	AMQueueImplP$0$AMSend$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$AMSend$sendDone, .-TossimActiveMessageC$AMSend$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Model$sendDone, %function
TossimActiveMessageC$Model$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$AMPacket$type
	mov	r3, r0
	mov	r0, r3
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, [fp, #-8]
	bl	TossimActiveMessageC$AMSend$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$Model$sendDone, .-TossimActiveMessageC$Model$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Packet$sendDone, %function
TossimPacketModelC$Packet$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$Model$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$Packet$sendDone, .-TossimPacketModelC$Packet$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$getMetadata, %function
TossimPacketModelC$getMetadata:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #37
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	TossimPacketModelC$getMetadata, .-TossimPacketModelC$getMetadata
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$sendDoneTask$runTask, %function
TossimPacketModelC$sendDoneTask$runTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L202
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-12]
	ldr	r0, [fp, #-12]
	bl	TossimPacketModelC$getMetadata
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mov	r1, #0
	mov	r0, r3
	bl	__nesc_hton_uint8
	ldr	r3, [fp, #-8]
	mov	r1, #0
	mov	r0, r3
	bl	__nesc_hton_int8
	ldr	r3, [fp, #-8]
	add	r3, r3, #2
	mov	r1, #0
	mov	r0, r3
	bl	__nesc_hton_uint16
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L202
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L202+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L200
	mov	r3, #0
	b	.L201
.L200:
	mov	r3, #4
.L201:
	mov	r1, r3
	ldr	r0, [fp, #-12]
	bl	TossimPacketModelC$Packet$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L203:
	.align	2
.L202:
	.word	TossimPacketModelC$sending
	.word	TossimPacketModelC$running
	.size	TossimPacketModelC$sendDoneTask$runTask, .-TossimPacketModelC$sendDoneTask$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueEntryP$0$AMSend$sendDone, %function
AMQueueEntryP$0$AMSend$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	sendAckC$AMSend$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueEntryP$0$AMSend$sendDone, .-AMQueueEntryP$0$AMSend$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueEntryP$0$Send$sendDone, %function
AMQueueEntryP$0$Send$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	AMQueueEntryP$0$AMSend$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueEntryP$0$Send$sendDone, .-AMQueueEntryP$0$Send$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$Send$default$sendDone, %function
AMQueueImplP$0$Send$default$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	str	r1, [fp, #-12]
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	AMQueueImplP$0$Send$default$sendDone, .-AMQueueImplP$0$Send$default$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$Send$sendDone, %function
AMQueueImplP$0$Send$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	str	r1, [fp, #-12]
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L208
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-12]
	bl	AMQueueEntryP$0$Send$sendDone
	b	.L209
.L208:
	ldrb	r2, [fp, #-6]	@ zero_extendqisi2
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	AMQueueImplP$0$Send$default$sendDone
	nop
.L209:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueImplP$0$Send$sendDone, .-AMQueueImplP$0$Send$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$sendDone, %function
AMQueueImplP$0$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	str	r1, [fp, #-12]
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r1, .L211
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r1, r3, lsl #2]
	bl	AMQueueImplP$0$tryToSend
	ldrb	r2, [fp, #-6]	@ zero_extendqisi2
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r1, [fp, #-12]
	mov	r0, r3
	bl	AMQueueImplP$0$Send$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L212:
	.align	2
.L211:
	.word	AMQueueImplP$0$queue
	.size	AMQueueImplP$0$sendDone, .-AMQueueImplP$0$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$errorTask$runTask, %function
AMQueueImplP$0$errorTask$runTask:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L214
	ldrb	r4, [r2, r3]	@ zero_extendqisi2
	bl	sim_node
	mov	r5, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L214
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	ldr	r2, .L214+4
	add	r3, r5, r3
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #1
	mov	r1, r3
	mov	r0, r4
	bl	AMQueueImplP$0$sendDone
	nop
	pop	{r4, r5, fp, pc}
.L215:
	.align	2
.L214:
	.word	AMQueueImplP$0$current
	.word	AMQueueImplP$0$queue
	.size	AMQueueImplP$0$errorTask$runTask, .-AMQueueImplP$0$errorTask$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$CancelTask$runTask, %function
AMQueueImplP$0$CancelTask$runTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, #0
	strb	r3, [fp, #-12]
	b	.L217
.L222:
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	ldr	r1, .L223
	add	r2, r1, r2
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L218
	mov	r3, #1
	strb	r3, [fp, #-10]
	mov	r3, #0
	strb	r3, [fp, #-11]
	b	.L219
.L221:
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	ldr	r1, .L223
	add	r2, r1, r2
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldrb	r3, [fp, #-10]
	and	r3, r3, r2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L220
	ldrb	r3, [fp, #-12]
	lsl	r3, r3, #3
	and	r2, r3, #255
	ldrb	r3, [fp, #-11]
	add	r3, r2, r3
	strb	r3, [fp, #-9]
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	ldr	r1, .L223+4
	add	r3, r2, r3
	ldr	r3, [r1, r3, lsl #2]
	str	r3, [fp, #-8]
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	ldr	r1, .L223+4
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r1, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldrb	r2, [fp, #-12]	@ zero_extendqisi2
	ldr	r1, .L223
	add	r2, r1, r2
	add	r2, r2, r3
	ldrb	r2, [r2]	@ zero_extendqisi2
	lsl	r2, r2, #24
	asr	r1, r2, #24
	ldrsb	r2, [fp, #-10]
	mvn	r2, r2
	lsl	r2, r2, #24
	asr	r2, r2, #24
	and	r2, r2, r1
	lsl	r2, r2, #24
	asr	r1, r2, #24
	ldrb	r2, [fp, #-12]	@ zero_extendqisi2
	and	r0, r1, #255
	ldr	r1, .L223
	add	r2, r1, r2
	add	r3, r2, r3
	mov	r2, r0
	strb	r2, [r3]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r2, #3
	ldr	r1, [fp, #-8]
	mov	r0, r3
	bl	AMQueueImplP$0$Send$sendDone
.L220:
	ldrb	r3, [fp, #-10]
	lsl	r3, r3, #1
	strb	r3, [fp, #-10]
	ldrb	r3, [fp, #-11]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-11]
.L219:
	ldrb	r3, [fp, #-11]	@ zero_extendqisi2
	cmp	r3, #7
	bls	.L221
.L218:
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-12]
.L217:
	ldrb	r3, [fp, #-12]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L222
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L224:
	.align	2
.L223:
	.word	AMQueueImplP$0$cancelMask
	.word	AMQueueImplP$0$queue
	.size	AMQueueImplP$0$CancelTask$runTask, .-AMQueueImplP$0$CancelTask$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$TimerFrom$fired, %function
VirtualizeTimerC$0$TimerFrom$fired:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	VirtualizeTimerC$0$TimerFrom$getNow
	mov	r3, r0
	mov	r0, r3
	bl	VirtualizeTimerC$0$fireTimers
	nop
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$TimerFrom$fired, .-VirtualizeTimerC$0$TimerFrom$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Timer$fired, %function
AlarmToTimerC$0$Timer$fired:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	VirtualizeTimerC$0$TimerFrom$fired
	nop
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Timer$fired, .-AlarmToTimerC$0$Timer$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Alarm$getAlarm, %function
Atm128AlarmAsyncP$0$Alarm$getAlarm:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-17]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L229
	ldr	r4, [r2, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L229+4
	ldr	r3, [r2, r3, lsl #2]
	add	r3, r4, r3
	str	r3, [fp, #-16]
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	ldr	r3, [fp, #-16]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L230:
	.align	2
.L229:
	.word	Atm128AlarmAsyncP$0$t0
	.word	Atm128AlarmAsyncP$0$dt
	.size	Atm128AlarmAsyncP$0$Alarm$getAlarm, .-Atm128AlarmAsyncP$0$Alarm$getAlarm
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Alarm$getAlarm, %function
AlarmToTimerC$0$Alarm$getAlarm:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	Atm128AlarmAsyncP$0$Alarm$getAlarm
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Alarm$getAlarm, .-AlarmToTimerC$0$Alarm$getAlarm
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Alarm$startAt, %function
AlarmToTimerC$0$Alarm$startAt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	Atm128AlarmAsyncP$0$Alarm$startAt
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Alarm$startAt, .-AlarmToTimerC$0$Alarm$startAt
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$start, %function
AlarmToTimerC$0$start:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, r2
	strb	r3, [fp, #-13]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L235
	ldr	r3, [fp, #-12]
	str	r3, [r1, r2, lsl #2]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L235+4
	ldrb	r3, [fp, #-13]
	strb	r3, [r1, r2]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	AlarmToTimerC$0$Alarm$startAt
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L236:
	.align	2
.L235:
	.word	AlarmToTimerC$0$m_dt
	.word	AlarmToTimerC$0$m_oneshot
	.size	AlarmToTimerC$0$start, .-AlarmToTimerC$0$start
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$fired$runTask, %function
AlarmToTimerC$0$fired$runTask:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L239
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L238
	bl	AlarmToTimerC$0$Alarm$getAlarm
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L239+4
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #0
	mov	r1, r3
	mov	r0, r4
	bl	AlarmToTimerC$0$start
.L238:
	bl	AlarmToTimerC$0$Timer$fired
	nop
	pop	{r4, r5, fp, pc}
.L240:
	.align	2
.L239:
	.word	AlarmToTimerC$0$m_oneshot
	.word	AlarmToTimerC$0$m_dt
	.size	AlarmToTimerC$0$fired$runTask, .-AlarmToTimerC$0$fired$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Timer$startOneShotAt, %function
AlarmToTimerC$0$Timer$startOneShotAt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r2, #1
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	AlarmToTimerC$0$start
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Timer$startOneShotAt, .-AlarmToTimerC$0$Timer$startOneShotAt
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$TimerFrom$startOneShotAt, %function
VirtualizeTimerC$0$TimerFrom$startOneShotAt:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	AlarmToTimerC$0$Timer$startOneShotAt
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$TimerFrom$startOneShotAt, .-VirtualizeTimerC$0$TimerFrom$startOneShotAt
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Alarm$stop, %function
Atm128AlarmAsyncP$0$Alarm$stop:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L244
	mov	r1, #0
	strb	r1, [r2, r3]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L245:
	.align	2
.L244:
	.word	Atm128AlarmAsyncP$0$set
	.size	Atm128AlarmAsyncP$0$Alarm$stop, .-Atm128AlarmAsyncP$0$Alarm$stop
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Alarm$stop, %function
AlarmToTimerC$0$Alarm$stop:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	Atm128AlarmAsyncP$0$Alarm$stop
	nop
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Alarm$stop, .-AlarmToTimerC$0$Alarm$stop
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Timer$stop, %function
AlarmToTimerC$0$Timer$stop:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	AlarmToTimerC$0$Alarm$stop
	nop
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Timer$stop, .-AlarmToTimerC$0$Timer$stop
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$TimerFrom$stop, %function
VirtualizeTimerC$0$TimerFrom$stop:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	AlarmToTimerC$0$Timer$stop
	nop
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$TimerFrom$stop, .-VirtualizeTimerC$0$TimerFrom$stop
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$updateFromTimer$runTask, %function
VirtualizeTimerC$0$updateFromTimer$runTask:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	bl	VirtualizeTimerC$0$TimerFrom$getNow
	str	r0, [fp, #-20]
	mvn	r3, #-2147483648
	str	r3, [fp, #-24]
	mov	r3, #0
	strb	r3, [fp, #-27]
	bl	VirtualizeTimerC$0$TimerFrom$stop
	mov	r3, #0
	strh	r3, [fp, #-26]	@ movhi
	b	.L250
.L252:
	bl	sim_node
	mov	r1, r0
	ldrh	r3, [fp, #-26]
	mov	r2, r3
	lsl	r2, r2, #1
	add	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, .L256
	add	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldrb	r3, [r3, #8]	@ zero_extendqisi2
	and	r3, r3, #2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L251
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	sub	r3, r2, r3
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-12]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	bge	.L251
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-24]
	mov	r3, #1
	strb	r3, [fp, #-27]
.L251:
	ldrh	r3, [fp, #-26]
	add	r3, r3, #1
	strh	r3, [fp, #-26]	@ movhi
.L250:
	ldrh	r3, [fp, #-26]
	cmp	r3, #1
	bls	.L252
	ldrb	r3, [fp, #-27]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L255
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bgt	.L254
	ldr	r0, [fp, #-20]
	bl	VirtualizeTimerC$0$fireTimers
	b	.L255
.L254:
	ldr	r3, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	bl	VirtualizeTimerC$0$TimerFrom$startOneShotAt
.L255:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L257:
	.align	2
.L256:
	.word	VirtualizeTimerC$0$m_timers
	.size	VirtualizeTimerC$0$updateFromTimer$runTask, .-VirtualizeTimerC$0$updateFromTimer$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$TaskBasic$default$runTask, %function
SimSchedulerBasicP$TaskBasic$default$runTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	SimSchedulerBasicP$TaskBasic$default$runTask, .-SimSchedulerBasicP$TaskBasic$default$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$TaskBasic$runTask, %function
SimSchedulerBasicP$TaskBasic$runTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #6
	ldrls	pc, [pc, r3, asl #2]
	b	.L260
.L262:
	.word	.L268
	.word	.L267
	.word	.L266
	.word	.L265
	.word	.L264
	.word	.L263
	.word	.L261
.L268:
	bl	TossimPacketModelC$startDoneTask$runTask
	b	.L269
.L267:
	bl	TossimPacketModelC$stopDoneTask$runTask
	b	.L269
.L266:
	bl	TossimPacketModelC$sendDoneTask$runTask
	b	.L269
.L265:
	bl	AMQueueImplP$0$CancelTask$runTask
	b	.L269
.L264:
	bl	AMQueueImplP$0$errorTask$runTask
	b	.L269
.L263:
	bl	AlarmToTimerC$0$fired$runTask
	b	.L269
.L261:
	bl	VirtualizeTimerC$0$updateFromTimer$runTask
	b	.L269
.L260:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	SimSchedulerBasicP$TaskBasic$default$runTask
	nop
.L269:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	SimSchedulerBasicP$TaskBasic$runTask, .-SimSchedulerBasicP$TaskBasic$runTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$AMSend$send, %function
sendAckC$AMSend$send:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	mov	r3, r0
	str	r1, [fp, #-20]
	strh	r3, [fp, #-14]	@ movhi
	mov	r3, r2
	strb	r3, [fp, #-15]
	ldrb	r2, [fp, #-15]	@ zero_extendqisi2
	ldrh	r3, [fp, #-14]
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	AMQueueEntryP$0$AMSend$send
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sendAckC$AMSend$send, .-sendAckC$AMSend$send
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$PacketAcknowledgements$requestAck, %function
TossimPacketModelC$PacketAcknowledgements$requestAck:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimPacketModelC$getMetadata
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mov	r1, #1
	mov	r0, r3
	bl	__nesc_hton_uint8
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$PacketAcknowledgements$requestAck, .-TossimPacketModelC$PacketAcknowledgements$requestAck
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$ack$requestAck, %function
sendAckC$ack$requestAck:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimPacketModelC$PacketAcknowledgements$requestAck
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sendAckC$ack$requestAck, .-sendAckC$ack$requestAck
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Packet$getPayload, %function
TossimActiveMessageC$Packet$getPayload:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	cmp	r3, #28
	bhi	.L277
	ldr	r3, [fp, #-8]
	add	r3, r3, #7
	b	.L278
.L277:
	mov	r3, #0
.L278:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	TossimActiveMessageC$Packet$getPayload, .-TossimActiveMessageC$Packet$getPayload
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$Packet$getPayload, %function
sendAckC$Packet$getPayload:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strb	r3, [fp, #-17]
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$Packet$getPayload
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sendAckC$Packet$getPayload, .-sendAckC$Packet$getPayload
	.section	.rodata
	.align	2
.LC16:
	.ascii	"Preparing the message... \012\000"
	.align	2
.LC17:
	.ascii	"packet n. %u\012\000"
	.align	2
.LC18:
	.ascii	"counter\000"
	.align	2
.LC19:
	.ascii	"Packet passed to lower layer successfully!\012\000"
	.align	2
.LC20:
	.ascii	"radio_send\000"
	.align	2
.LC21:
	.ascii	"\011 Payload Sent\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$sendReq, %function
sendAckC$sendReq:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L285
	add	r3, r3, r2
	mov	r1, #5
	mov	r0, r3
	bl	sendAckC$Packet$getPayload
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	beq	.L284
	ldr	r3, [fp, #-16]
	mov	r1, #1
	mov	r0, r3
	bl	__nesc_hton_uint8
	ldr	r3, [fp, #-16]
	add	r4, r3, #3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L285+4
	ldrb	r2, [r2, r3]	@ zero_extendqisi2
	add	r2, r2, #1
	and	r1, r2, #255
	ldr	r2, .L285+4
	strb	r1, [r2, r3]
	ldr	r2, .L285+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r1, r3
	mov	r0, r4
	bl	__nesc_hton_uint16
	ldr	r2, .L285+8
	ldr	r1, .L285+12
	mov	r0, #148
	bl	sim_log_debug
	ldr	r3, [fp, #-16]
	add	r3, r3, #3
	mov	r0, r3
	bl	__nesc_ntoh_uint16
	mov	r3, r0
	ldr	r2, .L285+16
	ldr	r1, .L285+20
	mov	r0, #149
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L285
	add	r3, r3, r2
	mov	r0, r3
	bl	sendAckC$ack$requestAck
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L285
	add	r3, r3, r2
	mov	r2, #5
	mov	r1, r3
	mov	r0, #2
	bl	sendAckC$AMSend$send
	mov	r3, r0
	cmp	r3, #0
	bne	.L281
	ldr	r2, .L285+24
	ldr	r1, .L285+28
	mov	r0, #150
	bl	sim_log_debug
	ldr	r2, .L285+32
	ldr	r1, .L285+12
	mov	r0, #151
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	ldr	r2, .L285+36
	ldr	r1, .L285+12
	mov	r0, #152
	bl	sim_log_debug_clear
	b	.L281
.L284:
	nop
.L281:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L286:
	.align	2
.L285:
	.word	sendAckC$packet
	.word	sendAckC$counter
	.word	.LC16
	.word	.LC6
	.word	.LC17
	.word	.LC18
	.word	.LC19
	.word	.LC20
	.word	.LC21
	.word	.LC8
	.size	sendAckC$sendReq, .-sendAckC$sendReq
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$MilliTimer$fired, %function
sendAckC$MilliTimer$fired:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sendAckC$sendReq
	nop
	pop	{fp, pc}
	.size	sendAckC$MilliTimer$fired, .-sendAckC$MilliTimer$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	RandomMlcgC$Random$rand16, %function
RandomMlcgC$Random$rand16:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	RandomMlcgC$Random$rand32
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	pop	{fp, pc}
	.size	RandomMlcgC$Random$rand16, .-RandomMlcgC$Random$rand16
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	FakeSensorP$0$Random$rand16, %function
FakeSensorP$0$Random$rand16:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	RandomMlcgC$Random$rand16
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	FakeSensorP$0$Random$rand16, .-FakeSensorP$0$Random$rand16
	.section	.rodata
	.align	2
.LC22:
	.ascii	"Measurement READ OK\012\000"
	.align	2
.LC23:
	.ascii	"read\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$Read$readDone, %function
sendAckC$Read$readDone:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-21]
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-24]	@ movhi
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L295
	add	r3, r3, r2
	mov	r1, #5
	mov	r0, r3
	bl	sendAckC$Packet$getPayload
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	mov	r1, #2
	mov	r0, r3
	bl	__nesc_hton_uint8
	ldr	r3, [fp, #-16]
	add	r4, r3, #3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L295+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r1, r3
	mov	r0, r4
	bl	__nesc_hton_uint16
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	ldrh	r2, [fp, #-24]
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint16
	ldr	r2, .L295+8
	ldr	r1, .L295+12
	mov	r0, #167
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L295
	add	r3, r3, r2
	mov	r0, r3
	bl	sendAckC$ack$requestAck
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L295
	add	r3, r3, r2
	mov	r2, #5
	mov	r1, r3
	mov	r0, #1
	bl	sendAckC$AMSend$send
	mov	r3, r0
	cmp	r3, #0
	bne	.L294
	ldr	r2, .L295+16
	ldr	r1, .L295+20
	mov	r0, #168
	bl	sim_log_debug
	ldr	r2, .L295+24
	ldr	r1, .L295+28
	mov	r0, #169
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	ldr	r2, .L295+32
	ldr	r1, .L295+28
	mov	r0, #170
	bl	sim_log_debug_clear
.L294:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L296:
	.align	2
.L295:
	.word	sendAckC$packet
	.word	sendAckC$counter
	.word	.LC22
	.word	.LC23
	.word	.LC19
	.word	.LC20
	.word	.LC21
	.word	.LC6
	.word	.LC8
	.size	sendAckC$Read$readDone, .-sendAckC$Read$readDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	FakeSensorP$0$Read$readDone, %function
FakeSensorP$0$Read$readDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-8]	@ movhi
	ldrh	r2, [fp, #-8]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	sendAckC$Read$readDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	FakeSensorP$0$Read$readDone, .-FakeSensorP$0$Read$readDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	FakeSensorP$0$Timer0$fired, %function
FakeSensorP$0$Timer0$fired:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	FakeSensorP$0$Random$rand16
	mov	r3, r0
	mov	r1, r3
	mov	r0, #0
	bl	FakeSensorP$0$Read$readDone
	nop
	pop	{fp, pc}
	.size	FakeSensorP$0$Timer0$fired, .-FakeSensorP$0$Timer0$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$Timer$default$fired, %function
VirtualizeTimerC$0$Timer$default$fired:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-5]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	VirtualizeTimerC$0$Timer$default$fired, .-VirtualizeTimerC$0$Timer$default$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$Timer$fired, %function
VirtualizeTimerC$0$Timer$fired:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L301
	cmp	r3, #1
	beq	.L302
	b	.L305
.L301:
	bl	sendAckC$MilliTimer$fired
	b	.L304
.L302:
	bl	FakeSensorP$0$Timer0$fired
	b	.L304
.L305:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	VirtualizeTimerC$0$Timer$default$fired
	nop
.L304:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	VirtualizeTimerC$0$Timer$fired, .-VirtualizeTimerC$0$Timer$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$getHeader, %function
TossimActiveMessageC$getHeader:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #7
	sub	r3, r3, #7
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	TossimActiveMessageC$getHeader, .-TossimActiveMessageC$getHeader
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMPacket$setDestination, %function
TossimActiveMessageC$AMPacket$setDestination:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strh	r3, [fp, #-18]	@ movhi
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrh	r2, [fp, #-18]
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint16
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$AMPacket$setDestination, .-TossimActiveMessageC$AMPacket$setDestination
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueEntryP$0$AMPacket$setDestination, %function
AMQueueEntryP$0$AMPacket$setDestination:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strh	r3, [fp, #-10]	@ movhi
	ldrh	r3, [fp, #-10]
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$AMPacket$setDestination
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueEntryP$0$AMPacket$setDestination, .-AMQueueEntryP$0$AMPacket$setDestination
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMPacket$setType, %function
TossimActiveMessageC$AMPacket$setType:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strb	r3, [fp, #-17]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #6
	ldrb	r2, [fp, #-17]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint8
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$AMPacket$setType, .-TossimActiveMessageC$AMPacket$setType
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueEntryP$0$AMPacket$setType, %function
AMQueueEntryP$0$AMPacket$setType:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$AMPacket$setType
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueEntryP$0$AMPacket$setType, .-AMQueueEntryP$0$AMPacket$setType
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$AMSend$send, %function
AMQueueImplP$0$AMSend$send:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r2, [fp, #-20]
	mov	r2, r3
	mov	r3, r0
	strb	r3, [fp, #-13]
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-16]	@ movhi
	mov	r3, r2
	strb	r3, [fp, #-14]
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	ldrh	r1, [fp, #-16]
	ldrb	r0, [fp, #-13]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	bl	TossimActiveMessageC$AMSend$send
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueImplP$0$AMSend$send, .-AMQueueImplP$0$AMSend$send
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$AMPacket$destination, %function
AMQueueImplP$0$AMPacket$destination:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$AMPacket$destination
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueImplP$0$AMPacket$destination, .-AMQueueImplP$0$AMPacket$destination
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$AMPacket$type, %function
AMQueueImplP$0$AMPacket$type:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$AMPacket$type
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueImplP$0$AMPacket$type, .-AMQueueImplP$0$AMPacket$type
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Packet$setPayloadLength, %function
TossimActiveMessageC$Packet$setPayloadLength:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$getHeader
	mov	r3, r0
	add	r3, r3, #4
	ldrb	r2, [fp, #-9]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint8
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$Packet$setPayloadLength, .-TossimActiveMessageC$Packet$setPayloadLength
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$Packet$setPayloadLength, %function
AMQueueImplP$0$Packet$setPayloadLength:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$Packet$setPayloadLength
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueImplP$0$Packet$setPayloadLength, .-AMQueueImplP$0$Packet$setPayloadLength
	.section	.rodata
	.align	2
.LC24:
	.ascii	"AMQueue: request to send from %hhu (%p): passed che"
	.ascii	"cks\012\000"
	.align	2
.LC25:
	.ascii	"AMQueue\000"
	.align	2
.LC26:
	.ascii	"%s: request to send from %hhu (%p): queue empty\012"
	.ascii	"\000"
	.align	2
.LC27:
	.ascii	"%s: underlying send failed.\012\000"
	.align	2
.LC28:
	.ascii	"AMQueue: request to send from %hhu (%p): queue not "
	.ascii	"empty\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$Send$send, %function
AMQueueImplP$0$Send$send:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	mov	r3, r0
	str	r1, [fp, #-20]
	strb	r3, [fp, #-13]
	mov	r3, r2
	strb	r3, [fp, #-14]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L321
	mov	r3, #1
	b	.L322
.L321:
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	ldr	r1, .L326
	add	r3, r2, r3
	ldr	r3, [r1, r3, lsl #2]
	cmp	r3, #0
	beq	.L323
	mov	r3, #5
	b	.L322
.L323:
	ldrb	r2, [fp, #-13]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L326+4
	ldr	r1, .L326+8
	mov	r0, #171
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	ldr	r1, .L326
	add	r3, r2, r3
	ldr	r2, [fp, #-20]
	str	r2, [r1, r3, lsl #2]
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-20]
	bl	AMQueueImplP$0$Packet$setPayloadLength
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L326+12
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L324
	ldr	r0, [fp, #-20]
	bl	AMQueueImplP$0$AMPacket$type
	mov	r3, r0
	strb	r3, [fp, #-8]
	ldr	r0, [fp, #-20]
	bl	AMQueueImplP$0$AMPacket$destination
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	str	r2, [sp, #4]
	str	r3, [sp]
	ldr	r3, .L326+16
	ldr	r2, .L326+20
	ldr	r1, .L326+8
	mov	r0, #172
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L326+12
	ldrb	r3, [fp, #-13]
	strb	r3, [r1, r2]
	ldrb	r3, [fp, #-14]	@ zero_extendqisi2
	ldrh	r1, [fp, #-6]
	ldrb	r0, [fp, #-8]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	bl	AMQueueImplP$0$AMSend$send
	mov	r3, r0
	strb	r3, [fp, #-7]
	ldrb	r3, [fp, #-7]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L325
	ldr	r3, .L326+16
	ldr	r2, .L326+24
	ldr	r1, .L326+8
	mov	r0, #173
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L326+12
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r2, r0
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	ldr	r1, .L326
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r1, r3, lsl #2]
.L325:
	ldrb	r3, [fp, #-7]	@ zero_extendqisi2
	b	.L322
.L324:
	ldrb	r2, [fp, #-13]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L326+28
	ldr	r1, .L326+8
	mov	r0, #174
	bl	sim_log_debug
	mov	r3, #0
.L322:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L327:
	.align	2
.L326:
	.word	AMQueueImplP$0$queue
	.word	.LC24
	.word	.LC25
	.word	AMQueueImplP$0$current
	.word	__FUNCTION__.8202
	.word	.LC26
	.word	.LC27
	.word	.LC28
	.size	AMQueueImplP$0$Send$send, .-AMQueueImplP$0$Send$send
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueEntryP$0$Send$send, %function
AMQueueEntryP$0$Send$send:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strb	r3, [fp, #-17]
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, [fp, #-16]
	mov	r0, #0
	bl	AMQueueImplP$0$Send$send
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueEntryP$0$Send$send, .-AMQueueEntryP$0$Send$send
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$free_receive_message, %function
CpmModelC$free_receive_message:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	free
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	CpmModelC$free_receive_message, .-CpmModelC$free_receive_message
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$Model$shouldAck, %function
CpmModelC$Model$shouldAck:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimPacketModelC$GainRadioModel$shouldAck
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	CpmModelC$Model$shouldAck, .-CpmModelC$Model$shouldAck
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Packet$receive, %function
TossimPacketModelC$Packet$receive:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$Model$receive
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$Packet$receive, .-TossimPacketModelC$Packet$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$GainRadioModel$receive, %function
TossimPacketModelC$GainRadioModel$receive:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L337
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L336
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L337+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L336
	ldr	r0, [fp, #-8]
	bl	TossimPacketModelC$Packet$receive
.L336:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L338:
	.align	2
.L337:
	.word	TossimPacketModelC$running
	.word	TossimPacketModelC$transmitting
	.size	TossimPacketModelC$GainRadioModel$receive, .-TossimPacketModelC$GainRadioModel$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$Model$receive, %function
CpmModelC$Model$receive:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	TossimPacketModelC$GainRadioModel$receive
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	CpmModelC$Model$receive, .-CpmModelC$Model$receive
	.global	__aeabi_ddiv
	.global	__aeabi_dsub
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$checkReceive, %function
CpmModelC$checkReceive:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	bl	CpmModelC$noise_hash_generation
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L345
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-16]
	mov	r2, #0
	ldr	r3, .L345+4
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	ldr	r1, .L345+4
	bl	pow
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	b	.L341
.L343:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	beq	.L342
	ldr	r3, [fp, #-16]
	add	r1, r3, #24
	ldmia	r1, {r0-r1}
	mov	r2, #0
	ldr	r3, .L345+4
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	ldr	r1, .L345+4
	bl	pow
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
.L342:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #48]
	str	r3, [fp, #-16]
.L341:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L343
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	log
	mov	r2, #0
	ldr	r3, .L345+4
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L345+8
	ldr	r3, .L345+12
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-24]
	add	r1, r3, #24
	ldmia	r1, {r0-r1}
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	CpmModelC$shouldReceive
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L346:
	.align	2
.L345:
	.word	CpmModelC$outstandingReceptionHead
	.word	1076101120
	.word	-1145744106
	.word	1073900465
	.size	CpmModelC$checkReceive, .-CpmModelC$checkReceive
	.section	.rodata
	.align	2
.LC29:
	.ascii	"Handling reception event @ %s.\012\000"
	.align	2
.LC30:
	.ascii	"CpmModelC\000"
	.align	2
.LC31:
	.ascii	"Incoming packet list structure is corrupted: entry "
	.ascii	"is not the head and no entry points to it.\012\000"
	.align	2
.LC32:
	.ascii	"Packet from %i to %i\012\000"
	.align	2
.LC33:
	.ascii	"CpmModelC,SNRLoss\000"
	.align	2
.LC34:
	.ascii	" - lost packet from %i as SNR was too low.\012\000"
	.align	2
.LC35:
	.ascii	"  -signaling reception\012\000"
	.align	2
.LC36:
	.ascii	" acknowledgment requested, \000"
	.align	2
.LC37:
	.ascii	" no acknowledgment requested.\012\000"
	.align	2
.LC38:
	.ascii	" scheduling ack.\012\000"
	.global	__aeabi_dcmplt
	.align	2
.LC39:
	.ascii	"Packet was technically lost, but TOSSIM introduces "
	.ascii	"an ack false positive rate.\012\000"
	.align	2
.LC40:
	.ascii	"  -packet was lost.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$sim_gain_receive_handle, %function
CpmModelC$sim_gain_receive_handle:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #36
	str	r0, [fp, #-48]
	ldr	r3, [fp, #-48]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-36]
	mov	r3, #0
	str	r3, [fp, #-44]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L369
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-40]
	bl	sim_time_string
	mov	r3, r0
	ldr	r2, .L369+4
	ldr	r1, .L369+8
	mov	r0, #128
	bl	sim_log_debug
	b	.L348
.L350:
	ldr	r3, [fp, #-40]
	ldr	r3, [r3, #48]
	ldr	r2, [fp, #-36]
	cmp	r2, r3
	bne	.L349
	ldr	r3, [fp, #-40]
	str	r3, [fp, #-44]
.L349:
	ldr	r3, [fp, #-40]
	ldr	r3, [r3, #48]
	str	r3, [fp, #-40]
.L348:
	ldr	r3, [fp, #-40]
	cmp	r3, #0
	bne	.L350
	ldr	r3, [fp, #-44]
	cmp	r3, #0
	beq	.L351
	ldr	r3, [fp, #-36]
	ldr	r2, [r3, #48]
	ldr	r3, [fp, #-44]
	str	r2, [r3, #48]
	b	.L352
.L351:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L369
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-36]
	cmp	r2, r3
	bne	.L353
	bl	sim_node
	mov	r2, r0
	ldr	r3, [fp, #-36]
	ldr	r3, [r3, #48]
	ldr	r1, .L369
	str	r3, [r1, r2, lsl #2]
	b	.L352
.L353:
	ldr	r2, .L369+12
	ldr	r1, .L369+8
	mov	r0, #129
	bl	sim_log_error
.L352:
	ldr	r3, [fp, #-36]
	ldr	r8, [r3]
	bl	sim_node
	mov	r3, r0
	str	r3, [sp]
	mov	r3, r8
	ldr	r2, .L369+16
	ldr	r1, .L369+20
	mov	r0, #130
	bl	sim_log_debug
	ldr	r0, [fp, #-36]
	bl	CpmModelC$checkReceive
	mov	r3, r0
	cmp	r3, #0
	bne	.L354
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	ldr	r2, .L369+24
	ldr	r1, .L369+20
	mov	r0, #131
	bl	sim_log_debug
	ldr	r3, [fp, #-36]
	mov	r2, #1
	strb	r2, [r3, #41]
.L354:
	ldr	r3, [fp, #-36]
	ldrb	r3, [r3, #41]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L355
	ldr	r3, [fp, #-36]
	ldr	r3, [r3, #44]
	add	r3, r3, #37
	str	r3, [fp, #-32]
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-36]
	ldrsb	r3, [r3, #40]
	mov	r1, r3
	mov	r0, r2
	bl	__nesc_hton_int8
	ldr	r2, .L369+28
	ldr	r1, .L369+20
	mov	r0, #132
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-36]
	ldr	r3, [r3, #44]
	mov	r0, r3
	bl	CpmModelC$Model$receive
	ldr	r3, [fp, #-36]
	ldrb	r3, [r3, #42]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L356
	ldr	r2, .L369+32
	ldr	r1, .L369+8
	mov	r0, #133
	bl	sim_log_debug_clear
	b	.L357
.L356:
	ldr	r2, .L369+36
	ldr	r1, .L369+8
	mov	r0, #134
	bl	sim_log_debug_clear
.L357:
	ldr	r3, [fp, #-36]
	ldrb	r3, [r3, #42]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L358
	ldr	r3, [fp, #-36]
	ldr	r3, [r3, #44]
	mov	r0, r3
	bl	CpmModelC$Model$shouldAck
	mov	r3, r0
	cmp	r3, #0
	beq	.L358
	ldr	r2, .L369+40
	ldr	r1, .L369+8
	mov	r0, #135
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-36]
	ldr	r4, [r3]
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	adds	r6, r2, #1
	adc	r7, r3, #0
	ldr	r3, [fp, #-36]
	str	r3, [sp]
	mov	r2, r6
	mov	r3, r7
	mov	r0, r4
	bl	CpmModelC$sim_gain_schedule_ack
	b	.L359
.L358:
	ldr	r0, [fp, #-36]
	bl	CpmModelC$free_receive_message
.L359:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L369+44
	mov	r1, #0
	strb	r1, [r2, r3]
	b	.L368
.L355:
	bl	RandomUniform
	ldr	r2, .L369+48
	ldr	r3, .L369+52
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L367
	ldr	r2, .L369+56
	ldr	r1, .L369+20
	mov	r0, #136
	bl	sim_log_debug
	ldr	r3, [fp, #-36]
	ldrb	r3, [r3, #42]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L363
	ldr	r3, [fp, #-36]
	ldr	r3, [r3, #44]
	mov	r0, r3
	bl	CpmModelC$Model$shouldAck
	mov	r3, r0
	cmp	r3, #0
	beq	.L363
	ldr	r2, .L369+40
	ldr	r1, .L369+8
	mov	r0, #137
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-36]
	ldr	r6, [r3]
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	adds	r4, r2, #1
	adc	r5, r3, #0
	ldr	r3, [fp, #-36]
	str	r3, [sp]
	mov	r2, r4
	mov	r3, r5
	mov	r0, r6
	bl	CpmModelC$sim_gain_schedule_ack
	b	.L365
.L363:
	ldr	r0, [fp, #-36]
	bl	CpmModelC$free_receive_message
	b	.L365
.L367:
	ldr	r0, [fp, #-36]
	bl	CpmModelC$free_receive_message
.L365:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L369+44
	mov	r1, #0
	strb	r1, [r2, r3]
	ldr	r2, .L369+60
	ldr	r1, .L369+20
	mov	r0, #138
	bl	sim_log_debug_clear
.L368:
	nop
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
.L370:
	.align	2
.L369:
	.word	CpmModelC$outstandingReceptionHead
	.word	.LC29
	.word	.LC30
	.word	.LC31
	.word	.LC32
	.word	.LC33
	.word	.LC34
	.word	.LC35
	.word	.LC36
	.word	.LC37
	.word	.LC38
	.word	CpmModelC$receiving
	.word	-755914244
	.word	1062232653
	.word	.LC39
	.word	.LC40
	.size	CpmModelC$sim_gain_receive_handle, .-CpmModelC$sim_gain_receive_handle
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$allocate_receive_event, %function
CpmModelC$allocate_receive_event:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	str	r2, [fp, #-24]
	mov	r0, #32
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	bl	sim_node
	mov	r2, r0
	ldr	r3, [fp, #-8]
	str	r2, [r3, #8]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-8]
	ldr	r2, .L373
	str	r2, [r3, #20]
	ldr	r3, [fp, #-8]
	ldr	r2, .L373+4
	str	r2, [r3, #24]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	strb	r2, [r3, #13]
	ldr	r3, [fp, #-8]
	mov	r2, #1
	strb	r2, [r3, #12]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-24]
	str	r2, [r3, #16]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L374:
	.align	2
.L373:
	.word	CpmModelC$sim_gain_receive_handle
	.word	sim_queue_cleanup_event
	.size	CpmModelC$allocate_receive_event, .-CpmModelC$allocate_receive_event
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$allocate_receive_message, %function
CpmModelC$allocate_receive_message:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #56
	bl	malloc
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
	.size	CpmModelC$allocate_receive_message, .-CpmModelC$allocate_receive_message
	.global	__aeabi_d2iz
	.section	.rodata
	.align	2
.LC41:
	.ascii	"Lost packet from %i due to %i being off\012\000"
	.align	2
.LC42:
	.ascii	"Lost packet from %i to %i due to SNR being too low "
	.ascii	"(%i)\012\000"
	.align	2
.LC43:
	.ascii	"Lost packet from %i due to %i being mid-reception\012"
	.ascii	"\000"
	.align	2
.LC44:
	.ascii	"Lost packet from %i due to %i being mid-transmissio"
	.ascii	"n, transmissionEndTime %llu\012\000"
	.align	2
.LC45:
	.ascii	"Going to lose packet from %i with signal %lf as am "
	.ascii	"receiving a packet from %i with signal %lf\012\000"
	.align	2
.LC46:
	.ascii	"Gain,SNRLoss\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$enqueue_receive_event, %function
CpmModelC$enqueue_receive_event:
	@ args = 24, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #64
	str	r0, [fp, #-40]
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	bl	CpmModelC$allocate_receive_message
	str	r0, [fp, #-28]
	ldr	r0, [fp, #-28]
	bl	CpmModelC$packetNoise
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-40]
	str	r2, [r3]
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-28]
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r1, [fp, #-28]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	str	r2, [r1, #16]
	str	r3, [r1, #20]
	ldr	r1, [fp, #-28]
	add	r3, fp, #12
	ldmia	r3, {r2-r3}
	str	r2, [r1, #24]
	str	r3, [r1, #28]
	ldr	r1, [fp, #-28]
	add	r3, fp, #20
	ldmia	r3, {r2-r3}
	str	r2, [r1, #32]
	str	r3, [r1, #36]
	mov	r2, #0
	ldr	r3, .L386
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	ldr	r1, .L386
	bl	pow
	mov	r4, r0
	mov	r5, r1
	mov	r2, #0
	ldr	r3, .L386
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	ldr	r1, .L386
	bl	pow
	mov	r2, r0
	mov	r3, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	log
	mov	r2, #0
	ldr	r3, .L386
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L386+4
	ldr	r3, .L386+8
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	floor
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	lsl	r3, r3, #24
	asr	r2, r3, #24
	ldr	r3, [fp, #-28]
	strb	r2, [r3, #40]
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #4]
	str	r2, [r3, #44]
	ldr	r3, [fp, #-28]
	mov	r2, #0
	strb	r2, [r3, #41]
	ldr	r3, [fp, #-28]
	ldrb	r2, [fp, #8]
	strb	r2, [r3, #42]
	bl	sim_node
	mov	r3, r0
	mov	r0, r3
	bl	sim_mote_is_on
	mov	r3, r0
	cmp	r3, #0
	bne	.L378
	bl	sim_node
	mov	r3, r0
	str	r3, [sp]
	ldr	r3, [fp, #-40]
	ldr	r2, .L386+12
	ldr	r1, .L386+16
	mov	r0, #139
	bl	sim_log_debug
	ldr	r3, [fp, #-28]
	mov	r2, #1
	strb	r2, [r3, #41]
	b	.L379
.L378:
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	CpmModelC$shouldReceive
	mov	r3, r0
	cmp	r3, #0
	bne	.L380
	bl	sim_node
	mov	r4, r0
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	add	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2iz
	mov	r3, r0
	str	r3, [sp, #4]
	str	r4, [sp]
	ldr	r3, [fp, #-40]
	ldr	r2, .L386+20
	ldr	r1, .L386+24
	mov	r0, #140
	bl	sim_log_debug
	ldr	r3, [fp, #-28]
	mov	r2, #1
	strb	r2, [r3, #41]
	b	.L379
.L380:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+28
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L381
	bl	sim_node
	mov	r3, r0
	str	r3, [sp]
	ldr	r3, [fp, #-40]
	ldr	r2, .L386+32
	ldr	r1, .L386+24
	mov	r0, #141
	bl	sim_log_debug
	ldr	r3, [fp, #-28]
	mov	r2, #1
	strb	r2, [r3, #41]
	b	.L379
.L381:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+36
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L382
	ldr	r3, [fp, #-28]
	add	r5, r3, #8
	ldmia	r5, {r4-r5}
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+40
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	cmp	r4, r2
	sbcs	r3, r5, r3
	bge	.L382
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+40
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-28]
	add	r1, r1, #16
	ldmia	r1, {r0-r1}
	cmp	r0, r2
	sbcs	r3, r1, r3
	blt	.L382
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+40
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	str	r4, [sp]
	ldr	r3, [fp, #-40]
	ldr	r2, .L386+44
	ldr	r1, .L386+24
	mov	r0, #142
	bl	sim_log_debug
	ldr	r3, [fp, #-28]
	mov	r2, #1
	strb	r2, [r3, #41]
	b	.L379
.L382:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+28
	mov	r1, #1
	strb	r1, [r2, r3]
.L379:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+48
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-32]
	b	.L383
.L385:
	ldr	r3, [fp, #-32]
	add	r1, r3, #24
	ldmia	r1, {r0-r1}
	ldr	r3, [fp, #-28]
	add	r3, r3, #24
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	CpmModelC$shouldReceive
	mov	r3, r0
	cmp	r3, #0
	bne	.L384
	ldr	r3, [fp, #-32]
	ldr	ip, [r3]
	ldr	r3, [fp, #-32]
	add	r3, r3, #24
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-28]
	add	r1, r1, #24
	ldmia	r1, {r0-r1}
	str	r0, [sp, #16]
	str	r1, [sp, #20]
	ldr	r1, [fp, #-40]
	str	r1, [sp, #8]
	stm	sp, {r2-r3}
	mov	r3, ip
	ldr	r2, .L386+52
	ldr	r1, .L386+56
	mov	r0, #143
	bl	sim_log_debug
	ldr	r3, [fp, #-32]
	mov	r2, #1
	strb	r2, [r3, #41]
.L384:
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #48]
	str	r3, [fp, #-32]
.L383:
	ldr	r3, [fp, #-32]
	cmp	r3, #0
	bne	.L385
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L386+48
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, [fp, #-28]
	str	r2, [r3, #48]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L386+48
	ldr	r3, [fp, #-28]
	str	r3, [r1, r2, lsl #2]
	ldr	r2, [fp, #-28]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	CpmModelC$allocate_receive_event
	str	r0, [fp, #-24]
	ldr	r0, [fp, #-24]
	bl	sim_queue_insert
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L387:
	.align	2
.L386:
	.word	1076101120
	.word	-1145744106
	.word	1073900465
	.word	.LC41
	.word	.LC30
	.word	.LC42
	.word	.LC33
	.word	CpmModelC$receiving
	.word	.LC43
	.word	CpmModelC$transmitting
	.word	CpmModelC$transmissionEndTime
	.word	.LC44
	.word	CpmModelC$outstandingReceptionHead
	.word	.LC45
	.word	.LC46
	.size	CpmModelC$enqueue_receive_event, .-CpmModelC$enqueue_receive_event
	.section	.rodata
	.align	2
.LC47:
	.ascii	"Enqueing reception event for %i at %llu with power "
	.ascii	"%lf.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$sim_gain_put, %function
CpmModelC$sim_gain_put:
	@ args = 24, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	add	r3, fp, #12
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	ldr	r3, [fp, #-16]
	ldr	r2, .L389
	ldr	r1, .L389+4
	mov	r0, #144
	bl	sim_log_debug
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	add	r3, fp, #20
	ldmia	r3, {r2-r3}
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	add	r3, fp, #12
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldrb	r3, [fp, #4]	@ zero_extendqisi2
	str	r3, [sp, #4]
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	ldr	r0, [fp, #-8]
	bl	CpmModelC$enqueue_receive_event
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L390:
	.align	2
.L389:
	.word	.LC47
	.word	.LC30
	.size	CpmModelC$sim_gain_put, .-CpmModelC$sim_gain_put
	.section	.rodata
	.align	2
.LC48:
	.ascii	"Node %i transmitting to %i, finishes at %llu.\012\000"
	.align	2
.LC49:
	.ascii	"Lost packet from %i because %i has outstanding rece"
	.ascii	"ption, startTime %llu endTime %llu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$Model$putOnAirTo, %function
CpmModelC$Model$putOnAirTo:
	@ args = 24, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #56
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	mov	r3, r2
	strb	r3, [fp, #-37]
	bl	sim_node
	mov	r3, r0
	mov	r0, r3
	bl	sim_gain_first
	str	r0, [fp, #-20]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L396
	ldrb	r3, [fp, #-37]
	strb	r3, [r1, r2]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L396+4
	ldr	r3, [fp, #-36]
	str	r3, [r1, r2, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L396+8
	lsl	r3, r3, #3
	add	r1, r2, r3
	ldmib	fp, {r2-r3}
	stm	r1, {r2-r3}
	bl	sim_node
	mov	r1, r0
	ldmib	fp, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, [fp, #-32]
	str	r3, [sp]
	mov	r3, r1
	ldr	r2, .L396+12
	ldr	r1, .L396+16
	mov	r0, #145
	bl	sim_log_debug
	b	.L392
.L393:
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	sim_gain_value
	add	r3, fp, #12
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r4, r2
	mov	r5, r3
	bl	sim_node
	mov	r3, r0
	mov	r1, r3
	ldr	r0, [fp, #-16]
	bl	sim_gain_value
	add	r3, fp, #20
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	str	r4, [sp, #8]
	str	r5, [sp, #12]
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	str	r3, [sp]
	ldmib	fp, {r2-r3}
	ldr	r1, [fp, #-36]
	ldr	r0, [fp, #-16]
	bl	CpmModelC$sim_gain_put
	ldr	r0, [fp, #-20]
	bl	sim_gain_next
	str	r0, [fp, #-20]
.L392:
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bne	.L393
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L396+20
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-24]
	b	.L394
.L395:
	ldr	r3, [fp, #-24]
	mov	r2, #1
	strb	r2, [r3, #41]
	ldr	r3, [fp, #-24]
	ldr	r4, [r3]
	bl	sim_node
	mov	ip, r0
	ldr	r3, [fp, #-24]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-24]
	add	r1, r1, #16
	ldmia	r1, {r0-r1}
	str	r0, [sp, #16]
	str	r1, [sp, #20]
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	str	ip, [sp]
	mov	r3, r4
	ldr	r2, .L396+24
	ldr	r1, .L396+28
	mov	r0, #146
	bl	sim_log_debug
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #48]
	str	r3, [fp, #-24]
.L394:
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L395
	nop
	nop
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L397:
	.align	2
.L396:
	.word	CpmModelC$requestAck
	.word	CpmModelC$outgoing
	.word	CpmModelC$transmissionEndTime
	.word	.LC48
	.word	.LC30
	.word	CpmModelC$outstandingReceptionHead
	.word	.LC49
	.word	.LC33
	.size	CpmModelC$Model$putOnAirTo, .-CpmModelC$Model$putOnAirTo
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$GainRadioModel$putOnAirTo, %function
TossimPacketModelC$GainRadioModel$putOnAirTo:
	@ args = 24, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	mov	r3, r2
	strb	r3, [fp, #-13]
	ldrb	r1, [fp, #-13]	@ zero_extendqisi2
	add	r3, fp, #20
	ldmia	r3, {r2-r3}
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	add	r3, fp, #12
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldmib	fp, {r2-r3}
	stm	sp, {r2-r3}
	mov	r2, r1
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	CpmModelC$Model$putOnAirTo
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$GainRadioModel$putOnAirTo, .-TossimPacketModelC$GainRadioModel$putOnAirTo
	.section	.rodata
	.align	2
.LC50:
	.ascii	"PACKET: Signaling send done at %llu.\012\000"
	.align	2
.LC51:
	.ascii	"TossimPacketModelC\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$send_transmit_done, %function
TossimPacketModelC$send_transmit_done:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L402
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L402
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L402+4
	mov	r1, #0
	strb	r1, [r2, r3]
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	stm	sp, {r2-r3}
	ldr	r2, .L402+8
	ldr	r1, .L402+12
	mov	r0, #120
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L402+16
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L400
	mov	r3, #0
	b	.L401
.L400:
	mov	r3, #4
.L401:
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	TossimPacketModelC$Packet$sendDone
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L403:
	.align	2
.L402:
	.word	TossimPacketModelC$sending
	.word	TossimPacketModelC$transmitting
	.word	.LC50
	.word	.LC51
	.word	TossimPacketModelC$running
	.size	TossimPacketModelC$send_transmit_done, .-TossimPacketModelC$send_transmit_done
	.section	.rodata
	.align	2
.LC52:
	.ascii	"PACKET: Broadcasting packet to everyone.\012\000"
	.align	2
.LC53:
	.ascii	"PACKET: Send done at %llu.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$send_transmit, %function
TossimPacketModelC$send_transmit:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #56
	str	r0, [fp, #-48]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L406
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimPacketModelC$getMetadata
	str	r0, [fp, #-40]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L406+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	lsl	r3, r3, #3
	mov	r2, r3
	asr	r3, r2, #31
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	bl	sim_csma_bits_per_symbol
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	bl	sim_csma_preamble_length
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	adds	ip, r0, r2
	str	ip, [fp, #-60]
	adc	r3, r1, r3
	str	r3, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	cmp	r3, #0
	beq	.L405
	bl	sim_csma_ack_time
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	adds	r8, r0, r2
	adc	r9, r1, r3
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
.L405:
	bl	sim_ticks_per_sec
	mov	r8, r0
	mov	r9, r1
	bl	sim_csma_symbols_per_sec
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-32]
	mul	r2, r0, r3
	ldr	r3, [fp, #-36]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-36]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-48]
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	ldr	r3, [fp, #-48]
	stm	r3, {r4-r5}
	ldr	r3, [fp, #-48]
	ldr	r2, .L406+8
	str	r2, [r3, #20]
	ldr	r2, .L406+12
	ldr	r1, .L406+16
	mov	r0, #118
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L406+20
	ldr	r4, [r2, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L406
	ldr	r5, [r2, r3, lsl #2]
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	mov	ip, r3
	ldr	r3, [fp, #-48]
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	str	r0, [sp, #16]
	str	r1, [sp, #20]
	mov	r0, #0
	mov	r1, #0
	str	r0, [sp, #8]
	str	r1, [sp, #12]
	stm	sp, {r2-r3}
	mov	r2, ip
	mov	r1, r5
	mov	r0, r4
	bl	TossimPacketModelC$GainRadioModel$putOnAirTo
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	mov	r1, #0
	mov	r0, r3
	bl	__nesc_hton_uint8
	bl	sim_csma_rxtx_delay
	mov	r3, r0
	mov	r4, r3
	asr	r5, r4, #31
	bl	sim_ticks_per_sec
	mov	r8, r0
	mov	r9, r1
	bl	sim_csma_symbols_per_sec
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mul	r2, r0, r5
	mul	r3, r4, r1
	add	ip, r2, r3
	umull	r2, r3, r4, r0
	add	r1, ip, r3
	mov	r3, r1
	ldr	r1, [fp, #-48]
	ldmia	r1, {r0-r1}
	adds	r6, r2, r0
	adc	r7, r3, r1
	ldr	r3, [fp, #-48]
	stm	r3, {r6-r7}
	ldr	r3, [fp, #-48]
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	ldr	r2, .L406+24
	ldr	r1, .L406+16
	mov	r0, #119
	bl	sim_log_debug
	ldr	r0, [fp, #-48]
	bl	sim_queue_insert
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L407:
	.align	2
.L406:
	.word	TossimPacketModelC$sending
	.word	TossimPacketModelC$sendingLength
	.word	TossimPacketModelC$send_transmit_done
	.word	.LC52
	.word	.LC51
	.word	TossimPacketModelC$destNode
	.word	.LC53
	.size	TossimPacketModelC$send_transmit, .-TossimPacketModelC$send_transmit
	.section	.rodata
	.align	2
.LC54:
	.ascii	"setPendingTransmission: transmitting %i @ %s\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$Model$setPendingTransmission, %function
CpmModelC$Model$setPendingTransmission:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L409
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L409
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r4, r3
	bl	sim_time_string
	mov	r3, r0
	str	r3, [sp]
	mov	r3, r4
	ldr	r2, .L409+4
	ldr	r1, .L409+8
	mov	r0, #147
	bl	sim_log_debug
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L410:
	.align	2
.L409:
	.word	CpmModelC$transmitting
	.word	.LC54
	.word	.LC30
	.size	CpmModelC$Model$setPendingTransmission, .-CpmModelC$Model$setPendingTransmission
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$GainRadioModel$setPendingTransmission, %function
TossimPacketModelC$GainRadioModel$setPendingTransmission:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	CpmModelC$Model$setPendingTransmission
	nop
	pop	{fp, pc}
	.size	TossimPacketModelC$GainRadioModel$setPendingTransmission, .-TossimPacketModelC$GainRadioModel$setPendingTransmission
	.section	.rodata
	.align	2
.LC55:
	.ascii	"Checking clear channel @ %s: %f <= %f \012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$Model$clearChannel, %function
CpmModelC$Model$clearChannel:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #20
	bl	sim_time_string
	mov	r6, r0
	mov	r0, #0
	bl	CpmModelC$packetNoise
	mov	r4, r0
	mov	r5, r1
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L415
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	stm	sp, {r4-r5}
	mov	r3, r6
	ldr	r2, .L415+4
	ldr	r1, .L415+8
	mov	r0, #126
	bl	sim_log_debug
	mov	r0, #0
	bl	CpmModelC$packetNoise
	mov	r4, r0
	mov	r5, r1
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L415
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r1, #1
	mov	r6, r1
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	bne	.L413
	mov	r3, #0
	mov	r6, r3
.L413:
	and	r3, r6, #255
	mov	r0, r3
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L416:
	.align	2
.L415:
	.word	CpmModelC$clearThreshold
	.word	.LC55
	.word	.LC30
	.size	CpmModelC$Model$clearChannel, .-CpmModelC$Model$clearChannel
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$GainRadioModel$clearChannel, %function
TossimPacketModelC$GainRadioModel$clearChannel:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	CpmModelC$Model$clearChannel
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$GainRadioModel$clearChannel, .-TossimPacketModelC$GainRadioModel$clearChannel
	.global	__aeabi_i2d
	.global	__aeabi_ui2d
	.global	__aeabi_l2d
	.global	__aeabi_d2lz
	.section	.rodata
	.align	2
.LC56:
	.ascii	"PACKET: Failed to send packet due to busy channel.\012"
	.ascii	"\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$send_backoff, %function
TossimPacketModelC$send_backoff:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, r10, fp, lr}
	add	fp, sp, #32
	sub	sp, sp, #44
	str	r0, [fp, #-72]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427
	ldrb	r2, [r2, r3]	@ zero_extendqisi2
	add	r2, r2, #1
	and	r1, r2, #255
	ldr	r2, .L427
	strb	r1, [r2, r3]
	bl	TossimPacketModelC$GainRadioModel$clearChannel
	mov	r3, r0
	cmp	r3, #0
	beq	.L420
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427+4
	ldrb	r2, [r2, r3]	@ zero_extendqisi2
	sub	r2, r2, #1
	and	r1, r2, #255
	ldr	r2, .L427+4
	strb	r1, [r2, r3]
	b	.L421
.L420:
	bl	sim_csma_min_free_samples
	mov	r10, r0
	bl	sim_node
	mov	r3, r0
	and	r1, r10, #255
	ldr	r2, .L427+4
	strb	r1, [r2, r3]
.L421:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L422
	bl	sim_csma_rxtx_delay
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	bl	sim_ticks_per_sec
	mov	r4, r0
	mov	r5, r1
	bl	sim_csma_symbols_per_sec
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	mov	r0, r4
	mov	r1, r5
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-40]
	mul	r2, r0, r3
	ldr	r3, [fp, #-44]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-44]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-72]
	ldmia	r3, {r0-r1}
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	adds	r8, r0, r2
	adc	r9, r1, r3
	ldr	r3, [fp, #-72]
	stm	r3, {r8-r9}
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427+8
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	TossimPacketModelC$GainRadioModel$setPendingTransmission
	ldr	r3, [fp, #-72]
	ldr	r2, .L427+12
	str	r2, [r3, #20]
	ldr	r0, [fp, #-72]
	bl	sim_queue_insert
	b	.L426
.L422:
	bl	sim_csma_max_iterations
	mov	r3, r0
	cmp	r3, #0
	beq	.L424
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r8, r3
	bl	sim_csma_max_iterations
	mov	r3, r0
	cmp	r8, r3
	bgt	.L425
.L424:
	bl	sim_random
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	bl	sim_csma_high
	mov	r8, r0
	bl	sim_csma_low
	mov	r3, r0
	sub	r3, r8, r3
	mov	r2, r3
	asr	r3, r2, #31
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	bl	sim_csma_exponent_base
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r8, r0
	mov	r9, r1
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	pow
	mov	r8, r0
	mov	r9, r1
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_l2d
	mov	r2, r0
	mov	r3, r1
	mov	r0, r8
	mov	r1, r9
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-52]
	str	r3, [fp, #-48]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	bl	sim_csma_init_low
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adds	r6, r0, r2
	adc	r7, r1, r3
	str	r6, [fp, #-60]
	str	r7, [fp, #-56]
	bl	sim_ticks_per_sec
	mov	r6, r0
	mov	r7, r1
	bl	sim_csma_symbols_per_sec
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-56]
	mul	r2, r0, r3
	ldr	r3, [fp, #-60]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-60]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	str	r2, [fp, #-60]
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-72]
	ldmia	r3, {r0-r1}
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adds	r4, r0, r2
	adc	r5, r1, r3
	ldr	r3, [fp, #-72]
	stm	r3, {r4-r5}
	ldr	r0, [fp, #-72]
	bl	sim_queue_insert
	nop
	b	.L426
.L425:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427+16
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-64]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L427+16
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L427+20
	ldr	r1, .L427+24
	mov	r0, #117
	bl	sim_log_debug
	mov	r1, #5
	ldr	r0, [fp, #-64]
	bl	TossimPacketModelC$Packet$sendDone
.L426:
	nop
	sub	sp, fp, #32
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L428:
	.align	2
.L427:
	.word	TossimPacketModelC$backoffCount
	.word	TossimPacketModelC$neededFreeSamples
	.word	TossimPacketModelC$transmitting
	.word	TossimPacketModelC$send_transmit
	.word	TossimPacketModelC$sending
	.word	.LC56
	.word	.LC51
	.size	TossimPacketModelC$send_backoff, .-TossimPacketModelC$send_backoff
	.section	.rodata
	.align	2
.LC57:
	.ascii	"Starting CMSA with %lli.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$start_csma, %function
TossimPacketModelC$start_csma:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, fp, lr}
	add	fp, sp, #24
	sub	sp, sp, #28
	bl	sim_random
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	bl	sim_csma_init_high
	mov	r8, r0
	bl	sim_csma_init_low
	mov	r3, r0
	sub	r3, r8, r3
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	bl	sim_csma_init_low
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	adds	r6, r0, r2
	adc	r7, r1, r3
	str	r6, [fp, #-44]
	str	r7, [fp, #-40]
	bl	sim_ticks_per_sec
	mov	r6, r0
	mov	r7, r1
	bl	sim_csma_symbols_per_sec
	mov	r3, r0
	mov	r2, r3
	asr	r3, r2, #31
	mov	r0, r6
	mov	r1, r7
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-40]
	mul	r2, r0, r3
	ldr	r3, [fp, #-44]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-44]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	ldr	r2, .L430
	ldr	r1, .L430+4
	mov	r0, #116
	bl	sim_log_debug
	bl	sim_time
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	adds	r4, r2, r0
	adc	r5, r3, r1
	str	r4, [fp, #-36]
	str	r5, [fp, #-32]
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L430+8
	lsl	r3, r4, #5
	add	r3, r1, r3
	str	r2, [r3, #8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L430+8
	lsl	r3, r3, #5
	add	r1, r2, r3
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L430+8
	lsl	r3, r3, #5
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3, #12]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L430+8
	lsl	r3, r3, #5
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3, #13]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L430+8
	lsl	r3, r3, #5
	add	r3, r2, r3
	ldr	r2, .L430+12
	str	r2, [r3, #20]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L430+8
	lsl	r3, r3, #5
	add	r3, r2, r3
	ldr	r2, .L430+16
	str	r2, [r3, #24]
	bl	sim_node
	mov	r3, r0
	lsl	r3, r3, #5
	ldr	r2, .L430+8
	add	r3, r3, r2
	mov	r0, r3
	bl	sim_queue_insert
	nop
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, fp, pc}
.L431:
	.align	2
.L430:
	.word	.LC57
	.word	.LC51
	.word	TossimPacketModelC$sendEvent
	.word	TossimPacketModelC$send_backoff
	.word	sim_queue_cleanup_none
	.size	TossimPacketModelC$start_csma, .-TossimPacketModelC$start_csma
	.section	.rodata
	.align	2
.LC58:
	.ascii	"TossimPacketModelC: Send.send() called, but not ini"
	.ascii	"tialized!\012\000"
	.align	2
.LC59:
	.ascii	"TossimPacketModelC: Send.send() called, but not run"
	.ascii	"ning!\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Packet$send, %function
TossimPacketModelC$Packet$send:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, r2
	strb	r3, [fp, #-21]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L437
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L433
	ldr	r2, .L437+4
	ldr	r1, .L437+8
	mov	r0, #114
	bl	sim_log_error
	mov	r3, #4
	b	.L434
.L433:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L437+12
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L435
	ldr	r2, .L437+16
	ldr	r1, .L437+8
	mov	r0, #115
	bl	sim_log_error
	mov	r3, #4
	b	.L434
.L435:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L437+20
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L436
	mov	r3, #5
	b	.L434
.L436:
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L437+24
	ldrb	r3, [fp, #-21]
	strb	r3, [r1, r2]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L437+20
	ldr	r3, [fp, #-20]
	str	r3, [r1, r2, lsl #2]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L437+28
	ldr	r3, [fp, #-16]
	str	r3, [r1, r2, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L437+32
	mov	r1, #0
	strb	r1, [r2, r3]
	bl	sim_csma_min_free_samples
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	and	r1, r4, #255
	ldr	r2, .L437+36
	strb	r1, [r2, r3]
	bl	TossimPacketModelC$start_csma
	mov	r3, #0
.L434:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L438:
	.align	2
.L437:
	.word	TossimPacketModelC$initialized
	.word	.LC58
	.word	.LC51
	.word	TossimPacketModelC$running
	.word	.LC59
	.word	TossimPacketModelC$sending
	.word	TossimPacketModelC$sendingLength
	.word	TossimPacketModelC$destNode
	.word	TossimPacketModelC$backoffCount
	.word	TossimPacketModelC$neededFreeSamples
	.size	TossimPacketModelC$Packet$send, .-TossimPacketModelC$Packet$send
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Model$send, %function
TossimActiveMessageC$Model$send:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	mov	r3, r2
	strb	r3, [fp, #-21]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r1, [fp, #-20]
	ldr	r0, [fp, #-16]
	bl	TossimPacketModelC$Packet$send
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$Model$send, .-TossimActiveMessageC$Model$send
	.global	__aeabi_d2f
	.global	__aeabi_f2d
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$timeInMs, %function
CpmModelC$timeInMs:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	bl	sim_time
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	adr	r1, .L447
	ldmia	r1, {r0-r1}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L442
	bl	sim_ticks_per_sec
	adr	r3, .L447
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	b	.L443
.L442:
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	adr	r1, .L447
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-24]
	mul	r2, r0, r3
	ldr	r3, [fp, #-28]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-28]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
.L443:
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	ldr	r2, .L447+8
	mov	r3, #0
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r3, r2
	str	r3, [fp, #-44]
	ldr	r1, [fp, #-44]
	ldr	r3, .L447+12
	smull	r2, r3, r1, r3
	asr	r2, r3, #2
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	sub	r2, r1, r3
	cmp	r2, #4
	ble	.L444
	ldr	r1, [fp, #-44]
	ldr	r3, .L447+12
	smull	r2, r3, r1, r3
	asr	r2, r3, #2
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	sub	r2, r1, r3
	rsb	r3, r2, #10
	ldr	r2, [fp, #-44]
	add	r3, r2, r3
	str	r3, [fp, #-44]
	b	.L445
.L444:
	ldr	r1, [fp, #-44]
	ldr	r3, .L447+12
	smull	r2, r3, r1, r3
	asr	r2, r3, #2
	asr	r3, r1, #31
	sub	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #1
	sub	r2, r1, r3
	ldr	r3, [fp, #-44]
	sub	r3, r3, r2
	str	r3, [fp, #-44]
.L445:
	ldr	r0, [fp, #-44]
	bl	__aeabi_i2d
	mov	r2, #0
	ldr	r3, .L447+16
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2f
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r3, r2
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-40]
	ldr	r2, .L447+20
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r3, r2, r3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-36]
	ldr	r2, .L447+20
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r3, r2, r3
	str	r3, [fp, #-32]
	ldr	r2, [fp, #-40]
	ldr	r3, .L447+20
	smull	r1, r3, r2, r3
	add	r3, r3, r2
	asr	r1, r3, #5
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #4
	sub	r3, r3, r1
	lsl	r3, r3, #2
	sub	r3, r2, r3
	str	r3, [fp, #-40]
	ldr	r2, [fp, #-36]
	ldr	r3, .L447+20
	smull	r1, r3, r2, r3
	add	r3, r3, r2
	asr	r1, r3, #5
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #4
	sub	r3, r3, r1
	lsl	r3, r3, #2
	sub	r3, r2, r3
	str	r3, [fp, #-36]
	ldr	r2, [fp, #-32]
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r2, r3, #4
	sub	r2, r2, r3
	lsl	r3, r2, #4
	mov	r2, r3
	mov	r1, r2
	ldr	r2, [fp, #-36]
	mov	r3, r2
	lsl	r3, r3, #4
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r2, r1, r3
	ldr	r3, [fp, #-40]
	add	r2, r2, r3
	mov	r3, r2
	lsl	r3, r3, #5
	sub	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	mov	r0, r3
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L448:
	.align	3
.L447:
	.word	1000000000
	.word	0
	.word	10000
	.word	1717986919
	.word	1079574528
	.word	-2004318071
	.size	CpmModelC$timeInMs, .-CpmModelC$timeInMs
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$nextPacket, %function
AMQueueImplP$0$nextPacket:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	sim_node
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L456
	mov	r1, #0
	strb	r1, [r2, r3]
	mov	r3, #0
	strb	r3, [fp, #-13]
	b	.L450
.L453:
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L456
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	ldr	r2, .L456+4
	add	r3, r4, r3
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L451
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L456
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	lsr	r3, r3, #3
	and	r3, r3, #255
	mov	r2, r3
	ldr	r3, .L456+8
	add	r3, r3, r4
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r4, r3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L456
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	and	r3, r3, #7
	asr	r3, r4, r3
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L452
.L451:
	bl	sim_node
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L456
	mov	r1, #0
	strb	r1, [r2, r3]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-13]
.L450:
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L453
.L452:
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L455
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L456
	mov	r1, #1
	strb	r1, [r2, r3]
.L455:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L457:
	.align	2
.L456:
	.word	AMQueueImplP$0$current
	.word	AMQueueImplP$0$queue
	.word	AMQueueImplP$0$cancelMask
	.size	AMQueueImplP$0$nextPacket, .-AMQueueImplP$0$nextPacket
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Packet$payloadLength, %function
TossimActiveMessageC$Packet$payloadLength:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	TossimActiveMessageC$getHeader
	mov	r3, r0
	add	r3, r3, #4
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$Packet$payloadLength, .-TossimActiveMessageC$Packet$payloadLength
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$Packet$payloadLength, %function
AMQueueImplP$0$Packet$payloadLength:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$Packet$payloadLength
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueImplP$0$Packet$payloadLength, .-AMQueueImplP$0$Packet$payloadLength
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$errorTask$postTask, %function
AMQueueImplP$0$errorTask$postTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r0, #4
	bl	SimSchedulerBasicP$TaskBasic$postTask
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueImplP$0$errorTask$postTask, .-AMQueueImplP$0$errorTask$postTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$PacketAcknowledgements$wasAcked, %function
TossimPacketModelC$PacketAcknowledgements$wasAcked:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimPacketModelC$getMetadata
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$PacketAcknowledgements$wasAcked, .-TossimPacketModelC$PacketAcknowledgements$wasAcked
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$ack$wasAcked, %function
sendAckC$ack$wasAcked:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimPacketModelC$PacketAcknowledgements$wasAcked
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sendAckC$ack$wasAcked, .-sendAckC$ack$wasAcked
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$Timer$stop, %function
VirtualizeTimerC$0$Timer$stop:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	sim_node
	mov	r1, r0
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r0, .L469
	mov	r2, r3
	lsl	r2, r2, #1
	add	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #3
	add	r3, r2, r3
	add	r3, r0, r3
	add	r2, r3, #8
	ldrb	r3, [r2]
	bic	r3, r3, #2
	strb	r3, [r2]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L470:
	.align	2
.L469:
	.word	VirtualizeTimerC$0$m_timers
	.size	VirtualizeTimerC$0$Timer$stop, .-VirtualizeTimerC$0$Timer$stop
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$MilliTimer$stop, %function
sendAckC$MilliTimer$stop:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #0
	bl	VirtualizeTimerC$0$Timer$stop
	nop
	pop	{fp, pc}
	.size	sendAckC$MilliTimer$stop, .-sendAckC$MilliTimer$stop
	.section	.rodata
	.align	2
.LC60:
	.ascii	"SNR is %lf, PRR is %lf\012\000"
	.align	2
.LC61:
	.ascii	"CpmModelC,SNR\000"
	.global	__aeabi_dcmpgt
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$prr_estimate_from_snr, %function
CpmModelC$prr_estimate_from_snr:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #64
	str	r0, [fp, #-52]
	str	r1, [fp, #-48]
	ldr	r2, .L481
	ldr	r3, .L481+4
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r2, .L481+8
	ldr	r3, .L481+12
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L481+16
	ldr	r3, .L481+20
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	erfc
	mov	r2, #0
	ldr	r3, .L481+24
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, #0
	ldr	r1, .L481+28
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L481+32
	bl	pow
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	ldr	r2, .L481+36
	ldr	r1, .L481+40
	mov	r0, #127
	bl	sim_log_debug
	mov	r2, #0
	ldr	r3, .L481+28
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L480
	ldr	r2, .L481+44
	ldr	r3, .L481+48
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	b	.L475
.L480:
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L475
	ldr	r2, .L481+44
	ldr	r3, .L481+52
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
.L475:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L482:
	.align	2
.L481:
	.word	-1422493168
	.word	1072650046
	.word	1326285901
	.word	1073943727
	.word	1719614413
	.word	1073127582
	.word	1071644672
	.word	1072693248
	.word	1078394880
	.word	.LC60
	.word	.LC61
	.word	-1717986918
	.word	1072798105
	.word	-1078355559
	.size	CpmModelC$prr_estimate_from_snr, .-CpmModelC$prr_estimate_from_snr
	.section	.rodata
	.align	2
.LC62:
	.ascii	"Received packet addressed to me so ack it\012\000"
	.align	2
.LC63:
	.ascii	"Acks\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Model$shouldAck, %function
TossimActiveMessageC$Model$shouldAck:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	ldr	r0, [fp, #-24]
	bl	TossimActiveMessageC$getHeader
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	__nesc_ntoh_uint16
	mov	r3, r0
	mov	r4, r3
	bl	TossimActiveMessageC$amAddress
	mov	r3, r0
	cmp	r4, r3
	bne	.L484
	ldr	r2, .L486
	ldr	r1, .L486+4
	mov	r0, #107
	bl	sim_log_debug
	mov	r3, #1
	b	.L485
.L484:
	mov	r3, #0
.L485:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L487:
	.align	2
.L486:
	.word	.LC62
	.word	.LC63
	.size	TossimActiveMessageC$Model$shouldAck, .-TossimActiveMessageC$Model$shouldAck
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Packet$shouldAck, %function
TossimPacketModelC$Packet$shouldAck:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$Model$shouldAck
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$Packet$shouldAck, .-TossimPacketModelC$Packet$shouldAck
	.section	.rodata
	.align	2
.LC64:
	.ascii	"Requested ack for 0x%x, but outgoing packet is 0x%x"
	.ascii	".\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$GainRadioModel$acked, %function
TossimPacketModelC$GainRadioModel$acked:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L493
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L492
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L493+4
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimPacketModelC$getMetadata
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mov	r1, #1
	mov	r0, r3
	bl	__nesc_hton_uint8
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L493+4
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	beq	.L492
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L493+8
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L493+4
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, .L493+12
	ldr	r1, .L493+16
	mov	r0, #121
	bl	sim_log_debug
.L492:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L494:
	.align	2
.L493:
	.word	TossimPacketModelC$running
	.word	TossimPacketModelC$sending
	.word	TossimPacketModelC$error
	.word	.LC64
	.word	.LC51
	.size	TossimPacketModelC$GainRadioModel$acked, .-TossimPacketModelC$GainRadioModel$acked
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$Model$acked, %function
CpmModelC$Model$acked:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	TossimPacketModelC$GainRadioModel$acked
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	CpmModelC$Model$acked, .-CpmModelC$Model$acked
	.section	.rodata
	.align	2
.LC65:
	.ascii	"SNR is %lf, ARR is %lf\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$arr_estimate_from_snr, %function
CpmModelC$arr_estimate_from_snr:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #64
	str	r0, [fp, #-52]
	str	r1, [fp, #-48]
	ldr	r2, .L505
	ldr	r3, .L505+4
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	ldr	r2, .L505+8
	ldr	r3, .L505+12
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L505+16
	ldr	r3, .L505+20
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	erfc
	mov	r2, #0
	ldr	r3, .L505+24
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, #0
	ldr	r1, .L505+28
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	ldr	r3, .L505+32
	bl	pow
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	ldr	r2, .L505+36
	ldr	r1, .L505+40
	mov	r0, #124
	bl	sim_log_debug
	mov	r2, #0
	ldr	r3, .L505+28
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L504
	ldr	r2, .L505+44
	ldr	r3, .L505+48
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	b	.L499
.L504:
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L499
	ldr	r2, .L505+44
	ldr	r3, .L505+52
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
.L499:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L506:
	.align	2
.L505:
	.word	-1422493168
	.word	1072650046
	.word	1326285901
	.word	1073943727
	.word	1719614413
	.word	1073127582
	.word	1071644672
	.word	1072693248
	.word	1078394880
	.word	.LC65
	.word	.LC33
	.word	-1717986918
	.word	1072798105
	.word	-1078355559
	.size	CpmModelC$arr_estimate_from_snr, .-CpmModelC$arr_estimate_from_snr
	.global	__aeabi_dcmpge
	.global	__aeabi_dcmple
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$shouldAckReceive, %function
CpmModelC$shouldAckReceive:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	CpmModelC$arr_estimate_from_snr
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	bl	RandomUniform
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L508
	mov	r2, #0
	ldr	r3, .L518
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L508
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L517
	mov	r2, #0
	ldr	r3, .L518
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	b	.L508
.L517:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
.L508:
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2iz
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L519:
	.align	2
.L518:
	.word	1072693248
	.size	CpmModelC$shouldAckReceive, .-CpmModelC$shouldAckReceive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$sim_gain_ack_handle, %function
CpmModelC$sim_gain_ack_handle:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-40]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L522
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L521
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L522+4
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L521
	bl	sim_node
	mov	r3, r0
	mov	r0, r3
	bl	sim_mote_is_on
	mov	r3, r0
	cmp	r3, #0
	beq	.L521
	ldr	r3, [fp, #-40]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-32]
	add	r3, r3, #32
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldr	r0, [fp, #-32]
	bl	CpmModelC$packetNoise
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	CpmModelC$shouldAckReceive
	mov	r3, r0
	cmp	r3, #0
	beq	.L521
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L522+4
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	CpmModelC$Model$acked
.L521:
	ldr	r3, [fp, #-40]
	ldr	r3, [r3, #16]
	mov	r0, r3
	bl	CpmModelC$free_receive_message
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L523:
	.align	2
.L522:
	.word	CpmModelC$requestAck
	.word	CpmModelC$outgoing
	.size	CpmModelC$sim_gain_ack_handle, .-CpmModelC$sim_gain_ack_handle
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Compare$set, %function
Atm128AlarmAsyncP$0$Compare$set:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	HplAtm128Timer0AsyncP$Compare$set
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Compare$set, .-Atm128AlarmAsyncP$0$Compare$set
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Timer$get, %function
Atm128AlarmAsyncP$0$Timer$get:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	HplAtm128Timer0AsyncP$Timer0$get
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Timer$get, .-Atm128AlarmAsyncP$0$Timer$get
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$TimerAsync$compareBusy, %function
HplAtm128Timer0AsyncP$TimerAsync$compareBusy:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #48
	ldr	r2, .L529
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	and	r3, r3, #2
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
.L530:
	.align	2
.L529:
	.word	atm128RegFile
	.size	HplAtm128Timer0AsyncP$TimerAsync$compareBusy, .-HplAtm128Timer0AsyncP$TimerAsync$compareBusy
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$TimerAsync$compareBusy, %function
Atm128AlarmAsyncP$0$TimerAsync$compareBusy:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	HplAtm128Timer0AsyncP$TimerAsync$compareBusy
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$TimerAsync$compareBusy, .-Atm128AlarmAsyncP$0$TimerAsync$compareBusy
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$setOcr0, %function
Atm128AlarmAsyncP$0$setOcr0:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	mov	r3, r0
	strb	r3, [fp, #-13]
	nop
.L534:
	bl	Atm128AlarmAsyncP$0$TimerAsync$compareBusy
	mov	r3, r0
	cmp	r3, #0
	bne	.L534
	bl	Atm128AlarmAsyncP$0$Timer$get
	mov	r3, r0
	mov	r2, r3
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	cmp	r3, r2
	bne	.L535
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	add	r3, r3, #1
	strb	r3, [fp, #-13]
.L535:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L537
	ldr	r2, [r2, r3, lsl #2]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	add	r3, r2, r3
	add	r4, r3, #1
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L537
	ldr	r3, [r2, r3, lsl #2]
	cmp	r4, r3
	bcs	.L536
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L537
	ldr	r3, [r2, r3, lsl #2]
	and	r3, r3, #255
	mvn	r3, r3
	strb	r3, [fp, #-13]
.L536:
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	mov	r0, r3
	bl	Atm128AlarmAsyncP$0$Compare$set
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L538:
	.align	2
.L537:
	.word	Atm128AlarmAsyncP$0$base
	.size	Atm128AlarmAsyncP$0$setOcr0, .-Atm128AlarmAsyncP$0$setOcr0
	.section	.rodata
	.align	2
.LC66:
	.ascii	"Cancelling compare at 0x%p\012\000"
	.align	2
.LC67:
	.ascii	"HplAtm128CompareC\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$cancel_compare, %function
HplAtm128Timer0AsyncP$cancel_compare:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L542
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L542+4
	ldr	r1, .L542+8
	mov	r0, #202
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L542
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L541
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L542
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #1
	strb	r2, [r3, #13]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L542
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L542+12
	str	r2, [r3, #24]
.L541:
	nop
	pop	{fp, pc}
.L543:
	.align	2
.L542:
	.word	HplAtm128Timer0AsyncP$compare
	.word	.LC66
	.word	.LC67
	.word	sim_queue_cleanup_total
	.size	HplAtm128Timer0AsyncP$cancel_compare, .-HplAtm128Timer0AsyncP$cancel_compare
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$notify_changed, %function
HplAtm128Timer0AsyncP$notify_changed:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	HplAtm128Timer0AsyncP$Timer0$getScale
	mov	r3, r0
	strb	r3, [fp, #-13]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L545
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L546
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L545
	bl	sim_node
	mov	r4, r0
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L546+4
	lsl	r1, r4, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
.L545:
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L546
	ldrb	r3, [fp, #-13]
	strb	r3, [r1, r2]
	bl	HplAtm128Timer0AsyncP$schedule_new_compare
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L547:
	.align	2
.L546:
	.word	HplAtm128Timer0AsyncP$oldScale
	.word	HplAtm128Timer0AsyncP$lastZero
	.size	HplAtm128Timer0AsyncP$notify_changed, .-HplAtm128Timer0AsyncP$notify_changed
	.section	.rodata
	.align	2
.LC68:
	.ascii	"Cancelling overflow %p.\012\000"
	.align	2
.LC69:
	.ascii	"HplAtm128Timer0AsyncP\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$cancel_overflow, %function
HplAtm128Timer0AsyncP$cancel_overflow:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L551
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L550
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L551
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #1
	strb	r2, [r3, #13]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L551
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L551+4
	ldr	r1, .L551+8
	mov	r0, #201
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L551
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L551+12
	str	r2, [r3, #24]
.L550:
	nop
	pop	{fp, pc}
.L552:
	.align	2
.L551:
	.word	HplAtm128Timer0AsyncP$overflow
	.word	.LC68
	.word	.LC69
	.word	sim_queue_cleanup_total
	.size	HplAtm128Timer0AsyncP$cancel_overflow, .-HplAtm128Timer0AsyncP$cancel_overflow
	.section	.rodata
	.align	2
.LC70:
	.ascii	"Overflow interrupt at %s\012\000"
	.align	2
.LC71:
	.ascii	"Setting overflow bit at %s\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$timer0_overflow_handle, %function
HplAtm128Timer0AsyncP$timer0_overflow_handle:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrb	r3, [r3, #13]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L558
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L559
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #55
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #1
	cmp	r3, #0
	beq	.L556
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L559
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #1
	and	r0, r3, #255
	ldr	r1, .L559
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	mov	r2, r0
	strb	r2, [r3]
	bl	sim_time_string
	mov	r3, r0
	ldr	r2, .L559+4
	ldr	r1, .L559+8
	mov	r0, #198
	bl	sim_log_debug
	bl	INTERRUPT_16
	b	.L557
.L556:
	bl	sim_time_string
	mov	r3, r0
	ldr	r2, .L559+12
	ldr	r1, .L559+8
	mov	r0, #199
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L559
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #1
	and	r0, r3, #255
	ldr	r1, .L559
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	mov	r2, r0
	strb	r2, [r3]
.L557:
	ldr	r0, [fp, #-8]
	bl	HplAtm128Timer0AsyncP$configure_overflow
	ldr	r0, [fp, #-8]
	bl	sim_queue_insert
	b	.L553
.L558:
	nop
.L553:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L560:
	.align	2
.L559:
	.word	atm128RegFile
	.word	.LC70
	.word	.LC69
	.word	.LC71
	.size	HplAtm128Timer0AsyncP$timer0_overflow_handle, .-HplAtm128Timer0AsyncP$timer0_overflow_handle
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$allocate_overflow, %function
HplAtm128Timer0AsyncP$allocate_overflow:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	sim_queue_allocate_event
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L563
	str	r2, [r3, #20]
	ldr	r3, [fp, #-8]
	ldr	r2, .L563+4
	str	r2, [r3, #24]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L564:
	.align	2
.L563:
	.word	HplAtm128Timer0AsyncP$timer0_overflow_handle
	.word	sim_queue_cleanup_none
	.size	HplAtm128Timer0AsyncP$allocate_overflow, .-HplAtm128Timer0AsyncP$allocate_overflow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$schedule_new_overflow, %function
HplAtm128Timer0AsyncP$schedule_new_overflow:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	HplAtm128Timer0AsyncP$allocate_overflow
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	HplAtm128Timer0AsyncP$configure_overflow
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L567
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L566
	bl	HplAtm128Timer0AsyncP$cancel_overflow
.L566:
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L567
	ldr	r3, [fp, #-8]
	str	r3, [r1, r2, lsl #2]
	ldr	r0, [fp, #-8]
	bl	sim_queue_insert
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L568:
	.align	2
.L567:
	.word	HplAtm128Timer0AsyncP$overflow
	.size	HplAtm128Timer0AsyncP$schedule_new_overflow, .-HplAtm128Timer0AsyncP$schedule_new_overflow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$clock_to_sim, %function
HplAtm128Timer0AsyncP$clock_to_sim:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	bl	sim_ticks_per_sec
	ldr	r3, [fp, #-8]
	mul	r2, r0, r3
	ldr	r3, [fp, #-12]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-12]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	bl	HplAtm128Timer0AsyncP$notify_clockTicksPerSec
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	HplAtm128Timer0AsyncP$clock_to_sim, .-HplAtm128Timer0AsyncP$clock_to_sim
	.section	.rodata
	.align	2
.LC72:
	.ascii	"HplAtm128Timer0AsyncP: Setting timer: %hhu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Timer0$set, %function
HplAtm128Timer0AsyncP$Timer0$set:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #24
	mov	r3, r0
	strb	r3, [fp, #-45]
	bl	HplAtm128Timer0AsyncP$Timer0$get
	mov	r3, r0
	strb	r3, [fp, #-37]
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	ldr	r2, .L577
	ldr	r1, .L577+4
	mov	r0, #191
	bl	sim_log_debug
	ldrb	r2, [fp, #-45]	@ zero_extendqisi2
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L576
	ldrb	r2, [fp, #-37]	@ zero_extendqisi2
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	sub	r3, r2, r3
	mov	r2, r3
	asr	r3, r2, #31
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	bl	HplAtm128Timer0AsyncP$shiftFromScale
	mov	r3, r0
	mov	r1, r3
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	str	r4, [fp, #-36]
	str	r5, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	HplAtm128Timer0AsyncP$clock_to_sim
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	ldrb	r2, [fp, #-45]	@ zero_extendqisi2
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	cmp	r2, r3
	bcs	.L574
	bl	sim_node
	mov	ip, r0
	ldr	r2, .L577+8
	lsl	r3, ip, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	r8, r0, r2
	adc	r9, r1, r3
	ldr	r2, .L577+8
	lsl	r3, ip, #3
	add	r3, r2, r3
	stm	r3, {r8-r9}
	b	.L575
.L574:
	bl	sim_node
	mov	ip, r0
	ldr	r2, .L577+8
	lsl	r3, ip, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	r6, r0, r2
	sbc	r7, r1, r3
	ldr	r2, .L577+8
	lsl	r3, ip, #3
	add	r3, r2, r3
	stm	r3, {r6-r7}
.L575:
	bl	HplAtm128Timer0AsyncP$schedule_new_overflow
	bl	HplAtm128Timer0AsyncP$notify_changed
	b	.L571
.L576:
	nop
.L571:
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L578:
	.align	2
.L577:
	.word	.LC72
	.word	.LC69
	.word	HplAtm128Timer0AsyncP$lastZero
	.size	HplAtm128Timer0AsyncP$Timer0$set, .-HplAtm128Timer0AsyncP$Timer0$set
	.section	.rodata
	.align	2
.LC73:
	.ascii	"Beginning compare 0x%p at %s\012\000"
	.align	2
.LC74:
	.ascii	"Handling compare at 0x%p @ %s\012\000"
	.align	2
.LC75:
	.ascii	"%s: CTC is set, clear timer.\012\000"
	.align	2
.LC76:
	.ascii	"%s: TCCR is 0x%hhx, %i, %i\012\000"
	.align	2
.LC77:
	.ascii	"TIFR is %hhx\012\000"
	.align	2
.LC78:
	.ascii	"Compare interrupt @ %s\012\000"
	.align	2
.LC79:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$timer0_compare_handle, %function
HplAtm128Timer0AsyncP$timer0_compare_handle:
	@ args = 0, pretend = 0, frame = 144
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #160
	str	r0, [fp, #-152]
	ldr	r3, .L589
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	bl	sim_time_string
	mov	r3, r0
	str	r3, [sp]
	ldr	r3, [fp, #-152]
	ldr	r2, .L589+4
	ldr	r1, .L589+8
	mov	r0, #181
	bl	sim_log_debug
	ldr	r3, [fp, #-152]
	ldrb	r3, [r3, #13]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L588
	sub	r3, fp, #144
	mov	r1, #128
	mov	r0, r3
	bl	sim_print_now
	bl	sim_time_string
	mov	r3, r0
	str	r3, [sp]
	ldr	r3, [fp, #-152]
	ldr	r2, .L589+12
	ldr	r1, .L589+8
	mov	r0, #182
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #51
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #8
	cmp	r3, #0
	beq	.L582
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #51
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #64
	cmp	r3, #0
	bne	.L582
	ldr	r3, .L589+20
	ldr	r2, .L589+24
	ldr	r1, .L589+8
	mov	r0, #183
	bl	sim_log_debug
	mov	r0, #0
	bl	HplAtm128Timer0AsyncP$Timer0$set
	b	.L583
.L582:
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #51
	ldr	r2, .L589+16
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	mov	r4, r3
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #51
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #8
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	mov	r5, r3
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #51
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #64
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	str	r3, [sp, #8]
	str	r5, [sp, #4]
	str	r4, [sp]
	ldr	r3, .L589+20
	ldr	r2, .L589+28
	ldr	r1, .L589+8
	mov	r0, #184
	bl	sim_log_debug
.L583:
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #55
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r3, r3, #2
	cmp	r3, #0
	beq	.L584
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #54
	ldr	r2, .L589+16
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	ldr	r2, .L589+32
	ldr	r1, .L589+8
	mov	r0, #185
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #2
	and	r0, r3, #255
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	mov	r2, r0
	strb	r2, [r3]
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #54
	ldr	r2, .L589+16
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	ldr	r2, .L589+32
	ldr	r1, .L589+8
	mov	r0, #186
	bl	sim_log_debug
	sub	r3, fp, #144
	ldr	r2, .L589+36
	ldr	r1, .L589+8
	mov	r0, #187
	bl	sim_log_debug
	bl	INTERRUPT_15
	b	.L585
.L584:
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r0, r3, #255
	ldr	r1, .L589+16
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	mov	r2, r0
	strb	r2, [r3]
.L585:
	ldr	r3, [fp, #-152]
	ldrb	r3, [r3, #13]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L579
	ldr	r0, [fp, #-152]
	bl	HplAtm128Timer0AsyncP$configure_compare
	ldr	r0, [fp, #-152]
	bl	sim_queue_insert
	b	.L579
.L588:
	nop
.L579:
	ldr	r3, .L589
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L587
	bl	__stack_chk_fail
.L587:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L590:
	.align	2
.L589:
	.word	.LC79
	.word	.LC73
	.word	.LC69
	.word	.LC74
	.word	atm128RegFile
	.word	__FUNCTION__.8482
	.word	.LC75
	.word	.LC76
	.word	.LC77
	.word	.LC78
	.size	HplAtm128Timer0AsyncP$timer0_compare_handle, .-HplAtm128Timer0AsyncP$timer0_compare_handle
	.section	.rodata
	.align	2
.LC80:
	.ascii	"Allocated compare at 0x%p\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$allocate_compare, %function
HplAtm128Timer0AsyncP$allocate_compare:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	sim_queue_allocate_event
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L593
	ldr	r1, .L593+4
	mov	r0, #188
	bl	sim_log_debug
	ldr	r3, [fp, #-8]
	ldr	r2, .L593+8
	str	r2, [r3, #20]
	ldr	r3, [fp, #-8]
	ldr	r2, .L593+12
	str	r2, [r3, #24]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L594:
	.align	2
.L593:
	.word	.LC80
	.word	.LC69
	.word	HplAtm128Timer0AsyncP$timer0_compare_handle
	.word	sim_queue_cleanup_none
	.size	HplAtm128Timer0AsyncP$allocate_compare, .-HplAtm128Timer0AsyncP$allocate_compare
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Timer$overflow, %function
Atm128AlarmAsyncP$0$Timer$overflow:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	Atm128AlarmAsyncP$0$Timer$overflow, .-Atm128AlarmAsyncP$0$Timer$overflow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Timer0$overflow, %function
HplAtm128Timer0AsyncP$Timer0$overflow:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	Atm128AlarmAsyncP$0$Timer$overflow
	nop
	pop	{fp, pc}
	.size	HplAtm128Timer0AsyncP$Timer0$overflow, .-HplAtm128Timer0AsyncP$Timer0$overflow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CounterToLocalTimeC$0$Counter$overflow, %function
CounterToLocalTimeC$0$Counter$overflow:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	CounterToLocalTimeC$0$Counter$overflow, .-CounterToLocalTimeC$0$Counter$overflow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Counter$overflow, %function
Atm128AlarmAsyncP$0$Counter$overflow:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	CounterToLocalTimeC$0$Counter$overflow
	nop
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Counter$overflow, .-Atm128AlarmAsyncP$0$Counter$overflow
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_enable_interrupt, %function
__nesc_enable_interrupt:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #63
	ldr	r2, .L600
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r1, r3, #255
	mov	r0, r1
	ldr	r2, .L600
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r2, r3
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r0, r1
	mvn	r3, r3, lsl #25
	mvn	r3, r3, lsr #25
	and	r1, r3, #255
	ldr	r2, .L600
	mov	r3, r4
	lsl	r3, r3, #2
	add	r3, r3, r4
	lsl	r3, r3, #5
	add	r3, r2, r3
	add	r3, r3, r0
	mov	r2, r1
	strb	r2, [r3]
	nop
	pop	{r4, r5, fp, pc}
.L601:
	.align	2
.L600:
	.word	atm128RegFile
	.size	__nesc_enable_interrupt, .-__nesc_enable_interrupt
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Compare$get, %function
Atm128AlarmAsyncP$0$Compare$get:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	HplAtm128Timer0AsyncP$Compare$get
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Compare$get, .-Atm128AlarmAsyncP$0$Compare$get
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Compare$fired, %function
Atm128AlarmAsyncP$0$Compare$fired:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	Atm128AlarmAsyncP$0$Compare$get
	mov	r3, r0
	add	r4, r3, #1
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L607
	ldr	r2, [r2, r3, lsl #2]
	add	r2, r4, r2
	ldr	r1, .L607
	str	r2, [r1, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L607
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	str	r3, [fp, #-16]
	bl	__nesc_enable_interrupt
	bl	Atm128AlarmAsyncP$0$setInterrupt
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	beq	.L606
	bl	Atm128AlarmAsyncP$0$Counter$overflow
.L606:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L608:
	.align	2
.L607:
	.word	Atm128AlarmAsyncP$0$base
	.size	Atm128AlarmAsyncP$0$Compare$fired, .-Atm128AlarmAsyncP$0$Compare$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Compare$fired, %function
HplAtm128Timer0AsyncP$Compare$fired:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	Atm128AlarmAsyncP$0$Compare$fired
	nop
	pop	{fp, pc}
	.size	HplAtm128Timer0AsyncP$Compare$fired, .-HplAtm128Timer0AsyncP$Compare$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$fired$postTask, %function
AlarmToTimerC$0$fired$postTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r0, #5
	bl	SimSchedulerBasicP$TaskBasic$postTask
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AlarmToTimerC$0$fired$postTask, .-AlarmToTimerC$0$fired$postTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AlarmToTimerC$0$Alarm$fired, %function
AlarmToTimerC$0$Alarm$fired:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	AlarmToTimerC$0$fired$postTask
	nop
	pop	{fp, pc}
	.size	AlarmToTimerC$0$Alarm$fired, .-AlarmToTimerC$0$Alarm$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Alarm$fired, %function
Atm128AlarmAsyncP$0$Alarm$fired:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	AlarmToTimerC$0$Alarm$fired
	nop
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Alarm$fired, .-Atm128AlarmAsyncP$0$Alarm$fired
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$startDoneTask$postTask, %function
TossimPacketModelC$startDoneTask$postTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r0, #0
	bl	SimSchedulerBasicP$TaskBasic$postTask
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimPacketModelC$startDoneTask$postTask, .-TossimPacketModelC$startDoneTask$postTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	MotePlatformP$SubInit$default$init, %function
MotePlatformP$SubInit$default$init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	MotePlatformP$SubInit$default$init, .-MotePlatformP$SubInit$default$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	MotePlatformP$SubInit$init, %function
MotePlatformP$SubInit$init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	MotePlatformP$SubInit$default$init
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	MotePlatformP$SubInit$init, .-MotePlatformP$SubInit$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128GeneralIOPinP$4$IO$clr, %function
HplAtm128GeneralIOPinP$4$IO$clr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L621
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #27
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #16
	and	r0, r3, #255
	ldr	r1, .L621
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #27
	mov	r2, r0
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L622:
	.align	2
.L621:
	.word	atm128RegFile
	.size	HplAtm128GeneralIOPinP$4$IO$clr, .-HplAtm128GeneralIOPinP$4$IO$clr
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	MotePlatformP$SerialIdPin$clr, %function
MotePlatformP$SerialIdPin$clr:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	HplAtm128GeneralIOPinP$4$IO$clr
	nop
	pop	{fp, pc}
	.size	MotePlatformP$SerialIdPin$clr, .-MotePlatformP$SerialIdPin$clr
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128GeneralIOPinP$4$IO$makeInput, %function
HplAtm128GeneralIOPinP$4$IO$makeInput:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L625
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #26
	ldrb	r3, [r3]	@ zero_extendqisi2
	bic	r3, r3, #16
	and	r0, r3, #255
	ldr	r1, .L625
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #26
	mov	r2, r0
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L626:
	.align	2
.L625:
	.word	atm128RegFile
	.size	HplAtm128GeneralIOPinP$4$IO$makeInput, .-HplAtm128GeneralIOPinP$4$IO$makeInput
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	MotePlatformP$SerialIdPin$makeInput, %function
MotePlatformP$SerialIdPin$makeInput:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	HplAtm128GeneralIOPinP$4$IO$makeInput
	nop
	pop	{fp, pc}
	.size	MotePlatformP$SerialIdPin$makeInput, .-MotePlatformP$SerialIdPin$makeInput
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	MotePlatformP$PlatformInit$init, %function
MotePlatformP$PlatformInit$init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #21
	ldr	r2, .L630
	add	r3, r3, r2
	mov	r2, #0
	strb	r2, [r3]
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #20
	ldr	r2, .L630
	add	r3, r3, r2
	mvn	r2, #0
	strb	r2, [r3]
	bl	MotePlatformP$SerialIdPin$makeInput
	bl	MotePlatformP$SerialIdPin$clr
	bl	MotePlatformP$SubInit$init
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
.L631:
	.align	2
.L630:
	.word	atm128RegFile
	.size	MotePlatformP$PlatformInit$init, .-MotePlatformP$PlatformInit$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	PlatformP$MoteInit$init, %function
PlatformP$MoteInit$init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	MotePlatformP$PlatformInit$init
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	PlatformP$MoteInit$init, .-PlatformP$MoteInit$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ecombine, %function
ecombine:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	mov	r3, r0
	mov	r2, r1
	strb	r3, [fp, #-5]
	mov	r3, r2
	strb	r3, [fp, #-6]
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	cmp	r2, r3
	bne	.L635
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	b	.L636
.L635:
	mov	r3, #1
.L636:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	ecombine, .-ecombine
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	MeasureClockC$Init$init, %function
MeasureClockC$Init$init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	mov	r3, #0
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	MeasureClockC$Init$init, .-MeasureClockC$Init$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	PlatformP$MeasureClock$init, %function
PlatformP$MeasureClock$init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	MeasureClockC$Init$init
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	PlatformP$MeasureClock$init, .-PlatformP$MeasureClock$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	PlatformP$Init$init, %function
PlatformP$Init$init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	PlatformP$MeasureClock$init
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	PlatformP$MoteInit$init
	mov	r3, r0
	mov	r2, r3
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	ecombine
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	PlatformP$Init$init, .-PlatformP$Init$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMainP$PlatformInit$init, %function
SimMainP$PlatformInit$init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	PlatformP$Init$init
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	SimMainP$PlatformInit$init, .-SimMainP$PlatformInit$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMainP$Scheduler$runNextTask, %function
SimMainP$Scheduler$runNextTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	SimSchedulerBasicP$Scheduler$runNextTask
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	SimMainP$Scheduler$runNextTask, .-SimMainP$Scheduler$runNextTask
	.section	.rodata
	.align	2
.LC81:
	.ascii	"TossimPacketModelC: Init.init() called\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Init$init, %function
TossimPacketModelC$Init$init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r2, .L650
	ldr	r1, .L650+4
	mov	r0, #109
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L650+8
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L650+12
	lsl	r3, r3, #5
	add	r3, r2, r3
	mov	r2, #1
	strb	r2, [r3, #13]
	mov	r3, #0
	mov	r0, r3
	pop	{fp, pc}
.L651:
	.align	2
.L650:
	.word	.LC81
	.word	.LC51
	.word	TossimPacketModelC$initialized
	.word	TossimPacketModelC$sendEvent
	.size	TossimPacketModelC$Init$init, .-TossimPacketModelC$Init$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Compare$start, %function
HplAtm128Timer0AsyncP$Compare$start:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L653
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #55
	ldrb	r3, [r3]	@ zero_extendqisi2
	orr	r3, r3, #2
	and	r0, r3, #255
	ldr	r1, .L653
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #55
	mov	r2, r0
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L654:
	.align	2
.L653:
	.word	atm128RegFile
	.size	HplAtm128Timer0AsyncP$Compare$start, .-HplAtm128Timer0AsyncP$Compare$start
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Compare$start, %function
Atm128AlarmAsyncP$0$Compare$start:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	HplAtm128Timer0AsyncP$Compare$start
	nop
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Compare$start, .-Atm128AlarmAsyncP$0$Compare$start
	.section	.rodata
	.align	2
.LC82:
	.ascii	"Setting control to be 0x%hhx\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Timer0Ctrl$setControl, %function
HplAtm128Timer0AsyncP$Timer0Ctrl$setControl:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	strb	r0, [fp, #-8]
	ldrb	r3, [fp, #-8]	@ zero_extendqisi2
	ldr	r2, .L657
	ldr	r1, .L657+4
	mov	r0, #193
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #51
	ldr	r2, .L657+8
	add	r3, r3, r2
	ldrb	r2, [fp, #-8]	@ zero_extendqisi2
	strb	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L658:
	.align	2
.L657:
	.word	.LC82
	.word	.LC69
	.word	atm128RegFile
	.size	HplAtm128Timer0AsyncP$Timer0Ctrl$setControl, .-HplAtm128Timer0AsyncP$Timer0Ctrl$setControl
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$TimerCtrl$setControl, %function
Atm128AlarmAsyncP$0$TimerCtrl$setControl:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	strb	r0, [fp, #-8]
	ldrb	r0, [fp, #-8]
	bl	HplAtm128Timer0AsyncP$Timer0Ctrl$setControl
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$TimerCtrl$setControl, .-Atm128AlarmAsyncP$0$TimerCtrl$setControl
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous, %function
HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #48
	ldr	r2, .L661
	add	r3, r3, r2
	ldrb	r2, [r3]
	and	r2, r2, #255
	orr	r2, r2, #8
	and	r2, r2, #255
	strb	r2, [r3]
	nop
	pop	{fp, pc}
.L662:
	.align	2
.L661:
	.word	atm128RegFile
	.size	HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous, .-HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous, %function
Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	HplAtm128Timer0AsyncP$TimerAsync$setTimer0Asynchronous
	nop
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous, .-Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Init$init, %function
Atm128AlarmAsyncP$0$Init$init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	Atm128AlarmAsyncP$0$TimerAsync$setTimer0Asynchronous
	mov	r3, #0
	strb	r3, [fp, #-8]
	ldrb	r3, [fp, #-8]
	bic	r3, r3, #4
	orr	r3, r3, #3
	strb	r3, [fp, #-8]
	ldrb	r3, [fp, #-8]
	orr	r3, r3, #8
	strb	r3, [fp, #-8]
	ldrb	r0, [fp, #-8]
	bl	Atm128AlarmAsyncP$0$TimerCtrl$setControl
	mov	r0, #230
	bl	Atm128AlarmAsyncP$0$Compare$set
	bl	Atm128AlarmAsyncP$0$Compare$start
	bl	Atm128AlarmAsyncP$0$setInterrupt
	mov	r3, #0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	Atm128AlarmAsyncP$0$Init$init, .-Atm128AlarmAsyncP$0$Init$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	RandomMlcgC$Init$init, %function
RandomMlcgC$Init$init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	ldr	r3, .L668
	ldrh	r3, [r3]
	add	r4, r3, #1
	bl	sim_node
	mov	r3, r0
	mov	r1, r4
	ldr	r2, .L668+4
	str	r1, [r2, r3, lsl #2]
	mov	r3, #0
	mov	r0, r3
	pop	{r4, r5, fp, pc}
.L669:
	.align	2
.L668:
	.word	TOS_NODE_ID
	.word	RandomMlcgC$seed
	.size	RandomMlcgC$Init$init, .-RandomMlcgC$Init$init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMainP$SoftwareInit$init, %function
SimMainP$SoftwareInit$init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	RandomMlcgC$Init$init
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	RandomMlcgC$Init$init
	mov	r3, r0
	mov	r2, r3
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	ecombine
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	Atm128AlarmAsyncP$0$Init$init
	mov	r3, r0
	mov	r2, r3
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	ecombine
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	TossimPacketModelC$Init$init
	mov	r3, r0
	mov	r2, r3
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	ecombine
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	SimMainP$SoftwareInit$init, .-SimMainP$SoftwareInit$init
	.section	.rodata
	.align	2
.LC83:
	.ascii	"Application booted.\012\000"
	.align	2
.LC84:
	.ascii	"boot\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$Boot$booted, %function
sendAckC$Boot$booted:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r2, .L673
	ldr	r1, .L673+4
	mov	r0, #153
	bl	sim_log_debug
	bl	sendAckC$SplitControl$start
	nop
	pop	{fp, pc}
.L674:
	.align	2
.L673:
	.word	.LC83
	.word	.LC84
	.size	sendAckC$Boot$booted, .-sendAckC$Boot$booted
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMainP$Boot$booted, %function
SimMainP$Boot$booted:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sendAckC$Boot$booted
	nop
	pop	{fp, pc}
	.size	SimMainP$Boot$booted, .-SimMainP$Boot$booted
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$SimMote$getEuid, %function
SimMoteP$SimMote$getEuid:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L678
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	pop	{fp, pc}
.L679:
	.align	2
.L678:
	.word	SimMoteP$euid
	.size	SimMoteP$SimMote$getEuid, .-SimMoteP$SimMote$getEuid
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$SimMote$setEuid, %function
SimMoteP$SimMote$setEuid:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L681
	lsl	r3, r3, #3
	add	r1, r2, r3
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L682:
	.align	2
.L681:
	.word	SimMoteP$euid
	.size	SimMoteP$SimMote$setEuid, .-SimMoteP$SimMote$setEuid
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$SimMote$getVariableInfo, %function
SimMoteP$SimMote$getVariableInfo:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	mov	r0, r3
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-12]
	ldr	r1, [fp, #-8]
	bl	__nesc_nido_resolve
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	SimMoteP$SimMote$getVariableInfo, .-SimMoteP$SimMote$getVariableInfo
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$SimMote$turnOff, %function
SimMoteP$SimMote$turnOff:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L686
	mov	r1, #0
	strb	r1, [r2, r3]
	nop
	pop	{fp, pc}
.L687:
	.align	2
.L686:
	.word	SimMoteP$isOn
	.size	SimMoteP$SimMote$turnOff, .-SimMoteP$SimMote$turnOff
	.section	.rodata
	.align	2
.LC85:
	.ascii	"Turning on mote %i at time %s.\012\000"
	.align	2
.LC86:
	.ascii	"SimMoteP\000"
	.align	2
.LC87:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$sim_mote_boot_handle, %function
SimMoteP$sim_mote_boot_handle:
	@ args = 0, pretend = 0, frame = 144
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #152
	str	r0, [fp, #-144]
	ldr	r3, .L690
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #136
	mov	r1, #128
	mov	r0, r3
	bl	sim_print_now
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L690+4
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	mov	r2, r3
	sub	r3, fp, #136
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L690+8
	ldr	r1, .L690+12
	mov	r0, #103
	bl	sim_log_debug
	bl	SimMoteP$SimMote$turnOn
	nop
	ldr	r3, .L690
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L689
	bl	__stack_chk_fail
.L689:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L691:
	.align	2
.L690:
	.word	.LC87
	.word	SimMoteP$bootEvent
	.word	.LC85
	.word	.LC86
	.size	SimMoteP$sim_mote_boot_handle, .-SimMoteP$sim_mote_boot_handle
	.align	2
	.global	sim_queue_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_init, %function
sim_queue_init:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L693
	bl	init_heap
	nop
	pop	{fp, pc}
.L694:
	.align	2
.L693:
	.word	eventHeap
	.size	sim_queue_init, .-sim_queue_init
	.section	.rodata
	.align	2
.LC88:
	.ascii	"Inserting 0x%p\012\000"
	.align	2
.LC89:
	.ascii	"Queue\000"
	.text
	.align	2
	.global	sim_queue_insert
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_insert, %function
sim_queue_insert:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L696
	ldr	r1, .L696+4
	mov	r0, #0
	bl	sim_log_debug
	ldr	r3, [fp, #-8]
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-8]
	ldr	r0, .L696+8
	bl	heap_insert
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L697:
	.align	2
.L696:
	.word	.LC88
	.word	.LC89
	.word	eventHeap
	.size	sim_queue_insert, .-sim_queue_insert
	.section	.rodata
	.align	2
.LC90:
	.ascii	"DEBUG (%i): \000"
	.align	2
.LC91:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_debug, %function
sim_log_debug:
	@ args = 4, pretend = 8, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 1
	push	{r2, r3}
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	mov	r3, r0
	str	r1, [fp, #-28]
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, [fp, #4]
	str	r3, [fp, #-32]
	ldr	r3, .L703
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldrh	r3, [fp, #-22]
	ldr	r2, .L703+4
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	cmp	r3, #0
	bne	.L699
	ldrh	r3, [fp, #-22]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	fillInOutput
.L699:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L700
.L701:
	ldrh	r3, [fp, #-22]
	ldr	r2, .L703+4
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	add	r3, fp, #8
	str	r3, [fp, #-20]
	bl	sim_node
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L703+8
	ldr	r0, [fp, #-12]
	bl	fprintf
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-32]
	ldr	r0, [fp, #-12]
	bl	vfprintf
	ldr	r0, [fp, #-12]
	bl	fflush
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L700:
	ldrh	r3, [fp, #-22]
	ldr	r2, .L703+4
	ldr	r3, [r2, r3, lsl #3]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L701
	nop
	ldr	r3, .L703
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L702
	bl	__stack_chk_fail
.L702:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #8
	bx	lr
.L704:
	.align	2
.L703:
	.word	.LC91
	.word	outputs
	.word	.LC90
	.size	sim_log_debug, .-sim_log_debug
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	fillInOutput, %function
fillInOutput:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #52
	str	r0, [fp, #-56]
	str	r1, [fp, #-60]
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-48]
	mov	r3, #0
	str	r3, [fp, #-44]
	ldr	r0, [fp, #-60]
	bl	strlen
	mov	r3, r0
	add	r3, r3, #1
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-28]
	ldr	r0, [fp, #-60]
	bl	strlen
	mov	r3, r0
	add	r3, r3, #1
	mov	r2, r3
	mov	r1, #0
	ldr	r0, [fp, #-28]
	bl	memset
	b	.L706
.L710:
	mov	r1, #44
	ldr	r0, [fp, #-48]
	bl	strrchr
	str	r0, [fp, #-52]
	ldr	r3, [fp, #-52]
	cmp	r3, #0
	bne	.L707
	ldr	r1, [fp, #-48]
	ldr	r0, [fp, #-28]
	bl	strcpy
	b	.L708
.L707:
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	sub	r3, r2, r3
	mov	r2, r3
	ldr	r1, [fp, #-48]
	ldr	r0, [fp, #-28]
	bl	memcpy
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	sub	r3, r2, r3
	mov	r2, r3
	ldr	r3, [fp, #-28]
	add	r3, r3, r2
	mov	r2, #0
	strb	r2, [r3]
.L708:
	ldr	r3, .L722
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	hashtable_search
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	beq	.L709
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #4]
	ldr	r2, [fp, #-44]
	add	r3, r2, r3
	str	r3, [fp, #-44]
.L709:
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L706:
	ldr	r3, [fp, #-52]
	cmp	r3, #0
	bne	.L710
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-52]
	ldr	r3, [fp, #-60]
	str	r3, [fp, #-48]
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #2
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	mov	r1, r3
	ldr	r2, .L722+4
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	add	r3, r2, r3
	str	r1, [r3, #4]
	ldr	r2, .L722+4
	ldr	r3, [fp, #-56]
	mov	r1, #0
	str	r1, [r2, r3, lsl #3]
	b	.L711
.L721:
	mov	r1, #44
	ldr	r0, [fp, #-48]
	bl	strrchr
	str	r0, [fp, #-52]
	ldr	r3, [fp, #-52]
	cmp	r3, #0
	bne	.L712
	ldr	r1, [fp, #-48]
	ldr	r0, [fp, #-28]
	bl	strcpy
	b	.L713
.L712:
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	sub	r3, r2, r3
	mov	r2, r3
	ldr	r1, [fp, #-48]
	ldr	r0, [fp, #-28]
	bl	memcpy
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	sub	r3, r2, r3
	mov	r2, r3
	ldr	r3, [fp, #-28]
	add	r3, r3, r2
	mov	r2, #0
	strb	r2, [r3]
.L713:
	ldr	r3, .L722
	ldr	r3, [r3]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	hashtable_search
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	beq	.L714
	mov	r3, #0
	str	r3, [fp, #-40]
	b	.L715
.L720:
	mov	r3, #0
	str	r3, [fp, #-32]
	ldr	r2, .L722+4
	ldr	r3, [fp, #-56]
	ldr	r3, [r2, r3, lsl #3]
	str	r3, [fp, #-20]
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L716
.L718:
	ldr	r2, .L722+4
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r0, r3
	bl	fileno
	mov	r4, r0
	ldr	r3, [fp, #-24]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	mov	r0, r3
	bl	fileno
	mov	r3, r0
	cmp	r4, r3
	bne	.L717
	mov	r3, #1
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-20]
	str	r3, [fp, #-36]
.L717:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L716:
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-20]
	cmp	r2, r3
	blt	.L718
	ldr	r3, [fp, #-32]
	cmp	r3, #0
	bne	.L719
	ldr	r3, [fp, #-24]
	ldr	r2, [r3, #12]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r1, .L722+4
	ldr	r3, [fp, #-56]
	lsl	r3, r3, #3
	add	r3, r1, r3
	ldr	r1, [r3, #4]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #2
	add	r3, r1, r3
	ldr	r2, [r2]
	str	r2, [r3]
	ldr	r2, .L722+4
	ldr	r3, [fp, #-56]
	ldr	r3, [r2, r3, lsl #3]
	add	r2, r3, #1
	ldr	r1, .L722+4
	ldr	r3, [fp, #-56]
	str	r2, [r1, r3, lsl #3]
.L719:
	ldr	r3, [fp, #-40]
	add	r3, r3, #1
	str	r3, [fp, #-40]
.L715:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3, #4]
	ldr	r2, [fp, #-40]
	cmp	r2, r3
	blt	.L720
.L714:
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	str	r3, [fp, #-48]
.L711:
	ldr	r3, [fp, #-52]
	cmp	r3, #0
	bne	.L721
	nop
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L723:
	.align	2
.L722:
	.word	channelTable
	.word	outputs
	.size	fillInOutput, .-fillInOutput
	.align	2
	.global	sim_node
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_node, %function
sim_node:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L726
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L727:
	.align	2
.L726:
	.word	current_node
	.size	sim_node, .-sim_node
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	up_heap, %function
up_heap:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	beq	.L731
	ldr	r3, [fp, #-20]
	sub	r3, r3, #1
	lsr	r2, r3, #31
	add	r3, r2, r3
	asr	r3, r3, #1
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-16]
	ldr	r0, [r1, #4]
	ldr	r1, [fp, #-20]
	lsl	r1, r1, #4
	add	r1, r0, r1
	add	r1, r1, #8
	ldmia	r1, {r0-r1}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L728
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-20]
	lsl	r3, r3, #4
	add	r0, r2, r3
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	add	r3, r2, r3
	mov	r1, r3
	bl	swap
	ldr	r1, [fp, #-8]
	ldr	r0, [fp, #-16]
	bl	up_heap
	b	.L728
.L731:
	nop
.L728:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	up_heap, .-up_heap
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	swap, %function
swap:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #28
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	ldr	r3, [fp, #-24]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-28]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-24]
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r1, [fp, #-28]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-28]
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	str	r2, [r3]
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-16]
	str	r2, [r3]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	swap, .-swap
	.section	.rodata
	.align	2
.LC92:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	sim_queue_pop
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_pop, %function
sim_queue_pop:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L736
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #20
	mov	r1, r3
	ldr	r0, .L736+4
	bl	heap_pop_min_data
	mov	r3, r0
	ldr	r2, .L736
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L735
	bl	__stack_chk_fail
.L735:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L737:
	.align	2
.L736:
	.word	.LC92
	.word	eventHeap
	.size	sim_queue_pop, .-sim_queue_pop
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	heap_pop_min_data, %function
heap_pop_min_data:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	sub	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #4]
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	beq	.L739
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #4]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-20]
	stm	r1, {r2-r3}
.L739:
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #4
	add	r2, r2, r3
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #4]
	ldr	r2, [r2]
	str	r2, [r3]
	ldr	r3, [fp, #-16]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-12]
	lsl	r3, r3, #4
	add	r3, r2, r3
	ldr	r2, [fp, #-16]
	ldr	r1, [r2, #4]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	sub	r2, r3, #1
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	mov	r1, #0
	ldr	r0, [fp, #-16]
	bl	down_heap
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	heap_pop_min_data, .-heap_pop_min_data
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	down_heap, %function
down_heap:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	str	r0, [fp, #-48]
	str	r1, [fp, #-52]
	ldr	r3, [fp, #-52]
	add	r3, r3, #1
	lsl	r3, r3, #1
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #1
	add	r3, r3, #1
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-48]
	ldr	r3, [r3]
	ldr	r2, [fp, #-40]
	cmp	r2, r3
	bge	.L742
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L743
	ldr	r3, [fp, #-36]
	b	.L744
.L743:
	ldr	r3, [fp, #-40]
.L744:
	str	r3, [fp, #-32]
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r1, r3, #8
	ldmia	r1, {r0-r1}
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L741
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #4
	add	r0, r2, r3
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-32]
	lsl	r3, r3, #4
	add	r3, r2, r3
	mov	r1, r3
	bl	swap
	ldr	r1, [fp, #-32]
	ldr	r0, [fp, #-48]
	bl	down_heap
	b	.L741
.L742:
	ldr	r3, [fp, #-48]
	ldr	r3, [r3]
	ldr	r2, [fp, #-36]
	cmp	r2, r3
	bge	.L747
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L741
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #4
	add	r0, r2, r3
	ldr	r3, [fp, #-48]
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-36]
	lsl	r3, r3, #4
	add	r3, r2, r3
	mov	r1, r3
	bl	swap
	b	.L741
.L747:
	nop
.L741:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	down_heap, .-down_heap
	.align	2
	.global	sim_queue_is_empty
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_is_empty, %function
sim_queue_is_empty:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L750
	bl	heap_is_empty
	mov	r3, r0
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
.L751:
	.align	2
.L750:
	.word	eventHeap
	.size	sim_queue_is_empty, .-sim_queue_is_empty
	.align	2
	.global	sim_queue_peek_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_peek_time, %function
sim_queue_peek_time:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r0, .L755
	bl	heap_is_empty
	mov	r3, r0
	cmp	r3, #0
	beq	.L753
	mvn	r2, #0
	mvn	r3, #0
	b	.L754
.L753:
	ldr	r0, .L755
	bl	heap_get_min_key
	mov	r2, r0
	mov	r3, r1
.L754:
	mov	r0, r2
	mov	r1, r3
	pop	{fp, pc}
.L756:
	.align	2
.L755:
	.word	eventHeap
	.size	sim_queue_peek_time, .-sim_queue_peek_time
	.section	.rodata
	.align	2
.LC93:
	.ascii	"cleanup_none: 0x%p\012\000"
	.text
	.align	2
	.global	sim_queue_cleanup_none
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_cleanup_none, %function
sim_queue_cleanup_none:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L758
	ldr	r1, .L758+4
	mov	r0, #1
	bl	sim_log_debug
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L759:
	.align	2
.L758:
	.word	.LC93
	.word	.LC89
	.size	sim_queue_cleanup_none, .-sim_queue_cleanup_none
	.section	.rodata
	.align	2
.LC94:
	.ascii	"cleanup_event: 0x%p\012\000"
	.text
	.align	2
	.global	sim_queue_cleanup_event
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_cleanup_event, %function
sim_queue_cleanup_event:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L761
	ldr	r1, .L761+4
	mov	r0, #2
	bl	sim_log_debug
	ldr	r0, [fp, #-8]
	bl	free
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L762:
	.align	2
.L761:
	.word	.LC94
	.word	.LC89
	.size	sim_queue_cleanup_event, .-sim_queue_cleanup_event
	.section	.rodata
	.align	2
.LC95:
	.ascii	"cleanup_data: 0x%p\012\000"
	.text
	.align	2
	.global	sim_queue_cleanup_data
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_cleanup_data, %function
sim_queue_cleanup_data:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L764
	ldr	r1, .L764+4
	mov	r0, #3
	bl	sim_log_debug
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #16]
	mov	r0, r3
	bl	free
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3, #16]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L765:
	.align	2
.L764:
	.word	.LC95
	.word	.LC89
	.size	sim_queue_cleanup_data, .-sim_queue_cleanup_data
	.section	.rodata
	.align	2
.LC96:
	.ascii	"cleanup_total: 0x%p\012\000"
	.text
	.align	2
	.global	sim_queue_cleanup_total
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_cleanup_total, %function
sim_queue_cleanup_total:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L767
	ldr	r1, .L767+4
	mov	r0, #4
	bl	sim_log_debug
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #16]
	mov	r0, r3
	bl	free
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3, #16]
	ldr	r0, [fp, #-8]
	bl	free
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L768:
	.align	2
.L767:
	.word	.LC96
	.word	.LC89
	.size	sim_queue_cleanup_total, .-sim_queue_cleanup_total
	.section	.rodata
	.align	2
.LC97:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	sim_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_init, %function
sim_init:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L774
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	bl	sim_queue_init
	bl	sim_log_init
	bl	sim_log_commit_change
	bl	sim_noise_init
	sub	r3, fp, #16
	mov	r1, #0
	mov	r0, r3
	bl	gettimeofday
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	beq	.L770
	ldr	r3, [fp, #-12]
	mov	r0, r3
	bl	sim_random_seed
	b	.L773
.L770:
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_random_seed
.L773:
	nop
	ldr	r3, .L774
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L772
	bl	__stack_chk_fail
.L772:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L775:
	.align	2
.L774:
	.word	.LC97
	.size	sim_init, .-sim_init
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_commit_change, %function
sim_log_commit_change:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L777
.L779:
	ldr	r2, .L780
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	cmp	r3, #0
	beq	.L778
	ldr	r2, .L780
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #3]
	ldr	r2, .L780
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	mov	r0, r3
	bl	free
	ldr	r2, .L780
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3, #4]
.L778:
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L777:
	ldr	r3, [fp, #-8]
	cmp	r3, #202
	ble	.L779
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L781:
	.align	2
.L780:
	.word	outputs
	.size	sim_log_commit_change, .-sim_log_commit_change
	.align	2
	.global	sim_noise_init
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_init, %function
sim_noise_init:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L783
.L784:
	ldr	r2, .L785
	ldr	r1, .L785+4
	mov	r0, #128
	bl	create_hashtable
	mov	r1, r0
	ldr	r0, .L785+8
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #48
	str	r1, [r3]
	ldr	r1, .L785+8
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #44
	mov	r2, #0
	str	r2, [r3]
	mov	r0, #128
	bl	malloc
	mov	r3, r0
	mov	r0, r3
	ldr	r1, .L785+8
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	str	r0, [r3]
	ldr	r1, .L785+8
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #56
	mov	r2, #128
	str	r2, [r3]
	ldr	r1, .L785+8
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #60
	mov	r2, #0
	str	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L783:
	ldr	r3, [fp, #-8]
	cmp	r3, #1000
	blt	.L784
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L786:
	.align	2
.L785:
	.word	sim_noise_eq
	.word	sim_noise_hash
	.word	noiseData
	.size	sim_noise_init, .-sim_noise_init
	.align	2
	.global	sim_random_seed
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_random_seed, %function
sim_random_seed:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L788
	mov	r3, #1
	str	r3, [fp, #-8]
.L788:
	ldr	r2, .L789
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L790:
	.align	2
.L789:
	.word	sim_seed
	.size	sim_random_seed, .-sim_random_seed
	.align	2
	.global	sim_end
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_end, %function
sim_end:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_queue_init
	nop
	pop	{fp, pc}
	.size	sim_end, .-sim_end
	.align	2
	.global	sim_random
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_random, %function
sim_random:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	ldr	r3, .L795
	ldr	r3, [r3]
	mov	r0, r3
	asr	r1, r0, #31
	ldr	r3, .L795+4
	mul	r2, r3, r1
	mov	r3, #0
	mul	r3, r0, r3
	add	ip, r2, r3
	ldr	lr, .L795+4
	umull	r2, r3, r0, lr
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #1
	str	r3, [fp, #-20]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r2, r1
	mov	r3, #0
	mov	r3, r2
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bge	.L793
	ldr	r3, [fp, #-24]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L793:
	ldr	r3, [fp, #-24]
	ldr	r2, .L795
	str	r3, [r2]
	ldr	r3, [fp, #-24]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L796:
	.align	2
.L795:
	.word	sim_seed
	.word	33614
	.size	sim_random, .-sim_random
	.align	2
	.global	sim_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_time, %function
sim_time:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L799
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L800:
	.align	2
.L799:
	.word	sim_ticks
	.size	sim_time, .-sim_time
	.align	2
	.global	sim_set_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_set_time, %function
sim_set_time:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r1, .L802
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L803:
	.align	2
.L802:
	.word	sim_ticks
	.size	sim_set_time, .-sim_set_time
	.align	2
	.global	sim_ticks_per_sec
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_ticks_per_sec, %function
sim_ticks_per_sec:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	adr	r3, .L806
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L807:
	.align	3
.L806:
	.word	1410065408
	.word	2
	.size	sim_ticks_per_sec, .-sim_ticks_per_sec
	.align	2
	.global	sim_set_node
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_set_node, %function
sim_set_node:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L809
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	ldr	r2, .L809+4
	strh	r3, [r2]	@ movhi
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L810:
	.align	2
.L809:
	.word	current_node
	.word	TOS_NODE_ID
	.size	sim_set_node, .-sim_set_node
	.section	.rodata
	.align	2
.LC98:
	.ascii	"CORE: popping event 0x%p for %i at %llu with handle"
	.ascii	"r %p... \000"
	.align	2
.LC99:
	.ascii	"Tossim\000"
	.align	2
.LC100:
	.ascii	" mote is on (or forced event), run it.\012\000"
	.align	2
.LC101:
	.ascii	"\012\000"
	.text
	.align	2
	.global	sim_run_next_event
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_run_next_event, %function
sim_run_next_event:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	mov	r3, #0
	strb	r3, [fp, #-17]
	bl	sim_queue_is_empty
	mov	r3, r0
	cmp	r3, #0
	bne	.L812
	bl	sim_queue_pop
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	bl	sim_set_time
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	mov	r0, r3
	bl	sim_set_node
	bl	sim_node
	mov	r4, r0
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-16]
	ldr	r1, [r1, #20]
	str	r1, [sp, #16]
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	str	r4, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, .L817
	ldr	r1, .L817+4
	mov	r0, #5
	bl	sim_log_debug
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #8]
	mov	r0, r3
	bl	sim_mote_is_on
	mov	r3, r0
	cmp	r3, #0
	bne	.L813
	ldr	r3, [fp, #-16]
	ldrb	r3, [r3, #12]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L814
.L813:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #20]
	cmp	r3, #0
	beq	.L814
	mov	r3, #1
	strb	r3, [fp, #-17]
	ldr	r2, .L817+8
	ldr	r1, .L817+4
	mov	r0, #6
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #20]
	ldr	r0, [fp, #-16]
	blx	r3
	b	.L815
.L814:
	ldr	r2, .L817+12
	ldr	r1, .L817+4
	mov	r0, #7
	bl	sim_log_debug_clear
.L815:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #24]
	cmp	r3, #0
	beq	.L812
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #24]
	ldr	r0, [fp, #-16]
	blx	r3
.L812:
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L818:
	.align	2
.L817:
	.word	.LC98
	.word	.LC99
	.word	.LC100
	.word	.LC101
	.size	sim_run_next_event, .-sim_run_next_event
	.align	2
	.global	sim_mote_is_on
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_is_on, %function
sim_mote_is_on:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	bl	SimMoteP$SimMote$isOn
	mov	r3, r0
	strb	r3, [fp, #-9]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_mote_is_on, .-sim_mote_is_on
	.section	.rodata
	.align	2
.LC102:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_debug_clear, %function
sim_log_debug_clear:
	@ args = 4, pretend = 8, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 1
	push	{r2, r3}
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	mov	r3, r0
	str	r1, [fp, #-28]
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, [fp, #4]
	str	r3, [fp, #-32]
	ldr	r3, .L826
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldrh	r3, [fp, #-22]
	ldr	r2, .L826+4
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	cmp	r3, #0
	bne	.L822
	ldrh	r3, [fp, #-22]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	fillInOutput
.L822:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L823
.L824:
	ldrh	r3, [fp, #-22]
	ldr	r2, .L826+4
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	add	r3, fp, #8
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-32]
	ldr	r0, [fp, #-12]
	bl	vfprintf
	ldr	r0, [fp, #-12]
	bl	fflush
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L823:
	ldrh	r3, [fp, #-22]
	ldr	r2, .L826+4
	ldr	r3, [r2, r3, lsl #3]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L824
	nop
	ldr	r3, .L826
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L825
	bl	__stack_chk_fail
.L825:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #8
	bx	lr
.L827:
	.align	2
.L826:
	.word	.LC102
	.word	outputs
	.size	sim_log_debug_clear, .-sim_log_debug_clear
	.section	.rodata
	.align	2
.LC103:
	.ascii	"%i:%i:%i.%09llu\000"
	.text
	.align	2
	.global	sim_print_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_print_time, %function
sim_print_time:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	str	r0, [fp, #-32]
	str	r1, [fp, #-36]
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	adr	r1, .L832
	ldmia	r1, {r0-r1}
	cmp	r0, r2
	sbcs	r3, r1, r3
	bge	.L829
	bl	sim_ticks_per_sec
	adr	r3, .L832
	ldmia	r3, {r2-r3}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	b	.L830
.L829:
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	adr	r1, .L832
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r3, [fp, #-8]
	mul	r2, r0, r3
	ldr	r3, [fp, #-12]
	mul	r3, r1, r3
	add	ip, r2, r3
	ldr	lr, [fp, #-12]
	umull	r2, r3, lr, r0
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
.L830:
	bl	sim_ticks_per_sec
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r3, r2
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	ldr	r2, .L832+8
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	ldr	r2, .L832+8
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r2, r2, #5
	asr	r3, r3, #31
	sub	r3, r2, r3
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-24]
	ldr	r3, .L832+8
	smull	r1, r3, r2, r3
	add	r3, r3, r2
	asr	r1, r3, #5
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #4
	sub	r3, r3, r1
	lsl	r3, r3, #2
	sub	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-20]
	ldr	r3, .L832+8
	smull	r1, r3, r2, r3
	add	r3, r3, r2
	asr	r1, r3, #5
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #4
	sub	r3, r3, r1
	lsl	r3, r3, #2
	sub	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-36]
	sub	r3, r3, #1
	ldr	r2, [fp, #-32]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-36]
	sub	r3, r3, #1
	mov	r1, r3
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, [fp, #-24]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, .L832+12
	ldr	r0, [fp, #-32]
	bl	snprintf
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L833:
	.align	3
.L832:
	.word	1000000000
	.word	0
	.word	-2004318071
	.word	.LC103
	.size	sim_print_time, .-sim_print_time
	.align	2
	.global	sim_print_now
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_print_now, %function
sim_print_now:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	sim_print_time
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_print_now, .-sim_print_now
	.align	2
	.global	sim_time_string
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_time_string, %function
sim_time_string:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r1, #128
	ldr	r0, .L838
	bl	sim_print_now
	ldr	r3, .L838
	mov	r0, r3
	pop	{fp, pc}
.L839:
	.align	2
.L838:
	.word	simTimeBuf
	.size	sim_time_string, .-sim_time_string
	.align	2
	.global	sim_add_channel
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_add_channel, %function
sim_add_channel:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	sim_log_add_channel
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_add_channel, .-sim_add_channel
	.align	2
	.global	sim_remove_channel
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_remove_channel, %function
sim_remove_channel:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	sim_log_remove_channel
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_remove_channel, .-sim_remove_channel
	.align	2
	.global	sim_csma_init_high
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_init_high, %function
sim_csma_init_high:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L845
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L846:
	.align	2
.L845:
	.word	csmaInitHigh
	.size	sim_csma_init_high, .-sim_csma_init_high
	.align	2
	.global	sim_csma_init_low
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_init_low, %function
sim_csma_init_low:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L849
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L850:
	.align	2
.L849:
	.word	csmaInitLow
	.size	sim_csma_init_low, .-sim_csma_init_low
	.align	2
	.global	sim_csma_high
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_high, %function
sim_csma_high:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L853
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L854:
	.align	2
.L853:
	.word	csmaHigh
	.size	sim_csma_high, .-sim_csma_high
	.align	2
	.global	sim_csma_low
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_low, %function
sim_csma_low:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L857
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L858:
	.align	2
.L857:
	.word	csmaLow
	.size	sim_csma_low, .-sim_csma_low
	.align	2
	.global	sim_csma_symbols_per_sec
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_symbols_per_sec, %function
sim_csma_symbols_per_sec:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L861
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L862:
	.align	2
.L861:
	.word	csmaSymbolsPerSec
	.size	sim_csma_symbols_per_sec, .-sim_csma_symbols_per_sec
	.align	2
	.global	sim_csma_bits_per_symbol
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_bits_per_symbol, %function
sim_csma_bits_per_symbol:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L865
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L866:
	.align	2
.L865:
	.word	csmaBitsPerSymbol
	.size	sim_csma_bits_per_symbol, .-sim_csma_bits_per_symbol
	.align	2
	.global	sim_csma_preamble_length
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_preamble_length, %function
sim_csma_preamble_length:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L869
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L870:
	.align	2
.L869:
	.word	csmaPreambleLength
	.size	sim_csma_preamble_length, .-sim_csma_preamble_length
	.align	2
	.global	sim_csma_exponent_base
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_exponent_base, %function
sim_csma_exponent_base:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L873
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L874:
	.align	2
.L873:
	.word	csmaExponentBase
	.size	sim_csma_exponent_base, .-sim_csma_exponent_base
	.align	2
	.global	sim_csma_max_iterations
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_max_iterations, %function
sim_csma_max_iterations:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L877
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L878:
	.align	2
.L877:
	.word	csmaMaxIterations
	.size	sim_csma_max_iterations, .-sim_csma_max_iterations
	.align	2
	.global	sim_csma_min_free_samples
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_min_free_samples, %function
sim_csma_min_free_samples:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L881
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L882:
	.align	2
.L881:
	.word	csmaMinFreeSamples
	.size	sim_csma_min_free_samples, .-sim_csma_min_free_samples
	.align	2
	.global	sim_csma_rxtx_delay
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_rxtx_delay, %function
sim_csma_rxtx_delay:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L885
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L886:
	.align	2
.L885:
	.word	csmaRxTxDelay
	.size	sim_csma_rxtx_delay, .-sim_csma_rxtx_delay
	.align	2
	.global	sim_csma_ack_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_ack_time, %function
sim_csma_ack_time:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L889
	ldr	r3, [r3]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L890:
	.align	2
.L889:
	.word	csmaAckTime
	.size	sim_csma_ack_time, .-sim_csma_ack_time
	.align	2
	.global	sim_csma_set_init_high
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_init_high, %function
sim_csma_set_init_high:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L892
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L893:
	.align	2
.L892:
	.word	csmaInitHigh
	.size	sim_csma_set_init_high, .-sim_csma_set_init_high
	.align	2
	.global	sim_csma_set_init_low
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_init_low, %function
sim_csma_set_init_low:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L895
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L896:
	.align	2
.L895:
	.word	csmaInitLow
	.size	sim_csma_set_init_low, .-sim_csma_set_init_low
	.align	2
	.global	sim_csma_set_high
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_high, %function
sim_csma_set_high:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L898
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L899:
	.align	2
.L898:
	.word	csmaHigh
	.size	sim_csma_set_high, .-sim_csma_set_high
	.align	2
	.global	sim_csma_set_low
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_low, %function
sim_csma_set_low:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L901
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L902:
	.align	2
.L901:
	.word	csmaLow
	.size	sim_csma_set_low, .-sim_csma_set_low
	.align	2
	.global	sim_csma_set_symbols_per_sec
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_symbols_per_sec, %function
sim_csma_set_symbols_per_sec:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L904
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L905:
	.align	2
.L904:
	.word	csmaSymbolsPerSec
	.size	sim_csma_set_symbols_per_sec, .-sim_csma_set_symbols_per_sec
	.align	2
	.global	sim_csma_set_bits_per_symbol
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_bits_per_symbol, %function
sim_csma_set_bits_per_symbol:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L907
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L908:
	.align	2
.L907:
	.word	csmaBitsPerSymbol
	.size	sim_csma_set_bits_per_symbol, .-sim_csma_set_bits_per_symbol
	.align	2
	.global	sim_csma_set_preamble_length
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_preamble_length, %function
sim_csma_set_preamble_length:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L910
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L911:
	.align	2
.L910:
	.word	csmaPreambleLength
	.size	sim_csma_set_preamble_length, .-sim_csma_set_preamble_length
	.align	2
	.global	sim_csma_set_exponent_base
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_exponent_base, %function
sim_csma_set_exponent_base:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L913
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L914:
	.align	2
.L913:
	.word	csmaExponentBase
	.size	sim_csma_set_exponent_base, .-sim_csma_set_exponent_base
	.align	2
	.global	sim_csma_set_max_iterations
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_max_iterations, %function
sim_csma_set_max_iterations:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L916
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L917:
	.align	2
.L916:
	.word	csmaMaxIterations
	.size	sim_csma_set_max_iterations, .-sim_csma_set_max_iterations
	.align	2
	.global	sim_csma_set_min_free_samples
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_min_free_samples, %function
sim_csma_set_min_free_samples:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L919
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L920:
	.align	2
.L919:
	.word	csmaMinFreeSamples
	.size	sim_csma_set_min_free_samples, .-sim_csma_set_min_free_samples
	.align	2
	.global	sim_csma_set_rxtx_delay
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_rxtx_delay, %function
sim_csma_set_rxtx_delay:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L922
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L923:
	.align	2
.L922:
	.word	csmaRxTxDelay
	.size	sim_csma_set_rxtx_delay, .-sim_csma_set_rxtx_delay
	.align	2
	.global	sim_csma_set_ack_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_csma_set_ack_time, %function
sim_csma_set_ack_time:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r2, .L925
	ldr	r3, [fp, #-8]
	str	r3, [r2]
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L926:
	.align	2
.L925:
	.word	csmaAckTime
	.size	sim_csma_set_ack_time, .-sim_csma_set_ack_time
	.align	2
	.global	sim_gain_first
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_first, %function
sim_gain_first:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #1000
	ble	.L928
	ldr	r3, .L930
	ldr	r3, [r3, #4000]
	b	.L929
.L928:
	ldr	r2, .L930
	ldr	r3, [fp, #-8]
	ldr	r3, [r2, r3, lsl #2]
.L929:
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L931:
	.align	2
.L930:
	.word	connectivity
	.size	sim_gain_first, .-sim_gain_first
	.align	2
	.global	sim_gain_next
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_next, %function
sim_gain_next:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r3, [r3, #16]
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sim_gain_next, .-sim_gain_next
	.section	.rodata
	.align	2
.LC104:
	.ascii	"Adding link from %i to %i with gain %f\012\000"
	.align	2
.LC105:
	.ascii	"Gain\000"
	.text
	.align	2
	.global	sim_gain_add
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_add, %function
sim_gain_add:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	cmp	r3, #1000
	ble	.L935
	mov	r3, #1000
	str	r3, [fp, #-16]
.L935:
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	ldr	r0, [fp, #-16]
	bl	sim_gain_first
	str	r0, [fp, #-12]
	b	.L936
.L939:
	ldr	r3, [fp, #-12]
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	cmp	r2, r3
	bne	.L937
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	b	.L938
.L937:
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-12]
.L936:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L939
.L938:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L940
	ldr	r0, [fp, #-20]
	bl	sim_gain_allocate_link
	str	r0, [fp, #-12]
	ldr	r2, .L941
	ldr	r3, [fp, #-16]
	ldr	r2, [r2, r3, lsl #2]
	ldr	r3, [fp, #-12]
	str	r2, [r3, #16]
	ldr	r1, .L941
	ldr	r3, [fp, #-16]
	ldr	r2, [fp, #-12]
	str	r2, [r1, r3, lsl #2]
.L940:
	ldr	r3, [fp, #-12]
	ldr	r2, [fp, #-20]
	str	r2, [r3]
	ldr	r1, [fp, #-12]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	str	r2, [r1, #8]
	str	r3, [r1, #12]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, .L941+4
	ldr	r1, .L941+8
	mov	r0, #8
	bl	sim_log_debug
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L942:
	.align	2
.L941:
	.word	connectivity
	.word	.LC104
	.word	.LC105
	.size	sim_gain_add, .-sim_gain_add
	.section	.rodata
	.align	2
.LC106:
	.ascii	"Getting link from %i to %i with gain %f\012\000"
	.align	2
.LC107:
	.ascii	"Getting default link from %i to %i with gain %f\012"
	.ascii	"\000"
	.text
	.align	2
	.global	sim_gain_value
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_value, %function
sim_gain_value:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	ldr	r0, [fp, #-16]
	bl	sim_gain_first
	str	r0, [fp, #-12]
	b	.L944
.L947:
	ldr	r3, [fp, #-12]
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	cmp	r2, r3
	bne	.L945
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	ldr	r3, [fp, #-12]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, .L948
	ldr	r1, .L948+4
	mov	r0, #9
	bl	sim_log_debug
	ldr	r3, [fp, #-12]
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	b	.L946
.L945:
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-12]
.L944:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L947
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	mov	r2, #0
	ldr	r3, .L948+8
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, .L948+12
	ldr	r1, .L948+4
	mov	r0, #10
	bl	sim_log_debug
	mov	r2, #0
	ldr	r3, .L948+8
.L946:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L949:
	.align	2
.L948:
	.word	.LC106
	.word	.LC105
	.word	1072693248
	.word	.LC107
	.size	sim_gain_value, .-sim_gain_value
	.align	2
	.global	sim_gain_connected
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_connected, %function
sim_gain_connected:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	ldr	r0, [fp, #-16]
	bl	sim_gain_first
	str	r0, [fp, #-12]
	b	.L951
.L954:
	ldr	r3, [fp, #-12]
	ldr	r3, [r3]
	ldr	r2, [fp, #-20]
	cmp	r2, r3
	bne	.L952
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	mov	r3, #1
	b	.L953
.L952:
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-12]
.L951:
	ldr	r3, [fp, #-12]
	cmp	r3, #0
	bne	.L954
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	mov	r3, #0
.L953:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_gain_connected, .-sim_gain_connected
	.align	2
	.global	sim_gain_remove
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_remove, %function
sim_gain_remove:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-24]
	cmp	r3, #1000
	ble	.L956
	mov	r3, #1000
	str	r3, [fp, #-24]
.L956:
	ldr	r3, [fp, #-24]
	mov	r0, r3
	bl	sim_set_node
	ldr	r0, [fp, #-24]
	bl	sim_gain_first
	str	r0, [fp, #-20]
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L957
.L961:
	ldr	r3, [fp, #-20]
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	cmp	r2, r3
	bne	.L958
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L959
	ldr	r3, [fp, #-20]
	ldr	r2, [r3, #16]
	ldr	r1, .L962
	ldr	r3, [fp, #-24]
	str	r2, [r1, r3, lsl #2]
	b	.L960
.L959:
	ldr	r3, [fp, #-20]
	ldr	r2, [r3, #16]
	ldr	r3, [fp, #-16]
	str	r2, [r3, #16]
.L960:
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-8]
	ldr	r0, [fp, #-20]
	bl	sim_gain_deallocate_link
	ldr	r3, [fp, #-8]
	str	r3, [fp, #-20]
	b	.L957
.L958:
	ldr	r3, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #16]
	str	r3, [fp, #-20]
.L957:
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bne	.L961
	ldr	r3, [fp, #-12]
	mov	r0, r3
	bl	sim_set_node
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L963:
	.align	2
.L962:
	.word	connectivity
	.size	sim_gain_remove, .-sim_gain_remove
	.align	2
	.global	sim_gain_deallocate_link
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_deallocate_link, %function
sim_gain_deallocate_link:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	free
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_gain_deallocate_link, .-sim_gain_deallocate_link
	.align	2
	.global	sim_gain_set_noise_floor
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_set_noise_floor, %function
sim_gain_set_noise_floor:
	@ args = 8, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-8]
	cmp	r3, #1000
	ble	.L966
	mov	r3, #1000
	str	r3, [fp, #-8]
.L966:
	ldr	r2, .L967
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	add	r1, r2, r3
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r2, .L967
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r1, r3, #8
	ldmib	fp, {r2-r3}
	stm	r1, {r2-r3}
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L968:
	.align	2
.L967:
	.word	localNoise
	.size	sim_gain_set_noise_floor, .-sim_gain_set_noise_floor
	.align	2
	.global	sim_gain_sample_noise
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_sample_noise, %function
sim_gain_sample_noise:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	ldr	r3, [fp, #-24]
	cmp	r3, #1000
	ble	.L970
	mov	r3, #1000
	str	r3, [fp, #-24]
.L970:
	ldr	r2, .L972
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #4
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	bl	sim_random
	ldr	r3, .L972+4
	smull	r2, r3, r0, r3
	asr	r2, r3, #19
	asr	r3, r0, #31
	sub	r1, r2, r3
	mov	r2, r1
	lsl	r2, r2, #5
	sub	r2, r2, r1
	lsl	r3, r2, #6
	sub	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r1
	lsl	r3, r3, #7
	sub	r1, r0, r3
	mov	r0, r1
	bl	__aeabi_i2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	mov	r2, #0
	ldr	r3, .L972+8
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	mov	r2, #0
	ldr	r3, .L972+12
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r2, .L972
	ldr	r3, [fp, #-24]
	lsl	r3, r3, #4
	add	r3, r2, r3
	add	r3, r3, #8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L973:
	.align	2
.L972:
	.word	localNoise
	.word	1125899907
	.word	1093567616
	.word	1072693248
	.size	sim_gain_sample_noise, .-sim_gain_sample_noise
	.align	2
	.global	sim_gain_set_sensitivity
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_set_sensitivity, %function
sim_gain_set_sensitivity:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r1, .L975
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L976:
	.align	2
.L975:
	.word	sensitivity
	.size	sim_gain_set_sensitivity, .-sim_gain_set_sensitivity
	.align	2
	.global	sim_gain_sensitivity
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_gain_sensitivity, %function
sim_gain_sensitivity:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	ldr	r3, .L979
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L980:
	.align	2
.L979:
	.word	sensitivity
	.size	sim_gain_sensitivity, .-sim_gain_sensitivity
	.align	2
	.global	sim_noise_create_model
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_create_model, %function
sim_noise_create_model:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strh	r3, [fp, #-6]	@ movhi
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	bl	makeNoiseModel
	ldrh	r3, [fp, #-6]
	mov	r0, r3
	bl	makePmfDistr
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_noise_create_model, .-sim_noise_create_model
	.section	.rodata
	.align	2
.LC108:
	.ascii	"Setting history %i to be %i\012\000"
	.align	2
.LC109:
	.ascii	"Insert\000"
	.text
	.align	2
	.global	makeNoiseModel
	.syntax unified
	.arm
	.fpu softvfp
	.type	makeNoiseModel, %function
makeNoiseModel:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	mov	r3, r0
	strh	r3, [fp, #-22]	@ movhi
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L983
.L984:
	ldrh	r2, [fp, #-22]
	ldr	r1, .L987
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldrh	r4, [fp, #-22]
	mov	r0, r3
	bl	search_bin_num
	mov	r3, r0
	mov	r1, r3
	ldr	r2, .L987
	mov	r3, r4
	lsl	r3, r3, #4
	add	r3, r3, r4
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldrh	r2, [fp, #-22]
	ldr	r1, .L987
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r2, r1, r3
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	str	r3, [sp]
	ldr	r3, [fp, #-16]
	ldr	r2, .L987+4
	ldr	r1, .L987+8
	mov	r0, #44
	bl	sim_log_debug
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L983:
	ldr	r3, [fp, #-16]
	cmp	r3, #19
	ble	.L984
	mov	r3, #20
	str	r3, [fp, #-16]
	b	.L985
.L986:
	ldrh	r2, [fp, #-22]
	ldr	r1, .L987
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldrh	r3, [fp, #-22]
	mov	r1, r2
	mov	r0, r3
	bl	sim_noise_add
	ldrh	r3, [fp, #-22]
	mov	r0, r3
	bl	arrangeKey
	ldrh	r2, [fp, #-22]
	ldr	r1, .L987
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldrh	r4, [fp, #-22]
	mov	r0, r3
	bl	search_bin_num
	mov	r3, r0
	mov	r1, r3
	ldr	r2, .L987
	mov	r3, r4
	lsl	r3, r3, #4
	add	r3, r3, r4
	lsl	r3, r3, #2
	add	r3, r2, r3
	add	r3, r3, #19
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L985:
	ldrh	r2, [fp, #-22]
	ldr	r1, .L987
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #60
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	cmp	r2, r3
	bhi	.L986
	ldrh	r2, [fp, #-22]
	ldr	r1, .L987
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #64
	mov	r2, #1
	strb	r2, [r3]
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L988:
	.align	2
.L987:
	.word	noiseData
	.word	.LC108
	.word	.LC109
	.size	makeNoiseModel, .-makeNoiseModel
	.align	2
	.global	search_bin_num
	.syntax unified
	.arm
	.fpu softvfp
	.type	search_bin_num, %function
search_bin_num:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	mov	r3, r0
	strb	r3, [fp, #-13]
	mvn	r3, #114
	strb	r3, [fp, #-13]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	add	r3, r3, #115
	ldr	r2, .L991
	smull	r1, r2, r3, r2
	asr	r2, r2, #1
	asr	r3, r3, #31
	sub	r3, r2, r3
	and	r3, r3, #255
	add	r3, r3, #1
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
.L992:
	.align	2
.L991:
	.word	1717986919
	.size	search_bin_num, .-search_bin_num
	.section	.rodata
	.align	2
.LC110:
	.ascii	"Adding noise value %hhi\012\000"
	.align	2
.LC111:
	.ascii	"Inserting %p into table %p with key \000"
	.align	2
.LC112:
	.ascii	"%0.3hhi \000"
	.text
	.align	2
	.global	sim_noise_add
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_add, %function
sim_noise_add:
	@ args = 0, pretend = 0, frame = 40
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #48
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-38]	@ movhi
	mov	r3, r2
	strb	r3, [fp, #-39]
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1000
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #48
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldrh	r2, [fp, #-38]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	ldr	r2, .L1000
	add	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-20]
	bl	hashtable_search
	str	r0, [fp, #-28]
	ldrb	r3, [fp, #-39]	@ zero_extendqisi2
	ldr	r2, .L1000+4
	ldr	r1, .L1000+8
	mov	r0, #13
	bl	sim_log_debug
	ldr	r3, [fp, #-28]
	cmp	r3, #0
	bne	.L994
	mov	r0, #480
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-28]
	mov	r2, #20
	ldr	r1, [fp, #-16]
	mov	r0, r3
	bl	memcpy
	ldr	r3, [fp, #-28]
	mov	r2, #0
	str	r2, [r3, #20]
	ldr	r3, [fp, #-28]
	mov	r2, #8
	str	r2, [r3, #24]
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #24]
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	mov	r2, r3
	ldr	r3, [fp, #-28]
	str	r2, [r3, #28]
	ldr	r3, [fp, #-28]
	ldr	r0, [r3, #28]
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #24]
	mov	r2, r3
	mov	r1, #0
	bl	memset
	ldr	r3, [fp, #-28]
	mov	r2, #0
	strb	r2, [r3, #32]
	mov	r3, #0
	str	r3, [fp, #-32]
	b	.L995
.L996:
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-32]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3, #4]	@ float
	ldr	r3, [fp, #-32]
	add	r3, r3, #1
	str	r3, [fp, #-32]
.L995:
	ldr	r3, [fp, #-32]
	cmp	r3, #110
	ble	.L996
	ldr	r2, [fp, #-28]
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-20]
	bl	hashtable_insert
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	ldr	r3, [fp, #-28]
	ldr	r2, .L1000+12
	ldr	r1, .L1000+8
	mov	r0, #14
	bl	sim_log_debug
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L997
.L998:
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, .L1000+16
	ldr	r1, .L1000+8
	mov	r0, #15
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L997:
	ldr	r3, [fp, #-24]
	cmp	r3, #19
	ble	.L998
	ldr	r2, .L1000+20
	ldr	r1, .L1000+8
	mov	r0, #16
	bl	sim_log_debug_clear
.L994:
	ldr	r3, [fp, #-28]
	ldr	r2, [r3, #20]
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #24]
	cmp	r2, r3
	bne	.L999
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #24]
	lsl	r3, r3, #1
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-28]
	ldr	r1, [r3, #28]
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #24]
	mov	r2, r3
	ldr	r0, [fp, #-8]
	bl	memcpy
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #28]
	mov	r0, r3
	bl	free
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-8]
	str	r2, [r3, #28]
	ldr	r3, [fp, #-28]
	ldr	r2, [fp, #-12]
	str	r2, [r3, #24]
.L999:
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #28]
	ldr	r2, [fp, #-28]
	ldr	r2, [r2, #20]
	add	r3, r3, r2
	ldrb	r2, [fp, #-39]
	strb	r2, [r3]
	ldr	r3, [fp, #-28]
	ldr	r3, [r3, #20]
	add	r2, r3, #1
	ldr	r3, [fp, #-28]
	str	r2, [r3, #20]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1001:
	.align	2
.L1000:
	.word	noiseData
	.word	.LC110
	.word	.LC109
	.word	.LC111
	.word	.LC112
	.word	.LC101
	.size	sim_noise_add, .-sim_noise_add
	.align	2
	.global	arrangeKey
	.syntax unified
	.arm
	.fpu softvfp
	.type	arrangeKey, %function
arrangeKey:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	mov	r3, r0
	strh	r3, [fp, #-14]	@ movhi
	ldrh	r2, [fp, #-14]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	ldr	r2, .L1003
	add	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	mov	r2, #19
	mov	r1, r3
	ldr	r0, [fp, #-8]
	bl	memcpy
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1004:
	.align	2
.L1003:
	.word	noiseData
	.size	arrangeKey, .-arrangeKey
	.section	.rodata
	.align	2
.LC113:
	.ascii	"FreqKey = \000"
	.align	2
.LC114:
	.ascii	"HASH\000"
	.align	2
.LC115:
	.ascii	"%d,\000"
	.text
	.align	2
	.global	makePmfDistr
	.syntax unified
	.arm
	.fpu softvfp
	.type	makePmfDistr, %function
makePmfDistr:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	mov	r3, r0
	strh	r3, [fp, #-30]	@ movhi
	ldrh	r2, [fp, #-30]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	ldr	r2, .L1012
	add	r3, r3, r2
	str	r3, [fp, #-20]
	ldrh	r2, [fp, #-30]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, #16
	ldr	r2, .L1012
	add	r3, r3, r2
	add	r3, r3, #4
	str	r3, [fp, #-16]
	ldr	r3, .L1012+4
	mov	r2, #0
	str	r2, [r3]
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L1006
.L1007:
	ldrh	r2, [fp, #-30]
	ldr	r1, .L1012
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldrb	r1, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-20]
	add	r4, r2, r3
	mov	r0, r1
	bl	search_bin_num
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L1006:
	ldr	r3, [fp, #-24]
	cmp	r3, #19
	ble	.L1007
	mov	r3, #20
	str	r3, [fp, #-24]
	b	.L1008
.L1009:
	ldrh	r3, [fp, #-30]
	mov	r0, r3
	bl	sim_noise_dist
	ldrh	r3, [fp, #-30]
	mov	r0, r3
	bl	arrangeKey
	ldrh	r2, [fp, #-30]
	ldr	r1, .L1012
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	add	r3, r2, r3
	ldrb	r2, [r3]	@ zero_extendqisi2
	ldr	r3, [fp, #-20]
	add	r4, r3, #19
	mov	r0, r2
	bl	search_bin_num
	mov	r3, r0
	strb	r3, [r4]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L1008:
	ldrh	r2, [fp, #-30]
	ldr	r1, .L1012
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #60
	ldr	r2, [r3]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	bhi	.L1009
	ldr	r2, .L1012+8
	ldr	r1, .L1012+12
	mov	r0, #21
	bl	sim_log_debug_clear
	mov	r3, #0
	str	r3, [fp, #-24]
	b	.L1010
.L1011:
	ldr	r3, [fp, #-24]
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, .L1012+16
	ldr	r1, .L1012+12
	mov	r0, #22
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L1010:
	ldr	r3, [fp, #-24]
	cmp	r3, #19
	ble	.L1011
	ldr	r2, .L1012+20
	ldr	r1, .L1012+12
	mov	r0, #23
	bl	sim_log_debug_clear
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1013:
	.align	2
.L1012:
	.word	noiseData
	.word	FreqKeyNum
	.word	.LC113
	.word	.LC114
	.word	.LC115
	.word	.LC101
	.size	makePmfDistr, .-makePmfDistr
	.section	.rodata
	.align	2
.LC116:
	.ascii	"Noise is found to be %i\012\000"
	.align	2
.LC117:
	.ascii	"Noise_output\000"
	.global	__aeabi_fadd
	.global	__aeabi_i2f
	.global	__aeabi_fdiv
	.align	2
.LC118:
	.ascii	"Setting most frequent key (%i): \000"
	.align	2
.LC119:
	.ascii	"HashZeroDebug\000"
	.align	2
.LC120:
	.ascii	"[%hhu] \000"
	.text
	.align	2
	.global	sim_noise_dist
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_dist, %function
sim_noise_dist:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #52
	mov	r3, r0
	strh	r3, [fp, #-54]	@ movhi
	mov	r3, #0
	str	r3, [fp, #-40]	@ float
	ldrh	r2, [fp, #-54]
	ldr	r1, .L1026
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #48
	ldr	r3, [r3]
	str	r3, [fp, #-32]
	ldrh	r2, [fp, #-54]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	ldr	r2, .L1026
	add	r3, r3, r2
	str	r3, [fp, #-28]
	ldrh	r2, [fp, #-54]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, #16
	ldr	r2, .L1026
	add	r3, r3, r2
	add	r3, r3, #4
	str	r3, [fp, #-24]
	ldr	r1, [fp, #-28]
	ldr	r0, [fp, #-32]
	bl	hashtable_search
	str	r0, [fp, #-20]
	ldr	r3, [fp, #-20]
	ldrb	r3, [r3, #32]	@ zero_extendqisi2
	cmp	r3, #1
	beq	.L1025
	mov	r3, #0
	str	r3, [fp, #-44]
	b	.L1017
.L1018:
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-44]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	mov	r2, #0
	str	r2, [r3, #4]	@ float
	ldr	r3, [fp, #-44]
	add	r3, r3, #1
	str	r3, [fp, #-44]
.L1017:
	ldr	r3, [fp, #-44]
	cmp	r3, #110
	ble	.L1018
	mov	r3, #0
	str	r3, [fp, #-44]
	b	.L1019
.L1020:
	ldr	r3, [fp, #-20]
	ldr	r2, [r3, #28]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, .L1026+4
	ldr	r1, .L1026+8
	mov	r0, #17
	bl	sim_log_debug
	ldr	r3, [fp, #-20]
	ldr	r2, [r3, #28]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	add	r3, r3, #115
	strb	r3, [fp, #-45]
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #4]	@ float
	str	r3, [fp, #-16]	@ float
	mov	r1, #1065353216
	ldr	r0, [fp, #-16]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [fp, #-16]	@ float
	ldrb	r3, [fp, #-45]	@ zero_extendqisi2
	ldr	r2, [fp, #-20]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [fp, #-16]	@ float
	str	r2, [r3, #4]	@ float
	ldr	r3, [fp, #-44]
	add	r3, r3, #1
	str	r3, [fp, #-44]
.L1019:
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #20]
	ldr	r2, [fp, #-44]
	cmp	r2, r3
	blt	.L1020
	mov	r3, #0
	str	r3, [fp, #-44]
	b	.L1021
.L1022:
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-44]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r4, [r3, #4]	@ float
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #20]
	mov	r0, r3
	bl	__aeabi_i2f
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	__aeabi_fdiv
	mov	r3, r0
	mov	r1, r3
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-44]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	str	r1, [r3, #4]	@ float
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-44]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #4]	@ float
	mov	r1, r3
	ldr	r0, [fp, #-40]	@ float
	bl	__aeabi_fadd
	mov	r3, r0
	str	r3, [fp, #-40]	@ float
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-44]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r2, [fp, #-40]	@ float
	str	r2, [r3, #4]	@ float
	ldr	r3, [fp, #-44]
	add	r3, r3, #1
	str	r3, [fp, #-44]
.L1021:
	ldr	r3, [fp, #-44]
	cmp	r3, #110
	ble	.L1022
	ldr	r3, [fp, #-20]
	mov	r2, #1
	strb	r2, [r3, #32]
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #20]
	mov	r2, r3
	ldr	r3, .L1026+12
	ldr	r3, [r3]
	cmp	r2, r3
	bls	.L1014
	ldr	r3, [fp, #-20]
	ldr	r3, [r3, #20]
	mov	r2, r3
	ldr	r3, .L1026+12
	str	r2, [r3]
	mov	r2, #20
	ldr	r1, [fp, #-28]
	ldr	r0, [fp, #-24]
	bl	memcpy
	ldr	r3, .L1026+12
	ldr	r3, [r3]
	ldr	r2, .L1026+16
	ldr	r1, .L1026+20
	mov	r0, #18
	bl	sim_log_debug
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L1023
.L1024:
	ldr	r3, [fp, #-36]
	ldr	r2, [fp, #-28]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, .L1026+24
	ldr	r1, .L1026+20
	mov	r0, #19
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L1023:
	ldr	r3, [fp, #-36]
	cmp	r3, #19
	ble	.L1024
	ldr	r2, .L1026+28
	ldr	r1, .L1026+20
	mov	r0, #20
	bl	sim_log_debug_clear
	b	.L1014
.L1025:
	nop
.L1014:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1027:
	.align	2
.L1026:
	.word	noiseData
	.word	.LC116
	.word	.LC117
	.word	FreqKeyNum
	.word	.LC118
	.word	.LC119
	.word	.LC120
	.word	.LC101
	.size	sim_noise_dist, .-sim_noise_dist
	.section	.rodata
	.align	2
.LC121:
	.ascii	"Adding noise value %i for %i of %i\012\000"
	.text
	.align	2
	.global	sim_noise_trace_add
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_trace_add, %function
sim_noise_trace_add:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	mov	r3, r0
	mov	r2, r1
	strh	r3, [fp, #-14]	@ movhi
	mov	r3, r2
	strb	r3, [fp, #-15]
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #60
	ldr	r1, [r3]
	ldrh	r2, [fp, #-14]
	ldr	r0, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #56
	ldr	r3, [r3]
	cmp	r1, r3
	bne	.L1029
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #56
	ldr	r3, [r3]
	lsl	r3, r3, #1
	mov	r0, r3
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r1, [r3]
	ldrh	r2, [fp, #-14]
	ldr	r0, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #56
	ldr	r3, [r3]
	mov	r2, r3
	ldr	r0, [fp, #-8]
	bl	memcpy
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r3, [r3]
	mov	r0, r3
	bl	free
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #56
	ldr	r3, [r3]
	ldrh	r2, [fp, #-14]
	lsl	r1, r3, #1
	ldr	r0, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #56
	str	r1, [r3]
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [fp, #-8]
	str	r2, [r3]
.L1029:
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r1, [r3]
	ldrh	r2, [fp, #-14]
	ldr	r0, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #60
	ldr	r3, [r3]
	add	r3, r1, r3
	ldrb	r2, [fp, #-15]
	strb	r2, [r3]
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #60
	ldr	r3, [r3]
	add	r1, r3, #1
	ldr	r0, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r0, r3
	add	r3, r3, #60
	str	r1, [r3]
	ldrh	r2, [fp, #-14]
	ldr	r1, .L1030
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #60
	ldr	r3, [r3]
	mov	r1, r3
	ldrh	r3, [fp, #-14]
	ldrb	r2, [fp, #-15]	@ zero_extendqisi2
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, r1
	ldr	r2, .L1030+4
	ldr	r1, .L1030+8
	mov	r0, #12
	bl	sim_log_debug
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1031:
	.align	2
.L1030:
	.word	noiseData
	.word	.LC121
	.word	.LC109
	.size	sim_noise_trace_add, .-sim_noise_trace_add
	.align	2
	.global	search_noise_from_bin_num
	.syntax unified
	.arm
	.fpu softvfp
	.type	search_noise_from_bin_num, %function
search_noise_from_bin_num:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	sub	r3, r3, #1
	and	r3, r3, #255
	mov	r2, r3
	lsl	r2, r2, #2
	add	r3, r2, r3
	and	r3, r3, #255
	sub	r3, r3, #115
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	search_noise_from_bin_num, .-search_noise_from_bin_num
	.section	.rodata
	.align	2
.LC122:
	.ascii	"Did not pattern match\000"
	.align	2
.LC123:
	.ascii	"Noise_c\000"
	.align	2
.LC124:
	.ascii	"(N)Noise\012\000"
	.align	2
.LC125:
	.ascii	"Defaulting to common hash.\012\000"
	.align	2
.LC126:
	.ascii	"Key = \000"
	.align	2
.LC127:
	.ascii	"Printing Key\012\000"
	.align	2
.LC128:
	.ascii	"noise_hash->numElements=%d\012\000"
	.align	2
.LC129:
	.ascii	"(E)Noise = %d\012\000"
	.align	2
.LC130:
	.ascii	"In case 1: %i of %i\012\000"
	.align	2
.LC131:
	.ascii	"Noise: %i\012\000"
	.align	2
.LC132:
	.ascii	"NoiseAudit\000"
	.align	2
.LC133:
	.ascii	"In case 2: %i of %i\012\000"
	.align	2
.LC134:
	.ascii	"IN:for i=%d\012\000"
	.align	2
.LC135:
	.ascii	"Selected Bin = %d -> \000"
	.align	2
.LC136:
	.ascii	"OUT:for i=%d\012\000"
	.text
	.align	2
	.global	sim_noise_gen
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_gen, %function
sim_noise_gen:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #56
	mov	r3, r0
	strh	r3, [fp, #-46]	@ movhi
	mov	r3, #0
	str	r3, [fp, #-28]
	ldrh	r2, [fp, #-46]
	ldr	r1, .L1051
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #48
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldrh	r2, [fp, #-46]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	ldr	r2, .L1051
	add	r3, r3, r2
	str	r3, [fp, #-20]
	ldrh	r2, [fp, #-46]
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r3, #16
	ldr	r2, .L1051
	add	r3, r3, r2
	add	r3, r3, #4
	str	r3, [fp, #-16]
	bl	RandomUniform
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r1, [fp, #-20]
	ldr	r0, [fp, #-24]
	bl	hashtable_search
	str	r0, [fp, #-32]
	ldr	r3, [fp, #-32]
	cmp	r3, #0
	bne	.L1035
	ldr	r2, .L1051+4
	ldr	r1, .L1051+8
	mov	r0, #24
	bl	sim_log_debug
	bl	sim_noise_alarm
	mov	r3, #0
	strb	r3, [fp, #-37]
	ldr	r2, .L1051+12
	ldr	r1, .L1051+16
	mov	r0, #25
	bl	sim_log_debug_clear
	ldr	r2, .L1051+20
	ldr	r1, .L1051+24
	mov	r0, #26
	bl	sim_log_debug
	mov	r2, #20
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-20]
	bl	memcpy
	ldr	r1, [fp, #-20]
	ldr	r0, [fp, #-24]
	bl	hashtable_search
	str	r0, [fp, #-32]
.L1035:
	ldr	r2, .L1051+28
	ldr	r1, .L1051+16
	mov	r0, #27
	bl	sim_log_debug_clear
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L1036
.L1037:
	ldr	r3, [fp, #-36]
	ldr	r2, [fp, #-20]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldr	r2, .L1051+32
	ldr	r1, .L1051+16
	mov	r0, #28
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L1036:
	ldr	r3, [fp, #-36]
	cmp	r3, #19
	ble	.L1037
	ldr	r2, .L1051+36
	ldr	r1, .L1051+16
	mov	r0, #29
	bl	sim_log_debug_clear
	ldr	r2, .L1051+40
	ldr	r1, .L1051+16
	mov	r0, #30
	bl	sim_log_debug
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #20]
	ldr	r2, .L1051+44
	ldr	r1, .L1051+16
	mov	r0, #31
	bl	sim_log_debug
	ldr	r3, .L1051+48
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L1051+48
	str	r3, [r2]
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #20]
	cmp	r3, #1
	bne	.L1038
	ldr	r3, [fp, #-32]
	ldr	r3, [r3, #28]
	ldrb	r3, [r3]
	strb	r3, [fp, #-37]
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	ldr	r2, .L1051+52
	ldr	r1, .L1051+16
	mov	r0, #32
	bl	sim_log_debug_clear
	ldr	r3, .L1051+56
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L1051+56
	str	r3, [r2]
	ldr	r3, .L1051+56
	ldr	r2, [r3]
	ldr	r3, .L1051+48
	ldr	r3, [r3]
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L1051+60
	ldr	r1, .L1051+8
	mov	r0, #33
	bl	sim_log_debug
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	ldr	r2, .L1051+64
	ldr	r1, .L1051+68
	mov	r0, #34
	bl	sim_log_debug
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	b	.L1039
.L1038:
	ldr	r3, .L1051+72
	ldr	r3, [r3]
	add	r3, r3, #1
	ldr	r2, .L1051+72
	str	r3, [r2]
	ldr	r3, .L1051+72
	ldr	r2, [r3]
	ldr	r3, .L1051+48
	ldr	r3, [r3]
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L1051+76
	ldr	r1, .L1051+8
	mov	r0, #35
	bl	sim_log_debug
	mov	r3, #0
	str	r3, [fp, #-36]
	b	.L1040
.L1047:
	ldr	r3, [fp, #-36]
	ldr	r2, .L1051+80
	ldr	r1, .L1051+16
	mov	r0, #36
	bl	sim_log_debug
	ldr	r3, [fp, #-36]
	cmp	r3, #0
	bne	.L1041
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-36]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #4]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L1042
	ldr	r3, [fp, #-36]
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	ldr	r2, .L1051+84
	ldr	r1, .L1051+16
	mov	r0, #37
	bl	sim_log_debug_clear
	b	.L1044
.L1041:
	ldr	r3, [fp, #-36]
	sub	r3, r3, #1
	ldr	r2, [fp, #-32]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #4]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpgt
	mov	r3, r0
	cmp	r3, #0
	beq	.L1042
	ldr	r2, [fp, #-32]
	ldr	r3, [fp, #-36]
	add	r3, r3, #8
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3, #4]	@ float
	mov	r0, r3
	bl	__aeabi_f2d
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L1042
	ldr	r3, [fp, #-36]
	str	r3, [fp, #-28]
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	ldr	r2, .L1051+84
	ldr	r1, .L1051+16
	mov	r0, #38
	bl	sim_log_debug_clear
	b	.L1044
.L1042:
	ldr	r3, [fp, #-36]
	add	r3, r3, #1
	str	r3, [fp, #-36]
.L1040:
	ldr	r3, [fp, #-36]
	cmp	r3, #109
	ble	.L1047
.L1044:
	ldr	r3, [fp, #-36]
	ldr	r2, .L1051+88
	ldr	r1, .L1051+16
	mov	r0, #39
	bl	sim_log_debug
	ldr	r3, [fp, #-36]
	and	r3, r3, #255
	sub	r3, r3, #115
	strb	r3, [fp, #-37]
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	ldr	r2, .L1051+64
	ldr	r1, .L1051+68
	mov	r0, #40
	bl	sim_log_debug
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
.L1039:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1052:
	.align	2
.L1051:
	.word	noiseData
	.word	.LC122
	.word	.LC123
	.word	.LC124
	.word	.LC114
	.word	.LC125
	.word	.LC119
	.word	.LC126
	.word	.LC115
	.word	.LC101
	.word	.LC127
	.word	.LC128
	.word	numTotal
	.word	.LC129
	.word	numCase1
	.word	.LC130
	.word	.LC131
	.word	.LC132
	.word	numCase2
	.word	.LC133
	.word	.LC134
	.word	.LC135
	.word	.LC136
	.size	sim_noise_gen, .-sim_noise_gen
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	RandomUniform, %function
RandomUniform:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	ldr	r3, .L1067
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1054
	bl	sim_random
	mov	r2, r0
	ldr	r3, .L1067+4
	smull	r1, r3, r2, r3
	add	r3, r3, r2
	asr	r1, r3, #14
	asr	r3, r2, #31
	sub	r1, r1, r3
	mov	r3, r1
	lsl	r3, r3, #4
	sub	r3, r3, r1
	lsl	r3, r3, #4
	add	r3, r3, r1
	lsl	r0, r3, #6
	add	r3, r3, r0
	lsl	r3, r3, #1
	sub	r3, r3, r1
	sub	r3, r2, r3
	str	r3, [fp, #-20]
	bl	sim_random
	mov	r3, r0
	ldr	r2, .L1067+8
	smull	r1, r2, r3, r2
	add	r2, r2, r3
	asr	r1, r2, #14
	asr	r2, r3, #31
	sub	r2, r1, r2
	ldr	r1, .L1067+12
	mul	r2, r1, r2
	sub	r3, r3, r2
	str	r3, [fp, #-16]
	ldr	r1, [fp, #-16]
	ldr	r0, [fp, #-20]
	bl	RandomInitialise
.L1054:
	ldr	r3, .L1067+16
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L1067+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r3, .L1067+24
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L1067+20
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L1055
	mov	r2, #0
	ldr	r3, .L1067+28
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
.L1055:
	ldr	r3, .L1067+16
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L1067+20
	lsl	r3, r3, #3
	add	r1, r2, r3
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, .L1067+16
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L1067+16
	str	r3, [r2]
	ldr	r3, .L1067+16
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1057
	ldr	r3, .L1067+16
	mov	r2, #97
	str	r2, [r3]
.L1057:
	ldr	r3, .L1067+24
	ldr	r3, [r3]
	sub	r3, r3, #1
	ldr	r2, .L1067+24
	str	r3, [r2]
	ldr	r3, .L1067+24
	ldr	r3, [r3]
	cmp	r3, #0
	bne	.L1058
	ldr	r3, .L1067+24
	mov	r2, #97
	str	r2, [r3]
.L1058:
	ldr	r3, .L1067+32
	ldmia	r3, {r0-r1}
	ldr	r3, .L1067+36
	ldmia	r3, {r2-r3}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L1067+32
	stm	r1, {r2-r3}
	ldr	r3, .L1067+32
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L1059
	ldr	r3, .L1067+32
	ldmia	r3, {r0-r1}
	ldr	r3, .L1067+40
	ldmia	r3, {r2-r3}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	ldr	r1, .L1067+32
	stm	r1, {r2-r3}
.L1059:
	ldr	r3, .L1067+32
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dsub
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L1061
	mov	r2, #0
	ldr	r3, .L1067+28
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
.L1061:
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1068:
	.align	2
.L1067:
	.word	test
	.word	-2048845677
	.word	-1955736387
	.word	30082
	.word	i97
	.word	randU
	.word	j97
	.word	1072693248
	.word	randC
	.word	randCD
	.word	randCM
	.size	RandomUniform, .-RandomUniform
	.section	.rodata
	.align	2
.LC137:
	.ascii	"Tried to generate noise from an uninitialized radio"
	.ascii	" model of node %hu.\012\000"
	.align	2
.LC138:
	.ascii	"TOSSIM\000"
	.align	2
.LC139:
	.ascii	"delta_t = %d\012\000"
	.align	2
.LC140:
	.ascii	"Generated noise of zero.\012\000"
	.text
	.align	2
	.global	sim_noise_generate
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_noise_generate, %function
sim_noise_generate:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	mov	r3, r0
	str	r1, [fp, #-44]
	strh	r3, [fp, #-38]	@ movhi
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #44
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #64
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1070
	ldrh	r3, [fp, #-38]
	ldr	r2, .L1080+4
	ldr	r1, .L1080+8
	mov	r0, #41
	bl	sim_log_error
	mov	r3, #127
	b	.L1071
.L1070:
	ldr	r3, [fp, #-44]
	cmp	r3, #19
	bhi	.L1072
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #44
	ldr	r2, [fp, #-44]
	str	r2, [r3]
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldrh	r4, [fp, #-38]
	mov	r0, r3
	bl	search_bin_num
	mov	r3, r0
	mov	r1, r3
	ldr	r2, .L1080
	mov	r3, r4
	lsl	r3, r3, #4
	add	r3, r3, r4
	lsl	r3, r3, #2
	add	r2, r2, r3
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	mov	r2, r1
	strb	r2, [r3]
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldrh	r2, [fp, #-38]
	ldrb	r0, [r3]	@ zero_extendqisi2
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #40
	mov	r2, r0
	strb	r2, [r3]
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #52
	ldr	r2, [r3]
	ldr	r3, [fp, #-44]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	b	.L1071
.L1072:
	ldr	r3, [fp, #-20]
	cmp	r3, #0
	bne	.L1073
	ldr	r3, [fp, #-44]
	sub	r3, r3, #19
	str	r3, [fp, #-24]
	b	.L1074
.L1073:
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-20]
	sub	r3, r2, r3
	str	r3, [fp, #-24]
.L1074:
	ldr	r3, [fp, #-24]
	ldr	r2, .L1080+12
	ldr	r1, .L1080+16
	mov	r0, #42
	bl	sim_log_debug_clear
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bne	.L1075
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #40
	ldrb	r3, [r3]
	strb	r3, [fp, #-29]
	b	.L1076
.L1075:
	ldr	r0, [fp, #-24]
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-28]
	b	.L1077
.L1078:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-28]
	add	r4, r2, r3
	ldrh	r3, [fp, #-38]
	mov	r0, r3
	bl	sim_noise_gen
	mov	r3, r0
	strb	r3, [r4]
	ldrh	r3, [fp, #-38]
	mov	r0, r3
	bl	arrangeKey
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	ldrh	r4, [fp, #-38]
	mov	r0, r3
	bl	search_bin_num
	mov	r3, r0
	mov	r1, r3
	ldr	r2, .L1080
	mov	r3, r4
	lsl	r3, r3, #4
	add	r3, r3, r4
	lsl	r3, r3, #2
	add	r3, r2, r3
	add	r3, r3, #19
	mov	r2, r1
	strb	r2, [r3]
	ldr	r3, [fp, #-28]
	add	r3, r3, #1
	str	r3, [fp, #-28]
.L1077:
	ldr	r2, [fp, #-28]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	bcc	.L1078
	ldr	r3, [fp, #-24]
	sub	r3, r3, #1
	ldr	r2, [fp, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]
	strb	r3, [fp, #-29]
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #40
	ldrb	r2, [fp, #-29]
	strb	r2, [r3]
	ldr	r0, [fp, #-16]
	bl	free
.L1076:
	ldrh	r2, [fp, #-38]
	ldr	r1, .L1080
	mov	r3, r2
	lsl	r3, r3, #4
	add	r3, r3, r2
	lsl	r3, r3, #2
	add	r3, r1, r3
	add	r3, r3, #44
	ldr	r2, [fp, #-44]
	str	r2, [r3]
	ldrb	r3, [fp, #-29]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1079
	ldr	r2, .L1080+20
	ldr	r1, .L1080+24
	mov	r0, #43
	bl	sim_log_debug
.L1079:
	ldrb	r3, [fp, #-29]	@ zero_extendqisi2
.L1071:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1081:
	.align	2
.L1080:
	.word	noiseData
	.word	.LC137
	.word	.LC138
	.word	.LC139
	.word	.LC114
	.word	.LC140
	.word	.LC119
	.size	sim_noise_generate, .-sim_noise_generate
	.section	.rodata
	.align	2
.LC141:
	.ascii	"ERROR (%i): \000"
	.align	2
.LC142:
	.word	__stack_chk_guard
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_log_error, %function
sim_log_error:
	@ args = 4, pretend = 8, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 1
	push	{r2, r3}
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	mov	r3, r0
	str	r1, [fp, #-28]
	strh	r3, [fp, #-22]	@ movhi
	ldr	r3, [fp, #4]
	str	r3, [fp, #-32]
	ldr	r3, .L1087
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	ldrh	r3, [fp, #-22]
	ldr	r2, .L1087+4
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r3, [r3, #4]
	cmp	r3, #0
	bne	.L1083
	ldrh	r3, [fp, #-22]
	ldr	r1, [fp, #-28]
	mov	r0, r3
	bl	fillInOutput
.L1083:
	mov	r3, #0
	str	r3, [fp, #-16]
	b	.L1084
.L1085:
	ldrh	r3, [fp, #-22]
	ldr	r2, .L1087+4
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, [r3, #4]
	ldr	r3, [fp, #-16]
	lsl	r3, r3, #2
	add	r3, r2, r3
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	add	r3, fp, #8
	str	r3, [fp, #-20]
	bl	sim_node
	mov	r3, r0
	mov	r2, r3
	ldr	r1, .L1087+8
	ldr	r0, [fp, #-12]
	bl	fprintf
	ldr	r2, [fp, #-20]
	ldr	r1, [fp, #-32]
	ldr	r0, [fp, #-12]
	bl	vfprintf
	ldr	r0, [fp, #-12]
	bl	fflush
	ldr	r3, [fp, #-16]
	add	r3, r3, #1
	str	r3, [fp, #-16]
.L1084:
	ldrh	r3, [fp, #-22]
	ldr	r2, .L1087+4
	ldr	r3, [r2, r3, lsl #3]
	ldr	r2, [fp, #-16]
	cmp	r2, r3
	blt	.L1085
	nop
	ldr	r3, .L1087
	ldr	r2, [r3]
	ldr	r3, [fp, #-8]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L1086
	bl	__stack_chk_fail
.L1086:
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, lr}
	add	sp, sp, #8
	bx	lr
.L1088:
	.align	2
.L1087:
	.word	.LC142
	.word	outputs
	.word	.LC141
	.size	sim_log_error, .-sim_log_error
	.align	2
	.global	sim_packet_set_source
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_set_source, %function
sim_packet_set_source:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strh	r3, [fp, #-18]	@ movhi
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #2
	ldrh	r2, [fp, #-18]
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint16
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_set_source, .-sim_packet_set_source
	.align	2
	.global	sim_packet_source
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_source, %function
sim_packet_source:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #2
	mov	r0, r3
	bl	__nesc_ntoh_uint16
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_source, .-sim_packet_source
	.align	2
	.global	sim_packet_set_destination
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_set_destination, %function
sim_packet_set_destination:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strh	r3, [fp, #-18]	@ movhi
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldrh	r2, [fp, #-18]
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint16
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_set_destination, .-sim_packet_set_destination
	.align	2
	.global	sim_packet_destination
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_destination, %function
sim_packet_destination:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	__nesc_ntoh_uint16
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_destination, .-sim_packet_destination
	.align	2
	.global	sim_packet_set_length
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_set_length, %function
sim_packet_set_length:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strb	r3, [fp, #-17]
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	ldrb	r2, [fp, #-17]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint8
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_set_length, .-sim_packet_set_length
	.align	2
	.global	sim_packet_length
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_length, %function
sim_packet_length:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #4
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_length, .-sim_packet_length
	.align	2
	.global	sim_packet_set_type
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_set_type, %function
sim_packet_set_type:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strb	r3, [fp, #-17]
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #6
	ldrb	r2, [fp, #-17]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint8
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_set_type, .-sim_packet_set_type
	.align	2
	.global	sim_packet_type
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_type, %function
sim_packet_type:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #6
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_type, .-sim_packet_type
	.align	2
	.global	sim_packet_data
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_data, %function
sim_packet_data:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #7
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sim_packet_data, .-sim_packet_data
	.align	2
	.global	sim_packet_set_strength
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_set_strength, %function
sim_packet_set_strength:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strh	r3, [fp, #-18]	@ movhi
	ldr	r3, [fp, #-16]
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	add	r3, r3, #37
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-8]
	ldrh	r3, [fp, #-18]	@ movhi
	lsl	r3, r3, #24
	asr	r3, r3, #24
	mov	r1, r3
	mov	r0, r2
	bl	__nesc_hton_int8
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_packet_set_strength, .-sim_packet_set_strength
	.section	.rodata
	.align	2
.LC143:
	.ascii	"sim_packet.c: Delivering packet %p to %i at %llu\012"
	.ascii	"\000"
	.text
	.align	2
	.global	sim_packet_deliver
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_deliver, %function
sim_packet_deliver:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	bl	sim_time
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	cmp	r2, r0
	sbcs	r3, r3, r1
	bge	.L1105
	bl	sim_time
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
.L1105:
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	ldr	r3, [fp, #-8]
	str	r3, [sp]
	ldr	r3, [fp, #-12]
	ldr	r2, .L1106
	ldr	r1, .L1106+4
	mov	r0, #45
	bl	sim_log_debug
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-12]
	ldr	r0, [fp, #-8]
	bl	active_message_deliver
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1107:
	.align	2
.L1106:
	.word	.LC143
	.word	.LC2
	.size	sim_packet_deliver, .-sim_packet_deliver
	.align	2
	.global	active_message_deliver
	.syntax unified
	.arm
	.fpu softvfp
	.type	active_message_deliver, %function
active_message_deliver:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	ldr	r1, [fp, #-20]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$allocate_deliver_event
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	sim_queue_insert
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	active_message_deliver, .-active_message_deliver
	.section	.rodata
	.align	2
.LC144:
	.ascii	"Received active message (%p) of type %hhu and lengt"
	.ascii	"h %hhu for me @ %s.\012\000"
	.align	2
.LC145:
	.ascii	"AM\000"
	.align	2
.LC146:
	.ascii	"Snooped on active message of type %hhu and length %"
	.ascii	"hhu for %hu @ %s.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$Model$receive, %function
TossimActiveMessageC$Model$receive:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, fp, lr}
	add	fp, sp, #16
	sub	sp, sp, #36
	str	r0, [fp, #-32]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #41
	ldr	r1, [fp, #-32]
	mov	r0, r3
	bl	memcpy
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimActiveMessageC$Packet$payloadLength
	mov	r3, r0
	strb	r3, [fp, #-25]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r4, [r2, r3, lsl #2]
	bl	TossimActiveMessageC$Packet$maxPayloadLength
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	TossimActiveMessageC$Packet$getPayload
	str	r0, [fp, #-24]
	ldr	r0, [fp, #-32]
	bl	TossimActiveMessageC$AMPacket$isForMe
	mov	r3, r0
	cmp	r3, #0
	beq	.L1110
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r5, [r2, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimActiveMessageC$AMPacket$type
	mov	r3, r0
	mov	r6, r3
	ldrb	r4, [fp, #-25]	@ zero_extendqisi2
	bl	sim_time_string
	mov	r3, r0
	str	r3, [sp, #8]
	str	r4, [sp, #4]
	str	r6, [sp]
	mov	r3, r5
	ldr	r2, .L1113+4
	ldr	r1, .L1113+8
	mov	r0, #105
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimActiveMessageC$AMPacket$type
	mov	r3, r0
	mov	r6, r3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r5, [r2, r3, lsl #2]
	bl	sim_node
	mov	r4, r0
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	ldr	r2, [fp, #-24]
	mov	r1, r5
	mov	r0, r6
	bl	TossimActiveMessageC$Receive$receive
	mov	r3, r0
	ldr	r2, .L1113
	str	r3, [r2, r4, lsl #2]
	b	.L1112
.L1110:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimActiveMessageC$AMPacket$type
	mov	r3, r0
	mov	r6, r3
	ldrb	r4, [fp, #-25]	@ zero_extendqisi2
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimActiveMessageC$AMPacket$destination
	mov	r3, r0
	mov	r5, r3
	bl	sim_time_string
	mov	r3, r0
	str	r3, [sp, #8]
	str	r5, [sp, #4]
	str	r4, [sp]
	mov	r3, r6
	ldr	r2, .L1113+12
	ldr	r1, .L1113+8
	mov	r0, #106
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	TossimActiveMessageC$AMPacket$type
	mov	r3, r0
	mov	r6, r3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1113
	ldr	r5, [r2, r3, lsl #2]
	bl	sim_node
	mov	r4, r0
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	ldr	r2, [fp, #-24]
	mov	r1, r5
	mov	r0, r6
	bl	TossimActiveMessageC$Snoop$receive
	mov	r3, r0
	ldr	r2, .L1113
	str	r3, [r2, r4, lsl #2]
.L1112:
	nop
	sub	sp, fp, #16
	@ sp needed
	pop	{r4, r5, r6, fp, pc}
.L1114:
	.align	2
.L1113:
	.word	TossimActiveMessageC$bufferPointer
	.word	.LC144
	.word	.LC145
	.word	.LC146
	.size	TossimActiveMessageC$Model$receive, .-TossimActiveMessageC$Model$receive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMPacket$destination, %function
TossimActiveMessageC$AMPacket$destination:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	__nesc_ntoh_uint16
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$AMPacket$destination, .-TossimActiveMessageC$AMPacket$destination
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	ActiveMessageAddressC$ActiveMessageAddress$amAddress, %function
ActiveMessageAddressC$ActiveMessageAddress$amAddress:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1120
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1118
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1120+4
	ldrh	r2, [r2]
	ldr	r1, .L1120+8
	lsl	r3, r3, #1
	add	r3, r1, r3
	strh	r2, [r3]	@ movhi
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1120
	mov	r1, #1
	strb	r1, [r2, r3]
.L1118:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1120+8
	lsl	r3, r3, #1
	add	r3, r2, r3
	ldrh	r3, [r3]
	mov	r0, r3
	pop	{fp, pc}
.L1121:
	.align	2
.L1120:
	.word	ActiveMessageAddressC$set
	.word	TOS_NODE_ID
	.word	ActiveMessageAddressC$addr
	.size	ActiveMessageAddressC$ActiveMessageAddress$amAddress, .-ActiveMessageAddressC$ActiveMessageAddress$amAddress
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMPacket$type, %function
TossimActiveMessageC$AMPacket$type:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	TossimActiveMessageC$getHeader
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	add	r3, r3, #6
	mov	r0, r3
	bl	__nesc_ntoh_uint8
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	TossimActiveMessageC$AMPacket$type, .-TossimActiveMessageC$AMPacket$type
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$startTimer, %function
VirtualizeTimerC$0$startTimer:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	mov	r2, r3
	mov	r3, r0
	strb	r3, [fp, #-13]
	mov	r3, r2
	strb	r3, [fp, #-14]
	bl	sim_node
	mov	r1, r0
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	mov	r2, r3
	lsl	r2, r2, #1
	add	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, .L1125
	add	r3, r3, r2
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-20]
	str	r2, [r3]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #-24]
	str	r2, [r3, #4]
	ldrb	r3, [fp, #-14]
	and	r3, r3, #1
	and	r1, r3, #255
	ldr	r2, [fp, #-8]
	ldrb	r3, [r2, #8]
	and	r1, r1, #1
	bic	r3, r3, #1
	orr	r3, r1, r3
	strb	r3, [r2, #8]
	ldr	r2, [fp, #-8]
	ldrb	r3, [r2, #8]
	orr	r3, r3, #2
	strb	r3, [r2, #8]
	bl	VirtualizeTimerC$0$updateFromTimer$postTask
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1126:
	.align	2
.L1125:
	.word	VirtualizeTimerC$0$m_timers
	.size	VirtualizeTimerC$0$startTimer, .-VirtualizeTimerC$0$startTimer
	.section	.rodata
	.align	2
.LC147:
	.ascii	"Posting task %hhu.\012\000"
	.align	2
.LC148:
	.ascii	"Posting task %hhu, but already posted.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$TaskBasic$postTask, %function
SimSchedulerBasicP$TaskBasic$postTask:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	mov	r3, r0
	strb	r3, [fp, #-13]
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-6]
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	mov	r0, r3
	bl	SimSchedulerBasicP$pushTask
	mov	r3, r0
	cmp	r3, #0
	beq	.L1128
	mov	r3, #0
	b	.L1129
.L1128:
	mov	r3, #5
.L1129:
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1130
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	ldr	r2, .L1133
	ldr	r1, .L1133+4
	mov	r0, #98
	bl	sim_log_debug
	bl	SimSchedulerBasicP$sim_scheduler_submit_event
	b	.L1131
.L1130:
	ldrb	r3, [fp, #-13]	@ zero_extendqisi2
	ldr	r2, .L1133+8
	ldr	r1, .L1133+4
	mov	r0, #99
	bl	sim_log_debug
.L1131:
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1134:
	.align	2
.L1133:
	.word	.LC147
	.word	.LC11
	.word	.LC148
	.size	SimSchedulerBasicP$TaskBasic$postTask, .-SimSchedulerBasicP$TaskBasic$postTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$sim_scheduler_submit_event, %function
SimSchedulerBasicP$sim_scheduler_submit_event:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1138
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1137
	bl	sim_time
	mov	r6, r0
	mov	r7, r1
	bl	SimSchedulerBasicP$sim_config_task_latency
	mov	r3, r0
	mov	r4, r3
	asr	r5, r4, #31
	bl	sim_node
	mov	r3, r0
	adds	r8, r6, r4
	adc	r9, r7, r5
	ldr	r2, .L1138+4
	lsl	r3, r3, #5
	add	r3, r2, r3
	stm	r3, {r8-r9}
	bl	sim_node
	mov	r3, r0
	lsl	r3, r3, #5
	ldr	r2, .L1138+4
	add	r3, r3, r2
	mov	r0, r3
	bl	sim_queue_insert
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1138
	mov	r1, #1
	strb	r1, [r2, r3]
.L1137:
	nop
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L1139:
	.align	2
.L1138:
	.word	SimSchedulerBasicP$sim_scheduler_event_pending
	.word	SimSchedulerBasicP$sim_scheduler_event
	.size	SimSchedulerBasicP$sim_scheduler_submit_event, .-SimSchedulerBasicP$sim_scheduler_submit_event
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Counter$get, %function
Atm128AlarmAsyncP$0$Counter$get:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-18]
	bl	Atm128AlarmAsyncP$0$Timer$get
	mov	r3, r0
	strb	r3, [fp, #-17]
	bl	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag
	mov	r3, r0
	and	r3, r3, #255
	and	r3, r3, #2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1141
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1144
	ldr	r4, [r2, r3, lsl #2]
	bl	Atm128AlarmAsyncP$0$Compare$get
	mov	r3, r0
	add	r4, r4, r3
	bl	Atm128AlarmAsyncP$0$Timer$get
	mov	r3, r0
	add	r3, r4, r3
	add	r3, r3, #1
	str	r3, [fp, #-16]
	b	.L1142
.L1141:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1144
	ldr	r2, [r2, r3, lsl #2]
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	add	r3, r2, r3
	str	r3, [fp, #-16]
.L1142:
	ldrb	r3, [fp, #-18]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	ldr	r3, [fp, #-16]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1145:
	.align	2
.L1144:
	.word	Atm128AlarmAsyncP$0$base
	.size	Atm128AlarmAsyncP$0$Counter$get, .-Atm128AlarmAsyncP$0$Counter$get
	.section	.rodata
	.align	2
.LC149:
	.ascii	"HplAtm128Timer0AsyncP: Getting timer: %hhu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Timer0$get, %function
HplAtm128Timer0AsyncP$Timer0$get:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #16
	bl	sim_time
	mov	r6, r0
	mov	r7, r1
	bl	HplAtm128Timer0AsyncP$last_zero
	mov	r2, r0
	mov	r3, r1
	subs	r8, r6, r2
	sbc	r9, r7, r3
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	HplAtm128Timer0AsyncP$sim_to_clock
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	bl	HplAtm128Timer0AsyncP$shiftFromScale
	mov	r3, r0
	mov	r1, r3
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	rsb	ip, r1, #32
	subs	r0, r1, #32
	lsr	r4, r2, r1
	orr	r4, r4, r3, lsl ip
	bmi	.L1147
	orr	r4, r4, r3, asr r0
.L1147:
	asr	r5, r3, r1
	str	r4, [fp, #-36]
	str	r5, [fp, #-32]
	ldr	r3, [fp, #-36]
	strb	r3, [fp, #-37]
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	ldr	r2, .L1149
	ldr	r1, .L1149+4
	mov	r0, #190
	bl	sim_log_debug
	ldrb	r3, [fp, #-37]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L1150:
	.align	2
.L1149:
	.word	.LC149
	.word	.LC69
	.size	HplAtm128Timer0AsyncP$Timer0$get, .-HplAtm128Timer0AsyncP$Timer0$get
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$last_zero, %function
HplAtm128Timer0AsyncP$last_zero:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1154
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	bne	.L1152
	bl	sim_node
	mov	r3, r0
	mov	r5, r3
	bl	sim_node
	mov	r4, r0
	mov	r0, r5
	bl	sim_mote_start_time
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L1154
	lsl	r1, r4, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
.L1152:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1154
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	pop	{r4, r5, fp, pc}
.L1155:
	.align	2
.L1154:
	.word	HplAtm128Timer0AsyncP$lastZero
	.size	HplAtm128Timer0AsyncP$last_zero, .-HplAtm128Timer0AsyncP$last_zero
	.align	2
	.global	sim_mote_start_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_start_time, %function
sim_mote_start_time:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	mov	r0, r3
	bl	sim_set_node
	bl	SimMoteP$SimMote$getStartTime
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_mote_start_time, .-sim_mote_start_time
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$shiftFromScale, %function
HplAtm128Timer0AsyncP$shiftFromScale:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	HplAtm128Timer0AsyncP$Timer0$getScale
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #7
	ldrls	pc, [pc, r3, asl #2]
	b	.L1159
.L1161:
	.word	.L1168
	.word	.L1167
	.word	.L1166
	.word	.L1165
	.word	.L1164
	.word	.L1163
	.word	.L1162
	.word	.L1160
.L1168:
	mov	r3, #0
	b	.L1169
.L1167:
	mov	r3, #0
	b	.L1169
.L1166:
	mov	r3, #3
	b	.L1169
.L1165:
	mov	r3, #5
	b	.L1169
.L1164:
	mov	r3, #6
	b	.L1169
.L1163:
	mov	r3, #7
	b	.L1169
.L1162:
	mov	r3, #8
	b	.L1169
.L1160:
	mov	r3, #10
	b	.L1169
.L1159:
	mov	r3, #255
.L1169:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	HplAtm128Timer0AsyncP$shiftFromScale, .-HplAtm128Timer0AsyncP$shiftFromScale
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Timer0$getScale, %function
HplAtm128Timer0AsyncP$Timer0$getScale:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #51
	ldr	r2, .L1172
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	and	r3, r3, #7
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
.L1173:
	.align	2
.L1172:
	.word	atm128RegFile
	.size	HplAtm128Timer0AsyncP$Timer0$getScale, .-HplAtm128Timer0AsyncP$Timer0$getScale
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag, %function
HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L1176
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r1, r3
	add	r3, r3, #54
	ldrb	r3, [r3]
	and	r3, r3, #255
	strb	r3, [fp, #-8]
	ldrb	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1177:
	.align	2
.L1176:
	.word	atm128RegFile
	.size	HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag, .-HplAtm128Timer0AsyncP$Timer0Ctrl$getInterruptFlag
	.section	.rodata
	.align	2
.LC150:
	.ascii	"HplAtm128Timer0AsyncP: Getting compare: %hhu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Compare$get, %function
HplAtm128Timer0AsyncP$Compare$get:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #49
	ldr	r2, .L1180
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	ldr	r2, .L1180+4
	ldr	r1, .L1180+8
	mov	r0, #196
	bl	sim_log_debug
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #49
	ldr	r2, .L1180
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	mov	r0, r3
	pop	{fp, pc}
.L1181:
	.align	2
.L1180:
	.word	atm128RegFile
	.word	.LC150
	.word	.LC69
	.size	HplAtm128Timer0AsyncP$Compare$get, .-HplAtm128Timer0AsyncP$Compare$get
	.align	2
	.global	sim_packet_max_length
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_max_length, %function
sim_packet_max_length:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #12
	str	r0, [fp, #-8]
	mov	r3, #28
	mov	r0, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	sim_packet_max_length, .-sim_packet_max_length
	.align	2
	.global	sim_packet_allocate
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_allocate, %function
sim_packet_allocate:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	mov	r0, #41
	bl	malloc
	mov	r3, r0
	mov	r0, r3
	pop	{fp, pc}
	.size	sim_packet_allocate, .-sim_packet_allocate
	.section	.rodata
	.align	2
.LC151:
	.ascii	"sim_packet.c: Freeing packet %p\012\000"
	.text
	.align	2
	.global	sim_packet_free
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_packet_free, %function
sim_packet_free:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r1, [fp, #-8]
	ldr	r0, .L1187
	bl	printf
	ldr	r0, [fp, #-8]
	bl	free
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1188:
	.align	2
.L1187:
	.word	.LC151
	.size	sim_packet_free, .-sim_packet_free
	.section	.rodata
	.align	2
.LC152:
	.ascii	"Mote %li signaling boot at time %s.\012\000"
	.align	2
.LC153:
	.ascii	"SimMainP\000"
	.align	2
.LC154:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	sim_main_start_mote
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_main_start_mote, %function
sim_main_start_mote:
	@ args = 0, pretend = 0, frame = 136
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #144
	ldr	r3, .L1194
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-137]
	bl	SimMainP$Scheduler$init
	bl	SimMainP$PlatformInit$init
	nop
.L1190:
	bl	SimMainP$Scheduler$runNextTask
	mov	r3, r0
	cmp	r3, #0
	bne	.L1190
	bl	SimMainP$SoftwareInit$init
	nop
.L1191:
	bl	SimMainP$Scheduler$runNextTask
	mov	r3, r0
	cmp	r3, #0
	bne	.L1191
	ldrb	r3, [fp, #-137]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	bl	__nesc_enable_interrupt
	sub	r3, fp, #136
	mov	r1, #128
	mov	r0, r3
	bl	sim_print_now
	bl	sim_node
	mov	r2, r0
	sub	r3, fp, #136
	str	r3, [sp]
	mov	r3, r2
	ldr	r2, .L1194+4
	ldr	r1, .L1194+8
	mov	r0, #94
	bl	sim_log_debug
	bl	SimMainP$Boot$booted
	mov	r3, #0
	ldr	r2, .L1194
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L1193
	bl	__stack_chk_fail
.L1193:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1195:
	.align	2
.L1194:
	.word	.LC154
	.word	.LC152
	.word	.LC153
	.size	sim_main_start_mote, .-sim_main_start_mote
	.section	.rodata
	.align	2
.LC155:
	.ascii	"Told to run next task, but no task to run.\012\000"
	.align	2
.LC156:
	.ascii	"Running task %hhu.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimSchedulerBasicP$Scheduler$runNextTask, %function
SimSchedulerBasicP$Scheduler$runNextTask:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-7]
	bl	SimSchedulerBasicP$popTask
	mov	r3, r0
	strb	r3, [fp, #-6]
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	cmp	r3, #255
	bne	.L1197
	ldr	r2, .L1199
	ldr	r1, .L1199+4
	mov	r0, #96
	bl	sim_log_debug
	mov	r3, #0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-7]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	b	.L1198
.L1197:
	ldrb	r3, [fp, #-7]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	ldr	r2, .L1199+8
	ldr	r1, .L1199+4
	mov	r0, #97
	bl	sim_log_debug
	ldrb	r3, [fp, #-6]	@ zero_extendqisi2
	mov	r0, r3
	bl	SimSchedulerBasicP$TaskBasic$runTask
	mov	r3, #1
.L1198:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1200:
	.align	2
.L1199:
	.word	.LC155
	.word	.LC11
	.word	.LC156
	.size	SimSchedulerBasicP$Scheduler$runNextTask, .-SimSchedulerBasicP$Scheduler$runNextTask
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	VirtualizeTimerC$0$fireTimers, %function
VirtualizeTimerC$0$fireTimers:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	mov	r3, #0
	strh	r3, [fp, #-14]	@ movhi
	b	.L1202
.L1207:
	bl	sim_node
	mov	r1, r0
	ldrh	r3, [fp, #-14]
	mov	r2, r3
	lsl	r2, r2, #1
	add	r2, r2, r3
	lsl	r3, r2, #2
	mov	r2, r3
	mov	r3, r1
	lsl	r3, r3, #1
	add	r3, r3, r1
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldr	r2, .L1208
	add	r3, r3, r2
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-12]
	ldrb	r3, [r3, #8]	@ zero_extendqisi2
	and	r3, r3, #2
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1203
	ldr	r3, [fp, #-12]
	ldr	r3, [r3]
	ldr	r2, [fp, #-24]
	sub	r3, r2, r3
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #4]
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	bcc	.L1203
	ldr	r3, [fp, #-12]
	ldrb	r3, [r3, #8]	@ zero_extendqisi2
	and	r3, r3, #1
	and	r3, r3, #255
	cmp	r3, #0
	beq	.L1204
	ldr	r2, [fp, #-12]
	ldrb	r3, [r2, #8]
	bic	r3, r3, #2
	strb	r3, [r2, #8]
	b	.L1205
.L1204:
	ldr	r3, [fp, #-12]
	ldr	r2, [r3]
	ldr	r3, [fp, #-12]
	ldr	r3, [r3, #4]
	add	r2, r2, r3
	ldr	r3, [fp, #-12]
	str	r2, [r3]
.L1205:
	ldrh	r3, [fp, #-14]	@ movhi
	and	r3, r3, #255
	mov	r0, r3
	bl	VirtualizeTimerC$0$Timer$fired
	b	.L1206
.L1203:
	ldrh	r3, [fp, #-14]
	add	r3, r3, #1
	strh	r3, [fp, #-14]	@ movhi
.L1202:
	ldrh	r3, [fp, #-14]
	cmp	r3, #1
	bls	.L1207
.L1206:
	bl	VirtualizeTimerC$0$updateFromTimer$postTask
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1209:
	.align	2
.L1208:
	.word	VirtualizeTimerC$0$m_timers
	.size	VirtualizeTimerC$0$fireTimers, .-VirtualizeTimerC$0$fireTimers
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueEntryP$0$AMSend$send, %function
AMQueueEntryP$0$AMSend$send:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	str	r1, [fp, #-12]
	strh	r3, [fp, #-6]	@ movhi
	mov	r3, r2
	strb	r3, [fp, #-7]
	ldrh	r3, [fp, #-6]
	mov	r1, r3
	ldr	r0, [fp, #-12]
	bl	AMQueueEntryP$0$AMPacket$setDestination
	mov	r1, #6
	ldr	r0, [fp, #-12]
	bl	AMQueueEntryP$0$AMPacket$setType
	ldrb	r3, [fp, #-7]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, [fp, #-12]
	bl	AMQueueEntryP$0$Send$send
	mov	r3, r0
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	AMQueueEntryP$0$AMSend$send, .-AMQueueEntryP$0$AMSend$send
	.section	.rodata
	.align	2
.LC157:
	.ascii	"AM: Sending packet (id=%hhu, len=%hhu) to %hu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimActiveMessageC$AMSend$send, %function
TossimActiveMessageC$AMSend$send:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	str	r2, [fp, #-28]
	mov	r2, r3
	mov	r3, r0
	strb	r3, [fp, #-21]
	mov	r3, r1	@ movhi
	strh	r3, [fp, #-24]	@ movhi
	mov	r3, r2
	strb	r3, [fp, #-22]
	ldr	r0, [fp, #-28]
	bl	TossimActiveMessageC$getHeader
	str	r0, [fp, #-16]
	ldrb	r1, [fp, #-21]	@ zero_extendqisi2
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldrh	r2, [fp, #-24]
	str	r2, [sp, #4]
	str	r3, [sp]
	mov	r3, r1
	ldr	r2, .L1214
	ldr	r1, .L1214+4
	mov	r0, #104
	bl	sim_log_debug
	ldr	r3, [fp, #-16]
	add	r3, r3, #6
	ldrb	r2, [fp, #-21]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint8
	ldr	r3, [fp, #-16]
	ldrh	r2, [fp, #-24]
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint16
	ldr	r3, [fp, #-16]
	add	r4, r3, #2
	bl	TossimActiveMessageC$AMPacket$address
	mov	r3, r0
	mov	r1, r3
	mov	r0, r4
	bl	__nesc_hton_uint16
	ldr	r3, [fp, #-16]
	add	r3, r3, #4
	ldrb	r2, [fp, #-22]	@ zero_extendqisi2
	mov	r1, r2
	mov	r0, r3
	bl	__nesc_hton_uint8
	ldrh	r0, [fp, #-24]
	ldrb	r3, [fp, #-22]
	add	r3, r3, #9
	and	r3, r3, #255
	mov	r2, r3
	ldr	r1, [fp, #-28]
	bl	TossimActiveMessageC$Model$send
	mov	r3, r0
	strb	r3, [fp, #-17]
	ldrb	r3, [fp, #-17]	@ zero_extendqisi2
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1215:
	.align	2
.L1214:
	.word	.LC157
	.word	.LC145
	.size	TossimActiveMessageC$AMSend$send, .-TossimActiveMessageC$AMSend$send
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$packetNoise, %function
CpmModelC$packetNoise:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	bl	CpmModelC$noise_hash_generation
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1221
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-16]
	mov	r2, #0
	ldr	r3, .L1221+4
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	ldr	r1, .L1221+4
	bl	pow
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	b	.L1217
.L1219:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-24]
	cmp	r2, r3
	beq	.L1218
	ldr	r3, [fp, #-16]
	add	r1, r3, #24
	ldmia	r1, {r0-r1}
	mov	r2, #0
	ldr	r3, .L1221+4
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	ldr	r1, .L1221+4
	bl	pow
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dadd
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
.L1218:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3, #48]
	str	r3, [fp, #-16]
.L1217:
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L1219
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	log
	mov	r2, #0
	ldr	r3, .L1221+4
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L1221+8
	ldr	r3, .L1221+12
	bl	__aeabi_ddiv
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1222:
	.align	2
.L1221:
	.word	CpmModelC$outstandingReceptionHead
	.word	1076101120
	.word	-1145744106
	.word	1073900465
	.size	CpmModelC$packetNoise, .-CpmModelC$packetNoise
	.section	.rodata
	.align	2
.LC158:
	.ascii	"IN: noise_hash_generation()\012\000"
	.align	2
.LC159:
	.ascii	"%s: OUT: noise_hash_generation(): %lf\012\000"
	.align	2
.LC160:
	.ascii	"CpmModelC,Tal\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$noise_hash_generation, %function
CpmModelC$noise_hash_generation:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	bl	CpmModelC$timeInMs
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	mov	r2, #0
	ldr	r3, .L1227
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, #10
	mov	r3, #0
	bl	__aeabi_ldivmod
	mov	r2, r0
	mov	r3, r1
	mov	r3, r2
	str	r3, [fp, #-24]
	mov	r2, #0
	ldr	r3, .L1227
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dmul
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	bl	__aeabi_d2lz
	mov	r2, #10
	mov	r3, #0
	bl	__aeabi_ldivmod
	mov	r3, r2
	strb	r3, [fp, #-27]
	bl	sim_node
	mov	r3, r0
	strh	r3, [fp, #-26]	@ movhi
	ldr	r2, .L1227+4
	ldr	r1, .L1227+8
	mov	r0, #122
	bl	sim_log_debug
	ldrb	r3, [fp, #-27]	@ zero_extendqisi2
	cmp	r3, #4
	bls	.L1224
	ldrb	r3, [fp, #-27]	@ zero_extendqisi2
	cmp	r3, #9
	bhi	.L1224
	ldr	r3, [fp, #-24]
	add	r2, r3, #1
	ldrh	r3, [fp, #-26]
	mov	r1, r2
	mov	r0, r3
	bl	sim_noise_generate
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	b	.L1225
.L1224:
	ldrh	r3, [fp, #-26]
	ldr	r1, [fp, #-24]
	mov	r0, r3
	bl	sim_noise_generate
	mov	r3, r0
	mov	r0, r3
	bl	__aeabi_ui2d
	mov	r2, r0
	mov	r3, r1
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
.L1225:
	bl	sim_time_string
	mov	r1, r0
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	mov	r3, r1
	ldr	r2, .L1227+12
	ldr	r1, .L1227+16
	mov	r0, #123
	bl	sim_log_debug
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1228:
	.align	2
.L1227:
	.word	1076101120
	.word	.LC158
	.word	.LC30
	.word	.LC159
	.word	.LC160
	.size	CpmModelC$noise_hash_generation, .-CpmModelC$noise_hash_generation
	.section	.rodata
	.align	2
.LC161:
	.ascii	"%s received send done for %p, signaling for %p.\012"
	.ascii	"\000"
	.align	2
.LC162:
	.ascii	"PointerBug\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$AMSend$sendDone, %function
AMQueueImplP$0$AMSend$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	mov	r3, r0
	str	r1, [fp, #-20]
	strb	r3, [fp, #-13]
	mov	r3, r2
	strb	r3, [fp, #-14]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1234
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1233
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1234
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	ldr	r2, .L1234+4
	add	r3, r4, r3
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-20]
	cmp	r2, r3
	bne	.L1232
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1234
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	ldrb	r2, [fp, #-14]	@ zero_extendqisi2
	ldr	r1, [fp, #-20]
	mov	r0, r3
	bl	AMQueueImplP$0$sendDone
	b	.L1229
.L1232:
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1234
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	ldr	r2, .L1234+4
	add	r3, r4, r3
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-20]
	str	r3, [sp]
	ldr	r3, .L1234+8
	ldr	r2, .L1234+12
	ldr	r1, .L1234+16
	mov	r0, #175
	bl	sim_log_debug
	b	.L1229
.L1233:
	nop
.L1229:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1235:
	.align	2
.L1234:
	.word	AMQueueImplP$0$current
	.word	AMQueueImplP$0$queue
	.word	__FUNCTION__.9253
	.word	.LC161
	.word	.LC162
	.size	AMQueueImplP$0$AMSend$sendDone, .-AMQueueImplP$0$AMSend$sendDone
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	AMQueueImplP$0$tryToSend, %function
AMQueueImplP$0$tryToSend:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	bl	AMQueueImplP$0$nextPacket
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1239
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1238
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1239
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	ldr	r2, .L1239+4
	add	r3, r4, r3
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [fp, #-16]
	ldr	r0, [fp, #-16]
	bl	AMQueueImplP$0$AMPacket$type
	mov	r3, r0
	strb	r3, [fp, #-21]
	ldr	r0, [fp, #-16]
	bl	AMQueueImplP$0$AMPacket$destination
	mov	r3, r0
	strh	r3, [fp, #-18]	@ movhi
	ldr	r0, [fp, #-16]
	bl	AMQueueImplP$0$Packet$payloadLength
	mov	r3, r0
	strb	r3, [fp, #-20]
	ldrb	r3, [fp, #-20]	@ zero_extendqisi2
	ldrh	r1, [fp, #-18]
	ldrb	r0, [fp, #-21]	@ zero_extendqisi2
	ldr	r2, [fp, #-16]
	bl	AMQueueImplP$0$AMSend$send
	mov	r3, r0
	strb	r3, [fp, #-19]
	ldrb	r3, [fp, #-19]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1238
	bl	AMQueueImplP$0$errorTask$postTask
.L1238:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1240:
	.align	2
.L1239:
	.word	AMQueueImplP$0$current
	.word	AMQueueImplP$0$queue
	.size	AMQueueImplP$0$tryToSend, .-AMQueueImplP$0$tryToSend
	.section	.rodata
	.align	2
.LC163:
	.ascii	"Packet sent...\000"
	.align	2
.LC164:
	.ascii	" at time %s \012\000"
	.align	2
.LC165:
	.ascii	"Send done error!\000"
	.align	2
.LC166:
	.ascii	"  [\342\210\232] Packet acknoledgment OK\012\000"
	.align	2
.LC167:
	.ascii	"radio_ack\000"
	.align	2
.LC168:
	.ascii	"  [x] Packet acknoledgment FAILED\012\000"
	.align	2
.LC169:
	.ascii	"  Sending again...\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sendAckC$AMSend$sendDone, %function
sendAckC$AMSend$sendDone:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	mov	r3, r1
	strb	r3, [fp, #-9]
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L1247
	add	r3, r3, r2
	ldr	r2, [fp, #-8]
	cmp	r2, r3
	bne	.L1242
	ldrb	r3, [fp, #-9]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1242
	ldr	r2, .L1247+4
	ldr	r1, .L1247+8
	mov	r0, #156
	bl	sim_log_debug
	bl	sim_time_string
	mov	r3, r0
	ldr	r2, .L1247+12
	ldr	r1, .L1247+8
	mov	r0, #157
	bl	sim_log_debug_clear
	b	.L1243
.L1242:
	ldr	r2, .L1247+16
	ldr	r1, .L1247+8
	mov	r0, #158
	bl	sim_log_error
.L1243:
	ldr	r0, [fp, #-8]
	bl	sendAckC$ack$wasAcked
	mov	r3, r0
	cmp	r3, #1
	bne	.L1244
	bl	sendAckC$MilliTimer$stop
	ldr	r2, .L1247+20
	ldr	r1, .L1247+24
	mov	r0, #159
	bl	sim_log_debug
	b	.L1246
.L1244:
	ldr	r2, .L1247+28
	ldr	r1, .L1247+24
	mov	r0, #160
	bl	sim_log_error
	ldr	r2, .L1247+32
	ldr	r1, .L1247+24
	mov	r0, #161
	bl	sim_log_error
.L1246:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1248:
	.align	2
.L1247:
	.word	sendAckC$packet
	.word	.LC163
	.word	.LC20
	.word	.LC164
	.word	.LC165
	.word	.LC166
	.word	.LC167
	.word	.LC168
	.word	.LC169
	.size	sendAckC$AMSend$sendDone, .-sendAckC$AMSend$sendDone
	.global	__aeabi_d2uiz
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$shouldReceive, %function
CpmModelC$shouldReceive:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-28]
	str	r1, [fp, #-24]
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	CpmModelC$prr_estimate_from_snr
	str	r0, [fp, #-20]
	str	r1, [fp, #-16]
	bl	RandomUniform
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	mov	r2, #0
	mov	r3, #0
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmpge
	mov	r3, r0
	cmp	r3, #0
	beq	.L1250
	mov	r2, #0
	ldr	r3, .L1260
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmple
	mov	r3, r0
	cmp	r3, #0
	beq	.L1250
	sub	r3, fp, #20
	ldmia	r3, {r2-r3}
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	bl	__aeabi_dcmplt
	mov	r3, r0
	cmp	r3, #0
	beq	.L1259
	mov	r2, #0
	ldr	r3, .L1260
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	b	.L1250
.L1259:
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
.L1250:
	sub	r1, fp, #20
	ldmia	r1, {r0-r1}
	bl	__aeabi_d2uiz
	mov	r3, r0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1261:
	.align	2
.L1260:
	.word	1072693248
	.size	CpmModelC$shouldReceive, .-CpmModelC$shouldReceive
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$GainRadioModel$shouldAck, %function
TossimPacketModelC$GainRadioModel$shouldAck:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1265
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1263
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1265+4
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1263
	ldr	r0, [fp, #-8]
	bl	TossimPacketModelC$Packet$shouldAck
	mov	r3, r0
	b	.L1264
.L1263:
	mov	r3, #0
.L1264:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1266:
	.align	2
.L1265:
	.word	TossimPacketModelC$running
	.word	TossimPacketModelC$transmitting
	.size	TossimPacketModelC$GainRadioModel$shouldAck, .-TossimPacketModelC$GainRadioModel$shouldAck
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	CpmModelC$sim_gain_schedule_ack, %function
CpmModelC$sim_gain_schedule_ack:
	@ args = 4, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	mov	r0, #32
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	str	r2, [r3, #8]
	ldr	r3, [fp, #-8]
	mov	r2, #1
	strb	r2, [r3, #12]
	ldr	r3, [fp, #-8]
	mov	r2, #0
	strb	r2, [r3, #13]
	ldr	r1, [fp, #-8]
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	ldr	r3, [fp, #-8]
	ldr	r2, .L1268
	str	r2, [r3, #20]
	ldr	r3, [fp, #-8]
	ldr	r2, .L1268+4
	str	r2, [r3, #24]
	ldr	r3, [fp, #-8]
	ldr	r2, [fp, #4]
	str	r2, [r3, #16]
	ldr	r0, [fp, #-8]
	bl	sim_queue_insert
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1269:
	.align	2
.L1268:
	.word	CpmModelC$sim_gain_ack_handle
	.word	sim_queue_cleanup_event
	.size	CpmModelC$sim_gain_schedule_ack, .-CpmModelC$sim_gain_schedule_ack
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	RandomMlcgC$Random$rand32, %function
RandomMlcgC$Random$rand32:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-25]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1273
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	mov	r1, #0
	ldr	r3, .L1273+4
	mul	r2, r3, r1
	mov	r3, #0
	mul	r3, r0, r3
	add	ip, r2, r3
	ldr	lr, .L1273+4
	umull	r2, r3, r0, lr
	add	r1, ip, r3
	mov	r3, r1
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	str	r2, [fp, #-12]
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-12]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	lsr	r3, r3, #1
	str	r3, [fp, #-20]
	sub	r1, fp, #12
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r2, r1
	mov	r3, #0
	mov	r3, r2
	str	r3, [fp, #-16]
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-20]
	add	r3, r2, r3
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	cmp	r3, #0
	bge	.L1271
	ldr	r3, [fp, #-24]
	bic	r3, r3, #-2147483648
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-24]
	add	r3, r3, #1
	str	r3, [fp, #-24]
.L1271:
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L1273
	ldr	r3, [fp, #-24]
	str	r3, [r1, r2, lsl #2]
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	ldr	r3, [fp, #-24]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1274:
	.align	2
.L1273:
	.word	RandomMlcgC$seed
	.word	33614
	.size	RandomMlcgC$Random$rand32, .-RandomMlcgC$Random$rand32
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$Alarm$startAt, %function
Atm128AlarmAsyncP$0$Alarm$startAt:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-5]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1276
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L1276+4
	ldr	r3, [fp, #-16]
	str	r3, [r1, r2, lsl #2]
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L1276+8
	ldr	r3, [fp, #-20]
	str	r3, [r1, r2, lsl #2]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	bl	Atm128AlarmAsyncP$0$setInterrupt
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1277:
	.align	2
.L1276:
	.word	Atm128AlarmAsyncP$0$set
	.word	Atm128AlarmAsyncP$0$t0
	.word	Atm128AlarmAsyncP$0$dt
	.size	Atm128AlarmAsyncP$0$Alarm$startAt, .-Atm128AlarmAsyncP$0$Alarm$startAt
	.section	.rodata
	.align	2
.LC170:
	.ascii	"Atm128AlarmAsyncP: TIFR is %hhx\012\000"
	.align	2
.LC171:
	.ascii	"Atm128AlarmAsyncP\000"
	.align	2
.LC172:
	.ascii	"Atm128AlarmAsyncP: under min: %hhu.\012\000"
	.align	2
.LC173:
	.ascii	"Atm128AlarmAsyncP: OCF set.\012\000"
	.align	2
.LC174:
	.ascii	"Atm128AlarmAsyncP: no alarm set, set at max.\012\000"
	.align	2
.LC175:
	.ascii	"Atm128AlarmAsyncP: now-t0 = %llu, dt = %llu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	Atm128AlarmAsyncP$0$setInterrupt, %function
Atm128AlarmAsyncP$0$setInterrupt:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #28
	mov	r3, #0
	strb	r3, [fp, #-25]
	bl	__nesc_atomic_start
	mov	r3, r0
	strb	r3, [fp, #-23]
	bl	Atm128AlarmAsyncP$0$Compare$get
	mov	r3, r0
	mov	r4, r3
	bl	Atm128AlarmAsyncP$0$Timer$get
	mov	r3, r0
	sub	r3, r4, r3
	and	r3, r3, #255
	add	r3, r3, #1
	strb	r3, [fp, #-22]
	bl	Atm128AlarmAsyncP$0$TimerCtrl$getInterruptFlag
	mov	r3, r0
	strb	r3, [fp, #-21]
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	ldr	r2, .L1290
	ldr	r1, .L1290+4
	mov	r0, #176
	bl	sim_log_debug
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1279
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	cmp	r3, #1
	bls	.L1280
.L1279:
	ldrb	r3, [fp, #-21]	@ zero_extendqisi2
	and	r3, r3, #2
	cmp	r3, #0
	beq	.L1281
.L1280:
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	cmp	r3, #1
	bhi	.L1282
	ldrb	r3, [fp, #-22]	@ zero_extendqisi2
	ldr	r2, .L1290+8
	ldr	r1, .L1290+4
	mov	r0, #177
	bl	sim_log_debug
	b	.L1283
.L1282:
	ldr	r2, .L1290+12
	ldr	r1, .L1290+4
	mov	r0, #178
	bl	sim_log_debug
.L1283:
	ldrb	r3, [fp, #-23]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	b	.L1278
.L1281:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+16
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1285
	mvn	r3, #25
	strb	r3, [fp, #-24]
	ldr	r2, .L1290+20
	ldr	r1, .L1290+4
	mov	r0, #179
	bl	sim_log_debug
	b	.L1286
.L1285:
	bl	Atm128AlarmAsyncP$0$Counter$get
	str	r0, [fp, #-20]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+24
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-20]
	sub	r4, r2, r3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+28
	ldr	r3, [r2, r3, lsl #2]
	str	r3, [sp]
	mov	r3, r4
	ldr	r2, .L1290+32
	ldr	r1, .L1290+4
	mov	r0, #180
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+24
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-20]
	sub	r4, r2, r3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+28
	ldr	r3, [r2, r3, lsl #2]
	cmp	r4, r3
	bcc	.L1287
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+16
	mov	r1, #0
	strb	r1, [r2, r3]
	mov	r3, #1
	strb	r3, [fp, #-25]
	mvn	r3, #25
	strb	r3, [fp, #-24]
	b	.L1286
.L1287:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+24
	ldr	r4, [r2, r3, lsl #2]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+28
	ldr	r3, [r2, r3, lsl #2]
	add	r4, r4, r3
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1290+36
	ldr	r3, [r2, r3, lsl #2]
	sub	r3, r4, r3
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #230
	bls	.L1288
	mvn	r3, #25
	strb	r3, [fp, #-24]
	b	.L1286
.L1288:
	ldr	r3, [fp, #-16]
	and	r3, r3, #255
	cmp	r3, #1
	bhi	.L1289
	mov	r3, #2
	strb	r3, [fp, #-24]
	b	.L1286
.L1289:
	ldr	r3, [fp, #-16]
	strb	r3, [fp, #-24]
.L1286:
	ldrb	r3, [fp, #-24]	@ zero_extendqisi2
	sub	r3, r3, #1
	strb	r3, [fp, #-24]
	ldrb	r3, [fp, #-24]	@ zero_extendqisi2
	mov	r0, r3
	bl	Atm128AlarmAsyncP$0$setOcr0
	ldrb	r3, [fp, #-23]	@ zero_extendqisi2
	mov	r0, r3
	bl	__nesc_atomic_end
	ldrb	r3, [fp, #-25]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1278
	bl	Atm128AlarmAsyncP$0$Alarm$fired
.L1278:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1291:
	.align	2
.L1290:
	.word	.LC170
	.word	.LC171
	.word	.LC172
	.word	.LC173
	.word	Atm128AlarmAsyncP$0$set
	.word	.LC174
	.word	Atm128AlarmAsyncP$0$t0
	.word	Atm128AlarmAsyncP$0$dt
	.word	.LC175
	.word	Atm128AlarmAsyncP$0$base
	.size	Atm128AlarmAsyncP$0$setInterrupt, .-Atm128AlarmAsyncP$0$setInterrupt
	.section	.rodata
	.align	2
.LC176:
	.ascii	"HplAtm128Timer0AsyncP: Setting compare: %hhu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$Compare$set, %function
HplAtm128Timer0AsyncP$Compare$set:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r3, r0
	strb	r3, [fp, #-5]
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	ldr	r2, .L1297
	ldr	r1, .L1297+4
	mov	r0, #197
	bl	sim_log_debug
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #0
	beq	.L1293
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r3, #253
	bls	.L1294
.L1293:
	mov	r3, #1
	strb	r3, [fp, #-5]
.L1294:
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #49
	ldr	r2, .L1297+8
	add	r3, r3, r2
	ldrb	r3, [r3]
	and	r3, r3, #255
	ldrb	r2, [fp, #-5]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L1296
	bl	sim_node
	mov	r2, r0
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #5
	add	r3, r3, #49
	ldr	r2, .L1297+8
	add	r3, r3, r2
	ldrb	r2, [fp, #-5]
	strb	r2, [r3]
	bl	HplAtm128Timer0AsyncP$schedule_new_compare
.L1296:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1298:
	.align	2
.L1297:
	.word	.LC176
	.word	.LC69
	.word	atm128RegFile
	.size	HplAtm128Timer0AsyncP$Compare$set, .-HplAtm128Timer0AsyncP$Compare$set
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$schedule_new_compare, %function
HplAtm128Timer0AsyncP$schedule_new_compare:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1303
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L1300
	bl	HplAtm128Timer0AsyncP$cancel_compare
.L1300:
	bl	HplAtm128Timer0AsyncP$Timer0$getScale
	mov	r3, r0
	cmp	r3, #0
	beq	.L1302
	bl	HplAtm128Timer0AsyncP$allocate_compare
	str	r0, [fp, #-8]
	ldr	r0, [fp, #-8]
	bl	HplAtm128Timer0AsyncP$configure_compare
	bl	sim_node
	mov	r2, r0
	ldr	r1, .L1303
	ldr	r3, [fp, #-8]
	str	r3, [r1, r2, lsl #2]
	ldr	r0, [fp, #-8]
	bl	sim_queue_insert
.L1302:
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1304:
	.align	2
.L1303:
	.word	HplAtm128Timer0AsyncP$compare
	.size	HplAtm128Timer0AsyncP$schedule_new_compare, .-HplAtm128Timer0AsyncP$schedule_new_compare
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_queue_allocate_event, %function
sim_queue_allocate_event:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	mov	r0, #32
	bl	malloc
	mov	r3, r0
	str	r3, [fp, #-8]
	mov	r2, #32
	mov	r1, #0
	ldr	r0, [fp, #-8]
	bl	memset
	bl	sim_node
	mov	r2, r0
	ldr	r3, [fp, #-8]
	str	r2, [r3, #8]
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_queue_allocate_event, .-sim_queue_allocate_event
	.align	2
	.global	INTERRUPT_16
	.syntax unified
	.arm
	.fpu softvfp
	.type	INTERRUPT_16, %function
INTERRUPT_16:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1308
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	HplAtm128Timer0AsyncP$Timer0$overflow
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1308
	mov	r1, #0
	strb	r1, [r2, r3]
	nop
	pop	{fp, pc}
.L1309:
	.align	2
.L1308:
	.word	HplAtm128Timer0AsyncP$inOverflow
	.size	INTERRUPT_16, .-INTERRUPT_16
	.section	.rodata
	.align	2
.LC177:
	.ascii	"Scheduling new overflow for %i at time %llu\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$configure_overflow, %function
HplAtm128Timer0AsyncP$configure_overflow:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #40
	str	r0, [fp, #-48]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	bl	HplAtm128Timer0AsyncP$Timer0$get
	mov	r3, r0
	strb	r3, [fp, #-38]
	mov	r3, #0
	strb	r3, [fp, #-37]
	ldrb	r2, [fp, #-37]
	ldrb	r3, [fp, #-38]
	sub	r3, r2, r3
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	bne	.L1311
	mov	r2, #256
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
.L1311:
	bl	HplAtm128Timer0AsyncP$shiftFromScale
	mov	r3, r0
	mov	r1, r3
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	ip, r1, #32
	rsb	r0, r1, #32
	lsl	r5, r3, r1
	orr	r5, r5, r2, lsl ip
	orr	r5, r5, r2, lsr r0
	lsl	r4, r2, r1
	str	r4, [fp, #-36]
	str	r5, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	HplAtm128Timer0AsyncP$clock_to_sim
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	bl	sim_time
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	r8, r2, r0
	adc	r9, r3, r1
	str	r8, [fp, #-36]
	str	r9, [fp, #-32]
	bl	sim_time
	mov	r4, r0
	mov	r5, r1
	bl	HplAtm128Timer0AsyncP$last_zero
	mov	r2, r0
	mov	r3, r1
	subs	r1, r4, r2
	str	r1, [fp, #-60]
	sbc	r3, r5, r3
	str	r3, [fp, #-56]
	bl	HplAtm128Timer0AsyncP$shiftFromScale
	mov	r3, r0
	mov	r2, r3
	mov	r3, #1
	lsl	r3, r3, r2
	mov	r2, r3
	asr	r3, r2, #31
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	mov	r0, r2
	mov	r1, r3
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	r6, r2, r0
	sbc	r7, r3, r1
	str	r6, [fp, #-36]
	str	r7, [fp, #-32]
	bl	sim_node
	mov	r1, r0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	mov	r3, r1
	ldr	r2, .L1312
	ldr	r1, .L1312+4
	mov	r0, #200
	bl	sim_log_debug
	ldr	r1, [fp, #-48]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L1313:
	.align	2
.L1312:
	.word	.LC177
	.word	.LC69
	.size	HplAtm128Timer0AsyncP$configure_overflow, .-HplAtm128Timer0AsyncP$configure_overflow
	.align	2
	.global	INTERRUPT_15
	.syntax unified
	.arm
	.fpu softvfp
	.type	INTERRUPT_15, %function
INTERRUPT_15:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	HplAtm128Timer0AsyncP$Compare$fired
	nop
	pop	{fp, pc}
	.size	INTERRUPT_15, .-INTERRUPT_15
	.section	.rodata
	.align	2
.LC178:
	.ascii	"Configuring new compare of %i for %i at time %llu  "
	.ascii	"(@ %llu)\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	HplAtm128Timer0AsyncP$configure_compare, %function
HplAtm128Timer0AsyncP$configure_compare:
	@ args = 0, pretend = 0, frame = 48
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #72
	str	r0, [fp, #-56]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	mov	r2, #0
	mov	r3, #0
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	bl	HplAtm128Timer0AsyncP$Timer0$get
	mov	r3, r0
	strb	r3, [fp, #-46]
	bl	HplAtm128Timer0AsyncP$Compare$get
	mov	r3, r0
	strb	r3, [fp, #-45]
	ldrb	r2, [fp, #-45]
	ldrb	r3, [fp, #-46]
	sub	r3, r2, r3
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orrs	r3, r2, r3
	bne	.L1316
	mov	r2, #256
	mov	r3, #0
	str	r2, [fp, #-44]
	str	r3, [fp, #-40]
.L1316:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	adds	r6, r2, #1
	adc	r7, r3, #0
	bl	HplAtm128Timer0AsyncP$shiftFromScale
	mov	r3, r0
	sub	r1, r3, #32
	rsb	r2, r3, #32
	lsl	r5, r7, r3
	orr	r5, r5, r6, lsl r1
	orr	r5, r5, r6, lsr r2
	lsl	r4, r6, r3
	str	r4, [fp, #-44]
	str	r5, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	bl	HplAtm128Timer0AsyncP$clock_to_sim
	str	r0, [fp, #-44]
	str	r1, [fp, #-40]
	bl	sim_time
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	adds	ip, r2, r0
	str	ip, [fp, #-68]
	adc	r3, r3, r1
	str	r3, [fp, #-64]
	sub	r4, fp, #68
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	bl	sim_time
	str	r0, [fp, #-36]
	str	r1, [fp, #-32]
	bl	HplAtm128Timer0AsyncP$last_zero
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-76]
	sbc	r3, r3, r1
	str	r3, [fp, #-72]
	sub	r4, fp, #76
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	bl	HplAtm128Timer0AsyncP$shiftFromScale
	mov	r3, r0
	mov	r2, r3
	mov	r3, #1
	lsl	r3, r3, r2
	mov	r2, r3
	asr	r3, r2, #31
	mov	r0, r2
	mov	r1, r3
	bl	HplAtm128Timer0AsyncP$clock_to_sim
	mov	r2, r0
	mov	r3, r1
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	bl	__aeabi_ldivmod
	str	r2, [fp, #-36]
	str	r3, [fp, #-32]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	r8, r0, r2
	sbc	r9, r1, r3
	str	r8, [fp, #-44]
	str	r9, [fp, #-40]
	ldrb	r4, [fp, #-45]	@ zero_extendqisi2
	bl	sim_node
	mov	r5, r0
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	str	r2, [sp, #16]
	str	r3, [sp, #20]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	str	r2, [sp, #8]
	str	r3, [sp, #12]
	str	r5, [sp]
	mov	r3, r4
	ldr	r2, .L1317
	ldr	r1, .L1317+4
	mov	r0, #189
	bl	sim_log_debug
	ldr	r1, [fp, #-56]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	nop
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L1318:
	.align	2
.L1317:
	.word	.LC178
	.word	.LC69
	.size	HplAtm128Timer0AsyncP$configure_compare, .-HplAtm128Timer0AsyncP$configure_compare
	.section	.rodata
	.align	2
.LC179:
	.ascii	"TossimPacketModelC: Control.start() called before i"
	.ascii	"nitialization!\012\000"
	.align	2
.LC180:
	.ascii	"TossimPacketModelC: Control.start() called.\012\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	TossimPacketModelC$Control$start, %function
TossimPacketModelC$Control$start:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1322
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1320
	ldr	r2, .L1322+4
	ldr	r1, .L1322+8
	mov	r0, #110
	bl	sim_log_error
	mov	r3, #1
	b	.L1321
.L1320:
	ldr	r2, .L1322+12
	ldr	r1, .L1322+8
	mov	r0, #111
	bl	sim_log_debug
	bl	TossimPacketModelC$startDoneTask$postTask
	mov	r3, #0
.L1321:
	mov	r0, r3
	pop	{fp, pc}
.L1323:
	.align	2
.L1322:
	.word	TossimPacketModelC$initialized
	.word	.LC179
	.word	.LC51
	.word	.LC180
	.size	TossimPacketModelC$Control$start, .-TossimPacketModelC$Control$start
	.align	2
	.global	sim_mote_euid
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_euid, %function
sim_mote_euid:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-24]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	mov	r0, r3
	bl	sim_set_node
	bl	SimMoteP$SimMote$getEuid
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	sub	r3, fp, #12
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_mote_euid, .-sim_mote_euid
	.align	2
	.global	sim_mote_set_euid
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_set_euid, %function
sim_mote_set_euid:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	sub	r1, fp, #28
	ldmia	r1, {r0-r1}
	bl	SimMoteP$SimMote$setEuid
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_mote_set_euid, .-sim_mote_set_euid
	.section	.rodata
	.align	2
.LC181:
	.ascii	"Fetched %s of %i to be %p with len %i (result %i)\012"
	.ascii	"\000"
	.text
	.align	2
	.global	sim_mote_get_variable_info
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_get_variable_info, %function
sim_mote_get_variable_info:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #40
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	str	r3, [fp, #-28]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-12]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	ldr	r2, [fp, #-28]
	ldr	r1, [fp, #-24]
	ldr	r0, [fp, #-20]
	bl	SimMoteP$SimMote$getVariableInfo
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	ldr	r2, [fp, #-28]
	ldr	r2, [r2]
	ldr	r1, [fp, #-8]
	str	r1, [sp, #12]
	str	r2, [sp, #8]
	str	r3, [sp, #4]
	ldr	r3, [fp, #-16]
	str	r3, [sp]
	ldr	r3, [fp, #-20]
	ldr	r2, .L1329
	ldr	r1, .L1329+4
	mov	r0, #101
	bl	sim_log_debug
	ldr	r3, [fp, #-12]
	mov	r0, r3
	bl	sim_set_node
	ldr	r3, [fp, #-8]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1330:
	.align	2
.L1329:
	.word	.LC181
	.word	.LC86
	.size	sim_mote_get_variable_info, .-sim_mote_get_variable_info
	.section	.rodata
	.align	2
.LC182:
	.ascii	"Setting start time to %llu\012\000"
	.text
	.align	2
	.global	sim_mote_set_start_time
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_set_start_time, %function
sim_mote_set_start_time:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #32
	str	r0, [fp, #-16]
	str	r2, [fp, #-28]
	str	r3, [fp, #-24]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1333
	lsl	r3, r3, #3
	add	r1, r2, r3
	sub	r3, fp, #28
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1333
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	ldr	r2, .L1333+4
	ldr	r1, .L1333+8
	mov	r0, #102
	bl	sim_log_debug
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1334:
	.align	2
.L1333:
	.word	SimMoteP$startTime
	.word	.LC182
	.word	.LC86
	.size	sim_mote_set_start_time, .-sim_mote_set_start_time
	.align	2
	.global	sim_mote_turn_on
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_turn_on, %function
sim_mote_turn_on:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	bl	SimMoteP$SimMote$turnOn
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_mote_turn_on, .-sim_mote_turn_on
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	SimMoteP$SimMote$turnOn, %function
SimMoteP$SimMote$turnOn:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #12
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1340
	ldrb	r3, [r2, r3]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L1339
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1340+4
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L1338
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1340+4
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #1
	strb	r2, [r3, #13]
.L1338:
	bl	sim_node
	mov	r3, r0
	mov	r0, r3
	bl	__nesc_nido_initialise
	bl	sim_node
	mov	r4, r0
	bl	sim_time
	mov	r2, r0
	mov	r3, r1
	ldr	r0, .L1340+8
	lsl	r1, r4, #3
	add	r1, r0, r1
	stm	r1, {r2-r3}
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1340+8
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	stm	sp, {r2-r3}
	ldr	r2, .L1340+12
	ldr	r1, .L1340+16
	mov	r0, #100
	bl	sim_log_debug
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1340
	mov	r1, #1
	strb	r1, [r2, r3]
	bl	sim_main_start_mote
.L1339:
	nop
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L1341:
	.align	2
.L1340:
	.word	SimMoteP$isOn
	.word	SimMoteP$bootEvent
	.word	SimMoteP$startTime
	.word	.LC182
	.word	.LC86
	.size	SimMoteP$SimMote$turnOn, .-SimMoteP$SimMote$turnOn
	.align	2
	.global	sim_mote_turn_off
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_turn_off, %function
sim_mote_turn_off:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-8]
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
	bl	SimMoteP$SimMote$turnOff
	ldr	r3, [fp, #-8]
	mov	r0, r3
	bl	sim_set_node
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	sim_mote_turn_off, .-sim_mote_turn_off
	.align	2
	.global	sim_mote_enqueue_boot_event
	.syntax unified
	.arm
	.fpu softvfp
	.type	sim_mote_enqueue_boot_event, %function
sim_mote_enqueue_boot_event:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, fp, lr}
	add	fp, sp, #12
	sub	sp, sp, #16
	str	r0, [fp, #-24]
	bl	sim_node
	mov	r3, r0
	str	r3, [fp, #-16]
	ldr	r3, [fp, #-24]
	mov	r0, r3
	bl	sim_set_node
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	cmp	r3, #0
	beq	.L1344
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	ldmia	r3, {r4-r5}
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347+4
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	cmp	r5, r3
	cmpeq	r4, r2
	bne	.L1345
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #0
	strb	r2, [r3, #13]
	b	.L1343
.L1345:
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #1
	strb	r2, [r3, #13]
.L1344:
	bl	sim_node
	mov	r4, r0
	mov	r0, #32
	bl	malloc
	mov	r3, r0
	mov	r2, r3
	ldr	r3, .L1347
	str	r2, [r3, r4, lsl #2]
	bl	sim_node
	mov	r4, r0
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r1, [r2, r3, lsl #2]
	ldr	r2, .L1347+4
	lsl	r3, r4, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	stm	r1, {r2-r3}
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, [fp, #-24]
	str	r2, [r3, #8]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #1
	strb	r2, [r3, #12]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	mov	r2, #0
	str	r2, [r3, #16]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L1347+8
	str	r2, [r3, #20]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	ldr	r2, .L1347+12
	str	r2, [r3, #24]
	bl	sim_node
	mov	r3, r0
	ldr	r2, .L1347
	ldr	r3, [r2, r3, lsl #2]
	mov	r0, r3
	bl	sim_queue_insert
	ldr	r3, [fp, #-16]
	mov	r0, r3
	bl	sim_set_node
.L1343:
	sub	sp, fp, #12
	@ sp needed
	pop	{r4, r5, fp, pc}
.L1348:
	.align	2
.L1347:
	.word	SimMoteP$bootEvent
	.word	SimMoteP$startTime
	.word	SimMoteP$sim_mote_boot_handle
	.word	sim_queue_cleanup_event
	.size	sim_mote_enqueue_boot_event, .-sim_mote_enqueue_boot_event
	.section	.rodata
	.align	2
.LC183:
	.ascii	"SimSchedulerBasicP$m_head\000"
	.align	2
.LC184:
	.ascii	"SimSchedulerBasicP$m_tail\000"
	.align	2
.LC185:
	.ascii	"SimSchedulerBasicP$m_next\000"
	.align	2
.LC186:
	.ascii	"SimSchedulerBasicP$sim_scheduler_event_pending\000"
	.align	2
.LC187:
	.ascii	"SimSchedulerBasicP$sim_scheduler_event\000"
	.align	2
.LC188:
	.ascii	"SimMoteP$euid\000"
	.align	2
.LC189:
	.ascii	"SimMoteP$startTime\000"
	.align	2
.LC190:
	.ascii	"SimMoteP$isOn\000"
	.align	2
.LC191:
	.ascii	"SimMoteP$bootEvent\000"
	.align	2
.LC192:
	.ascii	"TossimActiveMessageC$buffer\000"
	.align	2
.LC193:
	.ascii	"TossimActiveMessageC$bufferPointer\000"
	.align	2
.LC194:
	.ascii	"TossimPacketModelC$initialized\000"
	.align	2
.LC195:
	.ascii	"TossimPacketModelC$running\000"
	.align	2
.LC196:
	.ascii	"TossimPacketModelC$backoffCount\000"
	.align	2
.LC197:
	.ascii	"TossimPacketModelC$neededFreeSamples\000"
	.align	2
.LC198:
	.ascii	"TossimPacketModelC$sending\000"
	.align	2
.LC199:
	.ascii	"TossimPacketModelC$transmitting\000"
	.align	2
.LC200:
	.ascii	"TossimPacketModelC$sendingLength\000"
	.align	2
.LC201:
	.ascii	"TossimPacketModelC$destNode\000"
	.align	2
.LC202:
	.ascii	"TossimPacketModelC$sendEvent\000"
	.align	2
.LC203:
	.ascii	"TossimPacketModelC$error\000"
	.align	2
.LC204:
	.ascii	"CpmModelC$outgoing\000"
	.align	2
.LC205:
	.ascii	"CpmModelC$requestAck\000"
	.align	2
.LC206:
	.ascii	"CpmModelC$receiving\000"
	.align	2
.LC207:
	.ascii	"CpmModelC$transmitting\000"
	.align	2
.LC208:
	.ascii	"CpmModelC$transmissionEndTime\000"
	.align	2
.LC209:
	.ascii	"CpmModelC$outstandingReceptionHead\000"
	.align	2
.LC210:
	.ascii	"CpmModelC$clearThreshold\000"
	.align	2
.LC211:
	.ascii	"ActiveMessageAddressC$set\000"
	.align	2
.LC212:
	.ascii	"ActiveMessageAddressC$addr\000"
	.align	2
.LC213:
	.ascii	"sendAckC$counter\000"
	.align	2
.LC214:
	.ascii	"sendAckC$packet\000"
	.align	2
.LC215:
	.ascii	"/*AMQueueP.AMQueueImplP*/AMQueueImplP$0$current\000"
	.align	2
.LC216:
	.ascii	"/*AMQueueP.AMQueueImplP*/AMQueueImplP$0$queue\000"
	.align	2
.LC217:
	.ascii	"/*AMQueueP.AMQueueImplP*/AMQueueImplP$0$cancelMask\000"
	.align	2
.LC218:
	.ascii	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmA"
	.ascii	"syncP*/Atm128AlarmAsyncP$0$set\000"
	.align	2
.LC219:
	.ascii	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmA"
	.ascii	"syncP*/Atm128AlarmAsyncP$0$t0\000"
	.align	2
.LC220:
	.ascii	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmA"
	.ascii	"syncP*/Atm128AlarmAsyncP$0$dt\000"
	.align	2
.LC221:
	.ascii	"/*AlarmCounterMilliP.Atm128AlarmAsyncC.Atm128AlarmA"
	.ascii	"syncP*/Atm128AlarmAsyncP$0$base\000"
	.align	2
.LC222:
	.ascii	"HplAtm128Timer0AsyncP$inOverflow\000"
	.align	2
.LC223:
	.ascii	"HplAtm128Timer0AsyncP$lastZero\000"
	.align	2
.LC224:
	.ascii	"HplAtm128Timer0AsyncP$oldScale\000"
	.align	2
.LC225:
	.ascii	"HplAtm128Timer0AsyncP$compare\000"
	.align	2
.LC226:
	.ascii	"HplAtm128Timer0AsyncP$overflow\000"
	.align	2
.LC227:
	.ascii	"/*HilTimerMilliC.AlarmToTimerC*/AlarmToTimerC$0$m_d"
	.ascii	"t\000"
	.align	2
.LC228:
	.ascii	"/*HilTimerMilliC.AlarmToTimerC*/AlarmToTimerC$0$m_o"
	.ascii	"neshot\000"
	.align	2
.LC229:
	.ascii	"/*HilTimerMilliC.VirtualizeTimerC*/VirtualizeTimerC"
	.ascii	"$0$m_timers\000"
	.align	2
.LC230:
	.ascii	"RandomMlcgC$seed\000"
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_nido_resolve, %function
__nesc_nido_resolve:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-8]
	str	r1, [fp, #-12]
	str	r2, [fp, #-16]
	str	r3, [fp, #-20]
	ldr	r1, .L1399
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1350
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+4
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1350:
	ldr	r1, .L1399+8
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1352
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+12
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1352:
	ldr	r1, .L1399+16
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1353
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	ldr	r2, .L1399+20
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #7
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1353:
	ldr	r1, .L1399+24
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1354
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+28
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1354:
	ldr	r1, .L1399+32
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1355
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #5
	ldr	r2, .L1399+36
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #32
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1355:
	ldr	r1, .L1399+40
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1356
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1399+44
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #8
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1356:
	ldr	r1, .L1399+48
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1357
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1399+52
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #8
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1357:
	ldr	r1, .L1399+56
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1358
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+60
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1358:
	ldr	r1, .L1399+64
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1359
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+68
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1359:
	ldr	r1, .L1399+72
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1360
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L1399+76
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #41
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1360:
	ldr	r1, .L1399+80
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1361
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+84
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1361:
	ldr	r1, .L1399+88
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1362
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+92
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1362:
	ldr	r1, .L1399+96
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1363
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+100
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1363:
	ldr	r1, .L1399+104
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1364
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+108
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1364:
	ldr	r1, .L1399+112
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1365
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+116
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1365:
	ldr	r1, .L1399+120
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1366
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+124
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1366:
	ldr	r1, .L1399+128
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1367
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+132
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1367:
	ldr	r1, .L1399+136
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1368
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+140
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1368:
	ldr	r1, .L1399+144
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1369
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+148
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1369:
	ldr	r1, .L1399+152
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1370
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #5
	ldr	r2, .L1399+156
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #32
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1370:
	ldr	r1, .L1399+160
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1371
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+164
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1371:
	ldr	r1, .L1399+168
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1372
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+172
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1372:
	ldr	r1, .L1399+176
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1373
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+180
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1373:
	ldr	r1, .L1399+184
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1374
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+188
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1374:
	ldr	r1, .L1399+192
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1375
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+196
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1375:
	ldr	r1, .L1399+200
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1376
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1399+204
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #8
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1376:
	ldr	r1, .L1399+208
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1377
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+212
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1377:
	ldr	r1, .L1399+216
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1378
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1399+220
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #8
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1378:
	ldr	r1, .L1399+224
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1379
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+228
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1379:
	ldr	r1, .L1399+232
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1380
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #1
	ldr	r2, .L1399+236
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #2
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1380:
	ldr	r1, .L1399+240
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1381
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+244
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1381:
	ldr	r1, .L1399+248
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1382
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L1399+252
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #41
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1382:
	ldr	r1, .L1399+256
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1383
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+260
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1383:
	ldr	r1, .L1399+264
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1384
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+268
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1384:
	ldr	r1, .L1399+272
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1385
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+276
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1385:
	ldr	r1, .L1399+280
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1386
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+284
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1386:
	ldr	r1, .L1399+288
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1387
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+292
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1387:
	ldr	r1, .L1399+296
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1388
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+300
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1388:
	ldr	r1, .L1399+304
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1389
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+308
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1389:
	ldr	r1, .L1399+312
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1390
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+316
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1390:
	ldr	r1, .L1399+320
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1391
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1399+324
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #8
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1391:
	ldr	r1, .L1399+328
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1392
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+332
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1392:
	ldr	r1, .L1399+336
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1393
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+340
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1393:
	ldr	r1, .L1399+344
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1394
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+348
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1394:
	ldr	r1, .L1399+352
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1395
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+356
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1395:
	ldr	r1, .L1399+360
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1396
	ldr	r3, [fp, #-8]
	ldr	r2, .L1399+364
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #1
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1396:
	ldr	r1, .L1399+368
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1397
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #3
	ldr	r2, .L1399+372
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #24
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1397:
	ldr	r1, .L1399+376
	ldr	r0, [fp, #-12]
	bl	strcmp
	mov	r3, r0
	cmp	r3, #0
	bne	.L1398
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1399+380
	add	r3, r3, r2
	mov	r2, r3
	ldr	r3, [fp, #-16]
	str	r2, [r3]
	ldr	r3, [fp, #-20]
	mov	r2, #4
	str	r2, [r3]
	mov	r3, #0
	b	.L1351
.L1398:
	mvn	r3, #0
.L1351:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1400:
	.align	2
.L1399:
	.word	.LC183
	.word	SimSchedulerBasicP$m_head
	.word	.LC184
	.word	SimSchedulerBasicP$m_tail
	.word	.LC185
	.word	SimSchedulerBasicP$m_next
	.word	.LC186
	.word	SimSchedulerBasicP$sim_scheduler_event_pending
	.word	.LC187
	.word	SimSchedulerBasicP$sim_scheduler_event
	.word	.LC188
	.word	SimMoteP$euid
	.word	.LC189
	.word	SimMoteP$startTime
	.word	.LC190
	.word	SimMoteP$isOn
	.word	.LC191
	.word	SimMoteP$bootEvent
	.word	.LC192
	.word	TossimActiveMessageC$buffer
	.word	.LC193
	.word	TossimActiveMessageC$bufferPointer
	.word	.LC194
	.word	TossimPacketModelC$initialized
	.word	.LC195
	.word	TossimPacketModelC$running
	.word	.LC196
	.word	TossimPacketModelC$backoffCount
	.word	.LC197
	.word	TossimPacketModelC$neededFreeSamples
	.word	.LC198
	.word	TossimPacketModelC$sending
	.word	.LC199
	.word	TossimPacketModelC$transmitting
	.word	.LC200
	.word	TossimPacketModelC$sendingLength
	.word	.LC201
	.word	TossimPacketModelC$destNode
	.word	.LC202
	.word	TossimPacketModelC$sendEvent
	.word	.LC203
	.word	TossimPacketModelC$error
	.word	.LC204
	.word	CpmModelC$outgoing
	.word	.LC205
	.word	CpmModelC$requestAck
	.word	.LC206
	.word	CpmModelC$receiving
	.word	.LC207
	.word	CpmModelC$transmitting
	.word	.LC208
	.word	CpmModelC$transmissionEndTime
	.word	.LC209
	.word	CpmModelC$outstandingReceptionHead
	.word	.LC210
	.word	CpmModelC$clearThreshold
	.word	.LC211
	.word	ActiveMessageAddressC$set
	.word	.LC212
	.word	ActiveMessageAddressC$addr
	.word	.LC213
	.word	sendAckC$counter
	.word	.LC214
	.word	sendAckC$packet
	.word	.LC215
	.word	AMQueueImplP$0$current
	.word	.LC216
	.word	AMQueueImplP$0$queue
	.word	.LC217
	.word	AMQueueImplP$0$cancelMask
	.word	.LC218
	.word	Atm128AlarmAsyncP$0$set
	.word	.LC219
	.word	Atm128AlarmAsyncP$0$t0
	.word	.LC220
	.word	Atm128AlarmAsyncP$0$dt
	.word	.LC221
	.word	Atm128AlarmAsyncP$0$base
	.word	.LC222
	.word	HplAtm128Timer0AsyncP$inOverflow
	.word	.LC223
	.word	HplAtm128Timer0AsyncP$lastZero
	.word	.LC224
	.word	HplAtm128Timer0AsyncP$oldScale
	.word	.LC225
	.word	HplAtm128Timer0AsyncP$compare
	.word	.LC226
	.word	HplAtm128Timer0AsyncP$overflow
	.word	.LC227
	.word	AlarmToTimerC$0$m_dt
	.word	.LC228
	.word	AlarmToTimerC$0$m_oneshot
	.word	.LC229
	.word	VirtualizeTimerC$0$m_timers
	.word	.LC230
	.word	RandomMlcgC$seed
	.size	__nesc_nido_resolve, .-__nesc_nido_resolve
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__nesc_nido_initialise, %function
__nesc_nido_initialise:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+4
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #3
	sub	r3, r3, r2
	ldr	r2, .L1402+8
	add	r3, r3, r2
	mov	r2, #7
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+12
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #5
	ldr	r2, .L1402+16
	add	r3, r3, r2
	mov	r2, #32
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1402+20
	add	r3, r3, r2
	mov	r2, #8
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1402+24
	add	r3, r3, r2
	mov	r2, #8
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+28
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+32
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L1402+36
	add	r3, r3, r2
	mov	r2, #41
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L1402+36
	add	r2, r3, r2
	ldr	r1, .L1402+40
	ldr	r3, [fp, #-8]
	str	r2, [r1, r3, lsl #2]
	ldr	r2, .L1402+44
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, .L1402+48
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+52
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+56
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+60
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L1402+64
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, .L1402+68
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+72
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #5
	ldr	r2, .L1402+76
	add	r3, r3, r2
	mov	r2, #32
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+80
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+84
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+88
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+92
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, .L1402+96
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	ldr	r2, .L1402+100
	add	r3, r3, r2
	mov	r2, #8
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+104
	ldr	r3, [fp, #-8]
	mov	r1, #0
	str	r1, [r2, r3, lsl #2]
	ldr	r2, .L1402+108
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	ldr	r3, .L1402+112
	stm	r1, {r2-r3}
	ldr	r2, .L1402+116
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #1
	ldr	r2, .L1402+120
	add	r3, r3, r2
	mov	r2, #2
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+124
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #2
	add	r3, r3, r2
	lsl	r3, r3, #3
	add	r3, r3, r2
	ldr	r2, .L1402+128
	add	r3, r3, r2
	mov	r2, #41
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+132
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #1
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+136
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+140
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+144
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+148
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+152
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+156
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, .L1402+160
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r2, .L1402+164
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #3
	add	r1, r2, r3
	mov	r2, #0
	mov	r3, #0
	stm	r1, {r2-r3}
	ldr	r2, .L1402+168
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+172
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+176
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+180
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	ldr	r2, .L1402+184
	add	r3, r3, r2
	mov	r2, #1
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r2, [fp, #-8]
	mov	r3, r2
	lsl	r3, r3, #1
	add	r3, r3, r2
	lsl	r3, r3, #3
	ldr	r2, .L1402+188
	add	r3, r3, r2
	mov	r2, #24
	mov	r1, #0
	mov	r0, r3
	bl	memset
	ldr	r3, [fp, #-8]
	lsl	r3, r3, #2
	ldr	r2, .L1402+192
	add	r3, r3, r2
	mov	r2, #4
	mov	r1, #0
	mov	r0, r3
	bl	memset
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L1403:
	.align	2
.L1402:
	.word	SimSchedulerBasicP$m_head
	.word	SimSchedulerBasicP$m_tail
	.word	SimSchedulerBasicP$m_next
	.word	SimSchedulerBasicP$sim_scheduler_event_pending
	.word	SimSchedulerBasicP$sim_scheduler_event
	.word	SimMoteP$euid
	.word	SimMoteP$startTime
	.word	SimMoteP$isOn
	.word	SimMoteP$bootEvent
	.word	TossimActiveMessageC$buffer
	.word	TossimActiveMessageC$bufferPointer
	.word	TossimPacketModelC$initialized
	.word	TossimPacketModelC$running
	.word	TossimPacketModelC$backoffCount
	.word	TossimPacketModelC$neededFreeSamples
	.word	TossimPacketModelC$sending
	.word	TossimPacketModelC$transmitting
	.word	TossimPacketModelC$sendingLength
	.word	TossimPacketModelC$destNode
	.word	TossimPacketModelC$sendEvent
	.word	TossimPacketModelC$error
	.word	CpmModelC$outgoing
	.word	CpmModelC$requestAck
	.word	CpmModelC$receiving
	.word	CpmModelC$transmitting
	.word	CpmModelC$transmissionEndTime
	.word	CpmModelC$outstandingReceptionHead
	.word	CpmModelC$clearThreshold
	.word	-1068367872
	.word	ActiveMessageAddressC$set
	.word	ActiveMessageAddressC$addr
	.word	sendAckC$counter
	.word	sendAckC$packet
	.word	AMQueueImplP$0$current
	.word	AMQueueImplP$0$queue
	.word	AMQueueImplP$0$cancelMask
	.word	Atm128AlarmAsyncP$0$set
	.word	Atm128AlarmAsyncP$0$t0
	.word	Atm128AlarmAsyncP$0$dt
	.word	Atm128AlarmAsyncP$0$base
	.word	HplAtm128Timer0AsyncP$inOverflow
	.word	HplAtm128Timer0AsyncP$lastZero
	.word	HplAtm128Timer0AsyncP$oldScale
	.word	HplAtm128Timer0AsyncP$compare
	.word	HplAtm128Timer0AsyncP$overflow
	.word	AlarmToTimerC$0$m_dt
	.word	AlarmToTimerC$0$m_oneshot
	.word	VirtualizeTimerC$0$m_timers
	.word	RandomMlcgC$seed
	.size	__nesc_nido_initialise, .-__nesc_nido_initialise
	.section	.rodata
	.align	2
	.type	__FUNCTION__.8202, %object
	.size	__FUNCTION__.8202, 25
__FUNCTION__.8202:
	.ascii	"AMQueueImplP$0$Send$send\000"
	.align	2
	.type	__FUNCTION__.9253, %object
	.size	__FUNCTION__.9253, 31
__FUNCTION__.9253:
	.ascii	"AMQueueImplP$0$AMSend$sendDone\000"
	.align	2
	.type	__FUNCTION__.8482, %object
	.size	__FUNCTION__.8482, 44
__FUNCTION__.8482:
	.ascii	"HplAtm128Timer0AsyncP$timer0_compare_handle\000"
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
