	.file	"265579.c"
	.intel_syntax noprefix
	.text
	.globl	__sync_fetch_and_add_4
	.hidden	__sync_fetch_and_add_4
	.type	__sync_fetch_and_add_4, @function
__sync_fetch_and_add_4:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L2:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	lea	ecx, [rdx+rax]
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L2
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	__sync_fetch_and_add_4, .-__sync_fetch_and_add_4
	.globl	__sync_fetch_and_sub_4
	.hidden	__sync_fetch_and_sub_4
	.type	__sync_fetch_and_sub_4, @function
__sync_fetch_and_sub_4:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L5:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L5
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	__sync_fetch_and_sub_4, .-__sync_fetch_and_sub_4
	.globl	__sync_fetch_and_or_4
	.hidden	__sync_fetch_and_or_4
	.type	__sync_fetch_and_or_4, @function
__sync_fetch_and_or_4:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L8:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	or	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L8
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	__sync_fetch_and_or_4, .-__sync_fetch_and_or_4
	.globl	__sync_fetch_and_and_4
	.hidden	__sync_fetch_and_and_4
	.type	__sync_fetch_and_and_4, @function
__sync_fetch_and_and_4:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L11:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	and	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L11
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	__sync_fetch_and_and_4, .-__sync_fetch_and_and_4
	.globl	__sync_fetch_and_xor_4
	.hidden	__sync_fetch_and_xor_4
	.type	__sync_fetch_and_xor_4, @function
__sync_fetch_and_xor_4:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L14:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	xor	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L14
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	__sync_fetch_and_xor_4, .-__sync_fetch_and_xor_4
	.globl	__sync_fetch_and_nand_4
	.hidden	__sync_fetch_and_nand_4
	.type	__sync_fetch_and_nand_4, @function
__sync_fetch_and_nand_4:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L17:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	not	eax
	and	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L17
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	__sync_fetch_and_nand_4, .-__sync_fetch_and_nand_4
	.globl	__sync_fetch_and_add_2
	.hidden	__sync_fetch_and_add_2
	.type	__sync_fetch_and_add_2, @function
__sync_fetch_and_add_2:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L20:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L20
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	__sync_fetch_and_add_2, .-__sync_fetch_and_add_2
	.globl	__sync_fetch_and_sub_2
	.hidden	__sync_fetch_and_sub_2
	.type	__sync_fetch_and_sub_2, @function
__sync_fetch_and_sub_2:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L23:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	movsx	ecx, WORD PTR -44[rbp]
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L23
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	__sync_fetch_and_sub_2, .-__sync_fetch_and_sub_2
	.globl	__sync_fetch_and_or_2
	.hidden	__sync_fetch_and_or_2
	.type	__sync_fetch_and_or_2, @function
__sync_fetch_and_or_2:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L26:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	or	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L26
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	__sync_fetch_and_or_2, .-__sync_fetch_and_or_2
	.globl	__sync_fetch_and_and_2
	.hidden	__sync_fetch_and_and_2
	.type	__sync_fetch_and_and_2, @function
__sync_fetch_and_and_2:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L29:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L29
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	__sync_fetch_and_and_2, .-__sync_fetch_and_and_2
	.globl	__sync_fetch_and_xor_2
	.hidden	__sync_fetch_and_xor_2
	.type	__sync_fetch_and_xor_2, @function
__sync_fetch_and_xor_2:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L32:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	xor	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L32
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	__sync_fetch_and_xor_2, .-__sync_fetch_and_xor_2
	.globl	__sync_fetch_and_nand_2
	.hidden	__sync_fetch_and_nand_2
	.type	__sync_fetch_and_nand_2, @function
__sync_fetch_and_nand_2:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L35:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	not	eax
	mov	edx, eax
	movsx	eax, WORD PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L35
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	__sync_fetch_and_nand_2, .-__sync_fetch_and_nand_2
	.globl	__sync_fetch_and_add_1
	.hidden	__sync_fetch_and_add_1
	.type	__sync_fetch_and_add_1, @function
__sync_fetch_and_add_1:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L38:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L38
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	__sync_fetch_and_add_1, .-__sync_fetch_and_add_1
	.globl	__sync_fetch_and_sub_1
	.hidden	__sync_fetch_and_sub_1
	.type	__sync_fetch_and_sub_1, @function
__sync_fetch_and_sub_1:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L41:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	movsx	ecx, BYTE PTR -44[rbp]
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L41
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	__sync_fetch_and_sub_1, .-__sync_fetch_and_sub_1
	.globl	__sync_fetch_and_or_1
	.hidden	__sync_fetch_and_or_1
	.type	__sync_fetch_and_or_1, @function
__sync_fetch_and_or_1:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L44:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	or	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L44
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	__sync_fetch_and_or_1, .-__sync_fetch_and_or_1
	.globl	__sync_fetch_and_and_1
	.hidden	__sync_fetch_and_and_1
	.type	__sync_fetch_and_and_1, @function
__sync_fetch_and_and_1:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L47:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L47
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	__sync_fetch_and_and_1, .-__sync_fetch_and_and_1
	.globl	__sync_fetch_and_xor_1
	.hidden	__sync_fetch_and_xor_1
	.type	__sync_fetch_and_xor_1, @function
__sync_fetch_and_xor_1:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L50:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	xor	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L50
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	__sync_fetch_and_xor_1, .-__sync_fetch_and_xor_1
	.globl	__sync_fetch_and_nand_1
	.hidden	__sync_fetch_and_nand_1
	.type	__sync_fetch_and_nand_1, @function
__sync_fetch_and_nand_1:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L53:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	not	eax
	mov	edx, eax
	movsx	eax, BYTE PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L53
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	__sync_fetch_and_nand_1, .-__sync_fetch_and_nand_1
	.globl	__sync_add_and_fetch_4
	.hidden	__sync_add_and_fetch_4
	.type	__sync_add_and_fetch_4, @function
__sync_add_and_fetch_4:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L56:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	lea	ecx, [rdx+rax]
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L56
	mov	edx, DWORD PTR -8[rbp]
	mov	eax, DWORD PTR -28[rbp]
	add	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	__sync_add_and_fetch_4, .-__sync_add_and_fetch_4
	.globl	__sync_sub_and_fetch_4
	.hidden	__sync_sub_and_fetch_4
	.type	__sync_sub_and_fetch_4, @function
__sync_sub_and_fetch_4:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L59:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L59
	mov	eax, DWORD PTR -8[rbp]
	sub	eax, DWORD PTR -28[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	__sync_sub_and_fetch_4, .-__sync_sub_and_fetch_4
	.globl	__sync_or_and_fetch_4
	.hidden	__sync_or_and_fetch_4
	.type	__sync_or_and_fetch_4, @function
__sync_or_and_fetch_4:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L62:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	or	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L62
	mov	eax, DWORD PTR -8[rbp]
	or	eax, DWORD PTR -28[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	__sync_or_and_fetch_4, .-__sync_or_and_fetch_4
	.globl	__sync_and_and_fetch_4
	.hidden	__sync_and_and_fetch_4
	.type	__sync_and_and_fetch_4, @function
__sync_and_and_fetch_4:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L65:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	and	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L65
	mov	eax, DWORD PTR -8[rbp]
	and	eax, DWORD PTR -28[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	__sync_and_and_fetch_4, .-__sync_and_and_fetch_4
	.globl	__sync_xor_and_fetch_4
	.hidden	__sync_xor_and_fetch_4
	.type	__sync_xor_and_fetch_4, @function
__sync_xor_and_fetch_4:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L68:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	xor	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L68
	mov	eax, DWORD PTR -8[rbp]
	xor	eax, DWORD PTR -28[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	__sync_xor_and_fetch_4, .-__sync_xor_and_fetch_4
	.globl	__sync_nand_and_fetch_4
	.hidden	__sync_nand_and_fetch_4
	.type	__sync_nand_and_fetch_4, @function
__sync_nand_and_fetch_4:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L71:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -8[rbp]
	not	eax
	and	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L71
	mov	eax, DWORD PTR -8[rbp]
	not	eax
	and	eax, DWORD PTR -28[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	__sync_nand_and_fetch_4, .-__sync_nand_and_fetch_4
	.globl	__sync_add_and_fetch_2
	.hidden	__sync_add_and_fetch_2
	.type	__sync_add_and_fetch_2, @function
__sync_add_and_fetch_2:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L74:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L74
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	__sync_add_and_fetch_2, .-__sync_add_and_fetch_2
	.globl	__sync_sub_and_fetch_2
	.hidden	__sync_sub_and_fetch_2
	.type	__sync_sub_and_fetch_2, @function
__sync_sub_and_fetch_2:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L77:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	movsx	ecx, WORD PTR -44[rbp]
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L77
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	__sync_sub_and_fetch_2, .-__sync_sub_and_fetch_2
	.globl	__sync_or_and_fetch_2
	.hidden	__sync_or_and_fetch_2
	.type	__sync_or_and_fetch_2, @function
__sync_or_and_fetch_2:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L80:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	or	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L80
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	__sync_or_and_fetch_2, .-__sync_or_and_fetch_2
	.globl	__sync_and_and_fetch_2
	.hidden	__sync_and_and_fetch_2
	.type	__sync_and_and_fetch_2, @function
__sync_and_and_fetch_2:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L83:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L83
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	__sync_and_and_fetch_2, .-__sync_and_and_fetch_2
	.globl	__sync_xor_and_fetch_2
	.hidden	__sync_xor_and_fetch_2
	.type	__sync_xor_and_fetch_2, @function
__sync_xor_and_fetch_2:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L86:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	xor	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L86
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	__sync_xor_and_fetch_2, .-__sync_xor_and_fetch_2
	.globl	__sync_nand_and_fetch_2
	.hidden	__sync_nand_and_fetch_2
	.type	__sync_nand_and_fetch_2, @function
__sync_nand_and_fetch_2:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L89:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	not	eax
	mov	edx, eax
	movsx	eax, WORD PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L89
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	__sync_nand_and_fetch_2, .-__sync_nand_and_fetch_2
	.globl	__sync_add_and_fetch_1
	.hidden	__sync_add_and_fetch_1
	.type	__sync_add_and_fetch_1, @function
__sync_add_and_fetch_1:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L92:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L92
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	__sync_add_and_fetch_1, .-__sync_add_and_fetch_1
	.globl	__sync_sub_and_fetch_1
	.hidden	__sync_sub_and_fetch_1
	.type	__sync_sub_and_fetch_1, @function
__sync_sub_and_fetch_1:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L95:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	movsx	ecx, BYTE PTR -44[rbp]
	sub	eax, ecx
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L95
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	__sync_sub_and_fetch_1, .-__sync_sub_and_fetch_1
	.globl	__sync_or_and_fetch_1
	.hidden	__sync_or_and_fetch_1
	.type	__sync_or_and_fetch_1, @function
__sync_or_and_fetch_1:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L98:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	or	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L98
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	__sync_or_and_fetch_1, .-__sync_or_and_fetch_1
	.globl	__sync_and_and_fetch_1
	.hidden	__sync_and_and_fetch_1
	.type	__sync_and_and_fetch_1, @function
__sync_and_and_fetch_1:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L101:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L101
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	__sync_and_and_fetch_1, .-__sync_and_and_fetch_1
	.globl	__sync_xor_and_fetch_1
	.hidden	__sync_xor_and_fetch_1
	.type	__sync_xor_and_fetch_1, @function
__sync_xor_and_fetch_1:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L104:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	xor	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L104
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	__sync_xor_and_fetch_1, .-__sync_xor_and_fetch_1
	.globl	__sync_nand_and_fetch_1
	.hidden	__sync_nand_and_fetch_1
	.type	__sync_nand_and_fetch_1, @function
__sync_nand_and_fetch_1:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L107:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	not	eax
	mov	edx, eax
	movsx	eax, BYTE PTR -44[rbp]
	and	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	or	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L107
	mov	eax, DWORD PTR -16[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	__sync_nand_and_fetch_1, .-__sync_nand_and_fetch_1
	.globl	__sync_val_compare_and_swap_4
	.hidden	__sync_val_compare_and_swap_4
	.type	__sync_val_compare_and_swap_4, @function
__sync_val_compare_and_swap_4:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -32[rbp], edx
.L113:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	cmp	eax, DWORD PTR -8[rbp]
	je	.L110
	mov	eax, DWORD PTR -8[rbp]
	jmp	.L111
.L110:
	mov	rdx, QWORD PTR -24[rbp]
	mov	ecx, DWORD PTR -32[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L113
	mov	eax, DWORD PTR -28[rbp]
.L111:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	__sync_val_compare_and_swap_4, .-__sync_val_compare_and_swap_4
	.globl	__sync_val_compare_and_swap_2
	.hidden	__sync_val_compare_and_swap_2
	.type	__sync_val_compare_and_swap_2, @function
__sync_val_compare_and_swap_2:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	ecx, esi
	mov	eax, edx
	mov	edx, ecx
	mov	WORD PTR -44[rbp], dx
	mov	WORD PTR -48[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L118:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, WORD PTR -44[rbp]
	cmp	edx, eax
	je	.L115
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	jmp	.L116
.L115:
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	mov	esi, eax
	movsx	edx, WORD PTR -48[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	or	eax, esi
	mov	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L118
	movzx	eax, WORD PTR -44[rbp]
.L116:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	__sync_val_compare_and_swap_2, .-__sync_val_compare_and_swap_2
	.globl	__sync_val_compare_and_swap_1
	.hidden	__sync_val_compare_and_swap_1
	.type	__sync_val_compare_and_swap_1, @function
__sync_val_compare_and_swap_1:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	ecx, esi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -44[rbp], dl
	mov	BYTE PTR -48[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L123:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	movsx	eax, BYTE PTR -44[rbp]
	cmp	edx, eax
	je	.L120
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	jmp	.L121
.L120:
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	mov	esi, eax
	movsx	edx, BYTE PTR -48[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	or	eax, esi
	mov	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L123
	movzx	eax, BYTE PTR -44[rbp]
.L121:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	__sync_val_compare_and_swap_1, .-__sync_val_compare_and_swap_1
	.globl	__sync_bool_compare_and_swap_4
	.hidden	__sync_bool_compare_and_swap_4
	.type	__sync_bool_compare_and_swap_4, @function
__sync_bool_compare_and_swap_4:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
	mov	DWORD PTR -32[rbp], edx
	mov	rdx, QWORD PTR -24[rbp]
	mov	ecx, DWORD PTR -32[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	sete	al
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	__sync_bool_compare_and_swap_4, .-__sync_bool_compare_and_swap_4
	.globl	__sync_bool_compare_and_swap_2
	.hidden	__sync_bool_compare_and_swap_2
	.type	__sync_bool_compare_and_swap_2, @function
__sync_bool_compare_and_swap_2:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	ecx, esi
	mov	eax, edx
	mov	edx, ecx
	mov	WORD PTR -28[rbp], dx
	mov	WORD PTR -32[rbp], ax
	movsx	edx, WORD PTR -32[rbp]
	movsx	ecx, WORD PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, ecx
	mov	rdi, rax
	call	__sync_val_compare_and_swap_2
	mov	WORD PTR -2[rbp], ax
	movzx	eax, WORD PTR -28[rbp]
	cmp	ax, WORD PTR -2[rbp]
	sete	al
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	__sync_bool_compare_and_swap_2, .-__sync_bool_compare_and_swap_2
	.globl	__sync_bool_compare_and_swap_1
	.hidden	__sync_bool_compare_and_swap_1
	.type	__sync_bool_compare_and_swap_1, @function
__sync_bool_compare_and_swap_1:
.LFB41:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	ecx, esi
	mov	eax, edx
	mov	edx, ecx
	mov	BYTE PTR -28[rbp], dl
	mov	BYTE PTR -32[rbp], al
	movsx	edx, BYTE PTR -32[rbp]
	movsx	ecx, BYTE PTR -28[rbp]
	mov	rax, QWORD PTR -24[rbp]
	mov	esi, ecx
	mov	rdi, rax
	call	__sync_val_compare_and_swap_1
	mov	BYTE PTR -1[rbp], al
	movzx	eax, BYTE PTR -28[rbp]
	cmp	al, BYTE PTR -1[rbp]
	sete	al
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	__sync_bool_compare_and_swap_1, .-__sync_bool_compare_and_swap_1
	.globl	__sync_synchronize
	.hidden	__sync_synchronize
	.type	__sync_synchronize, @function
__sync_synchronize:
.LFB42:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	eax, 4294905760
	call	rax
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	__sync_synchronize, .-__sync_synchronize
	.globl	__sync_lock_test_and_set_4
	.hidden	__sync_lock_test_and_set_4
	.type	__sync_lock_test_and_set_4, @function
__sync_lock_test_and_set_4:
.LFB43:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -28[rbp], esi
.L132:
	mov	rax, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -8[rbp], eax
	mov	rdx, QWORD PTR -24[rbp]
	mov	ecx, DWORD PTR -28[rbp]
	mov	eax, DWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -4[rbp], eax
	cmp	DWORD PTR -4[rbp], 0
	jne	.L132
	mov	eax, DWORD PTR -8[rbp]
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	__sync_lock_test_and_set_4, .-__sync_lock_test_and_set_4
	.globl	__sync_lock_test_and_set_2
	.hidden	__sync_lock_test_and_set_2
	.type	__sync_lock_test_and_set_2, @function
__sync_lock_test_and_set_2:
.LFB44:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	WORD PTR -44[rbp], ax
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	and	eax, 24
	xor	eax, 16
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 65535
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L135:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	mov	esi, eax
	movsx	edx, WORD PTR -44[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	or	eax, esi
	mov	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L135
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	__sync_lock_test_and_set_2, .-__sync_lock_test_and_set_2
	.globl	__sync_lock_test_and_set_1
	.hidden	__sync_lock_test_and_set_1
	.type	__sync_lock_test_and_set_1, @function
__sync_lock_test_and_set_1:
.LFB45:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 48
	mov	QWORD PTR -40[rbp], rdi
	mov	eax, esi
	mov	BYTE PTR -44[rbp], al
	mov	rax, QWORD PTR -40[rbp]
	mov	eax, eax
	and	eax, 4294967292
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	eax, 3
	not	eax
	and	eax, 24
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	mov	edx, 255
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	mov	DWORD PTR -24[rbp], eax
.L138:
	mov	rax, QWORD PTR -8[rbp]
	mov	eax, DWORD PTR [rax]
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	not	eax
	and	eax, DWORD PTR -20[rbp]
	mov	esi, eax
	movsx	edx, BYTE PTR -44[rbp]
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	sal	edx, cl
	mov	eax, edx
	and	eax, DWORD PTR -24[rbp]
	or	eax, esi
	mov	DWORD PTR -16[rbp], eax
	mov	ecx, DWORD PTR -16[rbp]
	mov	eax, DWORD PTR -20[rbp]
	mov	rdx, QWORD PTR -8[rbp]
	mov	r8d, 4294905792
	mov	esi, ecx
	mov	edi, eax
	call	r8
	mov	DWORD PTR -12[rbp], eax
	cmp	DWORD PTR -12[rbp], 0
	jne	.L138
	mov	eax, DWORD PTR -20[rbp]
	and	eax, DWORD PTR -24[rbp]
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	mov	ecx, eax
	shr	edx, cl
	mov	eax, edx
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	__sync_lock_test_and_set_1, .-__sync_lock_test_and_set_1
	.globl	__sync_lock_release_4
	.hidden	__sync_lock_release_4
	.type	__sync_lock_release_4, @function
__sync_lock_release_4:
.LFB46:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 4294905760
	call	rax
	mov	rax, QWORD PTR -8[rbp]
	mov	DWORD PTR [rax], 0
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE46:
	.size	__sync_lock_release_4, .-__sync_lock_release_4
	.globl	__sync_lock_release_2
	.hidden	__sync_lock_release_2
	.type	__sync_lock_release_2, @function
__sync_lock_release_2:
.LFB47:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 4294905760
	call	rax
	mov	rax, QWORD PTR -8[rbp]
	mov	WORD PTR [rax], 0
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE47:
	.size	__sync_lock_release_2, .-__sync_lock_release_2
	.globl	__sync_lock_release_1
	.hidden	__sync_lock_release_1
	.type	__sync_lock_release_1, @function
__sync_lock_release_1:
.LFB48:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	QWORD PTR -8[rbp], rdi
	mov	eax, 4294905760
	call	rax
	mov	rax, QWORD PTR -8[rbp]
	mov	BYTE PTR [rax], 0
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE48:
	.size	__sync_lock_release_1, .-__sync_lock_release_1
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"265579.c"
	.text
	.align	2
	.global	__sync_fetch_and_add_4
	.hidden	__sync_fetch_and_add_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_add_4, %function
__sync_fetch_and_add_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L2:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	ldr	r4, .L4
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L2
	ldr	r3, [fp, #-20]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L5:
	.align	2
.L4:
	.word	-61504
	.size	__sync_fetch_and_add_4, .-__sync_fetch_and_add_4
	.align	2
	.global	__sync_fetch_and_sub_4
	.hidden	__sync_fetch_and_sub_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_sub_4, %function
__sync_fetch_and_sub_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L7:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	sub	r3, r2, r3
	ldr	r4, .L9
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L7
	ldr	r3, [fp, #-20]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L10:
	.align	2
.L9:
	.word	-61504
	.size	__sync_fetch_and_sub_4, .-__sync_fetch_and_sub_4
	.align	2
	.global	__sync_fetch_and_or_4
	.hidden	__sync_fetch_and_or_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_or_4, %function
__sync_fetch_and_or_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L12:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	orr	r3, r2, r3
	ldr	r4, .L14
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L12
	ldr	r3, [fp, #-20]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L15:
	.align	2
.L14:
	.word	-61504
	.size	__sync_fetch_and_or_4, .-__sync_fetch_and_or_4
	.align	2
	.global	__sync_fetch_and_and_4
	.hidden	__sync_fetch_and_and_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_and_4, %function
__sync_fetch_and_and_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L17:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r3, r3, r2
	ldr	r4, .L19
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L17
	ldr	r3, [fp, #-20]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L20:
	.align	2
.L19:
	.word	-61504
	.size	__sync_fetch_and_and_4, .-__sync_fetch_and_and_4
	.align	2
	.global	__sync_fetch_and_xor_4
	.hidden	__sync_fetch_and_xor_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_xor_4, %function
__sync_fetch_and_xor_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L22:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	eor	r3, r3, r2
	ldr	r4, .L24
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L22
	ldr	r3, [fp, #-20]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L25:
	.align	2
.L24:
	.word	-61504
	.size	__sync_fetch_and_xor_4, .-__sync_fetch_and_xor_4
	.align	2
	.global	__sync_fetch_and_nand_4
	.hidden	__sync_fetch_and_nand_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_nand_4, %function
__sync_fetch_and_nand_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L27:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	mvn	r2, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, r2
	ldr	r4, .L29
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L27
	ldr	r3, [fp, #-20]
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L30:
	.align	2
.L29:
	.word	-61504
	.size	__sync_fetch_and_nand_4, .-__sync_fetch_and_nand_4
	.align	2
	.global	__sync_fetch_and_add_2
	.hidden	__sync_fetch_and_add_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_add_2, %function
__sync_fetch_and_add_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L34
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L32:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L34+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L32
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L35:
	.align	2
.L34:
	.word	65535
	.word	-61504
	.size	__sync_fetch_and_add_2, .-__sync_fetch_and_add_2
	.align	2
	.global	__sync_fetch_and_sub_2
	.hidden	__sync_fetch_and_sub_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_sub_2, %function
__sync_fetch_and_sub_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L39
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L37:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L39+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L37
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L40:
	.align	2
.L39:
	.word	65535
	.word	-61504
	.size	__sync_fetch_and_sub_2, .-__sync_fetch_and_sub_2
	.align	2
	.global	__sync_fetch_and_or_2
	.hidden	__sync_fetch_and_or_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_or_2, %function
__sync_fetch_and_or_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L44
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L42:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	orr	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L44+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L42
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L45:
	.align	2
.L44:
	.word	65535
	.word	-61504
	.size	__sync_fetch_and_or_2, .-__sync_fetch_and_or_2
	.align	2
	.global	__sync_fetch_and_and_2
	.hidden	__sync_fetch_and_and_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_and_2, %function
__sync_fetch_and_and_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L49
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L47:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L49+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L47
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L50:
	.align	2
.L49:
	.word	65535
	.word	-61504
	.size	__sync_fetch_and_and_2, .-__sync_fetch_and_and_2
	.align	2
	.global	__sync_fetch_and_xor_2
	.hidden	__sync_fetch_and_xor_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_xor_2, %function
__sync_fetch_and_xor_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L54
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L52:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	eor	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L54+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L52
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L55:
	.align	2
.L54:
	.word	65535
	.word	-61504
	.size	__sync_fetch_and_xor_2, .-__sync_fetch_and_xor_2
	.align	2
	.global	__sync_fetch_and_nand_2
	.hidden	__sync_fetch_and_nand_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_nand_2, %function
__sync_fetch_and_nand_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L59
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L57:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	mvn	r2, r3
	ldrsh	r3, [fp, #-42]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L59+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L57
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L60:
	.align	2
.L59:
	.word	65535
	.word	-61504
	.size	__sync_fetch_and_nand_2, .-__sync_fetch_and_nand_2
	.align	2
	.global	__sync_fetch_and_add_1
	.hidden	__sync_fetch_and_add_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_add_1, %function
__sync_fetch_and_add_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L62:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L64
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L62
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L65:
	.align	2
.L64:
	.word	-61504
	.size	__sync_fetch_and_add_1, .-__sync_fetch_and_add_1
	.align	2
	.global	__sync_fetch_and_sub_1
	.hidden	__sync_fetch_and_sub_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_sub_1, %function
__sync_fetch_and_sub_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L67:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L69
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L67
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L70:
	.align	2
.L69:
	.word	-61504
	.size	__sync_fetch_and_sub_1, .-__sync_fetch_and_sub_1
	.align	2
	.global	__sync_fetch_and_or_1
	.hidden	__sync_fetch_and_or_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_or_1, %function
__sync_fetch_and_or_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L72:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	orr	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L74
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L72
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L75:
	.align	2
.L74:
	.word	-61504
	.size	__sync_fetch_and_or_1, .-__sync_fetch_and_or_1
	.align	2
	.global	__sync_fetch_and_and_1
	.hidden	__sync_fetch_and_and_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_and_1, %function
__sync_fetch_and_and_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L77:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L79
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L77
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L80:
	.align	2
.L79:
	.word	-61504
	.size	__sync_fetch_and_and_1, .-__sync_fetch_and_and_1
	.align	2
	.global	__sync_fetch_and_xor_1
	.hidden	__sync_fetch_and_xor_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_xor_1, %function
__sync_fetch_and_xor_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L82:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	eor	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L84
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L82
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L85:
	.align	2
.L84:
	.word	-61504
	.size	__sync_fetch_and_xor_1, .-__sync_fetch_and_xor_1
	.align	2
	.global	__sync_fetch_and_nand_1
	.hidden	__sync_fetch_and_nand_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_fetch_and_nand_1, %function
__sync_fetch_and_nand_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L87:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	mvn	r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L89
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L87
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L90:
	.align	2
.L89:
	.word	-61504
	.size	__sync_fetch_and_nand_1, .-__sync_fetch_and_nand_1
	.align	2
	.global	__sync_add_and_fetch_4
	.hidden	__sync_add_and_fetch_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_add_and_fetch_4, %function
__sync_add_and_fetch_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L92:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	ldr	r4, .L94
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L92
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	add	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L95:
	.align	2
.L94:
	.word	-61504
	.size	__sync_add_and_fetch_4, .-__sync_add_and_fetch_4
	.align	2
	.global	__sync_sub_and_fetch_4
	.hidden	__sync_sub_and_fetch_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_sub_and_fetch_4, %function
__sync_sub_and_fetch_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L97:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	sub	r3, r2, r3
	ldr	r4, .L99
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L97
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	sub	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L100:
	.align	2
.L99:
	.word	-61504
	.size	__sync_sub_and_fetch_4, .-__sync_sub_and_fetch_4
	.align	2
	.global	__sync_or_and_fetch_4
	.hidden	__sync_or_and_fetch_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_or_and_fetch_4, %function
__sync_or_and_fetch_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L102:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	orr	r3, r2, r3
	ldr	r4, .L104
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L102
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	orr	r3, r2, r3
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L105:
	.align	2
.L104:
	.word	-61504
	.size	__sync_or_and_fetch_4, .-__sync_or_and_fetch_4
	.align	2
	.global	__sync_and_and_fetch_4
	.hidden	__sync_and_and_fetch_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_and_and_fetch_4, %function
__sync_and_and_fetch_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L107:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r3, r3, r2
	ldr	r4, .L109
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L107
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r3, r3, r2
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L110:
	.align	2
.L109:
	.word	-61504
	.size	__sync_and_and_fetch_4, .-__sync_and_and_fetch_4
	.align	2
	.global	__sync_xor_and_fetch_4
	.hidden	__sync_xor_and_fetch_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_xor_and_fetch_4, %function
__sync_xor_and_fetch_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L112:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	eor	r3, r3, r2
	ldr	r4, .L114
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L112
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	eor	r3, r3, r2
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L115:
	.align	2
.L114:
	.word	-61504
	.size	__sync_xor_and_fetch_4, .-__sync_xor_and_fetch_4
	.align	2
	.global	__sync_nand_and_fetch_4
	.hidden	__sync_nand_and_fetch_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_nand_and_fetch_4, %function
__sync_nand_and_fetch_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #20
	str	r0, [fp, #-24]
	str	r1, [fp, #-28]
.L117:
	ldr	r3, [fp, #-24]
	ldr	r3, [r3]
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-20]
	mvn	r2, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, r2
	ldr	r4, .L119
	ldr	r2, [fp, #-24]
	mov	r1, r3
	ldr	r0, [fp, #-20]
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L117
	ldr	r3, [fp, #-20]
	mvn	r2, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, r2
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L120:
	.align	2
.L119:
	.word	-61504
	.size	__sync_nand_and_fetch_4, .-__sync_nand_and_fetch_4
	.align	2
	.global	__sync_add_and_fetch_2
	.hidden	__sync_add_and_fetch_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_add_and_fetch_2, %function
__sync_add_and_fetch_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L124
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L122:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L124+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L122
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L125:
	.align	2
.L124:
	.word	65535
	.word	-61504
	.size	__sync_add_and_fetch_2, .-__sync_add_and_fetch_2
	.align	2
	.global	__sync_sub_and_fetch_2
	.hidden	__sync_sub_and_fetch_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_sub_and_fetch_2, %function
__sync_sub_and_fetch_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L129
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L127:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L129+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L127
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L130:
	.align	2
.L129:
	.word	65535
	.word	-61504
	.size	__sync_sub_and_fetch_2, .-__sync_sub_and_fetch_2
	.align	2
	.global	__sync_or_and_fetch_2
	.hidden	__sync_or_and_fetch_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_or_and_fetch_2, %function
__sync_or_and_fetch_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L134
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L132:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	orr	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L134+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L132
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L135:
	.align	2
.L134:
	.word	65535
	.word	-61504
	.size	__sync_or_and_fetch_2, .-__sync_or_and_fetch_2
	.align	2
	.global	__sync_and_and_fetch_2
	.hidden	__sync_and_and_fetch_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_and_and_fetch_2, %function
__sync_and_and_fetch_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L139
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L137:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L139+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L137
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L140:
	.align	2
.L139:
	.word	65535
	.word	-61504
	.size	__sync_and_and_fetch_2, .-__sync_and_and_fetch_2
	.align	2
	.global	__sync_xor_and_fetch_2
	.hidden	__sync_xor_and_fetch_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_xor_and_fetch_2, %function
__sync_xor_and_fetch_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L144
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L142:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	eor	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L144+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L142
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L145:
	.align	2
.L144:
	.word	65535
	.word	-61504
	.size	__sync_xor_and_fetch_2, .-__sync_xor_and_fetch_2
	.align	2
	.global	__sync_nand_and_fetch_2
	.hidden	__sync_nand_and_fetch_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_nand_and_fetch_2, %function
__sync_nand_and_fetch_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L149
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L147:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	mvn	r2, r3
	ldrsh	r3, [fp, #-42]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L149+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L147
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L150:
	.align	2
.L149:
	.word	65535
	.word	-61504
	.size	__sync_nand_and_fetch_2, .-__sync_nand_and_fetch_2
	.align	2
	.global	__sync_add_and_fetch_1
	.hidden	__sync_add_and_fetch_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_add_and_fetch_1, %function
__sync_add_and_fetch_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L152:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	add	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L154
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L152
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L155:
	.align	2
.L154:
	.word	-61504
	.size	__sync_add_and_fetch_1, .-__sync_add_and_fetch_1
	.align	2
	.global	__sync_sub_and_fetch_1
	.hidden	__sync_sub_and_fetch_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_sub_and_fetch_1, %function
__sync_sub_and_fetch_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L157:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	sub	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L159
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L157
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L160:
	.align	2
.L159:
	.word	-61504
	.size	__sync_sub_and_fetch_1, .-__sync_sub_and_fetch_1
	.align	2
	.global	__sync_or_and_fetch_1
	.hidden	__sync_or_and_fetch_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_or_and_fetch_1, %function
__sync_or_and_fetch_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L162:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	orr	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L164
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L162
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L165:
	.align	2
.L164:
	.word	-61504
	.size	__sync_or_and_fetch_1, .-__sync_or_and_fetch_1
	.align	2
	.global	__sync_and_and_fetch_1
	.hidden	__sync_and_and_fetch_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_and_and_fetch_1, %function
__sync_and_and_fetch_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L167:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L169
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L167
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L170:
	.align	2
.L169:
	.word	-61504
	.size	__sync_and_and_fetch_1, .-__sync_and_and_fetch_1
	.align	2
	.global	__sync_xor_and_fetch_1
	.hidden	__sync_xor_and_fetch_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_xor_and_fetch_1, %function
__sync_xor_and_fetch_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L172:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	eor	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L174
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L172
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L175:
	.align	2
.L174:
	.word	-61504
	.size	__sync_xor_and_fetch_1, .-__sync_xor_and_fetch_1
	.align	2
	.global	__sync_nand_and_fetch_1
	.hidden	__sync_nand_and_fetch_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_nand_and_fetch_1, %function
__sync_nand_and_fetch_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L177:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	mvn	r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	ldr	r2, [fp, #-28]
	and	r3, r3, r2
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r3, r3, r2
	ldr	r2, [fp, #-20]
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L179
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L177
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L180:
	.align	2
.L179:
	.word	-61504
	.size	__sync_nand_and_fetch_1, .-__sync_nand_and_fetch_1
	.align	2
	.global	__sync_val_compare_and_swap_4
	.hidden	__sync_val_compare_and_swap_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_val_compare_and_swap_4, %function
__sync_val_compare_and_swap_4:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
.L185:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	ldr	r2, [fp, #-20]
	ldr	r3, [fp, #-12]
	cmp	r2, r3
	beq	.L182
	ldr	r3, [fp, #-12]
	b	.L183
.L182:
	ldr	r3, .L186
	ldr	r2, [fp, #-16]
	ldr	r1, [fp, #-24]
	ldr	r0, [fp, #-12]
	blx	r3
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L185
	ldr	r3, [fp, #-20]
.L183:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L187:
	.align	2
.L186:
	.word	-61504
	.size	__sync_val_compare_and_swap_4, .-__sync_val_compare_and_swap_4
	.align	2
	.global	__sync_val_compare_and_swap_2
	.hidden	__sync_val_compare_and_swap_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_val_compare_and_swap_2, %function
__sync_val_compare_and_swap_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-44]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L193
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L192:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrsh	r3, [fp, #-42]
	cmp	r2, r3
	beq	.L189
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	b	.L190
.L189:
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r2, r2, r3
	ldrsh	r1, [fp, #-44]
	ldr	r3, [fp, #-32]
	lsl	r1, r1, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, r1
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L193+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L192
	ldrsh	r3, [fp, #-42]
.L190:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L194:
	.align	2
.L193:
	.word	65535
	.word	-61504
	.size	__sync_val_compare_and_swap_2, .-__sync_val_compare_and_swap_2
	.align	2
	.global	__sync_val_compare_and_swap_1
	.hidden	__sync_val_compare_and_swap_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_val_compare_and_swap_1, %function
__sync_val_compare_and_swap_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	mov	r3, r2
	strb	r3, [fp, #-42]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L199:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r2, r2, r3
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
	cmp	r2, r3
	beq	.L196
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	b	.L197
.L196:
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r2, r2, r3
	ldrb	r1, [fp, #-42]	@ zero_extendqisi2
	ldr	r3, [fp, #-32]
	lsl	r1, r1, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, r1
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L200
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L199
	ldrb	r3, [fp, #-41]	@ zero_extendqisi2
.L197:
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L201:
	.align	2
.L200:
	.word	-61504
	.size	__sync_val_compare_and_swap_1, .-__sync_val_compare_and_swap_1
	.align	2
	.global	__sync_bool_compare_and_swap_4
	.hidden	__sync_bool_compare_and_swap_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_bool_compare_and_swap_4, %function
__sync_bool_compare_and_swap_4:
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #24
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
	str	r2, [fp, #-24]
	ldr	r3, .L204
	ldr	r2, [fp, #-16]
	ldr	r1, [fp, #-24]
	ldr	r0, [fp, #-20]
	blx	r3
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L205:
	.align	2
.L204:
	.word	-61504
	.size	__sync_bool_compare_and_swap_4, .-__sync_bool_compare_and_swap_4
	.global	__sync_val_compare_and_swap_2
	.align	2
	.global	__sync_bool_compare_and_swap_2
	.hidden	__sync_bool_compare_and_swap_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_bool_compare_and_swap_2, %function
__sync_bool_compare_and_swap_2:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strh	r3, [fp, #-18]	@ movhi
	mov	r3, r2	@ movhi
	strh	r3, [fp, #-20]	@ movhi
	ldr	r0, [fp, #-16]
	ldrh	r3, [fp, #-18]	@ movhi
	lsl	r3, r3, #16
	asr	r3, r3, #16
	ldrsh	r2, [fp, #-20]
	mov	r1, r3
	bl	__sync_val_compare_and_swap_2
	strh	r0, [fp, #-6]	@ movhi
	ldrsh	r2, [fp, #-18]
	ldrsh	r3, [fp, #-6]
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__sync_bool_compare_and_swap_2, .-__sync_bool_compare_and_swap_2
	.global	__sync_val_compare_and_swap_1
	.align	2
	.global	__sync_bool_compare_and_swap_1
	.hidden	__sync_bool_compare_and_swap_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_bool_compare_and_swap_1, %function
__sync_bool_compare_and_swap_1:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	mov	r3, r1
	strb	r3, [fp, #-17]
	mov	r3, r2
	strb	r3, [fp, #-18]
	ldr	r0, [fp, #-16]
	ldrb	r3, [fp, #-17]
	lsl	r3, r3, #24
	asr	r3, r3, #24
	ldrsb	r2, [fp, #-18]
	mov	r1, r3
	bl	__sync_val_compare_and_swap_1
	strb	r0, [fp, #-5]
	ldrb	r2, [fp, #-17]	@ zero_extendqisi2
	ldrb	r3, [fp, #-5]	@ zero_extendqisi2
	cmp	r2, r3
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
	.size	__sync_bool_compare_and_swap_1, .-__sync_bool_compare_and_swap_1
	.align	2
	.global	__sync_synchronize
	.hidden	__sync_synchronize
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_synchronize, %function
__sync_synchronize:
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	ldr	r3, .L211
	blx	r3
	nop
	pop	{fp, pc}
.L212:
	.align	2
.L211:
	.word	-61536
	.size	__sync_synchronize, .-__sync_synchronize
	.align	2
	.global	__sync_lock_test_and_set_4
	.hidden	__sync_lock_test_and_set_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_lock_test_and_set_4, %function
__sync_lock_test_and_set_4:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	str	r1, [fp, #-20]
.L214:
	ldr	r3, [fp, #-16]
	ldr	r3, [r3]
	str	r3, [fp, #-12]
	ldr	r3, .L216
	ldr	r2, [fp, #-16]
	ldr	r1, [fp, #-20]
	ldr	r0, [fp, #-12]
	blx	r3
	str	r0, [fp, #-8]
	ldr	r3, [fp, #-8]
	cmp	r3, #0
	bne	.L214
	ldr	r3, [fp, #-12]
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L217:
	.align	2
.L216:
	.word	-61504
	.size	__sync_lock_test_and_set_4, .-__sync_lock_test_and_set_4
	.align	2
	.global	__sync_lock_test_and_set_2
	.hidden	__sync_lock_test_and_set_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_lock_test_and_set_2, %function
__sync_lock_test_and_set_2:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strh	r3, [fp, #-42]	@ movhi
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	ldr	r2, .L221
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L219:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r2, r2, r3
	ldrsh	r1, [fp, #-42]
	ldr	r3, [fp, #-32]
	lsl	r1, r1, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, r1
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L221+4
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L219
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	lsl	r3, r3, #16
	asr	r3, r3, #16
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L222:
	.align	2
.L221:
	.word	65535
	.word	-61504
	.size	__sync_lock_test_and_set_2, .-__sync_lock_test_and_set_2
	.align	2
	.global	__sync_lock_test_and_set_1
	.hidden	__sync_lock_test_and_set_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_lock_test_and_set_1, %function
__sync_lock_test_and_set_1:
	@ args = 0, pretend = 0, frame = 32
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #36
	str	r0, [fp, #-40]
	mov	r3, r1
	strb	r3, [fp, #-41]
	ldr	r3, [fp, #-40]
	bic	r3, r3, #3
	str	r3, [fp, #-36]
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	and	r3, r3, #24
	str	r3, [fp, #-32]
	mov	r2, #255
	ldr	r3, [fp, #-32]
	lsl	r3, r2, r3
	str	r3, [fp, #-28]
.L224:
	ldr	r3, [fp, #-36]
	ldr	r3, [r3]
	str	r3, [fp, #-24]
	ldr	r3, [fp, #-28]
	mvn	r2, r3
	ldr	r3, [fp, #-24]
	and	r2, r2, r3
	ldrb	r1, [fp, #-41]	@ zero_extendqisi2
	ldr	r3, [fp, #-32]
	lsl	r1, r1, r3
	ldr	r3, [fp, #-28]
	and	r3, r3, r1
	orr	r3, r2, r3
	str	r3, [fp, #-20]
	ldr	r3, [fp, #-24]
	ldr	r1, [fp, #-20]
	ldr	r4, .L226
	ldr	r2, [fp, #-36]
	mov	r0, r3
	blx	r4
	str	r0, [fp, #-16]
	ldr	r3, [fp, #-16]
	cmp	r3, #0
	bne	.L224
	ldr	r2, [fp, #-24]
	ldr	r3, [fp, #-28]
	and	r2, r2, r3
	ldr	r3, [fp, #-32]
	lsr	r3, r2, r3
	and	r3, r3, #255
	mov	r0, r3
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L227:
	.align	2
.L226:
	.word	-61504
	.size	__sync_lock_test_and_set_1, .-__sync_lock_test_and_set_1
	.align	2
	.global	__sync_lock_release_4
	.hidden	__sync_lock_release_4
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_lock_release_4, %function
__sync_lock_release_4:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L229
	blx	r3
	ldr	r3, [fp, #-8]
	mov	r2, #0
	str	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L230:
	.align	2
.L229:
	.word	-61536
	.size	__sync_lock_release_4, .-__sync_lock_release_4
	.align	2
	.global	__sync_lock_release_2
	.hidden	__sync_lock_release_2
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_lock_release_2, %function
__sync_lock_release_2:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L232
	blx	r3
	ldr	r3, [fp, #-8]
	mov	r2, #0
	strh	r2, [r3]	@ movhi
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L233:
	.align	2
.L232:
	.word	-61536
	.size	__sync_lock_release_2, .-__sync_lock_release_2
	.align	2
	.global	__sync_lock_release_1
	.hidden	__sync_lock_release_1
	.syntax unified
	.arm
	.fpu softvfp
	.type	__sync_lock_release_1, %function
__sync_lock_release_1:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	str	r0, [fp, #-8]
	ldr	r3, .L235
	blx	r3
	ldr	r3, [fp, #-8]
	mov	r2, #0
	strb	r2, [r3]
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L236:
	.align	2
.L235:
	.word	-61536
	.size	__sync_lock_release_1, .-__sync_lock_release_1
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
