	.file	"589996.c"
	.intel_syntax noprefix
	.text
	.section	.rodata
	.align 32
	.type	OUTFLANK_2, @object
	.size	OUTFLANK_2, 64
OUTFLANK_2:
	.string	""
	.string	"\001"
	.string	""
	.string	"\020\021"
	.string	""
	.string	""
	.string	"\001"
	.string	""
	.string	" !"
	.string	""
	.string	""
	.string	"\001"
	.string	""
	.string	"\020\021"
	.string	""
	.string	""
	.string	"\001"
	.string	""
	.string	"@A"
	.string	""
	.string	""
	.string	"\001"
	.string	""
	.string	"\020\021"
	.string	""
	.string	""
	.string	"\001"
	.string	""
	.string	" !"
	.string	""
	.string	""
	.string	"\001"
	.string	""
	.string	"\020\021"
	.string	""
	.string	""
	.string	"\001"
	.string	""
	.string	"\200\201"
	.string	""
	.align 32
	.type	OUTFLANK_3, @object
	.size	OUTFLANK_3, 64
OUTFLANK_3:
	.string	""
	.string	""
	.string	"\002\001"
	.string	""
	.string	""
	.string	""
	.string	"  \"!"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\002\001"
	.string	""
	.string	""
	.string	""
	.string	"@@BA"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\002\001"
	.string	""
	.string	""
	.string	""
	.string	"  \"!"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\002\001"
	.string	""
	.string	""
	.string	""
	.string	"\200\200\202\201"
	.string	""
	.string	""
	.string	""
	.align 32
	.type	OUTFLANK_4, @object
	.size	OUTFLANK_4, 64
OUTFLANK_4:
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\004\004\002\001"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"@@@@DDBA"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\004\004\002\001"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\200\200\200\200\204\204\202\201"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.align 32
	.type	OUTFLANK_5, @object
	.size	OUTFLANK_5, 64
OUTFLANK_5:
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\b\b\b\b\004\004\002\001"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\200\200\200\200\200\200\200\200\210\210\210\210\204\204\202\201"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.align 32
	.type	OUTFLANK_7, @object
	.size	OUTFLANK_7, 64
OUTFLANK_7:
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.ascii	"                \020\020\020\020\020\020\020\020\b\b\b\b\004"
	.ascii	"\004\002\001"
	.align 32
	.type	CONTIG_UP, @object
	.size	CONTIG_UP, 64
CONTIG_UP:
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.ascii	"\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\020\020\020\020\020\020\020"
	.ascii	"\020\030\030\030\030  (0"
	.align 32
	.type	CONTIG_UPLEFT, @object
	.size	CONTIG_UPLEFT, 64
CONTIG_UPLEFT:
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.ascii	"\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\022\022\022\022\022\022\022"
	.ascii	"\022\033\033\033\033$$-6"
	.align 32
	.type	CONTIG_UPRIGHT, @object
	.size	CONTIG_UPRIGHT, 64
CONTIG_UPRIGHT:
	.string	""
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.string	"\025"
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.string	"\034"
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.string	"\025"
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.string	"#"
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.string	"\025"
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.string	"\034"
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.string	"\025"
	.string	"\007"
	.string	"\016"
	.string	"\007"
	.ascii	"*"
	.align 32
	.type	FLIPPED_2, @object
	.size	FLIPPED_2, 130
FLIPPED_2:
	.string	""
	.string	"\001"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\004\005"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\f\r"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	"\034\035"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.ascii	"<="
	.align 32
	.type	FLIPPED_3_H, @object
	.size	FLIPPED_3_H, 1048
FLIPPED_3_H:
	.quad	0
	.quad	434041037028460038
	.quad	289360691352306692
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	1157442765409226768
	.quad	1591483802437686806
	.quad	1446803456761533460
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	3472328296227680304
	.quad	3906369333256140342
	.quad	3761688987579986996
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	8102099357864587376
	.quad	8536140394893047414
	.quad	8391460049216894068
	.align 32
	.type	FLIPPED_4_H, @object
	.size	FLIPPED_4_H, 1064
FLIPPED_4_H:
	.quad	0
	.quad	1012762419733073422
	.quad	868082074056920076
	.quad	0
	.quad	578721382704613384
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	2314885530818453536
	.quad	3327647950551526958
	.quad	3182967604875373612
	.quad	0
	.quad	2893606913523066920
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	6944656592455360608
	.quad	7957419012188434030
	.quad	7812738666512280684
	.quad	0
	.quad	7523377975159973992
	.align 32
	.type	FLIPPED_5, @object
	.size	FLIPPED_5, 137
FLIPPED_5:
	.string	""
	.string	"\017\016"
	.string	"\f"
	.string	""
	.string	""
	.string	"\b"
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	""
	.string	" /."
	.string	","
	.string	""
	.string	""
	.ascii	"("
	.align 32
	.type	FLIPPED_3_V, @object
	.size	FLIPPED_3_V, 1048
FLIPPED_3_V:
	.quad	0
	.quad	16776960
	.quad	16711680
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	1095216660480
	.quad	1095233437440
	.quad	1095233372160
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	281470681743360
	.quad	281470698520320
	.quad	281470698455040
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	72057589742960640
	.quad	72057589759737600
	.quad	72057589759672320
	.align 32
	.type	FLIPPED_4_V, @object
	.size	FLIPPED_4_V, 1064
FLIPPED_4_V:
	.quad	0
	.quad	4294967040
	.quad	4294901760
	.quad	0
	.quad	4278190080
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	280375465082880
	.quad	280379760049920
	.quad	280379759984640
	.quad	0
	.quad	280379743272960
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	72056494526300160
	.quad	72056498821267200
	.quad	72056498821201920
	.quad	0
	.quad	72056498804490240
	.align 32
	.type	FLIPPED_3_U, @object
	.size	FLIPPED_3_U, 1048
FLIPPED_3_U:
	.quad	0
	.quad	72056494526300160
	.quad	280375465082880
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	4278190080
	.quad	72056498804490240
	.quad	280379743272960
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	4294901760
	.quad	72056498821201920
	.quad	280379759984640
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	0
	.quad	4294967040
	.quad	72056498821267200
	.quad	280379760049920
	.text
	.type	flip_A1, @function
flip_A1:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -72340172838076673
	or	rax, QWORD PTR -48[rbp]
	add	rax, 256
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076672
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 72340172838076672
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 126
	add	rax, 2
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	and	eax, 126
	or	QWORD PTR -24[rbp], rax
	movabs	rax, 9205322385119247871
	or	rax, QWORD PTR -48[rbp]
	add	rax, 512
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, -9205322385119247872
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, -9205322385119247872
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	flip_A1, .-flip_A1
	.type	flip_B1, @function
flip_B1:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -144680345676153345
	or	rax, QWORD PTR -48[rbp]
	add	rax, 512
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 144680345676153344
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 144680345676153344
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 124
	add	rax, 4
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	and	eax, 124
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -36099303471055873
	or	rax, QWORD PTR -48[rbp]
	add	rax, 1024
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 36099303471055872
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 36099303471055872
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	flip_B1, .-flip_B1
	.type	flip_C1, @function
flip_C1:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -289360691352306689
	or	rax, QWORD PTR -48[rbp]
	add	rax, 1024
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 289360691352306688
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 289360691352306688
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	add	eax, eax
	cdqe
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	and	rax, QWORD PTR -48[rbp]
	and	eax, 512
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -141012904183809
	or	rax, QWORD PTR -48[rbp]
	add	rax, 2048
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 141012904183808
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 141012904183808
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	flip_C1, .-flip_C1
	.type	flip_D1, @function
flip_D1:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, -578721382704613377
	or	rax, QWORD PTR -64[rbp]
	add	rax, 2048
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 578721382704613376
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 578721382704613376
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	shr	rax
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -56[rbp]
	and	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movzx	eax, al
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	or	rax, -16909313
	add	rax, 1024
	and	rax, QWORD PTR -56[rbp]
	and	eax, 16909312
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	and	eax, 16909312
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -550831656961
	or	rax, QWORD PTR -64[rbp]
	add	rax, 4096
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 550831656960
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 550831656960
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	flip_D1, .-flip_D1
	.type	flip_E1, @function
flip_E1:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, -1157442765409226753
	or	rax, QWORD PTR -64[rbp]
	add	rax, 4096
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 1157442765409226752
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 1157442765409226752
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	shr	rax
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -56[rbp]
	and	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movzx	eax, al
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -4328785921
	or	rax, QWORD PTR -64[rbp]
	add	rax, 2048
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 4328785920
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 4328785920
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -2151686145
	or	rax, QWORD PTR -64[rbp]
	add	rax, 8192
	and	rax, QWORD PTR -56[rbp]
	and	eax, 2151686144
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	and	eax, 2151686144
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	flip_E1, .-flip_E1
	.type	flip_F1, @function
flip_F1:
.LFB5:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -2314885530818453505
	or	rax, QWORD PTR -48[rbp]
	add	rax, 8192
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 2314885530818453504
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 2314885530818453504
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	add	eax, eax
	cdqe
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -1108169199617
	or	rax, QWORD PTR -48[rbp]
	add	rax, 4096
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 1108169199616
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 1108169199616
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	and	rax, QWORD PTR -48[rbp]
	and	eax, 16384
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE5:
	.size	flip_F1, .-flip_F1
	.type	flip_G1, @function
flip_G1:
.LFB6:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -4629771061636907009
	or	rax, QWORD PTR -48[rbp]
	add	rax, 16384
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4629771061636907008
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 4629771061636907008
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	add	eax, eax
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	mov	eax, eax
	and	eax, 62
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -283691315109889
	or	rax, QWORD PTR -48[rbp]
	add	rax, 8192
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 283691315109888
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 283691315109888
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE6:
	.size	flip_G1, .-flip_G1
	.type	flip_H1, @function
flip_H1:
.LFB7:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 9187201950435737599
	or	rax, QWORD PTR -48[rbp]
	add	rax, 32768
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, -9187201950435737600
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, -9187201950435737600
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	add	eax, eax
	mov	eax, eax
	and	eax, 126
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -72624976668147713
	or	rax, QWORD PTR -48[rbp]
	add	rax, 16384
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72624976668147712
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 72624976668147712
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE7:
	.size	flip_H1, .-flip_H1
	.type	flip_A2, @function
flip_A2:
.LFB8:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -72340172838076417
	or	rax, QWORD PTR -48[rbp]
	add	rax, 65536
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076416
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 72340172838076416
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 32256
	lea	edx, 512[rax]
	mov	rax, QWORD PTR -40[rbp]
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	shr	eax, 8
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	sub	eax, edx
	mov	eax, eax
	and	eax, 32256
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -4620710844295151617
	or	rax, QWORD PTR -48[rbp]
	add	rax, 131072
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4620710844295151616
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 4620710844295151616
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE8:
	.size	flip_A2, .-flip_A2
	.type	flip_B2, @function
flip_B2:
.LFB9:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -144680345676152833
	or	rax, QWORD PTR -48[rbp]
	add	rax, 131072
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 144680345676152832
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 144680345676152832
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 31744
	lea	edx, 1024[rax]
	mov	rax, QWORD PTR -40[rbp]
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	shr	eax, 8
	mov	edx, eax
	mov	eax, DWORD PTR -28[rbp]
	sub	eax, edx
	mov	eax, eax
	and	eax, 31744
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 9205322385119248383
	or	rax, QWORD PTR -48[rbp]
	add	rax, 262144
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, -9205322385119248384
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, -9205322385119248384
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE9:
	.size	flip_B2, .-flip_B2
	.type	flip_C2, @function
flip_C2:
.LFB10:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -289360691352305665
	or	rax, QWORD PTR -48[rbp]
	add	rax, 262144
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 289360691352305664
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 289360691352305664
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 9
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 9
	cdqe
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	and	rax, QWORD PTR -48[rbp]
	and	eax, 131072
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -36099303471054849
	or	rax, QWORD PTR -48[rbp]
	add	rax, 524288
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 36099303471055872
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 36099303471054848
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10:
	.size	flip_C2, .-flip_C2
	.type	flip_D2, @function
flip_D2:
.LFB11:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, -578721382704611329
	or	rax, QWORD PTR -64[rbp]
	add	rax, 524288
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 578721382704611328
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 578721382704611328
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	shr	rax, 9
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -56[rbp]
	shr	rax, 8
	and	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	eax, 65280
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -4328783873
	or	rax, QWORD PTR -64[rbp]
	add	rax, 262144
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 4328783872
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 4328783872
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -141012904181761
	or	rax, QWORD PTR -64[rbp]
	add	rax, 1048576
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 141012904181760
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 141012904181760
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE11:
	.size	flip_D2, .-flip_D2
	.type	flip_E2, @function
flip_E2:
.LFB12:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, -1157442765409222657
	or	rax, QWORD PTR -64[rbp]
	add	rax, 1048576
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 1157442765409222656
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 1157442765409222656
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	shr	rax, 9
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -56[rbp]
	shr	rax, 8
	and	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	eax, 65280
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -1108169195521
	or	rax, QWORD PTR -64[rbp]
	add	rax, 524288
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 1108169195520
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 1108169195520
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -550831652865
	or	rax, QWORD PTR -64[rbp]
	add	rax, 2097152
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 550831652864
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 550831652864
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE12:
	.size	flip_E2, .-flip_E2
	.type	flip_F2, @function
flip_F2:
.LFB13:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -2314885530818445313
	or	rax, QWORD PTR -48[rbp]
	add	rax, 2097152
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 2314885530818445312
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 2314885530818445312
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 9
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 9
	cdqe
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -283691315101697
	or	rax, QWORD PTR -48[rbp]
	add	rax, 1048576
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 283691315101696
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 283691315101696
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	and	rax, QWORD PTR -48[rbp]
	and	eax, 4194304
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE13:
	.size	flip_F2, .-flip_F2
	.type	flip_G2, @function
flip_G2:
.LFB14:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -4629771061636890625
	or	rax, QWORD PTR -48[rbp]
	add	rax, 4194304
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4629771061636890624
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 4629771061636890624
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 8
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	sal	eax, 8
	mov	eax, eax
	and	eax, 15872
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -72624976668131329
	or	rax, QWORD PTR -48[rbp]
	add	rax, 2097152
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72624976668131328
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 72624976668131328
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE14:
	.size	flip_G2, .-flip_G2
	.type	flip_H2, @function
flip_H2:
.LFB15:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 9187201950435770367
	or	rax, QWORD PTR -48[rbp]
	add	rax, 8388608
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, -9187201950435770368
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, -9187201950435770368
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 9
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	sal	eax, 9
	mov	eax, eax
	and	eax, 32256
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -145249953336262657
	or	rax, QWORD PTR -48[rbp]
	add	rax, 4194304
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 145249953336262656
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 145249953336262656
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE15:
	.size	flip_H2, .-flip_H2
	.type	flip_A3, @function
flip_A3:
.LFB16:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -72340172838010881
	or	rax, QWORD PTR -48[rbp]
	add	rax, 16777216
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838010880
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 72340172838010880
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 8257536
	add	rax, 131072
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	and	eax, 8257536
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -2310355422147510273
	or	rax, QWORD PTR -48[rbp]
	add	rax, 33554432
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 2310355422147510272
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 2310355422147510272
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 8
	and	eax, 256
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	eax, 512
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE16:
	.size	flip_A3, .-flip_A3
	.type	flip_B3, @function
flip_B3:
.LFB17:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -144680345676021761
	or	rax, QWORD PTR -48[rbp]
	add	rax, 33554432
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 144680345676021760
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 144680345676021760
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 8126464
	add	rax, 262144
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rdx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	and	eax, 8126464
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -4620710844295020545
	or	rax, QWORD PTR -48[rbp]
	add	rax, 67108864
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4620710844295020544
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 4620710844295020544
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 8
	and	eax, 512
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	eax, 1024
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE17:
	.size	flip_B3, .-flip_B3
	.type	flip_C3, @function
flip_C3:
.LFB18:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -289360691352043521
	or	rax, QWORD PTR -48[rbp]
	add	rax, 67108864
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 289360691352043520
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 289360691352043520
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 17
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 16
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 17
	cdqe
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 9205322385119510527
	or	rax, QWORD PTR -48[rbp]
	add	rax, 134217728
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, -9205322385119510528
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, -9205322385119510528
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 8
	and	eax, 1024
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	eax, 512
	or	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	or	rax, rcx
	and	eax, 33556480
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE18:
	.size	flip_C3, .-flip_C3
	.type	flip_D3, @function
flip_D3:
.LFB19:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, -578721382704087041
	or	rax, QWORD PTR -64[rbp]
	add	rax, 134217728
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 578721382704087040
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 578721382704087040
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	shr	rax, 17
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -56[rbp]
	shr	rax, 16
	and	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	eax, 16711680
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -1108168671233
	or	rax, QWORD PTR -64[rbp]
	add	rax, 67108864
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 1108168671232
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 24
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 1108168671232
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -36099303470530561
	or	rax, QWORD PTR -64[rbp]
	add	rax, 268435456
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 36099303470530560
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 36099303470530560
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 8
	and	eax, 2048
	mov	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 7
	and	eax, 4096
	or	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 9
	and	eax, 1024
	or	rax, rdx
	and	rax, QWORD PTR -64[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE19:
	.size	flip_D3, .-flip_D3
	.type	flip_E3, @function
flip_E3:
.LFB20:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, -1157442765408174081
	or	rax, QWORD PTR -64[rbp]
	add	rax, 268435456
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 1157442765408174080
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	cmp	QWORD PTR -32[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -32[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 1157442765408174080
	and	rax, rcx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	shr	rax, 17
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -56[rbp]
	shr	rax, 16
	and	eax, edx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	eax, 16711680
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -283691314053121
	or	rax, QWORD PTR -64[rbp]
	add	rax, 134217728
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 283691314053120
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	cmp	QWORD PTR -16[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 283691314053120
	and	rax, rcx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -141012903133185
	or	rax, QWORD PTR -64[rbp]
	add	rax, 536870912
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 141012903133184
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 24
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 141012903133184
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 8
	and	eax, 4096
	mov	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 7
	and	eax, 8192
	or	rdx, rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 9
	and	eax, 2048
	or	rax, rdx
	and	rax, QWORD PTR -64[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE20:
	.size	flip_E3, .-flip_E3
	.type	flip_F3, @function
flip_F3:
.LFB21:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -2314885530816348161
	or	rax, QWORD PTR -48[rbp]
	add	rax, 536870912
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 2314885530816348160
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 2314885530816348160
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 17
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 16
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 17
	cdqe
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -72624976666034177
	or	rax, QWORD PTR -48[rbp]
	add	rax, 268435456
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72624976666034176
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 72624976666034176
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 8
	and	eax, 8192
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	eax, 16384
	or	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	or	rax, rcx
	and	eax, 1073745920
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE21:
	.size	flip_F3, .-flip_F3
	.type	flip_G3, @function
flip_G3:
.LFB22:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, -4629771061632696321
	or	rax, QWORD PTR -48[rbp]
	add	rax, 1073741824
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4629771061632696320
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 4629771061632696320
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 16
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 15
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	sal	eax, 16
	mov	eax, eax
	and	eax, 4063232
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -145249953332068353
	or	rax, QWORD PTR -48[rbp]
	add	rax, 536870912
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 145249953332068352
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 145249953332068352
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 8
	and	eax, 16384
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	eax, 8192
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE22:
	.size	flip_G3, .-flip_G3
	.type	flip_H3, @function
flip_H3:
.LFB23:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 9187201950444158975
	or	rax, QWORD PTR -48[rbp]
	mov	edx, 2147483648
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, -9187201950444158976
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	cmp	QWORD PTR -24[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, -9187201950444158976
	and	rax, rcx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 17
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 16
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	sal	eax, 17
	mov	eax, eax
	and	eax, 8257536
	or	QWORD PTR -16[rbp], rax
	movabs	rax, -290499906664136705
	or	rax, QWORD PTR -48[rbp]
	add	rax, 1073741824
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 290499906664136704
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	cmp	QWORD PTR -8[rbp], 0
	setne	al
	movzx	edx, al
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rdx
	mov	rcx, rax
	movabs	rax, 290499906664136704
	and	rax, rcx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 8
	and	eax, 32768
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	eax, 16384
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE23:
	.size	flip_H3, .-flip_H3
	.type	flip_A4, @function
flip_A4:
.LFB24:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, 282578800148736
	and	rax, QWORD PTR -64[rbp]
	movabs	rdx, 72624976668147840
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 72340172838076673
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 72624976668147840
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 282578800148736
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	and	eax, 2113929216
	add	rax, 33554432
	and	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	shr	rax, 8
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	and	eax, 2113929216
	or	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	and	eax, 131072
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 7
	and	rax, QWORD PTR -64[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 7
	and	rax, QWORD PTR -16[rbp]
	neg	rax
	and	rax, QWORD PTR -16[rbp]
	or	QWORD PTR -32[rbp], rax
	movabs	rax, -1155177711056977921
	or	rax, QWORD PTR -64[rbp]
	movabs	rdx, 8589934592
	add	rax, rdx
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 1155177711056977920
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 32
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 1155177711056977920
	and	rax, rdx
	or	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE24:
	.size	flip_A4, .-flip_A4
	.type	flip_B4, @function
flip_B4:
.LFB25:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -56[rbp], rdi
	mov	QWORD PTR -64[rbp], rsi
	movabs	rax, 565157600297472
	and	rax, QWORD PTR -64[rbp]
	movabs	rdx, 36312488334073920
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 144680345676153346
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 36312488334073920
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -36[rbp], eax
	mov	eax, DWORD PTR -36[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 565157600297472
	and	rax, rdx
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	and	eax, 2080374784
	add	rax, 67108864
	and	rax, QWORD PTR -56[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	shr	rax, 8
	mov	rdx, rax
	mov	rax, QWORD PTR -24[rbp]
	sub	rax, rdx
	and	eax, 2080374784
	or	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -64[rbp]
	and	eax, 262144
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 7
	and	rax, QWORD PTR -64[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -56[rbp]
	sal	rax, 7
	and	rax, QWORD PTR -16[rbp]
	neg	rax
	and	rax, QWORD PTR -16[rbp]
	or	QWORD PTR -32[rbp], rax
	movabs	rax, -2310355422113955841
	or	rax, QWORD PTR -64[rbp]
	movabs	rdx, 17179869184
	add	rax, rdx
	and	rax, QWORD PTR -56[rbp]
	movabs	rdx, 2310355422113955840
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 32
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 2310355422113955840
	and	rax, rdx
	or	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE25:
	.size	flip_B4, .-flip_B4
	.type	flip_C4, @function
flip_C4:
.LFB26:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 1130315200594944
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 18156244167036960
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 289360691352306692
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 18156244167036960
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 1130315200594944
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 25
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 24
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 25
	cdqe
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 524288
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 7
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	rax, QWORD PTR -16[rbp]
	neg	rax
	and	rax, QWORD PTR -16[rbp]
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -4620710844227911681
	or	rax, QWORD PTR -48[rbp]
	movabs	rdx, 34359738368
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4620710844227911680
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 32
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 4620710844227911680
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	eax, 131072
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	movabs	rax, 8589934592
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE26:
	.size	flip_C4, .-flip_C4
	.type	flip_D4, @function
flip_D4:
.LFB27:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 2260630401189888
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 9078122083518480
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 578721382704613384
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 9078122083518480
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 2260630401189888
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 25
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 24
	and	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	eax, 4278190080
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 2216338399232
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 283691315109952
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 2216338399232
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 18049651735527936
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, -9205322385119247871
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 18049651735527936
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE27:
	.size	flip_D4, .-flip_D4
	.type	flip_E4, @function
flip_E4:
.LFB28:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 4521260802379776
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4539061041759240
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 1157442765409226768
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4539061041759240
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 4521260802379776
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 25
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 24
	and	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	and	eax, 4278190080
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 567382630219776
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 72624976668147840
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 567382630219776
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 70506452091904
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 36099303471055874
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 70506452091904
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE28:
	.size	flip_E4, .-flip_E4
	.type	flip_F4, @function
flip_F4:
.LFB29:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 9042521604759552
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 2269530520879620
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 2314885530818453536
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 2269530520879620
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 9042521604759552
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 25
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 24
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	eax, 25
	cdqe
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -145249952795197441
	or	rax, QWORD PTR -48[rbp]
	movabs	rdx, 68719476736
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 145249952795197440
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 32
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 145249952795197440
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 1048576
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 9
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	rax, QWORD PTR -8[rbp]
	neg	rax
	and	rax, QWORD PTR -8[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	eax, 4194304
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	movabs	rax, 274877906944
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE29:
	.size	flip_F4, .-flip_F4
	.type	flip_G4, @function
flip_G4:
.LFB30:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 18085043209519104
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 1134765260439810
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 4629771061636907072
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 1134765260439810
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 18085043209519104
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 24
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 23
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	sal	eax, 24
	mov	eax, eax
	and	eax, 1040187392
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -290499905590394881
	or	rax, QWORD PTR -48[rbp]
	movabs	rdx, 137438953472
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 290499905590394880
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 32
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 290499905590394880
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 2097152
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 9
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	rax, QWORD PTR -8[rbp]
	neg	rax
	and	rax, QWORD PTR -8[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE30:
	.size	flip_G4, .-flip_G4
	.type	flip_H4, @function
flip_H4:
.LFB31:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 36170086419038208
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 567382630219905
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, -9187201950435737472
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 567382630219905
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -32[rbp], eax
	mov	eax, DWORD PTR -32[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 36170086419038208
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 25
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 24
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	sal	eax, 25
	mov	eax, eax
	and	eax, 2113929216
	or	QWORD PTR -24[rbp], rax
	movabs	rax, -580999811180789761
	or	rax, QWORD PTR -48[rbp]
	movabs	rdx, 274877906944
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 580999811180789760
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 32
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 580999811180789760
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	and	eax, 4194304
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 9
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	rax, QWORD PTR -8[rbp]
	neg	rax
	and	rax, QWORD PTR -8[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE31:
	.size	flip_H4, .-flip_H4
	.type	flip_A5, @function
flip_A5:
.LFB32:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 1128103241908480
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72624976667086864
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 577588855545331969
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72624976667086864
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 1128103241908480
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	movabs	rax, 282578817124352
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 578721382704349697
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 72340172855052304
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 578721382704349697
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_U[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 282578817124352
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 541165879296
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 8589934592
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 541165879296
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE32:
	.size	flip_A5, .-flip_A5
	.type	flip_B5, @function
flip_B5:
.LFB33:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 2256206483816960
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 36312488333543432
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 1155177711090663938
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 36312488333543432
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 2256206483816960
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	movabs	rax, 565157634248704
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 578721382704349697
	imul	rax, rdx
	shr	rax, 58
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax
	mov	rdx, rax
	movabs	rax, 72340172855052304
	and	rdx, rax
	movabs	rax, 578721382704349697
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_U[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 565157634248704
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 532575944704
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 17179869184
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 532575944704
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE33:
	.size	flip_B5, .-flip_B5
	.type	flip_C5, @function
flip_C5:
.LFB34:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 4512412967633920
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 18156244166771716
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 2310355422181327876
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 18156244166771716
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 4512412967633920
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	movabs	rax, 1130315268497408
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 565157600231552
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 2
	mov	rdx, rax
	movabs	rax, 72340172855052304
	and	rdx, rax
	movabs	rax, 578721382704349697
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_U[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 1130315268497408
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 33
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 32
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	lea	rdx, FLIPPED_2[rip]
	mov	rax, QWORD PTR -8[rbp]
	add	rax, rdx
	movzx	eax, BYTE PTR [rax]
	movzx	eax, al
	sal	rax, 33
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	eax, 33554432
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	movabs	rax, 2199023255552
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE34:
	.size	flip_C5, .-flip_C5
	.type	flip_D5, @function
flip_D5:
.LFB35:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 2260630401189888
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 9078122083518480
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 578721382704613384
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 9078122083518480
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 2260630401189888
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 33
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 32
	and	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 1095216660480
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 567382630219776
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 72624976668147840
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 567382630219776
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 9024825867763712
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 4620710844295151872
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 9024825867763712
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE35:
	.size	flip_D5, .-flip_D5
	.type	flip_E5, @function
flip_E5:
.LFB36:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 4521260802379776
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4539061041759240
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 1157442765409226768
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 4539061041759240
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 4521260802379776
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 33
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 32
	and	eax, edx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 1095216660480
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 1134765260406784
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 145249953336295424
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 1134765260406784
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 18049651735527936
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, -9205322385119247871
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 18049651735527936
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE36:
	.size	flip_E5, .-flip_E5
	.type	flip_F5, @function
flip_F5:
.LFB37:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 9042521334744064
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 36170086419071492
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 2314885530548438018
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 36170086419071492
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 9042521334744064
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	movabs	rax, 2269529977659392
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 564051616743488
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 2
	mov	rdx, rax
	movabs	rax, 72624976532342792
	and	rdx, rax
	movabs	rax, 1155177711073820929
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_U[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 2269529977659392
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 33
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 32
	and	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	rax, 33
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	eax, 1073741824
	mov	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	movabs	rax, 70368744177664
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE37:
	.size	flip_F5, .-flip_F5
	.type	flip_G5, @function
flip_G5:
.LFB38:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 18085042669488128
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 18085043209535746
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 4629771061096876036
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 18085043209535746
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 18085042669488128
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	movabs	rax, 4539059955318784
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 282025808371744
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 3
	mov	rdx, rax
	movabs	rax, 72624976532342792
	and	rdx, rax
	movabs	rax, 1155177711073820929
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_U[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 4539059955318784
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 32
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 31
	and	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 32
	mov	rdx, rax
	movabs	rax, 266287972352
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE38:
	.size	flip_G5, .-flip_G5
	.type	flip_H5, @function
flip_H5:
.LFB39:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 36170085338976256
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 9042521604767873
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, -9187201951515799544
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 9042521604767873
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_V[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 36170085338976256
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	movabs	rax, 9078119910637568
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 141012904185872
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 4
	mov	rdx, rax
	movabs	rax, 72624976532342792
	and	rdx, rax
	movabs	rax, 1155177711073820929
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -16[rbp], eax
	mov	eax, DWORD PTR -16[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_U[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 9078119910637568
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 33
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 32
	and	eax, edx
	mov	DWORD PTR -12[rbp], eax
	mov	eax, DWORD PTR -12[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 33
	mov	rdx, rax
	movabs	rax, 541165879296
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE39:
	.size	flip_H5, .-flip_H5
	.type	flip_A6, @function
flip_A6:
.LFB40:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 4311810304
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4311810305
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	rdx, QWORD PTR -32[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 4311810304
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movabs	rax, 138538465099776
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 2199023255552
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 138538465099776
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, 8657571840
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 8657571872
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 8657571840
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 281474976710656
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	movabs	rax, 562949953421312
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE40:
	.size	flip_A6, .-flip_A6
	.type	flip_B6, @function
flip_B6:
.LFB41:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 8623620608
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 8623620610
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	rdx, QWORD PTR -32[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 8623620608
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movabs	rax, 136339441844224
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4398046511104
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 136339441844224
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, 17315143680
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 17315143744
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 17315143680
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 562949953421312
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	movabs	rax, 1125899906842624
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE41:
	.size	flip_B6, .-flip_B6
	.type	flip_C6, @function
flip_C6:
.LFB42:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 17247241216
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 17247241220
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 17247241216
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 41
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 40
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	rax, 41
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 34630287360
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 34630287488
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 34630287360
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 1125899906842624
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	movabs	rax, 562949953421312
	and	rax, rcx
	or	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	or	rcx, rax
	movabs	rax, 2251808403619840
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE42:
	.size	flip_C6, .-flip_C6
	.type	flip_D6, @function
flip_D6:
.LFB43:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 34494482432
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 34494482440
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -16[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 34494482432
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 41
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 40
	and	eax, edx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 280375465082880
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 86473965568
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 86474063872
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 86473965568
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 2251799813685248
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	movabs	rax, 4503599627370496
	and	rax, rcx
	or	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	movabs	rax, 1125899906842624
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE43:
	.size	flip_D6, .-flip_D6
	.type	flip_E6, @function
flip_E6:
.LFB44:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 68988964864
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 68988964880
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -16[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 68988964864
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 41
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 40
	and	eax, edx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 280375465082880
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 172939673600
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 172948062464
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 172939673600
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 4503599627370496
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	movabs	rax, 9007199254740992
	and	rax, rcx
	or	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	movabs	rax, 2251799813685248
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE44:
	.size	flip_E6, .-flip_E6
	.type	flip_F6, @function
flip_F6:
.LFB45:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 137977929728
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 137977929760
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 137977929728
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 41
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 40
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	rax, 41
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 68853957120
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 68853957121
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 68853957120
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 9007199254740992
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 9
	mov	rcx, rax
	movabs	rax, 18014398509481984
	and	rax, rcx
	or	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	or	rcx, rax
	movabs	rax, 4503874505277440
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE45:
	.size	flip_F6, .-flip_F6
	.type	flip_G6, @function
flip_G6:
.LFB46:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 275955859456
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 275955859520
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 275955859456
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 40
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 39
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 40
	mov	rdx, rax
	movabs	rax, 68169720922112
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 137707914240
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 137707914242
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 137707914240
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 18014398509481984
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	movabs	rax, 9007199254740992
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE46:
	.size	flip_G6, .-flip_G6
	.type	flip_H6, @function
flip_H6:
.LFB47:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 551911718912
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 551911719040
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 551911718912
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 41
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 40
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 41
	mov	rdx, rax
	movabs	rax, 138538465099776
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 275415828480
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 275415828484
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 275415828480
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 8
	mov	rdx, rax
	movabs	rax, 36028797018963968
	and	rdx, rax
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 7
	mov	rcx, rax
	movabs	rax, 18014398509481984
	and	rax, rcx
	or	rax, rdx
	and	rax, QWORD PTR -48[rbp]
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE47:
	.size	flip_H6, .-flip_H6
	.type	flip_A7, @function
flip_A7:
.LFB48:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 1103823438080
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 1103823438081
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	rdx, QWORD PTR -32[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 1103823438080
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movabs	rax, 35465847065542656
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 562949953421312
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 35465847065542656
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, 2216338399232
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 2216338399296
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 2216338399232
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE48:
	.size	flip_A7, .-flip_A7
	.type	flip_B7, @function
flip_B7:
.LFB49:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 2207646876160
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 2207646876162
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	rdx, QWORD PTR -32[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 2207646876160
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movabs	rax, 34902897112121344
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 1125899906842624
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 34902897112121344
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, 4432676798464
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4432676798592
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 4432676798464
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE49:
	.size	flip_B7, .-flip_B7
	.type	flip_C7, @function
flip_C7:
.LFB50:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 4415293752320
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4415293752324
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 4415293752320
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 49
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 48
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	rax, 49
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 8865353564160
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 8865353596928
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 8865353564160
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 2199023255552
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE50:
	.size	flip_C7, .-flip_C7
	.type	flip_D7, @function
flip_D7:
.LFB51:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 8830587504640
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 8830587504648
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -16[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 8830587504640
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 49
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 48
	and	eax, edx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 71776119061217280
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 22137335185408
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 22137360351232
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 22137335185408
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE51:
	.size	flip_D7, .-flip_D7
	.type	flip_E7, @function
flip_E7:
.LFB52:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 17661175009280
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 17661175009296
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -16[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 17661175009280
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 49
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 48
	and	eax, edx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 71776119061217280
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 44272556441600
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 44274703990784
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 44272556441600
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE52:
	.size	flip_E7, .-flip_E7
	.type	flip_F7, @function
flip_F7:
.LFB53:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 35322350018560
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 35322350018592
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 35322350018560
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 49
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 48
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	rax, 49
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 70368744177664
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 17626613022720
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 17626613022976
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 17626613022720
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE53:
	.size	flip_F7, .-flip_F7
	.type	flip_G7, @function
flip_G7:
.LFB54:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 70644700037120
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 70644700037184
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 70644700037120
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 48
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 47
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 48
	mov	rdx, rax
	movabs	rax, 17451448556060672
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 35253226045952
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 35253226045953
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 35253226045952
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE54:
	.size	flip_G7, .-flip_G7
	.type	flip_H7, @function
flip_H7:
.LFB55:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 141289400074240
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 141289400074368
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 141289400074240
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 49
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 48
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 49
	mov	rdx, rax
	movabs	rax, 35465847065542656
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 70506452091904
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 70506452091906
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 70506452091904
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE55:
	.size	flip_H7, .-flip_H7
	.type	flip_A8, @function
flip_A8:
.LFB56:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 282578800148736
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 282578800148737
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	rdx, QWORD PTR -32[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 282578800148736
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movabs	rax, 9079256848778919936
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 144115188075855872
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 9079256848778919936
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, 567382630219776
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 567382630219904
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 567382630219776
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE56:
	.size	flip_A8, .-flip_A8
	.type	flip_B8, @function
flip_B8:
.LFB57:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 565157600297472
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 565157600297474
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -32[rbp], rax
	mov	rax, QWORD PTR -32[rbp]
	lea	rcx, [rax+rax]
	movabs	rax, -9223372036854775808
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 565157600297472
	and	rax, rdx
	mov	QWORD PTR -24[rbp], rax
	movabs	rax, 8935141660703064064
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 288230376151711744
	add	rax, rdx
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	shr	rax, 8
	mov	rcx, rax
	mov	rax, QWORD PTR -16[rbp]
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 8935141660703064064
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	movabs	rax, 1134765260406784
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 1134765260439552
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	lea	rcx, [rax+rax]
	movabs	rax, -9223372036854775808
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 1134765260406784
	and	rax, rdx
	or	QWORD PTR -24[rbp], rax
	mov	rax, QWORD PTR -24[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE57:
	.size	flip_B8, .-flip_B8
	.type	flip_C8, @function
flip_C8:
.LFB58:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 1130315200594944
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 1130315200594948
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 1130315200594944
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 57
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_2[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 56
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_2[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	rax, 57
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 2269530512424960
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 2269530520813568
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	lea	rcx, [rax+rax]
	movabs	rax, -9223372036854775808
	sub	rax, rcx
	mov	rdx, rax
	movabs	rax, 2269530512424960
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 9
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 562949953421312
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE58:
	.size	flip_C8, .-flip_C8
	.type	flip_D8, @function
flip_D8:
.LFB59:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 2260630401189888
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 2260630401189896
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -16[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 2260630401189888
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 57
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 56
	and	eax, edx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, -72057594037927936
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 5667157807464448
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_3[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 5667164249915392
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_3_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 5667157807464448
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE59:
	.size	flip_D8, .-flip_D8
	.type	flip_E8, @function
flip_E8:
.LFB60:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 4521260802379776
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4521260802379792
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -16[rbp], rax
	mov	rdx, QWORD PTR -16[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 4521260802379776
	and	rax, rdx
	mov	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 57
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 56
	and	eax, edx
	mov	DWORD PTR -24[rbp], eax
	mov	eax, DWORD PTR -24[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, -72057594037927936
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	movabs	rax, 11333774449049600
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 57
	mov	rdx, rax
	lea	rax, OUTFLANK_4[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	movabs	rax, 11334324221640704
	and	rax, QWORD PTR -40[rbp]
	movabs	rdx, 72340172838076673
	imul	rax, rdx
	shr	rax, 56
	and	eax, ecx
	mov	DWORD PTR -20[rbp], eax
	mov	eax, DWORD PTR -20[rbp]
	lea	rdx, 0[0+rax*8]
	lea	rax, FLIPPED_4_H[rip]
	mov	rax, QWORD PTR [rdx+rax]
	movabs	rdx, 11333774449049600
	and	rax, rdx
	or	QWORD PTR -8[rbp], rax
	mov	rax, QWORD PTR -8[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE60:
	.size	flip_E8, .-flip_E8
	.type	flip_F8, @function
flip_F8:
.LFB61:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 9042521604759552
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 9042521604759584
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 9042521604759552
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 57
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_5[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 56
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	lea	rdx, FLIPPED_5[rip]
	movzx	eax, BYTE PTR [rax+rdx]
	movzx	eax, al
	sal	rax, 57
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -40[rbp]
	sal	rax, 7
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 18014398509481984
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 4512412933816320
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 4512412933881856
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 4512412933816320
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE61:
	.size	flip_F8, .-flip_F8
	.type	flip_G8, @function
flip_G8:
.LFB62:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 18085043209519104
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 18085043209519168
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 18085043209519104
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 56
	and	eax, 62
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 55
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 56
	mov	rdx, rax
	movabs	rax, 4467570830351532032
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 9024825867763712
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 9024825867763968
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 9024825867763712
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE62:
	.size	flip_G8, .-flip_G8
	.type	flip_H8, @function
flip_H8:
.LFB63:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -40[rbp], rdi
	mov	QWORD PTR -48[rbp], rsi
	movabs	rax, 36170086419038208
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 36170086419038336
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -24[rbp], rax
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 36170086419038208
	and	rax, rdx
	mov	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -48[rbp]
	shr	rax, 57
	and	eax, 63
	mov	rdx, rax
	lea	rax, OUTFLANK_7[rip]
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	edx, al
	mov	rax, QWORD PTR -40[rbp]
	shr	rax, 56
	and	eax, edx
	mov	DWORD PTR -28[rbp], eax
	mov	eax, DWORD PTR -28[rbp]
	neg	eax
	mov	eax, eax
	sal	rax, 57
	mov	rdx, rax
	movabs	rax, 9079256848778919936
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	movabs	rax, 18049651735527936
	and	rax, QWORD PTR -48[rbp]
	movabs	rdx, 18049651735527937
	xor	rax, rdx
	bsr	rax, rax
	xor	rax, 63
	mov	edx, eax
	movabs	rax, -9223372036854775808
	mov	ecx, edx
	shr	rax, cl
	and	rax, QWORD PTR -40[rbp]
	mov	QWORD PTR -8[rbp], rax
	mov	rdx, QWORD PTR -8[rbp]
	mov	eax, 0
	sub	rax, rdx
	add	rax, rax
	mov	rdx, rax
	movabs	rax, 18049651735527936
	and	rax, rdx
	or	QWORD PTR -16[rbp], rax
	mov	rax, QWORD PTR -16[rbp]
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE63:
	.size	flip_H8, .-flip_H8
	.type	flip_pass, @function
flip_pass:
.LFB64:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -8[rbp], rdi
	mov	QWORD PTR -16[rbp], rsi
	mov	eax, 0
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE64:
	.size	flip_pass, .-flip_pass
	.globl	flip
	.section	.data.rel.local,"aw"
	.align 32
	.type	flip, @object
	.size	flip, 528
flip:
	.quad	flip_A1
	.quad	flip_B1
	.quad	flip_C1
	.quad	flip_D1
	.quad	flip_E1
	.quad	flip_F1
	.quad	flip_G1
	.quad	flip_H1
	.quad	flip_A2
	.quad	flip_B2
	.quad	flip_C2
	.quad	flip_D2
	.quad	flip_E2
	.quad	flip_F2
	.quad	flip_G2
	.quad	flip_H2
	.quad	flip_A3
	.quad	flip_B3
	.quad	flip_C3
	.quad	flip_D3
	.quad	flip_E3
	.quad	flip_F3
	.quad	flip_G3
	.quad	flip_H3
	.quad	flip_A4
	.quad	flip_B4
	.quad	flip_C4
	.quad	flip_D4
	.quad	flip_E4
	.quad	flip_F4
	.quad	flip_G4
	.quad	flip_H4
	.quad	flip_A5
	.quad	flip_B5
	.quad	flip_C5
	.quad	flip_D5
	.quad	flip_E5
	.quad	flip_F5
	.quad	flip_G5
	.quad	flip_H5
	.quad	flip_A6
	.quad	flip_B6
	.quad	flip_C6
	.quad	flip_D6
	.quad	flip_E6
	.quad	flip_F6
	.quad	flip_G6
	.quad	flip_H6
	.quad	flip_A7
	.quad	flip_B7
	.quad	flip_C7
	.quad	flip_D7
	.quad	flip_E7
	.quad	flip_F7
	.quad	flip_G7
	.quad	flip_H7
	.quad	flip_A8
	.quad	flip_B8
	.quad	flip_C8
	.quad	flip_D8
	.quad	flip_E8
	.quad	flip_F8
	.quad	flip_G8
	.quad	flip_H8
	.quad	flip_pass
	.quad	flip_pass
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"589996.c"
	.text
	.section	.rodata
	.align	2
	.type	OUTFLANK_2, %object
	.size	OUTFLANK_2, 64
OUTFLANK_2:
	.ascii	"\000\001\000\000\020\021\000\000\000\001\000\000 !\000"
	.ascii	"\000\000\001\000\000\020\021\000\000\000\001\000\000"
	.ascii	"@A\000\000\000\001\000\000\020\021\000\000\000\001\000"
	.ascii	"\000 !\000\000\000\001\000\000\020\021\000\000\000\001"
	.ascii	"\000\000\200\201\000\000"
	.align	2
	.type	OUTFLANK_3, %object
	.size	OUTFLANK_3, 64
OUTFLANK_3:
	.ascii	"\000\000\002\001\000\000\000\000  \"!\000\000\000\000"
	.ascii	"\000\000\002\001\000\000\000\000@@BA\000\000\000\000"
	.ascii	"\000\000\002\001\000\000\000\000  \"!\000\000\000\000"
	.ascii	"\000\000\002\001\000\000\000\000\200\200\202\201\000"
	.ascii	"\000\000\000"
	.align	2
	.type	OUTFLANK_4, %object
	.size	OUTFLANK_4, 64
OUTFLANK_4:
	.ascii	"\000\000\000\000\004\004\002\001\000\000\000\000\000"
	.ascii	"\000\000\000@@@@DDBA\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\004\004\002\001\000\000\000\000\000"
	.ascii	"\000\000\000\200\200\200\200\204\204\202\201\000\000"
	.ascii	"\000\000\000\000\000\000"
	.align	2
	.type	OUTFLANK_5, %object
	.size	OUTFLANK_5, 64
OUTFLANK_5:
	.ascii	"\000\000\000\000\000\000\000\000\010\010\010\010\004"
	.ascii	"\004\002\001\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\200\200\200\200\200\200\200"
	.ascii	"\200\210\210\210\210\204\204\202\201\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000"
	.align	2
	.type	OUTFLANK_7, %object
	.size	OUTFLANK_7, 64
OUTFLANK_7:
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000                \020\020\020"
	.ascii	"\020\020\020\020\020\010\010\010\010\004\004\002\001"
	.align	2
	.type	CONTIG_UP, %object
	.size	CONTIG_UP, 64
CONTIG_UP:
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\010\010\010\010\010\010\010"
	.ascii	"\010\010\010\010\010\010\010\010\010\020\020\020\020"
	.ascii	"\020\020\020\020\030\030\030\030  (0"
	.align	2
	.type	CONTIG_UPLEFT, %object
	.size	CONTIG_UPLEFT, 64
CONTIG_UPLEFT:
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\011\011\011\011\011\011\011"
	.ascii	"\011\011\011\011\011\011\011\011\011\022\022\022\022"
	.ascii	"\022\022\022\022\033\033\033\033$$-6"
	.align	2
	.type	CONTIG_UPRIGHT, %object
	.size	CONTIG_UPRIGHT, 64
CONTIG_UPRIGHT:
	.ascii	"\000\007\000\016\000\007\000\025\000\007\000\016\000"
	.ascii	"\007\000\034\000\007\000\016\000\007\000\025\000\007"
	.ascii	"\000\016\000\007\000#\000\007\000\016\000\007\000\025"
	.ascii	"\000\007\000\016\000\007\000\034\000\007\000\016\000"
	.ascii	"\007\000\025\000\007\000\016\000\007\000*"
	.align	2
	.type	FLIPPED_2, %object
	.size	FLIPPED_2, 130
FLIPPED_2:
	.ascii	"\000\001\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\004\005\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\014\015\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\034"
	.ascii	"\035\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000<="
	.align	3
	.type	FLIPPED_3_H, %object
	.size	FLIPPED_3_H, 1048
FLIPPED_3_H:
	.word	0
	.word	0
	.word	101058054
	.word	101058054
	.word	67372036
	.word	67372036
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	269488144
	.word	269488144
	.word	370546198
	.word	370546198
	.word	336860180
	.word	336860180
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	808464432
	.word	808464432
	.word	909522486
	.word	909522486
	.word	875836468
	.word	875836468
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	1886417008
	.word	1886417008
	.word	1987475062
	.word	1987475062
	.word	1953789044
	.word	1953789044
	.align	3
	.type	FLIPPED_4_H, %object
	.size	FLIPPED_4_H, 1064
FLIPPED_4_H:
	.word	0
	.word	0
	.word	235802126
	.word	235802126
	.word	202116108
	.word	202116108
	.word	0
	.word	0
	.word	134744072
	.word	134744072
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	538976288
	.word	538976288
	.word	774778414
	.word	774778414
	.word	741092396
	.word	741092396
	.word	0
	.word	0
	.word	673720360
	.word	673720360
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	1616928864
	.word	1616928864
	.word	1852730990
	.word	1852730990
	.word	1819044972
	.word	1819044972
	.word	0
	.word	0
	.word	1751672936
	.word	1751672936
	.align	2
	.type	FLIPPED_5, %object
	.size	FLIPPED_5, 137
FLIPPED_5:
	.ascii	"\000\017\016\000\014\000\000\000\010\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.ascii	"\000\000\000\000\000\000\000\000\000\000\000 /.\000"
	.ascii	",\000\000\000("
	.align	3
	.type	FLIPPED_3_V, %object
	.size	FLIPPED_3_V, 1048
FLIPPED_3_V:
	.word	0
	.word	0
	.word	16776960
	.word	0
	.word	16711680
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	255
	.word	16776960
	.word	255
	.word	16711680
	.word	255
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	65535
	.word	16776960
	.word	65535
	.word	16711680
	.word	65535
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	16777215
	.word	16776960
	.word	16777215
	.word	16711680
	.word	16777215
	.align	3
	.type	FLIPPED_4_V, %object
	.size	FLIPPED_4_V, 1064
FLIPPED_4_V:
	.word	0
	.word	0
	.word	-256
	.word	0
	.word	-65536
	.word	0
	.word	0
	.word	0
	.word	-16777216
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	65280
	.word	-256
	.word	65280
	.word	-65536
	.word	65280
	.word	0
	.word	0
	.word	-16777216
	.word	65280
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	16776960
	.word	-256
	.word	16776960
	.word	-65536
	.word	16776960
	.word	0
	.word	0
	.word	-16777216
	.word	16776960
	.align	3
	.type	FLIPPED_3_U, %object
	.size	FLIPPED_3_U, 1048
FLIPPED_3_U:
	.word	0
	.word	0
	.word	0
	.word	16776960
	.word	0
	.word	65280
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	-16777216
	.word	0
	.word	-16777216
	.word	16776960
	.word	-16777216
	.word	65280
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	-65536
	.word	0
	.word	-65536
	.word	16776960
	.word	-65536
	.word	65280
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	0
	.word	-256
	.word	0
	.word	-256
	.word	16776960
	.word	-256
	.word	65280
	.text
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A1, %function
flip_A1:
	@ args = 0, pretend = 0, frame = 176
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #180
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L3
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #256
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L3+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-164]
	and	r3, r9, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L3+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #126
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #2
	str	r2, [fp, #-100]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-96]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-40]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-108]
	sbc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #126
	mov	r3, #0
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L3+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-124]
	orr	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #512
	str	r2, [fp, #-132]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-128]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	adr	r3, .L3+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-196]
	and	r1, r1, r3
	str	r1, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-148]
	sbc	r3, r1, r3
	str	r3, [fp, #-144]
	adr	r3, .L3+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L4:
	.align	3
.L3:
	.word	-16843009
	.word	-16843010
	.word	16843008
	.word	16843009
	.word	-134480385
	.word	2143281135
	.word	134480384
	.word	-2143281136
	.size	flip_A1, .-flip_A1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B1, %function
flip_B1:
	@ args = 0, pretend = 0, frame = 176
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #180
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L7
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #512
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L7+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-164]
	and	r3, r9, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L7+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #124
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #4
	str	r2, [fp, #-100]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-96]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-40]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-108]
	sbc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #124
	mov	r3, #0
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L7+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-124]
	orr	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #1024
	str	r2, [fp, #-132]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-128]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	adr	r3, .L7+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-196]
	and	r1, r1, r3
	str	r1, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-148]
	sbc	r3, r1, r3
	str	r3, [fp, #-144]
	adr	r3, .L7+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L8:
	.align	3
.L7:
	.word	-33686017
	.word	-33686019
	.word	33686016
	.word	33686018
	.word	-268960769
	.word	-8405025
	.word	268960768
	.word	8405024
	.size	flip_B1, .-flip_B1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C1, %function
flip_C1:
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #172
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L11
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #1024
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L11+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-156]
	and	r3, r9, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L11+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #1
	orr	r0, r0, r3, lsl #31
	lsr	r1, r3, #1
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L11+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-68]
	and	r3, r3, r2
	str	r3, [fp, #-56]
	ldr	r2, .L11+36
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	mov	r2, #512
	mov	r3, #0
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-108]
	and	r1, r1, r3
	str	r1, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L11+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-116]
	orr	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #2048
	str	r2, [fp, #-124]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-120]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	adr	r3, .L11+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-140]
	sbc	r3, r1, r3
	str	r3, [fp, #-136]
	adr	r3, .L11+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L12:
	.align	3
.L11:
	.word	-67372033
	.word	-67372037
	.word	67372032
	.word	67372036
	.word	-537921537
	.word	-32833
	.word	537921536
	.word	32832
	.word	OUTFLANK_2
	.word	FLIPPED_2
	.size	flip_C1, .-flip_C1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D1, %function
flip_D1:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L15
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #2048
	adc	r7, r5, #0
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L15+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-188]
	and	r3, r9, r3
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-92]
	sbc	r3, r3, r1
	str	r3, [fp, #-88]
	adr	r3, .L15+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-196]
	and	r1, r1, r3
	str	r1, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #1
	orr	r0, r0, r3, lsl #31
	lsr	r1, r3, #1
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L15+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-76]
	and	r3, r3, r2
	str	r3, [fp, #-64]
	ldr	r2, .L15+36
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	r3, r2, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	ldr	r2, .L15+40
	mvn	r3, #0
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #1024
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	ldr	r2, .L15+44
	mov	r3, #0
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-212]
	and	r1, r1, r3
	str	r1, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-40]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-132]
	sbc	r3, r3, r1
	str	r3, [fp, #-128]
	ldr	r2, .L15+44
	mov	r3, #0
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L15+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-148]
	orr	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #4096
	str	r2, [fp, #-156]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-152]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	adr	r3, .L15+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-228]
	and	r1, r1, r3
	str	r1, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-172]
	sbc	r3, r1, r3
	str	r3, [fp, #-168]
	adr	r3, .L15+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L16:
	.align	3
.L15:
	.word	-134744065
	.word	-134744073
	.word	134744064
	.word	134744072
	.word	-1075843073
	.word	-129
	.word	1075843072
	.word	128
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
	.word	-16909313
	.word	16909312
	.size	flip_D1, .-flip_D1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E1, %function
flip_E1:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L19
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #4096
	adc	r7, r5, #0
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L19+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-188]
	and	r3, r9, r3
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-92]
	sbc	r3, r3, r1
	str	r3, [fp, #-88]
	adr	r3, .L19+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-196]
	and	r1, r1, r3
	str	r1, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #1
	orr	r0, r0, r3, lsl #31
	lsr	r1, r3, #1
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L19+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-76]
	and	r3, r3, r2
	str	r3, [fp, #-64]
	ldr	r2, .L19+36
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	and	r3, r2, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	ldr	r2, .L19+40
	mvn	r3, #1
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #2048
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	ldr	r2, .L19+44
	mov	r3, #1
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-212]
	and	r1, r1, r3
	str	r1, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-40]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-132]
	sbc	r3, r3, r1
	str	r3, [fp, #-128]
	ldr	r2, .L19+44
	mov	r3, #1
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L19+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-148]
	orr	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #8192
	str	r2, [fp, #-156]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-152]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	adr	r3, .L19+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-228]
	and	r1, r1, r3
	str	r1, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-172]
	sbc	r3, r1, r3
	str	r3, [fp, #-168]
	adr	r3, .L19+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L20:
	.align	3
.L19:
	.word	-269488129
	.word	-269488145
	.word	269488128
	.word	269488144
	.word	2143281151
	.word	-1
	.word	-2143281152
	.word	0
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.word	-33818625
	.word	33818624
	.size	flip_E1, .-flip_E1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F1, %function
flip_F1:
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #172
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L23
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #8192
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L23+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-156]
	and	r3, r9, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L23+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #1
	orr	r0, r0, r3, lsl #31
	lsr	r1, r3, #1
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L23+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-68]
	and	r3, r3, r2
	str	r3, [fp, #-56]
	ldr	r2, .L23+36
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #1
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L23+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #4096
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	adr	r3, .L23+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-124]
	sbc	r3, r3, r1
	str	r3, [fp, #-120]
	adr	r3, .L23+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #9
	orr	r2, r2, r1, lsl #23
	lsr	r3, r1, #9
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-140]
	and	r3, r3, r1
	str	r3, [fp, #-136]
	mov	r2, #16384
	mov	r3, #0
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L24:
	.align	3
.L23:
	.word	-538976257
	.word	-538976289
	.word	538976256
	.word	538976288
	.word	-67637249
	.word	-259
	.word	67637248
	.word	258
	.word	OUTFLANK_5
	.word	FLIPPED_5
	.size	flip_F1, .-flip_F1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G1, %function
flip_G1:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #156
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L27
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #16384
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L27+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-148]
	and	r3, r9, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L27+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L27+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-68]
	lsl	r3, r3, #1
	and	r3, r3, r2
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	mov	r0, r3
	mov	r1, #0
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L27+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #8192
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	adr	r3, .L27+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-132]
	sbc	r3, r1, r3
	str	r3, [fp, #-128]
	adr	r3, .L27+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L28:
	.align	3
.L27:
	.word	-1077952513
	.word	-1077952577
	.word	1077952512
	.word	1077952576
	.word	-135274497
	.word	-66053
	.word	135274496
	.word	66052
	.word	OUTFLANK_7
	.size	flip_G1, .-flip_G1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H1, %function
flip_H1:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #156
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L31
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #32768
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L31+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-148]
	and	r3, r9, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L31+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #1
	orr	r0, r0, r3, lsl #31
	lsr	r1, r3, #1
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L31+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r2, r3
	ldr	r3, [fp, #-68]
	and	r3, r3, r2
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	lsl	r3, r3, #1
	mov	r0, r3
	mov	r1, #0
	mov	r2, #126
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L31+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #16384
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	adr	r3, .L31+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-132]
	sbc	r3, r1, r3
	str	r3, [fp, #-128]
	adr	r3, .L31+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L32:
	.align	3
.L31:
	.word	2139062271
	.word	2139062143
	.word	-2139062272
	.word	-2139062144
	.word	-270548993
	.word	-16909321
	.word	270548992
	.word	16909320
	.word	OUTFLANK_7
	.size	flip_H1, .-flip_H1
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A2, %function
flip_A2:
	@ args = 0, pretend = 0, frame = 144
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #148
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L35
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #65536
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L35+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-140]
	and	r3, r9, r3
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L35+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r3, [fp, #-76]
	and	r3, r3, #32256
	add	r2, r3, #512
	ldr	r3, [fp, #-68]
	and	r3, r3, r2
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	lsr	r2, r3, #8
	ldr	r3, [fp, #-56]
	sub	r3, r3, r2
	mov	r0, r3
	mov	r1, #0
	mov	r2, #32256
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L35+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #131072
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	adr	r3, .L35+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-124]
	sbc	r3, r1, r3
	str	r3, [fp, #-120]
	adr	r3, .L35+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L36:
	.align	3
.L35:
	.word	-16842753
	.word	-16843010
	.word	16842752
	.word	16843009
	.word	-67239937
	.word	-1075843081
	.word	67239936
	.word	1075843080
	.size	flip_A2, .-flip_A2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B2, %function
flip_B2:
	@ args = 0, pretend = 0, frame = 144
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #148
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L39
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #131072
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L39+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-140]
	and	r3, r9, r3
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L39+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r3, [fp, #-76]
	and	r3, r3, #31744
	add	r2, r3, #1024
	ldr	r3, [fp, #-68]
	and	r3, r3, r2
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	lsr	r2, r3, #8
	ldr	r3, [fp, #-56]
	sub	r3, r3, r2
	mov	r0, r3
	mov	r1, #0
	mov	r2, #31744
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L39+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #262144
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	adr	r3, .L39+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-124]
	sbc	r3, r1, r3
	str	r3, [fp, #-120]
	adr	r3, .L39+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L40:
	.align	3
.L39:
	.word	-33685505
	.word	-33686019
	.word	33685504
	.word	33686018
	.word	-134479873
	.word	2143281135
	.word	134479872
	.word	-2143281136
	.size	flip_B2, .-flip_B2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C2, %function
flip_C2:
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #172
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L43
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #262144
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L43+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-156]
	and	r3, r9, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L43+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L43+40
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L43+44
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #9
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	mov	r2, #131072
	mov	r3, #0
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-108]
	and	r1, r1, r3
	str	r1, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L43+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-116]
	orr	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #524288
	str	r2, [fp, #-124]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-120]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	adr	r3, .L43+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-140]
	sbc	r3, r1, r3
	str	r3, [fp, #-136]
	adr	r3, .L43+32
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L44:
	.align	3
.L43:
	.word	-67371009
	.word	-67372037
	.word	67371008
	.word	67372036
	.word	-268959745
	.word	-8405025
	.word	268960768
	.word	8405024
	.word	268959744
	.word	8405024
	.word	OUTFLANK_2
	.word	FLIPPED_2
	.size	flip_C2, .-flip_C2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D2, %function
flip_D2:
	@ args = 0, pretend = 0, frame = 216
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #220
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L47
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #524288
	adc	r7, r5, #0
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L47+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-196]
	and	r3, r9, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-92]
	sbc	r3, r3, r1
	str	r3, [fp, #-88]
	adr	r3, .L47+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L47+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-64]
	ldr	r2, .L47+36
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #65280
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mvn	r2, #33816576
	mvn	r3, #1
	orr	ip, r0, r2
	str	ip, [fp, #-116]
	orr	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #262144
	str	r2, [fp, #-124]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-120]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	mov	r2, #33816576
	mov	r3, #1
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-220]
	and	r1, r1, r3
	str	r1, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-40]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-140]
	sbc	r3, r3, r1
	str	r3, [fp, #-136]
	mov	r2, #33816576
	mov	r3, #1
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L47+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-156]
	orr	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #1048576
	str	r2, [fp, #-164]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	adr	r3, .L47+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-236]
	and	r1, r1, r3
	str	r1, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-180]
	sbc	r3, r1, r3
	str	r3, [fp, #-176]
	adr	r3, .L47+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-244]
	orr	r3, r3, r1
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	b	.L48
.L49:
	.align	3
.L47:
	.word	-134742017
	.word	-134744073
	.word	134742016
	.word	134744072
	.word	-537919489
	.word	-32833
	.word	537919488
	.word	32832
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
.L48:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_D2, .-flip_D2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E2, %function
flip_E2:
	@ args = 0, pretend = 0, frame = 216
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #220
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L52
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #1048576
	adc	r7, r5, #0
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L52+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-196]
	and	r3, r9, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-92]
	sbc	r3, r3, r1
	str	r3, [fp, #-88]
	adr	r3, .L52+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L52+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-64]
	ldr	r2, .L52+36
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #65280
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L52+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-116]
	orr	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #524288
	str	r2, [fp, #-124]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-120]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	adr	r3, .L52+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-220]
	and	r1, r1, r3
	str	r1, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-40]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-140]
	sbc	r3, r3, r1
	str	r3, [fp, #-136]
	adr	r3, .L52+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	ldr	r2, .L52+40
	mvn	r3, #128
	orr	ip, r0, r2
	str	ip, [fp, #-156]
	orr	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #2097152
	str	r2, [fp, #-164]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	ldr	r2, .L52+44
	mov	r3, #128
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-236]
	and	r1, r1, r3
	str	r1, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-180]
	sbc	r3, r1, r3
	str	r3, [fp, #-176]
	ldr	r2, .L52+44
	mov	r3, #128
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-244]
	orr	r3, r3, r1
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	b	.L53
.L54:
	.align	3
.L52:
	.word	-269484033
	.word	-269488145
	.word	269484032
	.word	269488144
	.word	-67633153
	.word	-259
	.word	67633152
	.word	258
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.word	-1075838977
	.word	1075838976
.L53:
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_E2, .-flip_E2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F2, %function
flip_F2:
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #172
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L57
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #2097152
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L57+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-156]
	and	r3, r9, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L57+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L57+16
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L57+20
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #9
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mvn	r2, #135266304
	ldr	r3, .L57+24
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #1048576
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	mov	r2, #135266304
	ldr	r3, .L57+28
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-124]
	sbc	r3, r3, r1
	str	r3, [fp, #-120]
	mov	r2, #135266304
	ldr	r3, .L57+28
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #9
	orr	r2, r2, r1, lsl #23
	lsr	r3, r1, #9
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-140]
	and	r3, r3, r1
	str	r3, [fp, #-136]
	mov	r2, #4194304
	mov	r3, #0
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L58:
	.align	3
.L57:
	.word	-538968065
	.word	-538976289
	.word	538968064
	.word	538976288
	.word	OUTFLANK_5
	.word	FLIPPED_5
	.word	-66053
	.word	66052
	.size	flip_F2, .-flip_F2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G2, %function
flip_G2:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #156
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L61
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #4194304
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L61+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-148]
	and	r3, r9, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L61+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L61+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	lsl	r3, r3, #8
	mov	r0, r3
	mov	r1, #0
	mov	r2, #15872
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L61+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #2097152
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	adr	r3, .L61+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-132]
	sbc	r3, r1, r3
	str	r3, [fp, #-128]
	adr	r3, .L61+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L62:
	.align	3
.L61:
	.word	-1077936129
	.word	-1077952577
	.word	1077936128
	.word	1077952576
	.word	-270532609
	.word	-16909321
	.word	270532608
	.word	16909320
	.word	OUTFLANK_7
	.size	flip_G2, .-flip_G2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H2, %function
flip_H2:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #156
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L65
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #8388608
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L65+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-148]
	and	r3, r9, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L65+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L65+16
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	lsl	r3, r3, #9
	mov	r0, r3
	mov	r1, #0
	mov	r2, #32256
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mvn	r2, #541065216
	ldr	r3, .L65+20
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #4194304
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	mov	r2, #541065216
	ldr	r3, .L65+24
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r2, r3, #255
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-132]
	sbc	r3, r1, r3
	str	r3, [fp, #-128]
	mov	r2, #541065216
	ldr	r3, .L65+24
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L66:
	.align	3
.L65:
	.word	2139095039
	.word	2139062143
	.word	-2139095040
	.word	-2139062144
	.word	OUTFLANK_7
	.word	-33818641
	.word	33818640
	.size	flip_H2, .-flip_H2
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A3, %function
flip_A3:
	@ args = 0, pretend = 0, frame = 216
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #220
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L69
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #16777216
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L69+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-196]
	and	r3, r9, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L69+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #8257536
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #131072
	str	r2, [fp, #-100]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-96]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-212]
	and	r1, r1, r3
	str	r1, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-108]
	sbc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #8257536
	mov	r3, #0
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L69+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-124]
	orr	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #33554432
	str	r2, [fp, #-132]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-128]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	adr	r3, .L69+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-228]
	and	r1, r1, r3
	str	r1, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-148]
	sbc	r3, r3, r1
	str	r3, [fp, #-144]
	adr	r3, .L69+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #256
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, #512
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-172]
	and	r3, r1, r3
	str	r3, [fp, #-168]
	sub	r2, fp, #164
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-180]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-176]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-244]
	orr	r3, r3, r1
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L70:
	.align	3
.L69:
	.word	-16777217
	.word	-16843010
	.word	16777216
	.word	16843009
	.word	-33554433
	.word	-537921541
	.word	33554432
	.word	537921540
	.size	flip_A3, .-flip_A3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B3, %function
flip_B3:
	@ args = 0, pretend = 0, frame = 216
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #220
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L73
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #33554432
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L73+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-196]
	and	r3, r9, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L73+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #8126464
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #262144
	str	r2, [fp, #-100]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-96]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-212]
	and	r1, r1, r3
	str	r1, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-108]
	sbc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #8126464
	mov	r3, #0
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L73+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-124]
	orr	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #67108864
	str	r2, [fp, #-132]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-128]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	adr	r3, .L73+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-228]
	and	r1, r1, r3
	str	r1, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-148]
	sbc	r3, r3, r1
	str	r3, [fp, #-144]
	adr	r3, .L73+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #512
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, #1024
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-172]
	and	r3, r1, r3
	str	r3, [fp, #-168]
	sub	r2, fp, #164
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-180]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-176]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-244]
	orr	r3, r3, r1
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L74:
	.align	3
.L73:
	.word	-33554433
	.word	-33686019
	.word	33554432
	.word	33686018
	.word	-67108865
	.word	-1075843081
	.word	67108864
	.word	1075843080
	.size	flip_B3, .-flip_B3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C3, %function
flip_C3:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L77
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #67108864
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L77+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-196]
	and	r3, r9, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L77+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #17
	orr	r0, r0, r3, lsl #15
	lsr	r1, r3, #17
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L77+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #16
	orr	r0, r0, r3, lsl #16
	lsr	r1, r3, #16
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L77+36
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #17
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L77+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #134217728
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	adr	r3, .L77+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-220]
	and	r1, r1, r3
	str	r1, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-124]
	sbc	r3, r3, r1
	str	r3, [fp, #-120]
	adr	r3, .L77+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #1024
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, #512
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r2, fp, #140
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-156]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-152]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r4, #0
	mov	r5, #0
	lsr	r4, r2, #7
	orr	r4, r4, r3, lsl #25
	lsr	r5, r3, #7
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	orr	r3, r4, r0
	str	r3, [fp, #-164]
	orr	r3, r5, r1
	str	r3, [fp, #-160]
	ldr	r2, .L77+40
	mov	r3, #0
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r2, fp, #156
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-180]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-176]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	b	.L78
.L79:
	.align	3
.L77:
	.word	-67108865
	.word	-67372037
	.word	67108864
	.word	67372036
	.word	-134217729
	.word	2143281135
	.word	134217728
	.word	-2143281136
	.word	OUTFLANK_2
	.word	FLIPPED_2
	.word	33556480
.L78:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_C3, .-flip_C3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D3, %function
flip_D3:
	@ args = 0, pretend = 0, frame = 272
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #276
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L82
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #134217728
	adc	r7, r5, #0
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L82+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-244]
	and	r3, r9, r3
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-92]
	sbc	r3, r3, r1
	str	r3, [fp, #-88]
	adr	r3, .L82+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-252]
	and	r1, r1, r3
	str	r1, [fp, #-248]
	sub	r4, fp, #252
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #17
	orr	r0, r0, r3, lsl #15
	lsr	r1, r3, #17
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L82+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #16
	orr	r0, r0, r3, lsl #16
	lsr	r1, r3, #16
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-64]
	ldr	r2, .L82+36
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #16711680
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-260]
	orr	r3, r3, r1
	str	r3, [fp, #-256]
	sub	r4, fp, #260
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mvn	r2, #67108864
	ldr	r3, .L82+40
	orr	ip, r0, r2
	str	ip, [fp, #-116]
	orr	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #67108864
	str	r2, [fp, #-124]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-120]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	mov	r2, #67108864
	ldr	r3, .L82+44
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-268]
	and	r1, r1, r3
	str	r1, [fp, #-264]
	sub	r4, fp, #268
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-140]
	sbc	r3, r3, r1
	str	r3, [fp, #-136]
	mov	r2, #67108864
	ldr	r3, .L82+44
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-276]
	orr	r3, r3, r1
	str	r3, [fp, #-272]
	sub	r4, fp, #276
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L82+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-156]
	orr	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #268435456
	str	r2, [fp, #-164]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	adr	r3, .L82+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-284]
	and	r1, r1, r3
	str	r1, [fp, #-280]
	sub	r4, fp, #284
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-180]
	sbc	r3, r3, r1
	str	r3, [fp, #-176]
	adr	r3, .L82+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-292]
	orr	r3, r3, r1
	str	r3, [fp, #-288]
	sub	r4, fp, #292
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	b	.L83
.L84:
	.align	3
.L82:
	.word	-134217729
	.word	-134744073
	.word	134217728
	.word	134744072
	.word	-268435457
	.word	-8405025
	.word	268435456
	.word	8405024
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
	.word	-259
	.word	258
.L83:
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #2048
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, #4096
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-204]
	and	r3, r1, r3
	str	r3, [fp, #-200]
	sub	r2, fp, #196
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-212]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-208]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, #1024
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-220]
	and	r3, r1, r3
	str	r3, [fp, #-216]
	sub	r2, fp, #212
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-228]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-224]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	sub	r1, fp, #228
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-236]
	and	r1, r1, r3
	str	r1, [fp, #-232]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #236
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-300]
	orr	r3, r3, r1
	str	r3, [fp, #-296]
	sub	r4, fp, #300
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_D3, .-flip_D3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E3, %function
flip_E3:
	@ args = 0, pretend = 0, frame = 272
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #276
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L87
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #268435456
	adc	r7, r5, #0
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L87+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-244]
	and	r3, r9, r3
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	ldr	r2, [fp, #-60]
	ldr	r3, [fp, #-56]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-92]
	sbc	r3, r3, r1
	str	r3, [fp, #-88]
	adr	r3, .L87+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-252]
	and	r1, r1, r3
	str	r1, [fp, #-248]
	sub	r4, fp, #252
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #17
	orr	r0, r0, r3, lsl #15
	lsr	r1, r3, #17
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L87+16
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #16
	orr	r0, r0, r3, lsl #16
	lsr	r1, r3, #16
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-64]
	ldr	r2, .L87+20
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #16711680
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-260]
	orr	r3, r3, r1
	str	r3, [fp, #-256]
	sub	r4, fp, #260
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mvn	r2, #134217728
	ldr	r3, .L87+24
	orr	ip, r0, r2
	str	ip, [fp, #-116]
	orr	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #134217728
	str	r2, [fp, #-124]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-120]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	mov	r2, #134217728
	ldr	r3, .L87+28
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-268]
	and	r1, r1, r3
	str	r1, [fp, #-264]
	sub	r4, fp, #268
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	ldr	r2, [fp, #-44]
	ldr	r3, [fp, #-40]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-140]
	sbc	r3, r3, r1
	str	r3, [fp, #-136]
	mov	r2, #134217728
	ldr	r3, .L87+28
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-148]
	and	r1, r1, r3
	str	r1, [fp, #-144]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-276]
	orr	r3, r3, r1
	str	r3, [fp, #-272]
	sub	r4, fp, #276
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mvn	r2, #536870912
	ldr	r3, .L87+32
	orr	ip, r0, r2
	str	ip, [fp, #-156]
	orr	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #536870912
	str	r2, [fp, #-164]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	mov	r2, #536870912
	ldr	r3, .L87+36
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-284]
	and	r1, r1, r3
	str	r1, [fp, #-280]
	sub	r4, fp, #284
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-180]
	sbc	r3, r3, r1
	str	r3, [fp, #-176]
	mov	r2, #536870912
	ldr	r3, .L87+36
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-292]
	orr	r3, r3, r1
	str	r3, [fp, #-288]
	sub	r4, fp, #292
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	b	.L88
.L89:
	.align	3
.L87:
	.word	-268435457
	.word	-269488145
	.word	268435456
	.word	269488144
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.word	-66053
	.word	66052
	.word	-32833
	.word	32832
.L88:
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #4096
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, #8192
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-204]
	and	r3, r1, r3
	str	r3, [fp, #-200]
	sub	r2, fp, #196
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-212]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-208]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, #2048
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-220]
	and	r3, r1, r3
	str	r3, [fp, #-216]
	sub	r2, fp, #212
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-228]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-224]
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	sub	r1, fp, #228
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-236]
	and	r1, r1, r3
	str	r1, [fp, #-232]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #236
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-300]
	orr	r3, r3, r1
	str	r3, [fp, #-296]
	sub	r4, fp, #300
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_E3, .-flip_E3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F3, %function
flip_F3:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L92
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #536870912
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L92+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-196]
	and	r3, r9, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L92+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #17
	orr	r0, r0, r3, lsl #15
	lsr	r1, r3, #17
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L92+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #16
	orr	r0, r0, r3, lsl #16
	lsr	r1, r3, #16
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L92+36
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #17
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L92+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #268435456
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	adr	r3, .L92+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-220]
	and	r1, r1, r3
	str	r1, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-124]
	sbc	r3, r3, r1
	str	r3, [fp, #-120]
	adr	r3, .L92+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #8192
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, #16384
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r2, fp, #140
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-156]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-152]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r4, #0
	mov	r5, #0
	lsr	r4, r2, #9
	orr	r4, r4, r3, lsl #23
	lsr	r5, r3, #9
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	orr	r3, r4, r0
	str	r3, [fp, #-164]
	orr	r3, r5, r1
	str	r3, [fp, #-160]
	ldr	r2, .L92+40
	mov	r3, #0
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r2, fp, #156
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-180]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-176]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #180
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	b	.L93
.L94:
	.align	3
.L92:
	.word	-536870913
	.word	-538976289
	.word	536870912
	.word	538976288
	.word	-268435457
	.word	-16909321
	.word	268435456
	.word	16909320
	.word	OUTFLANK_5
	.word	FLIPPED_5
	.word	1073745920
.L93:
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_F3, .-flip_F3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G3, %function
flip_G3:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #196
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L97
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #1073741824
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L97+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-180]
	and	r3, r9, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L97+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #16
	orr	r0, r0, r3, lsl #16
	lsr	r1, r3, #16
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L97+16
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #15
	orr	r0, r0, r3, lsl #17
	lsr	r1, r3, #15
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	lsl	r3, r3, #16
	mov	r0, r3
	mov	r1, #0
	mov	r2, #4063232
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mvn	r2, #536870912
	ldr	r3, .L97+20
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #536870912
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	mov	r2, #536870912
	ldr	r3, .L97+24
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-132]
	sbc	r3, r3, r1
	str	r3, [fp, #-128]
	mov	r2, #536870912
	ldr	r3, .L97+24
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #16384
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, #8192
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L98:
	.align	3
.L97:
	.word	-1073741825
	.word	-1077952577
	.word	1073741824
	.word	1077952576
	.word	OUTFLANK_7
	.word	-33818641
	.word	33818640
	.size	flip_G3, .-flip_G3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H3, %function
flip_H3:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #196
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L101
	ldmia	r3, {r2-r3}
	orr	r4, r0, r2
	orr	r5, r1, r3
	adds	r6, r4, #-2147483648
	adc	r7, r5, #0
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r8, r6, r2
	and	r9, r7, r3
	adr	r3, .L101+8
	ldmia	r3, {r2-r3}
	and	r1, r8, r2
	str	r1, [fp, #-180]
	and	r3, r9, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	ldr	r2, [fp, #-52]
	ldr	r3, [fp, #-48]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-84]
	sbc	r3, r3, r1
	str	r3, [fp, #-80]
	adr	r3, .L101+8
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #17
	orr	r0, r0, r3, lsl #15
	lsr	r1, r3, #17
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L101+32
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #16
	orr	r0, r0, r3, lsl #16
	lsr	r1, r3, #16
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	lsl	r3, r3, #17
	mov	r0, r3
	mov	r1, #0
	mov	r2, #8257536
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L101+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #1073741824
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #0
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	adr	r3, .L101+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, [fp, #-36]
	ldr	r3, [fp, #-32]
	orr	r3, r2, r3
	cmp	r3, #0
	movne	r3, #1
	moveq	r3, #0
	and	r3, r3, #255
	and	r0, r3, #255
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-132]
	sbc	r3, r3, r1
	str	r3, [fp, #-128]
	adr	r3, .L101+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, #32768
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, #16384
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L102:
	.align	3
.L101:
	.word	2147483647
	.word	2139062143
	.word	-2147483648
	.word	-2139062144
	.word	-1073741825
	.word	-67637281
	.word	1073741824
	.word	67637280
	.word	OUTFLANK_7
	.size	flip_H3, .-flip_H3
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A4, %function
flip_A4:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L105
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L105+24
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L105+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-64]
	ldr	r2, .L105+28
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L105
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-180]
	and	r3, r1, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	r2, #2113929216
	mov	r3, #0
	and	r8, r0, r2
	and	r9, r1, r3
	adds	r3, r8, #33554432
	str	r3, [fp, #-92]
	adc	r3, r9, #0
	str	r3, [fp, #-88]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-100]
	sbc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #2113929216
	mov	r3, #0
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-108]
	and	r1, r1, r3
	str	r1, [fp, #-104]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	r2, #131072
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-204]
	and	r3, r1, r3
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	rsbs	r0, r0, #0
	rsc	r1, r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L105+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-140]
	orr	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	b	.L106
.L107:
	.align	3
.L105:
	.word	16843008
	.word	65793
	.word	16843009
	.word	16843009
	.word	-1
	.word	-268960771
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
.L106:
	str	r2, [fp, #-148]
	mov	r3, r4
	adc	r3, r3, #2
	str	r3, [fp, #-144]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	adr	r3, .L108
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-228]
	and	r1, r1, r3
	str	r1, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r2, r1
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-164]
	sbc	r3, r1, r3
	str	r3, [fp, #-160]
	adr	r3, .L108
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L109:
	.align	3
.L108:
	.word	0
	.word	268960770
	.size	flip_A4, .-flip_A4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B4, %function
flip_B4:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-76]
	str	r1, [fp, #-72]
	str	r2, [fp, #-84]
	str	r3, [fp, #-80]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L112
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #6
	orr	r3, r3, r0, lsr #26
	lsl	r2, r0, #6
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L112+24
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L112+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #6
	orr	r3, r3, r0, lsr #26
	lsl	r2, r0, #6
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-64]
	ldr	r2, .L112+28
	ldr	r3, [fp, #-64]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L112
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-180]
	and	r3, r1, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	r2, #2080374784
	mov	r3, #0
	and	r8, r0, r2
	and	r9, r1, r3
	adds	r3, r8, #67108864
	str	r3, [fp, #-92]
	adc	r3, r9, #0
	str	r3, [fp, #-88]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-100]
	sbc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #2080374784
	mov	r3, #0
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-108]
	and	r1, r1, r3
	str	r1, [fp, #-104]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	r2, #262144
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-204]
	and	r3, r1, r3
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	sub	r3, fp, #84
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	rsbs	r0, r0, #0
	rsc	r1, r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	adr	r3, .L112+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-140]
	orr	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	b	.L113
.L114:
	.align	3
.L112:
	.word	33686016
	.word	131586
	.word	33686018
	.word	33686018
	.word	-1
	.word	-537921541
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
.L113:
	str	r2, [fp, #-148]
	mov	r3, r4
	adc	r3, r3, #4
	str	r3, [fp, #-144]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	adr	r3, .L115
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-228]
	and	r1, r1, r3
	str	r1, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r2, r1
	mov	r3, #0
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-164]
	sbc	r3, r1, r3
	str	r3, [fp, #-160]
	adr	r3, .L115
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L116:
	.align	3
.L115:
	.word	0
	.word	537921540
	.size	flip_B4, .-flip_B4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C4, %function
flip_C4:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L119
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L119+32
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L119+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #5
	orr	r3, r3, r0, lsr #27
	lsl	r2, r0, #5
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-60]
	ldr	r2, .L119+36
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L119
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-180]
	and	r3, r1, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #25
	orr	r0, r0, r3, lsl #7
	lsr	r1, r3, #25
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	ldr	r3, .L119+40
	ldr	r2, [fp, #-84]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L119+44
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #25
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #524288
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	r1, r2, r8
	str	r1, [fp, #-204]
	orr	r3, r3, r9
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	rsbs	r0, r0, #0
	rsc	r1, r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L119+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #8
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	adr	r3, .L119+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	b	.L120
.L121:
	.align	3
.L119:
	.word	67372032
	.word	263172
	.word	67372036
	.word	67372036
	.word	-1
	.word	-1075843081
	.word	0
	.word	1075843080
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
	.word	OUTFLANK_2
	.word	FLIPPED_2
.L120:
	and	ip, ip, r2
	str	ip, [fp, #-220]
	and	r1, r1, r3
	str	r1, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-132]
	sbc	r3, r3, r1
	str	r3, [fp, #-128]
	adr	r3, .L122
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, #131072
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r2, #0
	mov	r3, #2
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
.L123:
	.align	3
.L122:
	.word	0
	.word	1075843080
	.size	flip_C4, .-flip_C4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D4, %function
flip_D4:
	@ args = 0, pretend = 0, frame = 160
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #160
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L126
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #4
	orr	r3, r3, r0, lsr #28
	lsl	r2, r0, #4
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L126+24
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L126+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #4
	orr	r3, r3, r0, lsr #28
	lsl	r2, r0, #4
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L126+28
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L126
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #25
	orr	r0, r0, r3, lsl #7
	lsr	r1, r3, #25
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L126+24
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L126+32
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #-16777216
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	ldr	r2, .L126+36
	mov	r3, #516
	and	r8, r0, r2
	and	r9, r1, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-92]
	adc	r3, r3, r1
	str	r3, [fp, #-88]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-88]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L126+24
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L126+16
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r5, fp, #100
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	b	.L127
.L128:
	.align	3
.L126:
	.word	134744064
	.word	526344
	.word	134744072
	.word	134744072
	.word	135274560
	.word	66052
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
	.word	FLIPPED_3_H
	.word	135274496
.L127:
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-108]
	adc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-104]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-44]
	ldr	r2, .L126+32
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, .L126+36
	mov	r3, #516
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L129
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r5, fp, #124
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-132]
	adc	r3, r3, r1
	str	r3, [fp, #-128]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-128]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L129+16
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L129+8
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-140]
	and	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r5, fp, #140
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-148]
	adc	r3, r3, r1
	str	r3, [fp, #-144]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-144]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-40]
	ldr	r2, .L129+20
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adr	r1, .L129
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-156]
	and	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L130:
	.align	3
.L129:
	.word	134480384
	.word	4202512
	.word	134480385
	.word	-2143281136
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
	.size	flip_D4, .-flip_D4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E4, %function
flip_E4:
	@ args = 0, pretend = 0, frame = 160
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #160
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L133
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #3
	orr	r3, r3, r0, lsr #29
	lsl	r2, r0, #3
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L133+32
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L133+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #3
	orr	r3, r3, r0, lsr #29
	lsl	r2, r0, #3
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L133+36
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L133
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #25
	orr	r0, r0, r3, lsl #7
	lsr	r1, r3, #25
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L133+40
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L133+44
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #-16777216
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L133+16
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-92]
	adc	r3, r3, r1
	str	r3, [fp, #-88]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-88]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L133+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L133+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r5, fp, #100
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	b	.L134
.L135:
	.align	3
.L133:
	.word	269488128
	.word	1052688
	.word	269488144
	.word	269488144
	.word	270548992
	.word	132104
	.word	270549120
	.word	16909320
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
.L134:
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-108]
	adc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-104]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-44]
	ldr	r2, .L133+44
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L136
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L136+8
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r5, fp, #124
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-132]
	adc	r3, r3, r1
	str	r3, [fp, #-128]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-128]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L136+24
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L136+16
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-140]
	and	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r5, fp, #140
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-148]
	adc	r3, r3, r1
	str	r3, [fp, #-144]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-144]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-40]
	ldr	r2, .L136+28
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adr	r1, .L136+8
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-156]
	and	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L137:
	.align	3
.L136:
	.word	270548992
	.word	132104
	.word	268960768
	.word	16416
	.word	268960770
	.word	8405024
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.size	flip_E4, .-flip_E4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F4, %function
flip_F4:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #212
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L140
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #2
	orr	r3, r3, r0, lsr #30
	lsl	r2, r0, #2
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L140+16
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L140+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #2
	orr	r3, r3, r0, lsr #30
	lsl	r2, r0, #2
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-60]
	ldr	r2, .L140+20
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L140
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-180]
	and	r3, r1, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #25
	orr	r0, r0, r3, lsl #7
	lsr	r1, r3, #25
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	ldr	r3, .L140+24
	ldr	r2, [fp, #-84]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L140+28
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #25
	mov	r0, r3
	asr	r1, r0, #31
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mvn	r2, #0
	ldr	r3, .L140+32
	orr	r8, r0, r2
	orr	r9, r1, r3
	adds	r3, r8, #0
	str	r3, [fp, #-92]
	adc	r3, r9, #16
	str	r3, [fp, #-88]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-100]
	and	r1, r1, r3
	str	r1, [fp, #-96]
	mov	r2, #0
	ldr	r3, .L140+36
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-196]
	and	r1, r1, r3
	str	r1, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-108]
	sbc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #0
	ldr	r3, .L140+36
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #1048576
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-212]
	and	r3, r1, r3
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	b	.L141
.L142:
	.align	3
.L140:
	.word	538976256
	.word	2105376
	.word	538976288
	.word	538976288
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
	.word	OUTFLANK_5
	.word	FLIPPED_5
	.word	-33818641
	.word	33818640
.L141:
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	rsbs	r0, r0, #0
	rsc	r1, r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, #4194304
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #0
	mov	r3, #64
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_F4, .-flip_F4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G4, %function
flip_G4:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	push	{r4, r5, r6, r7, r8, r9, fp}
	add	fp, sp, #24
	sub	sp, sp, #196
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L145
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r4
	adc	r3, r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #14
	orr	r1, r1, r2, lsr #18
	lsl	r0, r2, #14
	adds	r2, r2, r0
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #28
	orr	r1, r1, r2, lsr #4
	lsl	r0, r2, #28
	adds	r2, r2, r0
	adc	r3, r3, r1
	adds	r8, r2, r2
	adc	r9, r3, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L145+32
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L145+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r6
	adc	r3, r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #14
	orr	r1, r1, r2, lsr #18
	lsl	r0, r2, #14
	adds	r2, r2, r0
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #28
	orr	r1, r1, r2, lsr #4
	lsl	r0, r2, #28
	adds	r2, r2, r0
	adc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-164]
	adc	r3, r3, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #164
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-60]
	ldr	r2, .L145+36
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L145
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-172]
	and	r3, r1, r3
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	ldr	r3, .L145+40
	ldr	r2, [fp, #-84]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #23
	orr	r0, r0, r3, lsl #9
	lsr	r1, r3, #23
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	lsl	r3, r3, #24
	mov	r0, r3
	mov	r1, #0
	mov	r2, #1040187392
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #92
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L145+16
	ldmia	r3, {r2-r3}
	orr	ip, r0, r2
	str	ip, [fp, #-100]
	orr	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #32
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	adr	r3, .L145+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-124]
	sbc	r3, r3, r1
	str	r3, [fp, #-120]
	adr	r3, .L145+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #2097152
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-204]
	and	r3, r1, r3
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	b	.L146
.L147:
	.align	3
.L145:
	.word	1077952512
	.word	4210752
	.word	1077952576
	.word	1077952576
	.word	-1
	.word	-67637281
	.word	0
	.word	67637280
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
	.word	OUTFLANK_7
.L146:
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #9
	orr	r3, r3, r0, lsr #23
	lsl	r2, r0, #9
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-148]
	and	r3, r3, r1
	str	r3, [fp, #-144]
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	rsbs	r0, r0, #0
	rsc	r1, r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #24
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp}
	bx	lr
	.size	flip_G4, .-flip_G4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H4, %function
flip_H4:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #192
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L150
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r8, r0, r2
	adc	r9, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r9, #25
	mov	r3, #0
	ldr	r1, .L150+16
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L150+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	lr, r0, r2
	str	lr, [fp, #-84]
	adc	r3, r1, r3
	str	r3, [fp, #-80]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-80]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-60]
	ldr	r2, .L150+20
	ldr	r3, [fp, #-60]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L150
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-172]
	and	r3, r1, r3
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #25
	orr	r0, r0, r3, lsl #7
	lsr	r1, r3, #25
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L150+24
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #24
	orr	r0, r0, r3, lsl #8
	lsr	r1, r3, #24
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	lsl	r3, r3, #25
	mov	r0, r3
	mov	r1, #0
	mov	r2, #2113929216
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mvn	r2, #0
	ldr	r3, .L150+28
	orr	ip, r0, r2
	str	ip, [fp, #-108]
	orr	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #64
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	mov	r2, #0
	ldr	r3, .L150+32
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-132]
	sbc	r3, r3, r1
	str	r3, [fp, #-128]
	mov	r2, #0
	ldr	r3, .L150+32
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #4194304
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-204]
	and	r3, r1, r3
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	b	.L151
.L152:
	.align	3
.L150:
	.word	-2139062272
	.word	8421504
	.word	-2139062144
	.word	-2139062144
	.word	OUTFLANK_3
	.word	FLIPPED_3_V
	.word	OUTFLANK_7
	.word	-135274561
	.word	135274560
.L151:
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #9
	orr	r3, r3, r0, lsr #23
	lsl	r2, r0, #9
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-156]
	and	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	rsbs	r0, r0, #0
	rsc	r1, r1, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_H4, .-flip_H4
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A5, %function
flip_A5:
	@ args = 0, pretend = 0, frame = 120
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #120
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L155
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	ldr	r3, .L155+32
	mul	r2, r3, r5
	ldr	r3, .L155+36
	mul	r3, r4, r3
	add	r2, r2, r3
	ldr	r3, .L155+32
	umull	r0, r1, r4, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L155+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L155+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	ldr	r3, .L155+32
	mul	r2, r3, r7
	ldr	r3, .L155+36
	mul	r3, r6, r3
	add	r2, r2, r3
	ldr	r3, .L155+32
	umull	r0, r1, r6, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L155+44
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L155
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L155+16
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	ldr	r3, .L155+48
	mul	r2, r3, r9
	ldr	r3, .L155+52
	mul	r3, r8, r3
	add	r2, r2, r3
	ldr	r3, .L155+48
	umull	r0, r1, r8, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L155+56
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L155+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L155+48
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, r1
	mul	r2, r3, r2
	ldr	r3, .L155+52
	mov	lr, r0
	mul	lr, r3, lr
	mov	r3, lr
	add	r2, r2, r3
	ldr	r3, .L155+48
	mov	lr, r0
	umull	r0, r1, lr, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L155+60
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L155+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-132]
	orr	r3, r3, r1
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #126
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-100]
	mov	r3, r4
	adc	r3, r3, #2
	str	r3, [fp, #-96]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #8
	orr	r2, r2, r1, lsl #24
	lsr	r3, r1, #8
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-108]
	sbc	r3, r1, r3
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #126
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-148]
	orr	r3, r3, r1
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L156:
	.align	3
.L155:
	.word	16843008
	.word	262657
	.word	16843009
	.word	134480385
	.word	33818624
	.word	65793
	.word	33818640
	.word	16843009
	.word	269488144
	.word	16909320
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	134480385
	.word	134744072
	.word	OUTFLANK_3
	.word	FLIPPED_3_U
	.size	flip_A5, .-flip_A5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B5, %function
flip_B5:
	@ args = 0, pretend = 0, frame = 120
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #120
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L159
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	ldr	r3, .L159+32
	mul	r2, r3, r5
	ldr	r3, .L159+36
	mul	r3, r4, r3
	add	r2, r2, r3
	ldr	r3, .L159+32
	umull	r0, r1, r4, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L159+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L159+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	ldr	r3, .L159+32
	mul	r2, r3, r7
	ldr	r3, .L159+36
	mul	r3, r6, r3
	add	r2, r2, r3
	ldr	r3, .L159+32
	umull	r0, r1, r6, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L159+44
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L159
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L159+16
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	ldr	r3, .L159+48
	mul	r2, r3, r9
	ldr	r3, .L159+32
	mul	r3, r8, r3
	add	r2, r2, r3
	ldr	r3, .L159+48
	umull	r0, r1, r8, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #26
	mov	r3, #0
	ldr	r1, .L159+52
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #1
	orr	r0, r0, r3, lsl #31
	lsr	r1, r3, #1
	adr	r3, .L159+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L159+48
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, r1
	mul	r2, r3, r2
	ldr	r3, .L159+32
	mov	lr, r0
	mul	lr, r3, lr
	mov	r3, lr
	add	r2, r2, r3
	ldr	r3, .L159+48
	mov	lr, r0
	umull	r0, r1, lr, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L159+56
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L159+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-132]
	orr	r3, r3, r1
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #124
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-100]
	mov	r3, r4
	adc	r3, r3, #4
	str	r3, [fp, #-96]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #8
	orr	r2, r2, r1, lsl #24
	lsr	r3, r1, #8
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	subs	ip, r0, r2
	str	ip, [fp, #-108]
	sbc	r3, r1, r3
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #124
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-148]
	orr	r3, r3, r1
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L160:
	.align	3
.L159:
	.word	33686016
	.word	525314
	.word	33686018
	.word	268960770
	.word	67637248
	.word	131586
	.word	33818640
	.word	16843009
	.word	134744072
	.word	8454660
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	134480385
	.word	OUTFLANK_3
	.word	FLIPPED_3_U
	.size	flip_B5, .-flip_B5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C5, %function
flip_C5:
	@ args = 0, pretend = 0, frame = 136
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #136
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L163
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	ldr	r3, .L163+32
	mul	r2, r3, r5
	ldr	r3, .L163+36
	mul	r3, r4, r3
	add	r2, r2, r3
	ldr	r3, .L163+32
	umull	r0, r1, r4, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L163+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L163+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	ldr	r3, .L163+32
	mul	r2, r3, r7
	ldr	r3, .L163+36
	mul	r3, r6, r3
	add	r2, r2, r3
	ldr	r3, .L163+32
	umull	r0, r1, r6, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L163+44
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L163
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L163+16
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	r2, r2, r0
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L163+48
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #2
	orr	r0, r0, r3, lsl #30
	lsr	r1, r3, #2
	adr	r3, .L163+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L163+52
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, r1
	mul	r2, r3, r2
	ldr	r3, .L163+56
	mov	lr, r0
	mul	lr, r3, lr
	mov	r3, lr
	add	r2, r2, r3
	ldr	r3, .L163+52
	mov	lr, r0
	umull	r0, r1, lr, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L163+60
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L163+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-140]
	orr	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #1
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L163+64
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r4, r3, #255
	mov	r5, #0
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	and	r3, r4, r0
	str	r3, [fp, #-148]
	and	r3, r5, r1
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	ldr	r2, .L163+68
	ldr	r3, [fp, #-36]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #1
	mov	r0, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, #33554432
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r2, #0
	mov	r3, #512
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	b	.L164
.L165:
	.align	3
.L163:
	.word	67372032
	.word	1050628
	.word	67372036
	.word	537921540
	.word	135274496
	.word	263172
	.word	33818640
	.word	16843009
	.word	67372036
	.word	4227330
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	OUTFLANK_3
	.word	134480385
	.word	134744072
	.word	FLIPPED_3_U
	.word	OUTFLANK_2
	.word	FLIPPED_2
.L164:
	str	r3, [fp, #-104]
	sub	r2, fp, #100
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-116]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_C5, .-flip_C5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D5, %function
flip_D5:
	@ args = 0, pretend = 0, frame = 160
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #160
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L168
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #4
	orr	r3, r3, r0, lsr #28
	lsl	r2, r0, #4
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L168+32
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L168+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #4
	orr	r3, r3, r0, lsr #28
	lsl	r2, r0, #4
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L168+36
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L168
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #1
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L168+40
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L168+44
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #255
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L168+16
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-92]
	adc	r3, r3, r1
	str	r3, [fp, #-88]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-88]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L168+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L168+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r5, fp, #100
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	b	.L169
.L170:
	.align	3
.L168:
	.word	134744064
	.word	526344
	.word	134744072
	.word	134744072
	.word	270548992
	.word	132104
	.word	270549120
	.word	16909320
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
.L169:
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-108]
	adc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-104]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-44]
	ldr	r2, .L168+44
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L171
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L171+8
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r5, fp, #124
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-132]
	adc	r3, r3, r1
	str	r3, [fp, #-128]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-128]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L171+24
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L171+16
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-140]
	and	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r5, fp, #140
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-148]
	adc	r3, r3, r1
	str	r3, [fp, #-144]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-144]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-40]
	ldr	r2, .L171+28
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adr	r1, .L171+8
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-156]
	and	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L172:
	.align	3
.L171:
	.word	270548992
	.word	132104
	.word	67239936
	.word	2101256
	.word	67240192
	.word	1075843080
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
	.size	flip_D5, .-flip_D5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E5, %function
flip_E5:
	@ args = 0, pretend = 0, frame = 160
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #160
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L175
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	mov	r0, r4
	mov	r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r4
	adc	r1, r1, r5
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #3
	orr	r3, r3, r0, lsr #29
	lsl	r2, r0, #3
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L175+24
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L175+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r0, r6
	mov	r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #7
	orr	r3, r3, r0, lsr #25
	lsl	r2, r0, #7
	mov	r0, r2
	mov	r1, r3
	adds	r0, r0, r6
	adc	r1, r1, r7
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #14
	orr	r3, r3, r0, lsr #18
	lsl	r2, r0, #14
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #28
	orr	r3, r3, r0, lsr #4
	lsl	r2, r0, #28
	adds	r0, r0, r2
	adc	r1, r1, r3
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #3
	orr	r3, r3, r0, lsr #29
	lsl	r2, r0, #3
	mov	r0, r2
	mov	r1, r3
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L175+28
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L175
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #1
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L175+24
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L175+32
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #255
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #541065216
	ldr	r3, .L175+36
	and	r8, r0, r2
	and	r9, r1, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-92]
	adc	r3, r3, r1
	str	r3, [fp, #-88]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-88]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L175+24
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L175+16
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r5, fp, #100
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	b	.L176
.L177:
	.align	3
.L175:
	.word	269488128
	.word	1052688
	.word	269488144
	.word	269488144
	.word	541097984
	.word	33818640
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	FLIPPED_4_H
	.word	264208
.L176:
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-108]
	adc	r3, r3, r1
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-104]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-44]
	ldr	r2, .L175+32
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #541065216
	ldr	r3, .L175+36
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L178
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r5, fp, #124
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-132]
	adc	r3, r3, r1
	str	r3, [fp, #-128]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-128]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L178+16
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L178+8
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-140]
	and	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r5, fp, #140
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-148]
	adc	r3, r3, r1
	str	r3, [fp, #-144]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-144]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-40]
	ldr	r2, .L178+20
	ldr	r3, [fp, #-40]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adr	r1, .L178
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-156]
	and	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L179:
	.align	3
.L178:
	.word	134480384
	.word	4202512
	.word	134480385
	.word	-2143281136
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.size	flip_E5, .-flip_E5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F5, %function
flip_F5:
	@ args = 0, pretend = 0, frame = 128
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #128
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L182
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	ldr	r3, .L182+32
	mul	r2, r3, r5
	ldr	r3, .L182+36
	mul	r3, r4, r3
	add	r2, r2, r3
	ldr	r3, .L182+32
	umull	r0, r1, r4, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L182+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L182+8
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	ldr	r3, .L182+32
	mul	r2, r3, r7
	ldr	r3, .L182+36
	mul	r3, r6, r3
	add	r2, r2, r3
	ldr	r3, .L182+32
	umull	r0, r1, r6, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L182+44
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L182
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L182+16
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	mov	r2, r8
	mov	r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #18
	orr	r1, r1, r2, lsr #14
	lsl	r0, r2, #18
	adds	r2, r2, r0
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r8
	adc	r3, r3, r9
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #6
	orr	r1, r1, r2, lsr #26
	lsl	r0, r2, #6
	mov	r2, r0
	mov	r3, r1
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	ldr	r3, .L182+48
	add	r3, r3, r0
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #2
	orr	r0, r0, r3, lsl #30
	lsr	r1, r3, #2
	adr	r3, .L182+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L182+52
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, r1
	mul	r2, r3, r2
	ldr	r3, .L182+56
	mov	lr, r0
	mul	lr, r3, lr
	mov	r3, lr
	add	r2, r2, r3
	ldr	r3, .L182+52
	mov	lr, r0
	umull	r0, r1, lr, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-44]
	ldr	r2, .L182+60
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L182+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-140]
	orr	r3, r3, r1
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #1
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	ldr	r3, .L182+64
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	mov	r0, r3
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-40]
	ldr	r2, .L182+68
	ldr	r3, [fp, #-40]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #1
	mov	r0, #0
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-148]
	orr	r3, r3, r1
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	mov	r2, #1073741824
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #0
	mov	r3, #16384
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r2, fp, #100
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	b	.L183
.L184:
	.align	3
.L182:
	.word	268960768
	.word	2105376
	.word	268960770
	.word	538976288
	.word	538976256
	.word	528416
	.word	134744072
	.word	16909320
	.word	-2139028988
	.word	8421504
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	OUTFLANK_3
	.word	16843009
	.word	268960770
	.word	FLIPPED_3_U
	.word	OUTFLANK_5
	.word	FLIPPED_5
.L183:
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-116]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_F5, .-flip_F5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G5, %function
flip_G5:
	@ args = 0, pretend = 0, frame = 96
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #96
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L187
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	ldr	r3, .L187+32
	mul	r2, r3, r5
	ldr	r3, .L187+36
	mul	r3, r4, r3
	add	r2, r2, r3
	ldr	r3, .L187+32
	umull	r0, r1, r4, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L187+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L187+8
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	ldr	r3, .L187+32
	mul	r2, r3, r9
	ldr	r3, .L187+36
	mul	r3, r8, r3
	add	r2, r2, r3
	ldr	r3, .L187+32
	umull	r0, r1, r8, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L187+44
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L187
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L187+16
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r6
	adc	r3, r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #18
	orr	r1, r1, r2, lsr #14
	lsl	r0, r2, #18
	adds	r2, r2, r0
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r6
	adc	r3, r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r6
	adc	r3, r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #5
	orr	r1, r1, r2, lsr #27
	lsl	r0, r2, #5
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L187+48
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #3
	orr	r0, r0, r3, lsl #29
	lsr	r1, r3, #3
	adr	r3, .L187+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L187+52
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, r1
	mul	r2, r3, r2
	ldr	r3, .L187+56
	mov	lr, r0
	mul	lr, r3, lr
	mov	r3, lr
	add	r2, r2, r3
	ldr	r3, .L187+52
	mov	lr, r0
	umull	r0, r1, lr, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-44]
	ldr	r2, .L187+60
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adr	r1, .L187+16
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-84]
	and	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-116]
	orr	r3, r3, r1
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r2, r1
	mov	r3, #0
	mov	r0, #62
	mov	r1, #0
	and	ip, r2, r0
	str	ip, [fp, #-92]
	and	r3, r3, r1
	str	r3, [fp, #-88]
	ldr	r3, .L187+64
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r0, #31
	orr	r2, r2, r1, lsl #1
	lsr	r3, r1, #31
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-40]
	rsb	r3, r3, #0
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	mov	r3, r0
	mov	r2, #0
	mov	r0, #0
	mov	r1, #62
	and	ip, r2, r0
	str	ip, [fp, #-100]
	and	r3, r3, r1
	str	r3, [fp, #-96]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-124]
	orr	r3, r3, r1
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L188:
	.align	3
.L187:
	.word	537921536
	.word	4210752
	.word	537921540
	.word	1077952576
	.word	1077952512
	.word	1056832
	.word	134744072
	.word	16909320
	.word	1077969154
	.word	4210752
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	OUTFLANK_3
	.word	16843009
	.word	268960770
	.word	FLIPPED_3_U
	.word	OUTFLANK_7
	.size	flip_G5, .-flip_G5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H5, %function
flip_H5:
	@ args = 0, pretend = 0, frame = 96
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #96
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L191
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	ldr	r3, .L191+32
	mul	r2, r3, r5
	ldr	r3, .L191+36
	mul	r3, r4, r3
	add	r2, r2, r3
	ldr	r3, .L191+32
	umull	r0, r1, r4, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L191+40
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L191+8
	ldmia	r3, {r2-r3}
	and	r8, r0, r2
	and	r9, r1, r3
	ldr	r3, .L191+32
	mul	r2, r3, r9
	ldr	r3, .L191+36
	mul	r3, r8, r3
	add	r2, r2, r3
	ldr	r3, .L191+32
	umull	r0, r1, r8, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L191+44
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	adr	r3, .L191
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L191+16
	ldmia	r3, {r2-r3}
	and	r6, r0, r2
	and	r7, r1, r3
	mov	r2, r6
	mov	r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r6
	adc	r3, r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #18
	orr	r1, r1, r2, lsr #14
	lsl	r0, r2, #18
	adds	r2, r2, r0
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r6
	adc	r3, r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	adds	r2, r2, r6
	adc	r3, r3, r7
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #4
	orr	r1, r1, r2, lsr #28
	lsl	r0, r2, #4
	mov	r2, r0
	mov	r3, r1
	mov	r0, r2
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L191+48
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #4
	orr	r0, r0, r3, lsl #28
	lsr	r1, r3, #4
	adr	r3, .L191+24
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L191+52
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, r1
	mul	r2, r3, r2
	ldr	r3, .L191+56
	mov	lr, r0
	mul	lr, r3, lr
	mov	r3, lr
	add	r2, r2, r3
	ldr	r3, .L191+52
	mov	lr, r0
	umull	r0, r1, lr, r3
	add	r3, r2, r1
	mov	r1, r3
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-44]
	ldr	r2, .L191+60
	ldr	r3, [fp, #-44]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adr	r1, .L191+16
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-84]
	and	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-116]
	orr	r3, r3, r1
	str	r3, [fp, #-112]
	sub	r4, fp, #116
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsr	r2, r1, #1
	mov	r3, #0
	mov	r0, #63
	mov	r1, #0
	and	ip, r2, r0
	str	ip, [fp, #-92]
	and	r3, r3, r1
	str	r3, [fp, #-88]
	ldr	r3, .L191+64
	ldr	r2, [fp, #-92]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	mov	r2, r1
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-40]
	ldr	r3, [fp, #-40]
	rsb	r3, r3, #0
	mov	r0, r3
	mov	r1, #0
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r0, #1
	mov	r2, #0
	mov	r0, #0
	mov	r1, #126
	and	ip, r2, r0
	str	ip, [fp, #-100]
	and	r3, r3, r1
	str	r3, [fp, #-96]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-124]
	orr	r3, r3, r1
	str	r3, [fp, #-120]
	sub	r4, fp, #124
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L192:
	.align	3
.L191:
	.word	1075843072
	.word	8421504
	.word	1075843080
	.word	-2139062144
	.word	-2139062272
	.word	2113664
	.word	134744072
	.word	16909320
	.word	538984577
	.word	2105376
	.word	OUTFLANK_4
	.word	FLIPPED_4_V
	.word	OUTFLANK_3
	.word	16843009
	.word	268960770
	.word	FLIPPED_3_U
	.word	OUTFLANK_7
	.size	flip_H5, .-flip_H5
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A6, %function
flip_A6:
	@ args = 0, pretend = 0, frame = 216
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #216
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L199
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L199+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L194
	clz	r3, r7
	b	.L195
.L194:
	clz	r3, r6
	add	r3, r3, #32
.L195:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-180]
	and	r3, r3, r9
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L199
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #32256
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #512
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-116]
	sbc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #32256
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	ldr	r2, .L199+24
	mov	r3, #2
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	adr	r3, .L199+16
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L196
	mov	r3, r4
	clz	r3, r3
	b	.L197
.L200:
	.align	3
.L199:
	.word	16843008
	.word	1
	.word	16843009
	.word	1
	.word	67637280
	.word	2
	.word	67637248
.L196:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L197:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-220]
	and	r1, r1, r3
	str	r1, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-228]
	adc	r3, r3, r3
	str	r3, [fp, #-224]
	sub	r3, fp, #228
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L199+24
	mov	r3, #2
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #65536
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #0
	mov	r3, #131072
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-244]
	orr	r3, r3, r1
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_A6, .-flip_A6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B6, %function
flip_B6:
	@ args = 0, pretend = 0, frame = 216
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #216
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L207
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L207+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L202
	clz	r3, r7
	b	.L203
.L202:
	clz	r3, r6
	add	r3, r3, #32
.L203:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-180]
	and	r3, r3, r9
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L207
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #31744
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #1024
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-116]
	sbc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #31744
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	ldr	r2, .L207+20
	mov	r3, #4
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	ldr	r2, .L207+16
	mov	r3, #4
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L204
	mov	r3, r4
	clz	r3, r3
	b	.L205
.L208:
	.align	3
.L207:
	.word	33686016
	.word	2
	.word	33686018
	.word	2
	.word	135274560
	.word	135274496
.L204:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L205:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-220]
	and	r1, r1, r3
	str	r1, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-228]
	adc	r3, r3, r3
	str	r3, [fp, #-224]
	sub	r3, fp, #228
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L207+20
	mov	r3, #4
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #131072
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #0
	mov	r3, #262144
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-244]
	orr	r3, r3, r1
	str	r3, [fp, #-240]
	sub	r4, fp, #244
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_B6, .-flip_B6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C6, %function
flip_C6:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #208
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L215
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L215+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L210
	clz	r3, r7
	b	.L211
.L210:
	clz	r3, r6
	add	r3, r3, #32
.L211:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-180]
	and	r3, r3, r9
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L215
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #9
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L215+24
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #8
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L215+28
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #9
	mov	r0, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	ldr	r2, .L215+32
	mov	r3, #8
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	adr	r3, .L215+16
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L212
	mov	r3, r4
	clz	r3, r3
	b	.L213
.L216:
	.align	3
.L215:
	.word	67372032
	.word	4
	.word	67372036
	.word	4
	.word	270549120
	.word	8
	.word	OUTFLANK_2
	.word	FLIPPED_2
	.word	270548992
	.word	524290
.L212:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L213:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-212]
	and	r1, r1, r3
	str	r1, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-220]
	adc	r3, r3, r3
	str	r3, [fp, #-216]
	sub	r3, fp, #220
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L215+32
	mov	r3, #8
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #262144
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r2, #0
	mov	r3, #131072
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r2, fp, #124
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-140]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r4, #0
	mov	r5, #0
	lsr	r4, r2, #9
	orr	r4, r4, r3, lsl #23
	lsr	r5, r3, #9
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #9
	orr	r1, r1, r2, lsr #23
	lsl	r0, r2, #9
	orr	r3, r4, r0
	str	r3, [fp, #-148]
	orr	r3, r5, r1
	str	r3, [fp, #-144]
	mov	r2, #0
	ldr	r3, .L215+36
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r2, fp, #140
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_C6, .-flip_C6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D6, %function
flip_D6:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #192
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L221
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L221+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L218
	clz	r3, r7
	b	.L219
.L222:
	.align	3
.L221:
	.word	134744064
	.word	8
	.word	134744072
	.word	8
.L218:
	clz	r3, r6
	add	r3, r3, #32
.L219:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-180]
	and	r3, r3, r9
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L223
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #9
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L223+8
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #8
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L223+12
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #65280
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #574619648
	mov	r3, #20
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-100]
	adc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-96]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L223+8
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	ldr	r2, .L223+16
	mov	r3, #20
	and	lr, r0, r2
	str	lr, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r5, fp, #108
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-116]
	adc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-112]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L223+12
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #574619648
	mov	r3, #20
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #524288
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #0
	mov	r3, #1048576
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r2, fp, #132
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-148]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	b	.L224
.L225:
	.align	3
.L223:
	.word	134744064
	.word	8
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
	.word	574717952
.L224:
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r2, #0
	mov	r3, #262144
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_D6, .-flip_D6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E6, %function
flip_E6:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #192
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L230
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L230+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L227
	clz	r3, r7
	b	.L228
.L231:
	.align	3
.L230:
	.word	269488128
	.word	16
	.word	269488144
	.word	16
.L227:
	clz	r3, r6
	add	r3, r3, #32
.L228:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-180]
	and	r3, r3, r9
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L232
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #9
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L232+16
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #8
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L232+20
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #65280
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	ldr	r2, .L232+24
	mov	r3, #40
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-100]
	adc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-96]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L232+16
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	adr	r3, .L232+8
	ldmia	r3, {r2-r3}
	and	lr, r0, r2
	str	lr, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r5, fp, #108
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-116]
	adc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-112]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L232+20
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	ldr	r2, .L232+24
	mov	r3, #40
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #1048576
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #0
	mov	r3, #2097152
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r2, fp, #132
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-148]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	b	.L233
.L234:
	.align	3
.L232:
	.word	269488128
	.word	16
	.word	1149370624
	.word	40
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.word	1140981760
.L233:
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r2, #0
	mov	r3, #524288
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r2, fp, #148
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
	.size	flip_E6, .-flip_E6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F6, %function
flip_F6:
	@ args = 0, pretend = 0, frame = 208
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #208
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L241
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L241+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L236
	clz	r3, r7
	b	.L237
.L236:
	clz	r3, r6
	add	r3, r3, #32
.L237:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-180]
	and	r3, r3, r9
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L241
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-196]
	and	r3, r1, r3
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #9
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L241+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #8
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L241+36
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #9
	mov	r0, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L241+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	adr	r3, .L241+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L238
	mov	r3, r4
	clz	r3, r3
	b	.L239
.L242:
	.align	3
.L241:
	.word	538976256
	.word	32
	.word	538976288
	.word	32
	.word	134480384
	.word	16
	.word	134480385
	.word	16
	.word	OUTFLANK_5
	.word	FLIPPED_5
.L238:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L239:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-212]
	and	r1, r1, r3
	str	r1, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-220]
	adc	r3, r3, r3
	str	r3, [fp, #-216]
	sub	r3, fp, #220
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L243
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-228]
	orr	r3, r3, r1
	str	r3, [fp, #-224]
	sub	r4, fp, #228
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #2097152
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #9
	orr	r0, r0, r3, lsl #23
	lsr	r1, r3, #9
	mov	r2, #0
	mov	r3, #4194304
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r2, fp, #124
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-140]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r4, #0
	mov	r5, #0
	lsr	r4, r2, #7
	orr	r4, r4, r3, lsl #25
	lsr	r5, r3, #7
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	orr	r3, r4, r0
	str	r3, [fp, #-148]
	orr	r3, r5, r1
	str	r3, [fp, #-144]
	mov	r2, #0
	ldr	r3, .L243+8
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r2, fp, #140
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-164]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-160]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #164
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-236]
	orr	r3, r3, r1
	str	r3, [fp, #-232]
	sub	r4, fp, #236
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L244:
	.align	3
.L243:
	.word	134480384
	.word	16
	.word	1048640
	.size	flip_F6, .-flip_F6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G6, %function
flip_G6:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #192
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L251
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L251+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L246
	clz	r3, r7
	b	.L247
.L246:
	clz	r3, r6
	add	r3, r3, #32
.L247:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-164]
	and	r3, r3, r9
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-172]
	adc	r3, r3, r3
	str	r3, [fp, #-168]
	sub	r3, fp, #172
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L251
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-180]
	and	r3, r1, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #8
	mov	r1, #0
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L251+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #7
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	mov	r2, r3
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #8
	mov	r0, #0
	mov	r2, #0
	mov	r3, #15872
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L251+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	adr	r3, .L251+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L248
	mov	r3, r4
	clz	r3, r3
	b	.L249
.L252:
	.align	3
.L251:
	.word	1077952512
	.word	64
	.word	1077952576
	.word	64
	.word	268960768
	.word	32
	.word	268960770
	.word	32
	.word	OUTFLANK_7
.L248:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L249:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-196]
	and	r1, r1, r3
	str	r1, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-204]
	adc	r3, r3, r3
	str	r3, [fp, #-200]
	sub	r3, fp, #204
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L253
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #4194304
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r2, #0
	mov	r3, #2097152
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r2, fp, #132
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-148]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L254:
	.align	3
.L253:
	.word	268960768
	.word	32
	.size	flip_G6, .-flip_G6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H6, %function
flip_H6:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #192
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L261
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L261+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L256
	clz	r3, r7
	b	.L257
.L256:
	clz	r3, r6
	add	r3, r3, #32
.L257:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-164]
	and	r3, r3, r9
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-172]
	adc	r3, r3, r3
	str	r3, [fp, #-168]
	sub	r3, fp, #172
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L261
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-180]
	and	r3, r1, r3
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #9
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L261+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #8
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	mov	r2, r3
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #9
	mov	r0, #0
	mov	r2, #0
	mov	r3, #32256
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L261+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	adr	r3, .L261+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L258
	mov	r3, r4
	clz	r3, r3
	b	.L259
.L262:
	.align	3
.L261:
	.word	-2139062272
	.word	128
	.word	-2139062144
	.word	128
	.word	537921536
	.word	64
	.word	537921540
	.word	64
	.word	OUTFLANK_7
.L258:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L259:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-196]
	and	r1, r1, r3
	str	r1, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-204]
	adc	r3, r3, r3
	str	r3, [fp, #-200]
	sub	r3, fp, #204
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L263
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-212]
	orr	r3, r3, r1
	str	r3, [fp, #-208]
	sub	r4, fp, #212
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	mov	r2, #0
	mov	r3, #8388608
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #7
	orr	r0, r0, r3, lsl #25
	lsr	r1, r3, #7
	mov	r2, #0
	mov	r3, #4194304
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r2, fp, #132
	ldmia	r2, {r1-r2}
	mov	r0, r1
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	mov	ip, r3
	orr	r0, r0, ip
	str	r0, [fp, #-148]
	mov	r3, r4
	orr	r3, r2, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L264:
	.align	3
.L263:
	.word	537921536
	.word	64
	.size	flip_H6, .-flip_H6
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A7, %function
flip_A7:
	@ args = 0, pretend = 0, frame = 176
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #176
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L271
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L271+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L266
	clz	r3, r7
	b	.L267
.L266:
	clz	r3, r6
	add	r3, r3, #32
.L267:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-148]
	and	r3, r3, r9
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-156]
	adc	r3, r3, r3
	str	r3, [fp, #-152]
	sub	r3, fp, #156
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L271
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #8257536
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #131072
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-116]
	sbc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #8257536
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	ldr	r2, .L271+16
	mov	r3, #516
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	ldr	r2, .L271+20
	mov	r3, #516
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L268
	mov	r3, r4
	clz	r3, r3
	b	.L269
.L268:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L269:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-196]
	adc	r3, r3, r3
	str	r3, [fp, #-192]
	sub	r3, fp, #196
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	ldr	r2, .L271+16
	mov	r3, #516
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L272:
	.align	3
.L271:
	.word	16843008
	.word	257
	.word	16843009
	.word	257
	.word	135274496
	.word	135274560
	.size	flip_A7, .-flip_A7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B7, %function
flip_B7:
	@ args = 0, pretend = 0, frame = 176
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #176
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L279
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L279+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L274
	clz	r3, r7
	b	.L275
.L274:
	clz	r3, r6
	add	r3, r3, #32
.L275:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-148]
	and	r3, r3, r9
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-156]
	adc	r3, r3, r3
	str	r3, [fp, #-152]
	sub	r3, fp, #156
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L279
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #8126464
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #262144
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-116]
	sbc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #8126464
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L279+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	adr	r3, .L279+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L276
	mov	r3, r4
	clz	r3, r3
	b	.L277
.L276:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L277:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-196]
	adc	r3, r3, r3
	str	r3, [fp, #-192]
	sub	r3, fp, #196
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L279+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L280:
	.align	3
.L279:
	.word	33686016
	.word	514
	.word	33686018
	.word	514
	.word	270548992
	.word	1032
	.word	270549120
	.word	1032
	.size	flip_B7, .-flip_B7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C7, %function
flip_C7:
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #168
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L287
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L287+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L282
	clz	r3, r7
	b	.L283
.L282:
	clz	r3, r6
	add	r3, r3, #32
.L283:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-140]
	and	r3, r3, r9
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-148]
	adc	r3, r3, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #148
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L287
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #17
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L287+16
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #16
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L287+20
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #17
	mov	r0, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #541065216
	mov	r3, #2064
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	ldr	r2, .L287+24
	mov	r3, #2064
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L284
	mov	r3, r4
	clz	r3, r3
	b	.L285
.L284:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L285:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-180]
	adc	r3, r3, r3
	str	r3, [fp, #-176]
	sub	r3, fp, #180
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	mov	r2, #541065216
	mov	r3, #2064
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-188]
	orr	r3, r3, r1
	str	r3, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #9
	orr	r3, r3, r0, lsr #23
	lsl	r2, r0, #9
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-124]
	and	r3, r3, r1
	str	r3, [fp, #-120]
	mov	r2, #0
	mov	r3, #512
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L288:
	.align	3
.L287:
	.word	67372032
	.word	1028
	.word	67372036
	.word	1028
	.word	OUTFLANK_2
	.word	FLIPPED_2
	.word	541097984
	.size	flip_C7, .-flip_C7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D7, %function
flip_D7:
	@ args = 0, pretend = 0, frame = 136
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #136
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L293
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L293+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L290
	clz	r3, r7
	b	.L291
.L294:
	.align	3
.L293:
	.word	134744064
	.word	2056
	.word	134744072
	.word	2056
.L290:
	clz	r3, r6
	add	r3, r3, #32
.L291:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L295
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #17
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L295+16
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #16
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L295+20
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #16711680
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #1073741824
	ldr	r3, .L295+24
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-100]
	adc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-96]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L295+16
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L295+8
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-108]
	and	r3, r3, r1
	str	r3, [fp, #-104]
	sub	r5, fp, #108
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-116]
	adc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-112]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L295+20
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, #1073741824
	ldr	r1, .L295+24
	and	ip, r2, r0
	str	ip, [fp, #-124]
	and	r3, r3, r1
	str	r3, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L296:
	.align	3
.L295:
	.word	134744064
	.word	2056
	.word	1098907648
	.word	5154
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
	.word	5154
	.size	flip_D7, .-flip_D7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E7, %function
flip_E7:
	@ args = 0, pretend = 0, frame = 136
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #136
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L301
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L301+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L298
	clz	r3, r7
	b	.L299
.L302:
	.align	3
.L301:
	.word	269488128
	.word	4112
	.word	269488144
	.word	4112
.L298:
	clz	r3, r6
	add	r3, r3, #32
.L299:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L303
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #17
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L303+16
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #16
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L303+20
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #16711680
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #33554432
	ldr	r3, .L303+24
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-100]
	adc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-96]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L303+16
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L303+8
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-108]
	and	r3, r3, r1
	str	r3, [fp, #-104]
	sub	r5, fp, #108
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-116]
	adc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-112]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L303+20
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, #33554432
	ldr	r1, .L303+24
	and	ip, r2, r0
	str	ip, [fp, #-124]
	and	r3, r3, r1
	str	r3, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L304:
	.align	3
.L303:
	.word	269488128
	.word	4112
	.word	-2113863680
	.word	10308
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.word	10308
	.size	flip_E7, .-flip_E7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F7, %function
flip_F7:
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #168
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L311
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L311+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L306
	clz	r3, r7
	b	.L307
.L306:
	clz	r3, r6
	add	r3, r3, #32
.L307:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-140]
	and	r3, r3, r9
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-148]
	adc	r3, r3, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #148
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L311
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #17
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L311+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #16
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L311+36
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #17
	mov	r0, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #16384
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L311+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	adr	r3, .L311+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L308
	mov	r3, r4
	clz	r3, r3
	b	.L309
.L308:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L309:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L311+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L312:
	.align	3
.L311:
	.word	538976256
	.word	8224
	.word	538976288
	.word	8224
	.word	67239936
	.word	4104
	.word	67240192
	.word	4104
	.word	OUTFLANK_5
	.word	FLIPPED_5
	.size	flip_F7, .-flip_F7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G7, %function
flip_G7:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #152
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L319
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L319+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L314
	clz	r3, r7
	b	.L315
.L314:
	clz	r3, r6
	add	r3, r3, #32
.L315:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L319
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #16
	mov	r1, #0
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L319+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #15
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	mov	r2, r3
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #16
	mov	r0, #0
	mov	r2, #0
	mov	r3, #4063232
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L319+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	adr	r3, .L319+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L316
	mov	r3, r4
	clz	r3, r3
	b	.L317
.L316:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L317:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-172]
	adc	r3, r3, r3
	str	r3, [fp, #-168]
	sub	r3, fp, #172
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L319+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L320:
	.align	3
.L319:
	.word	1077952512
	.word	16448
	.word	1077952576
	.word	16448
	.word	134480384
	.word	8208
	.word	134480385
	.word	8208
	.word	OUTFLANK_7
	.size	flip_G7, .-flip_G7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H7, %function
flip_H7:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #152
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L327
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L327+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L322
	clz	r3, r7
	b	.L323
.L322:
	clz	r3, r6
	add	r3, r3, #32
.L323:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L327
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #17
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L327+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #16
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	mov	r2, r3
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #17
	mov	r0, #0
	mov	r2, #0
	mov	r3, #8257536
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L327+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	adr	r3, .L327+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L324
	mov	r3, r4
	clz	r3, r3
	b	.L325
.L324:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L325:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-172]
	adc	r3, r3, r3
	str	r3, [fp, #-168]
	sub	r3, fp, #172
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L327+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L328:
	.align	3
.L327:
	.word	-2139062272
	.word	32896
	.word	-2139062144
	.word	32896
	.word	268960768
	.word	16416
	.word	268960770
	.word	16416
	.word	OUTFLANK_7
	.size	flip_H7, .-flip_H7
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_A8, %function
flip_A8:
	@ args = 0, pretend = 0, frame = 176
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #176
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L335
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L335+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L330
	clz	r3, r7
	b	.L331
.L330:
	clz	r3, r6
	add	r3, r3, #32
.L331:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-148]
	and	r3, r3, r9
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r1, fp, #60
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-156]
	adc	r3, r3, r3
	str	r3, [fp, #-152]
	sub	r3, fp, #156
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L335
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #2113929216
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	sub	r4, fp, #100
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-108]
	mov	r3, r4
	adc	r3, r3, #33554432
	str	r3, [fp, #-104]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-172]
	and	r1, r1, r3
	str	r1, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-116]
	sbc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #2113929216
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L335+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	adr	r3, .L335+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L332
	mov	r3, r4
	clz	r3, r3
	b	.L333
.L332:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L333:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-196]
	adc	r3, r3, r3
	str	r3, [fp, #-192]
	sub	r3, fp, #196
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L335+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L336:
	.align	3
.L335:
	.word	16843008
	.word	65793
	.word	16843009
	.word	65793
	.word	270548992
	.word	132104
	.word	270549120
	.word	132104
	.size	flip_A8, .-flip_A8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_B8, %function
flip_B8:
	@ args = 0, pretend = 0, frame = 192
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #192
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L343
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L343+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L338
	clz	r3, r7
	b	.L339
.L338:
	clz	r3, r6
	add	r3, r3, #32
.L339:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-164]
	and	r3, r3, r9
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-60]
	str	r4, [fp, #-56]
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adds	r1, r2, r2
	str	r1, [fp, #-172]
	adc	r3, r3, r3
	str	r3, [fp, #-168]
	sub	r1, fp, #172
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #-2147483648
	subs	ip, r2, r0
	str	ip, [fp, #-100]
	sbc	r3, r3, r1
	str	r3, [fp, #-96]
	adr	r3, .L343
	ldmia	r3, {r2-r3}
	sub	r1, fp, #100
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #2080374784
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r4, fp, #108
	ldmia	r4, {r3-r4}
	mov	r2, r3
	adds	r2, r2, #0
	str	r2, [fp, #-116]
	mov	r3, r4
	adc	r3, r3, #67108864
	str	r3, [fp, #-112]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-188]
	and	r1, r1, r3
	str	r1, [fp, #-184]
	sub	r4, fp, #188
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r2, #8
	orr	r0, r0, r3, lsl #24
	lsr	r1, r3, #8
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	subs	ip, r2, r0
	str	ip, [fp, #-124]
	sbc	r3, r3, r1
	str	r3, [fp, #-120]
	mov	r2, #0
	mov	r3, #2080374784
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-132]
	and	r1, r1, r3
	str	r1, [fp, #-128]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #541065216
	ldr	r3, .L343+24
	and	ip, r0, r2
	str	ip, [fp, #-140]
	and	r3, r1, r3
	str	r3, [fp, #-136]
	adr	r3, .L343+16
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L340
	mov	r3, r4
	clz	r3, r3
	b	.L341
.L340:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L341:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-204]
	and	r1, r1, r3
	str	r1, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	r1, r2, r2
	str	r1, [fp, #-212]
	adc	r3, r3, r3
	str	r3, [fp, #-208]
	sub	r1, fp, #212
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #-2147483648
	subs	ip, r2, r0
	str	ip, [fp, #-148]
	sbc	r3, r3, r1
	str	r3, [fp, #-144]
	mov	r2, #541065216
	ldr	r3, .L343+24
	sub	r1, fp, #148
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-156]
	and	r1, r1, r3
	str	r1, [fp, #-152]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	sub	r1, fp, #156
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-220]
	orr	r3, r3, r1
	str	r3, [fp, #-216]
	sub	r4, fp, #220
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r3, fp, #52
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L344:
	.align	3
.L343:
	.word	33686016
	.word	131586
	.word	33686018
	.word	131586
	.word	541097984
	.word	264208
	.word	264208
	.size	flip_B8, .-flip_B8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_C8, %function
flip_C8:
	@ args = 0, pretend = 0, frame = 176
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #176
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L351
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L351+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L346
	clz	r3, r7
	b	.L347
.L346:
	clz	r3, r6
	add	r3, r3, #32
.L347:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-148]
	and	r3, r3, r9
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-156]
	adc	r3, r3, r3
	str	r3, [fp, #-152]
	sub	r3, fp, #156
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L351
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-164]
	and	r3, r1, r3
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L351+24
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L351+28
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #25
	mov	r0, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	mov	r2, #1073741824
	ldr	r3, .L351+32
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	adr	r3, .L351+16
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L348
	mov	r3, r4
	clz	r3, r3
	b	.L349
.L348:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L349:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r1, fp, #188
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #-2147483648
	subs	ip, r2, r0
	str	ip, [fp, #-116]
	sbc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #1073741824
	ldr	r3, .L351+32
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-124]
	and	r1, r1, r3
	str	r1, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	lsl	r3, r1, #9
	orr	r3, r3, r0, lsr #23
	lsl	r2, r0, #9
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-132]
	and	r3, r3, r1
	str	r3, [fp, #-128]
	mov	r2, #0
	mov	r3, #131072
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-140]
	and	r1, r1, r3
	str	r1, [fp, #-136]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #140
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-204]
	orr	r3, r3, r1
	str	r3, [fp, #-200]
	sub	r4, fp, #204
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L352:
	.align	3
.L351:
	.word	67372032
	.word	263172
	.word	67372036
	.word	263172
	.word	1082130432
	.word	528416
	.word	OUTFLANK_2
	.word	FLIPPED_2
	.word	528416
	.size	flip_C8, .-flip_C8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_D8, %function
flip_D8:
	@ args = 0, pretend = 0, frame = 136
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #136
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L357
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L357+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L354
	clz	r3, r7
	b	.L355
.L358:
	.align	3
.L357:
	.word	134744064
	.word	526344
	.word	134744072
	.word	526344
.L354:
	clz	r3, r6
	add	r3, r3, #32
.L355:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L359
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L359+16
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L359+20
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #-16777216
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	mov	r2, #0
	ldr	r3, .L359+24
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-100]
	adc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-96]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L359+16
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L359+8
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-108]
	and	r3, r3, r1
	str	r3, [fp, #-104]
	sub	r5, fp, #108
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-116]
	adc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-112]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L359+20
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	mov	r0, #0
	ldr	r1, .L359+24
	and	ip, r2, r0
	str	ip, [fp, #-124]
	and	r3, r3, r1
	str	r3, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L360:
	.align	3
.L359:
	.word	134744064
	.word	526344
	.word	-2147483648
	.word	1319489
	.word	OUTFLANK_3
	.word	FLIPPED_3_H
	.word	1319488
	.size	flip_D8, .-flip_D8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_E8, %function
flip_E8:
	@ args = 0, pretend = 0, frame = 136
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #136
	str	r0, [fp, #-60]
	str	r1, [fp, #-56]
	str	r2, [fp, #-68]
	str	r3, [fp, #-64]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L365
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L365+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L362
	clz	r3, r7
	b	.L363
.L366:
	.align	3
.L365:
	.word	269488128
	.word	1052688
	.word	269488144
	.word	1052688
.L362:
	clz	r3, r6
	add	r3, r3, #32
.L363:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #44
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L367
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-76]
	and	r3, r1, r3
	str	r3, [fp, #-72]
	ldr	r3, .L367+24
	ldr	r2, [fp, #-76]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-52]
	ldr	r2, .L367+28
	ldr	r3, [fp, #-52]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r0-r1}
	mov	r2, #0
	mov	r3, #-16777216
	and	ip, r0, r2
	str	ip, [fp, #-84]
	and	r3, r1, r3
	str	r3, [fp, #-80]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #68
	ldmia	r1, {r0-r1}
	adr	r3, .L367+8
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-92]
	and	r3, r1, r3
	str	r3, [fp, #-88]
	sub	r5, fp, #92
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	ip, r2, r0
	str	ip, [fp, #-100]
	adc	r3, r3, r1
	str	r3, [fp, #-96]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-96]
	lsr	r2, r1, #25
	mov	r3, #0
	ldr	r1, .L367+24
	add	r3, r1, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #60
	ldmia	r3, {r2-r3}
	adr	r1, .L367+16
	ldmia	r1, {r0-r1}
	and	lr, r2, r0
	str	lr, [fp, #-108]
	and	r3, r3, r1
	str	r3, [fp, #-104]
	sub	r5, fp, #108
	ldmia	r5, {r4-r5}
	mov	r2, r4
	mov	r3, r5
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #24
	orr	r1, r1, r2, lsr #8
	lsl	r0, r2, #24
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #8
	orr	r1, r1, r2, lsr #24
	lsl	r0, r2, #8
	mov	r2, r0
	mov	r3, r1
	mov	r1, r4
	adds	r2, r2, r1
	mov	r1, r5
	adc	r3, r3, r1
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #16
	orr	r1, r1, r2, lsr #16
	lsl	r0, r2, #16
	adds	lr, r2, r0
	str	lr, [fp, #-116]
	adc	r3, r3, r1
	str	r3, [fp, #-112]
	mov	r2, #0
	mov	r3, #0
	ldr	r1, [fp, #-112]
	lsr	r2, r1, #24
	mov	r3, #0
	mov	r3, r2
	and	r3, r3, ip
	str	r3, [fp, #-48]
	ldr	r2, .L367+28
	ldr	r3, [fp, #-48]
	lsl	r3, r3, #3
	add	r3, r2, r3
	ldmia	r3, {r2-r3}
	adr	r1, .L367+8
	ldmia	r1, {r0-r1}
	and	ip, r2, r0
	str	ip, [fp, #-124]
	and	r3, r3, r1
	str	r3, [fp, #-120]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r3, fp, #36
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L368:
	.align	3
.L367:
	.word	269488128
	.word	1052688
	.word	0
	.word	2638850
	.word	16777216
	.word	2638978
	.word	OUTFLANK_4
	.word	FLIPPED_4_H
	.size	flip_E8, .-flip_E8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_F8, %function
flip_F8:
	@ args = 0, pretend = 0, frame = 168
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #168
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L375
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L375+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L370
	clz	r3, r7
	b	.L371
.L370:
	clz	r3, r6
	add	r3, r3, #32
.L371:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-140]
	and	r3, r3, r9
	str	r3, [fp, #-136]
	sub	r4, fp, #140
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-148]
	adc	r3, r3, r3
	str	r3, [fp, #-144]
	sub	r3, fp, #148
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L375
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-156]
	and	r3, r1, r3
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L375+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r2, .L375+36
	ldr	r3, [fp, #-56]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	and	r2, r3, #255
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #25
	mov	r0, #0
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	orr	ip, r2, r0
	str	ip, [fp, #-164]
	orr	r3, r3, r1
	str	r3, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r3, #7
	orr	r1, r1, r2, lsr #25
	lsl	r0, r2, #7
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	mov	r2, #0
	mov	r3, #4194304
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, ip, r2
	str	ip, [fp, #-116]
	and	r1, r1, r3
	str	r1, [fp, #-112]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-172]
	orr	r3, r3, r1
	str	r3, [fp, #-168]
	sub	r4, fp, #172
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L375+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	adr	r3, .L375+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L372
	mov	r3, r4
	clz	r3, r3
	b	.L373
.L372:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L373:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-180]
	and	r1, r1, r3
	str	r1, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-188]
	adc	r3, r3, r3
	str	r3, [fp, #-184]
	sub	r3, fp, #188
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L375+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-132]
	and	r3, r1, r3
	str	r3, [fp, #-128]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #132
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-196]
	orr	r3, r3, r1
	str	r3, [fp, #-192]
	sub	r4, fp, #196
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L376:
	.align	3
.L375:
	.word	538976256
	.word	2105376
	.word	538976288
	.word	2105376
	.word	33554432
	.word	1050628
	.word	33619968
	.word	1050628
	.word	OUTFLANK_5
	.word	FLIPPED_5
	.size	flip_F8, .-flip_F8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_G8, %function
flip_G8:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #152
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L383
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L383+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L378
	clz	r3, r7
	b	.L379
.L378:
	clz	r3, r6
	add	r3, r3, #32
.L379:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L383
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r2, #62
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L383+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #23
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	mov	r2, r3
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #24
	mov	r0, #0
	mov	r2, #0
	mov	r3, #1040187392
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L383+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	adr	r3, .L383+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L380
	mov	r3, r4
	clz	r3, r3
	b	.L381
.L380:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L381:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-172]
	adc	r3, r3, r3
	str	r3, [fp, #-168]
	sub	r3, fp, #172
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L383+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L384:
	.align	3
.L383:
	.word	1077952512
	.word	4210752
	.word	1077952576
	.word	4210752
	.word	67239936
	.word	2101256
	.word	67240192
	.word	2101256
	.word	OUTFLANK_7
	.size	flip_G8, .-flip_G8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_H8, %function
flip_H8:
	@ args = 0, pretend = 0, frame = 152
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, r5, r6, r7, r8, r9, fp, lr}
	add	fp, sp, #28
	sub	sp, sp, #152
	str	r0, [fp, #-68]
	str	r1, [fp, #-64]
	str	r2, [fp, #-76]
	str	r3, [fp, #-72]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L391
	ldmia	r3, {r2-r3}
	and	r4, r0, r2
	and	r5, r1, r3
	adr	r3, .L391+8
	ldmia	r3, {r2-r3}
	eor	r6, r4, r2
	eor	r7, r5, r3
	cmp	r7, #0
	beq	.L386
	clz	r3, r7
	b	.L387
.L386:
	clz	r3, r6
	add	r3, r3, #32
.L387:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	r8, r2, r1
	orr	r8, r8, r3, lsl ip
	orr	r8, r8, r3, lsr r0
	lsr	r9, r3, r1
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	and	r1, r2, r8
	str	r1, [fp, #-132]
	and	r3, r3, r9
	str	r3, [fp, #-128]
	sub	r4, fp, #132
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-52]
	str	r4, [fp, #-48]
	sub	r1, fp, #52
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-140]
	adc	r3, r3, r3
	str	r3, [fp, #-136]
	sub	r3, fp, #140
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L391
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-148]
	and	r3, r1, r3
	str	r3, [fp, #-144]
	sub	r4, fp, #148
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #76
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #25
	mov	r1, #0
	mov	r2, #63
	mov	r3, #0
	and	ip, r0, r2
	str	ip, [fp, #-100]
	and	r3, r1, r3
	str	r3, [fp, #-96]
	ldr	r3, .L391+32
	ldr	r2, [fp, #-100]
	add	r3, r3, r2
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	ip, r3
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	mov	r0, #0
	mov	r1, #0
	lsr	r0, r3, #24
	mov	r1, #0
	mov	r3, r0
	and	r3, r3, ip
	str	r3, [fp, #-56]
	ldr	r3, [fp, #-56]
	rsb	r3, r3, #0
	mov	r2, r3
	mov	r3, #0
	mov	r0, #0
	mov	r1, #0
	lsl	r1, r2, #25
	mov	r0, #0
	mov	r2, #0
	mov	r3, #2113929216
	and	ip, r0, r2
	str	ip, [fp, #-108]
	and	r3, r1, r3
	str	r3, [fp, #-104]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #108
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-156]
	orr	r3, r3, r1
	str	r3, [fp, #-152]
	sub	r4, fp, #156
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r1, fp, #76
	ldmia	r1, {r0-r1}
	adr	r3, .L391+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-116]
	and	r3, r1, r3
	str	r3, [fp, #-112]
	adr	r3, .L391+24
	ldmia	r3, {r2-r3}
	sub	r1, fp, #116
	ldmia	r1, {r0-r1}
	mov	ip, r0
	eor	ip, ip, r2
	str	ip, [fp, #-92]
	eor	r1, r1, r3
	str	r1, [fp, #-88]
	sub	r4, fp, #92
	ldmia	r4, {r3-r4}
	mov	r2, r4
	cmp	r2, #0
	beq	.L388
	mov	r3, r4
	clz	r3, r3
	b	.L389
.L388:
	ldr	r3, [fp, #-92]
	clz	r3, r3
	add	r3, r3, #32
.L389:
	mov	r1, r3
	mov	r2, #0
	mov	r3, #-2147483648
	rsb	ip, r1, #32
	sub	r0, r1, #32
	lsr	lr, r2, r1
	str	lr, [fp, #-84]
	ldr	lr, [fp, #-84]
	orr	ip, lr, r3, lsl ip
	str	ip, [fp, #-84]
	ldr	ip, [fp, #-84]
	orr	r0, ip, r3, lsr r0
	str	r0, [fp, #-84]
	lsr	r3, r3, r1
	str	r3, [fp, #-80]
	sub	r3, fp, #68
	ldmia	r3, {r2-r3}
	sub	r1, fp, #84
	ldmia	r1, {r0-r1}
	mov	ip, r0
	and	ip, r2, ip
	str	ip, [fp, #-164]
	and	r1, r1, r3
	str	r1, [fp, #-160]
	sub	r4, fp, #164
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-36]
	str	r4, [fp, #-32]
	sub	r1, fp, #36
	ldmia	r1, {r0-r1}
	mov	r2, #0
	mov	r3, #0
	subs	r2, r2, r0
	sbc	r3, r3, r1
	adds	r1, r2, r2
	str	r1, [fp, #-172]
	adc	r3, r3, r3
	str	r3, [fp, #-168]
	sub	r3, fp, #172
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	adr	r3, .L391+16
	ldmia	r3, {r2-r3}
	and	ip, r0, r2
	str	ip, [fp, #-124]
	and	r3, r1, r3
	str	r3, [fp, #-120]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	sub	r1, fp, #124
	ldmia	r1, {r0-r1}
	mov	ip, r0
	orr	ip, r2, ip
	str	ip, [fp, #-180]
	orr	r3, r3, r1
	str	r3, [fp, #-176]
	sub	r4, fp, #180
	ldmia	r4, {r3-r4}
	str	r3, [fp, #-44]
	str	r4, [fp, #-40]
	sub	r3, fp, #44
	ldmia	r3, {r2-r3}
	mov	r0, r2
	mov	r1, r3
	sub	sp, fp, #28
	@ sp needed
	pop	{r4, r5, r6, r7, r8, r9, fp, pc}
.L392:
	.align	3
.L391:
	.word	-2139062272
	.word	8421504
	.word	-2139062144
	.word	8421504
	.word	134480384
	.word	4202512
	.word	134480385
	.word	4202512
	.word	OUTFLANK_7
	.size	flip_H8, .-flip_H8
	.align	2
	.syntax unified
	.arm
	.fpu softvfp
	.type	flip_pass, %function
flip_pass:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-12]
	str	r1, [fp, #-8]
	str	r2, [fp, #-20]
	str	r3, [fp, #-16]
	mov	r2, #0
	mov	r3, #0
	mov	r0, r2
	mov	r1, r3
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	flip_pass, .-flip_pass
	.global	flip
	.data
	.align	2
	.type	flip, %object
	.size	flip, 264
flip:
	.word	flip_A1
	.word	flip_B1
	.word	flip_C1
	.word	flip_D1
	.word	flip_E1
	.word	flip_F1
	.word	flip_G1
	.word	flip_H1
	.word	flip_A2
	.word	flip_B2
	.word	flip_C2
	.word	flip_D2
	.word	flip_E2
	.word	flip_F2
	.word	flip_G2
	.word	flip_H2
	.word	flip_A3
	.word	flip_B3
	.word	flip_C3
	.word	flip_D3
	.word	flip_E3
	.word	flip_F3
	.word	flip_G3
	.word	flip_H3
	.word	flip_A4
	.word	flip_B4
	.word	flip_C4
	.word	flip_D4
	.word	flip_E4
	.word	flip_F4
	.word	flip_G4
	.word	flip_H4
	.word	flip_A5
	.word	flip_B5
	.word	flip_C5
	.word	flip_D5
	.word	flip_E5
	.word	flip_F5
	.word	flip_G5
	.word	flip_H5
	.word	flip_A6
	.word	flip_B6
	.word	flip_C6
	.word	flip_D6
	.word	flip_E6
	.word	flip_F6
	.word	flip_G6
	.word	flip_H6
	.word	flip_A7
	.word	flip_B7
	.word	flip_C7
	.word	flip_D7
	.word	flip_E7
	.word	flip_F7
	.word	flip_G7
	.word	flip_H7
	.word	flip_A8
	.word	flip_B8
	.word	flip_C8
	.word	flip_D8
	.word	flip_E8
	.word	flip_F8
	.word	flip_G8
	.word	flip_H8
	.word	flip_pass
	.word	flip_pass
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
