	.file	"435482.c"
	.intel_syntax noprefix
	.text
	.globl	IsBigEndian
	.type	IsBigEndian, @function
IsBigEndian:
.LFB0:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 16
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	DWORD PTR -12[rbp], 1
	lea	rax, -12[rbp]
	movzx	eax, BYTE PTR [rax]
	test	al, al
	sete	al
	movzx	eax, al
	mov	rdx, QWORD PTR -8[rbp]
	sub	rdx, QWORD PTR fs:40
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE0:
	.size	IsBigEndian, .-IsBigEndian
	.globl	m4096zero
	.type	m4096zero, @function
m4096zero:
.LFB1:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	mov	QWORD PTR -24[rbp], rdi
	mov	DWORD PTR -4[rbp], 0
	jmp	.L5
.L6:
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	mov	BYTE PTR [rdx+rax], 0
	add	DWORD PTR -4[rbp], 1
.L5:
	cmp	DWORD PTR -4[rbp], 4095
	jle	.L6
	nop
	nop
	pop	rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE1:
	.size	m4096zero, .-m4096zero
	.section	.rodata
.LC0:
	.string	"0x"
.LC1:
	.string	"%02X"
	.text
	.globl	m4096printhex
	.type	m4096printhex, @function
m4096printhex:
.LFB2:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 32
	mov	QWORD PTR -24[rbp], rdi
	lea	rdi, .LC0[rip]
	mov	eax, 0
	call	printf@PLT
	mov	DWORD PTR -4[rbp], 0
	jmp	.L8
.L9:
	mov	rdx, QWORD PTR -24[rbp]
	mov	eax, DWORD PTR -4[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	mov	esi, eax
	lea	rdi, .LC1[rip]
	mov	eax, 0
	call	printf@PLT
	add	DWORD PTR -4[rbp], 1
.L8:
	cmp	DWORD PTR -4[rbp], 4095
	jle	.L9
	nop
	nop
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2:
	.size	m4096printhex, .-m4096printhex
	.globl	m4096add
	.type	m4096add, @function
m4096add:
.LFB3:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 4096
	or	QWORD PTR [rsp], 0
	sub	rsp, 48
	mov	QWORD PTR -4136[rbp], rdi
	mov	QWORD PTR -4144[rbp], rsi
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	mov	eax, 0
	call	IsBigEndian
	mov	DWORD PTR -4120[rbp], eax
	lea	rax, -4114[rbp]
	mov	edx, 2
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	mov	BYTE PTR -4125[rbp], 0
	lea	rax, -4112[rbp]
	mov	rdi, rax
	call	m4096zero
	mov	DWORD PTR -4124[rbp], 4095
	jmp	.L11
.L14:
	mov	rdx, QWORD PTR -4136[rbp]
	mov	eax, DWORD PTR -4124[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	ecx, al
	mov	rdx, QWORD PTR -4144[rbp]
	mov	eax, DWORD PTR -4124[rbp]
	cdqe
	movzx	eax, BYTE PTR [rdx+rax]
	movzx	eax, al
	add	eax, ecx
	mov	WORD PTR -4114[rbp], ax
	cmp	DWORD PTR -4120[rbp], 0
	je	.L12
	movzx	eax, BYTE PTR -4113[rbp]
	mov	edx, eax
	movzx	eax, BYTE PTR -4125[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4124[rbp]
	cdqe
	mov	BYTE PTR -4112[rbp+rax], dl
	movzx	eax, BYTE PTR -4114[rbp]
	mov	BYTE PTR -4125[rbp], al
	jmp	.L13
.L12:
	movzx	eax, BYTE PTR -4114[rbp]
	mov	edx, eax
	movzx	eax, BYTE PTR -4125[rbp]
	add	edx, eax
	mov	eax, DWORD PTR -4124[rbp]
	cdqe
	mov	BYTE PTR -4112[rbp+rax], dl
	movzx	eax, BYTE PTR -4113[rbp]
	mov	BYTE PTR -4125[rbp], al
.L13:
	lea	rax, -4114[rbp]
	mov	edx, 2
	mov	esi, 0
	mov	rdi, rax
	call	memset@PLT
	sub	DWORD PTR -4124[rbp], 1
.L11:
	cmp	DWORD PTR -4124[rbp], 0
	jns	.L14
	cmp	BYTE PTR -4125[rbp], 0
	jne	.L15
	mov	rax, QWORD PTR -4136[rbp]
	mov	rdx, rax
	lea	rax, -4112[rbp]
	mov	ecx, 4096
	mov	rsi, QWORD PTR [rax]
	mov	QWORD PTR [rdx], rsi
	mov	esi, ecx
	add	rsi, rdx
	lea	rdi, 8[rsi]
	mov	esi, ecx
	add	rsi, rax
	add	rsi, 8
	mov	rsi, QWORD PTR -16[rsi]
	mov	QWORD PTR -16[rdi], rsi
	lea	rdi, 8[rdx]
	and	rdi, -8
	sub	rdx, rdi
	sub	rax, rdx
	add	ecx, edx
	and	ecx, -8
	shr	ecx, 3
	mov	edx, ecx
	mov	edx, edx
	mov	rsi, rax
	mov	rcx, rdx
	rep movsq
	jmp	.L18
.L15:
	mov	rax, QWORD PTR -4136[rbp]
	mov	rdi, rax
	call	m4096zero
.L18:
	nop
	mov	rax, QWORD PTR -8[rbp]
	sub	rax, QWORD PTR fs:40
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3:
	.size	m4096add, .-m4096add
	.globl	main
	.type	main, @function
main:
.LFB4:
	.cfi_startproc
	endbr64
	push	rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	mov	rbp, rsp
	.cfi_def_cfa_register 6
	sub	rsp, 4096
	or	QWORD PTR [rsp], 0
	sub	rsp, 4096
	or	QWORD PTR [rsp], 0
	sub	rsp, 16
	mov	rax, QWORD PTR fs:40
	mov	QWORD PTR -8[rbp], rax
	xor	eax, eax
	lea	rax, -8208[rbp]
	mov	rdi, rax
	call	m4096zero
	lea	rax, -4112[rbp]
	mov	rdi, rax
	call	m4096zero
	mov	BYTE PTR -4113[rbp], -6
	mov	BYTE PTR -17[rbp], 1
	lea	rdx, -4112[rbp]
	lea	rax, -8208[rbp]
	mov	rsi, rdx
	mov	rdi, rax
	call	m4096add
	lea	rax, -8208[rbp]
	mov	rdi, rax
	call	m4096printhex
	mov	eax, 0
	mov	rcx, QWORD PTR -8[rbp]
	sub	rcx, QWORD PTR fs:40
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4:
	.size	main, .-main
	.ident	"GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	 1f - 0f
	.long	 4f - 1f
	.long	 5
0:
	.string	 "GNU"
1:
	.align 8
	.long	 0xc0000002
	.long	 3f - 2f
2:
	.long	 0x3
3:
	.align 8
4:

	.arch armv5t
	.eabi_attribute 20, 1
	.eabi_attribute 21, 1
	.eabi_attribute 23, 3
	.eabi_attribute 24, 1
	.eabi_attribute 25, 1
	.eabi_attribute 26, 2
	.eabi_attribute 30, 6
	.eabi_attribute 34, 0
	.eabi_attribute 18, 4
	.file	"435482.c"
	.text
	.section	.rodata
	.align	2
.LC0:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	IsBigEndian
	.syntax unified
	.arm
	.fpu softvfp
	.type	IsBigEndian, %function
IsBigEndian:
	@ args = 0, pretend = 0, frame = 8
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8
	ldr	r3, .L4
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	mov	r3, #1
	str	r3, [fp, #-12]
	sub	r3, fp, #12
	ldrb	r3, [r3]	@ zero_extendqisi2
	cmp	r3, #0
	moveq	r3, #1
	movne	r3, #0
	and	r3, r3, #255
	ldr	r2, .L4
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L3
	bl	__stack_chk_fail
.L3:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L5:
	.align	2
.L4:
	.word	.LC0
	.size	IsBigEndian, .-IsBigEndian
	.align	2
	.global	m4096zero
	.syntax unified
	.arm
	.fpu softvfp
	.type	m4096zero, %function
m4096zero:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	@ link register save eliminated.
	str	fp, [sp, #-4]!
	add	fp, sp, #0
	sub	sp, sp, #20
	str	r0, [fp, #-16]
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L7
.L8:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	mov	r2, #0
	strb	r2, [r3]
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L7:
	ldr	r3, [fp, #-8]
	cmp	r3, #4096
	blt	.L8
	nop
	nop
	add	sp, fp, #0
	@ sp needed
	ldr	fp, [sp], #4
	bx	lr
	.size	m4096zero, .-m4096zero
	.section	.rodata
	.align	2
.LC1:
	.ascii	"0x\000"
	.align	2
.LC2:
	.ascii	"%02X\000"
	.text
	.align	2
	.global	m4096printhex
	.syntax unified
	.arm
	.fpu softvfp
	.type	m4096printhex, %function
m4096printhex:
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #16
	str	r0, [fp, #-16]
	ldr	r0, .L12
	bl	printf
	mov	r3, #0
	str	r3, [fp, #-8]
	b	.L10
.L11:
	ldr	r2, [fp, #-16]
	ldr	r3, [fp, #-8]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	mov	r1, r3
	ldr	r0, .L12+4
	bl	printf
	ldr	r3, [fp, #-8]
	add	r3, r3, #1
	str	r3, [fp, #-8]
.L10:
	ldr	r3, [fp, #-8]
	cmp	r3, #4096
	blt	.L11
	nop
	nop
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L13:
	.align	2
.L12:
	.word	.LC1
	.word	.LC2
	.size	m4096printhex, .-m4096printhex
	.section	.rodata
	.align	2
.LC3:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	m4096add
	.syntax unified
	.arm
	.fpu softvfp
	.type	m4096add, %function
m4096add:
	@ args = 0, pretend = 0, frame = 4128
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{r4, fp, lr}
	add	fp, sp, #8
	sub	sp, sp, #4096
	sub	sp, sp, #36
	sub	r3, fp, #4096
	sub	r3, r3, #12
	str	r0, [r3, #-28]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	str	r1, [r3, #-32]
	ldr	r3, .L23
	ldr	r3, [r3]
	str	r3, [fp, #-16]
	mov	r3,#0
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r4, r3
	bl	IsBigEndian
	str	r0, [r4, #-12]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	sub	r3, r3, #8
	mov	r2, #2
	mov	r1, #0
	mov	r0, r3
	bl	memset
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, #0
	strb	r2, [r3, #-17]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	sub	r3, r3, #4
	mov	r0, r3
	bl	m4096zero
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	ldr	r3, .L23+4
	str	r3, [r2, #-16]
	b	.L15
.L18:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-28]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-16]
	add	r3, r2, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r2, r3, #16
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r1, [r3, #-32]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-16]
	add	r3, r1, r3
	ldrb	r3, [r3]	@ zero_extendqisi2
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	add	r3, r2, r3
	lsl	r3, r3, #16
	lsr	r3, r3, #16
	sub	r2, fp, #4096
	sub	r2, r2, #12
	strh	r3, [r2, #-8]	@ movhi
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-12]
	cmp	r3, #0
	beq	.L16
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldrb	r2, [r3, #-7]	@ zero_extendqisi2
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldrb	r3, [r3, #-17]
	add	r3, r2, r3
	and	r2, r3, #255
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-16]
	add	r3, r1, r3
	sub	r3, r3, #4
	strb	r2, [r3]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldrb	r3, [r3, #-8]
	strb	r3, [r2, #-17]
	b	.L17
.L16:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldrb	r2, [r3, #-8]	@ zero_extendqisi2
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldrb	r3, [r3, #-17]
	add	r3, r2, r3
	and	r2, r3, #255
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r1, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-16]
	add	r3, r1, r3
	sub	r3, r3, #4
	strb	r2, [r3]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldrb	r3, [r3, #-7]
	strb	r3, [r2, #-17]
.L17:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	sub	r3, r3, #8
	mov	r2, #2
	mov	r1, #0
	mov	r0, r3
	bl	memset
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r2, r3
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-16]
	sub	r3, r3, #1
	str	r3, [r2, #-16]
.L15:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r3, [r3, #-16]
	cmp	r3, #0
	bge	.L18
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldrb	r3, [r3, #-17]	@ zero_extendqisi2
	cmp	r3, #0
	bne	.L19
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r2, [r3, #-28]
	sub	r3, fp, #4096
	sub	r3, r3, #12
	mov	r0, r2
	sub	r3, r3, #4
	mov	r2, #4096
	mov	r1, r3
	bl	memcpy
	b	.L22
.L19:
	sub	r3, fp, #4096
	sub	r3, r3, #12
	ldr	r0, [r3, #-28]
	bl	m4096zero
.L22:
	nop
	ldr	r3, .L23
	ldr	r2, [r3]
	ldr	r3, [fp, #-16]
	eors	r2, r3, r2
	mov	r3, #0
	beq	.L21
	bl	__stack_chk_fail
.L21:
	sub	sp, fp, #8
	@ sp needed
	pop	{r4, fp, pc}
.L24:
	.align	2
.L23:
	.word	.LC3
	.word	4095
	.size	m4096add, .-m4096add
	.section	.rodata
	.align	2
.LC4:
	.word	__stack_chk_guard
	.text
	.align	2
	.global	main
	.syntax unified
	.arm
	.fpu softvfp
	.type	main, %function
main:
	@ args = 0, pretend = 0, frame = 8200
	@ frame_needed = 1, uses_anonymous_args = 0
	push	{fp, lr}
	add	fp, sp, #4
	sub	sp, sp, #8192
	sub	sp, sp, #8
	ldr	r3, .L28
	ldr	r3, [r3]
	str	r3, [fp, #-8]
	mov	r3,#0
	sub	r3, fp, #8192
	sub	r3, r3, #4
	sub	r3, r3, #4
	mov	r0, r3
	bl	m4096zero
	sub	r3, fp, #4096
	sub	r3, r3, #4
	sub	r3, r3, #4
	mov	r0, r3
	bl	m4096zero
	sub	r3, fp, #8192
	sub	r3, r3, #4
	mvn	r2, #5
	strb	r2, [r3, #4091]
	sub	r3, fp, #4096
	sub	r3, r3, #4
	mov	r2, #1
	strb	r2, [r3, #4091]
	sub	r2, fp, #4096
	sub	r2, r2, #4
	sub	r2, r2, #4
	sub	r3, fp, #8192
	sub	r3, r3, #4
	sub	r3, r3, #4
	mov	r1, r2
	mov	r0, r3
	bl	m4096add
	sub	r3, fp, #8192
	sub	r3, r3, #4
	sub	r3, r3, #4
	mov	r0, r3
	bl	m4096printhex
	mov	r3, #0
	ldr	r2, .L28
	ldr	r1, [r2]
	ldr	r2, [fp, #-8]
	eors	r1, r2, r1
	mov	r2, #0
	beq	.L27
	bl	__stack_chk_fail
.L27:
	mov	r0, r3
	sub	sp, fp, #4
	@ sp needed
	pop	{fp, pc}
.L29:
	.align	2
.L28:
	.word	.LC4
	.size	main, .-main
	.ident	"GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
	.section	.note.GNU-stack,"",%progbits
