<p>After a request for clarification, the question is about IEEE 754, independently of a programming language. In this context, obtaining the result <code>2.4196151872870495e-72</code> for the division being considered, in “round-to-nearest”, is purely and simply incorrect. The correct result is <code>2.41961518728705e-72</code>, according to the definition found in the question:</p>

<blockquote>
  <p>[...] every operation [...] shall be performed as if it first produced an intermediate result correct to infinite precision and with unbounded range, and then rounded that result [...].</p>
</blockquote>

<p>What happened in practice is that most programming language implementations, and often specifications, do not put a lot of emphasis on the strict respect of IEEE 754 semantics for floating-point operations. Even when the IEEE 754 double-precision representation is used for storage of floating-point values, operations can end up being implemented as:</p>

<ul>
<li><p>if the arguments aren't already 80-bit floating-point values with 64-bit significands, <strong>conversion</strong> from double-precision to this format. This does not lose precision and would not be a problem in itself</p></li>
<li><p><strong>computation of a 80-bit result</strong> from the 80-bit operands, because this is what is easy without extra effort when computing with the 8087 instruction set</p></li>
<li><p>just after that or later, <strong>conversion</strong> (in other words, <strong>rounding</strong>) of the 80-bit value with its 64-bit significand to a double-precision value with a 53-bit significand.</p></li>
</ul>

<p>In some cases the last step does not take place immediately but at the whim of the compiler. This is particularly annoying because it makes the code non-deterministic. Adding separate debugging code that should not affect computations does change them by changing the availability of 80-bit registers and causing some of them to be spilt and rounded to double-precision.</p>

<p>Even when storage in double-precision happens immediately for each intermediate result, there remains the issue that the result has been computed, and correctly rounded, for a significand of 64 bits, and then rounded again to 53 bits. In some cases, the mathematical result is close to the midpoint between two double-precision value, and rounding it to 64 bits of significand drags it to the exact middle. If this result with its 64-bit significand is then rounded to 53 bits, the end result is a different value than the direct application of the IEEE 754 rule would have produced. This only happens when the mathematical result is very close to the midpoint between two double-precision numbers, so that the two answers are both almost equally accurate answers, but one of them is what the IEEE 754 standard says and not the other.</p>

<p>The article <a href="http://arxiv.org/abs/cs/0701192" rel="nofollow noreferrer">The pitfalls of verifying floating-point computations</a> makes good further
reading.</p>

<p>Notes:</p>

<p>As mentioned by Patricia in her answer, the reason that IEEE 754 specifies that +, -, *, / and √ should compute as if the mathematical result, sometimes with infinite digits, had been computed and then rounded, is that algorithms exist to obtain this result without computing the entire mathematical result. When no algorithms are known to obtain this “correctly rounded” result cheaply, for instance for trigonometric functions, the standard does not mandate it.</p>

<p>Since you found a solution on a page that explains how to configure the 387 FPU to round directly at 53 bits of significand, I should point out that double-rounding problems can remain even after this configuration, although much rarer. Indeed, while the significand of the FPU can be limited to 53 bits, there is no equivalent way to limit the exponent. A double-precision operation that produces a subnormal result will tend to be double-rounded when computed on the 387 even in 53-bit-significand mode. This caused me to ask this <a href="https://stackoverflow.com/questions/18496560/how-do-java-runtimes-targeting-pre-sse2-processors-implement-floating-point-basi">question about how Java implementations implement multiplication on the 387</a>.</p>
IEEE754 division precision
<p>From IEEE754, I read </p>

<blockquote>
  <p>[...] every operation [...] shall be performed as if it first produced an intermediate 
  result correct to infinite precision and with unbounded range, and then rounded that 
  result [...].</p>
</blockquote>

<p>My understanding is when dividing the double <code>1.0108552519184509e+76</code> (<code>0x4FB6593CEBC97CC5</code>) by <code>4.1777521369084075e+147</code> (<code>0x5E94E917A9CC65DC</code>), the theoretical intermediate fraction part is 
(binary) </p>

<pre><code>1.0001000110011011000100110000110101001010110111101110100000000000001...
</code></pre>

<p>and should get rounded to (rounding mode "nearest")</p>

<pre><code>1.0001000110011011000100110000110101001010110111101111
</code></pre>

<p>resulting in a quotient of <code>2.41961518728705e-72</code> (<code>0x311119B130D4ADEF</code>).</p>

<p>One SW here yields <code>2.4196151872870495e-72</code> (<code>0x311119B130D4ADEE</code>) which seems to indicate it calculates the intermediate fraction only up to a certain position, e.g.</p>

<pre><code>1.000100011001101100010011000011010100101011011110111010000000000
</code></pre>

<p>and then rounds.</p>

<p>Is this compliant with IEEE754? Is it a common approach? </p>