<p>In the general case, the CUDA documentation does not give you enough information to calculate the number of clock cycles that a particular instruction requires.  This would be related to the pipeline depth for the instruction (i.e. for the functional unit servicing that instruction) and this is not documented.  The throughput table is largely useless for this exercise.</p>
<p>This is one reason why you will find various microbenchmarking papers for CUDA.  <a href="https://arxiv.org/pdf/1804.06826.pdf" rel="nofollow noreferrer">Here is one such example</a>.</p>
<p>It has to be measured empirically (and carefully), for each architecture of interest, and for each <a href="https://docs.nvidia.com/cuda/cuda-binary-utilities/index.html#instruction-set-ref" rel="nofollow noreferrer">SASS instruction</a> of interest; it is not documented.</p>
Number of clock cycles per one instruction CUDA
<p>I am a beginner on CUDA. Now I am calculating the number of clock cycles per one instruction (e.g. addition). In <a href="https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#arithmetic-instructions" rel="nofollow noreferrer">https://docs.nvidia.com/cuda/cuda-c-programming-guide/index.html#arithmetic-instructions</a>, it only gives the instruction throughput for different arithmetic operations. For example, the throughput in 7.x is 64 for 32-bit floating-point add. So, can i take 64/32=2 as the number of clock cycles per one instruction? If not, how can i calculate it?</p>