PCB Design Techniques to Reduce Ground Bounce in Signal Integrity

July 11, 2019 Cadence PCB Solutions

A child in a bounce house making a lot of noise having fun


Have you ever seen a small child play in a bounce house? Seeing the joy on the face of the child and contentment in the eyes of the parents is wonderful. On the other hand, have you ever seen too many children playing in a bounce house? It’s not so cute and it can get really noisy. The children are colliding with each other and getting tossed around and bruised. Meanwhile, the parents are getting frustrated and concerned, and fingers are being pointed as to who landed on who first. What should have been a lot of fun has become a huge annoyance.

Circuit boards can suffer from a similar problem with too much bouncing as well. In this case the problem is when signal voltages “bounce” and cause noise on the board. And just as with too many kids in a bounce house, excessive ground bounce can create a lot of noisy confusion that can result in degraded performance of the circuit board. To avoid this problem here are some PCB design techniques that can help you to reduce ground bounce in signal integrity.

Ground Bounce in Signal Integrity

The high speed digital devices used on circuit boards have very fast switching speeds as signals transition from a low to high state and back again. The faster these devices become, the more their switching times decrease. At these speeds the signal voltages may not drop all the way back down to their reference ground level, but instead “bounce” above it.

With the signal bouncing back before it gets down to the reference ground level, it causes an unexpected increase in current which results in noise on the output signal. When a lot of switching is happening at the same time, all of the bouncing results in an issue referred to as Simultaneous Switching Noise, or SSN. This can happen in circuits with large data busses as when a CPU writes to memory and all of the data signals switch from high to low at the same time.


 A PCB layout to control ground bounce in signal integrity

Best practice PCB layout techniques can help control ground bounce


The Problems Associated with Ground Bounce on Your PCB

With the signal voltages not returning to their ground level reference, there is extra current in the signal that creates noise. When a lot of switching is happening simultaneously, a lot of noise is being produced. This ground bounce noise can have a negative effect on the device as it is switching by creating false switching or double-switching. If the problem is not corrected, it could disrupt the circuit or even shut down the device.

One example of the switching problem would be a device whose ground level reference is artificially high due to ground bounce. It receives what should be a signal at a high state, but it misinterprets it as a low signal because its ground reference level has bounced to a higher level than the incoming signal. And if that same component were to send out a low signal but the ground level has been incorrectly shifted high, the receiving component may misinterpret the intended low signal as high instead. To correct these problems, the PCB designer needs to incorporate signal and power integrity practices in their layout.


Screenshot of the Cadence constraint manager system

State of the art design by constraint systems like this will help you design out ground bounce


PCB Layout Techniques to Reduce Ground Bounce

To remove the potential for ground bounce in your design, consider the following best PCB layout practices:


  • Use bypass capacitors to provide a stable voltage potential for the device and to contain the bounce effect to keep it from spreading out to the rest of the circuit.

  • Place bypass capacitors as close as possible to each supply pin of the device. The closer you can place them the better as this will help to reduce the impact of the current spikes during switching, especially when several outputs are switching at the same time.

  • Connect bypass capacitor pads to power and ground with wide and short traces and vias to minimize inductance and increase current flow.

  • Connect each ground pin to the ground plane individually. Connecting the ground pins together in a daisy chain will increase the length of return ground path and create more inductance.

  • Use current-limiting resistors to regulate the current flow in and out of your devices.

  • Spread out the timing of the outputs in a device that switch so they don’t all switch simultaneously. Also, distribute these outputs evenly throughout the device.

  • Eliminate the use of IC sockets as much as possible.

  • Use separate power and ground planes to leverage the capacitance of the planes.

    • Use SMD capacitors to minimize lead inductance.

    • It is recommended to place a ground plane next to each power (VCC) plane. This placement gives zero lead inductance and no ESR. The dielectric thickness between the two planes should be ~5 mils.


Another way that you can help yourself to reduce the possibility of ground bounce in your PCB design is to use tools that have been created for this task. You need a PCB design system with signal integrity tools for analysis and high-speed design features for precisely controlling your component placement and routing widths. With Allegro PCB Designer, you have all of this functionality ready to go to work for you.



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