1/3-inch 2-megapixel Cmos Active-pixel Digital Image Sensor Technology

The MT9D011 is a progressive-scan Sensor that gen- erates a stream of pixel data qualified by LINE_VALID and FRAME_VALID signals. An on-chip PLL generates the master Clock from an input Clock of 4 MHz to 40 MHz. In default mode, the data rate (pixel clock) is the same as the master Clock frequency, which means that one pixel is generated every master Clock cycle. The Sensor block diagram is shown in Figure 1. The core of the Sensor is an active-pixel array. The Timing and control circuitry sequences through the rows of the array, resetting and then reading each row. In the time interval between resetting a row and read- ing that row, the pixels in that row integrate incident light. The exposure is controlled by varying the time interval between reset and readout. After a row is read, the data from the columns is sequenced through an Analog signal chain (providing offset correction and gain), and then through an ADC The output from the ADC is a 10-bit value for each pixel in the array. The By Micron Semiconductor Products
MT9D011 's PackagesMT9D011 's pdf datasheet

MT9D011 Application circuits
MT9D011 circuits
This is one application circuit of MT9D011,If you need more circuits,please download MT9D011's pdf datasheet.

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