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Job Title: Entry level Engineer, Test/DFT

Job Category: Test Engineering

Job Sub Category: Test

Qualifications: 1. Bachelor/Masters degree in Electrical Engineering, with some experience of test/product engineering experience
on ATE or bench equipment.
2. Strong familiarity with verilog HDL language and RTL/Gate Level Simulation.
3. Some Experience in CMOS high speed testing. CMOS circuit, Design For Test (Scan and BIST) and
semiconductor device physics background a plus.
4. Strong understanding in VLSI design fundamentals. Must be able to execute and debug test vector simulations
on design models.
5. Strong debug and trouble shooting skills in simulation as well as on hardware.
6. Experience on ATE system: Verigy 93000, Teradyne Catalyst/Tiger/Flex, Advantest T2000 a plus.
7. In-depth knowledge of IC production flow from wafer fabrication through sort and packaging to final tests.
8. Good communication skills and data analysis, willing to learn.

Description: This position is located within the Cellular, Handheld and Data communication Group in Folsom, CA .Simulate and
develop test vectors, test program and support ramp products into production, responsible for all hardware and test
program software implementation from engineering to production: 1) Involvement in design phase to input and
contribute to Design for Testability 2) Develop test program on production ATE system for characterization and
production testing. 3) Design hardware for ATE characterization and production testing. 4) Develop detailed test
plans and test methodologies. 5) Test time reduction, yield improvement and assist release of the test program to

Country: United States

State: California
City: Folsom