FDCAN device tree configuration

1 Article purpose[edit]

This article explains how to configure the FDCAN when it is assigned to the Linux® OS. In that case, it is controlled by the CAN framework for Bosch M_CAN controller.

The configuration is performed using the device tree mechanism that provides a hardware description of the FDCAN peripheral, used by the M_CAN Linux driver and by the NET/CAN framework.

2 DT bindings documentation[edit]

M_CAN device tree bindings[1] describe all the required and optional properties.

3 DT configuration[edit]



3.1 DT configuration (STM32 level)[edit]

All M_CAN nodes are described in stm32mp157c.dtsi [2] file with disabled status and required properties such as:

  • Physical base address and size of the device register map
  • Message RAM address and size (CAN SRAM)
  • Host clock and CAN clock
  • Message RAM configuration

This is a set of properties that may not vary for a given STM32 device.

 m_can1: can@4400e000 {
 	compatible = "bosch,m_can";                       
 	reg = <0x4400e000 0x400>, <0x44011000 0x1400>;    /* FDCAN1 uses only the first half of the dedicated CAN_SRAM */
 	reg-names = "m_can", "message_ram";
 	interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 	interrupt-names = "int0", "int1";
 	clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
 	clock-names = "hclk", "cclk";
 	bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
 	status = "disabled";
 m_can2: can@4400f000 {
 	compatible = "bosch,m_can";
 	reg = <0x4400f000 0x400>, <0x44011000 0x2800>;    /* The 10 Kbytes of the CAN_SRAM are mapped */
 	reg-names = "m_can", "message_ram";
 	interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
 	interrupt-names = "int0", "int1";
 	clock-names = "hclk", "cclk";
 	bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;         /* Set mram-cfg offset to write FDCAN2 data on the second half of the dedicated CAN_SRAM */
 	status = "disabled";

The required and optional properties are fully described in the bindings files.


3.2 DT configuration (board level)[edit]

Part of the device tree is used to describe the FDCAN hardware used on a given board. The DT node ("m_can") must be filled in:

  • Enable the CAN block by setting status = "okay".
  • Configure the pins in use via pinctrl, through pinctrl-0 (default pins), pinctrl-1 (sleep pins) and pinctrl-names.

3.3 DT configuration examples[edit]

The example below shows how to configure and enable FDCAN1 instance at board level:

 &m_can1 {
 	pinctrl-names = "default", "sleep";         /* configure pinctrl modes for m_can1 */
 	pinctrl-0 = <&m_can1_pins_a>;               /* configure m_can1_pins_a as default pinctrl configuration for m_can1 */
 	pinctrl-1 = <&m_can1_sleep_pins_a>;         /* configure m_can1_sleep_pins_a as sleep pinctrl configuration for m_can1 */
 	status = "okay";                            /* enable m_can1 */ 

4 How to configure the DT using STM32CubeMX[edit]


5 References[edit]

Please refer to the following links for additional information:

Operating System

Controller Area Network (robust bus mainly used for automotive applications)

Device Tree

Random Access Memory

Generic Interrupt Controller

Serial Peripheral Interface