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Large watch with 7 segment display AVR applications

Large watch with ATmega48
Hardware, Mounting, Use and Software for the large watch

Large watch with ATmega48

Large watch ATmega48
  1. Properties
  2. Hardware
  3. Mounting
  4. Software
These pages as PDF (36 pages, 608 KB).

1 Properties of the large watch with ATmega48

The hardware properties are:

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2 Hardware

2.0 Preliminary remarks

When developing this hardware I collected the following experiences, that might be useful for others:
  1. My first approach was to clock the controller directly with a 32.768 kHz crystal. That turned out to be impracticable for the following reasons. First: it is possible to clock the controller with that low frequency. My first try was erroneous: I fused the controller with an external crystal oscillator attached, not with an external crystal attached (error #1). ATMEL's Studio 4.19 did not recognize the error and returned a correctly verified setting. I don't know with which clock signal (as there should have been none) this verification was made, but anyway: a second try to access the fuses via ISP failed (of course and as to be expected).

    After repairing the error in HV/Parallel mode in an STK500, it didn't work either. I programmed at the planned 3.3V operating voltage and had set the brown-out-detection to 2.7V (error #2). As a test program I had burned a short sequence, blinking the attached green LED. But: nothing was blinking. Only if I rose the operating voltage to 5V (of cause without the display LEDs attached), the blinking started. The reason was that the brown-out detection already reacted on much higher voltages the programmed (up to 4V when set to 2.7V). Only after turning brown-out-detection off the blinking worked at whatever operating voltage. Therefore: do not trust ATMEL's brown-out-properties!

    For the third error I don't have such an easy work-around: the Studio refused to program the AVR with clock frequencies smaller than 5 kHz. It was necessary to select a 4 kHz ISP frequency because the next higher entry was already 57.6 kHz (which would certainly exceed one quarter of the 32.768 kHz clock = 8.192 kHz). So 4 kHz was the only alternative but the Studio does not allow to program flash or EEPROM at below 5 kHz. Even though the handbook on the ATmega48 does not have any programming frequency limits in ISP mode. So it must be an artificially set limit of the Studio software. Anyway: producing a rather complex source code without a working ISP interface is a mess, and I gave up the 32.768 kHz clock idea at that point. I have been wondering if the project would really work at that clock, and unfortunately had already took some efforts to optimize execution times at that time.
  2. I had planned to avoid the 16 diodes for the constant-current transistors, that usually are necessary to limit the base voltage of the transistors, by reducing the operating voltage of the controller down to 3.3 V, so that the emitter voltages would go down to (3.3 - 0.6) = 2.7 V. With a 100Ω resistor the constant current would be 27 mA, ideal for the LEDs in multiplex mode.

    Usually one uses an Integrated Circuit regulator. Unfortunately 3.3 V regulators come only in SMD. Anyway, I tried a BA033FB, and soldered the three pins with some short wires. Unfortunately my operating voltage was not at 3.3 V but at more than 20 V. Fortunatly I had the supply part not attached to the controller at that time, my ATmega48 and some of the transistors would have died that way.

    In those parts the ground pin is not attached to the middle pin (like their datasheet says - and lies about that) but only to the cooling pad. But connecting the cooling pad with minus did reveal error #4: the voltage on the output pin of the BA033FB was not around 3.3 V, but at 4.04 V instead. By that even exceeding the upper limit listed in the data sheet by far. That would have blown my LEDs with a by far too large current. At how many mA's will the specified voltage be reached? I don't know but rather fast decided to not use an Integrated regulator, because the next lower regulator, a 78L02, has a specified lowest voltage below the lower limit where an ATmega48 is reliably running (2.7 V). And constructed and build my own regulator with a zener diode and a transistor.
  3. The transformer that I had calculated in advance would be a 2.8VA 2*12V type and would have fitted exactly my needs. But the one that was delivered (with 2*12V written on top) was a 2*15V type instead (error #5). The extra voltage nearly blew up my electrolytic capacitor as it produced 27 V at zero load (without consuming current). So I had to build in a small yellow LED to bring the no load voltage down to 25 V.

    The power of the transformer was really 2.8VA, but the higher voltage caused a smaller current than calculated (error #6). An attached 82Ω as load, usually consuming 200 mA (well below the specified 2*117 = 234 mA), brought the voltage to well below my LED consumption voltage of 13 V: a 2.8VA transformer with 2*15V only delivers 187 mA. So I had to reduce the LED's current consumption by reducing the operating voltage of the controller down to 2.7 V instead of the planned 3.3 V. Just to work around the false transformer. Fortunately the brightness of the LEDs is not very different between 27 and 21 mA.
  4. Normally, when multiplexing smaller LED devices, a 50 or 60 Hz multiplexing frequency is sufficient and no flickering occurs. Not so with the very large digits here: even a 75 Hz multiplexing showed some slight flickering (error #7). The concept had to be changed to well above 100 Hz.
  5. The DCF77 receiver module used showed two additional errors. Firstly, at 2.7 V operating voltage well within the specified range, switching the internal pull-up resistor of the portpin on lead to a voltage range exceeding the high-low transition voltage of the input pin (error #8). The internal pull-up of 47k already exceeds the capability of the receiver module to drive an input pin. The error was corrected by switching the pull-up off (do not use that when the DCF77 input pin is not attached, spurious signals here can block the software from doing other purposes!

    The second error is that this module is not producing clear DCF77 signals (error #9). It's HF amplification is so small that already a slight maladjustment of the antenna direction produces garbage at the input. And it is very prone to any small signals that are caught from switched power supplies in the near. And: I am only 80 km away from DCF77's antenna here in South Hesse. I would never again use that module for any other application.
Nine errors, of which eight were not caused by me, are a little too much to have fun.

2.1 The display part

Schematic of a display digit This is one of the four display digits of the watch. It consists of 28 10-mm LEDs, that are connected four-by-four to yield seven segments. All anodes of the seven segments are connected together and are connected to one of the four anodes A1 to A4 on the 16-pin flat cable and female connector.

The cathodes a to g are interconnected with all four digits and are also connected to the flat cable and female connector.

Two LEDs in the middle form an additional cathode connection called h. The anode of the two can be attached to one of the four anode lines. To which of the anode lines those two are connected can be configured in the source code.

The 16-pin connection is documented in the schematic of the controller and driver.

2.2 Controller part

2.2.1 Selecting the AVR type

Selection of the AVR type The AVR type results from the following hardware requirements:
  1. The watch shall run without any DCF77 synchronization over a longer time without having to be re-adjusted. Therefore either the controller or the timer/counter TC2 have to use the crystal pins.
  2. In order to not have to consult the DCF77 and the two key inputs these have to initiate a PCINT when their logical level changes. So at least one PCINT is required.
  3. The eight constant current switches driving the cathodes shall be in one port, the four anode switches in another port to be easily accessible.
  4. Measuring of the potentiometer and of the foto transistor voltage requires two ADC channels.
  5. For multiplexing the display an 8-bit-timer, for measuring the duration of DCF77 signals a 16-bit-timer are required.
The software here delivers a small selection of AVR type groups. The ATmega48 and its larger companions fulfill those requirements.

2.2.2 Selecting the clock frequency

Clocking of the ATmega48 is done with a crystal attached, by default of 4.096 MHz. Two ceramic capacitors of 22 pF assist in starting the internal oscillator. The external crystal fuse of the ATmega48 has to be activated to change from the internal RC oscillator to the external crystal (see the fuse-section), because otherwise the watch is by a factor of 1,024 too slow (35 seconds per day).

The reasons for selecting this xtal frequency are as follows (see the calculation sheet "Timer" in the OpenOffice spreadsheet here):
  1. The xtal shall be available in electronic shops.
  2. The xtal frequency shall be dividable by 8 or 64 and by 256 without a decimal remainder.
  3. Division by 256 is required to allow the multiplex timing by an 8-bit timer and to allow preliminary switching the active period off by use of a compare register, that writes zeros to the anode driver outputs (dimming function switch-off values between 0 and 255). If you use a different xtal frequency that requires CTC mode to achieve a zero remainder (e.g. 2.0 or 4.0 MHz), has to move the switching function to compare B and has to convert the compare values to fit to the CTC value by use of multiplication.
  4. If you select a prescaler value of 8, the smallest xtal frequency of 2.048 MHz yields much too high multiplex frequencies (1,000 Hz), which increases power consumption and HF noise. When selecting 64 as prescaler the MUX frequency would be too low (31.25 Hz), producing strong flickering of the display. Dividing the clock frequency by use of the CLKPR division avoids that.
4.096 MHz is a good selection, the MUX frequency is 125 Hz and optimized.

2.2.4 Schematic of the watch

Schematic of the watch This is the schematic of the controller and of all connected components. The spreadsheet "Partslist" in the OpenOffice document here lists all necessary components and their current prices.

2.2.5 Cathode drivers as constant current sources

Port D of the controller controls the eight cathodes of the display. The port pins drive, with resistors of 1k to limit port pin current in case that the display is not attached, the base of transistors BC547 (any NPN small signal can be used instead). The emitters are connected to 100Ω resistors to ground. That produces constant currents of
I (mA) = (2.7 - 0.6) / 100 * 1000 = 21 mA

The port pin outputs are active high.

This is the reason for selecting 2.7 V as operating voltage of the controller. 5 V instead would have produced emitter voltages of 4.4 V and the voltages of the four LEDs (4 * 3.18 V = 12.72 V and at least 0.2 V CE(saturated) for the anode driver transistor BD440 would have resulted in 17.3 V. The consequence would have been that a transformer of 2*15V would have been required (which is not available with the necessary power rating).

An alternative would have been to reduce the emitter voltage with two diodes down to 1.4 V. Because 16 of those diodes would have been necessary, the reduction of the operating voltage down to 2.7 V needed less components.

2.2.6 Anode driver

The four anodes are controlled by the lower half of port B. The three lower port bits are coupled directly to the bases of BC547 NPN transistors, those are driven via the internal pull-up resistors. The current from the pull-ups of 47k is enough to drive those transistors via a hFE(min) of 150:
IC = (2,7V - 0,7V) / 47kΩ * hFEmin * 1000 = 6,4 mA

The NPN transistors, via resistors of 2k2, drive the base of the PNP anode driver transistors BD440 (any small power transistor can be used). Already a hFE of 30 drives the anode current of up to 200 mA.

Because the fourth anode bit is also needed for serving the ISP6 interface (MOSI), this NPN transistor is attached with a 10k resistor, and the port bit is configured as output.

2.2.7 ISP6 programming interface

The port pins PB3 to PB5 serve the ISP6 interface, by which the flash memory can be programmed within the running system. If no power supply is attached during programming the programming device has to supply 3.3 v. If the display is not connected, 5 V can also be used to program the flash. Don't attach the LEDs when at 5 V, that would ruin some of the LEDs.

2.2.8 Other peripheral components

Port C is connected to the other peripherals:
  1. The potentiometer is connected to the PC0/ADC0 input. The voltage there is converted to digital values, which in case the potentiometer is configured as dimming source dims the LEDs. If the foto transistor is used the potentiometer input is only used in case the time is re-adjusted.
  2. On PC1/ADC1 a foto transistor for measuring background light is attached. This controls the brightness of the LEDs if so configured.
  3. A small green LED is attached to PC2. This can be used for prototyping (see here for debugging options) or for any other use (not used by default).
  4. On PC3 and PC4 resp. the following three pins of the 10-pin connector the two keys are attached. Those are held high with the internal pull-ups and active low when a key is closed (active low).
  5. On PC5 a DCF77 receiver module can be attached. It is irrelevant if its signal is active high or low, both work correct. By default, its pull-up is active, but can be deactivated by a configuration setting. The module shall be able to work with 2.7 V operating voltage.

2.3 Power supply

Power supply for the large watch Th power supply has to have the following properties:
  1. It has to supply 16 V and 0.2 A, required for the LEDs.
  2. The controller needs 2.7 V with a maximum current of 30 mA. The regulator has to be compatible with the 25 V max voltage on the electrolytical capacitor (without LED load).
The schematic shows such a standard power supply with a 2*12V transformer and 2.8VA. The two diodes are 1N4001 or equivalent.

Power supply voltage without current consumption This simulates the displayed power supply without any load attached, see Power-Supply-Software here). The voltage on the cap stays well below 25 V. In practice the transformer had 2*15V instead and increased coil resistances. When no load was attached, the voltage rose above 25 V and had to be reduced by attaching a small yellow LED to below 25 V. Do not trust delivered products, those might be different from what is written on them.

The elevated no-load voltage of the real transformer also had the effect that this voltage, when a 200 mA load was attached, broke completely down to 12.4 V only. By far too low to drive four LEDs. Because the 200 mA only occur if all eight segments are on (and only for a short mux cycle), it was sufficient to reduce the operating voltage of the controller down to 2.7 V and so to reduce the resulting segment current. If your transformer safely delivers 200 mA you can increase the operating voltage to 3.3 V, and to operate the watch with currents of up to 27 mA per segment.

Normally one uses an integrated regulator for the purpose of supplying the controller. But there are no integrated 2.7V regulators available that have a certified voltage. As the 3.3V regulator had 4.04V instead, I decided to construct my own. I used a 3.3V zener diode and an NPN to get rid of all problems.

Power supply voltage at 230 mA load This is the calculated voltage of the supply at 230 mA load, as designed. The 230 mA would be the maximum if 3.3V operating voltage, 27 mA LED segment current, eight segments and the maximum consumption of the controller would occur.

The voltage drops down to slightly below 16 V, with a ripple of 1.3 V, which is off-regulated by the constant current transistors.

So far the theory. The real transformer did not follow this calculation at all (see above).

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3 Mounting the device

3.1 LED front plate

The 28 10mm LEDs per displayed digit are placed on a width of 170 mm onto a 680-by-240mm plate of acrylic glass. Four LEDs each are interconnected to form one segment (see drawing above). Each digit has seven segments.

For drilling the 112 holes, the four DINA4 prints of the digits (see the OpenOffice document here) were cutted out and fixed on the acrylic plate. Drilling started with a 1.5mm drill, enlarging the holes with 1 or 1.5mm larger drills. Drilling was done with a low speed to avoid melting of the acrylic glass.

From 6mm on I used a trimming tool at fast speed, from the front and from behind.

When the holes were accessible with my drill press, a 10mm drill was used at high drill speed and slow sink speed. The melting of the acrylic glass helped to avoid cracking.

Those holes that were not accessible, were widened with 7, 8 and 9mm drills. The last mm was taken with a sharp knife to avoid cracking.

The pages 2 and 3 of the print also include the two LEDs in the middle. Those are drilled similarly, and wiring the anode goes with one of the four other digits. The placement of the anode has to be configured in the source code.

For protection and for upright standing the watch a second acrylic glass plate of the same size is mounted on the backside with six 50mm spacers. This plate also holds all PCBs and attached components.

3.2 Controller part

Component placement on the controller PCB These are the components of the controller part on a 50-by-50mm PCB. All external components are connected with plugs, so one can plug-off the controller part in the finally mounted device.

3.3 Power supply part

Component placement on the power supply PCB The power supply is also built on a 50-by-50mm PCB.

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4 Software


The source code in assembler can be downloaded here and can be viewed in the browser here.

The following documents are additionally available in OpenOffice format:
  1. spreadsheets with all calculations (Timer, led currents, measured led voltages, etc., are in this document,
  2. the eelectrical schematics of the controller and the power supply are in this document,
  3. the layouts of the controller and the power supply PCB are in this document (no, I don't have made a printed layout design),
  4. the four pages of the 7-segment layout of the front plate are in this document.

4.2 Assembling the source code

To assemble use the above link to the asm source to download the asm file. Please check, by opening the asm code with a simple editor (NOT a word processing program, please, this will destroy the simple text and add various formatting information, which makes it unreadable for the assembler), that no debugging switches are activated (see below).

For assembling you'll need an assembler that is capable to understand .IF directives. ATMEL's assembler 2 is able to understand. For those who do not want to download 900 MB monster software (the Studio) and don't want to install that, or for those who do not run one of the Windows operating systems, my own assembler gavrasm is simpler and better. A How-To for Windows here and for Linux here demonstrates how to do that. Those who run a different operating system (32 bit Win, Mac-OS, etc.) can download the source code of gavrasm and compile it with the Free Pascal compiler for that operating system.

The assembled machine code as Intel-Hex-File .hex should be found in the folder where the source code resides.

4.3 Flashing, fuses

The hex code has to be written to the flash memory of the ATmega48. For that you need a hardware burner and the software for that. Programming can be done via the ISP6 interface plug on the controller PCB.

Fuses ATmega48 Prior or after flashing the fuses of the ATmega48 have to be changed to use the external crystal as clock source. Also clear the CLKDIV8 and the CKOUT fuses and switch off the brown-out-detection BOD. In practice, allowing brown-out-detection at 1.7V blocked all activities of the controller at 2.7V operating voltage, so do not use this useless feature.

By use of a debugging function in the source code you can check if the controller works correct (let the small green LED blink), see the debugging options here).

4.4 Hardware diagnosis

The source code includes several functions that can assist in getting the hardware to function correct. Those are activated by changing the "No"s to "e;Yes"e; in the source code, by re-assembling and burning the hex code to the ATmega48's flash. It does not make much sense to set more than one debug option at a time as those excude each other in most cases.
  1. "Debug_ledgreen": Following power on the green LED should blink if the controller works correct.

    If the LED is off, the controller does not run correct and you'll have to search the wiring error in the clock section. If the blink rhythm is too fast, your controller is on an elevated clock frequency (check the crystal). If it runs too slow, also check your connections:

    If the green LED is permanently on: your ATmega48 is dead. That happened in my prototype, and I still do not know why (no, I did not reverse the operating voltage, and: yes: I tried High Voltage/ Parallel Programming in an STK500 to recover the chip - even that did not work). A matter for the dust-bin and final disposal in the controller-heaven ...
  2. "Debug_current": This option activates all eight cathode drivers, so you can connect the cathode pins on X2 with an ampere meter to +16 or +20 Volt to measure the constant current. That should show roughly 21 mA. If the LED display is attached to X2 all seven segments of the ten-hour digit should be on.
  3. "Debug_segments": That switches the seven (resp. eight) segments of all four digits on (one by one, from a to h). The speed can be varied with the constant "cDebug_segDelay". With 1 the change goes very fast, with 10 it is slower.
  4. "Debug_mux8" This simulates a multiplex cycle, with all seven resp. eight segments on and switches from digit to digit. The mux frequency can be varied with changing the constant "cDebug_muxfreq". At 62 Hz nearly no flickering can be seen, beyond 100 Hz the muxing cannot be seen any more.
  5. "Debug_adc": The measuring results from the ADC, the MSB of the sum (between 0 and 255), is displayed in decimal format on the LEDs.
  6. "Debug_keys": The input signals on the two key input pins are displayed on the ten-hour (key 1) and on the one-hour (key 2) position. Displayed is a small i (segment c of the display) for a high input pin or a small o for a low input pin.
  7. "Debug_dcferr": All error signals on the DCF77 input are displayed. The ten-hours digit shows a large E, the one-hours digit the error number. The following error numbers mean:
    1. or blank: No error
    2. Signal shorter than required for a received 0
    3. Signal shorter than required for a received 1
    4. Signal shorter than required for a pause
    5. Signal shorter than required for a missing 60th second
    6. Signal longer than required for a missing 60th second
    7. Following minute change not 59 bits received
    8. Minute parity uneven
    9. Hour parity uneven
    10. No signal on the DCF77 input pin
    Correct signal durations overwrite the error number with a blank, so that only error numbers can be seen.

    If diverse different error numbers occur, the tolerance parameter in the constant "cDcfTol" can be increased.
  8. "Debug_dcfany": All correct signals are displayed (from right to left): received zeros are displayed as small o, ones with a small i (segment c), pauses with a capital P.
  9. "Debug_dcfdur": All signal durations are displayed in hexadecimal format on the display (with the hexadecimal digits 0 to 9 and A, b, C, d, E, F.).

4.5 Constants to be adjusted in the software

Within the section "Adjustable constants" of the source code diverse adjustments can be made that change properties of the watch. All constants in this section can be changed without risking malfunctions.
  1. .equ xtal = 4096000 ; in Hz
    If a different crystal is used, you can adjust its frequency here. The frequency has to be dividable by 4096 or 8192 without a decimal remainder, otherwise clocking of the watch will be inaccurate. Use the OpenOffice spreadsheet Timer in the document here to perform those calculations.
  2. .equ cClkpr = 4 ; Either two or four
    With that the clock prescaler is re-adjusted. It can be either 2, 4 or 8. Use the spreadsheet to study the effect.
  3. .equ cStartHours = 0x09 ; Start at 20:00 h
    .equ cStartMinutes = 0x59

    This adjusts the time that the watch starts with during power-up. Values have to be in packed BCD format.
  4. .equ cDcfOnly = Yes ; Display/Clear unsynced time
    Switches the leds off, as long as no DCF synchronization took place yet.
  5. .equ tDcf0 = 100 ; 100 ms for a 0
    .equ tDcf1 = 200 ; 200 ms for a 1
    .equ tDcfP = 850 ; Pause for 0 and 1 to next second
    .equ tDcfM = 1850 ; Pause for 59th second pulse
    .equ tDcfT = 3000 ; Time-out of DCF signal

    These parameters adjust the duration of DCF77 signals in Milliseconds. If your module has different durations, you can adjust those in the personalized section.
  6. .equ cDcfTol = 10 ; Tolerance in %
    The unavoidable tolerances of the durations of DCF77 signals can be adjusted here. If your signal durations have a larger variance, increase that constant to 15 or 20. If overlapping occurs, you'll be notified by an error message.
  7. .equ cAnDp = 3 ; Should be between 1 and 4
    This adjusts to which anode the double point in the middle is connected. If false, the blinking does not occur.
  8. .equ tBounce = 50 ; Bouncing time, in ms
    This adjusts the time that the keys have to be inactive until negative pulses on those inputs are leading to an active effect. If your keys bounce longer than this, increase that value.
  9. .equ cDimOpto = No ; Select the source
    This parameter selects whether the foto transistor (Yes) or the potentiometer (No) adjusts the dimming of the display.
Any changes come into effect following re-assembling and the transfer of the hex code to the flash.

4.6 How the software works

The following chapters elaborate on the basic functioning of the software.

4.6.1 Timing control

The whole timing control is made with the timer/counter TC0. The following relationships play a role:
  1. Frequency of the oscillator with external crystal = 4,096 MHz,
  2. Clock prescaler by 4 with CLKPR, controller clock = 1,024 MHz,
  3. TC0 prescaler by 8, TC0 clock = 128 kHz,
  4. Fast PWM mode mit TOP=255, TC0-Overflow-Int = 500 Hz.
Within the overflow interrupt the following tasks are performed:
  1. output of the next left digit of the watch and activation of the next left anode driver, readjustment for the next mux stage,
  2. down counting of the half-second divider by one, if zero: setting the half-second flag and down counting of the minute divider (from 120 down to zero), if that reaches zero: setting the minute flag,
  3. if the toggle counter of the keys is not at zero: if one or both keys are pressed restart the toggle period, if none is pressed down counting of the toggle counter.
Additionally TC0 is used to dim the display. This is done when the compare value A is reached and, in its interrupt service routine, writes zero to the anode driver output port.

Because the compare value A changes rather often (every time the ADC reaches 64 conversions) it had to be taken care to not miss compare matches due to setting a smaller value while already at a higher count. Therefore the TC0 works in Fast PWM mode and not as normal counter. In PWM mode the update of the compare value is delayed until the current PWM cycle has ended. This works fine, but not with extremely small compare A values of less than 2. In that case flickering of single digits occurs, and I don't understand why. As this only occurs at extremely low dimming, I can live with that.

4.6.2 AD conversion as additional clock source

The AD converter works with a clock prescaler of 128 and converts either the analog voltage on the potentiometer (on ADC0) or on the collector of the foto transistor (ADC1). If time setting is active (key 1 has been pressed and time setting is still active), in any case ADC0 is measured.

Within the interrupt service routine of the ADc the results of 64 consecutive measurements are summed up and the conversion is restarted. If those 64 measurements are completed, restart is omitted, the MSB of this sum is copied and the bAdc flag is set. Further processing is performed outside the service routine.

Outside the service routine the flag is cleared, the channel is set depending from the current mode, the sum is cleared, the counter restarts at 64 and the first conversion is started. If time-setting mode is inactive, the MSB of the sum is either directly written to the compare A port of TC0 (potentiometer dimming) or is inversed (foto transistor dimming) and then written to compare A.

If time-setting is active then see chapter 4.6.4 below.

The following frequency scheme of the AD conversion applies:
  1. Controller clock: 1,024 MHz
  2. AD clock prescaler: 128
  3. Clocks per conversion: 13
  4. Number of conversions summed up: 64
  5. Conversion frequency: 9.62 Hz
  6. Conversion time: 104 ms

4.6.3 Multiplexing

The four bytes with the cathodes to be activated for the four digits are located in SRAM. Those are output with a frequency of 500 Hz per digit during the TC0 overflow int. The output direction is reversed (from A4 to A1) because the end of the cycle can be detected in a simpler way (carry flag set after right-shifting the anode register).

Before the next byte combination is brought to the cathode output port, the anodes are switched off. This was necessary to avoid flickering of the display.

4.6.4 Adjusting the time with the keys and the potentiometer

Adjusting the time starts when key a is closed for the first time. This is recognized via a PCINT, where changes on the key input pins and on the DCF77 signal input pin are masked to lead to an interrupt. The flag bKey1 is only activated if the input pin is low and if the toggle counter is at zero.

The flag bKey1 activates the bKeyA flag that signals an active time setting phase. The ADC is set to measure potentiometer voltages on ADC0. Incoming ADC result sums, if complete, now are multiplied by 24, the result is converted from binary to packed BCD format and the two digits are converted to 7-segment and written to the SRAM storage for display.

If the half-seconds divider is below 25% of its time, the two digits are blanked instead. That results in a blinking of the two hour digits.

If the hours are set, another key pressing of key 1 results in setting the bKeym flag additionally. From now on multiplication is done with 60 and the 7-segment result is written to the minute position in SRAM.

The third pressing of key 1 converts the hours and minutes that were adjusted to set the hours and minutes of the watch. Additionally the half-seconds and the minute dividers are restarted and eventual flags, that have been set in the meantime, are cleared. The bKeyM and bKeyA flags are also cleared and the current time is displayed.

If the key 2 is pressed, while bKeyA is active, the setting of minutes returns to setting the hours. If currently setting the hours is active while key 2 is pressed, the time-setting mode is skipped and the original time (which continued to run during time-setting mode, but was not displayed) is displayed.

If the time setting needs longer than the selected period of 10 minutes, the mode is also cleared and returns back to the original time.

Each key pressing event restarts the toggle counter to prevent from any reactions to spurious signals from the key inputs.

4.6.5 Adjusting the time with DCF77 signals

Each level change on the DCF77 input pin leads to a PCINT and a respective flag is set.

The flag leads to reading the current count from the 16-bit timer TC1. This timer advances with a prescaler value of 1024 at 1 kHz (1 ms per count). Each input signal restarts the TC1, so that each signal's duration can be assessed to find out what time information has been received from DCF77.

Evaluation of DCF77 signal durations A zero bit of DCF77 should be around 100 ms long. If the tolerance is set to 10% it can be between 90 and 110 ms long. With the TC1 clock the count shall be in that range for a zero.

Each of the received signals has its specific range. A minute change has a duration of between 1800 and 1900 ms, depending if the last bit was a one or a zero. With 10% tolerance the counter value should be between 1850 - 185 = 1665 and 1850 + 185 = 2015. As each level change causes an interrupt, the normal pause between the end of a bit and the beginning of the next second's pulse should be between 800 and 900 ms long, but does not require any further action.

From that the following algorithm results:
  1. If the signal duration is shorter than the table's first value, an error has occurred.
  2. If the signal duration is longer or equal the first value and shorter than the second value, a zero, a one, a pause or a minute change is recognized and has to be handled.
  3. If the signal duration is equal or above the second value, the next value pair has to be tried. If the last duration, a minute change, is exceeded an error happened.
Received zeros and ones are shifted with ROR into a bit buffer that is at least 40 bits long. When shifted those signals have to be counted (to check if exactly 59 have been received when the minute change signal occurs).

Second pauses are ignored.

If a minute change occurs,
  1. it is checked whether exactly 59 data bits have been received,
  2. the minutes are to be extracted from the bit stream, the respective parity has to be checked (must be even) and has to be written to the minute storage,
  3. the hours are extracted, their parity bit checked and written to the hour storage,
  4. if both were correct: the time is set, the half-second and minute divider restarted and pending flags are cleared.

Durations of DCF77 signals as TC1 counter values These are the values of the table by default with a tolerance of 10%. No overlapping occurs. As each TC1 count is associated with 1,024 controller instructions, short delays in reading counter values are irrelevant.

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