555 Timer and Related Theory


A multivibrator is a relaxation oscillator generating nonsinusoidal waveforms. Basically, the multivibrator is a two-stage amplifier or oscillator operating in two modes or states. Each amplifier stage feeds back the other such that the active element of one stage is driven to saturation and the other to cut off. A new set of actions, producing the opposite effects, then follows. Thus the saturated stage becomes cut off and the cut off stage saturates. The operation of the multivibrator is based on the fact that no two active elements have exactly identical characteristics. The NE 555 is a widely used IC timer, a circuit that car run in either of two modes:- Monostable and Astable.
In the astable mode, it can produce regular waves with a variable duty cycle. The 555-timer chip has the following components:

1. A voltage divider.
2. Two comparators
3. An R-s flip-flop
4. An n-p-n transistor.

555 Timer Dlock Diagram
              Block diagram representation of the 555 timer circuit.


In astable operation the 555 timer has no stable states, which means that it cannot remain indefinitely in either state i.e. it oscillates when operated in the astable mode and it produces a rectangular output signal. Since no input trigger is needed to get an output, the operating in the astable mode is sometimes called Free-Running Multivibrator. Here we need two external resistors and one capacitor to set the frequency of operation.
555 Timer used as Astable Multivibrator

Figure above shows an astable multivibrator implemented using the 555 IC together with an
external resistor RA , RB and an external capacitor C.
555 Timer wave form in  astable mode

1-Initial State S=1 R=0 -> Q=1 Q.=0 (C begins to charge)

Initially capacitor is discharged or empty. At this time VTH > VC causes output of the
comparator 1 to be 0 so R=0 and VTL > VC causes output of the comparator 2 to be 1 so S=1.
 For S=1 and R=0 , Q=1(high,Vcc) and Q.=0(low,0V).Thus Vo is high and transistor is OFF.
 Capacitor C will charge up through the series combination of RA and RB , and the voltage
across it , Vc , will rise exponentially toward Vcc.

2- Vc = VTL , comparator 2 -> Low S=0 R=0 -> Q=1 Q.=0 (no change , C is still charging)

As Vc crosses the level equal to VTL , the output of the comparator 2 goes low.(Vc = VTL , comparator 2 -> Low ). This however has no effect on the circuit operation because this will make the inputs of the flip-flop as S=0 and R=0 (no change state) which means outputs of flip-flop will remain same. This state continues until Vc reaches and begins to exceed the threshold of comparator 1, VTH.

3- Vc = VTH , comparator 1 -> High S=0 R=1 -> Q=0 Q.=1 (C begins to discharge )

When Vc reaches and begins to exceed VTH , the output of the comparator 1 goes high and
resets the flip flop( S=0 R=1 -> Q=0 Q.=1).Thus Vo goes low , Q. goes high and so transistor is
turned ON.
 The saturated transistor causes a voltage of approximately 0V to appear at the common node
of RA and RB. Thus C begins to discharge thru RB and the collector of the transistor.
Note that R = 1(flip-flop input) for a very short time.

4- Vc = VTH , comparator 1 -> Low S=0 R=0 -> Q=0 Q.=1 (no change , C continues to discharge )

VC will drop again below VTH immediately after discharging process is started. S=0 and R=0
will not affect the system (no change state)

The voltage Vc decreases exponentially with a time constant RB. C toward 0V.This state will
continue until Vc reaches VTL.

5- Vc = VTL , comparator 2 -> High S=1 R=0 -> Q=1 Q.=0 (C begins to charge )

When Vc reaches the threshold of comparator 2 , VTL , the output of comparator 2 goes high
and then S=1 R=0 causes Q=1 and Q=0.Thus output Vo goes high and Q. goes low , turning off the

Capacitor C begins to charge through the series equivalent of RA and RB , and its voltage rises
exponentially toward Vcc with a time constant (RA+RB).C. This rise continues until Vc reaches VTH, at
which time the output of comparator 1 goes high , resetting the flip-flop , and the cycle goes on.

Determining the Period T =TH + TL:

For TH:
 From the general solution for step and natural responses :
X(t) = XF + [X(to)-XF].e-(t-t0)/t
Vc= Vcc+[VTL+  Vcc ]
ε-τ/t or ;
VC = (Final Val-Initial Val) ( 1- e-t /RC ) + shifting
Vc = (b-a) ( 1- e-t/RC ) + a
Vc= (Vcc)(1-  
ε-τ/t ) +VTL
Vc= (Vcc)(1-  
ε-τ/t ) +VTL is equal Vc= Vcc+[ VTL + Vcc ]ε-τ/t where τ =(RA + RB).C
  555 Timer wave form in  astable mode
Substituting t=TH VC=VTH=2/3Vcc and VTL=1/3Vcc in the equation
Vc= (Vcc)(1-  ε
-τ/t ) +VTL
Vcc=( Vcc - 1/3)(1-  ε
-τ/t ) + Vcc where τ =(RA + RB).C

TH = (RA+RB).(C).(ln2)
TH = 0.69(C)(RA+RB)

For TL:

 Vc= 0 V+[ VTH -0 ]e-τ/t
Vc = VTH. e-τ/t where τ =RB.C

For t=TL VC=VTL=1/3Vcc and VTH=2/3Vcc

Vc = VTH.e-τ/t where τ =RB.C
1/3Vcc=2/3Vcc. e-τ/t
TL = RB.C.ln2
TL = 0.69RB.C

T = TH + TL
T = 0.69(C)(RA+RB) + 0.69RB.C
T = 0.69.C.(RA + 2RB)

Also the duty cycle of the output square wave can be found as:

Duty Cycle=TH/TH+TL = RA+RB/RA+2RB

Note that the duty cycle will always be greater than 0.5(50%).It approaches to 0.5 if RA is
selected much smaller than RB.

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