Building a Shift Register

Building a Shift Register

Communication Protocols Technique

This technique can be used within any GreenPAK. The size of the shift register is dependent upon the components available within the specific GreenPAK.

Shift registers are a critical component for serializing or deserializing data. A shift register is a chain of flip-flops that can be sequentially linked and whose outputs can be individually accessed. Each has a connection to a shared clock; on the rising edge of the clock the registers will “shift” their data to the next flip-flop in the sequence. Figure 24 shows a basic, 4-bit shift register. The D flip-flops can be globally reset using a shared reset signal.

Figure 24 Basic Shift Register

Often, shift registers must be loaded within the GreenPAK. This can be done by adding a MUX standard logic cell before each DFF. When data is ready to be loaded the MUX select input (“S” in GreenPAK Designer) is toggled and the DFF clock input is triggered to commit the value for each register. Figure 25 shows the addition of a MUX on 2 of the bits in Figure 24’s basic shift register. LOAD_EN shares the clk input to commit the loaded values to DFF3 and DFF4.

Figure 25 Loading a Shift Register

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