For example for the sw command in MIPs, the control signal values are

ALUOp1: 0

ALUOp: 0

RegWrite: 0

MemRead: x

MemWrite: 1

Branch: 0

ALUsrc: 1

RegDest: x

MemToReg: x

Why do memRead, RegDest and MemToReg have the values of x? Why not just 0?


A control signal controls a single component in the architecture. When the command that is now active is not using the component this control signal controls, the control signal gets the "don't care" value.

The principle is that you don't want to restrict yourself for not using this component (=0 value), because any constraint will create a more complex logic inside the cycle. Instead you are freeing yourself from this choice by assigning the control signal with a "don't care" value, which means you can minimize the logic in the cycle and allowing the irrelevant component to work in the background (with no obvious bad consequences).

As you mentioned in your example, while using the sw command, you don't need to read anything from the memory. You could assign MemRead with the value 0, but why overkill it? It's easier to don't care if it reads data from the memory or not (it will read gibberish though), and RegWrite=0 (which in turn controls the writing of what was read from the memory) won't allow the use of this read anyway.


It just shows that the implementation works whether it is a zero or a one. If you were to write an assembler for MIPS ISA for example then you could allow those don't cares to be either zero or one. For the other values however it would matter.

  • $\begingroup$ You could think of it as an extra piece of information about the implementation of the opcode that you're considering. $\endgroup$ – Logan Leland Dec 15 '16 at 10:13

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