Lead Free Bump (LFB)

In the family of C4 solder bump, starting from Y1962 IBM high lead (Sn5Pb95) bump then people adopt eutectic bump (Sn63Pb37) for lower working temperature. For environment protection purpose, lead is not allowed to use in electronic industry gradually. LF bump (SnAg1.8) is now the main stream in solder bump and plays as the key process for flip chip with substrate and wafer level CSP on module assembly.


  1. Support various wafer size: 12-inch, 8-inch, 6-inch, 4-inch
  2. Electroplating solder with SnAg 1.8%
  3. 130 um to 200 um bump pitch with 70 to 100 um UBM size is feasible.
  4. Bump height can be as high as 100 um.
  5. Polyimide curing at 200°C(low temp) and 375°C(high temp) are both applicable for Memory and Logic device.
  6. Combine with Cu RDL to serve Wafer level CSP application, and Raytek may provide wide UBM size such as 240 um for thin WLCSP package. This is very important for low form factor WLCSP demand for portable devices.
  7. Provide WLCSP Turnkey Service, including Bumping, Test, Grinding, Dicing, Tape & Reel.

LF Bump Process Flow