import Foundation
// Decimal型の有効桁数は38桁
let line = readLine()!.components(separatedBy: " ").map { Decimal(string: $0)! }

for i in 0..<5 {
    if line[i] == 0 {
        print(i + 1)
        exit(EXIT_SUCCESS)
    }
}

; ModuleID = '/data/TheStack_IR/OJ_Samples/Collated/Swift/Source_137/llvm_OZ.ll'
source_filename = "/data/TheStack_IR/OJ_Samples/Collated/Swift/Source_137/llvm_OZ.ll"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%TSa = type <{ %Ts22_ContiguousArrayBufferV }>
%Ts22_ContiguousArrayBufferV = type <{ %Ts28__ContiguousArrayStorageBaseC* }>
%Ts28__ContiguousArrayStorageBaseC = type <{ %swift.refcounted, %Ts10_ArrayBodyV }>
%swift.refcounted = type { %swift.type*, i64 }
%swift.type = type { i64 }
%Ts10_ArrayBodyV = type <{ %TSo22_SwiftArrayBodyStorageV }>
%TSo22_SwiftArrayBodyStorageV = type <{ %TSi, %TSu }>
%TSi = type <{ i64 }>
%TSu = type <{ i64 }>
%struct._SwiftEmptyArrayStorage = type { %struct.HeapObject, %struct._SwiftArrayBodyStorage }
%struct.HeapObject = type { %struct.HeapMetadata*, %struct.InlineRefCountsPlaceholder }
%struct.HeapMetadata = type opaque
%struct.InlineRefCountsPlaceholder = type { i64 }
%struct._SwiftArrayBodyStorage = type { i64, i64 }
%swift.protocol_conformance_descriptor = type { i32, i32, i32, i32 }
%swift.type_descriptor = type opaque
%TSS = type <{ %Ts11_StringGutsV }>
%Ts11_StringGutsV = type <{ %Ts13_StringObjectV }>
%Ts13_StringObjectV = type <{ %Ts6UInt64V, %swift.bridge* }>
%Ts6UInt64V = type <{ i64 }>
%swift.bridge = type opaque
%Ts15ContiguousArrayV = type <{ %Ts22_ContiguousArrayBufferV }>
%swift.opaque = type opaque
%T10Foundation7DecimalV = type <{ %Ts4Int8V, %Ts5UInt8V, %Ts6UInt16V, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }> }>
%Ts4Int8V = type <{ i8 }>
%Ts5UInt8V = type <{ i8 }>
%Ts6UInt16V = type <{ i16 }>

@"$s7llvm_OZ4lineSay10Foundation7DecimalVGvp" = hidden local_unnamed_addr global %TSa zeroinitializer, align 8
@_swiftEmptyArrayStorage = external global %struct._SwiftEmptyArrayStorage, align 8
@"$sSSN" = external global %swift.type, align 8
@"$sS2SSysWL" = linkonce_odr hidden local_unnamed_addr global i8** null, align 8
@"$sSSSysMc" = external global %swift.protocol_conformance_descriptor, align 4
@"$ss23_ContiguousArrayStorageCMn" = external global %swift.type_descriptor, align 4
@"got.$ss23_ContiguousArrayStorageCMn" = private unnamed_addr constant %swift.type_descriptor* @"$ss23_ContiguousArrayStorageCMn"
@"symbolic _____yypG s23_ContiguousArrayStorageC" = linkonce_odr hidden constant <{ i8, i32, [4 x i8], i8 }> <{ i8 2, i32 trunc (i64 sub (i64 ptrtoint (%swift.type_descriptor** @"got.$ss23_ContiguousArrayStorageCMn" to i64), i64 ptrtoint (i32* getelementptr inbounds (<{ i8, i32, [4 x i8], i8 }>, <{ i8, i32, [4 x i8], i8 }>* @"symbolic _____yypG s23_ContiguousArrayStorageC", i32 0, i32 1) to i64)) to i32), [4 x i8] c"yypG", i8 0 }>, section "swift5_typeref", no_sanitize_address, align 2
@"$ss23_ContiguousArrayStorageCyypGMD" = linkonce_odr hidden global { i32, i32 } { i32 trunc (i64 sub (i64 ptrtoint (<{ i8, i32, [4 x i8], i8 }>* @"symbolic _____yypG s23_ContiguousArrayStorageC" to i64), i64 ptrtoint ({ i32, i32 }* @"$ss23_ContiguousArrayStorageCyypGMD" to i64)) to i32), i32 -9 }, align 8
@"$sSiN" = external global %swift.type, align 8
@"\01l_entry_point" = private constant { i32, i32 } { i32 trunc (i64 sub (i64 ptrtoint (i32 (i32, i8**)* @main to i64), i64 ptrtoint ({ i32, i32 }* @"\01l_entry_point" to i64)) to i32), i32 0 }, section "swift5_entry", align 4
@"$s10Foundation7DecimalVMn" = external global %swift.type_descriptor, align 4
@"got.$s10Foundation7DecimalVMn" = private unnamed_addr constant %swift.type_descriptor* @"$s10Foundation7DecimalVMn"
@"symbolic _____y_____G s23_ContiguousArrayStorageC 10Foundation7DecimalV" = linkonce_odr hidden constant <{ i8, i32, [1 x i8], i8, i32, [1 x i8], i8 }> <{ i8 2, i32 trunc (i64 sub (i64 ptrtoint (%swift.type_descriptor** @"got.$ss23_ContiguousArrayStorageCMn" to i64), i64 ptrtoint (i32* getelementptr inbounds (<{ i8, i32, [1 x i8], i8, i32, [1 x i8], i8 }>, <{ i8, i32, [1 x i8], i8, i32, [1 x i8], i8 }>* @"symbolic _____y_____G s23_ContiguousArrayStorageC 10Foundation7DecimalV", i32 0, i32 1) to i64)) to i32), [1 x i8] c"y", i8 2, i32 trunc (i64 sub (i64 ptrtoint (%swift.type_descriptor** @"got.$s10Foundation7DecimalVMn" to i64), i64 ptrtoint (i32* getelementptr inbounds (<{ i8, i32, [1 x i8], i8, i32, [1 x i8], i8 }>, <{ i8, i32, [1 x i8], i8, i32, [1 x i8], i8 }>* @"symbolic _____y_____G s23_ContiguousArrayStorageC 10Foundation7DecimalV", i32 0, i32 4) to i64)) to i32), [1 x i8] c"G", i8 0 }>, section "swift5_typeref", no_sanitize_address, align 2
@"$ss23_ContiguousArrayStorageCy10Foundation7DecimalVGMD" = linkonce_odr hidden global { i32, i32 } { i32 trunc (i64 sub (i64 ptrtoint (<{ i8, i32, [1 x i8], i8, i32, [1 x i8], i8 }>* @"symbolic _____y_____G s23_ContiguousArrayStorageC 10Foundation7DecimalV" to i64), i64 ptrtoint ({ i32, i32 }* @"$ss23_ContiguousArrayStorageCy10Foundation7DecimalVGMD" to i64)) to i32), i32 -12 }, align 8
@__swift_reflection_version = linkonce_odr hidden constant i16 3
@_swift1_autolink_entries = private constant [172 x i8] c"-lFoundation\00-lswiftCore\00-lswift_StringProcessing\00-lswift_RegexParser\00-lswift_Concurrency\00-lswiftGlibc\00-lm\00-lpthread\00-lutil\00-ldl\00-lswiftDispatch\00-ldispatch\00-lBlocksRuntime\00", section ".swift1_autolink_entries", no_sanitize_address, align 8
@llvm.compiler.used = appending global [4 x i8*] [i8* bitcast ({ i32, i32 }* @"\01l_entry_point" to i8*), i8* bitcast (i16* @__swift_reflection_version to i8*), i8* getelementptr inbounds ([172 x i8], [172 x i8]* @_swift1_autolink_entries, i32 0, i32 0), i8* bitcast (i32 (i32, i8**)* @main to i8*)], section "llvm.metadata"

; Function Attrs: minsize optsize
define protected i32 @main(i32 %0, i8** nocapture readnone %1) #0 {
entry:
  %2 = alloca %TSS, align 8
  %3 = alloca %TSS, align 8
  %4 = alloca %Ts15ContiguousArrayV, align 8
  %5 = tail call swiftcc { i64, i64 } @"$ss8readLine16strippingNewlineSSSgSb_tF"(i1 true)
  %6 = extractvalue { i64, i64 } %5, 1
  %7 = icmp eq i64 %6, 0
  br i1 %7, label %186, label %8

8:                                                ; preds = %entry
  %9 = extractvalue { i64, i64 } %5, 0
  %10 = inttoptr i64 %6 to %swift.bridge*
  %11 = bitcast %TSS* %2 to i8*
  call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull %11)
  %._guts._object._countAndFlagsBits._value = getelementptr inbounds %TSS, %TSS* %2, i64 0, i32 0, i32 0, i32 0, i32 0
  store i64 %9, i64* %._guts._object._countAndFlagsBits._value, align 8
  %._guts._object._object = getelementptr inbounds %TSS, %TSS* %2, i64 0, i32 0, i32 0, i32 1
  store %swift.bridge* %10, %swift.bridge** %._guts._object._object, align 8
  %12 = bitcast %TSS* %3 to i8*
  call void @llvm.lifetime.start.p0i8(i64 16, i8* nonnull %12)
  %._guts1._object._countAndFlagsBits._value = getelementptr inbounds %TSS, %TSS* %3, i64 0, i32 0, i32 0, i32 0, i32 0
  store i64 32, i64* %._guts1._object._countAndFlagsBits._value, align 8
  %._guts1._object._object = getelementptr inbounds %TSS, %TSS* %3, i64 0, i32 0, i32 0, i32 1
  store %swift.bridge* inttoptr (i64 -2233785415175766016 to %swift.bridge*), %swift.bridge** %._guts1._object._object, align 8
  %13 = bitcast %TSS* %3 to %swift.opaque*
  %14 = tail call i8** @"$sS2SSysWl"() #13
  %15 = bitcast %TSS* %2 to %swift.opaque*
  %16 = call swiftcc %Ts28__ContiguousArrayStorageBaseC* @"$sSy10FoundationE10components11separatedBySaySSGqd___tSyRd__lF"(%swift.opaque* noalias nocapture nonnull %13, %swift.type* nonnull @"$sSSN", %swift.type* nonnull @"$sSSN", i8** %14, i8** %14, %swift.opaque* noalias nocapture nonnull swiftself %15)
  tail call void @swift_bridgeObjectRelease(%swift.bridge* nonnull %10) #5
  call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull %12)
  call void @llvm.lifetime.end.p0i8(i64 16, i8* nonnull %11)
  %._storage.count._value = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %16, i64 0, i32 1, i32 0, i32 0, i32 0
  %17 = load i64, i64* %._storage.count._value, align 8, !range !6
  %18 = icmp eq i64 %17, 0
  br i1 %18, label %19, label %21

19:                                               ; preds = %8
  %20 = getelementptr %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %16, i64 0, i32 0
  tail call void @swift_release(%swift.refcounted* %20) #5
  br label %70

21:                                               ; preds = %8
  %22 = bitcast %Ts15ContiguousArrayV* %4 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %22)
  %._buffer._storage = getelementptr inbounds %Ts15ContiguousArrayV, %Ts15ContiguousArrayV* %4, i64 0, i32 0, i32 0
  store %Ts28__ContiguousArrayStorageBaseC* bitcast (%struct._SwiftEmptyArrayStorage* @_swiftEmptyArrayStorage to %Ts28__ContiguousArrayStorageBaseC*), %Ts28__ContiguousArrayStorageBaseC** %._buffer._storage, align 8
  call swiftcc void @"$ss15ContiguousArrayV16_createNewBuffer14bufferIsUnique15minimumCapacity13growForAppendySb_SiSbtF10Foundation7DecimalV_Tg5"(i1 false, i64 %17, i1 false, %Ts15ContiguousArrayV* nocapture nonnull swiftself dereferenceable(8) %4)
  %23 = load %Ts28__ContiguousArrayStorageBaseC*, %Ts28__ContiguousArrayStorageBaseC** %._buffer._storage, align 8
  %24 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %16, i64 1
  %tailaddr = bitcast %Ts28__ContiguousArrayStorageBaseC* %24 to %TSS*
  br label %25

25:                                               ; preds = %21, %63
  %26 = phi i64 [ 0, %21 ], [ %28, %63 ]
  %27 = phi %Ts28__ContiguousArrayStorageBaseC* [ %23, %21 ], [ %64, %63 ]
  %28 = add nuw nsw i64 %26, 1
  %._guts3._object._countAndFlagsBits._value = getelementptr inbounds %TSS, %TSS* %tailaddr, i64 %26, i32 0, i32 0, i32 0, i32 0
  %29 = load i64, i64* %._guts3._object._countAndFlagsBits._value, align 8
  %._guts3._object._object = getelementptr inbounds %TSS, %TSS* %tailaddr, i64 %26, i32 0, i32 0, i32 1
  %30 = load %swift.bridge*, %swift.bridge** %._guts3._object._object, align 8
  %31 = tail call %swift.bridge* @swift_bridgeObjectRetain(%swift.bridge* returned %30) #5
  %32 = tail call swiftcc { i64, i64, i64 } @"$s10Foundation7DecimalV6string6localeACSgSS_AA6LocaleVSgtcfC"(i64 %29, %swift.bridge* %30, i64 0, i8 0)
  %33 = extractvalue { i64, i64, i64 } %32, 2
  %34 = and i64 %33, 4294967296
  %.not = icmp eq i64 %34, 0
  br i1 %.not, label %35, label %187

35:                                               ; preds = %25
  %36 = extractvalue { i64, i64, i64 } %32, 1
  %37 = extractvalue { i64, i64, i64 } %32, 0
  %38 = trunc i64 %37 to i8
  %39 = lshr i64 %37, 8
  %40 = trunc i64 %39 to i8
  %41 = lshr i64 %37, 16
  %42 = trunc i64 %41 to i16
  %43 = lshr i64 %37, 32
  %44 = trunc i64 %43 to i16
  %45 = lshr i64 %37, 48
  %46 = trunc i64 %45 to i16
  %47 = trunc i64 %36 to i16
  %48 = lshr i64 %36, 16
  %49 = trunc i64 %48 to i16
  %50 = lshr i64 %36, 32
  %51 = trunc i64 %50 to i16
  %52 = lshr i64 %36, 48
  %53 = trunc i64 %52 to i16
  %54 = trunc i64 %33 to i16
  %55 = lshr i64 %33, 16
  %56 = trunc i64 %55 to i16
  store %Ts28__ContiguousArrayStorageBaseC* %27, %Ts28__ContiguousArrayStorageBaseC** %._buffer._storage, align 8
  %._storage5.count._value = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %27, i64 0, i32 1, i32 0, i32 0, i32 0
  %57 = load i64, i64* %._storage5.count._value, align 8, !range !6
  %._storage5._capacityAndFlags._value = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %27, i64 0, i32 1, i32 0, i32 1, i32 0
  %58 = load i64, i64* %._storage5._capacityAndFlags._value, align 8
  %59 = lshr i64 %58, 1
  %60 = add nuw nsw i64 %57, 1
  %.not322 = icmp ugt i64 %59, %57
  br i1 %.not322, label %63, label %61, !prof !7

61:                                               ; preds = %35
  %62 = icmp ugt i64 %58, 1
  call swiftcc void @"$ss15ContiguousArrayV16_createNewBuffer14bufferIsUnique15minimumCapacity13growForAppendySb_SiSbtF10Foundation7DecimalV_Tg5"(i1 %62, i64 %60, i1 true, %Ts15ContiguousArrayV* nocapture nonnull swiftself dereferenceable(8) %4)
  %.pre = load %Ts28__ContiguousArrayStorageBaseC*, %Ts28__ContiguousArrayStorageBaseC** %._buffer._storage, align 8
  br label %63

63:                                               ; preds = %35, %61
  %64 = phi %Ts28__ContiguousArrayStorageBaseC* [ %27, %35 ], [ %.pre, %61 ]
  %._storage6.count._value = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %64, i64 0, i32 1, i32 0, i32 0, i32 0
  store i64 %60, i64* %._storage6.count._value, align 8
  %65 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %64, i64 1
  %tailaddr7 = bitcast %Ts28__ContiguousArrayStorageBaseC* %65 to %T10Foundation7DecimalV*
  %.__exponent._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 0, i32 0
  store i8 %38, i8* %.__exponent._value, align 4
  %.__lengthAndFlags._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 1, i32 0
  store i8 %40, i8* %.__lengthAndFlags._value, align 1
  %.__reserved._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 2, i32 0
  store i16 %42, i16* %.__reserved._value, align 2
  %._mantissa.elt._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 0, i32 0
  store i16 %44, i16* %._mantissa.elt._value, align 4
  %._mantissa.elt8._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 1, i32 0
  store i16 %46, i16* %._mantissa.elt8._value, align 2
  %._mantissa.elt9._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 2, i32 0
  store i16 %47, i16* %._mantissa.elt9._value, align 4
  %._mantissa.elt10._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 3, i32 0
  store i16 %49, i16* %._mantissa.elt10._value, align 2
  %._mantissa.elt11._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 4, i32 0
  store i16 %51, i16* %._mantissa.elt11._value, align 4
  %._mantissa.elt12._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 5, i32 0
  store i16 %53, i16* %._mantissa.elt12._value, align 2
  %._mantissa.elt13._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 6, i32 0
  store i16 %54, i16* %._mantissa.elt13._value, align 4
  %._mantissa.elt14._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr7, i64 %57, i32 3, i32 7, i32 0
  store i16 %56, i16* %._mantissa.elt14._value, align 2
  %66 = icmp eq i64 %28, %17
  br i1 %66, label %67, label %25

67:                                               ; preds = %63
  %68 = getelementptr %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %16, i64 0, i32 0
  tail call void @swift_release(%swift.refcounted* %68) #5
  call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %22)
  br label %70

69:                                               ; preds = %103
  ret i32 0

70:                                               ; preds = %19, %67
  %71 = phi %Ts28__ContiguousArrayStorageBaseC* [ %64, %67 ], [ bitcast (%struct._SwiftEmptyArrayStorage* @_swiftEmptyArrayStorage to %Ts28__ContiguousArrayStorageBaseC*), %19 ]
  store %Ts28__ContiguousArrayStorageBaseC* %71, %Ts28__ContiguousArrayStorageBaseC** getelementptr inbounds (%TSa, %TSa* @"$s7llvm_OZ4lineSay10Foundation7DecimalVGvp", i64 0, i32 0, i32 0), align 8
  %._storage15.count._value = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 0, i32 1, i32 0, i32 0, i32 0
  %72 = load i64, i64* %._storage15.count._value, align 8, !range !6
  %.not323 = icmp eq i64 %72, 0
  br i1 %.not323, label %188, label %73, !prof !8

73:                                               ; preds = %70
  %74 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 1
  %tailaddr16 = bitcast %Ts28__ContiguousArrayStorageBaseC* %74 to %T10Foundation7DecimalV*
  %tailaddr16.__exponent._value = bitcast %Ts28__ContiguousArrayStorageBaseC* %74 to i8*
  %75 = load i8, i8* %tailaddr16.__exponent._value, align 8
  %tailaddr16.__lengthAndFlags._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 1, i32 0
  %76 = load i8, i8* %tailaddr16.__lengthAndFlags._value, align 1
  %tailaddr16.__reserved._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 2, i32 0
  %77 = load i16, i16* %tailaddr16.__reserved._value, align 2
  %tailaddr16._mantissa.elt._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 3, i32 0, i32 0
  %78 = load i16, i16* %tailaddr16._mantissa.elt._value, align 4
  %tailaddr16._mantissa.elt17._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 3, i32 1, i32 0
  %79 = load i16, i16* %tailaddr16._mantissa.elt17._value, align 2
  %tailaddr16._mantissa.elt18 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 1, i32 0, i32 1
  %tailaddr16._mantissa.elt18._value = bitcast i64* %tailaddr16._mantissa.elt18 to i16*
  %80 = load i16, i16* %tailaddr16._mantissa.elt18._value, align 4
  %tailaddr16._mantissa.elt19._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 3, i32 3, i32 0
  %81 = load i16, i16* %tailaddr16._mantissa.elt19._value, align 2
  %tailaddr16._mantissa.elt20._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 3, i32 4, i32 0
  %82 = load i16, i16* %tailaddr16._mantissa.elt20._value, align 4
  %tailaddr16._mantissa.elt21._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 3, i32 5, i32 0
  %83 = load i16, i16* %tailaddr16._mantissa.elt21._value, align 2
  %tailaddr16._mantissa.elt22 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 1, i32 1
  %tailaddr16._mantissa.elt22._value = bitcast %Ts10_ArrayBodyV* %tailaddr16._mantissa.elt22 to i16*
  %84 = load i16, i16* %tailaddr16._mantissa.elt22._value, align 4
  %tailaddr16._mantissa.elt23._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 0, i32 3, i32 7, i32 0
  %85 = load i16, i16* %tailaddr16._mantissa.elt23._value, align 2
  %86 = tail call swiftcc { i64, i64, i32 } @"$s10Foundation7DecimalV14integerLiteralACSi_tcfC"(i64 0)
  %87 = extractvalue { i64, i64, i32 } %86, 0
  %88 = extractvalue { i64, i64, i32 } %86, 1
  %89 = extractvalue { i64, i64, i32 } %86, 2
  %temp-coercion.coerced36.sroa.0.0.insert.ext = zext i8 %75 to i64
  %temp-coercion.coerced36.sroa.0.1.insert.ext = zext i8 %76 to i64
  %temp-coercion.coerced36.sroa.0.1.insert.shift = shl nuw nsw i64 %temp-coercion.coerced36.sroa.0.1.insert.ext, 8
  %temp-coercion.coerced36.sroa.0.1.insert.insert = or i64 %temp-coercion.coerced36.sroa.0.1.insert.shift, %temp-coercion.coerced36.sroa.0.0.insert.ext
  %temp-coercion.coerced36.sroa.0.2.insert.ext = zext i16 %77 to i64
  %temp-coercion.coerced36.sroa.0.2.insert.shift = shl nuw nsw i64 %temp-coercion.coerced36.sroa.0.2.insert.ext, 16
  %temp-coercion.coerced36.sroa.0.2.insert.insert = or i64 %temp-coercion.coerced36.sroa.0.1.insert.insert, %temp-coercion.coerced36.sroa.0.2.insert.shift
  %temp-coercion.coerced36.sroa.0.4.insert.ext = zext i16 %78 to i64
  %temp-coercion.coerced36.sroa.0.4.insert.shift = shl nuw nsw i64 %temp-coercion.coerced36.sroa.0.4.insert.ext, 32
  %temp-coercion.coerced36.sroa.0.4.insert.insert = or i64 %temp-coercion.coerced36.sroa.0.2.insert.insert, %temp-coercion.coerced36.sroa.0.4.insert.shift
  %temp-coercion.coerced36.sroa.0.6.insert.ext = zext i16 %79 to i64
  %temp-coercion.coerced36.sroa.0.6.insert.shift = shl nuw i64 %temp-coercion.coerced36.sroa.0.6.insert.ext, 48
  %temp-coercion.coerced36.sroa.0.6.insert.insert = or i64 %temp-coercion.coerced36.sroa.0.4.insert.insert, %temp-coercion.coerced36.sroa.0.6.insert.shift
  %temp-coercion.coerced36.sroa.8.8.insert.ext = zext i16 %80 to i64
  %temp-coercion.coerced36.sroa.8.10.insert.ext = zext i16 %81 to i64
  %temp-coercion.coerced36.sroa.8.10.insert.shift = shl nuw nsw i64 %temp-coercion.coerced36.sroa.8.10.insert.ext, 16
  %temp-coercion.coerced36.sroa.8.10.insert.insert = or i64 %temp-coercion.coerced36.sroa.8.10.insert.shift, %temp-coercion.coerced36.sroa.8.8.insert.ext
  %temp-coercion.coerced36.sroa.8.12.insert.ext = zext i16 %82 to i64
  %temp-coercion.coerced36.sroa.8.12.insert.shift = shl nuw nsw i64 %temp-coercion.coerced36.sroa.8.12.insert.ext, 32
  %temp-coercion.coerced36.sroa.8.12.insert.insert = or i64 %temp-coercion.coerced36.sroa.8.10.insert.insert, %temp-coercion.coerced36.sroa.8.12.insert.shift
  %temp-coercion.coerced36.sroa.8.14.insert.ext = zext i16 %83 to i64
  %temp-coercion.coerced36.sroa.8.14.insert.shift = shl nuw i64 %temp-coercion.coerced36.sroa.8.14.insert.ext, 48
  %temp-coercion.coerced36.sroa.8.14.insert.insert = or i64 %temp-coercion.coerced36.sroa.8.12.insert.insert, %temp-coercion.coerced36.sroa.8.14.insert.shift
  %temp-coercion.coerced36.sroa.13.16.insert.ext = zext i16 %84 to i32
  %temp-coercion.coerced36.sroa.13.18.insert.ext = zext i16 %85 to i32
  %temp-coercion.coerced36.sroa.13.18.insert.shift = shl nuw i32 %temp-coercion.coerced36.sroa.13.18.insert.ext, 16
  %temp-coercion.coerced36.sroa.13.18.insert.insert = or i32 %temp-coercion.coerced36.sroa.13.18.insert.shift, %temp-coercion.coerced36.sroa.13.16.insert.ext
  %90 = tail call swiftcc i1 @"$s10Foundation7DecimalV2eeoiySbAC_ACtFZ"(i64 %temp-coercion.coerced36.sroa.0.6.insert.insert, i64 %temp-coercion.coerced36.sroa.8.14.insert.insert, i32 %temp-coercion.coerced36.sroa.13.18.insert.insert, i64 %87, i64 %88, i32 %89)
  br i1 %90, label %91, label %165

91:                                               ; preds = %168, %146, %125, %103, %73
  %92 = phi i64 [ 1, %73 ], [ 5, %103 ], [ 4, %125 ], [ 3, %146 ], [ 2, %168 ]
  %93 = tail call %swift.type* @__swift_instantiateConcreteTypeFromMangledName({ i32, i32 }* nonnull @"$ss23_ContiguousArrayStorageCyypGMD") #14
  %94 = tail call noalias %swift.refcounted* @swift_allocObject(%swift.type* %93, i64 64, i64 7) #5
  %95 = bitcast %swift.refcounted* %94 to %Ts28__ContiguousArrayStorageBaseC*
  %96 = getelementptr inbounds %swift.refcounted, %swift.refcounted* %94, i64 1
  %._storage248.count._value = bitcast %swift.refcounted* %96 to i64*
  store i64 1, i64* %._storage248.count._value, align 8
  %._storage248._capacityAndFlags = getelementptr inbounds %swift.refcounted, %swift.refcounted* %94, i64 1, i32 1
  store i64 2, i64* %._storage248._capacityAndFlags, align 8
  %97 = getelementptr inbounds %swift.refcounted, %swift.refcounted* %94, i64 2
  %98 = getelementptr inbounds %swift.refcounted, %swift.refcounted* %94, i64 3, i32 1
  %99 = bitcast i64* %98 to %swift.type**
  store %swift.type* @"$sSiN", %swift.type** %99, align 8
  %._value = bitcast %swift.refcounted* %97 to i64*
  store i64 %92, i64* %._value, align 8
  tail call swiftcc void @"$ss5print_9separator10terminatoryypd_S2StF"(%Ts28__ContiguousArrayStorageBaseC* %95, i64 32, %swift.bridge* nonnull inttoptr (i64 -2233785415175766016 to %swift.bridge*), i64 10, %swift.bridge* nonnull inttoptr (i64 -2233785415175766016 to %swift.bridge*))
  tail call void @swift_release(%swift.refcounted* %94) #5
  tail call void @exit(i32 0)
  unreachable

100:                                              ; preds = %125
  %101 = load i64, i64* %._storage15.count._value, align 8, !range !6
  %102 = icmp ult i64 %101, 5
  br i1 %102, label %192, label %103, !prof !8

103:                                              ; preds = %100
  %104 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 3, i32 1
  %105 = bitcast %Ts10_ArrayBodyV* %104 to %T10Foundation7DecimalV*
  %.__exponent201._value = bitcast %Ts10_ArrayBodyV* %104 to i8*
  %106 = load i8, i8* %.__exponent201._value, align 8
  %.__lengthAndFlags202._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 1, i32 0
  %107 = load i8, i8* %.__lengthAndFlags202._value, align 1
  %.__reserved203._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 2, i32 0
  %108 = load i16, i16* %.__reserved203._value, align 2
  %._mantissa204.elt._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 3, i32 0, i32 0
  %109 = load i16, i16* %._mantissa204.elt._value, align 4
  %._mantissa204.elt205._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 3, i32 1, i32 0
  %110 = load i16, i16* %._mantissa204.elt205._value, align 2
  %._mantissa204.elt206 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 3, i32 1, i32 0, i32 1
  %._mantissa204.elt206._value = bitcast %TSu* %._mantissa204.elt206 to i16*
  %111 = load i16, i16* %._mantissa204.elt206._value, align 4
  %._mantissa204.elt207._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 3, i32 3, i32 0
  %112 = load i16, i16* %._mantissa204.elt207._value, align 2
  %._mantissa204.elt208._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 3, i32 4, i32 0
  %113 = load i16, i16* %._mantissa204.elt208._value, align 4
  %._mantissa204.elt209._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 3, i32 5, i32 0
  %114 = load i16, i16* %._mantissa204.elt209._value, align 2
  %._mantissa204.elt210 = getelementptr inbounds %Ts10_ArrayBodyV, %Ts10_ArrayBodyV* %104, i64 1
  %._mantissa204.elt210._value = bitcast %Ts10_ArrayBodyV* %._mantissa204.elt210 to i16*
  %115 = load i16, i16* %._mantissa204.elt210._value, align 4
  %._mantissa204.elt211._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %105, i64 0, i32 3, i32 7, i32 0
  %116 = load i16, i16* %._mantissa204.elt211._value, align 2
  %117 = tail call swiftcc { i64, i64, i32 } @"$s10Foundation7DecimalV14integerLiteralACSi_tcfC"(i64 0)
  %118 = extractvalue { i64, i64, i32 } %117, 0
  %119 = extractvalue { i64, i64, i32 } %117, 1
  %120 = extractvalue { i64, i64, i32 } %117, 2
  %temp-coercion.coerced224.sroa.0.0.insert.ext = zext i8 %106 to i64
  %temp-coercion.coerced224.sroa.0.1.insert.ext = zext i8 %107 to i64
  %temp-coercion.coerced224.sroa.0.1.insert.shift = shl nuw nsw i64 %temp-coercion.coerced224.sroa.0.1.insert.ext, 8
  %temp-coercion.coerced224.sroa.0.1.insert.insert = or i64 %temp-coercion.coerced224.sroa.0.1.insert.shift, %temp-coercion.coerced224.sroa.0.0.insert.ext
  %temp-coercion.coerced224.sroa.0.2.insert.ext = zext i16 %108 to i64
  %temp-coercion.coerced224.sroa.0.2.insert.shift = shl nuw nsw i64 %temp-coercion.coerced224.sroa.0.2.insert.ext, 16
  %temp-coercion.coerced224.sroa.0.2.insert.insert = or i64 %temp-coercion.coerced224.sroa.0.1.insert.insert, %temp-coercion.coerced224.sroa.0.2.insert.shift
  %temp-coercion.coerced224.sroa.0.4.insert.ext = zext i16 %109 to i64
  %temp-coercion.coerced224.sroa.0.4.insert.shift = shl nuw nsw i64 %temp-coercion.coerced224.sroa.0.4.insert.ext, 32
  %temp-coercion.coerced224.sroa.0.4.insert.insert = or i64 %temp-coercion.coerced224.sroa.0.2.insert.insert, %temp-coercion.coerced224.sroa.0.4.insert.shift
  %temp-coercion.coerced224.sroa.0.6.insert.ext = zext i16 %110 to i64
  %temp-coercion.coerced224.sroa.0.6.insert.shift = shl nuw i64 %temp-coercion.coerced224.sroa.0.6.insert.ext, 48
  %temp-coercion.coerced224.sroa.0.6.insert.insert = or i64 %temp-coercion.coerced224.sroa.0.4.insert.insert, %temp-coercion.coerced224.sroa.0.6.insert.shift
  %temp-coercion.coerced224.sroa.8.8.insert.ext = zext i16 %111 to i64
  %temp-coercion.coerced224.sroa.8.10.insert.ext = zext i16 %112 to i64
  %temp-coercion.coerced224.sroa.8.10.insert.shift = shl nuw nsw i64 %temp-coercion.coerced224.sroa.8.10.insert.ext, 16
  %temp-coercion.coerced224.sroa.8.10.insert.insert = or i64 %temp-coercion.coerced224.sroa.8.10.insert.shift, %temp-coercion.coerced224.sroa.8.8.insert.ext
  %temp-coercion.coerced224.sroa.8.12.insert.ext = zext i16 %113 to i64
  %temp-coercion.coerced224.sroa.8.12.insert.shift = shl nuw nsw i64 %temp-coercion.coerced224.sroa.8.12.insert.ext, 32
  %temp-coercion.coerced224.sroa.8.12.insert.insert = or i64 %temp-coercion.coerced224.sroa.8.10.insert.insert, %temp-coercion.coerced224.sroa.8.12.insert.shift
  %temp-coercion.coerced224.sroa.8.14.insert.ext = zext i16 %114 to i64
  %temp-coercion.coerced224.sroa.8.14.insert.shift = shl nuw i64 %temp-coercion.coerced224.sroa.8.14.insert.ext, 48
  %temp-coercion.coerced224.sroa.8.14.insert.insert = or i64 %temp-coercion.coerced224.sroa.8.12.insert.insert, %temp-coercion.coerced224.sroa.8.14.insert.shift
  %temp-coercion.coerced224.sroa.13.16.insert.ext = zext i16 %115 to i32
  %temp-coercion.coerced224.sroa.13.18.insert.ext = zext i16 %116 to i32
  %temp-coercion.coerced224.sroa.13.18.insert.shift = shl nuw i32 %temp-coercion.coerced224.sroa.13.18.insert.ext, 16
  %temp-coercion.coerced224.sroa.13.18.insert.insert = or i32 %temp-coercion.coerced224.sroa.13.18.insert.shift, %temp-coercion.coerced224.sroa.13.16.insert.ext
  %121 = tail call swiftcc i1 @"$s10Foundation7DecimalV2eeoiySbAC_ACtFZ"(i64 %temp-coercion.coerced224.sroa.0.6.insert.insert, i64 %temp-coercion.coerced224.sroa.8.14.insert.insert, i32 %temp-coercion.coerced224.sroa.13.18.insert.insert, i64 %118, i64 %119, i32 %120)
  br i1 %121, label %91, label %69

122:                                              ; preds = %146
  %123 = load i64, i64* %._storage15.count._value, align 8, !range !6
  %124 = icmp ult i64 %123, 4
  br i1 %124, label %191, label %125, !prof !8

125:                                              ; preds = %122
  %.__exponent154._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 3, i32 0, i32 0
  %126 = load i8, i8* %.__exponent154._value, align 4
  %.__lengthAndFlags155._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 3, i32 1, i32 0
  %127 = load i8, i8* %.__lengthAndFlags155._value, align 1
  %.__reserved156._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 3, i32 2, i32 0
  %128 = load i16, i16* %.__reserved156._value, align 2
  %._mantissa157 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 3
  %129 = bitcast %Ts28__ContiguousArrayStorageBaseC* %._mantissa157 to <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>*
  %._mantissa157.elt._value = bitcast %Ts28__ContiguousArrayStorageBaseC* %._mantissa157 to i16*
  %130 = load i16, i16* %._mantissa157.elt._value, align 4
  %._mantissa157.elt158._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %129, i64 0, i32 1, i32 0
  %131 = load i16, i16* %._mantissa157.elt158._value, align 2
  %._mantissa157.elt159._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %129, i64 0, i32 2, i32 0
  %132 = load i16, i16* %._mantissa157.elt159._value, align 4
  %._mantissa157.elt160._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %129, i64 0, i32 3, i32 0
  %133 = load i16, i16* %._mantissa157.elt160._value, align 2
  %._mantissa157.elt161 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 3, i32 0, i32 1
  %._mantissa157.elt161._value = bitcast i64* %._mantissa157.elt161 to i16*
  %134 = load i16, i16* %._mantissa157.elt161._value, align 4
  %._mantissa157.elt162._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %129, i64 0, i32 5, i32 0
  %135 = load i16, i16* %._mantissa157.elt162._value, align 2
  %._mantissa157.elt163._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %129, i64 0, i32 6, i32 0
  %136 = load i16, i16* %._mantissa157.elt163._value, align 4
  %._mantissa157.elt164._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %129, i64 0, i32 7, i32 0
  %137 = load i16, i16* %._mantissa157.elt164._value, align 2
  %138 = tail call swiftcc { i64, i64, i32 } @"$s10Foundation7DecimalV14integerLiteralACSi_tcfC"(i64 0)
  %139 = extractvalue { i64, i64, i32 } %138, 0
  %140 = extractvalue { i64, i64, i32 } %138, 1
  %141 = extractvalue { i64, i64, i32 } %138, 2
  %temp-coercion.coerced177.sroa.0.0.insert.ext = zext i8 %126 to i64
  %temp-coercion.coerced177.sroa.0.1.insert.ext = zext i8 %127 to i64
  %temp-coercion.coerced177.sroa.0.1.insert.shift = shl nuw nsw i64 %temp-coercion.coerced177.sroa.0.1.insert.ext, 8
  %temp-coercion.coerced177.sroa.0.1.insert.insert = or i64 %temp-coercion.coerced177.sroa.0.1.insert.shift, %temp-coercion.coerced177.sroa.0.0.insert.ext
  %temp-coercion.coerced177.sroa.0.2.insert.ext = zext i16 %128 to i64
  %temp-coercion.coerced177.sroa.0.2.insert.shift = shl nuw nsw i64 %temp-coercion.coerced177.sroa.0.2.insert.ext, 16
  %temp-coercion.coerced177.sroa.0.2.insert.insert = or i64 %temp-coercion.coerced177.sroa.0.1.insert.insert, %temp-coercion.coerced177.sroa.0.2.insert.shift
  %temp-coercion.coerced177.sroa.0.4.insert.ext = zext i16 %130 to i64
  %temp-coercion.coerced177.sroa.0.4.insert.shift = shl nuw nsw i64 %temp-coercion.coerced177.sroa.0.4.insert.ext, 32
  %temp-coercion.coerced177.sroa.0.4.insert.insert = or i64 %temp-coercion.coerced177.sroa.0.2.insert.insert, %temp-coercion.coerced177.sroa.0.4.insert.shift
  %temp-coercion.coerced177.sroa.0.6.insert.ext = zext i16 %131 to i64
  %temp-coercion.coerced177.sroa.0.6.insert.shift = shl nuw i64 %temp-coercion.coerced177.sroa.0.6.insert.ext, 48
  %temp-coercion.coerced177.sroa.0.6.insert.insert = or i64 %temp-coercion.coerced177.sroa.0.4.insert.insert, %temp-coercion.coerced177.sroa.0.6.insert.shift
  %temp-coercion.coerced177.sroa.8.8.insert.ext = zext i16 %132 to i64
  %temp-coercion.coerced177.sroa.8.10.insert.ext = zext i16 %133 to i64
  %temp-coercion.coerced177.sroa.8.10.insert.shift = shl nuw nsw i64 %temp-coercion.coerced177.sroa.8.10.insert.ext, 16
  %temp-coercion.coerced177.sroa.8.10.insert.insert = or i64 %temp-coercion.coerced177.sroa.8.10.insert.shift, %temp-coercion.coerced177.sroa.8.8.insert.ext
  %temp-coercion.coerced177.sroa.8.12.insert.ext = zext i16 %134 to i64
  %temp-coercion.coerced177.sroa.8.12.insert.shift = shl nuw nsw i64 %temp-coercion.coerced177.sroa.8.12.insert.ext, 32
  %temp-coercion.coerced177.sroa.8.12.insert.insert = or i64 %temp-coercion.coerced177.sroa.8.10.insert.insert, %temp-coercion.coerced177.sroa.8.12.insert.shift
  %temp-coercion.coerced177.sroa.8.14.insert.ext = zext i16 %135 to i64
  %temp-coercion.coerced177.sroa.8.14.insert.shift = shl nuw i64 %temp-coercion.coerced177.sroa.8.14.insert.ext, 48
  %temp-coercion.coerced177.sroa.8.14.insert.insert = or i64 %temp-coercion.coerced177.sroa.8.12.insert.insert, %temp-coercion.coerced177.sroa.8.14.insert.shift
  %temp-coercion.coerced177.sroa.13.16.insert.ext = zext i16 %136 to i32
  %temp-coercion.coerced177.sroa.13.18.insert.ext = zext i16 %137 to i32
  %temp-coercion.coerced177.sroa.13.18.insert.shift = shl nuw i32 %temp-coercion.coerced177.sroa.13.18.insert.ext, 16
  %temp-coercion.coerced177.sroa.13.18.insert.insert = or i32 %temp-coercion.coerced177.sroa.13.18.insert.shift, %temp-coercion.coerced177.sroa.13.16.insert.ext
  %142 = tail call swiftcc i1 @"$s10Foundation7DecimalV2eeoiySbAC_ACtFZ"(i64 %temp-coercion.coerced177.sroa.0.6.insert.insert, i64 %temp-coercion.coerced177.sroa.8.14.insert.insert, i32 %temp-coercion.coerced177.sroa.13.18.insert.insert, i64 %139, i64 %140, i32 %141)
  br i1 %142, label %91, label %100

143:                                              ; preds = %168
  %144 = load i64, i64* %._storage15.count._value, align 8, !range !6
  %145 = icmp ult i64 %144, 3
  br i1 %145, label %190, label %146, !prof !8

146:                                              ; preds = %143
  %147 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 2, i32 0, i32 1
  %148 = bitcast i64* %147 to %T10Foundation7DecimalV*
  %.__exponent107._value = bitcast i64* %147 to i8*
  %149 = load i8, i8* %.__exponent107._value, align 8
  %.__lengthAndFlags108._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 1, i32 0
  %150 = load i8, i8* %.__lengthAndFlags108._value, align 1
  %.__reserved109._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 2, i32 0
  %151 = load i16, i16* %.__reserved109._value, align 2
  %._mantissa110.elt._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 3, i32 0, i32 0
  %152 = load i16, i16* %._mantissa110.elt._value, align 4
  %._mantissa110.elt111._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 3, i32 1, i32 0
  %153 = load i16, i16* %._mantissa110.elt111._value, align 2
  %._mantissa110.elt112 = getelementptr inbounds i64, i64* %147, i64 1
  %._mantissa110.elt112._value = bitcast i64* %._mantissa110.elt112 to i16*
  %154 = load i16, i16* %._mantissa110.elt112._value, align 4
  %._mantissa110.elt113._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 3, i32 3, i32 0
  %155 = load i16, i16* %._mantissa110.elt113._value, align 2
  %._mantissa110.elt114._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 3, i32 4, i32 0
  %156 = load i16, i16* %._mantissa110.elt114._value, align 4
  %._mantissa110.elt115._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 3, i32 5, i32 0
  %157 = load i16, i16* %._mantissa110.elt115._value, align 2
  %._mantissa110.elt116 = getelementptr inbounds i64, i64* %147, i64 2
  %._mantissa110.elt116._value = bitcast i64* %._mantissa110.elt116 to i16*
  %158 = load i16, i16* %._mantissa110.elt116._value, align 4
  %._mantissa110.elt117._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %148, i64 0, i32 3, i32 7, i32 0
  %159 = load i16, i16* %._mantissa110.elt117._value, align 2
  %160 = tail call swiftcc { i64, i64, i32 } @"$s10Foundation7DecimalV14integerLiteralACSi_tcfC"(i64 0)
  %161 = extractvalue { i64, i64, i32 } %160, 0
  %162 = extractvalue { i64, i64, i32 } %160, 1
  %163 = extractvalue { i64, i64, i32 } %160, 2
  %temp-coercion.coerced130.sroa.0.0.insert.ext = zext i8 %149 to i64
  %temp-coercion.coerced130.sroa.0.1.insert.ext = zext i8 %150 to i64
  %temp-coercion.coerced130.sroa.0.1.insert.shift = shl nuw nsw i64 %temp-coercion.coerced130.sroa.0.1.insert.ext, 8
  %temp-coercion.coerced130.sroa.0.1.insert.insert = or i64 %temp-coercion.coerced130.sroa.0.1.insert.shift, %temp-coercion.coerced130.sroa.0.0.insert.ext
  %temp-coercion.coerced130.sroa.0.2.insert.ext = zext i16 %151 to i64
  %temp-coercion.coerced130.sroa.0.2.insert.shift = shl nuw nsw i64 %temp-coercion.coerced130.sroa.0.2.insert.ext, 16
  %temp-coercion.coerced130.sroa.0.2.insert.insert = or i64 %temp-coercion.coerced130.sroa.0.1.insert.insert, %temp-coercion.coerced130.sroa.0.2.insert.shift
  %temp-coercion.coerced130.sroa.0.4.insert.ext = zext i16 %152 to i64
  %temp-coercion.coerced130.sroa.0.4.insert.shift = shl nuw nsw i64 %temp-coercion.coerced130.sroa.0.4.insert.ext, 32
  %temp-coercion.coerced130.sroa.0.4.insert.insert = or i64 %temp-coercion.coerced130.sroa.0.2.insert.insert, %temp-coercion.coerced130.sroa.0.4.insert.shift
  %temp-coercion.coerced130.sroa.0.6.insert.ext = zext i16 %153 to i64
  %temp-coercion.coerced130.sroa.0.6.insert.shift = shl nuw i64 %temp-coercion.coerced130.sroa.0.6.insert.ext, 48
  %temp-coercion.coerced130.sroa.0.6.insert.insert = or i64 %temp-coercion.coerced130.sroa.0.4.insert.insert, %temp-coercion.coerced130.sroa.0.6.insert.shift
  %temp-coercion.coerced130.sroa.8.8.insert.ext = zext i16 %154 to i64
  %temp-coercion.coerced130.sroa.8.10.insert.ext = zext i16 %155 to i64
  %temp-coercion.coerced130.sroa.8.10.insert.shift = shl nuw nsw i64 %temp-coercion.coerced130.sroa.8.10.insert.ext, 16
  %temp-coercion.coerced130.sroa.8.10.insert.insert = or i64 %temp-coercion.coerced130.sroa.8.10.insert.shift, %temp-coercion.coerced130.sroa.8.8.insert.ext
  %temp-coercion.coerced130.sroa.8.12.insert.ext = zext i16 %156 to i64
  %temp-coercion.coerced130.sroa.8.12.insert.shift = shl nuw nsw i64 %temp-coercion.coerced130.sroa.8.12.insert.ext, 32
  %temp-coercion.coerced130.sroa.8.12.insert.insert = or i64 %temp-coercion.coerced130.sroa.8.10.insert.insert, %temp-coercion.coerced130.sroa.8.12.insert.shift
  %temp-coercion.coerced130.sroa.8.14.insert.ext = zext i16 %157 to i64
  %temp-coercion.coerced130.sroa.8.14.insert.shift = shl nuw i64 %temp-coercion.coerced130.sroa.8.14.insert.ext, 48
  %temp-coercion.coerced130.sroa.8.14.insert.insert = or i64 %temp-coercion.coerced130.sroa.8.12.insert.insert, %temp-coercion.coerced130.sroa.8.14.insert.shift
  %temp-coercion.coerced130.sroa.13.16.insert.ext = zext i16 %158 to i32
  %temp-coercion.coerced130.sroa.13.18.insert.ext = zext i16 %159 to i32
  %temp-coercion.coerced130.sroa.13.18.insert.shift = shl nuw i32 %temp-coercion.coerced130.sroa.13.18.insert.ext, 16
  %temp-coercion.coerced130.sroa.13.18.insert.insert = or i32 %temp-coercion.coerced130.sroa.13.18.insert.shift, %temp-coercion.coerced130.sroa.13.16.insert.ext
  %164 = tail call swiftcc i1 @"$s10Foundation7DecimalV2eeoiySbAC_ACtFZ"(i64 %temp-coercion.coerced130.sroa.0.6.insert.insert, i64 %temp-coercion.coerced130.sroa.8.14.insert.insert, i32 %temp-coercion.coerced130.sroa.13.18.insert.insert, i64 %161, i64 %162, i32 %163)
  br i1 %164, label %91, label %122

165:                                              ; preds = %73
  %166 = load i64, i64* %._storage15.count._value, align 8, !range !6
  %167 = icmp ult i64 %166, 2
  br i1 %167, label %189, label %168, !prof !8

168:                                              ; preds = %165
  %.__exponent60._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 1, i32 0, i32 0
  %169 = load i8, i8* %.__exponent60._value, align 4
  %.__lengthAndFlags61._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 1, i32 1, i32 0
  %170 = load i8, i8* %.__lengthAndFlags61._value, align 1
  %.__reserved62._value = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %tailaddr16, i64 1, i32 2, i32 0
  %171 = load i16, i16* %.__reserved62._value, align 2
  %._mantissa63 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %71, i64 1, i32 1, i32 0, i32 1
  %172 = bitcast %TSu* %._mantissa63 to <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>*
  %._mantissa63.elt._value = bitcast %TSu* %._mantissa63 to i16*
  %173 = load i16, i16* %._mantissa63.elt._value, align 4
  %._mantissa63.elt64._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %172, i64 0, i32 1, i32 0
  %174 = load i16, i16* %._mantissa63.elt64._value, align 2
  %._mantissa63.elt65._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %172, i64 0, i32 2, i32 0
  %175 = load i16, i16* %._mantissa63.elt65._value, align 4
  %._mantissa63.elt66._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %172, i64 0, i32 3, i32 0
  %176 = load i16, i16* %._mantissa63.elt66._value, align 2
  %._mantissa63.elt67 = getelementptr inbounds %TSu, %TSu* %._mantissa63, i64 1
  %._mantissa63.elt67._value = bitcast %TSu* %._mantissa63.elt67 to i16*
  %177 = load i16, i16* %._mantissa63.elt67._value, align 4
  %._mantissa63.elt68._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %172, i64 0, i32 5, i32 0
  %178 = load i16, i16* %._mantissa63.elt68._value, align 2
  %._mantissa63.elt69._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %172, i64 0, i32 6, i32 0
  %179 = load i16, i16* %._mantissa63.elt69._value, align 4
  %._mantissa63.elt70._value = getelementptr inbounds <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>, <{ %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V, %Ts6UInt16V }>* %172, i64 0, i32 7, i32 0
  %180 = load i16, i16* %._mantissa63.elt70._value, align 2
  %181 = tail call swiftcc { i64, i64, i32 } @"$s10Foundation7DecimalV14integerLiteralACSi_tcfC"(i64 0)
  %182 = extractvalue { i64, i64, i32 } %181, 0
  %183 = extractvalue { i64, i64, i32 } %181, 1
  %184 = extractvalue { i64, i64, i32 } %181, 2
  %temp-coercion.coerced83.sroa.0.0.insert.ext = zext i8 %169 to i64
  %temp-coercion.coerced83.sroa.0.1.insert.ext = zext i8 %170 to i64
  %temp-coercion.coerced83.sroa.0.1.insert.shift = shl nuw nsw i64 %temp-coercion.coerced83.sroa.0.1.insert.ext, 8
  %temp-coercion.coerced83.sroa.0.1.insert.insert = or i64 %temp-coercion.coerced83.sroa.0.1.insert.shift, %temp-coercion.coerced83.sroa.0.0.insert.ext
  %temp-coercion.coerced83.sroa.0.2.insert.ext = zext i16 %171 to i64
  %temp-coercion.coerced83.sroa.0.2.insert.shift = shl nuw nsw i64 %temp-coercion.coerced83.sroa.0.2.insert.ext, 16
  %temp-coercion.coerced83.sroa.0.2.insert.insert = or i64 %temp-coercion.coerced83.sroa.0.1.insert.insert, %temp-coercion.coerced83.sroa.0.2.insert.shift
  %temp-coercion.coerced83.sroa.0.4.insert.ext = zext i16 %173 to i64
  %temp-coercion.coerced83.sroa.0.4.insert.shift = shl nuw nsw i64 %temp-coercion.coerced83.sroa.0.4.insert.ext, 32
  %temp-coercion.coerced83.sroa.0.4.insert.insert = or i64 %temp-coercion.coerced83.sroa.0.2.insert.insert, %temp-coercion.coerced83.sroa.0.4.insert.shift
  %temp-coercion.coerced83.sroa.0.6.insert.ext = zext i16 %174 to i64
  %temp-coercion.coerced83.sroa.0.6.insert.shift = shl nuw i64 %temp-coercion.coerced83.sroa.0.6.insert.ext, 48
  %temp-coercion.coerced83.sroa.0.6.insert.insert = or i64 %temp-coercion.coerced83.sroa.0.4.insert.insert, %temp-coercion.coerced83.sroa.0.6.insert.shift
  %temp-coercion.coerced83.sroa.8.8.insert.ext = zext i16 %175 to i64
  %temp-coercion.coerced83.sroa.8.10.insert.ext = zext i16 %176 to i64
  %temp-coercion.coerced83.sroa.8.10.insert.shift = shl nuw nsw i64 %temp-coercion.coerced83.sroa.8.10.insert.ext, 16
  %temp-coercion.coerced83.sroa.8.10.insert.insert = or i64 %temp-coercion.coerced83.sroa.8.10.insert.shift, %temp-coercion.coerced83.sroa.8.8.insert.ext
  %temp-coercion.coerced83.sroa.8.12.insert.ext = zext i16 %177 to i64
  %temp-coercion.coerced83.sroa.8.12.insert.shift = shl nuw nsw i64 %temp-coercion.coerced83.sroa.8.12.insert.ext, 32
  %temp-coercion.coerced83.sroa.8.12.insert.insert = or i64 %temp-coercion.coerced83.sroa.8.10.insert.insert, %temp-coercion.coerced83.sroa.8.12.insert.shift
  %temp-coercion.coerced83.sroa.8.14.insert.ext = zext i16 %178 to i64
  %temp-coercion.coerced83.sroa.8.14.insert.shift = shl nuw i64 %temp-coercion.coerced83.sroa.8.14.insert.ext, 48
  %temp-coercion.coerced83.sroa.8.14.insert.insert = or i64 %temp-coercion.coerced83.sroa.8.12.insert.insert, %temp-coercion.coerced83.sroa.8.14.insert.shift
  %temp-coercion.coerced83.sroa.13.16.insert.ext = zext i16 %179 to i32
  %temp-coercion.coerced83.sroa.13.18.insert.ext = zext i16 %180 to i32
  %temp-coercion.coerced83.sroa.13.18.insert.shift = shl nuw i32 %temp-coercion.coerced83.sroa.13.18.insert.ext, 16
  %temp-coercion.coerced83.sroa.13.18.insert.insert = or i32 %temp-coercion.coerced83.sroa.13.18.insert.shift, %temp-coercion.coerced83.sroa.13.16.insert.ext
  %185 = tail call swiftcc i1 @"$s10Foundation7DecimalV2eeoiySbAC_ACtFZ"(i64 %temp-coercion.coerced83.sroa.0.6.insert.insert, i64 %temp-coercion.coerced83.sroa.8.14.insert.insert, i32 %temp-coercion.coerced83.sroa.13.18.insert.insert, i64 %182, i64 %183, i32 %184)
  br i1 %185, label %91, label %143

186:                                              ; preds = %entry
  tail call void asm sideeffect "", "n"(i32 0) #5
  tail call void @llvm.trap()
  unreachable

187:                                              ; preds = %25
  tail call void asm sideeffect "", "n"(i32 3) #5
  tail call void @llvm.trap()
  unreachable

188:                                              ; preds = %70
  tail call void asm sideeffect "", "n"(i32 4) #5
  tail call void @llvm.trap()
  unreachable

189:                                              ; preds = %165
  tail call void asm sideeffect "", "n"(i32 5) #5
  tail call void @llvm.trap()
  unreachable

190:                                              ; preds = %143
  tail call void asm sideeffect "", "n"(i32 6) #5
  tail call void @llvm.trap()
  unreachable

191:                                              ; preds = %122
  tail call void asm sideeffect "", "n"(i32 7) #5
  tail call void @llvm.trap()
  unreachable

192:                                              ; preds = %100
  tail call void asm sideeffect "", "n"(i32 8) #5
  tail call void @llvm.trap()
  unreachable
}

; Function Attrs: minsize optsize
declare swiftcc { i64, i64 } @"$ss8readLine16strippingNewlineSSSgSb_tF"(i1) local_unnamed_addr #0

; Function Attrs: cold noreturn nounwind
declare void @llvm.trap() #1

; Function Attrs: argmemonly mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #2

; Function Attrs: argmemonly mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2

; Function Attrs: minsize optsize
declare swiftcc %Ts28__ContiguousArrayStorageBaseC* @"$sSy10FoundationE10components11separatedBySaySSGqd___tSyRd__lF"(%swift.opaque* noalias nocapture, %swift.type*, %swift.type*, i8**, i8**, %swift.opaque* noalias nocapture swiftself) local_unnamed_addr #0

; Function Attrs: minsize nofree noinline nosync nounwind optsize readnone
define linkonce_odr hidden i8** @"$sS2SSysWl"() local_unnamed_addr #3 {
entry:
  %0 = load i8**, i8*** @"$sS2SSysWL", align 8
  %1 = icmp eq i8** %0, null
  br i1 %1, label %cacheIsNull, label %cont

cacheIsNull:                                      ; preds = %entry
  %2 = tail call i8** @swift_getWitnessTable(%swift.protocol_conformance_descriptor* nonnull @"$sSSSysMc", %swift.type* nonnull @"$sSSN", i8*** undef) #14
  store atomic i8** %2, i8*** @"$sS2SSysWL" release, align 8
  br label %cont

cont:                                             ; preds = %cacheIsNull, %entry
  %3 = phi i8** [ %0, %entry ], [ %2, %cacheIsNull ]
  ret i8** %3
}

; Function Attrs: nofree nounwind readonly
declare i8** @swift_getWitnessTable(%swift.protocol_conformance_descriptor*, %swift.type*, i8***) local_unnamed_addr #4

; Function Attrs: nounwind
declare void @swift_bridgeObjectRelease(%swift.bridge*) local_unnamed_addr #5

; Function Attrs: minsize noinline optsize
define linkonce_odr hidden swiftcc void @"$ss15ContiguousArrayV16_createNewBuffer14bufferIsUnique15minimumCapacity13growForAppendySb_SiSbtF10Foundation7DecimalV_Tg5"(i1 %0, i64 %1, i1 %2, %Ts15ContiguousArrayV* nocapture swiftself dereferenceable(8) %3) local_unnamed_addr #6 {
entry:
  %._buffer._storage = getelementptr inbounds %Ts15ContiguousArrayV, %Ts15ContiguousArrayV* %3, i64 0, i32 0, i32 0
  %4 = load %Ts28__ContiguousArrayStorageBaseC*, %Ts28__ContiguousArrayStorageBaseC** %._buffer._storage, align 8
  %5 = tail call swiftcc %Ts28__ContiguousArrayStorageBaseC* @"$ss22_ContiguousArrayBufferV20_consumeAndCreateNew14bufferIsUnique15minimumCapacity13growForAppendAByxGSb_SiSbtF10Foundation7DecimalV_Tg5"(i1 %0, i64 %1, i1 %2, %Ts28__ContiguousArrayStorageBaseC* %4)
  store %Ts28__ContiguousArrayStorageBaseC* %5, %Ts28__ContiguousArrayStorageBaseC** %._buffer._storage, align 8
  ret void
}

; Function Attrs: minsize optsize
declare swiftcc { i64, i64, i64 } @"$s10Foundation7DecimalV6string6localeACSgSS_AA6LocaleVSgtcfC"(i64, %swift.bridge*, i64, i8) local_unnamed_addr #0

; Function Attrs: nounwind
declare %swift.bridge* @swift_bridgeObjectRetain(%swift.bridge* returned) local_unnamed_addr #5

; Function Attrs: nounwind
declare void @swift_release(%swift.refcounted*) local_unnamed_addr #5

; Function Attrs: minsize optsize
declare swiftcc { i64, i64, i32 } @"$s10Foundation7DecimalV14integerLiteralACSi_tcfC"(i64) local_unnamed_addr #0

; Function Attrs: minsize optsize
declare swiftcc i1 @"$s10Foundation7DecimalV2eeoiySbAC_ACtFZ"(i64, i64, i32, i64, i64, i32) local_unnamed_addr #0

; Function Attrs: minsize mustprogress nofree noinline nounwind optsize readonly willreturn
define linkonce_odr hidden %swift.type* @__swift_instantiateConcreteTypeFromMangledName({ i32, i32 }* %0) local_unnamed_addr #7 {
entry:
  %1 = bitcast { i32, i32 }* %0 to i64*
  %2 = load atomic i64, i64* %1 monotonic, align 8
  %3 = icmp slt i64 %2, 0
  br i1 %3, label %7, label %4, !prof !8

4:                                                ; preds = %7, %entry
  %5 = phi i64 [ %2, %entry ], [ %15, %7 ]
  %6 = inttoptr i64 %5 to %swift.type*
  ret %swift.type* %6

7:                                                ; preds = %entry
  %8 = ashr i64 %2, 32
  %9 = sub nsw i64 0, %8
  %sext = shl i64 %2, 32
  %10 = ashr exact i64 %sext, 32
  %11 = ptrtoint { i32, i32 }* %0 to i64
  %12 = add i64 %10, %11
  %13 = inttoptr i64 %12 to i8*
  %14 = tail call swiftcc %swift.type* @swift_getTypeByMangledNameInContext2(i8* %13, i64 %9, %swift.type_descriptor* null, i8** null) #15
  %15 = ptrtoint %swift.type* %14 to i64
  store atomic i64 %15, i64* %1 monotonic, align 8
  br label %4
}

; Function Attrs: argmemonly nounwind
declare swiftcc %swift.type* @swift_getTypeByMangledNameInContext2(i8*, i64, %swift.type_descriptor*, i8**) local_unnamed_addr #8

; Function Attrs: nounwind
declare %swift.refcounted* @swift_allocObject(%swift.type*, i64, i64) local_unnamed_addr #5

; Function Attrs: minsize optsize
declare swiftcc void @"$ss5print_9separator10terminatoryypd_S2StF"(%Ts28__ContiguousArrayStorageBaseC*, i64, %swift.bridge*, i64, %swift.bridge*) local_unnamed_addr #0

; Function Attrs: noreturn nounwind optsize
declare void @exit(i32 noundef) local_unnamed_addr #9

; Function Attrs: minsize noinline optsize
define linkonce_odr hidden swiftcc %Ts28__ContiguousArrayStorageBaseC* @"$ss22_ContiguousArrayBufferV20_consumeAndCreateNew14bufferIsUnique15minimumCapacity13growForAppendAByxGSb_SiSbtF10Foundation7DecimalV_Tg5"(i1 %0, i64 %1, i1 %2, %Ts28__ContiguousArrayStorageBaseC* %3) local_unnamed_addr #6 {
entry:
  br i1 %2, label %4, label %14

4:                                                ; preds = %entry
  %._storage._capacityAndFlags._value = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %3, i64 0, i32 1, i32 0, i32 1, i32 0
  %5 = load i64, i64* %._storage._capacityAndFlags._value, align 8
  %6 = lshr i64 %5, 1
  %7 = icmp slt i64 %6, %1
  br i1 %7, label %8, label %14

8:                                                ; preds = %4
  %9 = add nuw i64 %6, 4611686018427387904
  %10 = icmp slt i64 %9, 0
  br i1 %10, label %46, label %11, !prof !8

11:                                               ; preds = %8
  %12 = and i64 %5, -2
  %13 = tail call i64 @llvm.smax.i64(i64 %12, i64 %1)
  br label %14

14:                                               ; preds = %4, %11, %entry
  %15 = phi i64 [ %1, %entry ], [ %13, %11 ], [ %6, %4 ]
  %._storage.count._value = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %3, i64 0, i32 1, i32 0, i32 0, i32 0
  %16 = load i64, i64* %._storage.count._value, align 8, !range !6
  %17 = tail call i64 @llvm.smax.i64(i64 %15, i64 %16)
  %18 = icmp eq i64 %17, 0
  br i1 %18, label %29, label %19

19:                                               ; preds = %14
  %20 = tail call %swift.type* @__swift_instantiateConcreteTypeFromMangledName({ i32, i32 }* nonnull @"$ss23_ContiguousArrayStorageCy10Foundation7DecimalVGMD") #14
  %21 = mul i64 %17, 20
  %22 = add i64 %21, 32
  %23 = tail call noalias %swift.refcounted* @swift_allocObject(%swift.type* %20, i64 %22, i64 7) #5
  %24 = bitcast %swift.refcounted* %23 to %Ts28__ContiguousArrayStorageBaseC*
  %25 = bitcast %swift.refcounted* %23 to i8*
  %call.i = tail call i64 @malloc_usable_size(i8* noundef %25) #16
  %gepdiff = add nsw i64 %call.i, -32
  %26 = sdiv i64 %gepdiff, 20
  %27 = shl nsw i64 %26, 1
  %28 = getelementptr inbounds %swift.refcounted, %swift.refcounted* %23, i64 1
  %._storage7.count._value = bitcast %swift.refcounted* %28 to i64*
  store i64 %16, i64* %._storage7.count._value, align 8
  %._storage7._capacityAndFlags = getelementptr inbounds %swift.refcounted, %swift.refcounted* %23, i64 1, i32 1
  store i64 %27, i64* %._storage7._capacityAndFlags, align 8
  br label %29

29:                                               ; preds = %14, %19
  %30 = phi %Ts28__ContiguousArrayStorageBaseC* [ %24, %19 ], [ bitcast (%struct._SwiftEmptyArrayStorage* @_swiftEmptyArrayStorage to %Ts28__ContiguousArrayStorageBaseC*), %14 ]
  %31 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %30, i64 1
  %32 = bitcast %Ts28__ContiguousArrayStorageBaseC* %31 to i8*
  %33 = getelementptr inbounds %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %3, i64 1
  br i1 %0, label %34, label %41

34:                                               ; preds = %29
  %35 = bitcast %Ts28__ContiguousArrayStorageBaseC* %33 to %T10Foundation7DecimalV*
  %36 = getelementptr inbounds %T10Foundation7DecimalV, %T10Foundation7DecimalV* %35, i64 %16, i32 0, i32 0
  %37 = icmp ugt i8* %36, %32
  %38 = icmp eq %Ts28__ContiguousArrayStorageBaseC* %30, %3
  %or.cond5.i = select i1 %38, i1 %37, i1 false
  br i1 %or.cond5.i, label %"$sSp14moveInitialize4from5countySpyxG_SitF10Foundation7DecimalV_Tg5.exit", label %.sink.split.i

.sink.split.i:                                    ; preds = %34
  %39 = bitcast %Ts28__ContiguousArrayStorageBaseC* %33 to i8*
  %40 = mul nuw i64 %16, 20
  tail call void @llvm.memmove.p0i8.p0i8.i64(i8* nonnull align 2 %32, i8* nonnull align 2 %39, i64 %40, i1 false)
  br label %"$sSp14moveInitialize4from5countySpyxG_SitF10Foundation7DecimalV_Tg5.exit"

"$sSp14moveInitialize4from5countySpyxG_SitF10Foundation7DecimalV_Tg5.exit": ; preds = %34, %.sink.split.i
  store i64 0, i64* %._storage.count._value, align 8
  br label %44

41:                                               ; preds = %29
  %42 = bitcast %Ts28__ContiguousArrayStorageBaseC* %33 to i8*
  %43 = mul nuw i64 %16, 20
  tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* nonnull align 2 %32, i8* nonnull align 2 %42, i64 %43, i1 false)
  br label %44

44:                                               ; preds = %"$sSp14moveInitialize4from5countySpyxG_SitF10Foundation7DecimalV_Tg5.exit", %41
  %45 = getelementptr %Ts28__ContiguousArrayStorageBaseC, %Ts28__ContiguousArrayStorageBaseC* %3, i64 0, i32 0
  tail call void @swift_release(%swift.refcounted* %45) #5
  ret %Ts28__ContiguousArrayStorageBaseC* %30

46:                                               ; preds = %8
  tail call void asm sideeffect "", "n"(i32 0) #5
  tail call void @llvm.trap()
  unreachable
}

; Function Attrs: argmemonly mustprogress nocallback nofree nounwind willreturn
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64, i1 immarg) #10

; Function Attrs: argmemonly mustprogress nocallback nofree nounwind willreturn
declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1 immarg) #10

; Function Attrs: optsize
declare i64 @malloc_usable_size(i8* noundef) local_unnamed_addr #11

; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.smax.i64(i64, i64) #12

attributes #0 = { minsize optsize "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { cold noreturn nounwind }
attributes #2 = { argmemonly mustprogress nocallback nofree nosync nounwind willreturn }
attributes #3 = { minsize nofree noinline nosync nounwind optsize readnone "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind readonly }
attributes #5 = { nounwind }
attributes #6 = { minsize noinline optsize "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #7 = { minsize mustprogress nofree noinline nounwind optsize readonly willreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #8 = { argmemonly nounwind }
attributes #9 = { noreturn nounwind optsize "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #10 = { argmemonly mustprogress nocallback nofree nounwind willreturn }
attributes #11 = { optsize "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx16,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #12 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
attributes #13 = { nounwind readnone }
attributes #14 = { nounwind readonly }
attributes #15 = { argmemonly nounwind readonly }
attributes #16 = { nounwind optsize }

!swift.module.flags = !{!0}
!llvm.linker.options = !{}
!llvm.module.flags = !{!1, !2, !3, !4, !5}

!0 = !{!"standard-library", i1 false}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 4, !"Objective-C Garbage Collection", i32 84477696}
!5 = !{i32 1, !"Swift Version", i32 7}
!6 = !{i64 0, i64 9223372036854775807}
!7 = !{!"branch_weights", i32 2000, i32 1}
!8 = !{!"branch_weights", i32 1, i32 2000}
