Various signaling techniques have been considered for I/O interconnects at 25 Gb/s or higher. However, they either suffer from high baud rate, as in the case of NRZ, or an excess signal-to-noise ratio penalty, as in the case of PAM-4. To overcome these problems, a four-phase shifted sinusoid symbol (PSS-4) signaling method is proposed that can be readily applied to high-speed I/O transceivers. By using PSS-4, the SNR penalty can be reduced from PAM-4; our theoretical analysis has revealed that the SNR performance of the PSS-4 is 6.5 dB better than that of PAM-4 with comparable bandwidth. The transistor-level simulation results have shown that PSS-4 has an average of twice larger vertical eye opening than PAM-4. In addition, the supply voltage sensitivity of PSS-4 is 55% and 20% less than that of PAM-4 and NRZ, respectively, and the power consumption of PSS-4 is 13.5% lower than that of PAM-4. 
PSS4: Four-Phase Shifted Sinusoid Symbol Signaling for High Speed I/O interconnects