Network-on-Chips (NoCs) have become the mainstream for Chip Multi-Processors (CMPs) design. Multicast, a one-to-many communication pattern, is widely used in barrier/clock synchronization, multithreading programs and cache coherence protocols for CMPs. Even though several multicast routing algorithms have been proposed for CMPs, few can adaptively deal with heavy traffic loads. With the increase of multicast traffic load, deterministic routing schemes suffer from long latency and low throughput, whereas adaptive routing algorithms can improve the routing performance by providing multiple redundant paths. In this paper, we proposed a novel multicast routing algorithm based on partition to reduce the latency of multicast packets, by finding multiple routing paths and adaptively choosing available output ports based on the size of buffer space in downstream routers. We evaluate our scheme through simulations, and results show that, under various configurations, both latency and energy consumption have been significantly reduced in comparison with recent multicast routing schemes. 
An adaptive partition-based multicast routing scheme for mesh-based Networks-on-Chip