Due to the complex structure of IT2 FLCs, using them in real-time applications might be computationally expensive. To facilitate real-time implementation of these controllers, hardware with parallel processing abilities are recommended; field-programmable gate arrays (FPGA) are one class of such hardware. In this paper, we design and implement three different inference mechanisms of IT2 FLCs on hardware. These engines include Karnik–Mendel (KM) algorithms, Wu–Mendel (WM) uncertainty bounds, Nie-Tan (NT) and Biglarbegian–Melek–Mendel (BMM) which have recently been introduced in the literature. We first demonstrate how the proposed structures of the IT2 FLCs can be implemented on software; next, we propose architectures for implementing these IT2 FLCs on hardware. We performed simulations to compare the performance of the IT2 FLCs. To assess the controllers performance in real-time we used four indicators; the number of DSP48A1s, MUXCYs, slice registers and slice LUTs. It was shown that the NT and BMM controllers require significantly fewer resources compared to the other engines. While the controller that uses KM as its inference engine uses fewer resources in terms of DSP48A1s, it consumes a considerable amount of other resources compared to the WM controller. Finally, the transient responses of the controllers in terms of rise time and settling time were compared. It was found that the controllers with NT and BMM inference engines have faster closed-loop response in comparison to the one using the WM and KM. The results presented herein provides researchers and engineers a better insight into designing the most suitable IT2 FLCs, and hence it is expected IT2 FLCs can be implemented on hardware to further enable applications on plants requiring fast response (or ultimately real-time implementation). 
Hardware implementation and performance comparison of interval type-2 fuzzy logic controllers for real-time applications