The FPGA Implementation of Real-Time Spotlight SAR Imaging
To satisfy the demand of SAR real time imaging and improve processing efficiency of the polar format algorithm. In this paper, PFA is implemented by twice SINC interpolation, and SINC interpolation is realized by parallel structure block RAM group. First, the floating point sampling coordinates are converted to the fixed point, and the raw data and coordinate's fractional part are written into the block RAM group with coordinate's integer as address. Finally the raw data is weighted and summed to gain the interpolation result in a clock. The parallel structure is simple and easy to implement, pipelined output the result, interpolation points can be down compatible, and resource utilization will not increase. The system is built on the VC690T, it can process 8k by 8k complex-image single-precision floating-point within 0.79s, when the system works at 200MHz.