A phase shifted PWM technique for common-mode voltage reduction in five level H-bridge cascaded inverter
In electric drive applications, the conventional carrier based and space vector pulse width modulation (PWM) which schemes for two-level inverter topology generate large common-mode voltages, this leads to the phenomenon of bearing current. These current spikes can cause electromagnetic interference (EMI) and reduction in the life expectancy of the motor. Cascade multilevel inverters can reduce voltage stress on power switches; generate smaller common-mode voltages and output voltages with low distortion. Phase shifted PWM is a compatible solution for H-bridge cascaded inverters. In this paper, we will present a simple and flexible phase shifted PWM technique for common-mode voltage reduction of a five level H-bridge cascade inverter topology. Simulation results are presented for validation and comparison with other techniques.