Design of High-Speed Energy-Efficient Masking Error Immune PentaMTJ-Based TCAM
The main challenge in ternary content addressable memory (TCAM) design is to reduce the power consumption associated with searching without the increase in delay. This paper proposes a novel PentaMTJ-based TCAM and then compares its delay and power consumption with the previously reported MTJ-based TCAM. TCAM is comprised of PentaMTJ cell, which is used for the storage of information, and a precharge sense amplifier (PCSA) for its sensing. A VerilogA model of the PentaMTJ along with 45 nm CMOS technology is used for the simulation. A power reduction of 17.64 times with minor delay degradation of 1.081 times is obtained compared with previously reported TCAMs. This leads to power delay product improvement of 16.38 times for 576 b TCAM.