FREQUENCY SCALING OF VARIABLE SPEED SYSTEMS FOR FAST RESPONSE AND POWER REDUCTION
A system including a plurality of amplifiers configured to generate a clock signal having a frequency. The clock signal is input to a processor. The amplifiers are connected in series. An output of a last one of the amplifiers is fed back to an input of a first one of the amplifiers. Each of the amplifiers has a transconductance. A frequency adjustment module is configured to adjust, based on an activity level of the processor, the frequency of the clock signal by adjusting the transconductance of the amplifiers.