Learning Models for Verification and Testing — Special Track at ISoLA 2014 Track Introduction
Specifications play an important role in modern-day software engineering research. Formal specifications, e.g., are the basis for automated verification and testing techniques. In spite of their potentially great positive impact, formal specifications are notoriously hard to come by in practice. One reason seems to be that writing precise formal specifications is not an easy task for most of us. As a consequence, e.g., many software systems in use today lack adequate specifications or make use of un/under-specified components. Moreover, in many practical contexts, revision cycle times are often extremely short, which makes the maintenance of formal specifications unrealistic. At the same time, component-based design and short development cycles necessitate extensive testing and verification effort. Problems of this kind are inherent in systems that continuously undergo change as the ones specifically addresses in [16].