METHOD FOR PRODUCING A III/V SI TEMPLATE
The invention relates to a method for producing a monolithic template containing an Si wafer having a layer of a III/V semiconductor that is epitaxially applied to a surface of the Si wafer, wherein the III/V semiconductor comprises a lattice constant that deviates from the constant of the Si by less than 10%, comprising the following steps: A) the surface of the Si wafer is optionally deoxidized, B) an Si layer is optionally grown epitaxially on the surface of the deoxidized Si wafer, C) the surface of the Si wafer or the surface of the Si layer is optionally subjected to an etching and/or bake-out step, D) a layer made of a III/V semiconductor is epitaxially grown on the surface of the Si wafer or a surface produced in steps A) to C) at a wafer temperature of 350-650 °C, a growth rate of 0.1-2 µm/h, and a layer thickness of 1-100 nm, E) a layer made of a III/V semiconductor equal to or different from the III/V semiconductor applied in step D) is epitaxially grown on the layer obtained in step D) at a wafer temperature of 500-800 °C, a growth rate of 0.1-10 µm/h, and a layer thickness of 10-150 nm.