{"content":[{"text":"Copyright \n Copyright © 2008 Lattice Semiconductor Corporation. \n This document may not, in whole or part, be copied, photocopied, \n reproduced, translated, or reduced to any electronic medium or machine- \n readable form without prior written consent from Lattice Semiconductor \n Corporation.","bbox":{"left":0.323529,"top":0.084773,"width":0.527315,"height":0.104138}},{"text":"Trademarks \n Lattice Semiconductor Corporation, L Lattice Semiconductor Corporation \n (logo), L (stylized), L (design), Lattice (design), LSC, E2CMOS, Extreme \n Performance, FlashBAK, flexiFlash, flexiMAC, flexiPCS, FreedomChip, GAL, \n GDX, Generic Array Logic, HDL Explorer, IPexpress, ISP, ispATE, ispClock, \n ispDOWNLOAD, ispGAL, ispGDS, ispGDX, ispGDXV, ispGDX2, \n ispGENERATOR, ispJTAG, ispLEVER, ispLeverCORE, ispLSI, ispMACH, \n ispPAC, ispTRACY, ispTURBO, ispVIRTUAL MACHINE, ispVM, ispXP, \n ispXPGA, ispXPLD, LatticeEC, LatticeECP, LatticeECP-DSP, LatticeECP2, \n LatticeECP2M, LatticeMico8, LatticeMico32, LatticeSC, LatticeSCM, \n LatticeXP, LatticeXP2, MACH, MachXO, MACO, ORCA, PAC, PAC-Designer, \n PAL, Performance Analyst, PURESPEED, Reveal, Silicon Forest, \n Speedlocked, Speed Locking, SuperBIG, SuperCOOL, SuperFAST, \n SuperWIDE, sysCLOCK, sysCONFIG, sysDSP, sysHSI, sysI/O, sysMEM, The \n Simple Machine for Complex Design, TransFR, UltraMOS, and specific \n product designations are either registered trademarks or trademarks of \n Lattice Semiconductor Corporation or its subsidiaries in the United States \n and/or other countries. ISP, Bringing the Best Together, and More of the Best \n are service marks of Lattice Semiconductor Corporation. \n HyperTransport is a licensed trademark of the HyperTransport Technology \n Consortium in the U.S. and other jurisdictions. \n Other product names used in this publication are for identification purposes \n only and may be trademarks of their respective companies.","bbox":{"left":0.323528,"top":0.203485,"width":0.5551189999999999,"height":0.369285}},{"text":"Disclaimers \n NO WARRANTIES: THE INFORMATION PROVIDED IN THIS DOCUMENT \n IS “AS IS” WITHOUT ANY EXPRESS OR IMPLIED WARRANTY OF ANY \n KIND INCLUDING WARRANTIES OF ACCURACY, COMPLETENESS, \n MERCHANTABILITY, NONINFRINGEMENT OF INTELLECTUAL \n PROPERTY, OR FITNESS FOR ANY PARTICULAR PURPOSE. IN NO \n EVENT WILL LATTICE SEMICONDUCTOR CORPORATION (LSC) OR ITS \n SUPPLIERS BE LIABLE FOR ANY DAMAGES WHATSOEVER (WHETHER \n DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL, \n INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, \n BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT \n OF THE USE OF OR INABILITY TO USE THE INFORMATION PROVIDED \n IN THIS DOCUMENT, EVEN IF LSC HAS BEEN ADVISED OF THE \n POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS \n PROHIBIT THE EXCLUSION OR LIMITATION OF CERTAIN LIABILITY, \n SOME OF THE ABOVE LIMITATIONS MAY NOT APPLY TO YOU. \n LSC may make changes to these materials, specifications, or information, or \n to the products described herein, at any time without notice. LSC makes no \n commitment to update this documentation. LSC reserves the right to \n discontinue any product or service without notice and assumes no obligation","bbox":{"left":0.323529,"top":0.587348,"width":0.5531630000000001,"height":0.3162560000000001}},{"text":"Synthesis Data Flow Tutorial","bbox":{"left":0.117647,"top":0.93983,"width":0.186969,"height":0.015614000000000017}},{"text":"ii","bbox":{"left":0.874216,"top":0.939886,"width":0.00810999999999995,"height":0.015647999999999995}}],"images_bbox":[],"images_bbox_not_text_overlap":[]}