def pportD6(state):
 global dataReg
 if (state == 0):
  dataReg = (dataReg & (~ 64))
 else:
  dataReg = (dataReg | 64)
 port.DlPortWritePortUchar(baseAddress, dataReg)

def pportD6 ( state ) : global dataReg if ( state == 0 ) : dataReg = ( dataReg & ( ~ 64 ) ) else : dataReg = ( dataReg | 64 ) port . DlPortWritePortUchar ( baseAddress , dataReg )
toggle data register d6 bit .