def write_core_registers_raw(self, reg_list, data_list):
        """
        Write one or more core registers

        Write core registers in reg_list with the associated value in
        data_list.  If any register in reg_list is a string, find the number
        associated to this register in the lookup table CORE_REGISTER.
        """
        assert len(reg_list) == len(data_list)
        # convert to index only
        reg_list = [register_name_to_index(reg) for reg in reg_list]

        # Sanity check register values
        for reg in reg_list:
            if reg not in CORE_REGISTER.values():
                raise ValueError("unknown reg: %d" % reg)
            elif is_fpu_register(reg) and (not self.has_fpu):
                raise ValueError("attempt to write FPU register without FPU")

        # Read special register if it is present in the list and
        # convert doubles to single float register writes.
        cfbpValue = None
        xpsrValue = None
        reg_data_list = []
        for reg, data in zip(reg_list, data_list):
            if is_double_float_register(reg):
                # Replace double with two single float register writes. For instance,
                # a write of D2 gets converted to writes to S4 and S5.
                singleLow = data & 0xffffffff
                singleHigh = (data >> 32) & 0xffffffff
                reg_data_list += [(-reg, singleLow), (-reg + 1, singleHigh)]
            elif is_cfbp_subregister(reg) and cfbpValue is None:
                cfbpValue = self.read_core_register_raw(CORE_REGISTER['cfbp'])
            elif is_psr_subregister(reg) and xpsrValue is None:
                xpsrValue = self.read_core_register_raw(CORE_REGISTER['xpsr'])
            else:
                # Other register, just copy directly.
                reg_data_list.append((reg, data))
        
        # Write out registers
        dhcsr_cb_list = []
        for reg, data in reg_data_list:
            if is_cfbp_subregister(reg):
                # Mask in the new special register value so we don't modify the other register
                # values that share the same DCRSR number.
                shift = (-reg - 1) * 8
                mask = 0xffffffff ^ (0xff << shift)
                data = (cfbpValue & mask) | ((data & 0xff) << shift)
                cfbpValue = data # update special register for other writes that might be in the list
                reg = CORE_REGISTER['cfbp']
            elif is_psr_subregister(reg):
                mask = sysm_to_psr_mask(reg)
                data = (xpsrValue & (0xffffffff ^ mask)) | (data & mask)
                xpsrValue = data
                reg = CORE_REGISTER['xpsr']

            # write DCRDR
            self.write_memory(CortexM.DCRDR, data)

            # write id in DCRSR and flag to start write transfer
            self.write_memory(CortexM.DCRSR, reg | CortexM.DCRSR_REGWnR)

            # Technically, we need to poll S_REGRDY in DHCSR here to ensure the
            # register write has completed.
            # Read it and assert that S_REGRDY is set
            dhcsr_cb = self.read_memory(CortexM.DHCSR, now=False)
            dhcsr_cb_list.append(dhcsr_cb)

        # Make sure S_REGRDY was set for all register
        # writes
        for dhcsr_cb in dhcsr_cb_list:
            dhcsr_val = dhcsr_cb()
            assert dhcsr_val & CortexM.S_REGRDY
def write_core_registers_raw ( self , reg_list , data_list ) : assert len ( reg_list ) == len ( data_list ) reg_list = [ register_name_to_index ( reg ) for reg in reg_list ] for reg in reg_list : if reg not in CORE_REGISTER . values ( ) : raise ValueError ( "unknown reg: %d" % reg ) elif is_fpu_register ( reg ) and ( not self . has_fpu ) : raise ValueError ( "attempt to write FPU register without FPU" ) cfbpValue = None xpsrValue = None reg_data_list = [ ] for reg , data in zip ( reg_list , data_list ) : if is_double_float_register ( reg ) : singleLow = data & 0xffffffff singleHigh = ( data >> 32 ) & 0xffffffff reg_data_list += [ ( - reg , singleLow ) , ( - reg + 1 , singleHigh ) ] elif is_cfbp_subregister ( reg ) and cfbpValue is None : cfbpValue = self . read_core_register_raw ( CORE_REGISTER [ 'cfbp' ] ) elif is_psr_subregister ( reg ) and xpsrValue is None : xpsrValue = self . read_core_register_raw ( CORE_REGISTER [ 'xpsr' ] ) else : reg_data_list . append ( ( reg , data ) ) dhcsr_cb_list = [ ] for reg , data in reg_data_list : if is_cfbp_subregister ( reg ) : shift = ( - reg - 1 ) * 8 mask = 0xffffffff ^ ( 0xff << shift ) data = ( cfbpValue & mask ) | ( ( data & 0xff ) << shift ) cfbpValue = data reg = CORE_REGISTER [ 'cfbp' ] elif is_psr_subregister ( reg ) : mask = sysm_to_psr_mask ( reg ) data = ( xpsrValue & ( 0xffffffff ^ mask ) ) | ( data & mask ) xpsrValue = data reg = CORE_REGISTER [ 'xpsr' ] self . write_memory ( CortexM . DCRDR , data ) self . write_memory ( CortexM . DCRSR , reg | CortexM . DCRSR_REGWnR ) dhcsr_cb = self . read_memory ( CortexM . DHCSR , now = False ) dhcsr_cb_list . append ( dhcsr_cb ) for dhcsr_cb in dhcsr_cb_list : dhcsr_val = dhcsr_cb ( ) assert dhcsr_val & CortexM . S_REGRDY
Write one or more core registers

        Write core registers in reg_list with the associated value in
        data_list.  If any register in reg_list is a string, find the number
        associated to this register in the lookup table CORE_REGISTER.