A neural network unit (NNU) includes N neural processing units (NPU). Each NPU has an arithmetic unit and an accumulator. First and second multiplexed registers of the N NPUs collectively selectively operate as respective first and second N-word rotaters. First and second memories respectively hold rows of N weight/data words and provide the N weight/data words of a row to corresponding ones of the N NPUs. The NPUs selectively perform: multiply-accumulate operations on rows of N weight words and on a row of N data words, using the second N-word rotater; convolution operations on rows of N weight words, using the first N-word rotater, and on rows of N data words, the rows of weight words being a data matrix, and the rows of data words being elements of a convolution kernel; and pooling operations on rows of N weight words, using the first N-word rotater.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A neural network unit (NNU), comprising: an array of N neural processing units (NPU) each having: an arithmetic unit and an accumulator; and first and second multiplexed registers having respective first and second outputs received by the arithmetic unit and by the respective first and second multiplexed register of an adjacent NPU, the first and second multiplexed registers of the N NPUs collectively selectively operate as respective first and second N-word rotaters; a first memory that holds rows of N weight words and provides the N weight words of a row to corresponding ones of the N NPUs; a second memory that holds rows of N data words and provides the N data words of a row to corresponding ones of the N NPUs; and the NNU is programmable to cause the array of NPUs to selectively perform: multiply-accumulate operations on a plurality of rows of N weight words received from the first memory and on a row of N data words, using the second N-word rotater, received from the second memory; convolution operations on a plurality of rows of N weight words, using the first N-word rotater, received from the first memory and on a plurality of rows of N data words received from the second memory, the plurality of rows of weight words being a data matrix, and the plurality of rows of data words being elements of a convolution kernel; and pooling operations on a plurality of rows of N weight words, using the first N-word rotater, received from the first memory. 2. The neural network unit of claim 1, further comprising: when the NNU is programmed to cause the array of NPUs to perform multiply-accumulate operations, the NNU is also programmable to perform an activation function on results of the multiply-accumulate operations held in the accumulator of each of the N NPUs to generate N second results. 3. The neural network unit of claim 2, further comprising: the NNU is also programmable to write the N second results to a row of the second memory. 4. The neural network unit of claim 1, further comprising: when the NNU is programmed to cause the array of NPUs to perform convolution operations, each row of the plurality of rows of data is filled with a respective one of the elements of the convolution kernel. 5. The neural network unit of claim 1, further comprising: when the NNU is programmed to cause the array of NPUs to perform convolution operations, the NNU is also programmable to perform a divide operation on results of the convolution operations held in the accumulator of each of the N NPUs to generate second results. 6. The neural network unit of claim 5, further comprising: the NNU is also programmable to write the second results to a plurality of rows of the first memory. 7. The neural network unit of claim 1, further comprising: when the NNU is programmed to cause the array of NPUs to perform pooling operations, the NNU is also programmable to cause the arithmetic unit of each of a subset of the N NPUs to select a maximum value of a respective sub-region of the data words of the first memory for storage into the accumulator of a subset of the N NPUs to generate second results. 8. The neural network unit of claim 7, further comprising: the NNU is also programmable to write the second results to a plurality of rows of the first memory. 9. The neural network unit of claim 8, further comprising: the plurality of rows of the first memory is based on a ratio of the number of rows of the data words held in the first memory and the number of rows of the sub-region. 10. The neural network unit of claim 7, further comprising: the subset of the N NPUs is based on a ratio of N and the number of columns of the sub-region. 11. The neural network unit of claim 1, further comprising: when the NNU is programmed to cause the array of NPUs to perform pooling operations, the NNU is also programmable to cause the arithmetic unit of each of a subset of the N NPUs to accumulate a sum of the data words of a respective sub-region of the first memory into the accumulator and to divide the sum by the number of data words of the respective sub-region to generate an average. 12. The neural network unit of claim 1, further comprising: a program memory writable, by a processor that includes the NNU, with a program executable by the NNU to instruct the NNU to perform the multiply-accumulate, convolution and pooling operations. 13. The neural network unit of claim 1, the arithmetic unit is capable of performing: a multiplication of a weight word received from the first memory and a data word received from the second memory to produce a product and an accumulation of the product into the accumulator and to repeat the multiplication and accumulation for a plurality of weight and data words; and a selection of a maximum value of a weight word received from the first memory and a current value of the accumulator for storage of the maximum value in the accumulator and to repeat the selection for a plurality of weight words. 14. A method for operating a neural network unit (NNU) including an array of N neural processing units (NPU) each having an arithmetic unit and an accumulator and first and second multiplexed registers having respective first and second outputs received by the arithmetic unit and by the respective first and second multiplexed register of an adjacent NPU, first and second multiplexed registers having respective first and second outputs received by the arithmetic unit and by the respective first and second multiplexed register of an adjacent NPU, the method comprising: providing, by a first memory, N weight words of a row to corresponding ones of the N NPUs; providing, by a second memory, N data words of a row to corresponding ones of the N NPUs; and programming the NNU to cause the array of NPUs to selectively perform: multiply-accumulate operations on a plurality of rows of N weight words received from the first memory and on a row of N data words, using the second N-word rotater, received from the second memory in a first instance; convolution operations on a plurality of rows of N weight words, using the first N-word rotater, received from the first memory and on a plurality of rows of N data words received from the second memory, the plurality of rows of weight words being a data matrix, and the plurality of rows of data words being elements of a convolution kernel in a second instance; and pooling operations on a plurality of rows of N weight words, using the first N-word rotater, received from the first memory in a third instance. 15. The method of claim 14, further comprising: programming the NNU to perform an activation function on results of the multiply-accumulate operations held in the accumulator of each of the N NPUs to generate N second results. 16. The method of claim 14, further comprising: filling each row of the plurality of rows of data with a respective one of the elements of the convolution kernel. 17. The method of claim 14, further comprising: programming the NNU to perform a divide operation on results of the convolution operations held in the accumulator of each of the N NPUs to generate second results. 18. The method of claim 14, further comprising: programming the NNU to cause the arithmetic unit of each of a subset of the N NPUs to select a maximum value of a respective sub-region of the data words of the first memory for storage into the accumulator of a subset of the N NPUs to generate second results. 19. The method of claim 14, further comprising: programming the NNU to cause the arithmetic unit of each of a subset of the N NPUs to accumulate a sum of the data words of a respective sub-region of the first memory into the accumulator and to divide the sum by the number of data words of the respective sub-region to generate an average. 20. The method of claim 14, further comprising: writing, by a processor that includes the NNU, a program memory with a program executable by the NNU to instruct the NNU to perform the multiply-accumulate, convolution and pooling operations. 21. The method of claim 14, further comprising: performing a multiplication of a weight word received from the first memory and a data word received from the second memory to produce a product and an accumulation of the product into the accumulator and repeating the multiplication and accumulation for a plurality of weight and data words; and performing a selection of a maximum value of a weight word received from the first memory and a current value of the accumulator for storage of the maximum value in the accumulator and repeating the selection for a plurality of weight words. 22. A computer program product encoded in at least one non-transitory computer usable medium for use with a computing device, the computer program product comprising: computer usable program code embodied in said medium, for specifying a neural network unit (NNU), the computer usable program code comprising: first program code for specifying an array of N neural processing units (NPU) each having: an arithmetic unit and an accumulator; and first and second multiplexed registers having respective first and second outputs received by the arithmetic unit and by the respective first and second multiplexed register of an adjacent NPU, the first and second multiplexed registers of the N NPUs collectively selectively operate as respective first and second N-word rotaters; second program code for specifying a first memory that holds rows of N weight words and provides the N weight words of a row to corresponding ones of the N NPUs; third program code for specifying a second memory that holds rows of N data words and provides the N data words of a row to corresponding ones of the N NPUs; the NNU is programmable to cause the array of NPUs to selectively perform: multiply-accumulate operations on a plurality of rows of N weight words received from the first memory and on a row of N data words, using the second N-word rotater, received from the second memory; convolution operations on a plurality of rows of N weight words, using the first N-word rotater, received from the first memory and on a plurality of rows of N data words received from the second memory, the plurality of rows of weight words being a data matrix, and the plurality of rows of data words being elements of a convolution kernel; and pooling operations on a plurality of rows of N weight words, using the first N-word rotater, received from the first memory.