Generate an automorphism of the problem graph, determine an embedding of the automorphism to the hardware graph and modify the embedding of the problem graph into the hardware graph to correspond to the embedding of the automorphism to the hardware graph. Determine an upper-bound on the required chain strength. Calibrate and record properties of the component of a quantum processor with a digital processor, query the digital processor for a range of properties. Generate a bit mask and change the sign of the bias of individual qubits according to the bit mask before submitting a problem to a quantum processor, apply the same bit mask to the bit result. Generate a second set of parameters of a quantum processor from a first set of parameters via a genetic algorithm.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A method for embedding a problem into an analog processor, the problem represented as a problem graph having one or more decision variables and the analog processor represented as a hardware graph having one or more vertices coupleable via one or more edges, the problem graph mapped into the hardware graph via a first embedding to produce an embedded problem, and the embedded problem containing at least one chain having a first chain strength, the method comprising: generating a first automorphism of the problem graph with a non-analog processor; determining an embedding of the first automorphism of the problem graph to the hardware graph; and modifying the first embedding of the problem graph into the hardware graph to generate a first modified embedding, the first modified embedding corresponding to a composition of the first embedding and the embedding of the first automorphism, wherein the first modified embedding produces a first modified chain strength of the at least one chain. 2. The method of claim 1, further comprising: determining whether the at least one chain is not broken in a ground state of an embedded problem produced by the first modified embedding and the first modified chain strength is lower than the first chain strength. 3. The method of claim 2, further comprising: generating a second automorphism of the problem graph and modifying the first embedding of the problem graph to the hardware graph to generate a second modified embedding, the second modified embedding corresponding to a composition of the first embedding and an embedding of the second automorphism of the problem graph to the hardware graph, wherein the second modified embedding produces a second modified chain strength and determining whether the at least one chain is not broken in a ground state of the embedded problem and the second modified chain strength is lower than the first modified chain strength. 4. The method of claim 2 wherein determining whether the first modified chain strength is lower than the first chain strength comprises querying a hardware solver to determine the required chain strength. 5. The method of claim 2 wherein determining whether the first modified chain strength is lower than the first chain strength includes finding an upper-bound on the required chain strength by verifying that for each chain C of the embedded problem −J(e)>b(C, e) is respected for each edge e in C, wherein b(C, e) is defined as b (C, e):=min{b(C1(e)), b(C2(e))} and b(C):=Σν∈C|h(ν)|+Σν∈CΣu∈Uν|J(ν, u)| and J(e) is the coupling strength applied to edge e. 6. The method of claim 5, further comprising: refining the upper bound on the required chain strength by calculating a value ∈>>0 for which, with the coupling J(e)+∈ applied to all edges e of chain C, chain C is respected in every ground state for all possible spin configurations of the neighbors of C, and modifying the couplings in C by reducing the strength by ∈. 7. The method of claim 6 wherein ∈ is the maximum value for which, with the coupling J(e)+∈ applied to all edges e of chain C, chain C is respected in every ground state for all possible spin configurations of the neighbors of C. 8. The method of claim 3, further comprising: generating a plurality of automorphisms of the problem graph and modifying the first embedding of the problem graph into the hardware graph to generate a plurality of modified embeddings, each modified embedding corresponding to a composition of the first embedding and an embedding of each of the plurality of automorphisms of the problem graph to the hardware graph wherein each modified embedding produces a modified chain strength of the at least one chain. 9. The method of claim 8 wherein generating the plurality of automorphisms includes iteratively generating the plurality of automorphisms until the at least one chain is not broken in a ground state of the embedded problem and the modified chain strength is lower than all or most of the previously produced chain strengths. 10. A hybrid computing system, comprising: an analog processor into which a problem is embeddable, the problem representable as a problem graph having one or more decision variables and the analog processor representable as a hardware graph having one or more vertices coupleable via one or more edges, the problem graph mappable into the hardware graph via a first embedding to produce an embedded problem, and the embedded problem containing at least one chain having a first chain strength; a non-analog processor in communication with the analog processor, wherein in operation the non-analog processor: generates a first automorphism of the problem graph; determines an embedding of the first automorphism of the problem graph to the hardware graph; and modifies the first embedding of the problem graph into the hardware graph to generate a first modified embedding, the first modified embedding corresponding to a composition of the first embedding and the embedding of the first automorphism of the problem graph to the hardware graph, wherein the first modified embedding produces a first modified chain strength of the at least one chain. 11. The system of claim 10 wherein, in operation, the hybrid computing system determines whether the at least one chain is not broken in a ground state of the embedded problem produced by the first modified embedding and the first modified chain strength is lower than the first chain strength. 12. The system of claim 11 wherein, in operation, the hybrid computing system: generates a second automorphism of the problem graph and modifies the first embedding of the problem graph to the hardware graph to generate a second modified embedding, the second modified embedding corresponding to a composition of the first embedding and an embedding of the second automorphism of the problem graph to the hardware graph, wherein the second modified embedding produces a second modified chain strength of the at least one chain, and determines whether the at least one chain is not broken in a ground state of the embedded problem and the second modified chain strength is lower than the first chain strength. 13. The system of claim 11 wherein to determine whether the first modified chain strength is lower than the first chain strength the hybrid system queries a hardware solver to determine the required chain strength. 14. The system of claim 11 wherein to determine whether the first modified chain strength is lower than the first chain strength the hybrid computing system finds an upper-bound on the required chain strength by verifying that for each chain C of the embedded problem −J(e)>b(C, e) is respected for each edge e in C, wherein b(C, e) is defined as b(C,e):=min{b(C1(e)), b(C2(e))} and b(C):=Σν∈C|h(ν)|+Σν∈CΣu∈Uν|J(ν, u)| and J(e) is the coupling strength applied to edge e. 15. The system of claim 14 wherein, in operation, the hybrid computing system refines the upper bound on the lower chain strength by calculating a value ∈>0 for which, with the coupling J(e)+∈ applied to all edges e of chain C, chain C is respected in every ground state for all possible spin configurations of the neighbors of C, and modifying the couplings in C by reducing the strength by ∈. 16. The system of claim 15 wherein ∈ is the maximum value for which for which, with the coupling J(e)+∈ applied to all edges e of chain C, chain C is respected in every ground state for all possible spin configurations of the neighbors of C. 17. The system of claim 12 wherein, in operation, the hybrid computing system successively generates a plurality of automorphisms of the problem graph and modifies the first embedding of the problem graph into the hardware graph to generate a plurality of modified embeddings, each modified embedding corresponding to a composition of the first embedding and an embedding of each of the plurality of automorphisms of the problem graph to the hardware graph wherein each modified embedding produces a modified chain strength of the at least one chain. 18. The system of claim 17 wherein the plurality of automorphisms is generated until the at least one chain is not broken in a ground state of the embedded problem and the modified chain strength is lower than all or most of the previously produced chain strengths. 19. A method for embedding a problem into a quantum processor, the quantum processor comprising one or more qubits coupleable via coupling devices, each of the qubits and coupling devices having at least one measurable property, the method comprising: calibrating at least a portion of the quantum processor; recording a value for the at least one measurable property of each calibrated qubit and each coupling device using a digital processor; generating a query by specifying a range based on the value of the at least one measurable property of each qubit and coupling device; submitting the query to the digital processor; receiving a first set of qubits and coupling devices that satisfy the query; and submitting a problem to the quantum processor using the first set of qubits and coupling devices. 20. The method of claim 19 wherein the at least one measurable property is selected from a group consisting of the following properties: dead/alive, h range, j range, DAC precision, distance to qubit with properties already recorded, position on the quantum processor. 21. The method of claim 19 wherein recording a value for the at least one measurable property of each qubit and coupling device using a digital processor comprises storing a value for the at least one measurable property of each qubit and coupling device in a database. 22. The method of claim 19, further comprising: re-submitting the query to the digital processor, wherein the digital processor returns a second set of qubits and coupling devices that satisfy the query and the second set is different from the first set. 23. A method for use in embedding a problem into a quantum processor, the quantum processor having a number of qubits coupleable via coupling devices and the problem having a number of decision variables, the method comprising: generating a bit mask of length corresponding to the number of decision variables in the problem; applying the bit mask to the qubits, wherein the sign of the bias applied to a respective qubit is reversed according to the bit mask; submitting the problem to the quantum processor; computing a bit result with the quantum processor; and applying the bit mask to the bit result wherein the sign of a bit is reversed according to the bit mask to obtain a solution to the original problem. 24. A method for parameter selection for an analog processor with a non-analog processor, the analog processor in communication with the non-analog processor, the analog processor having a first set of tunable parameters, the method comprising: estimating a fitness of the first set of tunable parameters with the non-analog processor; and generating a second set of tunable parameters with the non-analog processor from the first set of tunable parameters using a genetic algorithm, wherein the genetic algorithm evolves the tunable parameters via at least one of mutation, inheritance and permutation, and wherein the second set is different from the first set. 25. The method of claim 24 wherein the analog processor comprises a quantum processor. 26. The method of claim 24, further comprising: estimating the fitness of the second set of tunable parameters with the non-analog processor; and generating a third set of tunable parameters using a genetic algorithm, wherein the genetic algorithm evolves tunable parameters via at least one of mutation, inheritance and permutation, and wherein the third set is different from the first and the second set. 27. A method for embedding a problem in an analog processor via a hybrid computing system comprising the analog processor and a digital processor, the problem small in relation to the topology of the analog processor, the method comprising: finding a set of non-overlapping regions for embedding the problem on the analog processor; applying to the problem spin reversal transformations to generate replicas of the problem via the digital processor; adding the replicas of the problem to a problem Hamiltonian via the digital processor; programming the problem Hamiltonian to the analog processor via the digital processor; and evolving the analog processor. 28. The method of claim 27 further comprising: reading out the state of the analog processor; and applying the inverse of the spin reversal transformation to the state of the analog processor via the digital processor. 29. The method of claim 27 wherein the digital processor applies problem automorphisms to generate replicas of the problem. 30. The method of claim 29 further comprising: reading out the state of the analog processor; and applying the inverse of the automorphisms to the state of the analog processor via the digital processor. 31. A method for assigning coupling strengths to qubits in a linear chain of N qubits, the linear chain of qubits having a first qubit and a last qubit, each qubit communicatively coupled to one or two other qubits in the linear chain of qubits via a coupler, the first and the last qubit communicatively coupled to one other qubit in the linear chain of qubits, the method comprising: sequentially labelling all couplers in the chain of qubits from i=1 to i=N−1, where i=1 is the label assigned to a coupler communicatively coupling the first qubit in the linear chain of qubits and a second qubit in the linear chain of qubits and i=N−1 is the label assigned to a coupler communicatively coupling the last qubit in the linear chain of qubits and a N−1 qubit in the linear chain of qubits; and iteratively repeating from i=1 to i=N−1: assign coupling strength Ji∝√{square root over (i)} to coupler i. 32. The method of claim 31 wherein the chain is a non-linear chain of qubits and wherein the coupling strength assigned to coupler i is Ji∝√{square root over (nl)}−√{square root over (nr)}, where nl is the number of qubits on a first portion of the non-linear chain of qubit including the ith qubit and nr is the number of qubits on a second portion of the linear chain of qubits including the ith+1 qubit. 33. A method for assigning coupling strengths to couplers in chains of qubits in a hardware graph of an analog processor via a hybrid processor comprising a digital processor and the analog processor, the method comprising: embedding a problem graph into the hardware graph of the analog processor; determining via the digital processor whether one or more chains in the embedded problem graphs are broken; if one of more chains are broken, determining via the digital processor the location of the break; and increasing the coupling strengths at the location of the break. 34. The method of claim 33 further comprising: causing the analog processor to evolve following a non-uniform annealing schedule across the hardware graph of the analog processor. 35. The method of claim 33 wherein increasing the coupling strength at the location of the break includes finding an upper-bound on the required chain strength by verifying that for each chain C of the embedded problem −J(e)>b(C, e) is respected for each edge e in C, wherein b(C, e) is defined as b(C, e):=min{b(C1(e)), b(C2(e))} and b(C):=Σν∈C|h(ν)|+Σν∈CΣu∈Uν|J(ν, u)| and J(e) is the coupling strength applied to edge e. 36. The method of claim 33 further comprising: iteratively repeating until an exit condition is met: sampling from the analog processor via the digital processor; determining via the digital processor whether one or more chains in the embedded problem graphs are broken; if one of more chains are broken, determining via the digital processor the location of the break; and increasing the coupling strengths at the location of the break.