The present invention provides an event-driven universal neural network circuit. The circuit comprises a plurality of neural modules. Each neural module comprises multiple digital neurons such that each neuron in a neural module has a corresponding neuron in another neural module. An interconnection network comprising a plurality of digital synapses interconnects the neural modules. Each synapse interconnects a first neural module to a second neural module by interconnecting a neuron in the first neural module to a corresponding neuron in the second neural module. Corresponding neurons in the first neural module and the second neural module communicate via the synapses. Each synapse comprises a learning rule associating a neuron in the first neural module with a corresponding neuron in the second neural module. A control module generates signals which define a set of time steps for event-driven operation of the neurons and event communication via the interconnection network.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A method comprising: for a port of a neural module comprising a plurality of neurons and a plurality of ports: classifying the port into one of a plurality of port types, wherein the port is classified into a different port type that another port of the plurality of ports; interconnecting the port to at least one synapse classified into the same port type as the port; maintaining synaptic connectivity information indicative of the at least one synapse, a total sum of synaptic weights of the at least one synapse, and a target sum; and selectively updating a set of learning rules for the at least one synapse based on the total sum and the target sum. 2. The method of claim 1, wherein the synaptic connectivity information comprises a list of all synapses the port is connected to. 3. The method of claim 1, wherein a first port and a second port of the plurality of ports are classified into a first port type and a second port type, respectively, and the first port type and the second port type are different port types. 4. The method of claim 1, wherein the selectively updating comprises: determining whether the total sum exceeds or is less than the target sum; and updating the set of learning rules in response to determining the total sum exceeds or is less than the target sum. 5. The method of claim 1, further comprising: for a neuron of the neural module: maintaining neural information indicative of a membrane potential of the neuron, a first set of ports of the plurality of ports the neuron sends output to, and a second set of ports of the plurality of ports the neuron receives input from. 6. A system comprising a computer processor, a computer-readable hardware storage medium, and program code embodied with the computer-readable hardware storage medium for execution by the computer processor to implement a method comprising: for a port of a neural module comprising a plurality of neurons and a plurality of ports: classifying the port into one of a plurality of port types, wherein the port is classified into a different port type that another port of the plurality of ports; interconnecting the port to at least one synapse classified into the same port type as the port; maintaining synaptic connectivity information indicative of the at least one synapse, a total sum of synaptic weights of the at least one synapse, and a target sum; and selectively updating a set of learning rules for the at least one synapse based on the total sum and the target sum. 7. The system of claim 6, wherein the synaptic connectivity information comprises a list of all synapses the port is connected to. 8. The system of claim 6, wherein a first port and a second port of the plurality of ports are classified into a first port type and a second port type, respectively, and the first port type and the second port type are different port types. 9. The system of claim 6, wherein the selectively updating comprises: determining whether the total sum exceeds or is less than the target sum; and updating the set of learning rules in response to determining the total sum exceeds or is less than the target sum. 10. The system of claim 6, the method further comprising: for a neuron of the neural module: maintaining neural information indicative of a membrane potential of the neuron, a first set of ports of the plurality of ports the neuron sends output to, and a second set of ports of the plurality of ports the neuron receives input from. 11. A computer program product comprising a computer-readable hardware storage medium having program code embodied therewith, the program code being executable by a computer to implement a method comprising: for a port of a neural module comprising a plurality of neurons and a plurality of ports: classifying the port into one of a plurality of port types, wherein the port is classified into a different port type that another port of the plurality of ports; interconnecting the port to at least one synapse classified into the same port type as the port; maintaining synaptic connectivity information indicative of the at least one synapse, a total sum of synaptic weights of the at least one synapse, and a target sum; and selectively updating a set of learning rules for the at least one synapse based on the total sum and the target sum. 12. The computer program product of claim 11, wherein the synaptic connectivity information comprises a list of all synapses the port is connected to. 13. The computer program product of claim 11, wherein a first port and a second port of the plurality of ports are classified into a first port type and a second port type, respectively, and the first port type and the second port type are different port types. 14. The computer program product of claim 11, wherein the selectively updating comprises: determining whether the total sum exceeds or is less than the target sum; and updating the set of learning rules in response to determining the total sum exceeds or is less than the target sum. 15. The computer program product of claim 11, the method further comprising: for a neuron of the neural module: maintaining neural information indicative of a membrane potential of the neuron, a first set of ports of the plurality of ports the neuron sends output to, and a second set of ports of the plurality of ports the neuron receives input from.