A neuromorphic device includes a pre-synaptic neuron, a synapse electrically coupled to the pre-synaptic neuron through a row line, and a post-synaptic neuron electrically coupled to the synapse through a column line. The post-synaptic neuron includes an integrator, a comparator, and an error corrector including an error detector and a correction signal generator. The comparator and the error corrector receive an output of the integrator.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A neuromorphic device, comprising: a pre-synaptic neuron; a synapse electrically coupled to the pre-synaptic neuron through a row line; and a post-synaptic neuron electrically coupled to the synapse through a column line, wherein the post-synaptic neuron comprises: an integrator; a comparator; and an error corrector including an error detector and a correction signal generator, wherein the comparator and the error corrector receive an output of the integrator. 2. The neuromorphic device of claim 1, wherein the error detector comprises: a positive input terminal receiving an expected value; and a negative input terminal receiving an output of the comparator. 3. The neuromorphic device of claim 2, wherein the error detector comprises a first output terminal providing an error value to the correction signal generator. 4. The neuromorphic device of claim 3, further comprising: a pre-synaptic neuron controller, wherein the error detector comprises a second output terminal providing the error value to the pre-synaptic neuron controller. 5. The neuromorphic device of claim 4, wherein the pre-synaptic neuron controller comprises an adder. 6. The neuromorphic device of claim 4, wherein the pre-synaptic neuron controller comprises an output terminal electrically coupled to the pre-synaptic neuron. 7. The neuromorphic device of claim 1, wherein the pre-synaptic neuron comprises: a buffer unit storing a pre-synaptic neuron input signal; and a pre-synaptic neuron pulse generator outputting a pre-synaptic neuron output signal. 8. The neuromorphic device of claim 7, wherein the buffer unit comprises a latch circuit. 9. The neuromorphic device of claim 1, wherein the correction signal generator comprises: a trigger input terminal receiving the output of the integrator; and a mode input terminal receiving a mode signal. 10. The neuromorphic device of claim 1, wherein an output terminal of the correction signal generator is electrically coupled to the column line. 11. A neuromorphic device, comprising: a plurality of pre-synaptic neurons; a plurality of synapses electrically coupled to the pre-synaptic neurons through row lines; a plurality of post-synaptic neurons electrically coupled to the plurality of synapses through column lines; and a pre-synaptic neuron controller receiving outputs of the plurality of post-synaptic neurons, wherein each of the plurality of post-synaptic neurons comprises: an integrator receiving an output of a corresponding synapse among the plurality of synapses; a comparator; and an error corrector, wherein the comparator and the error corrector receive an output of the integrator. 12. The neuromorphic device of claim 11, wherein first outputs of the error correctors of the plurality of post-synaptic neurons are inputted to the pre-synaptic neuron controller. 13. The neuromorphic device of claim 12, wherein second outputs of the error correctors of the plurality of post-synaptic neurons are inputted to the column lines, respectively. 14. The neuromorphic device of claim 11, wherein each of the error correctors of the plurality of post-synaptic neurons comprises an error detector and a correction signal generator, and wherein an output of the error detector is inputted to the correction signal generator. 15. The neuromorphic device of claim 14, wherein the output of the error detector is inputted to the pre-synaptic neuron controller. 16. The neuromorphic device of claim 14, wherein the error detector outputs a difference between an expected value and an output of the comparator. 17. The neuromorphic device of claim 11, wherein an output of the pre-synaptic neuron controller is inputted to the plurality of pre-synaptic neurons. 18. The neuromorphic device of claim 11, wherein the error corrector receives a mode signal. 19. A neuromorphic device, comprising: a pre-synaptic neuron; a synapse electrically coupled to the pre-synaptic neuron through a row line; a post-synaptic neuron electrically coupled to the synapse through a column line; and a pre-synaptic neuron controller electrically coupled to the post-synaptic neuron and the pre-synaptic neuron, wherein the post-synaptic neuron comprises an integrator, a comparator, and an error corrector, the integrator receiving an output of the synapse, the comparator and the error corrector receiving an output of the integrator, wherein the error corrector comprises an error detector receiving an output of the comparator and a correction signal generator receiving an output of the error detector, wherein the output of the error detector is further inputted to the pre-synaptic neuron controller, and wherein an output of the correction signal generator is inputted to the column line. 20-39. (canceled)