A neuromorphic device may include: a plurality of pre-synaptic neurons; row lines extending in a row direction from the plurality of pre-synaptic neurons; a plurality of post-synaptic neurons; column lines extended in a column direction from the plurality of post-synaptic neurons; a plurality of synapses arranged at intersections between the row lines and the column lines; a plurality of first control blocks; and first control lines extending from the control blocks. The first control lines may be electrically connected to the plurality of synapses.
Please help me write a proper abstract based on the patent claims. CLAIM: 1-8. (canceled) 9. A method of adjusting a resistance change ratio of a neuromorphic device, the method comprising: inputting a first pulse provided by a pre-synaptic neuron to a drain electrode of a transistor of a synapse through a row line; inputting a second pulse provided by a post-synaptic neuron to a second electrode of a memristor through a column line, the memristor having a first electrode connected to a source electrode of the transistor of the synapse; and inputting a gating pulse provided by a control block to a gate electrode of the transistor through a control line. 10. The method of claim 9, wherein the gating pulse has a rectangular shape. 11. The method of claim 10, wherein the gating pulse comprises one of N pulses having different voltage levels from the first pulse, N being a positive integer larger than 1. 12. The method of claim 10, wherein the gating pulse comprises one of N pulses having different generation times from the first pulse. 13. The method of claim 10, wherein the gating pulse comprises one of N pulses having different durations from the first pulse. 14. The method of claim 9, wherein the gating pulse has a triangular shape. 15. The method of claim 14, wherein the gating pulse comprises one of N pulses having different generation times from the first pulse. 16. The method of claim 14, wherein the gating pulse comprises one of N pulses having different maximum voltage levels from the first pulse. 17. The method of claim 14, wherein the gating pulse comprises one of N pulses having different durations from the first pulse. 18. The method of claim 9, wherein the first pulse is inputted to the drain electrode of the transistor at a first time, wherein the second pulse is inputted to the second electrode of the memristor at a second time, wherein the gating pulse is inputted to the gate electrode of the transistor at a third time, and wherein the first pulse, the second pulse, and the gating pulse are input to overlap with one another. 19. A method of adjusting a resistance change ratio of a neuromorphic device, the method comprising: inputting a first pulse provided by a pre-synaptic neuron to a drain electrode of a first transistor of a synapse through a row line; inputting a second pulse provided by a post-synaptic neuron to a second electrode of a memristor through a column line, the memristor having a first electrode connected to a source electrode of the first transistor of the synapse; and inputting a gating pulse provided by a first control block to a gate electrode of the first transistor through a first control line, wherein one or more of an amplitude, a shape, and a generation time of the first gating pulse are different from corresponding ones of amplitudes, shapes, and generation times of the first and second pulses. 20. The method of claim 19, wherein the first pulse is inputted to a drain electrode of a second transistor connected in parallel to the first transistor, wherein the method further comprises inputting a second gating pulse provided by a second control block to a gate electrode of the second transistor through a second control line, and wherein one or more of an amplitude, a shape, and a generation time of the second gating pulse are different from corresponding ones of the amplitudes, shapes, and generation times of the first and second pulses.