In order to provide a neural network computing apparatus and system, as well as a method therefor, which operate via a synchronization circuit in which all components are synchronized with one system clock, and which include a dispersion-type memory structure for storing artificial neural network data, and a calculating structure for processing all neurons through time-sharing in a pipeline circuit. The neural network computing apparatus includes a control unit for controlling the neural network computing apparatus; a plurality of memory units for outputting both a connection weight value and a neuron state value; and one calculating unit for using the connecting line attribute value and neuron state value inputted from the plurality of memory units so as to calculate a new neuron state value and provide feedback to each of the plurality of memory units.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A neural network computing apparatus comprising: a control unit configured to control the neural network computing apparatus; a plurality of memory units each configured to output a connection weight and a neuron state; and a calculation unit configured to calculate a new neuron state using the connection weight and the neuron state which are inputted from each of the memory units, and feed back the new neuron state to each of the memory units. 2-3. (canceled) 4. The neural network computing apparatus of claim 1, further comprising a switching unit provided between an output of the calculation unit and the plurality of memory units, and configured to select any one of input data from the control unit and the new neuron state from the calculation unit according to control of the control unit, and switch the selected data or neuron state to the plurality of memory units. 5. The neural network computing apparatus of claim 1, wherein each of the memory units comprises: a first memory configured to store a connection weight; a second memory configured to store the reference number of a neuron; a third memory having an address input connected to a data output of the second memory and configured to store a neuron state; and a fourth memory configured to store the new neuron state calculated through the calculation unit. 6. The neural network computing apparatus of claim 5, wherein each of the memory units further comprises: a first register operated in synchronization with a system clock, provided at an address input terminal of the first memory, and configured to temporarily store a connection bundle number inputted to the first memory; and a second register operated in synchronization with the system clock, provided at the address input terminal of the third memory, and configured to temporarily store the reference number of the neuron, outputted from the second memory, and the first memory, the second memory, and the third memory are operated in a pipeline manner according to the control of the control unit. 7. (canceled) 8. The neural network computing apparatus of claim 5, wherein the control unit stores data in the memories within each of the memory units through the following steps: a. searching for the number Pmax of input connections of the neuron that has the largest number of input connections within the neural network; b. when the number of the memory units is represented by p, adding null connections such that each of all neurons within the neural network has [Pmax/p]*p connections, the null connections having a connection weight which has no influence on adjacent neurons even though the null connections are connected to any neuron; assigning consecutive numbers to the sorted neurons; d. dividing the connections of all the neurons by p connections so as to classify the connections into [Pmax/p] connection bundles; e. assigning consecutive numbers k to the respective connection bundles from the first connection bundle of the first neuron to the last connection bundle of the last neuron; f. storing the weight of the i-th connection of the k-th connection bundle into the k-th address of the first memory of the i-th memory unit; g. storing the state of the j-th neuron into the j-th addresses of the third memories of the plurality of memory units; and h. storing the number value of a neuron connected to the i-th connection of the k-th connection bundle into the k-th address of the second memory of the i-th memory unit. 9. (canceled) 10. The neural network computing apparatus of claim 5, wherein the control unit stores data in the memories within each of the memory units through the following steps: a. searching for the number Pmax of input connections of the neuron that has the largest number of input connections within the neural network; b. when the number of the memory units is represented by p, adding null connections such that each of all neurons within the neural network has [Pmax/p]*p connections, the null connections having a connection weight which has no influence on adjacent neurons even though the null connections are connected to any neuron; c. assigning consecutive numbers to the sorted neurons; d. dividing the connections of all the neurons by p connections so as to classify the connections into [Pmax/p] connection bundles; e. assigning consecutive numbers k to the respective connection bundles from the first connection bundle of the first neuron to the last connection bundle of the last neuron; f. storing the weight of the i-th connection of the k-th connection bundle into the k-th address of the first memory of the i-th memory unit; g. storing the state of the j-th neuron into the j-th addresses of the third memories of the plurality of memory units; and h. storing the number value of a neuron connected to the i-th connection of the k-th connection bundle into the k-th address of the second memory of the i-th memory unit. 11. The neural network computing apparatus of claim 5, wherein a double memory swap circuit which swaps and connects all inputs and outputs of the same two memories using a plurality of digital switches controlled by a control signal from the control unit is applied to the third and fourth memories. 12. The neural network computing apparatus of claim 1, wherein each of the memory units comprises: a first memory configured to store a connection weight; a second memory configured to store the reference number of a neuron; and a third memory configured to store a neuron state. 13. The neural network computing apparatus of claim 12, wherein an existing neuron state and the new neuron state calculated through the calculation unit are stored in the third memory, and a single memory duplicate storage circuit which processes a read operation for the existing neuron state and a write operation for the new neuron state calculated through the calculation unit during one pipeline cycle is applied to the third memory. 14-16. (canceled) 17. The neural network computing apparatus of claim 1, wherein a parallel array computing line-method which uses demultiplexers corresponding to the number of inputs of a specific calculation device, a plurality of specific calculation devices, and multiplexers corresponding to the number of outputs of the specific calculation device, demultiplexes input data, which are sequentially provided, to the plurality of specific calculation devices through the demultiplexers, and collects and adds calculation results of the respective specific calculation devices through the multiplexers is applied to implement the internal structures of the respective calculation devices in a pipelined manner. 18. The neural network computing apparatus of claim 1, wherein the calculation unit comprises: a multiplication unit configured to perform a multiplication on the connection weight and the neuron state from the respective memory units; an addition unit having a tree structure and configured to perform an addition on a plurality of output values from the multiplication unit through one or more stages; an accumulator configured to accumulate output values from the addition unit; and an activation calculator configured to apply an activation function to the accumulated output value from the accumulator and calculate a new neuron state which is to be used at the next neural network update cycle. 19-21. (canceled) 22. The neural network computing apparatus of claim 18, further comprising a FIFO queue provided between the accumulator and the activation calculator. 23-26. (canceled) 27. A neural network computing system comprising: a control unit configured to control the neural network computing system; a plurality of memory units each comprising a plurality of memory parts configured to output connection weights and neuron states, respectively; and a plurality of calculation units each configured to calculate a new neuron state using the connection weights and the neuron states which are inputted from the corresponding memory parts within the plurality of memory units, and feed back the new neuron state to the corresponding memory parts. 28. (canceled) 29. The neural network computing system of claim 27, wherein each of the memory parts comprises: a first memory configured to store a connection weight; a second memory configured to store the reference number of a neuron; a first memory group comprising a plurality of memories to perform the function of an integrated memory having a capacity plural times larger than the unit memory through a decoder circuit, and configured to store neuron states; and a second memory group comprising a plurality of commonly connected memories and configured to store a new neuron state calculated through the corresponding calculation unit. 30. The neural network computing system of claim 29, wherein the j-th memory of the first memory group of the i-th memory part and the i-th memory of the second memory group of the j-th memory part are implemented in a double memory swap method that swaps and connects all inputs and outputs according to control of the control unit, where i and j are arbitrary natural numbers. 31. The neural network computing system of claim 29, wherein the control unit stores data in the memories within each of the memory parts according to the following steps: a. dividing all neurons within the neural network into H uniform neuron groups; b. searching for the number Pmax of input connections of the neuron that has the largest number of input connections within each of the neuron groups; c. represented by p, adding null connections such that each of all the neurons within the neural network has [Pmax/p]*p connections; d. numbering all the neurons within each of the neuron groups in arbitrary order; e. connection bundles; f. assigning a number k to each of the connection bundles from the first connection bundle of the first neuron to the last connection bundle of the last neuron in each of the neuron groups, the number k starting from 1 and increasing by 1; g. storing the weight of the i-th connection of the k-th connection bundle of the h-th neuron group into the j-th address of the first memory of the h-th memory part of the i-th memory unit among the memory units; and h. reference number of a neuron connected to the i-th connection of the k-th connection bundle of the h-th neuron group into the j-th address of the second memory of the h-th memory part of the i-th memory unit among the memory units. 32. (canceled) 33. A neural network computing apparatus comprising: a control unit configured to control the neural network computing apparatus; a plurality of memory units each configured to output a connection weight and a neuron error value; and a calculation unit configured to calculate a new neuron error value using the connection weight and the neuron error value which are inputted from each of the memory units, and feed back the new neuron error value to each of the memory units. 34. The neural network computing apparatus of claim 33, wherein the calculation unit calculates a new neuron error value using the connection weight and the neuron error value which are inputted from each of the memory units and training data provided from the control unit, and feeds back the new neuron error value to each of the memory units. 35. The neural network computing apparatus of claim 33, wherein each of the memory units comprises: a first memory configured to store a connection weight; a second memory configured to store the reference number of a neuron; a third memory configured to store a neuron error value; and a fourth memory configured to store the new neuron error value calculated through the calculation unit. 36. A neural network computing apparatus comprising: a control unit configured to control the neural network computing apparatus; a plurality of memory units each configured to output a connection weight and a neuron state and calculate a new connection weight using the connection weight, the neuron state, and a learning attribute; and a calculation unit configured to calculate a new neuron state and the learning attribute using the connection weight the neuron state which are inputted from each of the memory units. 37. The neural network computing apparatus of claim 36, wherein each of the memory units comprises: a first memory configured to store a connection weight; a second memory configured to store the reference number of a neuron; a third memory configured to store a neuron state; a fourth memory configured to store the new neuron state calculated through the calculation unit; a first delay unit configured to delay the connection weight from the first memory; a second delay unit configured to delay the neuron state from the third memory, a connection weight adjust module configured to calculate a new connection weight using the learning attribute from the calculation unit, the connection weight from the first delay unit, and the neuron state from the second delay unit; and a fifth memory configured to store the new connection weight calculated through the connection weight adjust module. 38. The neural network computing apparatus of claim 37, wherein a double memory swap circuit that swaps and connects all inputs and outputs according to control of the control unit is applied to each pair of the first and fifth memories and the third and fourth memories. 39. The neural network computing apparatus of claim 37, wherein each pair of the first and fifth memories and the third and fourth memories is implemented with one memory. 40. The neural network computing apparatus of claim 37, wherein the connection weight adjust module comprises: a third delay unit configured to delay the connection weight from the first delay unit; a multiplier configured to multiply the learning attribute from the calculation unit by the neuron state from the second delay unit; and an adder configured to add the connection weight from the third delay unit and an output value of the multiplier and output a new connection weight. 41. A neural network computing apparatus comprising: a control unit configured to control the neural network computing apparatus; a first learning attribute memory configured to store a learning attribute of a neuron; a plurality of memory units each configured to output a connection weight and a neuron state, and calculate a new connection at weight using the connection weight, the neuron state, and the learning attribute of the first learning attribute memory; a calculation unit configured to calculate a new neuron state and a new learning attribute using the connection weight the neuron state which are inputted from each of the memory units; and a second learning attribute memory configured to store the new learning attribute calculated through the calculation unit. 42. The neural network computing apparatus of claim 41, wherein each of the memory units comprises: a first memory configured to store a connection weight; a second memory configured to store the reference number of a neuron; a third memory configured to store a neuron state; a fourth memory configured to store a new neuron state calculated through the calculation unit; a connection weight adjust module configured to calculate a new connection weight using the connection weight, the neuron state, and the learning attribute of the first learning attribute memory; and a fifth memory configured to store the new connection weight calculated through the connection weight adjust module. 43. The neural network computing apparatus of claim 42, wherein a double memory swap circuit which swaps and connects all inputs and outputs according to control of the control unit is applied to each pair of the first and second learning attribute memories, the first and fifth memories, and the third and fourth memories. 44. The neural network computing apparatus of claim 42, wherein each pair of the first and second learning attribute memories, the first and fifth memories, and the third and fourth memories is implemented with one memory. 45. (canceled) 46. A neural network computing apparatus comprising: a control unit configured to control the neural network computing apparatus; a plurality of memory units each configured to store and output a connection weight, a forward neuron state, and a backward neuron error value and calculate a new connection weight; and a calculation unit configured to calculate a new forward neuron state and a new backward neuron error value based on data inputted from each of the memory units, and feed back the new forward neuron state and the new backward neuron error value to each of the memory units. 47. (canceled) 48. The neural network computing apparatus of claim 46, wherein each of the memory units comprises: a first memory configured to store an address value of a second memory; the second memory configured to store a connection weight; a third memory configured to store the reference number of a neuron; a fourth memory configured to store a backward neuron error value; a fifth memory configured to store a new backward neuron error value calculated through the calculation unit; a sixth memory configured to store the reference number of a neuron; a seventh memory configured to store a forward neuron state; an eighth memory configured to store a new forward neuron state calculated through the calculation unit; a first switch configured to select an input of the second memory; a second switch configured to switch an output of the fourth or seventh memory to the calculation unit; a third switch configured to switch an output of the calculation unit to the fifth or eighth memory; and switch configured to switch an OutSel input to the fifth or eighth memory. 49-50. (canceled) 51. The neural network computing apparatus of claim 48, wherein the control unit stores data in the memories within each of the memory units according to the following steps: a. when both ends of each connection in a forward network of the artificial neural network are divided into one end from which an arrow is started and the other end at which the arrow is ended, assigning a number satisfying the following conditions to both ends of each connection: 1. outbound connections from each neuron to another neuron have a unique number which does not overlap another number; 2. inbound connections from each neuron to another neuron have a unique number which does not overlap another number, 3. both ends of each connection have the same number, and 4. each connection has as low a number as possible, while satisfying the above-described conditions 1 to 3; b. searching for the largest number Pmax among the numbers assigned to the outbound or inbound connections of all the neurons; c. while the numbers assigned to the respective connections of all the neurons within the forward network are maintained, adding new null connections to all empty numbers among numbers ranging from 1 to [Pmax/p]*p such that each neuron has [Pmax/p]*p input connections; d. assigning numbers to the respective neurons within the forward network in arbitrary order; e. dividing the connections of all the neurons within the forward network by p connections so as to classify the connections into [Pmax/p] forward connection bundles; f. sequentially assigning a number k to each of the forward connection bundles from the first forward connection bundle of the first neuron to the last forward connection bundle of the last neuron, the number k starting from 1 and increasing by 1; g. storing the initial value of the weight of the i-th connection of the k-th forward connection bundle into the k-th addresses of the second and ninth memories of the i-th memory unit among the memory units; h. storing the unique number of a neuron connected to the i-th connection of the k-th forward connection bundle into the k-th address of the sixth memory of the i-th memory unit among the memory units; i. storing a forward neuron state of a neuron having a unique number j into the j-th addresses of the seventh and eighth memories of each of the memory units; j. while the numbers assigned to the respective connections of all the neurons within the backward network are maintained, adding new null connections to all empty numbers among numbers ranging from 1 to [Pmax/p]*p such that each neuron has [Pmax/p]*p input connections; k. dividing the connections of all the neurons within the backward network by p connections so as to classify the connections into [Pmax/p] backward connection bundles; l. sequentially assigning a number k to each of the backward connection bundles from the first backward connection bundle of the first neuron to the last backward connection bundle of the last neuron, the number k starting from 1 and increasing by 1; m. storing the position value of the i-th connection of the k-th backward connection bundle, which is positioned in the second memory of the i-th memory unit among the memory units, into the k-th address of the first memory of the i-th memory unit among the memory units; n. storing the reference number of a neuron connected to the i-th connection of the k-th backward connection bundle into the k-th address of the third memory of the i-th memory unit among the memory units. 52. The neural network computing apparatus of claim 51, wherein a value satisfying the condition of the step a is acquired through an edge coloring algorithm. 53. The neural network computing apparatus of claim 46, wherein each of the memory units comprises: a first memory configured to store an address value of a second memory, the second memory configured to store a connection weight; a third memory configured to store the reference number of a neuron; a fourth memory configured to store a backward neuron error value or forward neuron state; a fifth memory configured to store a new backward neuron error value or forward neuron state calculated through the calculation unit; and a switch configured to select an input of the second memory. 54. The neural network computing apparatus of claim 46, wherein the calculation unit comprises: a multiplication unit configured to perform a multiplication on the connection weights and the forward neuron states or the connection weights and the backward neuron error values from the respective memory units; an addition unit having a tree structure and configured to perform an addition on a plurality of output values from the multiplication unit through one or more stages; an accumulator configured to accumulate output values from the addition unit; and a soma processor configured to receive training data from the control unit and the accumulated output value from the accumulator, and calculate a new forward neuron state or backward neuron error value. 55-60. (canceled) 61. A memory device of a digital system, wherein a double memory swap circuit which swaps and connects all inputs and outputs of two memories using a plurality of digital switches controlled by a control signal from an external control unit is applied to the two memories. 62. A neural network computing method comprising: outputting, by a plurality of memory units, connection weights and neuron states, respectively, according to control of a control unit; and calculating, by a calculation unit, a new neuron state using the connection weight and the neuron state which are inputted from each of the memory units and feeding back the new neuron state to each of the memory units, according to control of the control unit, wherein the plurality of memory units and the calculation unit are synchronized with one system clock and operated in a pipeline manner according to control of the control unit. 63. A neural network computing method comprising: receiving data, which is to be provided to an input neuron, from a control unit according to control of the control unit; switching the received data or a new neuron state from a calculation unit to a plurality of memory units according to control of the control unit; outputting, by the plurality of memory units, connection weights and neuron states, respectively, according to control of the control unit; calculating, by the calculation unit, a new neuron state using the connection weight and the neuron state which are inputted from each of the memory units, according to control of the control unit; and outputting, by first and second output units, the new neuron state from the calculation unit to the control unit, wherein the first and second output units are implemented with a double memory swap circuit which swaps and connects all inputs and outputs according to control of the control unit. 64. A neural network computing method comprising: outputting, by a plurality of memory parts within a plurality of memory units, connection weights and neuron states, respectively, according to control of a control units; and calculating, by a plurality of calculation units, new neuron states using the connection weights and the neuron states which are inputted from the corresponding memory parts within the plurality of memory units and feeding back the new neuron states to the corresponding memory parts, according to control of the control unit, wherein the plurality of memory parts within the plurality of memory units and the plurality of calculation units are synchronized with one system clock and operated in a pipeline manner according to control of the control unit. 65. A neural network computing method comprising: outputting, by a plurality of memory units, connection weights and neuron error values, respectively, according to control of a control unit; and calculating, by a calculation unit, a new neuron error value using the connection weight and the neuron error value which are inputted from each of the memory units and feeding back the new neuron error value to each of the memory units, according to control of the control unit, wherein the plurality of memory units and the calculation unit are synchronized with one system clock and operated in a pipeline manner according to control of the control unit. 66. A neural network computing method comprising: outputting, by a plurality of memory units, connection weights and neuron state, respectively, according to control of a control unit; calculating, by a calculation unit, a new neuron state and a learning attribute using the connection weight and the neuron state which are inputted from each of the memory units, according to control of the control units; and calculating, by the plurality of memory units, new connection weights using the connection weights, the neuron states, and the learning attribute, according to control of the control unit, wherein the plurality of memory units and the calculation unit are synchronized with one system clock and operated in a pipeline manner according to control of the control unit. 67. A neural network computing method comprising: storing and outputting, by a plurality of memory units, connection weight, forward neuron states, and backward neuron error values, respectively, and calculating new connection weight, according to control of a control unit; and calculating, by a calculation unit, a new forward neuron state and a new backward neuron error value based on data inputted from each of the memory units and feeding back the new forward neuron state and the new backward neuron error value to each of the memory units, according to control of the control unit, wherein the plurality of memory units and the calculation unit are synchronized with one system clock and operated in a pipeline manner according to control of the control unit. 68. (canceled)