Three-dimensional neural network array. In an exemplary embodiment, a three-dimensional (3D) neural network includes a plurality of input conductors forming a plurality of stacked input layers having a first orientation, and at least one output conductor forming an output layer having the first orientation. The three-dimensional (3D) neural network also includes a plurality of hidden conductors having a second orientation. Each hidden conductor includes an in-line threshold element. The three-dimensional (3D) neural network also includes synapse elements coupled between the hidden conductors and the input conductors and between the hidden conductors and the output conductor. Each synapse element includes a programmable resistive element.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A three-dimensional (3D) neural network, comprising: a plurality of input conductors forming a plurality of stacked input layers having a first orientation; at least one output conductor forming an output layer having the first orientation; a plurality of hidden conductors having a second orientation, and wherein each hidden conductor includes an in-line threshold element; and synapse elements coupled between the hidden conductors and the input conductors and between the hidden conductors and the output conductor, and wherein each synapse element includes a programmable resistive element. 2. The 3D neural network of claim 1, wherein the hidden conductors pass through the input and output layers. 3. The 3D neural network of claim 1, wherein the first orientation is horizontal and the second orientation is vertical. 4. The 3D neural network of claim 1, wherein the input and output layers are substantially perpendicular to the hidden conductors. 5. The 3D neural network of claim 1, wherein the input layers are coupled to the hidden conductors on an input side of the in-line threshold elements and the output layer is coupled to the hidden conductors on an output side of the in-line threshold element. 6. The 3D neural network of claim 1, wherein each threshold element comprises threshold material selected from a set of materials comprising diode material, Schottky diode material, NbOx material, TaOx material or VCrOx material. 7. The 3D neural network of claim 1, wherein each programmable resistive element comprises material selected from a set of materials comprising resistive material, phase change material, ferroelectric material, and magnetic material. 8. The 3D neural network of claim 1, wherein each programmable resistive element is programmable to provide a selected one of a plurality of selectable resistances. 9. The 3D neural network of claim 1, wherein input signals applied to the input conductors flow through programmable resistive elements of a first group of synapse elements to the hidden conductors, flow through the in-line threshold elements of the hidden conductors, and flow through programmable resistive elements of a second group of synapse elements to the output conductor. 10. A synapse element for use in a three-dimensional (3D) neural network, the synapse element comprising: a threshold layer having an outside surface connected to a first conductor and having an inside surface; and a programmable resistive layer having an outside surface connected to the inside surface of the threshold layer and having an inside surface connected to a second conductor, and wherein the programmable resistive layer is programmable to provide a plurality of resistance values. 11. The synapse element of claim 10, wherein the threshold layer comprises threshold material selected from a set of materials comprising diode material, Schottky diode material, NbOx material, TaOx material or VCrOx material. 12. The synapse element of claim 10, wherein the programmable resistive layer comprises material selected from a set of materials comprising resistive material, phase change material, ferroelectric material, and magnetic material. 13. The synapse element of claim 10, wherein the first and second conductors are orientated in different directions. 14. A three-dimensional (3D) neural network, comprising: a first plurality of input conductors forming a first plurality of input layers; a second plurality of input conductors forming a second plurality of input layers; a plurality of output conductors forming a plurality of output layers; a plurality of hidden conductors; and a plurality of synapse elements that connect the input and output conductors to the hidden conductors, wherein each synapse element includes a programmable resistive element and a threshold element. 15. The 3D neural network of claim 1, wherein each threshold element comprises a diode having a diode input and a diode output. 16. The 3D neural network of claim 15, wherein synapse elements that connect the input conductors to the hidden conductors have diode outputs connected to the hidden conductors. 17. The 3D neural network of claim 15, wherein synapse elements that connect the output conductors to the hidden conductors have diode outputs connected to the output conductors. 18. The 3D neural network of claim 15, further comprising logic that directs output signals from the output conductors to either the first plurality of input conductors or the second plurality of input conductors. 19. The 3D neural network of claim 18, wherein the hidden conductors are partitioned into two or more groups that further partition the first plurality of input conductors and the second plurality of input conductors into a corresponding number of groups, and wherein the logic directs the output signals from the output conductors to any of the groups of the first plurality of input conductors and the second plurality of input conductors. 20. An integrated circuit, comprising: a three-dimensional (3D) neural network, comprising: a plurality of input conductors forming a plurality of stacked input layers having a first orientation; at least one output conductor forming an output layer having the first orientation; a plurality of hidden conductors having a second orientation, and wherein each hidden conductor includes an in-line threshold element; and synapse elements coupled between the hidden conductors and the input conductors and between the hidden conductors and the output conductor, and wherein each synapse element includes a programmable resistive element.