A method for selecting bit widths for a fixed point machine learning model includes evaluating a sensitivity of model accuracy to bit widths at each computational stage of the model. The method also includes selecting a bit width for parameters, and/or intermediate calculations in the computational stages of the mode. The bit width for the parameters and the bit width for the intermediate calculations may be different. The selected bit width may be determined based on the sensitivity evaluation.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A method for selecting bit widths for a fixed point machine learning model, comprising: evaluating a sensitivity of model accuracy to bit widths at each computational stage of the model; and selecting a bit width for one or more of parameters and intermediate calculations in the computational stages of the model based at least in part on the evaluating. 2. The method of claim 1, in which the model accuracy comprises a signal quantization to noise ratio (SQNR) at an output of the model or classification accuracy. 3. The method of claim 1, in which: the model comprises a neural network and the computational stage is a layer of the neural network; the parameters comprise one or more of bias values and weights; and the intermediate calculations comprise activation values. 4. The method of claim 3, in which the bit width is based at least in part on connectivity of the network. 5. The method of claim 4, in which the connectivity comprises a fully connected configuration, a convolutional configuration, or a configuration with a specific sparsity. 6. The method of claim 5, in which a bit width for a fully connected layer is less than a bit width for a convolutional layer of the neural network. 7. The method of claim 6, in which the weights and/or the bias values of the fully connected layer and the convolutional layer are random in a transfer learning arrangement. 8. The method of claim 3, in which selecting of the bit width is based at least in part on whether the bit width is for a bias value, weight, or activation value. 9. The method of claim 3, in which the bit width for one or more of the bias values, the weights, and the activation values is based at least in part on a number of weights per layer, a number of activation values per layer, filter size per layer, filter stride per layer, and number of filters per layer in the neural network. 10. The method of claim 3, further comprising fine-tuning the network after selecting one or more of the bit width for the bias values, the activation values, and the weights of each layer. 11. The method of claim 1, in which a bit width for the intermediate calculations of the computational stage is less than a bit width for the parameters in the computational stage. 12. The method of claim 1, further comprising: injecting noise into at least one computational stage of the model; determining a model accuracy for the at least one computational stage of the injected noise; and selecting a level of injected noise that provides a desired level of model accuracy. 13. The method of claim 1, further comprising dynamically changing the bit width based at least in part on performance specifications or system resources or user input. 14. The method of claim 1, in which an output layer uses a floating point number format. 15. An apparatus for selecting bit widths for a fixed point machine learning model, comprising: a memory; and at least one processor coupled to the memory, the at least one processor configured: to evaluate a sensitivity of model accuracy to bit widths at each computational stage of the model; and to select a bit width for one or more of parameters and intermediate calculations in the computational stages of the model based at least in part on the evaluating. 16. The apparatus of claim 15, in which the model accuracy comprises a signal quantization to noise ratio (SQNR) at an output of the model or classification accuracy. 17. The apparatus of claim 15, in which: the model comprises a neural network and the computational stage is a layer of the neural network; the parameters comprise one or more of bias values and weights; and the intermediate calculations comprise activation values. 18. The apparatus of claim 17, in which the at least one processor is further configured to select the bit width based at least in part on connectivity of the network. 19. The apparatus of claim 18, in which the connectivity comprises a fully connected configuration, a convolutional configuration or a configuration with a specific sparsity. 20. The apparatus of claim 19, in which a bit width for a fully connected layer is less than a bit width for a convolutional layer of the neural network. 21. The apparatus of claim 20, in which one or more of the weights or the bias values of the fully connected layer and the convolutional layer are random in a transfer learning arrangement. 22. The apparatus of claim 17, in which the at least one processor is further configured to select the bit width based at least in part on whether the bit width is for a bias value, weight, or activation value. 23. The apparatus of claim 17, in which the at least one processor is further configured to select the bit width for one or more of the bias values, the weights, and the activation values based at least in part on a number of weights per layer, a number of activation values per layer, filter size per layer, filter stride per layer, and number of filters per layer in the neural network. 24. The apparatus of claim 17, in which the at least one processor is further configured to fine-tune the network after selecting one or more of the bit width for the bias values, the activation values, and the weights of each layer. 25. The apparatus of claim 15, in which the at least one processor is further configured to select a bit width for the intermediate calculations of the computational stage to be less than a bit width for the parameters in the computational stage. 26. The apparatus of claim 15, in which the at least one processor is further configured: to inject noise into at least one computational stage of the model; to determine a model accuracy for the at least one computational stage of the injected noise; and to select a level of injected noise that provides a desired level of model accuracy. 27. The apparatus of claim 15, in which the at least one processor is further configured to dynamically change the bit width based at least in part on performance specifications or system resources or user input. 28. The apparatus of claim 15, in which an output layer of the model uses a floating point number format. 29. An apparatus for selecting bit widths for a fixed point machine learning model, comprising: means for evaluating a sensitivity of model accuracy to bit widths at each computational stage of the model; and means for selecting a bit width for one or more of parameters and intermediate calculations in the computational stages of the model based at least in part on the evaluating. 30. A non-transitory computer readable medium having encoded thereon program code for selecting bit widths for a fixed point machine learning model, the program code being executed by a processor and comprising: program code to evaluate a sensitivity of model accuracy to bit widths at each computational stage of the model; and program code to select a bit width for one or more of parameters and intermediate calculations in the computational stages of the model based at least in part on the evaluating.