A circuit element of a multi-dimensional dynamic adaptive neural network array (DANNA) may comprise a neuron/synapse select input functional to select the circuit element to function as one of a neuron and a synapse. In one embodiment of a DANNA array of such circuit elements, (wherein a circuit element or component thereof may be analog or digital), a destination neuron may be connected to a first neuron by a first synapse in one dimension, a second destination neuron may be connected to the first neuron by a second synapse in a second dimension and, optionally, a third destination neuron may be connected to the first neuron by a third synapse. The DANNA may thus form multiple levels of neuron and synapse circuit elements. In one embodiment, multiples of eight inputs may be selectively received by the circuit element selectively functioning as one of a neuron and a synapse. The dynamic adaptive neural network array (DANNA) may comprise a special purpose processor for performing one of a control, anomaly detection and classification application and may comprise a first structure connected to a neuroscience-inspired dynamic artificial neural network (NIDA), comprise substructures thereof or be combined with other neural networks.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. Apparatus for a neuromorphic network comprising an artificial neural network, the artificial neural network comprising a multi-dimensional array of interconnected circuit elements, each circuit element having similar components to one another selectively representing, under special purpose program control, one of a neuron and a synapse, at least one circuit element of the array selectively representing an input neuron, at least one circuit element of the array selectively representing an output synapse and under program control one to multiple circuit elements of the array selectively representing a neuron or a synapse connected between the input neuron and the output synapse. 2. The apparatus of claim 1, the selected elements of the array comprising a programmable logic array, ASIC or VLSI component. 3. The apparatus of claim 2, defined by a hardware description language, circuit diagram and/or logic equations. 4. The apparatus of claim 3 wherein said hardware description language is one of VHDL and Verilog. 5. The apparatus of claim 1 wherein at least one circuit element is a digital circuit element. 6. The apparatus of claim 1 wherein at least one circuit element contains an analog electronic device. 7. The apparatus of claim 6 wherein said analog electronic device is an analog signal storage device. 8. The apparatus of claim 1, the special purpose program control implemented using one of a microprocessor, a microcontroller, and a processor core. 9. The apparatus of claim 1 wherein a given circuit element representing a neuron is adapted to be connected to at least one destination neuron, each connection comprising at least one synapse, the connections resulting in an at least one level neural network structure. 10. The apparatus of claim 1 wherein a circuit element of the array accepts greater than or equal to eight inputs in multiples of eight inputs. 11. The apparatus of claim 1 wherein a circuit element of the array of interconnected circuit elements comprises an accumulator, a comparator, a refractory period input and a threshold input, the accumulator accumulating charge from a plurality of selectable inputs of the circuit element for comparison at the comparator with the threshold input, and, if the accumulated charge is greater than the threshold and if a refractory period has lapsed, the comparator causing a fire output of the circuit element. 12. The apparatus of claim 1 wherein a circuit element of the array comprises a synapse distance/delay register having a synapse distance/delay input and a FIFO with sufficient entries to represent the maximum synapse distance/delay to hold input fire events, the synapse distance/delay register, responsive to an input fire multiplexer, outputting a fire signal to an element fire signal line according to the synapse distance/delay input. 13. The apparatus of claim 1 wherein a plurality of circuit elements comprise neurons and synapses forming a loop, each synapse of the loop having a direction from a source neuron of the loop to a destination neuron of the loop around the loop. 14. The apparatus of claim 13 wherein a second plurality of circuit elements comprise neurons and synapses, the second plurality of circuit elements forming a neural pathway sharing at least one neuron of the first plurality of neurons and synapses forming the loop. 15. The apparatus of claim 1 further comprising an interface and control unit and a configuration unit for respectively interfacing with the array of neuron and synapse circuit elements and for configuring the array of neuron and synapse circuit elements under the special purpose program control of a controller and further comprising an interface to an external process to be controlled. 16. The apparatus of claim 15, the controller further comprising an optimizing device for connection with the controller to the interface and control unit and the configuration unit. 17. The apparatus of claim 16 further comprising one of a modulator and a demodulator for connection among the interface, control unit and an external process. 18. The apparatus of claim 16 further comprising an optimization function implemented by the optimizing device and using input from a performance function, for measuring performance and modifying the artificial neural network to improve performance of one of a control, detection and classification application. 19. The apparatus of claim 1 comprising it plurality of artificial neural networks, one artificial neural network, during a period of off-line learning, implementing a model of an external process comprising an application of the plurality of artificial neural networks, another artificial neural network of the plurality of artificial neural networks, during a period of on-line learning, reacting to events of the external process and a controller for judging performance of the at least one of the plurality of artificial neural networks from interactions with the external process, the model of the external process being modified by the controller as a result of said judged performance. 20. The apparatus of claim 12 further comprising a clock circuit for generating a plurality of clock signals and an long-term potentiation and depression state machine, the clock signals comprising a network clock signal input to the synapse distance register and to a counter representing a long-term potentiation and depression refractory period signal, a long-term potentiation and depression refractory period signal to the long-term potentiation and depression state machine, the long-term potentiation and depression state machine for respectively outputting an increment/decrement weight signal to an accumulator of a circuit element representing a synapse. 21. The apparatus of claim 1 wherein a given circuit element of the array connects to one of multiple circuit elements of the array m multiples of eight other circuit elements. 22. The apparatus of claim 1 comprising an array of a plurality of X columns of circuit elements and Y rows of circuit elements, at least one circuit element being selectively enabled, each selectively enabled circuit element performing a selected function of one of a neuron and of a synapse, wherein X and Y are integers, the array having an output register for selectively receiving a value from a circuit element in a column and providing an output signal according to said received value. 23. The apparatus of claim 1 comprising an array of a plurality of X columns of circuit elements and V rows of circuit elements, one circuit element representing a destination neuron and a plurality of connected circuit elements representing synapse circuit elements selectively connected under special purpose program control to the destination neuron such that long-term potentiation and depression occur symmetrically on synapses connected to enabled inputs of the destination neuron, the destination neuron's enabled input from the first output of a plurality of synapses being randomly sampled, and, thereafter, the plurality of synapses being sequentially sampled until all connected synapse inputs are sampled, the next input from a synapse to the destination neuron being randomly selected from the plurality of synapses. 24. The apparatus of claim 23 wherein the array comprises the destination neuron connected to a plurality of synapses, one of the synapses emitting a weight signal on at least one of its outputs, the at least one output including an output of the weight signal to be received at an enabled input of the destination neuron, the destination neuron one of 1) having a charge state insufficient to fire upon receiving the weight signal, 2) being not refractory and having a charge state sufficient to fire and 3) being refractory, the connected synapse determining that its outputs caused the neuron to fire or did not cause the neuron to fire during a given clock cycle. 25. The apparatus of claim 1 comprising an artificial neural network having at least one destination neuron and at least one connected synapse, each of the destination neuron and the synapse comprising one circuit element, the array having a network clock having a plurality of k cycles where k is an integer greater than zero network clock cycles, the at least one synapse being configured to implement a delay line of k greater than zero clock cycles and to emit a weight value causing the destination neuron to fire when the firing event is received at an enabled input of the destination neuron. 26. The apparatus of claim 25 whereas the destination neuron continues to fire at least once every k, being greater than zero, clock cycles, the destination neuron and connected synapse forming an oscillating structure. 27. The apparatus of claim 26 wherein the oscillating structure comprises a central pattern generator, the apparatus further comprising a database for storing at least a central pattern generator having at least one destination neuron and at least one connected synapse. 28. The apparatus of claim 27, said artificial neural network comprising a central pattern generator being retrieved under program control from the database for a particular application of one of control, detection and classification. 29. The apparatus of claim 1 comprising at least one artificial neural network determined using evolutionary optimization of firing parameters of neurons and delay parameters of synapses. 30. A circuit element for use in a multi-dimensional artificial neural network array, the circuit element comprising a neuron/synapse select input for selecting one of a neuron and synapse function of the circuit element, an accumulator, a comparator, a refractory period input and a threshold input, the accumulator accumulating charge from a plurality of selectable inputs for comparison at the comparator with the threshold, and, if a refractory period has lapsed and the accumulated charge is greater than the threshold, the comparator causing a fire output of the circuit element of the neural network array when the circuit element selectively performs a neuron function. 31. The circuit element of claim 30, the circuit element comprising a digital circuit element. 32. The circuit element of claim 30 comprising a plurality of clock inputs to circuit elements, an accumulate clock input of the accumulator being one of the plurality of clock inputs, an acquire clock input and an input select signal to an input data multiplexer for inputting data to the accumulator and to an output tire component responsive 10 the comparator for outputting a fire signal, the acquire clock input being another of the plurality of clock inputs. 33. The circuit element of claim 30 for selectively receiving a plurality of inputs at an input data multiplexer representing weight values, a weight value being received from at least one circuit element having a synapse function. 34. The circuit element of claim 30 further comprising an input multiplexer for selectively receiving a plurality of inputs representing a fire signal received from at least one circuit element having a selected neuron function; and a long-term potentiation and depression state machine, responsive to the input multiplexer, for outputting an increment/decrement weight signal and for outputting a long-term potentiation and depression refractory period signal to a counter, the counter for receiving a control input representing a long-term potentiation and depression refractory period and enabling the increment/decrement weight signal. 35. A method for constructing a neuromorphic network comprising at least one artificial neural network, the artificial neural network comprising a multi-dimensional array of interconnected circuit elements, each circuit element having similar components to one another selectively representing, under special purpose program control, one at a neuron and a synapse, at least one circuit element of the array selectively representing an input neuron, at least one circuit element of the array selectively representing an output synapse and under program control one to multiple circuit elements of the array selectively representing a neuron or a synapse connected between the input neuron and the output synapse. 36. The method of claim 35 further comprising defining the special purpose program control by one of a hardware description language, a circuit diagram and logic equations. 37. The method of claim 35 further comprising connecting a destination neuron to a plurality of synapses resulting in a multiple level neural network structural array of circuit elements. 38. The method of claim 35, a circuit element of the array comprising an accumulator, a comparator, a refractory period input and it threshold input, the accumulator accumulating charge from a plurality of selectable inputs of the circuit element for comparison at the comparator with the threshold input, and, if the accumulated charge is greater than the threshold and if a refractory period has lapsed, the comparator causing a fire output of the circuit element. 39. The method of claim 35, a circuit element of the array comprising a synapse distance register having a synapse distance input and a FIFO with sufficient entries to represent the maximum synapse distance to hold input fire events; the synapse distance register, responsive to an input fire multiplexer, outputting a fire signal to an element fire lead according to the synapse distance input. 40. The method of claim 35, the array having an optimization device, the optimizing device measuring performance of the artificial neural network and modifying the artificial neural network for one of a control, detection and classification application to optimize performance of the application. 41. The method of claim 35 wherein the artificial neural network comprises a plurality of artificial neural networks, the method further comprising, during a period of off-line learning, generating and improving a model of an external process comprising an application of one of the plurality of artificial neural networks, another artificial neural network of the plurality of artificial neural networks, during a period of on-line learning, reacting to events of the external process and judging performance of the one artificial neural network from interactions with the external process, the model of the external process being updated as the external process changes. 42. The method of claim 35 wherein the array comprises the destination neuron connected to a plurality of synapses, one of the plurality of synapses emitting a weight signal on at least one of its outputs, the at least one output including an output of the weight signal to be received at an input of the destination neuron, the destination neuron one of 1) having a charge state insufficient to fire upon receiving the weight signal, 2) being not refractory and having a charge state sufficient to fire and 3) being refractory and adding the input weight to its charge state and not firing, the connected synapse determining that its outputs caused the neuron to fire or did not cause the neuron to fire during a given clock cycle. 43. The method of claim 35 at least one artificial neural network for performing evolutionary optimization of a firing parameters of a neuron and a delay parameter of a synapse. 44. A method for use in a circuit element of an artificial neural network, the circuit element having a neuron/synapse select input for selecting one of a neuron and synapse function of the Circuit element, an accumulator, a comparator, a refractory period input and a threshold input, the accumulator accumulating charge from a plurality of selectable inputs for comparison at the comparator with the threshold, and, if a refractory period has lapsed and the accumulated charge is greater than the threshold, the comparator causing a fire output of the circuit element when the circuit element selectively performs a neuron function. 45. The method of claim 44, the circuit element further comprising an input multiplexer for selectively receiving a plurality of inputs representing a tire signal received from at least one circuit element having a selected neuron function and a long-term potentiation and depression state machine, responsive to the input multiplexer, the long-term potentiation and depression state machine outputting an increment/decrement weight signal and outputting a long-term potentiation and depression refractory period signal to a counter, the counter for receiving a control input representing a long-term potentiation and depression refractory period and enabling the increment/decrement weight signal.