A neuromorphic system includes: an unsupervised learning hardware device configured to perform learning in an unsupervised manner, the unsupervised learning hardware device performing grouping on input signals; and a supervised learning hardware device configured to perform learning in a supervised manner with labeled values, the supervised learning hardware device performing clustering on input signals.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A neuromorphic system comprising: an unsupervised learning hardware device configured to perform learning in an unsupervised manner, the unsupervised learning hardware device performing grouping on input signals; and a supervised learning hardware device configured to perform learning in a supervised manner with labeled values, the supervised learning hardware device performing clustering on input signals. 2. The neuromorphic system of claim 1, wherein the supervised learning hardware device is operated with an output value from the unsupervised learning hardware device as an input value. 3. The neuromorphic system of claim 1, wherein the unsupervised learning hardware device employs the restricted Boltzmann machine (RBM) algorithm. 4. The neuromorphic system of claim 1, wherein the supervised learning hardware device employs the restricted Boltzmann machine (RBM) algorithm or the spike-tinning-dependent plasticity (STDP) algorithm. 5. The neuromorphic system of claim 1, wherein the unsupervised learning hardware device comprises: at least two groups of memristors; at least two pre-stage circuits disposed prior to the groups of memristors and configured to receive an input signal from an external source, each of the pre-stage circuits comprising at least one neuron; and at least two post-stage circuits disposed subsequent to the groups of memristors and configured to receive output signals from the groups of memristors, each of the post-stage circuits comprising at least one neuron. 6. The neuromorphic system of claim 5, wherein one of the post-stage circuits is connected in parallel to memristors belonging to at least two different groups of memristors. 7. The neuromorphic system of claim 5, wherein the number of the groups of the memristors equals the number of the pre-stage circuits, and the number of the memristors of included in the groups of memristors equals the number of the post-stage circuits. 8. The neuromorphic system of claim 5, wherein the unsupervised learning hardware device comprises a memory that stores output values used when the pre-stage circuits and the post-stage circuits perform positive-phase contrastive divergence and negative-phase contrastive divergence. 9. The neuromorphic system of claim 5, wherein a ground potential is connected to one side of the groups of memristors and an external power source is connected to the other side of the groups of memristors via switches. 10. The neuromorphic system of claim 1, wherein the supervised learning hardware device comprises: a memory configured to receive an output value from the unsupervised learning hardware device and receive a label value corresponding to a current input signal; at least two memristors configured to receive the output signal; and a neuron connected to output terminals of the at least two memristors, the output terminals being connected at least to the memory. 11. The neuromorphic system of claim 10, wherein a line to ground potential is provided between the output terminals of the at least two memristors and an input terminal of the neuron via a switch. 12. The neuromorphic system of claim 1, wherein the supervised learning hardware device comprises: at least two memristors configured to receive output values from the unsupervised learning hardware device; a neuron connected via a switch to a node where output lines from the at least two memristors meet; and a ground potential connected via a switch to the node. 13. A method for operating a neuromorphic system, the method comprising: performing learning by an unsupervised learning hardware device; updating memristors included in the unsupervised learning hardware device; performing learning by a supervised learning hardware device; and updating memristors included in the supervised learning hardware device. 14. The method of claim 13, wherein the performing learning and the updating is repeated for a number of combinations of input signals.