Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A method for allocating memory in an artificial nervous system simulator implemented in hardware, comprising: determining memory resource requirements for one or more components of an artificial nervous system being simulated; and allocating portions of a shared memory pool to the components based on the determination. 2. The method of claim 1, wherein the allocating is performed when compiling the artificial nervous system being simulated. 3. The method of claim 1, wherein the allocating is performed dynamically as memory resource requirements change. 4. The method of claim 1, wherein at least a portion of the shared memory pool comprises a memory located on a separate chip than a processor of the artificial nervous system simulator. 5. The method of claim 1, wherein: the components comprise artificial neurons; and determining memory resource requirements comprises determining resources based on at least one of a state or type of the artificial neurons. 6. The method of claim 1, wherein the shared memory pool is implemented as a distributed architecture comprising memory banks, write clients, read clients and a router interfacing the memory banks with the write clients and the read clients. 7. The method of claim 1, wherein the allocating comprises varying an amount of the shared memory pool allocated to the components based on the determination. 8. An apparatus for allocating memory in an artificial nervous system simulator implemented in hardware, comprising a processing system configured to: determine memory resource requirements for one or more components of an artificial nervous system being simulated; and allocate portions of a shared memory pool to the components based on the determination. 9. The apparatus of claim 8, wherein the processing system is configured to perform the allocation when compiling the artificial nervous system being simulated. 10. The apparatus of claim 8, wherein the processing system is configured to perform the allocation dynamically as memory resource requirements change. 11. The apparatus of claim 8, wherein at least a portion of the shared memory pool comprises a memory located on a separate chip than a processor of the artificial nervous system simulator. 12. The apparatus of claim 8, wherein: the components comprise artificial neurons; and the processing system is configured to determine resources based on at least one of a state or type of the artificial neurons. 13. The apparatus of claim 8, wherein the shared memory pool is implemented as a distributed architecture comprising memory banks, write clients, read clients and a router interfacing the memory banks with the write clients and the read clients. 14. The apparatus of claim 8, wherein the processing system is also configured to vary an amount of the shared memory pool allocated to the components based on the determination. 15. An apparatus for allocating memory in an artificial nervous system simulator implemented in hardware, comprising: means for determining memory resource requirements for one or more components of an artificial nervous system being simulated; and means for allocating portions of a shared memory pool to the components based on the determination. 16. The apparatus of claim 15, wherein the allocating is performed when compiling the artificial nervous system being simulated. 17. The apparatus of claim 15, wherein the allocating is performed dynamically as memory resource requirements change. 18. The apparatus of claim 15, wherein at least a portion of the shared memory pool comprises a memory located on a separate chip than a processor of the artificial nervous system simulator. 19. The apparatus of claim 15, wherein: the components comprise artificial neurons; and the means for determining memory resource requirements comprises means for determining resources based on at least one of a state or type of the artificial neurons. 20. The apparatus of claim 15, wherein the shared memory pool is implemented as a distributed architecture comprising memory banks, write clients, read clients and a router interfacing the memory banks with the write clients and the read clients. 21. The apparatus of claim 15, wherein the allocating comprises varying an amount of the shared memory pool allocated to the components based on the determination. 22. A computer-readable medium having instructions executable by a computer stored thereon for allocating memory in an artificial nervous system simulator implemented in hardware, comprising: instructions for determining memory resource requirements for one or more components of an artificial nervous system being simulated; and instructions for allocating portions of a shared memory pool to the components based on the determination.