A weighted sum is a key computation for many neural networks and other machine learning algorithms. Integrated circuit designs that perform a weighted sum are presented. Weights are stored as threshold voltages in an array of flash transistors. By putting the circuits into a well-defined voltage state, the transistors that hold one set of weights will pass current equal to the desired sum. The current flowing through a given transistor is unaffected by operation of remaining transistors in the circuit.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A weighted sum system, comprising: a plurality of floating-gate transistors interconnected and arranged into subsets of transistors, wherein, for each subset of transistors, one of a source terminal or a drain terminal for each floating-gate transistor in a subset of transistors is electrically connected together at a select node and the other of the source terminal and the drain terminal for each floating-gate transistor in a subset of transistors is electrically connected to one of a plurality of output nodes, wherein the threshold voltage of the floating-gate transistors varies amongst the plurality of floating-gate transistors and each floating-gate transistor in the plurality of floating-gate transistors passes a current having a value that is a function of its gate voltage, its threshold voltage, and a voltage between its source terminal and its drain terminal such that current flowing through a given floating-gate transistor is unaffected by operation of remainder of the floating-gate transistors in the plurality of floating-gate transistors; a control circuit electrically connected to the select node for each subset of transistors and operates to selectively activate a given subset of floating-gate transistors in the plurality of floating-gate transistors; an input circuit electrically connected to each floating-gate transistor and operates to activate one or more floating-gate transistors in the given subset of floating-gate transistors; and an output circuit electrically connected, at a common output node, to the plurality of output nodes, the output circuit operates, substantially independently from amount of current that is being sourced, to maintain voltage at the common output node at a reference voltage and generates an output which is correlated to current that is being sourced collectively by the plurality of floating-gate transistors. 2. The weighted sum system of claim 1 wherein the input circuit is electrically coupled to a gate terminal of each floating-gate transistor and operates to bias each floating-gate transistor individually. 3. The weighted sum system of claim 1 having a plurality of inputs electrically coupled to the input circuit, such that each input is electrically coupled across the subset of transistors to a gate terminal of one floating-gate transistor in each subset of transistors. 4. The weighted sum system of claim 1 wherein the control circuit selectively activates the given subset of floating-gate transistors by forming a non-zero voltage across each transistor in the given subset of floating-gate transistors. 5. The weighted sum system of claim 4 wherein the control circuit selectively activates the given subset of floating-gate transistors by applying one to two voltages to the select node for the given subset of floating-gate transistors, where a first voltage causes current to flow through the floating-gate transistors away from the select node and a second voltage causes current to flow through the floating-gate transistors towards from the select node. 6. The weighted sum system of claim 1 wherein, for each subset of transistors, the other of the source terminal and the drain terminal for each floating-gate transistor in a subset of transistors is electrically coupled together at one of the plurality of output nodes. 7. The weighted sum system of claim 1 wherein each output node in the plurality of output nodes is electrically coupled to one of the floating-gate transistors in each of the subsets of transistors. 8. The weighted sum system of claim 1 further comprises a multiplexer having a plurality of inputs and an output, such that inputs of the multiplexer are selectively coupled to the output nodes of each subset of transistors and the output of the multiplexer is electrically connected to the common output node. 9. The weighted sum system of claim 8 wherein the select nodes for each subset of transistors are electrically coupled together at a common select node. 10. The weighted sum system of claim 1 wherein the input circuit and the control circuit apply and maintain voltages that are functionally independent of the output of the output circuit. 11. A weighted sum system, comprising: an array of current source modules interconnected and arranged into rows and columns, wherein each current source module includes a field effect transistor and a charge receptacle electrically isolated but capacitively coupled to a channel region of the transistor; wherein, for each row of current source modules, one of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at a select node and the other of the source terminal and the drain terminal for each current source module in the row of current source modules is electrically connected to one of a plurality of output nodes, such that current flowing through a given current source module is unaffected by operation of remainder of the current source modules in the array of current source modules; a control circuit electrically connected to the select node for each row of current source modules and operates to selectively activate a given row of current source modules in the array of current source modules; an input circuit electrically connected to each current source modules and operates to activate one or more current source modules in the given row of current source modules; and an output circuit electrically connected to the plurality of output nodes via a common output node, the output circuit operates, substantially independently from amount of current that is being sourced, to maintain voltage constant at the common output node at a reference voltage and generates an output which is correlated to current that is being sourced collectively by the array of current source modules. 12. The weighted sum system of claim 11 wherein each current source module is implemented by a single floating-gate transistor 13. The weighted sum system of claim 11 wherein each current source module is implemented by a floating-gate transistor having a source terminal electrically coupled to a drain terminal of a second transistor, where the gate terminal of the floating-gate transistor serves as the control terminal for the current source module. 14. The weighted sum system of claim 11 having a plurality of inputs electrically coupled to the input circuit, such that each input is electrically coupled across the rows of current source modules to a control terminal of one current source module in each row of current source modules. 15. The weighted sum system of claim 14 wherein the control circuit selectively activates the given row of current source modules by applying one of two voltages to the select node for the given row of current source modules, where a first voltage causes current to flow through the current source modules away from the select node and a second voltage causes current to flow through the current source modules towards from the select node. 16. The weighted sum system of claim 11 wherein the input circuit and the control circuit apply and maintain voltages that are functionally independent of the output of the output circuit. 17. The weighed sum system of claim 11 wherein, for each row of current source modules, the other of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at one output node in the plurality of output nodes. 18. The weighed sum system of claim 11 wherein, for each column of current source modules, the other of a source terminal or a drain terminal for each current source module in the column of current source modules is electrically connected together at one output node in the plurality of output nodes. 19. The weighted sum system of claim 11 wherein the output circuit is further defined as at least one of an operational amplifier or an operational transconductance amplifier. 20. The weighted sum system of claim 11 further comprises a second array of current source modules interconnected and arranged into rows and columns, where each current source module in the second array of current source modules includes a field effect transistor and a charge receptacle electrically isolated but capacitively coupled to a channel region of the transistor, wherein, for each row of current source modules, one of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at a secondary select node and the other of the source terminal and the drain terminal for each current source module in the row of current source modules is electrically connected to one of the plurality of output nodes, such that the current flowing through a particular current source module in the second array of current source modules is unaffected by operation of remainder of the current source modules in the second array of current source modules; and a second control circuit electrically connected to the secondary select node for each row of current source modules in the second array of current source modules and operates to selectively activate a particular row of current source modules in the second array of current source modules, where the control circuit selectively applies a voltage to the select nodes in the array of current source modules that causes current to flow through the current source modules away from the select node and the second control circuit applies a voltage to the secondary select nodes in the second array of current source modules that causes current to flow through the current source modules towards from the select node. 21. The weighted sum system of claim 11 further comprises a multiplexer having a plurality of inputs and an output, such that inputs of the multiplexer are selectively coupled to the output nodes of each row of current source modules and the output of the multiplexer is electrically connected to the common output node. 22. The weighted sum system of claim 21 wherein the select nodes for each row of current source modules are electrically coupled together at a common select node. 23. A weighted sum system, comprising: an array of current source modules interconnected and arranged into rows and columns, where each current source module includes a field effect transistor and a charge receptacle electrically isolated but capacitively coupled to a channel region of the transistor, wherein, for each row of current source modules, one of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at a select node and the other of the source terminal and the drain terminal for each current source module in the row of current source modules is electrically connected to one of a plurality of output nodes, such that the current flowing through a given current source module is unaffected by operation of remainder of the current source modules in the array of current source modules; a control circuit electrically connected to each current source module and operates to selectively activate a given column of current source modules in the array of current source modules; an input circuit electrically connected to select node for each row of current source modules and operates to form a non-zero voltage across each current source module in a selected row of current source modules; and an output circuit electrically connected to the plurality of output nodes via a common output node, the output circuit operates, substantially independently from amount of current that is being sourced, to maintain voltage at the common output node at a reference voltage and generates an output which is correlated to current that is being sourced collectively by the array of current source modules. 24. The weighted sum system of claim 23 wherein the input circuit selectively activates a given row of current source modules by forming a non-zero voltage across each current source module in the given row of current source modules. 25. The weighted sum system of claim 23 further comprises a second array of current source modules interconnected and arranged into rows and columns, where each current source module in the second array of current source modules includes a field effect transistor and a charge receptacle electrically isolated but capacitively coupled to a channel region of the transistor, wherein, for each row of current source modules, one of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at a secondary select node and the other of the source terminal and the drain terminal for each current source module in the row of current source modules is electrically connected to one of the plurality of output nodes, such that the current flowing through a given current source module in the second array of current source modules is unaffected by operation of remainder of the current source modules in the second array of current source modules; and a second input circuit electrically connected to an input node for each row of current source modules in the second array of current source modules and operates to selectively activate a given row of current source modules in the second array of current source modules, where the control circuit selectively applies a voltage to the control nodes in the array of current source modules that causes current to flow through the current source modules away from the control node and the second control circuit applies a voltage to the control nodes in the second array of current source modules that causes current to flow through the current source modules towards from the control node. 26. The weighed sum system of claim 23 wherein, for each row of current source modules, the other of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at one output node in the plurality of output nodes. 27. The weighed sum system of claim 23 wherein, for each column of current source modules, the other of a source terminal or a drain terminal for each current source module in the column of current source modules is electrically connected together at one output node in the plurality of output nodes. 28. The weighted sum system of claim 23 wherein the output circuit is further defined as at least one of an operational amplifier or an operational transconductance amplifier. 29. The weighted sum system of claim 23 further comprises a multiplexer having a plurality of inputs and an output, such that inputs of the multiplexer are selectively coupled to the output nodes of each row of current source modules and the output of the multiplexer is electrically connected to the common output node. 30. A weighted sum system, comprising: an array of current source modules interconnected and arranged into rows and columns, where each current source module includes a field effect transistor and a charge receptacle electrically isolated but capacitively coupled to a channel region of the transistor, wherein, for each row of current source modules, one of a source terminal or a drain terminal for each transistor in the row of current source modules is electrically connected together at a select node and the other of the source terminal and the drain terminal for each transistor in the row of current source modules is electrically connected to one of a plurality of output nodes, such that the current flowing through a given current source module is unaffected by operation of remainder of the current source modules in the array of current source modules; a control circuit electrically connected to each current source module and operates to selectively activate a given column of current source modules in the array of current source modules; a set of input transistors electrically connected to select nodes in the array of current source modules, each input transistor in the set of input transistors has one of a source terminal or a drain terminal electrically coupled to one of select nodes in the array of current source modules; an input circuit electrically connected to a gate terminal of each input transistor and operates to form a non-zero voltage across each current source module in a selected row of current source modules; and an output circuit electrically connected to the plurality of output nodes via a common output node, the output circuit operates to maintain voltage constant at the common output node and generates an output which is correlated to current that is being sourced collectively by the array of current source modules. 31. The weighted sum system of claim 30 wherein the input circuit selectively activates a given row of current source modules by forming a non-zero voltage across each current source module in the given row of current source modules. 32. The weighted sum system of claim 30 further comprises a second array of current source modules interconnected and arranged into rows and columns, where each current source module in the second array of current source modules includes a field effect transistor and a charge receptacle electrically isolated but capacitively coupled to a channel region of the transistor, wherein, for each row of current source modules, one of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at a secondary select node and the other of the source terminal and the drain terminal for each current source module in the row of current source modules is electrically connected to one of the plurality of output nodes, such that current flowing through a given current source module in the second array of current source modules is unaffected by operation of remainder of the current source modules in the second array of current source modules; and a second input circuit electrically connected to an input node for each row of current source modules in the second array of current source modules and operates to selectively activate a given row of current source modules in the second array of current source modules, where the control circuit selectively applies a voltage to the control nodes in the array of current source modules that causes current to flow through the current source modules away from the control node and the second control circuit applies a voltage to the control nodes in the second array of current source modules that causes current to flow through the current source modules towards from the control node. 33. The weighed sum system of claim 30 wherein, for each row of current source modules, the other of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at one output node in the plurality of output nodes. 34. The weighed sum system of claim 30 wherein, for each column of current source modules, the other of a source terminal or a drain terminal for each current source module in the column of current source modules is electrically connected together at one output node in the plurality of output nodes.