ACCEPTED
Please predict whether this patent is acceptable.PATENT ABSTRACT: A method and associated systems for using wreath products and invariance groups to test a partially symmetric quantum-logic circuits. A test system receives information that describes the architecture of a quantum-logic circuit to be tested. The system uses this information to hierarchically organize the circuit's inputs into non-overlapping blocks. The system creates set of groups associated with the blocks, and then generates an invariance group that contains one or more invariant permutations of the inputs by computing a wreath product of the set of groups. These invariant permutations identify a minimal number of tests required to verify the circuit for all possible input vectors. The system then directs a test apparatus to perform the resulting optimized test sequence upon the circuit.