A novel unified neural network framework, the dynamic memory network, is disclosed. This unified framework reduces every task in natural language processing to a question answering problem over an input sequence. Inputs and questions are used to create and connect deep memory sequences. Answers are then generated based on dynamically retrieved memories.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A method of building a model used by a machine to answer questions, the method including: loading into a memory, which is coupled to a processor, episodic memory code that implements: a multi-layer neural network with model parameters used to process vector representations of questions against vector representations of input facts, with some layers in the neural network connected through episodic memories; at least one input fact memory that stores a vector representation of input facts from which questions are answered; at least one question memory that stores a vector representation of a question at hand; a plurality of episodic memories to which attention gate weights are assigned, respectively, in a plurality of passes over the input facts; and an attention gate weight calculating code that applies a gating function to calculate attention gate weights and assign them to an episodic memory; training the model parameters using training examples of (input facts, question(s) and answer(s)), wherein each answer in a training example responds, respectively, to a question in the training example that can be answered based on input facts in the training example, the training including repeating at least hundreds of times: accessing a training example of (input facts, question(s) and answer(s)); beginning with a first question from the training example in the question memory to use applying the attention gate weight calculating code; in a first pass, applying the attention gate weight calculating code to evaluating the input facts in view of the question memory, calculating attention gate weights for the input facts, and assigning them to a first episodic memory; in one or more subsequent passes, applying the attention gate weight calculating code to evaluating the input facts in view of the question memory and the calculated attention gate weights in a most recent episodic memory, calculating new attention gate weights, and assigning them to a most recent episodic memory; generating an answer to the question using the most recent episodic memory; comparing the generated answer or the input facts indicated by the attention gate weights in the most recent episodic memory with the reference answer or a reference identification of relevant input facts in the training example and adjusting the model parameters to reduce error; storing the model parameters in a tangible storage medium for use by a machine when receiving and responding to questions. 2. A method of using a question-answering model embedded in a process machine to answer questions, the method including: loading into a memory, which is coupled to a processor, episodic memory code that implements: a multi-layer neural network with model parameters used to process vector representations of questions against vector representations of input facts, with some layers in the neural network connected through episodic memories; at least one input fact memory that stores a vector representation of input facts from which questions are answered; at least one question memory that stores a vector representation of a question at hand; a plurality of episodic memories to which attention gate weights are assigned, respectively, in a plurality of passes over the input facts; and attention gate weight calculating code that applies a gating function to calculate attention gate weights and assign them to an episodic memory; responding to a question at hand posed against the input facts using the model parameters, the responding including: accessing the vector representations of a first question in the question memory and the input facts in the input fact memory; in a first pass, applying the attention gate weight calculating code to evaluating the input facts in view of the question memory, calculating attention gate weights for the input facts, and assigning them to a first episodic memory; in one or more subsequent passes, applying the attention gate weight calculating code to evaluating the input facts in view of the question memory and the calculated attention gate weights in a most recent episodic memory, calculating new attention gate weights, and assigning them to a most recent episodic memory; outputting a final outcome from the episodic memory to an answer module that generates a sequence of one or more output labels responsive to the question. 3. The method of claim 2, further including receiving sentences as input facts. 4. The method of claim 2, further including receiving words as input facts. 5. The method of claim 2, further including receiving features of visual images as input facts. 6. The method of claim 2, further including: accessing semantic background facts in a semantic memory; applying the attention gate weight calculating code to evaluation of semantic background facts as well as the input facts. 7. The method of claim 2, further including receiving a question that requires transitive reasoning over the input facts. 8. The method of claim 2, further including receiving a question that requires language translation of one or more of the input facts. 9. A processor-based device including: a processor and memory coupled to the processor that implement: a multi-layer neural network with model parameters trained to process questions against input facts, with some layers in the neural network connected through a gate attention means to form episodic memories at least one input fact memory that stores a vector representation of input facts from which questions are answered; at least one question memory that stores a vector representation of a question at hand; a plurality of episodic memories to which attention gate weights are assigned, respectively, in a plurality of passes over the input facts; the gate attention means for applying a gating function to calculate attention gate weights in multiple passes over the input facts in view of contents of the question memory and, after a first pass, in view of contents of a most recent episodic memory; wherein the gate attention means assigns the calculated attention gate weights for a current pass to a current episodic memory and particular attention calculated gate weights indicate relevance of particular input facts; an output that sends a final outcome from the episodic memory to an answer module that generates a sequence of one or more output labels responsive to the question. 10. The processor-based device of claim 9, further including: a plurality of Gated Recurrent Unit structures, including with at least one attention gated memory cell per vector representation of input facts; wherein the gate attention means uses the Gated Recurrent Unit structures to calculate attention gate weights and update the episodic memory. 11. The processor-based device of claim 10, further including: the Gated Recurrent Unit structure calculating the attention gate weights according to the equations: z(s,m,q)=[s∘q,s∘m,|s−q|,|s−m|,s,m,q,sTW(b)q,sTW(b)m] G(s,m,q)=σ(W(2) tan h(W(1)z(s,m,q)+b(1))+b(2)) wherein t is a time step, s is a sentence or word, m is a memory for a calculated coefficient of relevance for a sentence or word, t is a time step, q is the question, T is an upper bound of the input facts, W(b),W(1),W(2) are weight matrixes by training, b(1),b(2) are offsets by training, σ is a sigmoid activation function and is an element-wise product. 12. The processor-based device of claim 10, further including the Gated Recurrent Unit calculating the attention gate weights using a sigmoid activation function. 13. The processor-based device of claim 10, further including: the Gated Recurrent Unit structure calculating the attention gate weights according to the equations: zit=[∘q;∘mt−1;|−q|;−mt−1|] Zit=W(2) tan h(W(1)zit+b(1))+b(2) g i t = exp  ( Z i t ) ∑ k = 1 M i  exp  ( Z k t ) wherein t is a time step, =[, . . . , ], mt−1 is the episodic memory at a previous time step, q is the question, W(1),W(2) are weight matrixes, b(1),b(2) are offsets, ◯ is an element-wise product, |·| is an element-wise absolute value, and “;” represents concatenation of vectors; whereby a scalar value, the attention gate value git, is calculated using a softmax activation function and associated with each fact during pass t. 14. The processor-based device of claim 13, further including: a Soft Attention structure coupled to the Gated Recurrent Unit structure of the gate attention means, wherein the Soft Attention structure produces a contextual vector ct from attention gate weights through a weighted summation of sorted list of vectors and corresponding attention gates g i t  :   c t = ∑ i = 1 N  g i t  f ↔ i . 15. The processor-based device of claim 13, further including: an Attention based Gated Recurrent Unit structure that controls updating of some hidden states in the multi-layer neural network according to the formulas: {tilde over (h)}i=tan h(Wxi+ri∘Uhi−1+b(h)) hi=git∘{tilde over (h)}i+(1−g)∘hi−1 wherein the gate attention means uses the Soft Attention structure to select the portions of the input facts with which to update the question memory. 16. The processor-based device of claim 10, further including: the Gated Recurrent Unit structure calculating the attention gate weights according to the equations: mt=ReLU(Wt[mt−1;ct;q]+b) wherein “;” is a concatenation operator, WtεnH×nH,bεnH, and nH is a hidden size, and ReLU is a function ƒ(x)=max(0,x). 17. The processor-based device of claim 11, further including: a plurality of Long Short-Term Memory structures, including at least one gated memory cell per input fact; wherein the multi-layer neural network uses the Long Short-Term Memory structures to retain some hidden states of the neural network layers. 18. The processor-based device of claim 17, further including: the Long Short-Term Memory structure calculating some hidden states of the neural network layers according to the equations: it=σ(W(i)xt+U(i)ht−1) ft=σ(W(f)xt+U(f)ht−1) ot=σ(W(o)xt+U(o)ht−1) {tilde over (c)}t=tan h(W(c)xt+U(c)ht−1) ct=ft∘ct−1+it∘{tilde over (c)}t ht=ot∘ tan h(ht) wherein t is a time step, xt is an input at the time step t, W(i),W(f),W(o),W(c),U(i),U(f),U(o) and U(c) are weight matrixes by training, σ is a sigmoid activation function and ∘ is an element-wise product. 19. The processor-based device of claim 11, further including: a plurality of Gated Recurrent Network structures, including with at least one gated memory cell per input fact; wherein the gate attention means uses the Gated Recurrent Unit structures to retain some hidden states of the neural network layers. 20. The processor-based device of claim 19, further including: the Gated Recurrent Network structure calculating some hidden states of the neural network layers according to the equations: zt=σ(W(z)xt+U(z)ht−1+b(z)) rt=σ(W(r)xt+U(r)ht−1+b(r)) {tilde over (h)}t=tan h(Wxt+rt∘Uht−1+b(h)) ht=zt∘ht−1+(1−zt)∘{tilde over (h)}t wherein t is a time step, xt is an input at the time step t, W(z),W(r),W,U(z),U(r) and U are weight matrixes by training, b(z),b(r) and b(h) are offsets by training, σ is a sigmoid activation function and ∘ is an element-wise product. 21. The processor-based device of claim 11, further including: an input fusion layer including: a sentence reader that encodes input words into a sentence embedding; and a bidirectional Gated Recurrent Unit that operates on the sentence embedding to exchange information between neighboring sentences to produce the input facts. 22. The processor-based device of claim 11, further including: an input fusion layer including: a local region feature extractor that divides the image into local regions and embeds each local region into a vector; a projection layer that projects embedded local regions to a textual feature space used by the vector representation of the question in the question memory; and a bidirectional Gated Recurrent Unit that operates on the embedded local regions to exchange information between neighboring local regions to produce the input facts. 23. The processor-based device of claim 22, wherein the projection layer includes a linear layer with a tan h activation function.