Embodiments of the invention provide a method for mapping a bipartite graph onto a neuromorphic architecture comprising of a plurality of interconnected neuromorphic core circuits. The graph includes a set of source nodes and a set of target nodes. The method comprises, for each source node, creating a corresponding splitter construct configured to duplicate input. Each splitter construct comprises a first portion of a core circuit. The method further comprises, for each target node, creating a corresponding merger construct configured to combine input. Each merger construct comprises a second portion of a core circuit. Source nodes and target nodes are connected based on a permutation of an interconnect network interconnecting the core circuits.
Please help me write a proper abstract based on the patent claims. CLAIM: 1. A method for mapping a bipartite graph onto a neuromorphic architecture comprising of a plurality of interconnected neuromorphic core circuits, wherein said graph includes a set of source nodes and a set of target nodes, comprising: for each source node, creating a corresponding splitter construct configured to duplicate input, wherein said splitter construct comprises a first portion of a core circuit; for each target node, creating a corresponding merger construct configured to combine input, wherein said merger construct comprises a second portion of a core circuit; and connecting said source nodes and said target nodes based on a permutation of an interconnect network interconnecting said core circuits. 2. The method of claim 1, wherein: said graph further comprises multiple weighted edges; and each weight corresponding to each weighted edge is implemented using a splitter construct. 3. The method of claim 1, wherein: said graph further comprises multiple weighted edges; and each weight corresponding to each weighted edge is implemented using a splitter construct and a merger construct. 4. The method of claim 1, wherein: said graph further comprises multiple stochastic weighted edges; and each stochastic weight corresponding to each weighted edge is implemented using one or more of the following: a splitter construct with one or more stochastic neurons, and a merger construct with one or more stochastic axons or stochastic synapses. 5. A method for mapping a graph onto a neuromorphic architecture comprising of a plurality of interconnected neuromorphic core circuits, wherein said graph includes a set of nodes and a set of directed edges, comprising: decomposing said graph into multiple bipartite sub-graphs; for each sub-graph: for each node of said sub-graph that appears as a source node, creating a corresponding splitter construct configured to duplicate input, wherein said splitter construct comprises a first portion of a core circuit; for each node of said sub-graph that appears as a target node, creating a corresponding merger construct configured to combine input, wherein said merger construct comprises a second portion of a core circuit; and connecting each source node and each target node of said sub-graph based on a permutation of an interconnect network interconnecting said core circuits; and for each node that appears in more than one sub-graph, connect each appearance of said node as a target node to its appearance as a source node. 6. The method of claim 5, wherein: said set of directed edges includes multiple weighted edges; and each weight corresponding to each weighted edge is implemented using a splitter construct. 7. The method of claim 5, wherein: said set of directed edges includes multiple weighted edges; and each weight corresponding to each weighted edge is implemented using a splitter construct and a merger construct. 8. The method of claim 5, wherein: said set of directed edges includes multiple stochastic weighted edges; and each stochastic weight corresponding to each weighted edge is implemented using one or more of the following: a splitter construct with one or more stochastic neurons, and a merger construct with one or more stochastic axons or stochastic synapses. 9. A system for mapping a bipartite graph onto a neuromorphic architecture comprising of a plurality of interconnected neuromorphic core circuits, wherein the graph includes a set of source nodes and a set of target nodes, comprising: one or more splitter constructs configured to duplicate input, wherein each splitter construct corresponds to a source node of the graph, and wherein each splitter construct comprises a first portion of a core circuit of said core circuits; and one or more merger constructs configured to combine input, wherein each merger construct corresponds to a target node, and wherein each merger construct comprises a second portion of a core circuit of said core circuits; wherein said source nodes and said target nodes are connected based on a permutation of an interconnect network interconnecting said core circuits. 10. The system of claim 9, wherein: said graph further comprises multiple weighted edges; and each weight corresponding to each weighted edge is implemented using a splitter construct. 11. The system of claim 9, wherein: said graph further comprises multiple weighted edges; and each weight corresponding to each weighted edge is implemented using a merger construct. 12. The system of claim 9, wherein: said graph further comprises multiple stochastic weighted edges; and each stochastic weight corresponding to each weighted edge is implemented using one or more of the following: a splitter construct and one or more stochastic neurons, and a merger construct and one or more stochastic axons or stochastic synapses. 13. The system of claim 9, wherein: said graph is decomposed into multiple bipartite sub-graphs; for each node of each sub-graph that appears as a source node, said splitter constructs include a splitter construct corresponding to said node; and for each node of each sub-graph that appears as a target node, said target constructs include a target construct corresponding to said node. 14. The system of claim 13, wherein: each source node and each target node of each sub-graph is connected based on a permutation of said interconnect network. 15. The system of claim 14, wherein: for each node that appears in more than one sub-graph, each appearance of said node as a target node is connected to its appearance as a source node.