Pulse-engineered Controlled-V gate and its applications on
  superconducting quantum device
In this paper, we demonstrate that, by employing OpenPulse design kit for IBM
superconducting quantum devices, the controlled-V gate (CV gate) can be
implemented in about half the gate time to the controlled-X (CX or CNOT gate)
and consequently 65.5\% reduced gate time compared to the CX-based
implementation of CV. Then, based on the theory of Cartan decomposition, we
characterize the set of all two-qubit gates implemented with only two or three
CV gates; using pulse-engineered CV gates enables us to implement these gates
with shorter gate time and possibly better gate fidelity than the CX-based one,
as actually demonstrated in two examples. Moreover, we showcase the improvement
of linearly-coupled three-qubit Toffoli gate, by implementing it with the
pulse-engineered CV gate, both in gate time and the averaged output-state
fidelity. These results imply the importance of our CV gate implementation
technique, which, as an additional option for the basis gate set design, may
shorten the overall computation time and consequently improve the precision of
several quantum algorithms executed on a real device.
Takahiko Satoh Shun Oomura Michihiko Sugawara Naoki Yamamoto