.. _do_cycle:

		Run one clock cycle of the Processor_,
		works according to processor_phases_.

		Then all ``on_cycle_callbacks`` are executed and the internal Registers are updated.

		If ``f_cpu`` is set and the execution took not long enough,
		``do_cycle`` will wait until the right time for the next cycle.

		If ``clock_barrier`` is set, ``do_cycle`` will perform the ``clock_barrier.wait()``.

		Might raise SIGILL_, if there is an invalid opcode.

def do_cycle(self):
		"""
		.. _do_cycle:

		Run one clock cycle of the Processor_,
		works according to processor_phases_.

		Then all ``on_cycle_callbacks`` are executed and the internal Registers are updated.

		If ``f_cpu`` is set and the execution took not long enough,
		``do_cycle`` will wait until the right time for the next cycle.

		If ``clock_barrier`` is set, ``do_cycle`` will perform the ``clock_barrier.wait()``.

		Might raise SIGILL_, if there is an invalid opcode.
		"""
		if(self.f_cpu != None):
			if(self.last_cycle == None):
				self.last_cycle = time.time()

		opcode = self._fetch_at_pc()
		if(not opcode in self.commands_by_opcode):
			raise SIGILL("Invalid opcode ({}) at {}".format(opcode, self.pc - 1))
		command = self.commands_by_opcode[opcode]
		numargs = command.numargs()
		args = [self._fetch_at_pc() for i in range(numargs)]
		if(self.debug > 2):
			print("{}|EXEC: [{}] {} $ ".format(self.pc, opcode, command.mnemonic()), *args)
		command.exec(*args)

		self._refresh_pc()
		self._refresh_ecr()
		self._refresh_sp()
		self._execute_on_cycle_callbacks()

		self.current_cycle = time.time()
		if(self.f_cpu != None):
			cycle_time = self.current_cycle - self.last_cycle
			if(cycle_time < ( 1 / self.f_cpu)):
				time.sleep(( 1 / self.f_cpu) - cycle_time )
			self.last_cycle = time.time()
		if(self.clock_barrier != None):
			self.clock_barrier.wait()
		self.cycles += 1