source code forms: EXG R1,R2
        CC bits "HNZVC": ccccc

def instruction_EXG(self, opcode, m):
        """
        source code forms: EXG R1,R2
        CC bits "HNZVC": ccccc
        """
        high, low = divmod(m, 0x10)
        reg1 = self._get_register_obj(high)
        reg2 = self._get_register_obj(low)

        new_reg1_value = convert_differend_width(reg2, reg1)
        new_reg2_value = convert_differend_width(reg1, reg2)

        reg1.set(new_reg1_value)
        reg2.set(new_reg2_value)