// According to section 25.4.13, we need to make sure that USART TC flag is
// set before disabling the DMA TX on the peripheral side.
According to section 25.4.13, we need to make sure that USART TC flag is
set before disabling the DMA TX on the peripheral side.
According to section 25 . 4 . 13 we need to make sure that USART TC flag is set before disabling the DMA TX on the peripheral side .
pub fn handle_interrupt(&self) {
        self.clear_transmit_complete();
        self.disable_transmit_complete_interrupt();
        // Ignore if USARTStateTX is in some other state other than
        // Transfer_Completing.
        if self.usart_tx_state.get() == USARTStateTX::Transfer_Completing {
            self.disable_tx();
            self.usart_tx_state.set(USARTStateTX::Idle);
            // get buffer
            let buffer = self.tx_dma.map_or(None, |tx_dma| tx_dma.return_buffer());
            self.tx_len.set(0);
            // alert client
            self.client.map(|client| {
                buffer.map(|buf| {
                    client.transmit_complete(buf, hil::uart::Error::CommandComplete);
                });
            });
        }
    }
pub fn handle_interrupt ( & self ) { self . clear_transmit_complete ( ) ; self . disable_transmit_complete_interrupt ( ) ; // Ignore if USARTStateTX is in some other state other than // Transfer_Completing. if self . usart_tx_state . get ( ) == USARTStateTX :: Transfer_Completing { self . disable_tx ( ) ; self . usart_tx_state . set ( USARTStateTX :: Idle ) ; // get buffer let buffer = self . tx_dma . map_or ( None , | tx_dma | tx_dma . return_buffer ( ) ) ; self . tx_len . set ( 0 ) ; // alert client self . client . map ( | client | { buffer . map ( | buf | { client . transmit_complete ( buf , hil :: uart :: Error :: CommandComplete ) ; } ) ; } ) ; } }
According to section 25.4.13, we need to make sure that USART TC flag is
set before disabling the DMA TX on the peripheral side.
According to section 25 . 4 . 13 we need to make sure that USART TC flag is set before disabling the DMA TX on the peripheral side .
&self