/// Waits until it recieves an ASCII char. Returns an error-enum if problems with the connection are detected.
Waits until it recieves an ASCII char. Returns an error-enum if problems with the connection are detected.
Waits until it recieves an ASCII char . Returns an error - enum if problems with the connection are detected .
pub fn read_char(&self) -> Option<char> {
    let peripheral_ptr;
    unsafe {peripheral_ptr = stm32f4::stm32f446::Peripherals::steal();}
    let buffer: u8;
    match self.core {
      1 => {
        let uart1 = &peripheral_ptr.USART1;
        while uart1.sr.read().rxne().bit_is_clear() {
          if check_uart_errors(uart1.sr.read().bits()).is_err() {return None;}
        }
        buffer = uart1.dr.read().dr().bits() as u8;
      },
      2 => {
        let uart2 = &peripheral_ptr.USART2;
        while uart2.sr.read().rxne().bit_is_clear() {
          if check_uart_errors(uart2.sr.read().bits()).is_err() {return None;}
        }
        buffer = uart2.dr.read().dr().bits() as u8;
      },
      3 => {
        let uart3 = &peripheral_ptr.USART3;
        while uart3.sr.read().rxne().bit_is_clear() {
          if check_uart_errors(uart3.sr.read().bits()).is_err() {return None;}
        }
        buffer = uart3.dr.read().dr().bits() as u8;
      },
      4 => {
        let uart4 = &peripheral_ptr.UART4;
        while uart4.sr.read().rxne().bit_is_clear() {
          if check_uart_errors(uart4.sr.read().bits()).is_err() {return None;}
        }
        buffer = uart4.dr.read().dr().bits() as u8;
      },
      5 => {
        let uart5 = &peripheral_ptr.UART5;
        while uart5.sr.read().rxne().bit_is_clear() {
          if check_uart_errors(uart5.sr.read().bits()).is_err() {return None;}
        }
        buffer = uart5.dr.read().dr().bits() as u8;
      },
      6 => {
        let uart6 = &peripheral_ptr.USART6;
        while uart6.sr.read().rxne().bit_is_clear() {
          if check_uart_errors(uart6.sr.read().bits()).is_err() {return None;}
        }
        buffer = uart6.dr.read().dr().bits() as u8;
      },
      _ => unreachable!()
    };
    return Some(buffer as char);
  }
pub fn read_char ( & self ) -> Option < char > { let peripheral_ptr ; unsafe { peripheral_ptr = stm32f4 :: stm32f446 :: Peripherals :: steal ( ) ; } let buffer : u8 ; match self . core { 1 => { let uart1 = & peripheral_ptr . USART1 ; while uart1 . sr . read ( ) . rxne ( ) . bit_is_clear ( ) { if check_uart_errors ( uart1 . sr . read ( ) . bits ( ) ) . is_err ( ) { return None ; } } buffer = uart1 . dr . read ( ) . dr ( ) . bits ( ) as u8 ; } , 2 => { let uart2 = & peripheral_ptr . USART2 ; while uart2 . sr . read ( ) . rxne ( ) . bit_is_clear ( ) { if check_uart_errors ( uart2 . sr . read ( ) . bits ( ) ) . is_err ( ) { return None ; } } buffer = uart2 . dr . read ( ) . dr ( ) . bits ( ) as u8 ; } , 3 => { let uart3 = & peripheral_ptr . USART3 ; while uart3 . sr . read ( ) . rxne ( ) . bit_is_clear ( ) { if check_uart_errors ( uart3 . sr . read ( ) . bits ( ) ) . is_err ( ) { return None ; } } buffer = uart3 . dr . read ( ) . dr ( ) . bits ( ) as u8 ; } , 4 => { let uart4 = & peripheral_ptr . UART4 ; while uart4 . sr . read ( ) . rxne ( ) . bit_is_clear ( ) { if check_uart_errors ( uart4 . sr . read ( ) . bits ( ) ) . is_err ( ) { return None ; } } buffer = uart4 . dr . read ( ) . dr ( ) . bits ( ) as u8 ; } , 5 => { let uart5 = & peripheral_ptr . UART5 ; while uart5 . sr . read ( ) . rxne ( ) . bit_is_clear ( ) { if check_uart_errors ( uart5 . sr . read ( ) . bits ( ) ) . is_err ( ) { return None ; } } buffer = uart5 . dr . read ( ) . dr ( ) . bits ( ) as u8 ; } , 6 => { let uart6 = & peripheral_ptr . USART6 ; while uart6 . sr . read ( ) . rxne ( ) . bit_is_clear ( ) { if check_uart_errors ( uart6 . sr . read ( ) . bits ( ) ) . is_err ( ) { return None ; } } buffer = uart6 . dr . read ( ) . dr ( ) . bits ( ) as u8 ; } , _ => unreachable ! ( ) } ; return Some ( buffer as char ) ; }
Waits until it recieves an ASCII char.
Waits until it recieves an ASCII char .
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