node/lib/metasm/metasm/cpu/arm/opcodes.rb
# ARMv6 instruction set, aka arm7/arm9
ARMv6 instruction set, aka arm7/arm9
ARMv6 instruction set aka arm7 / arm9
def init_arm_v6
		@opcode_list = []
		[:baseincr, :cond, :cond_name_off, :usermoderegs, :tothumb, :tojazelle
		].each { |p| @valid_props[p] = true }
		[:rn, :rd, :rm, :crn, :crd, :crm, :cpn, :reglist, :i24, :rm_rs, :rm_is,
		 :i8_r, :mem_rn_rm, :mem_rn_i8_12, :mem_rn_rms, :mem_rn_i12
		].each { |p| @valid_args[p] = true }
		@fields_mask.update :rn => 0xf, :rd => 0xf, :rs => 0xf, :rm => 0xf,
			:crn => 0xf, :crd => 0xf, :crm => 0xf, :cpn => 0xf,
			:rnx => 0xf, :rdx => 0xf, :rsx => 0xf,
			:shifti => 0x1f, :stype => 3, :rotate => 0xf, :reglist => 0xffff,
			:i8 => 0xff, :i12 => 0xfff, :i24 => 0xff_ffff, :i8_12 => 0xf0f,
			:u => 1, :mask => 0xf, :sbo => 0xf, :cond => 0xf
		@fields_shift.update :rn => 16, :rd => 12, :rs => 8, :rm => 0,
			:crn => 16, :crd => 12, :crm => 0, :cpn => 8,
			:rnx => 16, :rdx => 12, :rsx => 8,
			:shifti => 7, :stype => 5, :rotate => 8, :reglist => 0,
			:i8 => 0, :i12 => 0, :i24 => 0, :i8_12 => 0,
			:u => 23, :mask => 16, :sbo => 12, :cond => 28
		addop_data 'and', 0,  :rd, :rn
		addop_data 'eor', 1,  :rd, :rn
		addop_data 'xor', 1,  :rd, :rn
		addop_data 'sub', 2,  :rd, :rn
		addop_data 'rsb', 3,  :rd, :rn
		addop_data 'add', 4,  :rd, :rn
		addop_data 'adc', 5,  :rd, :rn
		addop_data 'sbc', 6,  :rd, :rn
		addop_data 'rsc', 7,  :rd, :rn
		addop_data_s 'tst', (8  << 21) | (1 << 20), :rdx, :rn
		addop_data_s 'teq', (9  << 21) | (1 << 20), :rdx, :rn
		addop_data_s 'cmp', (10 << 21) | (1 << 20), :rdx, :rn
		addop_data_s 'cmn', (11 << 21) | (1 << 20), :rdx, :rn
		addop_data 'orr', 12, :rd, :rn
		addop_data 'or',  12, :rd, :rn
		addop_data 'mov', 13, :rd, :rnx
		addop_data 'bic', 14, :rd, :rn
		addop_data 'mvn', 15, :rd, :rnx
		addop 'b',  0b1010 << 24, :setip, :stopexec, :i24
		addop 'bl', 0b1011 << 24, :setip, :stopexec, :i24, :saveip
		addop 'bkpt', (0b00010010 << 20) | (0b0111 << 4)		
		addop 'blx', 0b1111101 << 25, :setip, :stopexec, :saveip, :tothumb, :h, :uncond, :i24
		addop 'blx', (0b00010010 << 20) | (0b0011 << 4), :setip, :stopexec, :saveip, :tothumb, :rm, :sbo16, :sbo12, :sbo8
		addop 'bx',  (0b00010010 << 20) | (0b0001 << 4), :setip, :stopexec, :rm, :sbo16, :sbo12, :sbo8
		addop 'bxj',  (0b00010010 << 20) | (0b0010 << 4), :setip, :stopexec, :rm, :tojazelle, :sbo16, :sbo12, :sbo8
		addop_load 'str', (1 << 26)
		addop_load 'ldr', (1 << 26) | (1 << 20)
		addop_load_lsh
		addop_ldm 'stm', (1 << 27)
		addop_ldm 'ldm', (1 << 27) | (1 << 20)
		addop 'clz',   (0b00010110 << 20) | (0b0001 << 4), :rd, :rm, :sbo16, :sbo8
		addop 'ldrex', (0b00011001 << 20) | (0b1001 << 4), :rd, :rn, :sbo8, :sbo0
		addop 'strex', (0b00011000 << 20) | (0b1001 << 4), :rd, :rm, :rn, :sbo8
		addop 'rev',   (0b01101011 << 20) | (0b0011 << 4), :rd, :rm, :sbo16, :sbo8
		addop 'rev16', (0b01101011 << 20) | (0b1011 << 4), :rd, :rm, :sbo16, :sbo8
		addop 'revsh', (0b01101111 << 20) | (0b1011 << 4), :rd, :rm, :sbo16, :sbo8
		addop 'sel',   (0b01101000 << 20) | (0b1011 << 4), :rd, :rn, :rm, :sbo8
	end
def init_arm_v6 @opcode_list = [ ] [ :baseincr , :cond , :cond_name_off , :usermoderegs , :tothumb , :tojazelle ] . each { | p | @valid_props [ p ] = true } [ :rn , :rd , :rm , :crn , :crd , :crm , :cpn , :reglist , :i24 , :rm_rs , :rm_is , :i8_r , :mem_rn_rm , :mem_rn_i8_12 , :mem_rn_rms , :mem_rn_i12 ] . each { | p | @valid_args [ p ] = true } @fields_mask . update :rn => 0xf , :rd => 0xf , :rs => 0xf , :rm => 0xf , :crn => 0xf , :crd => 0xf , :crm => 0xf , :cpn => 0xf , :rnx => 0xf , :rdx => 0xf , :rsx => 0xf , :shifti => 0x1f , :stype => 3 , :rotate => 0xf , :reglist => 0xffff , :i8 => 0xff , :i12 => 0xfff , :i24 => 0xff_ffff , :i8_12 => 0xf0f , :u => 1 , :mask => 0xf , :sbo => 0xf , :cond => 0xf @fields_shift . update :rn => 16 , :rd => 12 , :rs => 8 , :rm => 0 , :crn => 16 , :crd => 12 , :crm => 0 , :cpn => 8 , :rnx => 16 , :rdx => 12 , :rsx => 8 , :shifti => 7 , :stype => 5 , :rotate => 8 , :reglist => 0 , :i8 => 0 , :i12 => 0 , :i24 => 0 , :i8_12 => 0 , :u => 23 , :mask => 16 , :sbo => 12 , :cond => 28 addop_data 'and' , 0 , :rd , :rn addop_data 'eor' , 1 , :rd , :rn addop_data 'xor' , 1 , :rd , :rn addop_data 'sub' , 2 , :rd , :rn addop_data 'rsb' , 3 , :rd , :rn addop_data 'add' , 4 , :rd , :rn addop_data 'adc' , 5 , :rd , :rn addop_data 'sbc' , 6 , :rd , :rn addop_data 'rsc' , 7 , :rd , :rn addop_data_s 'tst' , ( 8 << 21 ) | ( 1 << 20 ) , :rdx , :rn addop_data_s 'teq' , ( 9 << 21 ) | ( 1 << 20 ) , :rdx , :rn addop_data_s 'cmp' , ( 10 << 21 ) | ( 1 << 20 ) , :rdx , :rn addop_data_s 'cmn' , ( 11 << 21 ) | ( 1 << 20 ) , :rdx , :rn addop_data 'orr' , 12 , :rd , :rn addop_data 'or' , 12 , :rd , :rn addop_data 'mov' , 13 , :rd , :rnx addop_data 'bic' , 14 , :rd , :rn addop_data 'mvn' , 15 , :rd , :rnx addop 'b' , 0b1010 << 24 , :setip , :stopexec , :i24 addop 'bl' , 0b1011 << 24 , :setip , :stopexec , :i24 , :saveip addop 'bkpt' , ( 0b00010010 << 20 ) | ( 0b0111 << 4 ) addop 'blx' , 0b1111101 << 25 , :setip , :stopexec , :saveip , :tothumb , :h , :uncond , :i24 addop 'blx' , ( 0b00010010 << 20 ) | ( 0b0011 << 4 ) , :setip , :stopexec , :saveip , :tothumb , :rm , :sbo16 , :sbo12 , :sbo8 addop 'bx' , ( 0b00010010 << 20 ) | ( 0b0001 << 4 ) , :setip , :stopexec , :rm , :sbo16 , :sbo12 , :sbo8 addop 'bxj' , ( 0b00010010 << 20 ) | ( 0b0010 << 4 ) , :setip , :stopexec , :rm , :tojazelle , :sbo16 , :sbo12 , :sbo8 addop_load 'str' , ( 1 << 26 ) addop_load 'ldr' , ( 1 << 26 ) | ( 1 << 20 ) addop_load_lsh addop_ldm 'stm' , ( 1 << 27 ) addop_ldm 'ldm' , ( 1 << 27 ) | ( 1 << 20 ) addop 'clz' , ( 0b00010110 << 20 ) | ( 0b0001 << 4 ) , :rd , :rm , :sbo16 , :sbo8 addop 'ldrex' , ( 0b00011001 << 20 ) | ( 0b1001 << 4 ) , :rd , :rn , :sbo8 , :sbo0 addop 'strex' , ( 0b00011000 << 20 ) | ( 0b1001 << 4 ) , :rd , :rm , :rn , :sbo8 addop 'rev' , ( 0b01101011 << 20 ) | ( 0b0011 << 4 ) , :rd , :rm , :sbo16 , :sbo8 addop 'rev16' , ( 0b01101011 << 20 ) | ( 0b1011 << 4 ) , :rd , :rm , :sbo16 , :sbo8 addop 'revsh' , ( 0b01101111 << 20 ) | ( 0b1011 << 4 ) , :rd , :rm , :sbo16 , :sbo8 addop 'sel' , ( 0b01101000 << 20 ) | ( 0b1011 << 4 ) , :rd , :rn , :rm , :sbo8 end
ARMv6 instruction set, aka arm7/arm9
ARMv6 instruction set aka arm7 / arm9
# other fields are available&unused, also cnd != AL is undef # TODO aliases (http://www.davespace.co.uk/arm/introduction-to-arm/stack.html) # fd = full descending  stmfd/ldmfd = stmdb/ldmia # ed = empty descending stmed/ldmed = stmda/ldmib # fa = full ascending   stmfa/ldmfa = stmib/ldmda # ea = empty ascending  stmea/ldmea = stmia/ldmdb # TODO mrs, [qus]add/sub*