gb-emu-lib/CPU.cpp
/*
    SRA r
    11001011 00101rrr

    An arithmetic shift right 1-bit position is performed on the contents of the operand r. The content
    of bit 0 is copied to the carry flag.

    8 Cycles

    Flags affected(znhc): z00c
*/


An arithmetic shift right 1-bit position is performed on the contents of the operand r. The content
of bit 0 is copied to the carry flag.

8 Cycles


An arithmetic shift right 1 - bit position is performed on the contents of the operand r . The content of bit 0 is copied to the carry flag . 8 Cycles
unsigned long CPU::SRAr(const byte& opCode)
{
    byte* r = GetByteRegister(opCode);
    ISBITSET(*r, 0) ? SetFlag(CarryFlag) : ClearFlag(CarryFlag);
    (*r) = (*r >> 1) | (*r & 0x80);
    (*r == 0x00) ? SetFlag(ZeroFlag) : ClearFlag(ZeroFlag);
    ClearFlag(SubtractFlag);
    ClearFlag(HalfCarryFlag);
    return 8;
}
unsigned long CPU :: SRAr ( const byte & opCode ) { byte * r = GetByteRegister ( opCode ) ; ISBITSET ( * r , 0 ) ? SetFlag ( CarryFlag ) : ClearFlag ( CarryFlag ) ; ( * r ) = ( * r >> 1 ) | ( * r & 0x80 ) ; ( * r == 0x00 ) ? SetFlag ( ZeroFlag ) : ClearFlag ( ZeroFlag ) ; ClearFlag ( SubtractFlag ) ; ClearFlag ( HalfCarryFlag ) ; return 8 ; }
SRA r
11001011 00101rrr
SRA r 11001011 00101rrr
// Grab bit 0 and store it in the carryflag // Shift r right // Affects Z, clears N, clears H, affects C