// enable causes the USB core to enter (or exit) the normal run state and
// enables/disables all interrupts on the receiver's USB port.
enable causes the USB core to enter (or exit) the normal run state and
enables/disables all interrupts on the receiver's USB port.
// enable causes the USB core to enter ( or exit ) the normal run state and // enables / disables all interrupts on the receiver ' s USB port .
func (d *dhw) enable(enable bool) {
	if enable {
		d.irq.Enable()                          
		d.bus.USBCMD.SetBits(nxp.USB_USBCMD_RS) 
	} else {
		d.bus.USBCMD.ClearBits(nxp.USB_USBCMD_RS) 
		d.irq.Disable()                           
	}
}
func ( d * dhw ) enable ( enable bool ) { if enable { d . irq . Enable ( ) d . bus . USBCMD . SetBits ( nxp . USB_USBCMD_RS ) } else { d . bus . USBCMD . ClearBits ( nxp . USB_USBCMD_RS ) d . irq . Disable ( ) } }
enable causes the USB core to enter (or exit) the normal run state and
enables/disables all interrupts on the receiver's USB port.
enable causes the USB core to enter ( or exit ) the normal run state and enables / disables all interrupts on the receiver ' s USB port .
// Enable USB interrupts // Enable "run" state // Disable "run" state // Disable USB interrupts