openfpga/src/annotation/check_pb_type_annotation.cpp
/********************************************************************
 * This function will check the circuit model annotation for
 * each physical pb_type in the device
 *  - Every physical pb_type should be linked to a valid circuit model
 *  - Every port of the pb_type have been linked a valid port of a circuit model
 *  - Every interconnect has been linked to a valid circuit model
 *    in a correct type
 *******************************************************************/
This function will check the circuit model annotation for
each physical pb_type in the device
- Every physical pb_type should be linked to a valid circuit model
- Every port of the pb_type have been linked a valid port of a circuit model
- Every interconnect has been linked to a valid circuit model
in a correct type
This function will check the circuit model annotation for each physical pb_type in the device - Every physical pb_type should be linked to a valid circuit model - Every port of the pb_type have been linked a valid port of a circuit model - Every interconnect has been linked to a valid circuit model in a correct type
void check_vpr_pb_type_circuit_model_annotation(const DeviceContext& vpr_device_ctx, 
                                                const CircuitLibrary& circuit_lib,
                                                const VprDeviceAnnotation& vpr_device_annotation) {
  size_t num_err = 0;
  for (const t_logical_block_type& lb_type : vpr_device_ctx.logical_block_types) {
    if (nullptr == lb_type.pb_type) {
      continue;
    }
    rec_check_vpr_pb_type_circuit_model_annotation(lb_type.pb_type, circuit_lib, vpr_device_annotation, num_err);
  }
  if (0 == num_err) {
    VTR_LOG("Check physical pb_type annotation for circuit model passed.\n");
  } else {
    VTR_LOG_ERROR("Check physical pb_type annotation for circuit model failed with %ld errors!\n",
                  num_err);
  }
}
void check_vpr_pb_type_circuit_model_annotation ( const DeviceContext & vpr_device_ctx , const CircuitLibrary & circuit_lib , const VprDeviceAnnotation & vpr_device_annotation ) { size_t num_err = 0 ; for ( const t_logical_block_type & lb_type : vpr_device_ctx . logical_block_types ) { if ( nullptr == lb_type . pb_type ) { continue ; } rec_check_vpr_pb_type_circuit_model_annotation ( lb_type . pb_type , circuit_lib , vpr_device_annotation , num_err ) ; } if ( 0 == num_err ) { VTR_LOG ( " \n " ) ; } else { VTR_LOG_ERROR ( " \n " , num_err ) ; } }
This function will check the circuit model annotation for
 each physical pb_type in the device
  - Every physical pb_type should be linked to a valid circuit model
  - Every port of the pb_type have been linked a valid port of a circuit model
  - Every interconnect has been linked to a valid circuit model
    in a correct type
This function will check the circuit model annotation for each physical pb_type in the device - Every physical pb_type should be linked to a valid circuit model - Every port of the pb_type have been linked a valid port of a circuit model - Every interconnect has been linked to a valid circuit model in a correct type
/* By pass nullptr for pb_type head */ /* Top pb_type should always has a physical mode! */