Lib/vc4/RegisterMap.cpp
/**
 * @brief Write scheduler register values for selected QPU's.
 *
 * This sets values in both scheduler registers.
 *
 * **NOTE:**  The scheduler registers are read/write
 *
 * **TODO:** Not tested yet!
 */
@brief Write scheduler register values for selected QPU's.
This sets values in both scheduler registers.

The scheduler registers are read/write

Not tested yet!
@brief Write scheduler register values for selected QPU ' s . This sets values in both scheduler registers . The scheduler registers are read / write Not tested yet!
void RegisterMap::SchedulerRegisters(SchedulerRegisterValues values) {
  uint32_t reg0 = readRegister(V3D_SQRSV0);
  uint32_t reg1 = readRegister(V3D_SQRSV1);
  uint32_t new_reg0 = reg0;
  uint32_t new_reg1 = reg1;
  for (int i = 0; i < MAX_AVAILABLE_QPUS/2; ++i) {
    int offset = 4*i;
    if (values.set_qpu[i]) {
      new_reg0 = (0x0f & values.qpu[i]) << offset;
    }
  }
  for (int i = MAX_AVAILABLE_QPUS/2; i < MAX_AVAILABLE_QPUS; ++i) {
    int offset = 4*i - MAX_AVAILABLE_QPUS/2;
    if (values.set_qpu[i]) {
      new_reg1 = (0x0f & values.qpu[i]) << offset;
    }
  }
  if (reg0 != new_reg0) {  
    writeRegister(V3D_SQRSV0, new_reg0);
  }
  if (reg1 != new_reg1) {  
    writeRegister(V3D_SQRSV1, new_reg1);
  }
}
void RegisterMap :: SchedulerRegisters ( SchedulerRegisterValues values ) { uint32_t reg0 = readRegister ( V3D_SQRSV0 ) ; uint32_t reg1 = readRegister ( V3D_SQRSV1 ) ; uint32_t new_reg0 = reg0 ; uint32_t new_reg1 = reg1 ; for ( int i = 0 ; i < MAX_AVAILABLE_QPUS / 2 ; ++ i ) { int offset = 4 * i ; if ( values . set_qpu [ i ] ) { new_reg0 = ( 0x0f & values . qpu [ i ] ) << offset ; } } for ( int i = MAX_AVAILABLE_QPUS / 2 ; i < MAX_AVAILABLE_QPUS ; ++ i ) { int offset = 4 * i - MAX_AVAILABLE_QPUS / 2 ; if ( values . set_qpu [ i ] ) { new_reg1 = ( 0x0f & values . qpu [ i ] ) << offset ; } } if ( reg0 != new_reg0 ) { writeRegister ( V3D_SQRSV0 , new_reg0 ) ; } if ( reg1 != new_reg1 ) { writeRegister ( V3D_SQRSV1 , new_reg1 ) ; } }
@brief Write scheduler register values for selected QPU's.
@brief Write scheduler register values for selected QPU ' s .
//new_reg0 = (reg0 & ~(0x0f << offset)) | (values.qpu[i] << offset); //new_reg1 = (reg1 & ~(0x0f << offset)) | (values.qpu[i] << offset); // Value reg0 changed // Value reg1 changed