src/memory/mappers/sxrom.cc
/*
 * Attempts to write the given value to requested address, updating
 * the controlling registers if PRG-ROM was written to.
 *
 * Assumes that Connect has been called on the calling object with valid
 * Cpu/Ppu/Apu objects.
 * Assumes that AddController has been called by the calling object on
 * a valid Input object.
 */
Attempts to write the given value to requested address, updating
the controlling registers if PRG-ROM was written to.

Assumes that Connect has been called on the calling object with valid
Cpu/Ppu/Apu objects.
Assumes that AddController has been called by the calling object on
a valid Input object.
Attempts to write the given value to requested address updating the controlling registers if PRG - ROM was written to . Assumes that Connect has been called on the calling object with valid Cpu / Ppu / Apu objects . Assumes that AddController has been called by the calling object on a valid Input object .
void Sxrom::Write(DoubleWord addr, DataWord val) {
  bus_ = val;
  if (addr < PPU_OFFSET) {
    ram_[addr & RAM_MASK] = val;
  } else if ((PPU_OFFSET <= addr) && (addr < IO_OFFSET)) {
    ppu_->Write(addr, val);
  } else if ((IO_OFFSET <= addr) && (addr < MAPPER_OFFSET)) {
    if (addr == CPU_DMA_ADDR) {
      cpu_->StartDma(val);
    } else if (addr == IO_JOY1_ADDR) {
      controller_->Write(addr, val);
    } else {
      apu_->Write(addr, val);
    }
  } else if ((PRG_RAM_OFFSET <= addr) && (addr < PRG_ROM_A_OFFSET)
                                      && (num_prg_ram_banks_ > 0)
                                      && !(prg_reg_ & FLAG_PRG_RAM_DISABLE)) {
    prg_ram_[prg_ram_bank_][addr & PRG_RAM_MASK] = val;
  } else if (addr >= PRG_ROM_A_OFFSET) {
    UpdateRegisters(addr, val);
  }
  return;
}
void Sxrom :: Write ( DoubleWord addr , DataWord val ) { bus_ = val ; if ( addr < PPU_OFFSET ) { ram_ [ addr & RAM_MASK ] = val ; } else if ( ( PPU_OFFSET <= addr ) && ( addr < IO_OFFSET ) ) { ppu_ -> Write ( addr , val ) ; } else if ( ( IO_OFFSET <= addr ) && ( addr < MAPPER_OFFSET ) ) { if ( addr == CPU_DMA_ADDR ) { cpu_ -> StartDma ( val ) ; } else if ( addr == IO_JOY1_ADDR ) { controller_ -> Write ( addr , val ) ; } else { apu_ -> Write ( addr , val ) ; } } else if ( ( PRG_RAM_OFFSET <= addr ) && ( addr < PRG_ROM_A_OFFSET ) && ( num_prg_ram_banks_ > 0 ) && ! ( prg_reg_ & FLAG_PRG_RAM_DISABLE ) ) { prg_ram_ [ prg_ram_bank_ ] [ addr & PRG_RAM_MASK ] = val ; } else if ( addr >= PRG_ROM_A_OFFSET ) { UpdateRegisters ( addr , val ) ; } return ; }
Attempts to write the given value to requested address, updating
 the controlling registers if PRG-ROM was written to.
Attempts to write the given value to requested address updating the controlling registers if PRG - ROM was written to .
// Place the value on the bus. // Attempt to write the value to memory. // Write to NES RAM. // Write to PPU MMIO. // Write to the general MMIO space. // Write to cartridge RAM. // Write to the controlling registers for SxROM.