src/bins/decode.cc
/*
 * Queues an implied (no memory access) read instruction using the given
 * micro operation.
 */
Queues an implied (no memory access) read instruction using the given
micro operation.
Queues an implied ( no memory access ) read instruction using the given micro operation .
void Decode::DecodeNomem(CpuOperation op) {
  state_->AddCycle(MEM_READ | MEM_OP1(REG_TMP2) | MEM_ADDR(REG_PCL));
  state_->AddCycle(MEM_FETCH | op | PC_INC);
  return;
}
void Decode :: DecodeNomem ( CpuOperation op ) { state_ -> AddCycle ( MEM_READ | MEM_OP1 ( REG_TMP2 ) | MEM_ADDR ( REG_PCL ) ) ; state_ -> AddCycle ( MEM_FETCH | op | PC_INC ) ; return ; }
Queues an implied (no memory access) read instruction using the given
 micro operation.
Queues an implied ( no memory access ) read instruction using the given micro operation .