libs/libarchfpga/src/arch_util.cpp
/* Date:July 10th, 2013
 * Author: Daniel Chen
 * Purpose: Attempts to match a clock_name specified in an
 *			timing annotation (Tsetup, Thold, Tc_to_q) with the
 *			clock_name specified in the primitive. Applies
 *			to flipflop/memory right now.
 */
July 10th, 2013
Author: Daniel Chen
Purpose: Attempts to match a clock_name specified in an
timing annotation (Tsetup, Thold, Tc_to_q) with the
clock_name specified in the primitive. Applies
to flipflop/memory right now.
July 10th 2013 Author : Daniel Chen Purpose : Attempts to match a clock_name specified in an timing annotation ( Tsetup Thold Tc_to_q ) with the clock_name specified in the primitive . Applies to flipflop / memory right now .
void primitives_annotation_clock_match(t_pin_to_pin_annotation* annotation,
                                       t_pb_type* parent_pb_type) {
    int i_port;
    bool clock_valid = false; 
    if (!parent_pb_type || !annotation) {
        archfpga_throw(__FILE__, __LINE__,
                       "Annotation_clock check encouters invalid annotation or primitive.\n");
    }
    for (i_port = 0; i_port < parent_pb_type->num_ports; i_port++) {
        if (parent_pb_type->ports[i_port].is_clock) {
            if (strcmp(parent_pb_type->ports[i_port].name, annotation->clock)
                == 0) {
                clock_valid = true;
                break;
            }
        }
    }
    if (!clock_valid) {
        archfpga_throw(get_arch_file_name(), annotation->line_num,
                       "Clock '%s' does not match any clock defined in pb_type '%s'.\n",
                       annotation->clock, parent_pb_type->name);
    }
}
void primitives_annotation_clock_match ( t_pin_to_pin_annotation * annotation , t_pb_type * parent_pb_type ) { int i_port ; bool clock_valid = false ; if ( ! parent_pb_type || ! annotation ) { archfpga_throw ( __FILE__ , __LINE__ , " \n " ) ; } for ( i_port = 0 ; i_port < parent_pb_type -> num_ports ; i_port ++ ) { if ( parent_pb_type -> ports [ i_port ] . is_clock ) { if ( strcmp ( parent_pb_type -> ports [ i_port ] . name , annotation -> clock ) == 0 ) { clock_valid = true ; break ; } } } if ( ! clock_valid ) { archfpga_throw ( get_arch_file_name ( ) , annotation -> line_num , " \n " , annotation -> clock , parent_pb_type -> name ) ; } }
Date:July 10th, 2013
 Author: Daniel Chen
 Purpose: Attempts to match a clock_name specified in an
                      timing annotation (Tsetup, Thold, Tc_to_q) with the
                      clock_name specified in the primitive.
Date : July 10th 2013 Author : Daniel Chen Purpose : Attempts to match a clock_name specified in an timing annotation ( Tsetup Thold Tc_to_q ) with the clock_name specified in the primitive .
//Determine if annotation's clock is same as primtive's clock