src/CodeGen_CoreIR_Target.cpp
// most code is copied from CodeGen_C::visit(const Allocate *)
// we want to check that the allocation size is constant, and
// add a 'CoreIR ARRAY_PARTITION' pragma to the allocation
most code is copied from CodeGen_C::visit(const Allocate *)
we want to check that the allocation size is constant, and
add a 'CoreIR ARRAY_PARTITION' pragma to the allocation
most code is copied from CodeGen_C :: visit ( const Allocate * ) we want to check that the allocation size is constant and add a ' CoreIR ARRAY_PARTITION ' pragma to the allocation
void CodeGen_CoreIR_Target::CodeGen_CoreIR_C::visit(const Allocate *op) {
  internal_assert(!op->new_expr.defined());
  internal_assert(!is_zero(op->condition));
  int32_t constant_size;
  constant_size = op->constant_allocation_size();
  if (constant_size > 0) {
  } else {
    for (size_t i = 0; i < op->extents.size(); i++) {
    }
    internal_error << "Size for allocation " << op->name
                   << " is not a constant.\n";
  }
  string alloc_name = print_name(op->name + unique_name('a'));
  Stmt new_body = RenameAllocation(op->name, alloc_name).mutate(op->body);
  Allocation alloc;
  alloc.type = op->type;
  allocations.push(alloc_name, alloc);
  do_indent();
  stream << print_type(op->type) << ' '
         << print_name(alloc_name)
         << "[" << constant_size << "]; [alloc]\n";
  auto alloc_type = identify_allocation(new_body, alloc_name);
  if (alloc_type == AllocationType::ROM_ALLOCATION &&
      constant_size > 16) {
    CoreIR_Inst_Args rom_args;
    rom_args.ref_name = alloc_name;
    rom_args.name = "rom_" + alloc_name;
    rom_args.gen = gens["rom2"];
    rom_args.args = {{"width",CoreIR::Const::make(context,bitwidth)},
                     {"depth",CoreIR::Const::make(context,constant_size)}};
    nlohmann::json jdata = rom_init(new_body, alloc_name);
    CoreIR::Values modparams = {{"init", CoreIR::Const::make(context, jdata)}};
    rom_args.genargs = modparams;
    rom_args.selname = "rdata";
    hw_def_set[alloc_name] = std::make_shared<CoreIR_Inst_Args>(rom_args);
    stream << "// created a rom called " << rom_args.name << "\n";
  } else if (alloc_type == AllocationType::RMW_ALLOCATION) {
    CoreIR_Inst_Args rmw_args;
    rmw_args.ref_name = alloc_name;
    rmw_args.name = "rmw_" + alloc_name;
    rmw_args.gen = gens["rmw"];
    rmw_args.args = {{"width",CoreIR::Const::make(context,bitwidth)},
                     {"depth",CoreIR::Const::make(context,constant_size)}};
    nlohmann::json jdata;
    jdata["init"][0] = 0;
    CoreIR::Values modparams = {{"init", CoreIR::Const::make(context, jdata)}};
    rmw_args.genargs = modparams;
    rmw_args.selname = "rdata";
    hw_def_set[alloc_name] = std::make_shared<CoreIR_Inst_Args>(rmw_args);
    stream << "// created a rmw histogram called " << alloc_name << "\n";
    cout << "// created a rmw histogram called " << alloc_name << "\n";
  } else if (alloc_type == AllocationType::SRAM_ALLOCATION) {
    CoreIR_Inst_Args sram_args;
    sram_args.ref_name = alloc_name;
    sram_args.name = "sram_" + alloc_name;
    sram_args.gen = gens["ram2"];
    sram_args.args = {{"width",CoreIR::Const::make(context,bitwidth)},
                     {"depth",CoreIR::Const::make(context,constant_size)}};
    nlohmann::json jdata;
    jdata["init"][0] = 0;
    CoreIR::Values modparams = {{"init", CoreIR::Const::make(context, jdata)}};
    sram_args.selname = "rdata";
    hw_def_set[alloc_name] = std::make_shared<CoreIR_Inst_Args>(sram_args);
    stream << "// created an sram allocation called " << alloc_name << "\n";
    cout << "// created an sram allocation called " << alloc_name << "\n";
  }
  new_body.accept(this);
  internal_assert(!allocations.contains(alloc_name))
    << "allocation " << alloc_name << " is not freed.\n";
  stream << "// ending this allocation" << endl;
  allocations.push(alloc_name, alloc);
}
void CodeGen_CoreIR_Target :: CodeGen_CoreIR_C :: visit ( const Allocate * op ) { internal_assert ( ! op -> new_expr . defined ( ) ) ; internal_assert ( ! is_zero ( op -> condition ) ) ; int32_t constant_size ; constant_size = op -> constant_allocation_size ( ) ; if ( constant_size > 0 ) { } else { for ( size_t i = 0 ; i < op -> extents . size ( ) ; i ++ ) { } internal_error << " " << op -> name << " \n " ; } string alloc_name = print_name ( op -> name + unique_name ( ' ' ) ) ; Stmt new_body = RenameAllocation ( op -> name , alloc_name ) . mutate ( op -> body ) ; Allocation alloc ; alloc . type = op -> type ; allocations . push ( alloc_name , alloc ) ; do_indent ( ) ; stream << print_type ( op -> type ) << ' ' << print_name ( alloc_name ) << " " << constant_size << " \n " ; auto alloc_type = identify_allocation ( new_body , alloc_name ) ; if ( alloc_type == AllocationType :: ROM_ALLOCATION && constant_size > 16 ) { CoreIR_Inst_Args rom_args ; rom_args . ref_name = alloc_name ; rom_args . name = " " + alloc_name ; rom_args . gen = gens [ " " ] ; rom_args . args = { { " " , CoreIR :: Const :: make ( context , bitwidth ) } , { " " , CoreIR :: Const :: make ( context , constant_size ) } } ; nlohmann :: json jdata = rom_init ( new_body , alloc_name ) ; CoreIR :: Values modparams = { { " " , CoreIR :: Const :: make ( context , jdata ) } } ; rom_args . genargs = modparams ; rom_args . selname = " " ; hw_def_set [ alloc_name ] = std :: make_shared < CoreIR_Inst_Args > ( rom_args ) ; stream << " " << rom_args . name << " \n " ; } else if ( alloc_type == AllocationType :: RMW_ALLOCATION ) { CoreIR_Inst_Args rmw_args ; rmw_args . ref_name = alloc_name ; rmw_args . name = " " + alloc_name ; rmw_args . gen = gens [ " " ] ; rmw_args . args = { { " " , CoreIR :: Const :: make ( context , bitwidth ) } , { " " , CoreIR :: Const :: make ( context , constant_size ) } } ; nlohmann :: json jdata ; jdata [ " " ] [ 0 ] = 0 ; CoreIR :: Values modparams = { { " " , CoreIR :: Const :: make ( context , jdata ) } } ; rmw_args . genargs = modparams ; rmw_args . selname = " " ; hw_def_set [ alloc_name ] = std :: make_shared < CoreIR_Inst_Args > ( rmw_args ) ; stream << " " << alloc_name << " \n " ; cout << " " << alloc_name << " \n " ; } else if ( alloc_type == AllocationType :: SRAM_ALLOCATION ) { CoreIR_Inst_Args sram_args ; sram_args . ref_name = alloc_name ; sram_args . name = " " + alloc_name ; sram_args . gen = gens [ " " ] ; sram_args . args = { { " " , CoreIR :: Const :: make ( context , bitwidth ) } , { " " , CoreIR :: Const :: make ( context , constant_size ) } } ; nlohmann :: json jdata ; jdata [ " " ] [ 0 ] = 0 ; CoreIR :: Values modparams = { { " " , CoreIR :: Const :: make ( context , jdata ) } } ; sram_args . selname = " " ; hw_def_set [ alloc_name ] = std :: make_shared < CoreIR_Inst_Args > ( sram_args ) ; stream << " " << alloc_name << " \n " ; cout << " " << alloc_name << " \n " ; } new_body . accept ( this ) ; internal_assert ( ! allocations . contains ( alloc_name ) ) << " " << alloc_name << " \n " ; stream << " " << endl ; allocations . push ( alloc_name , alloc ) ; }
most code is copied from CodeGen_C::visit(const Allocate *)
we want to check that the allocation size is constant, and
add a 'CoreIR ARRAY_PARTITION' pragma to the allocation
most code is copied from CodeGen_C :: visit ( const Allocate * ) we want to check that the allocation size is constant and add a ' CoreIR ARRAY_PARTITION ' pragma to the allocation
// We don't add scopes, as it messes up the dataflow directives in CoreIR compiler. // Instead, we rename the allocation to a unique name //open_scope(); //std::cout << "alloc_dim" << i << " " << op->extents[i] << "\n"; // rename allocation to avoid name conflict due to unrolling /*
    if (allocations.contains(alloc_name)) {
    return;
    }
    stream << "// couldn't find allocation " << alloc_name << endl;*/ //std::cout << "found alloc#=" << alloc_type << "\n"; // define a rom that can be created and used later // FIXME: better way to decide to use rom // FIXME: use an array of constants to load the rom // set initial values for rom //jdata["init"][0] = 0; // set initial values for rom // set initial values for sram //sram_args.genargs = modparams; //  CoreIR::Type* type_input = context->Bit()->Arr(bitwidth)->Arr(constant_size); //  CoreIR::Wireable* wire_array = def->addInstance("array", gens["passthrough"], {{"type", CoreIR::Const::make(context,type_input)}}); //  hw_wire_set[print_name(alloc_name)] = wire_array; // add a 'ARRAY_PARTITION" pragma //stream << "#pragma CoreIR ARRAY_PARTITION variable=" << print_name(op->name) << " complete dim=0\n\n"; // Should have been freed internally //close_scope("alloc " + print_name(op->name));