openfpga/src/fabric/build_top_module_memory.cpp
/********************************************************************
 * This function adds the CBX/CBY of a tile
 * to the memory modules and memory instances 
 * This function is designed for organizing memory modules in top-level
 * module
 *******************************************************************/
This function adds the CBX/CBY of a tile
to the memory modules and memory instances
This function is designed for organizing memory modules in top-level
module
This function adds the CBX / CBY of a tile to the memory modules and memory instances This function is designed for organizing memory modules in top - level module
static 
void organize_top_module_tile_cb_modules(ModuleManager& module_manager, 
                                         const ModuleId& top_module,
                                         const CircuitLibrary& circuit_lib,
                                         const e_config_protocol_type& sram_orgz_type,
                                         const CircuitModelId& sram_model,
                                         const vtr::Matrix<size_t>& cb_instance_ids,
                                         const DeviceRRGSB& device_rr_gsb,
                                         const RRGSB& rr_gsb,
                                         const t_rr_type& cb_type,
                                         const bool& compact_routing_hierarchy) {
  if ( false == rr_gsb.is_cb_exist(cb_type)) {
    return;
  }
  if (true == connection_block_contain_only_routing_tracks(rr_gsb, cb_type)) {
    return;
  }
  vtr::Point<size_t> cb_coord(rr_gsb.get_cb_x(cb_type), rr_gsb.get_cb_y(cb_type));
  if (true == compact_routing_hierarchy) {
    const RRGSB& unique_mirror = device_rr_gsb.get_cb_unique_module(cb_type, vtr::Point<size_t>(rr_gsb.get_x(), rr_gsb.get_y()));
    cb_coord.set_x(unique_mirror.get_cb_x(cb_type)); 
    cb_coord.set_y(unique_mirror.get_cb_y(cb_type)); 
  } 
  std::string cb_module_name = generate_connection_block_module_name(cb_type, cb_coord);
  ModuleId cb_module = module_manager.find_module(cb_module_name);
  VTR_ASSERT(true == module_manager.valid_module_id(cb_module));
  if (0 < find_module_num_config_bits(module_manager, cb_module,
                                      circuit_lib, sram_model, 
                                      sram_orgz_type)) {
    module_manager.add_configurable_child(top_module, cb_module, cb_instance_ids[rr_gsb.get_cb_x(cb_type)][rr_gsb.get_cb_y(cb_type)]);
  }
}
static void organize_top_module_tile_cb_modules ( ModuleManager & module_manager , const ModuleId & top_module , const CircuitLibrary & circuit_lib , const e_config_protocol_type & sram_orgz_type , const CircuitModelId & sram_model , const vtr :: Matrix < size_t > & cb_instance_ids , const DeviceRRGSB & device_rr_gsb , const RRGSB & rr_gsb , const t_rr_type & cb_type , const bool & compact_routing_hierarchy ) { if ( false == rr_gsb . is_cb_exist ( cb_type ) ) { return ; } if ( true == connection_block_contain_only_routing_tracks ( rr_gsb , cb_type ) ) { return ; } vtr :: Point < size_t > cb_coord ( rr_gsb . get_cb_x ( cb_type ) , rr_gsb . get_cb_y ( cb_type ) ) ; if ( true == compact_routing_hierarchy ) { const RRGSB & unique_mirror = device_rr_gsb . get_cb_unique_module ( cb_type , vtr :: Point < size_t > ( rr_gsb . get_x ( ) , rr_gsb . get_y ( ) ) ) ; cb_coord . set_x ( unique_mirror . get_cb_x ( cb_type ) ) ; cb_coord . set_y ( unique_mirror . get_cb_y ( cb_type ) ) ; } std :: string cb_module_name = generate_connection_block_module_name ( cb_type , cb_coord ) ; ModuleId cb_module = module_manager . find_module ( cb_module_name ) ; VTR_ASSERT ( true == module_manager . valid_module_id ( cb_module ) ) ; if ( 0 < find_module_num_config_bits ( module_manager , cb_module , circuit_lib , sram_model , sram_orgz_type ) ) { module_manager . add_configurable_child ( top_module , cb_module , cb_instance_ids [ rr_gsb . get_cb_x ( cb_type ) ] [ rr_gsb . get_cb_y ( cb_type ) ] ) ; } }
This function adds the CBX/CBY of a tile
 to the memory modules and memory instances
 This function is designed for organizing memory modules in top-level
 module
This function adds the CBX / CBY of a tile to the memory modules and memory instances This function is designed for organizing memory modules in top - level module
/* If the CB does not exist, we can skip addition */ /* Skip if the cb does not contain any configuration bits! */ /* If we use compact routing hierarchy, we should instanciate the unique module of SB */ /* Note: use GSB coordinate when inquire for unique modules!!! */ /* Identify if this sub module includes configuration bits, 
   * we will update the memory module and instance list
   */ /* Note that use the original CB coodinate for instance id searching ! */