src/apu/apu.cc
/*
 * Write to the APU status register, reseting the channels and clearing
 * the DMC IRQ as necessary.
 */
Write to the APU status register, reseting the channels and clearing
the DMC IRQ as necessary.
Write to the APU status register reseting the channels and clearing the DMC IRQ as necessary .
void Apu::StatusWrite(DataWord val) {
  channel_status_ = val;
  if (!(val & FLAG_NOISE_ACTIVE)) { noise_->length = 0; }
  if (!(val & FLAG_TRI_ACTIVE)) { triangle_->length = 0; }
  if (!(val & FLAG_PULSE_B_ACTIVE)) { pulse_b_->length = 0; }
  if (!(val & FLAG_PULSE_A_ACTIVE)) { pulse_a_->length = 0; }
  if (!(val & FLAG_DMC_ACTIVE)) {
    dmc_->bytes_remaining = 0;
  } else if (dmc_->bytes_remaining == 0) {
    dmc_->current_addr = dmc_->addr;
    dmc_->bytes_remaining = dmc_->length;
  }
  if (dmc_irq_) {
    dmc_irq_ = false;
    (*irq_line_)--;
  }
  return;
}
void Apu :: StatusWrite ( DataWord val ) { channel_status_ = val ; if ( ! ( val & FLAG_NOISE_ACTIVE ) ) { noise_ -> length = 0 ; } if ( ! ( val & FLAG_TRI_ACTIVE ) ) { triangle_ -> length = 0 ; } if ( ! ( val & FLAG_PULSE_B_ACTIVE ) ) { pulse_b_ -> length = 0 ; } if ( ! ( val & FLAG_PULSE_A_ACTIVE ) ) { pulse_a_ -> length = 0 ; } if ( ! ( val & FLAG_DMC_ACTIVE ) ) { dmc_ -> bytes_remaining = 0 ; } else if ( dmc_ -> bytes_remaining == 0 ) { dmc_ -> current_addr = dmc_ -> addr ; dmc_ -> bytes_remaining = dmc_ -> length ; } if ( dmc_irq_ ) { dmc_irq_ = false ; ( * irq_line_ ) -- ; } return ; }
Write to the APU status register, reseting the channels and clearing
 the DMC IRQ as necessary.
Write to the APU status register reseting the channels and clearing the DMC IRQ as necessary .
// Store the enable status of each channel. // Clear each channel whose bit was not set. // If the DMC bit was set, the channel should be reset without changing // the contents of the delta buffer; but only when there are no bytes // remaining in the sample. // Clear the DMC interrupt, if it is active.