third_party/virtualbox/src/VBox/Devices/Network/DevE1000.cpp
/**
 * Hardware reset. Revert all registers to initial values.
 *
 * @param   pThis       The device state structure.
 */
Hardware reset. Revert all registers to initial values.
@param   pThis       The device state structure.
Hardware reset . Revert all registers to initial values . @param pThis The device state structure .
static void e1kHardReset(PE1KSTATE pThis)
{
    E1kLog(("%s Hard reset triggered\n", pThis->szPrf));
    if (pThis->fIntRaised)
    {
        PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0);
        pThis->fIntRaised = false;
        E1kLog(("%s e1kHardReset: Lowered IRQ: ICR=%08x\n", pThis->szPrf, ICR));
    }
    memset(pThis->auRegs,        0, sizeof(pThis->auRegs));
    memset(pThis->aRecAddr.au32, 0, sizeof(pThis->aRecAddr.au32));
#ifdef E1K_INIT_RA0
    memcpy(pThis->aRecAddr.au32, pThis->macConfigured.au8,
           sizeof(pThis->macConfigured.au8));
    pThis->aRecAddr.array[0].ctl |= RA_CTL_AV;
#endif 
    STATUS = 0x0081;    
    EECD   = 0x0100;    
    CTRL   = 0x0a09;    
    TSPMT  = 0x01000400;
    Assert(GET_BITS(RCTL, BSIZE) == 0);
    pThis->u16RxBSize = 2048;
    if (pThis->pDrvR3)
        pThis->pDrvR3->pfnSetPromiscuousMode(pThis->pDrvR3, false);
#ifdef E1K_WITH_TXD_CACHE
    int rc = e1kCsTxEnter(pThis, VERR_SEM_BUSY);
    if (RT_LIKELY(rc == VINF_SUCCESS))
    {
        pThis->nTxDFetched  = 0;
        pThis->iTxDCurrent  = 0;
        pThis->fGSO         = false;
        pThis->cbTxAlloc    = 0;
        e1kCsTxLeave(pThis);
    }
#endif 
#ifdef E1K_WITH_RXD_CACHE
    if (RT_LIKELY(e1kCsRxEnter(pThis, VERR_SEM_BUSY) == VINF_SUCCESS))
    {
        pThis->iRxDCurrent = pThis->nRxDFetched = 0;
        e1kCsRxLeave(pThis);
    }
#endif 
#ifdef E1K_LSC_ON_RESET
    E1kLog(("%s Will trigger LSC in %d seconds...\n",
            pThis->szPrf, pThis->cMsLinkUpDelay / 1000));
    e1kArmTimer(pThis, pThis->CTX_SUFF(pLUTimer), pThis->cMsLinkUpDelay * 1000);
#endif 
}
static void e1kHardReset ( PE1KSTATE pThis ) { E1kLog ( ( " \n " , pThis -> szPrf ) ) ; if ( pThis -> fIntRaised ) { PDMDevHlpPCISetIrq ( pThis -> CTX_SUFF ( pDevIns ) , 0 , 0 ) ; pThis -> fIntRaised = false ; E1kLog ( ( " \n " , pThis -> szPrf , ICR ) ) ; } memset ( pThis -> auRegs , 0 , sizeof ( pThis -> auRegs ) ) ; memset ( pThis -> aRecAddr . au32 , 0 , sizeof ( pThis -> aRecAddr . au32 ) ) ; #ifdef E1K_INIT_RA0 memcpy ( pThis -> aRecAddr . au32 , pThis -> macConfigured . au8 , sizeof ( pThis -> macConfigured . au8 ) ) ; pThis -> aRecAddr . array [ 0 ] . ctl |= RA_CTL_AV ; #endif STATUS = 0x0081 ; EECD = 0x0100 ; CTRL = 0x0a09 ; TSPMT = 0x01000400 ; Assert ( GET_BITS ( RCTL , BSIZE ) == 0 ) ; pThis -> u16RxBSize = 2048 ; if ( pThis -> pDrvR3 ) pThis -> pDrvR3 -> pfnSetPromiscuousMode ( pThis -> pDrvR3 , false ) ; #ifdef E1K_WITH_TXD_CACHE int rc = e1kCsTxEnter ( pThis , VERR_SEM_BUSY ) ; if ( RT_LIKELY ( rc == VINF_SUCCESS ) ) { pThis -> nTxDFetched = 0 ; pThis -> iTxDCurrent = 0 ; pThis -> fGSO = false ; pThis -> cbTxAlloc = 0 ; e1kCsTxLeave ( pThis ) ; } #endif #ifdef E1K_WITH_RXD_CACHE if ( RT_LIKELY ( e1kCsRxEnter ( pThis , VERR_SEM_BUSY ) == VINF_SUCCESS ) ) { pThis -> iRxDCurrent = pThis -> nRxDFetched = 0 ; e1kCsRxLeave ( pThis ) ; } #endif #ifdef E1K_LSC_ON_RESET E1kLog ( ( " \n " , pThis -> szPrf , pThis -> cMsLinkUpDelay / 1000 ) ) ; e1kArmTimer ( pThis , pThis -> CTX_SUFF ( pLUTimer ) , pThis -> cMsLinkUpDelay * 1000 ) ; #endif }
Hardware reset.
Hardware reset .
/* No interrupts should survive device reset, see @bugref(9556). */ /* Lower(0) INTA(0) */ /* E1K_INIT_RA0 */ /* SPEED=10b (1000 Mb/s), FD=1b (Full Duplex) */ /* EE_PRES=1b (EEPROM present) */ /* FRCSPD=1b SPEED=10b LRST=1b FD=1b */ /* TSMT=0400h TSPBP=0100h */ /* Reset promiscuous mode */ /* E1K_WITH_TXD_CACHE */ /* E1K_WITH_RXD_CACHE */ /* E1K_LSC_ON_RESET */