openfpga/src/utils/lut_utils.cpp
/********************************************************************
 * For each lut_bit_lines, we should recover the truth table,
 * and then set the sram bits to "1" if the truth table defines so.
 * Start_point: the position we start converting don't care sign '-'
 *              to explicit '0' or '1'
 *******************************************************************/
For each lut_bit_lines, we should recover the truth table,
and then set the sram bits to "1" if the truth table defines so.
For each lut_bit_lines we should recover the truth table and then set the sram bits to " 1 " if the truth table defines so .
static 
void rec_build_lut_bitstream_per_line(std::vector<bool>& lut_bitstream, 
                                      const size_t& lut_size,
                                      const std::vector<vtr::LogicValue>& tt_line,
                                      const size_t& start_point) {
  std::vector<vtr::LogicValue> temp_line = tt_line;
  VTR_ASSERT(lut_size + 1 == tt_line.size()); 
  VTR_ASSERT( (vtr::LogicValue::TRUE == tt_line.back())
           || (vtr::LogicValue::FALSE == tt_line.back()) );
  VTR_ASSERT(start_point < tt_line.size());
  for (size_t i = 0; i < start_point; ++i) {
    VTR_ASSERT(vtr::LogicValue::DONT_CARE != tt_line[i]);
  }
  for (size_t i = start_point; i < lut_size; ++i) {
    if (vtr::LogicValue::DONT_CARE == tt_line[i]) {
      temp_line[i] = vtr::LogicValue::FALSE; 
      rec_build_lut_bitstream_per_line(lut_bitstream, lut_size, temp_line, start_point + 1);
      temp_line[i] = vtr::LogicValue::TRUE; 
      rec_build_lut_bitstream_per_line(lut_bitstream, lut_size, temp_line, start_point + 1);
      return; 
    }
  }
  size_t sram_id = 0;
  for (size_t i = 0; i < lut_size; ++i) {
    switch (tt_line[i]) {
    case vtr::LogicValue::FALSE :
      sram_id += (size_t)pow(2., (double)(i));
      break;
    case vtr::LogicValue::TRUE :
      break;
    case vtr::LogicValue::DONT_CARE :
    default :
      VTR_LOGF_ERROR(__FILE__, __LINE__, 
                     "Invalid truth_table bit '%s', should be [0|1|]!\n",
                     vtr::LOGIC_VALUE_STRING[size_t(tt_line[i])]); 
      exit(1);
    }
  }
  VTR_ASSERT(sram_id < lut_bitstream.size());
  if (vtr::LogicValue::TRUE == tt_line.back()) {
    lut_bitstream[sram_id] = true; 
  } else if (vtr::LogicValue::FALSE == tt_line.back()) {
    lut_bitstream[sram_id] = false; 
  } else {
    VTR_LOGF_ERROR(__FILE__, __LINE__, 
                   "Invalid truth_table_line ending '%s'!\n",
                   vtr::LOGIC_VALUE_STRING[size_t(tt_line.back())]);
    exit(1);
  }
}
static void rec_build_lut_bitstream_per_line ( std :: vector < bool > & lut_bitstream , const size_t & lut_size , const std :: vector < vtr :: LogicValue > & tt_line , const size_t & start_point ) { std :: vector < vtr :: LogicValue > temp_line = tt_line ; VTR_ASSERT ( lut_size + 1 == tt_line . size ( ) ) ; VTR_ASSERT ( ( vtr :: LogicValue :: TRUE == tt_line . back ( ) ) || ( vtr :: LogicValue :: FALSE == tt_line . back ( ) ) ) ; VTR_ASSERT ( start_point < tt_line . size ( ) ) ; for ( size_t i = 0 ; i < start_point ; ++ i ) { VTR_ASSERT ( vtr :: LogicValue :: DONT_CARE != tt_line [ i ] ) ; } for ( size_t i = start_point ; i < lut_size ; ++ i ) { if ( vtr :: LogicValue :: DONT_CARE == tt_line [ i ] ) { temp_line [ i ] = vtr :: LogicValue :: FALSE ; rec_build_lut_bitstream_per_line ( lut_bitstream , lut_size , temp_line , start_point + 1 ) ; temp_line [ i ] = vtr :: LogicValue :: TRUE ; rec_build_lut_bitstream_per_line ( lut_bitstream , lut_size , temp_line , start_point + 1 ) ; return ; } } size_t sram_id = 0 ; for ( size_t i = 0 ; i < lut_size ; ++ i ) { switch ( tt_line [ i ] ) { case vtr :: LogicValue :: FALSE : sram_id += ( size_t ) pow ( 2. , ( double ) ( i ) ) ; break ; case vtr :: LogicValue :: TRUE : break ; case vtr :: LogicValue :: DONT_CARE : default : VTR_LOGF_ERROR ( __FILE__ , __LINE__ , " \n " , vtr :: LOGIC_VALUE_STRING [ size_t ( tt_line [ i ] ) ] ) ; exit ( 1 ) ; } } VTR_ASSERT ( sram_id < lut_bitstream . size ( ) ) ; if ( vtr :: LogicValue :: TRUE == tt_line . back ( ) ) { lut_bitstream [ sram_id ] = true ; } else if ( vtr :: LogicValue :: FALSE == tt_line . back ( ) ) { lut_bitstream [ sram_id ] = false ; } else { VTR_LOGF_ERROR ( __FILE__ , __LINE__ , " \n " , vtr :: LOGIC_VALUE_STRING [ size_t ( tt_line . back ( ) ) ] ) ; exit ( 1 ) ; } }
For each lut_bit_lines, we should recover the truth table,
 and then set the sram bits to "1" if the truth table defines so.
For each lut_bit_lines we should recover the truth table and then set the sram bits to " 1 " if the truth table defines so .
/* Check the length of sram bits and truth table line */ /* lut_size + '1|0' */ /* End of truth_table_line should be "space" and "1" */ /* Make sure before start point there is no '-' */ /* Configure sram bits recursively */ /* if we find a dont_care, we don't do configure now but recursively*/ /* '0' branch */ /* '1' branch */ /* TODO: Use MuxGraph to decode this!!! */ /* Decode bitstream only when there are only 0 or 1 in the truth table */ /* Should be either '0' or '1' */ /* We assume the 1-lut pass sram1 when input = 0 */ /* We assume the 1-lut pass sram0 when input = 1 */ /* Set the sram bit to '1'*/ /* on set*/ /* off set */