vpr/src/route/rr_graph_indexed_data.cpp
/* Allocates the device_ctx.rr_indexed_data array and loads it with appropriate values. *
 * It currently stores the segment type (or OPEN if the index doesn't        *
 * correspond to an CHANX or CHANY type), the base cost of nodes of that     *
 * type, and some info to allow rapid estimates of time to get to a target   *
 * to be computed by the router.                                             *
 *
 * Right now all SOURCES have the same base cost; and similarly there's only *
 * one base cost for each of SINKs, OPINs, and IPINs (four total).  This can *
 * be changed just by allocating more space in the array below and changing  *
 * the cost_index values for these rr_nodes, if you want to make some pins   *
 * etc. more expensive than others.  I give each segment type in an          *
 * x-channel its own cost_index, and each segment type in a y-channel its    *
 * own cost_index.                                                           */
Allocates the device_ctx.rr_indexed_data array and loads it with appropriate values.
It currently stores the segment type (or OPEN if the index doesn't
correspond to an CHANX or CHANY type), the base cost of nodes of that
type, and some info to allow rapid estimates of time to get to a target
to be computed by the router.

Right now all SOURCES have the same base cost; and similarly there's only
one base cost for each of SINKs, OPINs, and IPINs (four total).  This can
be changed just by allocating more space in the array below and changing
the cost_index values for these rr_nodes, if you want to make some pins
etc. more expensive than others.  I give each segment type in an
x-channel its own cost_index, and each segment type in a y-channel its
own cost_index.
Allocates the device_ctx . rr_indexed_data array and loads it with appropriate values . It currently stores the segment type ( or OPEN if the index doesn ' t correspond to an CHANX or CHANY type ) the base cost of nodes of that type and some info to allow rapid estimates of time to get to a target to be computed by the router . Right now all SOURCES have the same base cost ; and similarly there ' s only one base cost for each of SINKs OPINs and IPINs ( four total ) . This can be changed just by allocating more space in the array below and changing the cost_index values for these rr_nodes if you want to make some pins etc . more expensive than others . I give each segment type in an x - channel its own cost_index and each segment type in a y - channel its own cost_index .
void alloc_and_load_rr_indexed_data(const std::vector<t_segment_inf>& segment_inf,
                                    const RRGraph& rr_graph,
                                    const int nodes_per_chan,
                                    int wire_to_ipin_switch,
                                    enum e_base_cost_type base_cost_type) {
    int iseg, length, i, index;
    auto& device_ctx = g_vpr_ctx.mutable_device();
    int num_segment = segment_inf.size();
    int num_rr_indexed_data = CHANX_COST_INDEX_START + (2 * num_segment);
    device_ctx.rr_indexed_data.resize(num_rr_indexed_data);
    for (i = SOURCE_COST_INDEX; i <= IPIN_COST_INDEX; i++) {
        device_ctx.rr_indexed_data[i].ortho_cost_index = OPEN;
        device_ctx.rr_indexed_data[i].seg_index = OPEN;
        device_ctx.rr_indexed_data[i].inv_length = OPEN;
        device_ctx.rr_indexed_data[i].T_linear = OPEN;
        device_ctx.rr_indexed_data[i].T_quadratic = OPEN;
        device_ctx.rr_indexed_data[i].C_load = OPEN;
    }
    device_ctx.rr_indexed_data[IPIN_COST_INDEX].T_linear = device_ctx.rr_switch_inf[wire_to_ipin_switch].Tdel;
    for (iseg = 0; iseg < num_segment; iseg++) {
        index = CHANX_COST_INDEX_START + iseg;
        if ((index + num_segment) >= (int)device_ctx.rr_indexed_data.size()) {
            device_ctx.rr_indexed_data[index].ortho_cost_index = index;
        } else {
            device_ctx.rr_indexed_data[index].ortho_cost_index = index + num_segment;
        }
        if (segment_inf[iseg].longline)
            length = device_ctx.grid.width();
        else
            length = std::min<int>(segment_inf[iseg].length, device_ctx.grid.width());
        device_ctx.rr_indexed_data[index].inv_length = 1. / length;
        device_ctx.rr_indexed_data[index].seg_index = iseg;
    }
    load_rr_indexed_data_T_values(CHANX_COST_INDEX_START, num_segment, CHANX,
                                  nodes_per_chan, rr_graph);
    for (iseg = 0; iseg < num_segment; iseg++) {
        index = CHANX_COST_INDEX_START + num_segment + iseg;
        if ((index - num_segment) < CHANX_COST_INDEX_START) {
            device_ctx.rr_indexed_data[index].ortho_cost_index = index;
        } else {
            device_ctx.rr_indexed_data[index].ortho_cost_index = index - num_segment;
        }
        if (segment_inf[iseg].longline)
            length = device_ctx.grid.height();
        else
            length = std::min<int>(segment_inf[iseg].length, device_ctx.grid.height());
        device_ctx.rr_indexed_data[index].inv_length = 1. / length;
        device_ctx.rr_indexed_data[index].seg_index = iseg;
    }
    load_rr_indexed_data_T_values((CHANX_COST_INDEX_START + num_segment),
                                  num_segment, CHANY, nodes_per_chan, rr_graph);
    fixup_rr_indexed_data_T_values(num_segment);
    load_rr_indexed_data_base_costs(nodes_per_chan, rr_graph,
                                    base_cost_type);
}
void alloc_and_load_rr_indexed_data ( const std :: vector < t_segment_inf > & segment_inf , const RRGraph & rr_graph , const int nodes_per_chan , int wire_to_ipin_switch , enum e_base_cost_type base_cost_type ) { int iseg , length , i , index ; auto & device_ctx = g_vpr_ctx . mutable_device ( ) ; int num_segment = segment_inf . size ( ) ; int num_rr_indexed_data = CHANX_COST_INDEX_START + ( 2 * num_segment ) ; device_ctx . rr_indexed_data . resize ( num_rr_indexed_data ) ; for ( i = SOURCE_COST_INDEX ; i <= IPIN_COST_INDEX ; i ++ ) { device_ctx . rr_indexed_data [ i ] . ortho_cost_index = OPEN ; device_ctx . rr_indexed_data [ i ] . seg_index = OPEN ; device_ctx . rr_indexed_data [ i ] . inv_length = OPEN ; device_ctx . rr_indexed_data [ i ] . T_linear = OPEN ; device_ctx . rr_indexed_data [ i ] . T_quadratic = OPEN ; device_ctx . rr_indexed_data [ i ] . C_load = OPEN ; } device_ctx . rr_indexed_data [ IPIN_COST_INDEX ] . T_linear = device_ctx . rr_switch_inf [ wire_to_ipin_switch ] . Tdel ; for ( iseg = 0 ; iseg < num_segment ; iseg ++ ) { index = CHANX_COST_INDEX_START + iseg ; if ( ( index + num_segment ) >= ( int ) device_ctx . rr_indexed_data . size ( ) ) { device_ctx . rr_indexed_data [ index ] . ortho_cost_index = index ; } else { device_ctx . rr_indexed_data [ index ] . ortho_cost_index = index + num_segment ; } if ( segment_inf [ iseg ] . longline ) length = device_ctx . grid . width ( ) ; else length = std :: min < int > ( segment_inf [ iseg ] . length , device_ctx . grid . width ( ) ) ; device_ctx . rr_indexed_data [ index ] . inv_length = 1. / length ; device_ctx . rr_indexed_data [ index ] . seg_index = iseg ; } load_rr_indexed_data_T_values ( CHANX_COST_INDEX_START , num_segment , CHANX , nodes_per_chan , rr_graph ) ; for ( iseg = 0 ; iseg < num_segment ; iseg ++ ) { index = CHANX_COST_INDEX_START + num_segment + iseg ; if ( ( index - num_segment ) < CHANX_COST_INDEX_START ) { device_ctx . rr_indexed_data [ index ] . ortho_cost_index = index ; } else { device_ctx . rr_indexed_data [ index ] . ortho_cost_index = index - num_segment ; } if ( segment_inf [ iseg ] . longline ) length = device_ctx . grid . height ( ) ; else length = std :: min < int > ( segment_inf [ iseg ] . length , device_ctx . grid . height ( ) ) ; device_ctx . rr_indexed_data [ index ] . inv_length = 1. / length ; device_ctx . rr_indexed_data [ index ] . seg_index = iseg ; } load_rr_indexed_data_T_values ( ( CHANX_COST_INDEX_START + num_segment ) , num_segment , CHANY , nodes_per_chan , rr_graph ) ; fixup_rr_indexed_data_T_values ( num_segment ) ; load_rr_indexed_data_base_costs ( nodes_per_chan , rr_graph , base_cost_type ) ; }
Allocates the device_ctx.rr_indexed_data array and loads it with appropriate values.
Allocates the device_ctx . rr_indexed_data array and loads it with appropriate values .
/* For rr_types that aren't CHANX or CHANY, base_cost is valid, but most     *
     * * other fields are invalid.  For IPINs, the T_linear field is also valid;   *
     * * all other fields are invalid.  For SOURCES, SINKs and OPINs, all fields   *
     * * other than base_cost are invalid. Mark invalid fields as OPEN for safety. */ /* X-directed segments. */ /* Y-directed segments. */