libopenfpga/libarchopenfpga/src/check_circuit_library.cpp
/************************************************************************
 * A function to check the port map of SRAM circuit model
 ***********************************************************************/
A function to check the port map of SRAM circuit model
A function to check the port map of SRAM circuit model
size_t check_sram_circuit_model_ports(const CircuitLibrary& circuit_lib,
                                      const CircuitModelId& circuit_model,
                                      const bool& check_blwl) {
  size_t num_err = 0;
  VTR_ASSERT(CIRCUIT_MODEL_SRAM == circuit_lib.model_type(circuit_model));
  num_err += check_one_circuit_model_port_type_and_size_required(circuit_lib, circuit_model, 
                                                                 CIRCUIT_MODEL_PORT_OUTPUT,
                                                                 2, 1, false);
  if (false == check_blwl) {
    return num_err;
  }
  num_err += check_one_circuit_model_port_type_and_size_required(circuit_lib, circuit_model, 
                                                                 CIRCUIT_MODEL_PORT_BL,
                                                                 1, 1, false);
  num_err += check_one_circuit_model_port_type_and_size_required(circuit_lib, circuit_model, 
                                                                 CIRCUIT_MODEL_PORT_WL,
                                                                 1, 1, false);
  return num_err;
}
size_t check_sram_circuit_model_ports ( const CircuitLibrary & circuit_lib , const CircuitModelId & circuit_model , const bool & check_blwl ) { size_t num_err = 0 ; VTR_ASSERT ( CIRCUIT_MODEL_SRAM == circuit_lib . model_type ( circuit_model ) ) ; num_err += check_one_circuit_model_port_type_and_size_required ( circuit_lib , circuit_model , CIRCUIT_MODEL_PORT_OUTPUT , 2 , 1 , false ) ; if ( false == check_blwl ) { return num_err ; } num_err += check_one_circuit_model_port_type_and_size_required ( circuit_lib , circuit_model , CIRCUIT_MODEL_PORT_BL , 1 , 1 , false ) ; num_err += check_one_circuit_model_port_type_and_size_required ( circuit_lib , circuit_model , CIRCUIT_MODEL_PORT_WL , 1 , 1 , false ) ; return num_err ; }
A function to check the port map of SRAM circuit model
A function to check the port map of SRAM circuit model
/* Check the type of circuit model */ /* Check if we has 1 output with size 2 */ /* basic check finished here */ /* If bl and wl are required, check their existence */