openfpga/src/fabric/build_essential_modules.cpp
/************************************************
 * Generate the modules for essential gates
 * include inverters, buffers, transmission-gates,
 * etc.
 ***********************************************/
Generate the modules for essential gates
include inverters, buffers, transmission-gates,
etc.
Generate the modules for essential gates include inverters buffers transmission - gates etc .
void build_essential_modules(ModuleManager& module_manager, 
                             const CircuitLibrary& circuit_lib) {
  vtr::ScopedStartFinishTimer timer("Build essential (inverter/buffer/logic gate) modules");
  for (const auto& circuit_model : circuit_lib.models()) {
    ModuleId module = module_manager.find_module(circuit_lib.model_name(circuit_model));
    if (true == module_manager.valid_module_id(module)) {
      continue;
    }
    if (CIRCUIT_MODEL_INVBUF == circuit_lib.model_type(circuit_model)) {
      build_invbuf_module(module_manager, circuit_lib, circuit_model);
      continue;
    }
    if (CIRCUIT_MODEL_PASSGATE == circuit_lib.model_type(circuit_model)) {
      build_passgate_module(module_manager, circuit_lib, circuit_model);
      continue;
    }
    if (CIRCUIT_MODEL_GATE == circuit_lib.model_type(circuit_model)) {
      build_gate_module(module_manager, circuit_lib, circuit_model);
      continue;
    }
  }
}
void build_essential_modules ( ModuleManager & module_manager , const CircuitLibrary & circuit_lib ) { vtr :: ScopedStartFinishTimer timer ( " " ) ; for ( const auto & circuit_model : circuit_lib . models ( ) ) { ModuleId module = module_manager . find_module ( circuit_lib . model_name ( circuit_model ) ) ; if ( true == module_manager . valid_module_id ( module ) ) { continue ; } if ( CIRCUIT_MODEL_INVBUF == circuit_lib . model_type ( circuit_model ) ) { build_invbuf_module ( module_manager , circuit_lib , circuit_model ) ; continue ; } if ( CIRCUIT_MODEL_PASSGATE == circuit_lib . model_type ( circuit_model ) ) { build_passgate_module ( module_manager , circuit_lib , circuit_model ) ; continue ; } if ( CIRCUIT_MODEL_GATE == circuit_lib . model_type ( circuit_model ) ) { build_gate_module ( module_manager , circuit_lib , circuit_model ) ; continue ; } } }
Generate the modules for essential gates
 include inverters, buffers, transmission-gates,
 etc.
Generate the modules for essential gates include inverters buffers transmission - gates etc .
/* Add essential modules upon on demand: only when it is not yet in the module library */