Lib/Liveness/RegUsage.cpp
/**
 * Number of instructions from first assignment till last usage, inclusive.
 */
Number of instructions from first assignment till last usage, inclusive.
Number of instructions from first assignment till last usage inclusive .
int RegUsageItem::use_range() const {
  if (unused()) return 0;
#if 0
  if (only_assigned()) return 0;  
   Alternate way of calculating use range, without touching live range
   The idea here is to get rid of liveness analysis before optimization.
   However, there are just so many cases to handle. The last one I ran into is (pseudo code):
      A0 = 0
      If something
        A0 = 1
      End
      dst = cmd A0,...
    - As far as liveness is concerned, A0 is live from 'A0 = 0' onward, which is correct
    - src/dst analysis, however, does not see the If and infers that liveness is from `A0 = 1` onwards.
    - As far as dst-use is concerned, this is a non-issue, because A0 is used way past any assignments to it.
      Question is, how to handle?
   Stopped this for now because it is burning my brain cells.
   determine first write before src usage (there might be a dummy write before
  assertq(src_range.first() != -1, "oops", true);
  int first_write = -1;
  for (auto dst : use_dst) {
    if (dst >= src_range.first()) break;   >= because instr can have reg as src as well as dst (eg. add src, src, 1)
    first_write = dst;
  }
  assert(first_write != -1);
   Live range goes in after found dst
  int first_1 = first_write + 1;
  int last_1 = src_range.last();
  if (last_1 == -1) {                         Guard for case where var is write only (eg. dummy output)
    last_1 = first_1;
  }
#endif
   Original way of determining use range
  int first = m_live_range.first();
  if (!use_dst.empty()) first = use_dst[0];   Guard for case where var is read only (eg. dummy input)
  if (first == -1) {
    if (!use_dst.empty()) {
      first = use_dst[0] + 1;   Guard for case where var is read only (eg. dummy input)
    }
  }
  int last = m_live_range.last();
  if (last == -1) {                         Guard for case where var is write only (eg. dummy output)
    last = first;
  }
#if 0
  assert(first_1 == first);
  assert(last_1 <= last);   Inequality: live range need not be the same as src usage.
                            This happens with liveness analysis with conditional loop, where var is used
                            only within that loop. The liveness of that var goes until the end of the loop,
                            past last src usage.
                            This looks like a bug in liveness, not sure.
                            But then again, liveness is something of a black magic for me.
#endif
  int ret = (last - first + 1);
  assert(ret > 0);   really expecting something here
  return ret;
}
int RegUsageItem :: use_range ( ) const { if ( unused ( ) ) return 0 ; #if 0 if ( only_assigned ( ) ) return 0 ; assertq ( src_range . first ( ) != -1 , " " , true ) ; int first_write = -1 ; for ( auto dst : use_dst ) { if ( dst >= src_range . first ( ) ) break ; first_write = dst ; } assert ( first_write != -1 ) ; int first_1 = first_write + 1 ; int last_1 = src_range . last ( ) ; if ( last_1 == -1 ) { last_1 = first_1 ; } #endif int first = m_live_range . first ( ) ; if ( first == -1 ) { if ( ! use_dst . empty ( ) ) { first = use_dst [ 0 ] + 1 ; } } int last = m_live_range . last ( ) ; if ( last == -1 ) { last = first ; } #if 0 assert ( first_1 == first ) ; assert ( last_1 <= last ) ; #endif int ret = ( last - first + 1 ) ; assert ( ret > 0 ) ; return ret ; }
Number of instructions from first assignment till last usage, inclusive.
Number of instructions from first assignment till last usage inclusive .
// This is wrong for the normal case, used to solve issue with this code  // // Alternate way of calculating use range, without touching live range // // The idea here is to get rid of liveness analysis before optimization. // However, there are just so many cases to handle. The last one I ran into is (pseudo code): // //    A0 = 0 //    If something //      A0 = 1 //    End // //    dst = cmd A0,... // //  - As far as liveness is concerned, A0 is live from 'A0 = 0' onward, which is correct //  - src/dst analysis, however, does not see the If and infers that liveness is from `A0 = 1` onwards. //  - As far as dst-use is concerned, this is a non-issue, because A0 is used way past any assignments to it. //    Question is, how to handle? // // Stopped this for now because it is burning my brain cells. // // determine first write before src usage (there might be a dummy write before // >= because instr can have reg as src as well as dst (eg. add src, src, 1) // Live range goes in after found dst // Guard for case where var is write only (eg. dummy output) // // Original way of determining use range // //if (!use_dst.empty()) first = use_dst[0];  // Guard for case where var is read only (eg. dummy input) // Guard for case where var is read only (eg. dummy input) // Guard for case where var is write only (eg. dummy output) // Inequality: live range need not be the same as src usage. // This happens with liveness analysis with conditional loop, where var is used // only within that loop. The liveness of that var goes until the end of the loop, // past last src usage. // // This looks like a bug in liveness, not sure. // But then again, liveness is something of a black magic for me. // really expecting something here