src/arch/arm/insts/vfp.cc
/*
 * The asm statements below are to keep gcc from reordering code. Otherwise
 * the rounding mode might be set after the operation it was intended for, the
 * exception bits read before it, etc.
 */
The asm statements below are to keep gcc from reordering code. Otherwise
the rounding mode might be set after the operation it was intended for, the
exception bits read before it, etc.
The asm statements below are to keep gcc from reordering code . Otherwise the rounding mode might be set after the operation it was intended for the exception bits read before it etc .
std::string
FpCondCompRegOp::generateDisassembly(
        Addr pc, const loader::SymbolTable *symtab) const
{
    std::stringstream ss;
    printMnemonic(ss, "", false);
    printIntReg(ss, op1);
    ccprintf(ss, ", ");
    printIntReg(ss, op2);
    ccprintf(ss, ", #%d", defCc);
    ccprintf(ss, ", ");
    printCondition(ss, condCode, true);
    return ss.str();
}
std :: string FpCondCompRegOp :: generateDisassembly ( Addr pc , const loader :: SymbolTable * symtab ) const { std :: stringstream ss ; printMnemonic ( ss , " " , false ) ; printIntReg ( ss , op1 ) ; ccprintf ( ss , " " ) ; printIntReg ( ss , op2 ) ; ccprintf ( ss , " " , defCc ) ; ccprintf ( ss , " " ) ; printCondition ( ss , condCode , true ) ; return ss . str ( ) ; }
The asm statements below are to keep gcc from reordering code.
The asm statements below are to keep gcc from reordering code .