src/cpu/cpu.cc
/*
 * Executes the next cycle in the cpu emulation using the cpu structures.
 *
 * Assumes that there is at least one cycle in the state queue.
 */
Executes the next cycle in the cpu emulation using the cpu structures.
Assumes that there is at least one cycle in the state queue.
Executes the next cycle in the cpu emulation using the cpu structures . Assumes that there is at least one cycle in the state queue .
void Cpu::RunCycle(void) {
  if (dma_cycles_remaining_ > 0) {
    ExecuteDma();
    cycle_even_ = !cycle_even_;
    return;
  }
  if (CanPoll()) {
    irq_ready_ = (irq_ready_ || irq_level_) && !(regs_->p & P_FLAG_I);
  }
  RunOperation();
  PollNmiLine();
  PollIrqLine();
  cycle_even_ = !cycle_even_;
  return;
}
void Cpu :: RunCycle ( void ) { if ( dma_cycles_remaining_ > 0 ) { ExecuteDma ( ) ; cycle_even_ = ! cycle_even_ ; return ; } if ( CanPoll ( ) ) { irq_ready_ = ( irq_ready_ || irq_level_ ) && ! ( regs_ -> p & P_FLAG_I ) ; } RunOperation ( ) ; PollNmiLine ( ) ; PollIrqLine ( ) ; cycle_even_ = ! cycle_even_ ; return ; }
Executes the next cycle in the cpu emulation using the cpu structures.
Executes the next cycle in the cpu emulation using the cpu structures .
// Check if the CPU is suspended and executing a DMA. // Poll the interrupt detectors, if it is time to do so. // irq_ready should only be reset from a fetch call handling it // or from interrupts being blocked. // Fetch and run the next micro instructions for the cycle. // Poll the interrupt lines and update the detectors. // Toggle the cycle evenness.