apps/hardware_benchmarks/hw_support/coreir_interpret.cpp
// This sets each input for the coreir simulator before testing.
// Returns if a wire for output valid is found.
This sets each input for the coreir simulator before testing.
Returns if a wire for output valid is found.
This sets each input for the coreir simulator before testing . Returns if a wire for output valid is found .
bool reset_coreir_circuit(SimulatorState &state, Module *m) {
  auto self_conxs = m->getDef()->sel("self")->getLocalConnections();
  set<string> visited_connections;
  bool uses_valid = false;
  for (auto wireable_pair : self_conxs) {
    string port_name = wireable_pair.first->toString();
    Type* port_type = wireable_pair.first->getType();
    if (visited_connections.count(port_name) > 0) {
      continue;
    }
    visited_connections.insert(port_name);
    if (port_name == "self.valid") {
      cout << "image is using output valid" << endl;
      uses_valid = true;
    }
    if ("self.clk" == port_name) {
      state.setClock(port_name, 0, 1);
      cout << "reset clock " << port_name << endl;
    } else if (port_type->isOutput()) {
      if (port_name.find("[") != string::npos) {
        string port_name_wo_index = port_name.substr(0, port_name.find("["));
        state.setValue(port_name_wo_index, BitVector(1));
        cout << "reset " << port_name << " as indexed port "
             << port_name_wo_index << " with size 1" << endl;
      } else {
        auto port_output = static_cast<BitType*>(port_type);
        uint type_bitwidth = port_output->getSize();
        state.setValue(port_name, BitVector(type_bitwidth));
        cout << "reset " << port_name << " with size " << type_bitwidth << endl;
      }
    }
  }
  return uses_valid;
}
bool reset_coreir_circuit ( SimulatorState & state , Module * m ) { auto self_conxs = m -> getDef ( ) -> sel ( " " ) -> getLocalConnections ( ) ; set < string > visited_connections ; bool uses_valid = false ; for ( auto wireable_pair : self_conxs ) { string port_name = wireable_pair . first -> toString ( ) ; Type * port_type = wireable_pair . first -> getType ( ) ; if ( visited_connections . count ( port_name ) > 0 ) { continue ; } visited_connections . insert ( port_name ) ; if ( port_name == " " ) { cout << " " << endl ; uses_valid = true ; } if ( " " == port_name ) { state . setClock ( port_name , 0 , 1 ) ; cout << " " << port_name << endl ; } else if ( port_type -> isOutput ( ) ) { if ( port_name . find ( " " ) != string :: npos ) { string port_name_wo_index = port_name . substr ( 0 , port_name . find ( " " ) ) ; state . setValue ( port_name_wo_index , BitVector ( 1 ) ) ; cout << " " << port_name << " " << port_name_wo_index << " " << endl ; } else { auto port_output = static_cast < BitType * > ( port_type ) ; uint type_bitwidth = port_output -> getSize ( ) ; state . setValue ( port_name , BitVector ( type_bitwidth ) ) ; cout << " " << port_name << " " << type_bitwidth << endl ; } } } return uses_valid ; }
This sets each input for the coreir simulator before testing.
This sets each input for the coreir simulator before testing .
//cout << wireable_pair.first->toString() << " is connected to " << wireable_pair.second->toString() << endl; // only process each connection once // identify the valid signal