third_party/virtualbox/src/VBox/Devices/Network/DevE1000.cpp
/**
 * Handle 4 byte sized and aligned register write operation.
 *
 * Looks up and calls appropriate handler.
 *
 * @returns VBox status code.
 *
 * @param   pThis       The device state structure.
 * @param   offReg      Register offset in memory-mapped frame.
 * @param   u32Value    The value to write.
 * @thread  EMT
 */
Handle 4 byte sized and aligned register write operation.
Looks up and calls appropriate handler.

@returns VBox status code.

@param   pThis       The device state structure.
@param   offReg      Register offset in memory-mapped frame.
@param   u32Value    The value to write.
@thread  EMT
Handle 4 byte sized and aligned register write operation . Looks up and calls appropriate handler . @returns VBox status code . @param pThis The device state structure . @param offReg Register offset in memory - mapped frame . @param u32Value The value to write . @thread EMT
static int e1kRegWriteAlignedU32(PE1KSTATE pThis, uint32_t offReg, uint32_t u32Value)
{
    int         rc    = VINF_SUCCESS;
    int         index = e1kRegLookup(offReg);
    if (RT_LIKELY(index != -1))
    {
        RT_UNTRUSTED_VALIDATED_FENCE(); 
        if (RT_LIKELY(g_aE1kRegMap[index].writable))
        {
            Log6(("%s At %08X write          %08X  to  %s (%s)\n",
                     pThis->szPrf, offReg, u32Value, g_aE1kRegMap[index].abbrev, g_aE1kRegMap[index].name));
            rc = g_aE1kRegMap[index].pfnWrite(pThis, offReg, index, u32Value);
        }
        else
            E1kLog(("%s At %08X write attempt (%08X) to  read-only register %s (%s)\n",
                    pThis->szPrf, offReg, u32Value, g_aE1kRegMap[index].abbrev, g_aE1kRegMap[index].name));
        if (IOM_SUCCESS(rc))
            STAM_COUNTER_INC(&pThis->aStatRegWrites[index]);
    }
    else
        E1kLog(("%s At %08X write attempt (%08X) to  non-existing register\n",
                pThis->szPrf, offReg, u32Value));
    return rc;
}
static int e1kRegWriteAlignedU32 ( PE1KSTATE pThis , uint32_t offReg , uint32_t u32Value ) { int rc = VINF_SUCCESS ; int index = e1kRegLookup ( offReg ) ; if ( RT_LIKELY ( index != -1 ) ) { RT_UNTRUSTED_VALIDATED_FENCE ( ) ; if ( RT_LIKELY ( g_aE1kRegMap [ index ] . writable ) ) { Log6 ( ( " \n " , pThis -> szPrf , offReg , u32Value , g_aE1kRegMap [ index ] . abbrev , g_aE1kRegMap [ index ] . name ) ) ; rc = g_aE1kRegMap [ index ] . pfnWrite ( pThis , offReg , index , u32Value ) ; } else E1kLog ( ( " \n " , pThis -> szPrf , offReg , u32Value , g_aE1kRegMap [ index ] . abbrev , g_aE1kRegMap [ index ] . name ) ) ; if ( IOM_SUCCESS ( rc ) ) STAM_COUNTER_INC ( & pThis -> aStatRegWrites [ index ] ) ; } else E1kLog ( ( " \n " , pThis -> szPrf , offReg , u32Value ) ) ; return rc ; }
Handle 4 byte sized and aligned register write operation.
Handle 4 byte sized and aligned register write operation .
/* paranoia because of port I/O. */ /*
             * Write it. Pass the mask so the handler knows what has to be written.
             * Mask out irrelevant bits.
             */ //rc = e1kCsEnter(pThis, VERR_SEM_BUSY, RT_SRC_POS); //if (RT_UNLIKELY(rc != VINF_SUCCESS)) //    return rc; //pThis->fDelayInts = false; //pThis->iStatIntLost += pThis->iStatIntLostOne; //pThis->iStatIntLostOne = 0; //e1kCsLeave(pThis);