zircon/kernel/arch/x86/mmu.cc
/**
 * @brief  invalidate all TLB entries, including global entries
 */
@brief  invalidate all TLB entries, including global entries
@brief invalidate all TLB entries including global entries
static void x86_tlb_global_invalidate() {
  ulong cr4 = x86_get_cr4();
  if (likely(cr4 & X86_CR4_PGE)) {
    x86_set_cr4(cr4 & ~X86_CR4_PGE);
    x86_set_cr4(cr4);
  } else {
    x86_set_cr3(x86_get_cr3());
  }
}
static void x86_tlb_global_invalidate ( ) { ulong cr4 = x86_get_cr4 ( ) ; if ( likely ( cr4 & X86_CR4_PGE ) ) { x86_set_cr4 ( cr4 & ~ X86_CR4_PGE ) ; x86_set_cr4 ( cr4 ) ; } else { x86_set_cr3 ( x86_get_cr3 ( ) ) ; } }
@brief  invalidate all TLB entries, including global entries
@brief invalidate all TLB entries including global entries
/* See Intel 3A section 4.10.4.1 */