openfpga/src/fpga_spice/spice_mux.cpp
/***********************************************
 * Generate SPICE modules for all the unique
 * multiplexers in the FPGA device
 * Output to two SPICE netlists:
 * - A SPICE netlist contains all the primitive
 *   cells for build the routing multiplexers
 * - A SPICE netlist contains all the top-level
 *   module for routing multiplexers
 **********************************************/
Generate SPICE modules for all the unique
multiplexers in the FPGA device
Output to two SPICE netlists:
- A SPICE netlist contains all the primitive
cells for build the routing multiplexers
- A SPICE netlist contains all the top-level
module for routing multiplexers
Generate SPICE modules for all the unique multiplexers in the FPGA device Output to two SPICE netlists : - A SPICE netlist contains all the primitive cells for build the routing multiplexers - A SPICE netlist contains all the top - level module for routing multiplexers
int print_spice_submodule_muxes(NetlistManager& netlist_manager,
                                const ModuleManager& module_manager,
                                const MuxLibrary& mux_lib,
                                const CircuitLibrary& circuit_lib,
                                const std::string& submodule_dir) {
  int status = CMD_EXEC_SUCCESS;
  status = print_spice_submodule_mux_primitives(netlist_manager, module_manager,
                                                mux_lib, circuit_lib, submodule_dir);
  if (CMD_EXEC_FATAL_ERROR == status) {
    return status;
  }
  status = print_spice_submodule_mux_top_subckt(netlist_manager, module_manager,
                                                mux_lib, circuit_lib, submodule_dir);
  if (CMD_EXEC_FATAL_ERROR == status) {
    return status;
  }
  return status;
}
int print_spice_submodule_muxes ( NetlistManager & netlist_manager , const ModuleManager & module_manager , const MuxLibrary & mux_lib , const CircuitLibrary & circuit_lib , const std :: string & submodule_dir ) { int status = CMD_EXEC_SUCCESS ; status = print_spice_submodule_mux_primitives ( netlist_manager , module_manager , mux_lib , circuit_lib , submodule_dir ) ; if ( CMD_EXEC_FATAL_ERROR == status ) { return status ; } status = print_spice_submodule_mux_top_subckt ( netlist_manager , module_manager , mux_lib , circuit_lib , submodule_dir ) ; if ( CMD_EXEC_FATAL_ERROR == status ) { return status ; } return status ; }
Generate SPICE modules for all the unique
 multiplexers in the FPGA device
 Output to two SPICE netlists:
 - A SPICE netlist contains all the primitive
   cells for build the routing multiplexers
 - A SPICE netlist contains all the top-level
   module for routing multiplexers
Generate SPICE modules for all the unique multiplexers in the FPGA device Output to two SPICE netlists : - A SPICE netlist contains all the primitive cells for build the routing multiplexers - A SPICE netlist contains all the top - level module for routing multiplexers