openfpga/src/fpga_sdc/sdc_hierarchy_writer.cpp
/********************************************************************
 * Recursively write the hierarchy of pb_type and its instances to a plain text file
 * e.g.,
 *    <sdc_file_for_the_module>
 *      <module_name>/<instance_name>
 *        ...
 * This file is mainly used by hierarchical P&R flow 
 *******************************************************************/
Recursively write the hierarchy of pb_type and its instances to a plain text file
e.g.,

/

This file is mainly used by hierarchical P&R flow
Recursively write the hierarchy of pb_type and its instances to a plain text file e . g . / This file is mainly used by hierarchical P&R flow
static 
void rec_print_pnr_sdc_grid_pb_graph_hierarchy(std::fstream& fp,
                                               const size_t& depth,
                                               const ModuleManager& module_manager,
                                               const ModuleId& parent_pb_module,
                                               const VprDeviceAnnotation& device_annotation,
                                               t_pb_graph_node* parent_pb_graph_node) {
  VTR_ASSERT(true == valid_file_stream(fp));
  if (nullptr == parent_pb_graph_node) {
    VTR_LOGF_ERROR(__FILE__, __LINE__,
                   "Invalid parent_pb_graph_node.\n");
    exit(1);
  }
  t_pb_type* parent_pb_type = parent_pb_graph_node->pb_type;
  std::string pb_module_name = generate_physical_block_module_name(parent_pb_type);
  ModuleId pb_module = module_manager.find_module(pb_module_name);
  VTR_ASSERT(true == module_manager.valid_module_id(pb_module));
  write_space_to_file(fp, depth * 2);
  fp << "- " << pb_module_name << ":" << "\n";
  for (const size_t& instance_id : module_manager.child_module_instances(parent_pb_module, pb_module)) {
    std::string child_instance_name = module_manager.instance_name(parent_pb_module, pb_module, instance_id);
    write_space_to_file(fp, depth * 2);
    fp << "  ";
    fp << "- " << child_instance_name;  
    if (true == is_primitive_pb_type(parent_pb_type)) {
      fp << "\n";
      return;
    }
    fp << ":" << "\n";
    t_mode* physical_mode = device_annotation.physical_mode(parent_pb_type);  
    for (int ipb = 0; ipb < physical_mode->num_pb_type_children; ++ipb) {
      for (int jpb = 0; jpb < physical_mode->pb_type_children[ipb].num_pb; ++jpb) {
        rec_print_pnr_sdc_grid_pb_graph_hierarchy(fp,
                                                  depth + 2,
                                                  module_manager, 
                                                  pb_module,
                                                  device_annotation,
                                                  &(parent_pb_graph_node->child_pb_graph_nodes[physical_mode->index][ipb][jpb]));
      }
    }
  } 
}
static void rec_print_pnr_sdc_grid_pb_graph_hierarchy ( std :: fstream & fp , const size_t & depth , const ModuleManager & module_manager , const ModuleId & parent_pb_module , const VprDeviceAnnotation & device_annotation , t_pb_graph_node * parent_pb_graph_node ) { VTR_ASSERT ( true == valid_file_stream ( fp ) ) ; if ( nullptr == parent_pb_graph_node ) { VTR_LOGF_ERROR ( __FILE__ , __LINE__ , " \n " ) ; exit ( 1 ) ; } t_pb_type * parent_pb_type = parent_pb_graph_node -> pb_type ; std :: string pb_module_name = generate_physical_block_module_name ( parent_pb_type ) ; ModuleId pb_module = module_manager . find_module ( pb_module_name ) ; VTR_ASSERT ( true == module_manager . valid_module_id ( pb_module ) ) ; write_space_to_file ( fp , depth * 2 ) ; fp << " " << pb_module_name << " " << " \n " ; for ( const size_t & instance_id : module_manager . child_module_instances ( parent_pb_module , pb_module ) ) { std :: string child_instance_name = module_manager . instance_name ( parent_pb_module , pb_module , instance_id ) ; write_space_to_file ( fp , depth * 2 ) ; fp << " " ; fp << " " << child_instance_name ; if ( true == is_primitive_pb_type ( parent_pb_type ) ) { fp << " \n " ; return ; } fp << " " << " \n " ; t_mode * physical_mode = device_annotation . physical_mode ( parent_pb_type ) ; for ( int ipb = 0 ; ipb < physical_mode -> num_pb_type_children ; ++ ipb ) { for ( int jpb = 0 ; jpb < physical_mode -> pb_type_children [ ipb ] . num_pb ; ++ jpb ) { rec_print_pnr_sdc_grid_pb_graph_hierarchy ( fp , depth + 2 , module_manager , pb_module , device_annotation , & ( parent_pb_graph_node -> child_pb_graph_nodes [ physical_mode -> index ] [ ipb ] [ jpb ] ) ) ; } } } }
Recursively write the hierarchy of pb_type and its instances to a plain text file
 e.g.,
    <sdc_file_for_the_module>
      <module_name>/<instance_name>
        ...
Recursively write the hierarchy of pb_type and its instances to a plain text file e . g . <sdc_file_for_the_module > <module_name > / <instance_name > ...
/* Validate the file stream */ /* Validate pb_graph node */ /* Get the pb_type */ /* Find the pb module in module manager */ /* Go through all the instance */ /* Note we only go through the graph through the physical modes. 
     * which we build the modules 
     */ /* Go recursively to the lower level in the pb_graph
     * Note that we assume a full hierarchical P&R, we will only visit pb_graph_node of unique pb_type 
     */