libopenfpga/libarchopenfpga/src/check_circuit_library.cpp
/************************************************************************
 * Check the port requirements for a power-gated circuit model 
 * - It must have at least 2 global ports and which are config enable signals
 * - It must have an Enable port which control power gating 
 * - It must have an EnableB port which control power gating 
 ***********************************************************************/
Check the port requirements for a power-gated circuit model
- It must have at least 2 global ports and which are config enable signals
- It must have an Enable port which control power gating
- It must have an EnableB port which control power gating
Check the port requirements for a power - gated circuit model - It must have at least 2 global ports and which are config enable signals - It must have an Enable port which control power gating - It must have an EnableB port which control power gating
static 
int check_power_gated_circuit_model(const CircuitLibrary& circuit_lib,
                                    const CircuitModelId& circuit_model) {
  int num_err = 0;
  std::vector<CircuitPortId> global_ports = circuit_lib.model_global_ports_by_type(circuit_model, CIRCUIT_MODEL_PORT_INPUT, true, true);
  VTR_ASSERT(true == circuit_lib.is_power_gated(circuit_model));
  if (2 > global_ports.size())  {
    VTR_LOGF_ERROR(__FILE__, __LINE__,
                   "Expect at least two global ports (a pair of EN/Enb) for circuit model '%s' which is power-gated!\n",
                   circuit_lib.model_name(circuit_model).c_str()); 
    num_err++;
  }
  int num_config_enable_ports = 0;
  for (const auto& port : global_ports) {
    if (true == circuit_lib.port_is_config_enable(port)) {
      num_config_enable_ports++;
    }
  }
  if (2 != num_config_enable_ports) {
    VTR_LOGF_ERROR(__FILE__, __LINE__,
                   "Circuit model '%s' is power-gated. Two config-enable global ports are required!\n",
                   circuit_lib.model_name(circuit_model).c_str()); 
    num_err++;
  }
  if (0 < num_err) {
    return num_err;
  }
  CircuitPortId en_port = CircuitPortId::INVALID();
  CircuitPortId enb_port = CircuitPortId::INVALID();
  for (const auto& port : global_ports) {
    if (false == circuit_lib.port_is_config_enable(port)) {
      continue;
    }
    if (0 == circuit_lib.port_default_value(port)) {
      en_port = port;
    } else {
      VTR_ASSERT(1 == circuit_lib.port_default_value(port));
      enb_port = port;
    }
  }
  if (false == circuit_lib.valid_circuit_port_id(en_port)) {
    VTR_LOGF_ERROR(__FILE__, __LINE__,
                   "Fail to find an enable port for the circuit model '%s' is power-gated!\n",
                   circuit_lib.model_name(circuit_model).c_str()); 
  }
  if (false == circuit_lib.valid_circuit_port_id(enb_port)) {
    VTR_LOGF_ERROR(__FILE__, __LINE__,
                   "Fail to find an inverted enable port for the circuit model '%s' is power-gated!\n",
                   circuit_lib.model_name(circuit_model).c_str()); 
  }
  return num_err;
}
static int check_power_gated_circuit_model ( const CircuitLibrary & circuit_lib , const CircuitModelId & circuit_model ) { int num_err = 0 ; std :: vector < CircuitPortId > global_ports = circuit_lib . model_global_ports_by_type ( circuit_model , CIRCUIT_MODEL_PORT_INPUT , true , true ) ; VTR_ASSERT ( true == circuit_lib . is_power_gated ( circuit_model ) ) ; if ( 2 > global_ports . size ( ) ) { VTR_LOGF_ERROR ( __FILE__ , __LINE__ , " \n " , circuit_lib . model_name ( circuit_model ) . c_str ( ) ) ; num_err ++ ; } int num_config_enable_ports = 0 ; for ( const auto & port : global_ports ) { if ( true == circuit_lib . port_is_config_enable ( port ) ) { num_config_enable_ports ++ ; } } if ( 2 != num_config_enable_ports ) { VTR_LOGF_ERROR ( __FILE__ , __LINE__ , " \n " , circuit_lib . model_name ( circuit_model ) . c_str ( ) ) ; num_err ++ ; } if ( 0 < num_err ) { return num_err ; } CircuitPortId en_port = CircuitPortId :: INVALID ( ) ; CircuitPortId enb_port = CircuitPortId :: INVALID ( ) ; for ( const auto & port : global_ports ) { if ( false == circuit_lib . port_is_config_enable ( port ) ) { continue ; } if ( 0 == circuit_lib . port_default_value ( port ) ) { en_port = port ; } else { VTR_ASSERT ( 1 == circuit_lib . port_default_value ( port ) ) ; enb_port = port ; } } if ( false == circuit_lib . valid_circuit_port_id ( en_port ) ) { VTR_LOGF_ERROR ( __FILE__ , __LINE__ , " \n " , circuit_lib . model_name ( circuit_model ) . c_str ( ) ) ; } if ( false == circuit_lib . valid_circuit_port_id ( enb_port ) ) { VTR_LOGF_ERROR ( __FILE__ , __LINE__ , " \n " , circuit_lib . model_name ( circuit_model ) . c_str ( ) ) ; } return num_err ; }
Check the port requirements for a power-gated circuit model
 - It must have at least 2 global ports and which are config enable signals
 - It must have an Enable port which control power gating
 - It must have an EnableB port which control power gating
Check the port requirements for a power - gated circuit model - It must have at least 2 global ports and which are config enable signals - It must have an Enable port which control power gating - It must have an EnableB port which control power gating
/* If the circuit model is power-gated, we need to find at least one global config_enable signals */ /* Check all the ports we have are good for a power-gated circuit model */ /* We need at least one global port */ /* All the global ports should be config_enable */ /* Report errors if there are any */ /* Try to find a pair of Enable and ENb ports from the global ports */ /* Focus on config_enable ports which are power-gate control signals */ /* We must have valid EN/ENb ports */