src/dev/net/ns_gige.cc
/* writing this interrupt counting stats inside this means that this function
   is now limited to being used to clear all interrupts upon the kernel
   reading isr and servicing.  just telling you in case you were thinking
   of expanding use.
*/
writing this interrupt counting stats inside this means that this function
is now limited to being used to clear all interrupts upon the kernel
reading isr and servicing.  just telling you in case you were thinking
of expanding use.
writing this interrupt counting stats inside this means that this function is now limited to being used to clear all interrupts upon the kernel reading isr and servicing . just telling you in case you were thinking of expanding use .
void
NSGigE::devIntrClear(uint32_t interrupts)
{
    if (interrupts & ISR_RESERVE)
        panic("Cannot clear a reserved interrupt");
    if (regs.isr & regs.imr & ISR_SWI) {
        etherDeviceStats.postedSwi++;
    }
    if (regs.isr & regs.imr & ISR_RXIDLE) {
        etherDeviceStats.postedRxIdle++;
    }
    if (regs.isr & regs.imr & ISR_RXOK) {
        etherDeviceStats.postedRxOk++;
    }
    if (regs.isr & regs.imr & ISR_RXDESC) {
        etherDeviceStats.postedRxDesc++;
    }
    if (regs.isr & regs.imr & ISR_TXOK) {
        etherDeviceStats.postedTxOk++;
    }
    if (regs.isr & regs.imr & ISR_TXIDLE) {
        etherDeviceStats.postedTxIdle++;
    }
    if (regs.isr & regs.imr & ISR_TXDESC) {
        etherDeviceStats.postedTxDesc++;
    }
    if (regs.isr & regs.imr & ISR_RXORN) {
        etherDeviceStats.postedRxOrn++;
    }
    interrupts &= ~ISR_NOIMPL;
    regs.isr &= ~interrupts;
    DPRINTF(EthernetIntr,
            "interrupt cleared from ISR: intr=%x isr=%x imr=%x\n",
            interrupts, regs.isr, regs.imr);
    if (!(regs.isr & regs.imr))
        cpuIntrClear();
}
void NSGigE :: devIntrClear ( uint32_t interrupts ) { if ( interrupts & ISR_RESERVE ) panic ( " " ) ; if ( regs . isr & regs . imr & ISR_SWI ) { etherDeviceStats . postedSwi ++ ; } if ( regs . isr & regs . imr & ISR_RXIDLE ) { etherDeviceStats . postedRxIdle ++ ; } if ( regs . isr & regs . imr & ISR_RXOK ) { etherDeviceStats . postedRxOk ++ ; } if ( regs . isr & regs . imr & ISR_RXDESC ) { etherDeviceStats . postedRxDesc ++ ; } if ( regs . isr & regs . imr & ISR_TXOK ) { etherDeviceStats . postedTxOk ++ ; } if ( regs . isr & regs . imr & ISR_TXIDLE ) { etherDeviceStats . postedTxIdle ++ ; } if ( regs . isr & regs . imr & ISR_TXDESC ) { etherDeviceStats . postedTxDesc ++ ; } if ( regs . isr & regs . imr & ISR_RXORN ) { etherDeviceStats . postedRxOrn ++ ; } interrupts &= ~ ISR_NOIMPL ; regs . isr &= ~ interrupts ; DPRINTF ( EthernetIntr , " \n " , interrupts , regs . isr , regs . imr ) ; if ( ! ( regs . isr & regs . imr ) ) cpuIntrClear ( ) ; }
writing this interrupt counting stats inside this means that this function
is now limited to being used to clear all interrupts upon the kernel
reading isr and servicing.
writing this interrupt counting stats inside this means that this function is now limited to being used to clear all interrupts upon the kernel reading isr and servicing .