openfpga/src/fpga_sdc/analysis_sdc_grid_writer.cpp
/********************************************************************
 * Disable unused input ports and output ports of this pb_graph_node (parent_module) 
 * This function will iterate over all the input pins, output pins
 * of the physical_pb_graph_node, and check if they are mapped
 * For unused pins, we will find the port in parent_module
 * and then print SDC commands to disable them
 *******************************************************************/
Disable unused input ports and output ports of this pb_graph_node (parent_module)
This function will iterate over all the input pins, output pins
of the physical_pb_graph_node, and check if they are mapped
For unused pins, we will find the port in parent_module
and then print SDC commands to disable them
Disable unused input ports and output ports of this pb_graph_node ( parent_module ) This function will iterate over all the input pins output pins of the physical_pb_graph_node and check if they are mapped For unused pins we will find the port in parent_module and then print SDC commands to disable them
static
void disable_pb_graph_node_unused_pins(std::fstream& fp, 
                                       const ModuleManager& module_manager,
                                       const ModuleId& parent_module,
                                       const std::string& hierarchy_name,
                                       t_pb_graph_node* physical_pb_graph_node,
                                       const PhysicalPb& physical_pb) {
  const PhysicalPbId& pb_id = physical_pb.find_pb(physical_pb_graph_node);
  VTR_ASSERT(true == physical_pb.valid_pb_id(pb_id));
  fp << "#######################################" << std::endl; 
  fp << "# Disable unused pins for pb_graph_node " << physical_pb_graph_node->pb_type->name << "[" << physical_pb_graph_node->placement_index << "]" << std::endl;
  fp << "#######################################" << std::endl; 
  for (int iport = 0; iport < physical_pb_graph_node->num_input_ports; ++iport) {
    for (int ipin = 0; ipin < physical_pb_graph_node->num_input_pins[iport]; ++ipin) {
      disable_pb_graph_node_unused_pin(fp, module_manager, parent_module,
                                       hierarchy_name,
                                       &(physical_pb_graph_node->input_pins[iport][ipin]),
                                       physical_pb, pb_id);
    }
  }
  for (int iport = 0; iport < physical_pb_graph_node->num_output_ports; ++iport) {
    for (int ipin = 0; ipin < physical_pb_graph_node->num_output_pins[iport]; ++ipin) {
      disable_pb_graph_node_unused_pin(fp, module_manager, parent_module,
                                       hierarchy_name,
                                       &(physical_pb_graph_node->output_pins[iport][ipin]),
                                       physical_pb, pb_id);
    }
  }
  for (int iport = 0; iport < physical_pb_graph_node->num_clock_ports; ++iport) {
    for (int ipin = 0; ipin < physical_pb_graph_node->num_clock_pins[iport]; ++ipin) {
      disable_pb_graph_node_unused_pin(fp, module_manager, parent_module,
                                       hierarchy_name,
                                       &(physical_pb_graph_node->clock_pins[iport][ipin]),
                                       physical_pb, pb_id);
    }
  }
}
static void disable_pb_graph_node_unused_pins ( std :: fstream & fp , const ModuleManager & module_manager , const ModuleId & parent_module , const std :: string & hierarchy_name , t_pb_graph_node * physical_pb_graph_node , const PhysicalPb & physical_pb ) { const PhysicalPbId & pb_id = physical_pb . find_pb ( physical_pb_graph_node ) ; VTR_ASSERT ( true == physical_pb . valid_pb_id ( pb_id ) ) ; fp << " " << std :: endl ; fp << " " << physical_pb_graph_node -> pb_type -> name << " " << physical_pb_graph_node -> placement_index << " " << std :: endl ; fp << " " << std :: endl ; for ( int iport = 0 ; iport < physical_pb_graph_node -> num_input_ports ; ++ iport ) { for ( int ipin = 0 ; ipin < physical_pb_graph_node -> num_input_pins [ iport ] ; ++ ipin ) { disable_pb_graph_node_unused_pin ( fp , module_manager , parent_module , hierarchy_name , & ( physical_pb_graph_node -> input_pins [ iport ] [ ipin ] ) , physical_pb , pb_id ) ; } } for ( int iport = 0 ; iport < physical_pb_graph_node -> num_output_ports ; ++ iport ) { for ( int ipin = 0 ; ipin < physical_pb_graph_node -> num_output_pins [ iport ] ; ++ ipin ) { disable_pb_graph_node_unused_pin ( fp , module_manager , parent_module , hierarchy_name , & ( physical_pb_graph_node -> output_pins [ iport ] [ ipin ] ) , physical_pb , pb_id ) ; } } for ( int iport = 0 ; iport < physical_pb_graph_node -> num_clock_ports ; ++ iport ) { for ( int ipin = 0 ; ipin < physical_pb_graph_node -> num_clock_pins [ iport ] ; ++ ipin ) { disable_pb_graph_node_unused_pin ( fp , module_manager , parent_module , hierarchy_name , & ( physical_pb_graph_node -> clock_pins [ iport ] [ ipin ] ) , physical_pb , pb_id ) ; } } }
Disable unused input ports and output ports of this pb_graph_node (parent_module)
 This function will iterate over all the input pins, output pins
 of the physical_pb_graph_node, and check if they are mapped
 For unused pins, we will find the port in parent_module
 and then print SDC commands to disable them
Disable unused input ports and output ports of this pb_graph_node ( parent_module ) This function will iterate over all the input pins output pins of the physical_pb_graph_node and check if they are mapped For unused pins we will find the port in parent_module and then print SDC commands to disable them
/* Disable unused input pins */ /* Disable unused output pins */ /* Disable unused clock pins */