openfpga/src/fpga_spice/spice_transistor_wrapper.cpp
/********************************************************************
 * Print a SPICE model wrapper for a transistor model
 *******************************************************************/
Print a SPICE model wrapper for a transistor model
Print a SPICE model wrapper for a transistor model
static 
int print_spice_transistor_model_wrapper(std::fstream& fp,
                                         const TechnologyLibrary& tech_lib,
                                         const TechnologyModelId& model) {
  if (false == valid_file_stream(fp)) {
    return CMD_EXEC_FATAL_ERROR;
  }
  for (int itype = TECH_LIB_TRANSISTOR_PMOS;
       itype < NUM_TECH_LIB_TRANSISTOR_TYPES;
       ++itype) {
    const e_tech_lib_transistor_type& trans_type = static_cast<e_tech_lib_transistor_type>(itype); 
    fp << ".subckt ";
    fp << tech_lib.transistor_model_name(model, trans_type) << TRANSISTOR_WRAPPER_POSTFIX; 
    fp << " drain gate source bulk";
    fp << " L=" << std::setprecision(10) << tech_lib.transistor_model_chan_length(model, trans_type); 
    fp << " W=" << std::setprecision(10) << tech_lib.transistor_model_min_width(model, trans_type); 
    fp << "\n";
    fp << tech_lib.model_ref(model);
    fp << "1";
    fp << " drain gate source bulk";
    fp << " " << tech_lib.transistor_model_name(model, trans_type);
    fp << " L=L W=W";
    fp << "\n";
    fp << ".ends";
    fp << "\n";
  }
  return CMD_EXEC_SUCCESS;
}
static int print_spice_transistor_model_wrapper ( std :: fstream & fp , const TechnologyLibrary & tech_lib , const TechnologyModelId & model ) { if ( false == valid_file_stream ( fp ) ) { return CMD_EXEC_FATAL_ERROR ; } for ( int itype = TECH_LIB_TRANSISTOR_PMOS ; itype < NUM_TECH_LIB_TRANSISTOR_TYPES ; ++ itype ) { const e_tech_lib_transistor_type & trans_type = static_cast < e_tech_lib_transistor_type > ( itype ) ; fp << " " ; fp << tech_lib . transistor_model_name ( model , trans_type ) << TRANSISTOR_WRAPPER_POSTFIX ; fp << " " ; fp << " " << std :: setprecision ( 10 ) << tech_lib . transistor_model_chan_length ( model , trans_type ) ; fp << " " << std :: setprecision ( 10 ) << tech_lib . transistor_model_min_width ( model , trans_type ) ; fp << " \n " ; fp << tech_lib . model_ref ( model ) ; fp << " " ; fp << " " ; fp << " " << tech_lib . transistor_model_name ( model , trans_type ) ; fp << " " ; fp << " \n " ; fp << " " ; fp << " \n " ; } return CMD_EXEC_SUCCESS ; }
Print a SPICE model wrapper for a transistor model
Print a SPICE model wrapper for a transistor model
/* Transistor model followed a fixed port mapping
   * [X|M]<MODEL_CARD_NAME> <DRAIN> <GATE> <SOURCE> <BULK> 
   * which is a standard in SPICE modeling
   * We will output the pmos and nmos transistors wrappers
   * which are defined in this model
   */