Lib/Target/instr/Instr.cpp
/**
 * Determine the accumulators used in this instruction
 *
 * There is no distinguishing dst and src here.
 *
 * @return bitfield with the bits set for used accumulators,
 *         bit 0 == ACC0, bit 1 == ACC1 etc.
 *
 * ============================================================================
 * NOTES
 * =====
 *
 *
 * 1. Somewhat of a hack: LI for v3d can potentially use r0 and r1, flag as used here.
 *    See encode_int_immediate() and convert_int_powers() in v3d KernelDriver. 
 *    This could be further specified.
 *
 *    Better would be to:
 *     - Flag usage accs in v3d instruction generation
 *     - Allow more flexibility in v3d instruction generation to select accs
 *     - Don't use accs at all there, but that needs a way to select rf-regs during v3d generation
 *
 *    A bit unhappy about this, but it's necessary to prevent.
 *    Another brilliant idea (ie use accs in v3d instructions) which is turning out to be a brain fart.
 */
Determine the accumulators used in this instruction
There is no distinguishing dst and src here.

@return bitfield with the bits set for used accumulators,
bit 0 == ACC0, bit 1 == ACC1 etc.

NOTES



1. Somewhat of a hack: LI for v3d can potentially use r0 and r1, flag as used here.

Better would be to:
- Flag usage accs in v3d instruction generation
- Allow more flexibility in v3d instruction generation to select accs
- Don't use accs at all there, but that needs a way to select rf-regs during v3d generation

A bit unhappy about this, but it's necessary to prevent.
Another brilliant idea  which is turning out to be a brain fart.
Determine the accumulators used in this instruction There is no distinguishing dst and src here . @return bitfield with the bits set for used accumulators bit 0 == ACC0 bit 1 == ACC1 etc . NOTES 1 . Somewhat of a hack : LI for v3d can potentially use r0 and r1 flag as used here . Better would be to : - Flag usage accs in v3d instruction generation - Allow more flexibility in v3d instruction generation to select accs - Don ' t use accs at all there but that needs a way to select rf - regs during v3d generation A bit unhappy about this but it ' s necessary to prevent . Another brilliant idea which is turning out to be a brain fart .
uint32_t Instr::get_acc_usage() const {
  uint32_t ret = 0;
  switch (tag) {
    case InstrTag::LI:  
      if (dest().tag == ACC) {
        ret |=  (1 << dest().regId);
      }
      if (!Platform::compiling_for_vc4()) {  
        ret |= 3;  
      }
      break;
    case InstrTag::ALU:  
      if (dest().tag == ACC) {
        ret |=  (1 << dest().regId);
      }
      if (ALU.srcA.is_reg() && ALU.srcA.reg().tag == ACC) {
        ret |=  (1 << ALU.srcA.reg().regId);
      }
      if (ALU.srcB.is_reg() && ALU.srcB.reg().tag == ACC) {
        ret |=  (1 << ALU.srcB.reg().regId);
      }
      if (ALU.op == ALUOp::A_FSIN) {
        if (!Platform::compiling_for_vc4()) {
          assertq((ret & (1 << 4)) == 0, "get_acc_usage(): Not really expecting r4 to be already in use for sin");
          ret |=  (1 << 4);
        }
      }
      break;
    case InstrTag::RECV:
      if (dest().tag == ACC) {
        ret |=  (1 << dest().regId);
      }
      break;
    default:
      break;
  }
  if (!Platform::compiling_for_vc4()) {
    if (isRot()) {
      ret |= 3;
    }
  }
  return ret;
}
uint32_t Instr :: get_acc_usage ( ) const { uint32_t ret = 0 ; switch ( tag ) { case InstrTag :: LI : if ( dest ( ) . tag == ACC ) { ret |= ( 1 << dest ( ) . regId ) ; } if ( ! Platform :: compiling_for_vc4 ( ) ) { ret |= 3 ; } break ; case InstrTag :: ALU : if ( dest ( ) . tag == ACC ) { ret |= ( 1 << dest ( ) . regId ) ; } if ( ALU . srcA . is_reg ( ) && ALU . srcA . reg ( ) . tag == ACC ) { ret |= ( 1 << ALU . srcA . reg ( ) . regId ) ; } if ( ALU . srcB . is_reg ( ) && ALU . srcB . reg ( ) . tag == ACC ) { ret |= ( 1 << ALU . srcB . reg ( ) . regId ) ; } if ( ALU . op == ALUOp :: A_FSIN ) { if ( ! Platform :: compiling_for_vc4 ( ) ) { assertq ( ( ret & ( 1 << 4 ) ) == 0 , " " ) ; ret |= ( 1 << 4 ) ; } } break ; case InstrTag :: RECV : if ( dest ( ) . tag == ACC ) { ret |= ( 1 << dest ( ) . regId ) ; } break ; default : break ; } if ( ! Platform :: compiling_for_vc4 ( ) ) { if ( isRot ( ) ) { ret |= 3 ; } } return ret ; }
Determine the accumulators used in this instruction
 There is no distinguishing dst and src here.
Determine the accumulators used in this instruction There is no distinguishing dst and src here .
// Load immediate // See Note 1. //debug("LI block acc0 and acc1"); // ALU operation // NOTE: dst/srcA/srcB can be same acc // SIN using special reg always returns result in r4 // ACC 0 and 1 are used rot v3d, add // dst r1 and src r0 might be explicitly set beforehand, this is fine. // Generation of rot-instruction checks for this