src/memory/mappers/std_banked.cc
/*
 * Writes a value to the given address, accounting for MMIO.
 *
 * Assumes that Connect has been called on valid Cpu/Ppu/Apu classes for this
 * memory class.
 */
Writes a value to the given address, accounting for MMIO.
Assumes that Connect has been called on valid Cpu/Ppu/Apu classes for this
memory class.
Writes a value to the given address accounting for MMIO . Assumes that Connect has been called on valid Cpu / Ppu / Apu classes for this memory class .
void StdBanked::Write(DoubleWord addr, DataWord val) {
  bus_ = val;
  if (addr < PPU_OFFSET) {
    ram_[addr & RAM_MASK] = val;
  } else if ((PPU_OFFSET <= addr) && (addr < IO_OFFSET)) {
    ppu_->Write(addr, val);
  } else if ((IO_OFFSET <= addr) && (addr < MAPPER_OFFSET)) {
    if (addr == CPU_DMA_ADDR) {
      cpu_->StartDma(val);
    } else if (addr == IO_JOY1_ADDR) {
      controller_->Write(addr, val);
    } else {
      apu_->Write(addr, val);
    }
  } else if ((BAT_OFFSET <= addr) && (addr < BANK_OFFSET)) {
    bat_[addr & BAT_MASK] = val;
  } else if ((addr >= BANK_OFFSET) && bank_mask_) {
    current_bank_ = val & bank_mask_;
  }
  return;
}
void StdBanked :: Write ( DoubleWord addr , DataWord val ) { bus_ = val ; if ( addr < PPU_OFFSET ) { ram_ [ addr & RAM_MASK ] = val ; } else if ( ( PPU_OFFSET <= addr ) && ( addr < IO_OFFSET ) ) { ppu_ -> Write ( addr , val ) ; } else if ( ( IO_OFFSET <= addr ) && ( addr < MAPPER_OFFSET ) ) { if ( addr == CPU_DMA_ADDR ) { cpu_ -> StartDma ( val ) ; } else if ( addr == IO_JOY1_ADDR ) { controller_ -> Write ( addr , val ) ; } else { apu_ -> Write ( addr , val ) ; } } else if ( ( BAT_OFFSET <= addr ) && ( addr < BANK_OFFSET ) ) { bat_ [ addr & BAT_MASK ] = val ; } else if ( ( addr >= BANK_OFFSET ) && bank_mask_ ) { current_bank_ = val & bank_mask_ ; } return ; }
Writes a value to the given address, accounting for MMIO.
Writes a value to the given address accounting for MMIO .
// Put the value being written on the bus. // Detect where in memory we need to access and do so. // Write to standard RAM. // Write to the MMIO for the PPU. // Write to the general MMIO space. // Write to the WRAM/Battery of the cart. // Writing to the cart area uses the low bits to select a bank. // This is disabled when the bank mask is 0.