build/X86_MESI_Two_Level/mem/protocol/L2Cache_Controller.cc
/** \brief Profile the demand miss */
\brief Profile the demand miss
\ brief Profile the demand miss
void
L2Cache_Controller::uu_profileMiss(L2Cache_TBE*& m_tbe_ptr, L2Cache_Entry*& m_cache_entry_ptr, Addr addr, int core_id)
{
    DPRINTF(RubyGenerated, "executing uu_profileMiss\n");
    try {
       (++ ((*m_L2cache_ptr)).m_demand_misses);
DPRINTF(MTRACEMICRO17, "MESI_Two_Level-L2cache.sm:798: Time:%lld, Addr: %#x\n", (curCycle()), addr);
    } catch (const RejectException & e) {
       fatal("Error in action L2Cache:uu_profileMiss: "
             "executed a peek statement with the wrong message "
             "type specified. ");
    }
}
void L2Cache_Controller :: uu_profileMiss ( L2Cache_TBE * & m_tbe_ptr , L2Cache_Entry * & m_cache_entry_ptr , Addr addr , int core_id ) { DPRINTF ( RubyGenerated , " \n " ) ; try { ( ++ ( ( * m_L2cache_ptr ) ) . m_demand_misses ) ; DPRINTF ( MTRACEMICRO17 , " \n " , ( curCycle ( ) ) , addr ) ; } catch ( const RejectException & e ) { fatal ( " " " " " " ) ; } }
\brief Profile the demand miss
\ brief Profile the demand miss
//fanyao added core_id