openfpga/src/utils/lut_utils.cpp
/********************************************************************
 * Convert a truth table to strings, which are ready to be printed out
 *******************************************************************/
Convert a truth table to strings, which are ready to be printed out
Convert a truth table to strings which are ready to be printed out
std::vector<std::string> truth_table_to_string(const AtomNetlist::TruthTable& tt) { 
  std::vector<std::string> tt_str;
  for (auto row : tt) {
    std::string row_str;
    for (size_t i = 0; i < row.size(); ++i) {
      if (i == row.size() - 1) {
        row_str += std::string(" ");
      }
      switch (row[i]) {
        case vtr::LogicValue::TRUE:
          row_str += std::string("1");
          break;
        case vtr::LogicValue::FALSE:
          row_str += std::string("0");
          break;
        case vtr::LogicValue::DONT_CARE:
          row_str += std::string("-");
          break;
        default:
          VTR_ASSERT_MSG(false, "Valid single-output cover logic value");
      }
    }
    tt_str.push_back(row_str);
  }
  return tt_str;
}
std :: vector < std :: string > truth_table_to_string ( const AtomNetlist :: TruthTable & tt ) { std :: vector < std :: string > tt_str ; for ( auto row : tt ) { std :: string row_str ; for ( size_t i = 0 ; i < row . size ( ) ; ++ i ) { if ( i == row . size ( ) - 1 ) { row_str += std :: string ( " " ) ; } switch ( row [ i ] ) { case vtr :: LogicValue :: TRUE : row_str += std :: string ( " " ) ; break ; case vtr :: LogicValue :: FALSE : row_str += std :: string ( " " ) ; break ; case vtr :: LogicValue :: DONT_CARE : row_str += std :: string ( " " ) ; break ; default : VTR_ASSERT_MSG ( false , " " ) ; } } tt_str . push_back ( row_str ) ; } return tt_str ; }
Convert a truth table to strings, which are ready to be printed out
Convert a truth table to strings which are ready to be printed out
/* Add a gap between inputs and outputs */