openfpga/src/fpga_spice/spice_lut.cpp
/******************************************************************** 
 * Print SPICE modules for the Look-Up Tables (LUTs) 
 * in the circuit library
 ********************************************************************/
Print SPICE modules for the Look-Up Tables (LUTs)
in the circuit library
Print SPICE modules for the Look - Up Tables ( LUTs ) in the circuit library
int print_spice_submodule_luts(NetlistManager& netlist_manager,
                               const ModuleManager& module_manager,
                               const CircuitLibrary& circuit_lib,
                               const std::string& submodule_dir) {
  int status = CMD_EXEC_SUCCESS;
  std::string spice_fname = submodule_dir + std::string(LUTS_SPICE_FILE_NAME);
  std::fstream fp;
  fp.open(spice_fname, std::fstream::out | std::fstream::trunc);
  check_file_stream(spice_fname.c_str(), fp); 
  VTR_LOG("Writing SPICE netlist for LUTs '%s'...",
          spice_fname.c_str()); 
  print_spice_file_header(fp, "Look-Up Tables"); 
  for (const auto& lut_model : circuit_lib.models()) {
    if ( (!circuit_lib.model_spice_netlist(lut_model).empty()) 
      || (CIRCUIT_MODEL_LUT != circuit_lib.model_type(lut_model)) ) {
      continue;
    }
    ModuleId lut_module = module_manager.find_module(circuit_lib.model_name(lut_model));
    VTR_ASSERT(true == module_manager.valid_module_id(lut_module));
    write_spice_subckt_to_file(fp, module_manager, lut_module);
  }
  fp.close();
  NetlistId nlist_id = netlist_manager.add_netlist(spice_fname);
  VTR_ASSERT(NetlistId::INVALID() != nlist_id);
  netlist_manager.set_netlist_type(nlist_id, NetlistManager::SUBMODULE_NETLIST);
  VTR_LOG("Done\n");
  return status;
}
int print_spice_submodule_luts ( NetlistManager & netlist_manager , const ModuleManager & module_manager , const CircuitLibrary & circuit_lib , const std :: string & submodule_dir ) { int status = CMD_EXEC_SUCCESS ; std :: string spice_fname = submodule_dir + std :: string ( LUTS_SPICE_FILE_NAME ) ; std :: fstream fp ; fp . open ( spice_fname , std :: fstream :: out | std :: fstream :: trunc ) ; check_file_stream ( spice_fname . c_str ( ) , fp ) ; VTR_LOG ( " " , spice_fname . c_str ( ) ) ; print_spice_file_header ( fp , " " ) ; for ( const auto & lut_model : circuit_lib . models ( ) ) { if ( ( ! circuit_lib . model_spice_netlist ( lut_model ) . empty ( ) ) || ( CIRCUIT_MODEL_LUT != circuit_lib . model_type ( lut_model ) ) ) { continue ; } ModuleId lut_module = module_manager . find_module ( circuit_lib . model_name ( lut_model ) ) ; VTR_ASSERT ( true == module_manager . valid_module_id ( lut_module ) ) ; write_spice_subckt_to_file ( fp , module_manager , lut_module ) ; } fp . close ( ) ; NetlistId nlist_id = netlist_manager . add_netlist ( spice_fname ) ; VTR_ASSERT ( NetlistId :: INVALID ( ) != nlist_id ) ; netlist_manager . set_netlist_type ( nlist_id , NetlistManager :: SUBMODULE_NETLIST ) ; VTR_LOG ( " \n " ) ; return status ; }
Print SPICE modules for the Look-Up Tables (LUTs)
 in the circuit library
Print SPICE modules for the Look - Up Tables ( LUTs ) in the circuit library
/* Create the file stream */ /* Check if the file stream if valid or not */ /* Create file */ /* Search for each LUT circuit model */ /* Bypass user-defined and non-LUT modules */ /* Find the module id */ /* Close the file handler */ /* Add fname to the netlist name list */