drivers/arm/gic/arm_gic.c
/*******************************************************************************
 * This function does some minimal GICv3 configuration when cores go
 * down.
 ******************************************************************************/
This function does some minimal GICv3 configuration when cores go
down.
This function does some minimal GICv3 configuration when cores go down .
static void gicv3_cpuif_deactivate(void)
{
	unsigned int val;
	uintptr_t base;
	assert(g_gicr_base);
	base = gicv3_get_rdist(g_gicr_base, read_mpidr());
	if (base == (uintptr_t)NULL) {
		panic();
	}
	val = gicr_read_waker(base);
	val |= WAKER_PS;
	gicr_write_waker(base, val);
	dsb();
	val = gicr_read_waker(base);
	while ((val & WAKER_CA) == 0)
		val = gicr_read_waker(base);
}
static void gicv3_cpuif_deactivate ( void ) { unsigned int val ; uintptr_t base ; assert ( g_gicr_base ) ; base = gicv3_get_rdist ( g_gicr_base , read_mpidr ( ) ) ; if ( base == ( uintptr_t ) NULL ) { panic ( ) ; } val = gicr_read_waker ( base ) ; val |= WAKER_PS ; gicr_write_waker ( base , val ) ; dsb ( ) ; val = gicr_read_waker ( base ) ; while ( ( val & WAKER_CA ) == 0 ) val = gicr_read_waker ( base ) ; }
This function does some minimal GICv3 configuration when cores go
 down.
This function does some minimal GICv3 configuration when cores go down .
/*
	 * When taking CPUs down we need to set GICR_WAKER.ProcessorSleep and
	 * wait for GICR_WAKER.ChildrenAsleep to get set.
	 * (GICv3 Architecture specification 5.4.23).
	 * GICR_WAKER is NOT banked per CPU, compute the correct base address
	 * per CPU.
	 */ /* No re-distributor base address. This interface cannot be
		 * configured.
		 */ /* We need to wait for ChildrenAsleep to set. */