sys/dev/drm/radeon/radeon_fence.c
/**
 * radeon_fence_driver_start_ring - make the fence driver
 * ready for use on the requested ring.
 *
 * @rdev: radeon device pointer
 * @ring: ring index to start the fence driver on
 *
 * Make the fence driver ready for processing (all asics).
 * Not all asics have all rings, so each asic will only
 * start the fence driver on the rings it has.
 * Returns 0 for success, errors for failure.
 */
make the fence driver
ready for use on the requested ring.

@rdev: radeon device pointer
@ring: ring index to start the fence driver on

Make the fence driver ready for processing (all asics).
Not all asics have all rings, so each asic will only
start the fence driver on the rings it has.
Returns 0 for success, errors for failure.
make the fence driver ready for use on the requested ring . @rdev : radeon device pointer @ring : ring index to start the fence driver on Make the fence driver ready for processing ( all asics ) . Not all asics have all rings so each asic will only start the fence driver on the rings it has . Returns 0 for success errors for failure .
int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
{
	uint64_t index;
	int r;
	radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
	if (rdev->wb.use_event || !radeon_ring_supports_scratch_reg(rdev, &rdev->ring[ring])) {
		rdev->fence_drv[ring].scratch_reg = 0;
		index = R600_WB_EVENT_OFFSET + ring * 4;
	} else {
		r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
		if (r) {
			dev_err(rdev->dev, "fence failed to get scratch register\n");
			return r;
		}
		index = RADEON_WB_SCRATCH_OFFSET +
			rdev->fence_drv[ring].scratch_reg -
			rdev->scratch.reg_base;
	}
	rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
	rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
	radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring);
	rdev->fence_drv[ring].initialized = true;
	dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016jx and cpu addr 0x%p\n",
		 ring, (uintmax_t)rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
	return 0;
}
int radeon_fence_driver_start_ring ( struct radeon_device * rdev , int ring ) { uint64_t index ; int r ; radeon_scratch_free ( rdev , rdev -> fence_drv [ ring ] . scratch_reg ) ; if ( rdev -> wb . use_event || ! radeon_ring_supports_scratch_reg ( rdev , & rdev -> ring [ ring ] ) ) { rdev -> fence_drv [ ring ] . scratch_reg = 0 ; index = R600_WB_EVENT_OFFSET + ring * 4 ; } else { r = radeon_scratch_get ( rdev , & rdev -> fence_drv [ ring ] . scratch_reg ) ; if ( r ) { dev_err ( rdev -> dev , " \n " ) ; return r ; } index = RADEON_WB_SCRATCH_OFFSET + rdev -> fence_drv [ ring ] . scratch_reg - rdev -> scratch . reg_base ; } rdev -> fence_drv [ ring ] . cpu_addr = & rdev -> wb . wb [ index / 4 ] ; rdev -> fence_drv [ ring ] . gpu_addr = rdev -> wb . gpu_addr + index ; radeon_fence_write ( rdev , atomic64_read ( & rdev -> fence_drv [ ring ] . last_seq ) , ring ) ; rdev -> fence_drv [ ring ] . initialized = true ; dev_info ( rdev -> dev , " \n " , ring , ( uintmax_t ) rdev -> fence_drv [ ring ] . gpu_addr , rdev -> fence_drv [ ring ] . cpu_addr ) ; return 0 ; }
radeon_fence_driver_start_ring - make the fence driver
 ready for use on the requested ring.
radeon_fence_driver_start_ring - make the fence driver ready for use on the requested ring .