arch/arm/src/lpc17xx/lpc17_ethernet.c
/****************************************************************************
 * Function: lpc17_ifup
 *
 * Description:
 *   NuttX Callback: Bring up the Ethernet interface when an IP address is
 *   provided
 *
 * Parameters:
 *   dev  - Reference to the NuttX driver state structure
 *
 * Returned Value:
 *   None
 *
 * Assumptions:
 *
 ****************************************************************************/
lpc17_ifup
Description:
NuttX Callback: Bring up the Ethernet interface when an IP address is
provided

dev  - Reference to the NuttX driver state structure

Returned Value:
None


lpc17_ifup Description : NuttX Callback : Bring up the Ethernet interface when an IP address is provided dev - Reference to the NuttX driver state structure Returned Value : None
static int lpc17_ifup(struct net_driver_s *dev)
{
  struct lpc17_driver_s *priv = (struct lpc17_driver_s *)dev->d_private;
  uint32_t regval;
  int ret;
  ndbg("Bringing up: %d.%d.%d.%d\n",
       dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
       (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
  lpc17_ethreset(priv);
  ret = lpc17_phyinit(priv);
  if (ret != 0)
    {
      ndbg("lpc17_phyinit failed: %d\n", ret);
      return ret;
    }
  regval = (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[5] << 8 |
           (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[4];
  lpc17_putreg(regval, LPC17_ETH_SA0);
  regval = (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[3] << 8 |
           (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[2];
  lpc17_putreg(regval, LPC17_ETH_SA1);
  regval = (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[1] << 8 |
           (uint32_t)priv->lp_dev.d_mac.ether_addr_octet[0];
  lpc17_putreg(regval, LPC17_ETH_SA2);
#ifdef CONFIG_NET_ICMPv6
  lpc17_ipv6multicast(priv);
#endif
  lpc17_macmode(priv->lp_mode);
  lpc17_txdescinit(priv);
  lpc17_rxdescinit(priv);
  regval = lpc17_getreg(LPC17_ETH_MAC1);
  regval |= ETH_MAC1_PARF;
  lpc17_putreg(regval, LPC17_ETH_MAC1);
  regval = ETH_RXFLCTRL_PERFEN | ETH_RXFLCTRL_BCASTEN;
#ifdef CONFIG_NET_MULTICAST
  regval |= (ETH_RXFLCTRL_MCASTEN | ETH_RXFLCTRL_UCASTEN);
#endif
#ifdef CONFIG_NET_HASH
  regval |= (ETH_RXFLCTRL_MCASTHASHEN | ETH_RXFLCTRL_UCASTHASHEN);
#endif
  lpc17_putreg(regval, LPC17_ETH_RXFLCTRL);
  lpc17_putreg(0xffffffff, LPC17_ETH_INTCLR);
#ifdef CONFIG_ARCH_IRQPRIO
#if CONFIG_LPC17_NINTERFACES > 1
  (void)up_prioritize_irq(priv->irq, CONFIG_NET_PRIORITY);
#else
  (void)up_prioritize_irq(LPC17_IRQ_ETH, CONFIG_NET_PRIORITY);
#endif
#endif
#ifdef CONFIG_NET_WOL
  lpc17_putreg(0xffffffff, LPC17_ETH_RXFLWOLCLR);
  lpc17_putreg(ETH_RXFLCTRL_RXFILEN, LPC17_ETH_RXFLCTRL);
  priv->lp_inten = ETH_INT_WKUP;
  lpc17_putreg(ETH_INT_WKUP, LPC17_ETH_INTEN);
#else
  priv->lp_inten = ETH_RXINTS;
  lpc17_putreg(ETH_RXINTS, LPC17_ETH_INTEN);
#endif
  regval  = lpc17_getreg(LPC17_ETH_CMD);
  regval |= ETH_CMD_RXEN;
  lpc17_putreg(regval, LPC17_ETH_CMD);
  regval  = lpc17_getreg(LPC17_ETH_MAC1);
  regval |= ETH_MAC1_RE;
  lpc17_putreg(regval, LPC17_ETH_MAC1);
  regval  = lpc17_getreg(LPC17_ETH_CMD);
  regval |= ETH_CMD_TXEN;
  lpc17_putreg(regval, LPC17_ETH_CMD);
  (void)wd_start(priv->lp_txpoll, LPC17_WDDELAY, lpc17_poll_expiry, 1,
                (uint32_t)priv);
  priv->lp_ifup = true;
#if CONFIG_LPC17_NINTERFACES > 1
  up_enable_irq(priv->irq);
#else
  up_enable_irq(LPC17_IRQ_ETH);
#endif
  return OK;
}
static int lpc17_ifup ( struct net_driver_s * dev ) { struct lpc17_driver_s * priv = ( struct lpc17_driver_s * ) dev -> d_private ; uint32_t regval ; int ret ; ndbg ( " \n " , dev -> d_ipaddr & 0xff , ( dev -> d_ipaddr >> 8 ) & 0xff , ( dev -> d_ipaddr >> 16 ) & 0xff , dev -> d_ipaddr >> 24 ) ; lpc17_ethreset ( priv ) ; ret = lpc17_phyinit ( priv ) ; if ( ret != 0 ) { ndbg ( " \n " , ret ) ; return ret ; } regval = ( uint32_t ) priv -> lp_dev . d_mac . ether_addr_octet [ 5 ] << 8 | ( uint32_t ) priv -> lp_dev . d_mac . ether_addr_octet [ 4 ] ; lpc17_putreg ( regval , LPC17_ETH_SA0 ) ; regval = ( uint32_t ) priv -> lp_dev . d_mac . ether_addr_octet [ 3 ] << 8 | ( uint32_t ) priv -> lp_dev . d_mac . ether_addr_octet [ 2 ] ; lpc17_putreg ( regval , LPC17_ETH_SA1 ) ; regval = ( uint32_t ) priv -> lp_dev . d_mac . ether_addr_octet [ 1 ] << 8 | ( uint32_t ) priv -> lp_dev . d_mac . ether_addr_octet [ 0 ] ; lpc17_putreg ( regval , LPC17_ETH_SA2 ) ; #ifdef CONFIG_NET_ICMPv6 lpc17_ipv6multicast ( priv ) ; #endif lpc17_macmode ( priv -> lp_mode ) ; lpc17_txdescinit ( priv ) ; lpc17_rxdescinit ( priv ) ; regval = lpc17_getreg ( LPC17_ETH_MAC1 ) ; regval |= ETH_MAC1_PARF ; lpc17_putreg ( regval , LPC17_ETH_MAC1 ) ; regval = ETH_RXFLCTRL_PERFEN | ETH_RXFLCTRL_BCASTEN ; #ifdef CONFIG_NET_MULTICAST regval |= ( ETH_RXFLCTRL_MCASTEN | ETH_RXFLCTRL_UCASTEN ) ; #endif #ifdef CONFIG_NET_HASH regval |= ( ETH_RXFLCTRL_MCASTHASHEN | ETH_RXFLCTRL_UCASTHASHEN ) ; #endif lpc17_putreg ( regval , LPC17_ETH_RXFLCTRL ) ; lpc17_putreg ( 0xffffffff , LPC17_ETH_INTCLR ) ; #ifdef CONFIG_ARCH_IRQPRIO #if CONFIG_LPC17_NINTERFACES > 1 ( void ) up_prioritize_irq ( priv -> irq , CONFIG_NET_PRIORITY ) ; #else ( void ) up_prioritize_irq ( LPC17_IRQ_ETH , CONFIG_NET_PRIORITY ) ; #endif #endif #ifdef CONFIG_NET_WOL lpc17_putreg ( 0xffffffff , LPC17_ETH_RXFLWOLCLR ) ; lpc17_putreg ( ETH_RXFLCTRL_RXFILEN , LPC17_ETH_RXFLCTRL ) ; priv -> lp_inten = ETH_INT_WKUP ; lpc17_putreg ( ETH_INT_WKUP , LPC17_ETH_INTEN ) ; #else priv -> lp_inten = ETH_RXINTS ; lpc17_putreg ( ETH_RXINTS , LPC17_ETH_INTEN ) ; #endif regval = lpc17_getreg ( LPC17_ETH_CMD ) ; regval |= ETH_CMD_RXEN ; lpc17_putreg ( regval , LPC17_ETH_CMD ) ; regval = lpc17_getreg ( LPC17_ETH_MAC1 ) ; regval |= ETH_MAC1_RE ; lpc17_putreg ( regval , LPC17_ETH_MAC1 ) ; regval = lpc17_getreg ( LPC17_ETH_CMD ) ; regval |= ETH_CMD_TXEN ; lpc17_putreg ( regval , LPC17_ETH_CMD ) ; ( void ) wd_start ( priv -> lp_txpoll , LPC17_WDDELAY , lpc17_poll_expiry , 1 , ( uint32_t ) priv ) ; priv -> lp_ifup = true ; #if CONFIG_LPC17_NINTERFACES > 1 up_enable_irq ( priv -> irq ) ; #else up_enable_irq ( LPC17_IRQ_ETH ) ; #endif return OK ; }
Function: lpc17_ifup
 Description:
   NuttX Callback: Bring up the Ethernet interface when an IP address is
   provided
Function : lpc17_ifup Description : NuttX Callback : Bring up the Ethernet interface when an IP address is provided
/* Reset the Ethernet controller (again) */ /* Initialize the PHY and wait for the link to be established */ /* Configure the MAC station address */ /* Set up the IPv6 multicast address */ /* Initialize Ethernet interface for the PHY setup */ /* Initialize EMAC DMA memory -- descriptors, status, packet buffers, etc. */ /* Configure to pass all received frames */ /* Set up RX filter and configure to accept broadcast addresses, multicast
   * addresses, and perfect station address matches.  We should also accept
   * perfect matches and, most likely, broadcast (for example, for ARP requests).
   * Other RX filter options will only be enabled if so selected.  NOTE: There
   * is a selection CONFIG_NET_BROADCAST, but this enables receipt of UDP
   * broadcast packets inside of the stack.
   */ /* Clear any pending interrupts (shouldn't be any) */ /* Configure interrupts.  The Ethernet interrupt was attached during one-time
   * initialization, so we only need to set the interrupt priority, configure
   * interrupts, and enable them.
   */ /* Set the interrupt to the highest priority */ /* Enable Ethernet interrupts.  The way we do this depends on whether or
   * not Wakeup on Lan (WoL) has been configured.
   */ /* Configure WoL: Clear all receive filter WoLs and enable the perfect
   * match WoL interrupt.  We will wait until the Wake-up to finish
   * bringing things up.
   */ /* Otherwise, enable all Rx interrupts.  Tx interrupts, SOFTINT and WoL are
   * excluded.  Tx interrupts will not be enabled until there is data to be
   * sent.
   */ /* Enable Rx. "Enabling of the receive function is located in two places.
   * The receive DMA manager needs to be enabled and the receive data path
   * of the MAC needs to be enabled. To prevent overflow in the receive
   * DMA engine the receive DMA engine should be enabled by setting the
   * RxEnable bit in the Command register before enabling the receive data
   * path in the MAC by setting the RECEIVE ENABLE bit in the MAC1 register."
   */ /* Enable Tx */ /* Set and activate a timer process */ /* Finally, make the interface up and enable the Ethernet interrupt at
   * the interrupt controller
   */