abc/src/map/fpga/fpgaCut.c
/**Function*************************************************************

  Synopsis    [Computes the cuts for each node in the object graph.]

  Description [The cuts are computed in one sweep over the mapping graph. 
  First, the elementary cuts, which include the node itself, are assigned 
  to the PI nodes. The internal nodes are considered in the DFS order.
  Each node is two-input AND-gate. So to compute the cuts at a node, we
  need to merge the sets of cuts of its two predecessors. The merged set
  contains only unique cuts with the number of inputs equal to k or less.
  Finally, the elementary cut, composed of the node itself, is added to
  the set of cuts for the node.
  
  This procedure is pretty fast for 5-feasible cuts, but it dramatically
  slows down on some "dense" networks when computing 6-feasible cuts.
  The problem is that there are too many cuts in this case. We should
  think how to heuristically trim the number of cuts in such cases, 
  to have reasonable runtime.]
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
Function
Synopsis    [Computes the cuts for each node in the object graph.]

Description [The cuts are computed in one sweep over the mapping graph.
First, the elementary cuts, which include the node itself, are assigned
to the PI nodes. The internal nodes are considered in the DFS order.
Each node is two-input AND-gate. So to compute the cuts at a node, we
need to merge the sets of cuts of its two predecessors. The merged set
contains only unique cuts with the number of inputs equal to k or less.
Finally, the elementary cut, composed of the node itself, is added to
the set of cuts for the node.

This procedure is pretty fast for 5-feasible cuts, but it dramatically
slows down on some "dense" networks when computing 6-feasible cuts.
The problem is that there are too many cuts in this case. We should
think how to heuristically trim the number of cuts in such cases,
to have reasonable runtime.]




Function Synopsis [ Computes the cuts for each node in the object graph . ] Description [ The cuts are computed in one sweep over the mapping graph . First the elementary cuts which include the node itself are assigned to the PI nodes . The internal nodes are considered in the DFS order . Each node is two - input AND - gate . So to compute the cuts at a node we need to merge the sets of cuts of its two predecessors . The merged set contains only unique cuts with the number of inputs equal to k or less . Finally the elementary cut composed of the node itself is added to the set of cuts for the node . This procedure is pretty fast for 5 - feasible cuts but it dramatically slows down on some " dense " networks when computing 6 - feasible cuts . The problem is that there are too many cuts in this case . We should think how to heuristically trim the number of cuts in such cases to have reasonable runtime . ]
void Fpga_MappingCuts( Fpga_Man_t * p )
{
    ProgressBar * pProgress;
    Fpga_CutTable_t * pTable;
    Fpga_Node_t * pNode;
    int nCuts, nNodes, i;
    clock_t clk = clock();
    assert( p->nVarsMax > 1 && p->nVarsMax < 11 );
    Fpga_MappingCreatePiCuts( p );
    nNodes = p->vAnds->nSize;
    pProgress = Extra_ProgressBarStart( stdout, nNodes );
    pTable = Fpga_CutTableStart( p );
    for ( i = 0; i < nNodes; i++ )
    {
        Extra_ProgressBarUpdate( pProgress, i, "Cuts ..." );
        pNode = p->vAnds->pArray[i];
        if ( !Fpga_NodeIsAnd( pNode ) )
            continue;
        Fpga_CutCompute( p, pTable, pNode );
    }
    Extra_ProgressBarStop( pProgress );
    Fpga_CutTableStop( pTable );
    if ( p->fVerbose )
    {
        nCuts = Fpga_CutCountAll(p);
        printf( "Nodes = %6d. Total %d-cuts = %d. Cuts per node = %.1f. ", 
               p->nNodes, p->nVarsMax, nCuts, ((float)nCuts)/p->nNodes );
        ABC_PRT( "Time", clock() - clk );
    }
}
void Fpga_MappingCuts ( Fpga_Man_t * p ) { ProgressBar * pProgress ; Fpga_CutTable_t * pTable ; Fpga_Node_t * pNode ; int nCuts , nNodes , i ; clock_t clk = clock ( ) ; assert ( p -> nVarsMax > 1 && p -> nVarsMax < 11 ) ; Fpga_MappingCreatePiCuts ( p ) ; nNodes = p -> vAnds -> nSize ; pProgress = Extra_ProgressBarStart ( stdout , nNodes ) ; pTable = Fpga_CutTableStart ( p ) ; for ( i = 0 ; i < nNodes ; i ++ ) { Extra_ProgressBarUpdate ( pProgress , i , " " ) ; pNode = p -> vAnds -> pArray [ i ] ; if ( ! Fpga_NodeIsAnd ( pNode ) ) continue ; Fpga_CutCompute ( p , pTable , pNode ) ; } Extra_ProgressBarStop ( pProgress ) ; Fpga_CutTableStop ( pTable ) ; if ( p -> fVerbose ) { nCuts = Fpga_CutCountAll ( p ) ; printf ( " " , p -> nNodes , p -> nVarsMax , nCuts , ( ( float ) nCuts ) / p -> nNodes ) ; ABC_PRT ( " " , clock ( ) - clk ) ; } }
Function
Synopsis    [Computes the cuts for each node in the object graph.]
Function Synopsis [ Computes the cuts for each node in the object graph . ]
// set the elementary cuts for the PI variables // compute the cuts for the internal nodes // report the stats // print the cuts for the first primary output //    Fpga_CutListPrint( p, Fpga_Regular(p->pOutputs[0]) );