Platform/ECM3532/DSP/hw/csp/ecm3532/src/eta_csp_spi.c
/***************************************************************************/
/**
 *
 *  EtaCspSpiProcessIntRxData - Process SPI Interrupt for RX Data Available
 *
 ******************************************************************************/
Process SPI Interrupt for RX Data Available
Process SPI Interrupt for RX Data Available
tEtaStatus
EtaCspSpiProcessIntRxData()
{
    uint8_t ui8SpaceInFifo;
    uint16_t ui16RxWord;
    if((gsSpiCmd.bCmdActive == 0) ||
       (gsSpiCmd.ui16RxLen == 0))
    {
        return(eEtaSpiCmdSequenceErr);
    }
    if(ETA_CSP_SPI_EN_GREEDY_INT) 
    {
        ui8SpaceInFifo =
            (REG_SPI2_RX_FIFO_DEBUG & BM_SPI2_RX_FIFO_DEBUG_ENTRIES);
    }
    else
    {
        ui8SpaceInFifo = gsSpiCmd.ui8RxIntSize; 
    }
    do
    {
        if(ui8SpaceInFifo >= 2)
        {
            ui16RxWord = REG_SPI2_TXRX_2BYTE_FIFO_DATA;
            *gsSpiCmd.pui8RxData++ = ((ui16RxWord >> 0) & 0xff);
            *gsSpiCmd.pui8RxData++ = ((ui16RxWord >> 8) & 0xff);
            gsSpiCmd.ui16RxLen -= 2;
            ui8SpaceInFifo -= 2;
        }
        else if(ui8SpaceInFifo >= 1)
        {
            ui16RxWord = REG_SPI2_TXRX_1BYTE_FIFO_DATA;
            *gsSpiCmd.pui8RxData++ = ((ui16RxWord >> 0) & 0xff);
            gsSpiCmd.ui16RxLen--;
            ui8SpaceInFifo--;
        }
        if((ui8SpaceInFifo < 2) & (gsSpiCmd.ui16RxLen >= 2))
        {
            break; 
        }
        if(gsSpiCmd.ui16RxLen == 0)
        {
            break; 
        }
    }
    while(ui8SpaceInFifo);
    if(gsSpiCmd.ui16RxLen == 0) 
    {
        REG_SPI2_INT_EN =
            (REG_SPI2_INT_EN & ~BM_SPI2_INT_EN_RX_FIFO_HIT_LEVEL_EN0);
    }
     RX length less than interrupt size.
    else if(gsSpiCmd.ui16RxLen < gsSpiCmd.ui8RxIntSize)
    {
        REG_SPI2_CONFIG = (REG_SPI2_CONFIG & ~BM_SPI2_CONFIG_FIFO_LEVEL_TRIG) |
                          (gsSpiCmd.ui16RxLen <<
                           BP_SPI2_CONFIG_FIFO_LEVEL_TRIG);
    }
    return(eEtaSuccess);
}
tEtaStatus EtaCspSpiProcessIntRxData ( ) { uint8_t ui8SpaceInFifo ; uint16_t ui16RxWord ; if ( ( gsSpiCmd . bCmdActive == 0 ) || ( gsSpiCmd . ui16RxLen == 0 ) ) { return ( eEtaSpiCmdSequenceErr ) ; } if ( ETA_CSP_SPI_EN_GREEDY_INT ) { ui8SpaceInFifo = ( REG_SPI2_RX_FIFO_DEBUG & BM_SPI2_RX_FIFO_DEBUG_ENTRIES ) ; } else { ui8SpaceInFifo = gsSpiCmd . ui8RxIntSize ; } do { if ( ui8SpaceInFifo >= 2 ) { ui16RxWord = REG_SPI2_TXRX_2BYTE_FIFO_DATA ; * gsSpiCmd . pui8RxData ++ = ( ( ui16RxWord >> 0 ) & 0xff ) ; * gsSpiCmd . pui8RxData ++ = ( ( ui16RxWord >> 8 ) & 0xff ) ; gsSpiCmd . ui16RxLen -= 2 ; ui8SpaceInFifo -= 2 ; } else if ( ui8SpaceInFifo >= 1 ) { ui16RxWord = REG_SPI2_TXRX_1BYTE_FIFO_DATA ; * gsSpiCmd . pui8RxData ++ = ( ( ui16RxWord >> 0 ) & 0xff ) ; gsSpiCmd . ui16RxLen -- ; ui8SpaceInFifo -- ; } if ( ( ui8SpaceInFifo < 2 ) & ( gsSpiCmd . ui16RxLen >= 2 ) ) { break ; } if ( gsSpiCmd . ui16RxLen == 0 ) { break ; } } while ( ui8SpaceInFifo ) ; if ( gsSpiCmd . ui16RxLen == 0 ) { REG_SPI2_INT_EN = ( REG_SPI2_INT_EN & ~ BM_SPI2_INT_EN_RX_FIFO_HIT_LEVEL_EN0 ) ; } else if ( gsSpiCmd . ui16RxLen < gsSpiCmd . ui8RxIntSize ) { REG_SPI2_CONFIG = ( REG_SPI2_CONFIG & ~ BM_SPI2_CONFIG_FIFO_LEVEL_TRIG ) | ( gsSpiCmd . ui16RxLen << BP_SPI2_CONFIG_FIFO_LEVEL_TRIG ) ; } return ( eEtaSuccess ) ; }
EtaCspSpiProcessIntRxData - Process SPI Interrupt for RX Data Available
EtaCspSpiProcessIntRxData - Process SPI Interrupt for RX Data Available
// This allows for burst writes, which is more // efficient, but not requires an extra read. // Do work that // interrupt said we // have space for // If we drop low enough that we cannot bulk transfer, exit // loop, wait for next int. // Exit loop, we're done. // Just sent last byte. Lets turn off // TX has space interrupt and send // dummy bytes // // RX length less than interrupt size. //