Platform/ECM3532/M3/hw/csp/ecm3532/m3/csp/src/eta_csp_m3.c
/***************************************************************************/
/**
 *
 *  EtaCspM3IntBaseLevel - Set Base Enable interrupts level in the M3.
 *
 *  @param iDisableLevel - disable interrupts with this priortiy level and up.
 *
 *  @note Does not support nesting.
 *
 ******************************************************************************/
Set Base Enable interrupts level in the M3.
@param iDisableLevel - disable interrupts with this priortiy level and up.

@note Does not support nesting.
Set Base Enable interrupts level in the M3 . @param iDisableLevel - disable interrupts with this priortiy level and up . @note Does not support nesting .
void
EtaCspM3IntBaseLevel(uint8_t iDisableLevel)
{
 Keil compiler
#ifdef __CC_ARM
  uint32_t ui32Temp;
  if( iDisableLevel == 0){
    __asm("  movs  ui32Temp,      #0x0");
    __asm("  msr   primask, ui32Temp");
  }
  else if( iDisableLevel == 1){
    __asm("  movs  ui32Temp,      #0x20");
    __asm("  msr   primask, ui32Temp");
  }
  else if( iDisableLevel == 2){
    __asm("  movs  ui32Temp,      #0x40");
    __asm("  msr   primask, ui32Temp");
  }
  else if( iDisableLevel == 3){
    __asm("  movs  ui32Temp,      #0x60");
    __asm("  msr   primask, ui32Temp");
  }
  else if( iDisableLevel == 4){
    __asm("  movs  ui32Temp,      #0x80");
    __asm("  msr   primask, ui32Temp");
  }
  else if( iDisableLevel == 5){
    __asm("  movs  ui32Temp,      #0xa0");
    __asm("  msr   primask, ui32Temp");
  }
  else if( iDisableLevel == 6){
    __asm("  movs  ui32Temp,      #0xc0");
    __asm("  msr   primask, ui32Temp");
  }
  else if( iDisableLevel == 7){
    __asm("  movs  ui32Temp,      #0xe0");
    __asm("  msr   primask, ui32Temp");
  }
 Everything else.
#else
  if( iDisableLevel == 0){
    __asm("    movs     r0,       #0x0\n"
          "    MSR      BASEPRI,  r0\n");
  }
  else if( iDisableLevel == 1){
    __asm("    movs     r0,       #0x20\n"
          "    MSR      BASEPRI,  r0\n");
  }
  else if( iDisableLevel == 2){
    __asm("    movs     r0,       #0x40\n"
          "    MSR      BASEPRI,  r0\n");
  }
  else if( iDisableLevel == 3){
    __asm("    movs     r0,       #0x60\n"
          "    MSR      BASEPRI,  r0\n");
  }
  else if( iDisableLevel == 4){
    __asm("    movs     r0,       #0x80\n"
          "    MSR      BASEPRI,  r0\n");
  }
  else if( iDisableLevel == 5){
    __asm("    movs     r0,       #0xa0\n"
          "    MSR      BASEPRI,  r0\n");
  }
  else if( iDisableLevel == 6){
    __asm("    movs     r0,       #0xc0\n"
          "    MSR      BASEPRI,  r0\n");
  }
  else if( iDisableLevel == 7){
    __asm("    movs     r0,       #0xe0\n"
          "    MSR      BASEPRI,  r0\n");
  }
#endif
}
void EtaCspM3IntBaseLevel ( uint8_t iDisableLevel ) { #ifdef __CC_ARM uint32_t ui32Temp ; if ( iDisableLevel == 0 ) { __asm ( " " ) ; __asm ( " " ) ; } else if ( iDisableLevel == 1 ) { __asm ( " " ) ; __asm ( " " ) ; } else if ( iDisableLevel == 2 ) { __asm ( " " ) ; __asm ( " " ) ; } else if ( iDisableLevel == 3 ) { __asm ( " " ) ; __asm ( " " ) ; } else if ( iDisableLevel == 4 ) { __asm ( " " ) ; __asm ( " " ) ; } else if ( iDisableLevel == 5 ) { __asm ( " " ) ; __asm ( " " ) ; } else if ( iDisableLevel == 6 ) { __asm ( " " ) ; __asm ( " " ) ; } else if ( iDisableLevel == 7 ) { __asm ( " " ) ; __asm ( " " ) ; } #else if ( iDisableLevel == 0 ) { __asm ( " \n " " \n " ) ; } else if ( iDisableLevel == 1 ) { __asm ( " \n " " \n " ) ; } else if ( iDisableLevel == 2 ) { __asm ( " \n " " \n " ) ; } else if ( iDisableLevel == 3 ) { __asm ( " \n " " \n " ) ; } else if ( iDisableLevel == 4 ) { __asm ( " \n " " \n " ) ; } else if ( iDisableLevel == 5 ) { __asm ( " \n " " \n " ) ; } else if ( iDisableLevel == 6 ) { __asm ( " \n " " \n " ) ; } else if ( iDisableLevel == 7 ) { __asm ( " \n " " \n " ) ; } #endif }
EtaCspM3IntBaseLevel - Set Base Enable interrupts level in the M3.
EtaCspM3IntBaseLevel - Set Base Enable interrupts level in the M3 .
// disable interrupts with priortiy level 1 and up ( 3 bits priority: levels 0-7); // Note: Shift the priority value left by (8-NVIC_PRI_BITS = 8-3 = 5) // // Keil compiler // // // Everything else. //