FreeBSD/sys/dev/isci/scil/scic_sds_controller.c
/**
 * @brief This method initializes the hardware completion queue.
 *
 * @param[in] this_controller
 */
@brief This method initializes the hardware completion queue.
@brief This method initializes the hardware completion queue .
void scic_sds_controller_initialize_completion_queue(
   SCIC_SDS_CONTROLLER_T *this_controller
)
{
   U32 index;
   U32 completion_queue_control_value;
   U32 completion_queue_get_value;
   U32 completion_queue_put_value;
   this_controller->completion_queue_get = 0;
   completion_queue_control_value = (
        SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
      | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
   );
   SMU_CQC_WRITE(this_controller, completion_queue_control_value);
   completion_queue_get_value = (
        (SMU_CQGR_GEN_VAL(POINTER, 0))
      | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
      | (SMU_CQGR_GEN_BIT(ENABLE))
      | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
   );
   SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
   this_controller->completion_queue_get = completion_queue_get_value;
   completion_queue_put_value = (
        (SMU_CQPR_GEN_VAL(POINTER, 0))
      | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
   );
   SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
   for (index = 0; index < this_controller->completion_queue_entries; index++)
   {
      this_controller->completion_queue[index] = 0x80000000;
   }
}
void scic_sds_controller_initialize_completion_queue ( SCIC_SDS_CONTROLLER_T * this_controller ) { U32 index ; U32 completion_queue_control_value ; U32 completion_queue_get_value ; U32 completion_queue_put_value ; this_controller -> completion_queue_get = 0 ; completion_queue_control_value = ( SMU_CQC_QUEUE_LIMIT_SET ( this_controller -> completion_queue_entries - 1 ) | SMU_CQC_EVENT_LIMIT_SET ( this_controller -> completion_event_entries - 1 ) ) ; SMU_CQC_WRITE ( this_controller , completion_queue_control_value ) ; completion_queue_get_value = ( ( SMU_CQGR_GEN_VAL ( POINTER , 0 ) ) | ( SMU_CQGR_GEN_VAL ( EVENT_POINTER , 0 ) ) | ( SMU_CQGR_GEN_BIT ( ENABLE ) ) | ( SMU_CQGR_GEN_BIT ( EVENT_ENABLE ) ) ) ; SMU_CQGR_WRITE ( this_controller , completion_queue_get_value ) ; this_controller -> completion_queue_get = completion_queue_get_value ; completion_queue_put_value = ( ( SMU_CQPR_GEN_VAL ( POINTER , 0 ) ) | ( SMU_CQPR_GEN_VAL ( EVENT_POINTER , 0 ) ) ) ; SMU_CQPR_WRITE ( this_controller , completion_queue_put_value ) ; for ( index = 0 ; index < this_controller -> completion_queue_entries ; index ++ ) { this_controller -> completion_queue [ index ] = 0x80000000 ; } }
@brief This method initializes the hardware completion queue.
@brief This method initializes the hardware completion queue .
// Set the completion queue get pointer and enable the queue // Set the completion queue put pointer // Initialize the cycle bit of the completion queue entries // If get.cycle_bit != completion_queue.cycle_bit // its not a valid completion queue entry // so at system start all entries are invalid