sys/dev/drm/i915/intel_ringbuffer.c
/**
 * gen6_add_request - Update the semaphore mailbox registers
 *
 * @request - request to write to the ring
 *
 * Update the mailbox registers in the *other* rings with the current seqno.
 * This acts like a signal in the canonical semaphore.
 */
Update the semaphore mailbox registers
@request - request to write to the ring

Update the mailbox registers in the *other* rings with the current seqno.
This acts like a signal in the canonical semaphore.
Update the semaphore mailbox registers @request - request to write to the ring Update the mailbox registers in the * other * rings with the current seqno . This acts like a signal in the canonical semaphore .
static int
gen6_add_request(struct drm_i915_gem_request *req)
{
	struct intel_engine_cs *engine = req->engine;
	int ret;
	if (engine->semaphore.signal)
		ret = engine->semaphore.signal(req, 4);
	else
		ret = intel_ring_begin(req, 4);
	if (ret)
		return ret;
	intel_ring_emit(engine, MI_STORE_DWORD_INDEX);
	intel_ring_emit(engine,
			I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
	intel_ring_emit(engine, i915_gem_request_get_seqno(req));
	intel_ring_emit(engine, MI_USER_INTERRUPT);
	__intel_ring_advance(engine);
	return 0;
}
static int gen6_add_request ( struct drm_i915_gem_request * req ) { struct intel_engine_cs * engine = req -> engine ; int ret ; if ( engine -> semaphore . signal ) ret = engine -> semaphore . signal ( req , 4 ) ; else ret = intel_ring_begin ( req , 4 ) ; if ( ret ) return ret ; intel_ring_emit ( engine , MI_STORE_DWORD_INDEX ) ; intel_ring_emit ( engine , I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT ) ; intel_ring_emit ( engine , i915_gem_request_get_seqno ( req ) ) ; intel_ring_emit ( engine , MI_USER_INTERRUPT ) ; __intel_ring_advance ( engine ) ; return 0 ; }
gen6_add_request - Update the semaphore mailbox registers
 @request - request to write to the ring
gen6_add_request - Update the semaphore mailbox registers @request - request to write to the ring