FreeBSD/sys/arm/ti/ti_sdma.c
/**
 *	ti_sdma_set_xfer_endianess - sets the endianness of subsequent transfers
 *	@ch: the channel number to set the endianness of
 *	@src: the source endianness (either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG)
 *	@dst: the destination endianness (either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG)
 *
 *
 *	LOCKING:
 *	DMA registers protected by internal mutex
 *
 *	RETURNS:
 *	EH_HANDLED or EH_NOT_HANDLED
 */
sets the endianness of subsequent transfers
@ch: the channel number to set the endianness of
@src: the source endianness (either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG)
@dst: the destination endianness (either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG)

DMA registers protected by internal mutex


sets the endianness of subsequent transfers @ch : the channel number to set the endianness of @src : the source endianness ( either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG ) @dst : the destination endianness ( either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG ) DMA registers protected by internal mutex
int
ti_sdma_set_xfer_endianess(unsigned int ch, unsigned int src, unsigned int dst)
{
	struct ti_sdma_softc *sc = ti_sdma_sc;
	if (sc == NULL)
		return (ENOMEM);
	TI_SDMA_LOCK(sc);
	if ((sc->sc_active_channels & (1 << ch)) == 0) {
		TI_SDMA_UNLOCK(sc);
		return (EINVAL);
	}
	sc->sc_channel[ch].reg_csdp &= ~DMA4_CSDP_SRC_ENDIANISM(1);
	sc->sc_channel[ch].reg_csdp |= DMA4_CSDP_SRC_ENDIANISM(src);
	sc->sc_channel[ch].reg_csdp &= ~DMA4_CSDP_DST_ENDIANISM(1);
	sc->sc_channel[ch].reg_csdp |= DMA4_CSDP_DST_ENDIANISM(dst);
	sc->sc_channel[ch].need_reg_write = 1;
	TI_SDMA_UNLOCK(sc);
	return 0;
}
int ti_sdma_set_xfer_endianess ( unsigned int ch , unsigned int src , unsigned int dst ) { struct ti_sdma_softc * sc = ti_sdma_sc ; if ( sc == NULL ) return ( ENOMEM ) ; TI_SDMA_LOCK ( sc ) ; if ( ( sc -> sc_active_channels & ( 1 << ch ) ) == 0 ) { TI_SDMA_UNLOCK ( sc ) ; return ( EINVAL ) ; } sc -> sc_channel [ ch ] . reg_csdp &= ~ DMA4_CSDP_SRC_ENDIANISM ( 1 ) ; sc -> sc_channel [ ch ] . reg_csdp |= DMA4_CSDP_SRC_ENDIANISM ( src ) ; sc -> sc_channel [ ch ] . reg_csdp &= ~ DMA4_CSDP_DST_ENDIANISM ( 1 ) ; sc -> sc_channel [ ch ] . reg_csdp |= DMA4_CSDP_DST_ENDIANISM ( dst ) ; sc -> sc_channel [ ch ] . need_reg_write = 1 ; TI_SDMA_UNLOCK ( sc ) ; return 0 ; }
ti_sdma_set_xfer_endianess - sets the endianness of subsequent transfers
      @ch: the channel number to set the endianness of
      @src: the source endianness (either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG)
      @dst: the destination endianness (either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG)
ti_sdma_set_xfer_endianess - sets the endianness of subsequent transfers @ch : the channel number to set the endianness of @src : the source endianness ( either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG ) @dst : the destination endianness ( either DMA_ENDIAN_LITTLE or DMA_ENDIAN_BIG )
/* Sanity check */