FreeBSD/sys/dev/cxgb/common/cxgb_t3_hw.c
/**
 * 	chan_init_hw - channel-dependent HW initialization
 *	@adap: the adapter
 *	@chan_map: bitmap of Tx channels being used
 *
 *	Perform the bits of HW initialization that are dependent on the Tx
 *	channels being used.
 */
channel-dependent HW initialization
@adap: the adapter
@chan_map: bitmap of Tx channels being used

Perform the bits of HW initialization that are dependent on the Tx
channels being used.
channel - dependent HW initialization @adap : the adapter @chan_map : bitmap of Tx channels being used Perform the bits of HW initialization that are dependent on the Tx channels being used .
static void chan_init_hw(adapter_t *adap, unsigned int chan_map)
{
	int i;
	if (chan_map != 3) {                                 
		t3_set_reg_field(adap, A_ULPRX_CTL, F_ROUND_ROBIN, 0);
		t3_set_reg_field(adap, A_ULPTX_CONFIG, F_CFG_RR_ARB, 0);
		t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT |
			     (chan_map == 1 ? F_TPTXPORT0EN | F_PORT0ACTIVE :
					      F_TPTXPORT1EN | F_PORT1ACTIVE));
		t3_write_reg(adap, A_PM1_TX_CFG,
			     chan_map == 1 ? 0xffffffff : 0);
		if (chan_map == 2)
			t3_write_reg(adap, A_TP_TX_MOD_QUEUE_REQ_MAP,
				     V_TX_MOD_QUEUE_REQ_MAP(0xff));
		t3_write_reg(adap, A_TP_TX_MOD_QUE_TABLE, (12 << 16) | 0xd9c8);
		t3_write_reg(adap, A_TP_TX_MOD_QUE_TABLE, (13 << 16) | 0xfbea);
	} else {                                             
		t3_set_reg_field(adap, A_ULPRX_CTL, 0, F_ROUND_ROBIN);
		t3_set_reg_field(adap, A_ULPTX_CONFIG, 0, F_CFG_RR_ARB);
		t3_write_reg(adap, A_ULPTX_DMA_WEIGHT,
			     V_D1_WEIGHT(16) | V_D0_WEIGHT(16));
		t3_write_reg(adap, A_MPS_CFG, F_TPTXPORT0EN | F_TPTXPORT1EN |
			     F_TPRXPORTEN | F_PORT0ACTIVE | F_PORT1ACTIVE |
			     F_ENFORCEPKT);
		t3_write_reg(adap, A_PM1_TX_CFG, 0x80008000);
		t3_set_reg_field(adap, A_TP_PC_CONFIG, 0, F_TXTOSQUEUEMAPMODE);
		t3_write_reg(adap, A_TP_TX_MOD_QUEUE_REQ_MAP,
			     V_TX_MOD_QUEUE_REQ_MAP(0xaa));
		for (i = 0; i < 16; i++)
			t3_write_reg(adap, A_TP_TX_MOD_QUE_TABLE,
				     (i << 16) | 0x1010);
		t3_write_reg(adap, A_TP_TX_MOD_QUE_TABLE, (12 << 16) | 0xba98);
		t3_write_reg(adap, A_TP_TX_MOD_QUE_TABLE, (13 << 16) | 0xfedc);
	}
}
static void chan_init_hw ( adapter_t * adap , unsigned int chan_map ) { int i ; if ( chan_map != 3 ) { t3_set_reg_field ( adap , A_ULPRX_CTL , F_ROUND_ROBIN , 0 ) ; t3_set_reg_field ( adap , A_ULPTX_CONFIG , F_CFG_RR_ARB , 0 ) ; t3_write_reg ( adap , A_MPS_CFG , F_TPRXPORTEN | F_ENFORCEPKT | ( chan_map == 1 ? F_TPTXPORT0EN | F_PORT0ACTIVE : F_TPTXPORT1EN | F_PORT1ACTIVE ) ) ; t3_write_reg ( adap , A_PM1_TX_CFG , chan_map == 1 ? 0xffffffff : 0 ) ; if ( chan_map == 2 ) t3_write_reg ( adap , A_TP_TX_MOD_QUEUE_REQ_MAP , V_TX_MOD_QUEUE_REQ_MAP ( 0xff ) ) ; t3_write_reg ( adap , A_TP_TX_MOD_QUE_TABLE , ( 12 << 16 ) | 0xd9c8 ) ; t3_write_reg ( adap , A_TP_TX_MOD_QUE_TABLE , ( 13 << 16 ) | 0xfbea ) ; } else { t3_set_reg_field ( adap , A_ULPRX_CTL , 0 , F_ROUND_ROBIN ) ; t3_set_reg_field ( adap , A_ULPTX_CONFIG , 0 , F_CFG_RR_ARB ) ; t3_write_reg ( adap , A_ULPTX_DMA_WEIGHT , V_D1_WEIGHT ( 16 ) | V_D0_WEIGHT ( 16 ) ) ; t3_write_reg ( adap , A_MPS_CFG , F_TPTXPORT0EN | F_TPTXPORT1EN | F_TPRXPORTEN | F_PORT0ACTIVE | F_PORT1ACTIVE | F_ENFORCEPKT ) ; t3_write_reg ( adap , A_PM1_TX_CFG , 0x80008000 ) ; t3_set_reg_field ( adap , A_TP_PC_CONFIG , 0 , F_TXTOSQUEUEMAPMODE ) ; t3_write_reg ( adap , A_TP_TX_MOD_QUEUE_REQ_MAP , V_TX_MOD_QUEUE_REQ_MAP ( 0xaa ) ) ; for ( i = 0 ; i < 16 ; i ++ ) t3_write_reg ( adap , A_TP_TX_MOD_QUE_TABLE , ( i << 16 ) | 0x1010 ) ; t3_write_reg ( adap , A_TP_TX_MOD_QUE_TABLE , ( 12 << 16 ) | 0xba98 ) ; t3_write_reg ( adap , A_TP_TX_MOD_QUE_TABLE , ( 13 << 16 ) | 0xfedc ) ; } }
chan_init_hw - channel-dependent HW initialization
      @adap: the adapter
      @chan_map: bitmap of Tx channels being used
chan_init_hw - channel - dependent HW initialization @adap : the adapter @chan_map : bitmap of Tx channels being used
/* one channel */ /* two channels */