kernels/linux-2.4.0/drivers/net/tlan.c
/***************************************************************
	 *	TLan_MiiWriteReg
	 *
	 *	Returns:
	 *		Nothing
	 *	Parms:
	 *		dev		The device structure for the device
	 *				to write to.
	 *		phy		The address of the PHY to be written to.
	 *		reg		The register whose contents are to be
	 *				written.
	 *		val		The value to be written to the register.
	 *
	 *	This function uses the TLAN's MII bus to write the contents of a
	 *	given register on a PHY.  It sends the appropriate info and then
	 *	writes the 16-bit register value from the MII configuration bus
	 *	via the TLAN SIO register.
	 *
	 **************************************************************/
TLan_MiiWriteReg
Returns:
Nothing
Parms:
dev             The device structure for the device
to write to.
phy             The address of the PHY to be written to.
reg             The register whose contents are to be
written.
val             The value to be written to the register.

This function uses the TLAN's MII bus to write the contents of a
given register on a PHY.  It sends the appropriate info and then
writes the 16-bit register value from the MII configuration bus
via the TLAN SIO register.
TLan_MiiWriteReg Returns : Nothing Parms : dev The device structure for the device to write to . phy The address of the PHY to be written to . reg The register whose contents are to be written . val The value to be written to the register . This function uses the TLAN ' s MII bus to write the contents of a given register on a PHY . It sends the appropriate info and then writes the 16 - bit register value from the MII configuration bus via the TLAN SIO register .
void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
{
	u16	sio;
	int	minten;
	unsigned long flags = 0;
	TLanPrivateInfo *priv = (TLanPrivateInfo *) dev->priv;
	outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
	sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
	spin_lock_irqsave(&priv->lock, flags);
	TLan_MiiSync( dev->base_addr );
	minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
	if ( minten )
		TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
	TLan_MiiSendData( dev->base_addr, 0x1, 2 );	
	TLan_MiiSendData( dev->base_addr, 0x1, 2 );	
	TLan_MiiSendData( dev->base_addr, phy, 5 );	
	TLan_MiiSendData( dev->base_addr, reg, 5 );	
	TLan_MiiSendData( dev->base_addr, 0x2, 2 );	
	TLan_MiiSendData( dev->base_addr, val, 16 );	
	TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );	
	TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
	if ( minten )
		TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
	spin_unlock_irqrestore(&priv->lock, flags);
}
void TLan_MiiWriteReg ( struct net_device * dev , u16 phy , u16 reg , u16 val ) { u16 sio ; int minten ; unsigned long flags = 0 ; TLanPrivateInfo * priv = ( TLanPrivateInfo * ) dev -> priv ; outw ( TLAN_NET_SIO , dev -> base_addr + TLAN_DIO_ADR ) ; sio = dev -> base_addr + TLAN_DIO_DATA + TLAN_NET_SIO ; spin_lock_irqsave ( & priv -> lock , flags ) ; TLan_MiiSync ( dev -> base_addr ) ; minten = TLan_GetBit ( TLAN_NET_SIO_MINTEN , sio ) ; if ( minten ) TLan_ClearBit ( TLAN_NET_SIO_MINTEN , sio ) ; TLan_MiiSendData ( dev -> base_addr , 0x1 , 2 ) ; TLan_MiiSendData ( dev -> base_addr , 0x1 , 2 ) ; TLan_MiiSendData ( dev -> base_addr , phy , 5 ) ; TLan_MiiSendData ( dev -> base_addr , reg , 5 ) ; TLan_MiiSendData ( dev -> base_addr , 0x2 , 2 ) ; TLan_MiiSendData ( dev -> base_addr , val , 16 ) ; TLan_ClearBit ( TLAN_NET_SIO_MCLK , sio ) ; TLan_SetBit ( TLAN_NET_SIO_MCLK , sio ) ; if ( minten ) TLan_SetBit ( TLAN_NET_SIO_MINTEN , sio ) ; spin_unlock_irqrestore ( & priv -> lock , flags ) ; }
TLan_MiiWriteReg
      Returns:
              Nothing
      Parms:
              dev             The device structure for the device
                              to write to.
TLan_MiiWriteReg Returns : Nothing Parms : dev The device structure for the device to write to .
/* Start ( 01b ) */ /* Write ( 01b ) */ /* Device #      */ /* Register #    */ /* Send ACK */ /* Send Data */ /* Idle cycle */