hamownia_F7/Core/Src/main.c
/**
  * @brief System Clock Configuration
  * @retval None
  */
@brief System Clock Configuration
@retval None
@brief System Clock Configuration @retval None
void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
  __HAL_RCC_PWR_CLK_ENABLE();
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLM = 4;
  RCC_OscInitStruct.PLL.PLLN = 96;
  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  RCC_OscInitStruct.PLL.PLLQ = 4;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }
  if (HAL_PWREx_EnableOverDrive() != HAL_OK)
  {
    Error_Handler();
  }
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
  {
    Error_Handler();
  }
  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_CLK48;
  PeriphClkInitStruct.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
  PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
  {
    Error_Handler();
  }
}
void SystemClock_Config ( void ) { RCC_OscInitTypeDef RCC_OscInitStruct = { 0 } ; RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 } ; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 } ; __HAL_RCC_PWR_CLK_ENABLE ( ) ; __HAL_PWR_VOLTAGESCALING_CONFIG ( PWR_REGULATOR_VOLTAGE_SCALE3 ) ; RCC_OscInitStruct . OscillatorType = RCC_OSCILLATORTYPE_HSE ; RCC_OscInitStruct . HSEState = RCC_HSE_ON ; RCC_OscInitStruct . PLL . PLLState = RCC_PLL_ON ; RCC_OscInitStruct . PLL . PLLSource = RCC_PLLSOURCE_HSE ; RCC_OscInitStruct . PLL . PLLM = 4 ; RCC_OscInitStruct . PLL . PLLN = 96 ; RCC_OscInitStruct . PLL . PLLP = RCC_PLLP_DIV2 ; RCC_OscInitStruct . PLL . PLLQ = 4 ; if ( HAL_RCC_OscConfig ( & RCC_OscInitStruct ) != HAL_OK ) { Error_Handler ( ) ; } if ( HAL_PWREx_EnableOverDrive ( ) != HAL_OK ) { Error_Handler ( ) ; } RCC_ClkInitStruct . ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 ; RCC_ClkInitStruct . SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK ; RCC_ClkInitStruct . AHBCLKDivider = RCC_SYSCLK_DIV1 ; RCC_ClkInitStruct . APB1CLKDivider = RCC_HCLK_DIV2 ; RCC_ClkInitStruct . APB2CLKDivider = RCC_HCLK_DIV1 ; if ( HAL_RCC_ClockConfig ( & RCC_ClkInitStruct , FLASH_LATENCY_3 ) != HAL_OK ) { Error_Handler ( ) ; } PeriphClkInitStruct . PeriphClockSelection = RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_CLK48 ; PeriphClkInitStruct . Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1 ; PeriphClkInitStruct . Clk48ClockSelection = RCC_CLK48SOURCE_PLL ; if ( HAL_RCCEx_PeriphCLKConfig ( & PeriphClkInitStruct ) != HAL_OK ) { Error_Handler ( ) ; } }
@brief System Clock Configuration
 @retval None
@brief System Clock Configuration @retval None
/** Configure the main internal regulator output voltage 
  */ /** Initializes the CPU, AHB and APB busses clocks 
  */ /** Activate the Over-Drive mode 
  */ /** Initializes the CPU, AHB and APB busses clocks 
  */