demos/renesas/rx65n-rsk/ccrx-e2studio6/src/FreeRTOS_user/freertos_usr_func.c
/******************************************************************************
* Function Name: vApplicationSetupTimerInterrupt
* Description  : Initialize system timer for FreeRTOS with tick interrupt 1ms.
* Arguments    : None.
* Return Value : None.
******************************************************************************/
Function Name: vApplicationSetupTimerInterrupt
Description  : Initialize system timer for FreeRTOS with tick interrupt 1ms.
Arguments    : None.
Return Value : None.
Function Name : vApplicationSetupTimerInterrupt Description : Initialize system timer for FreeRTOS with tick interrupt 1ms . Arguments : None . Return Value : None .
void vApplicationSetupTimerInterrupt(void)
{
#if (BSP_CFG_RTOS_SYSTEM_TIMER == 0)
    SYSTEM.PRCR.WORD = 0xA502;
    MSTP( CMT0 ) = 0;
    CMT.CMSTR0.BIT.STR0 = 0;
    SYSTEM.PRCR.WORD = 0xA500;
    CMT0.CMCR.WORD = 0x00C0; 
    CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ )) / 8 - 1);
    CMT0.CMCNT = 0;
    IR(CMT0, CMI0)  = 0;
    IEN(CMT0, CMI0) = 1;
    IPR(CMT0, CMI0) = configKERNEL_INTERRUPT_PRIORITY;
    CMT.CMSTR0.BIT.STR0 = 1;
#endif 
#if (BSP_CFG_RTOS_SYSTEM_TIMER == 1)
    SYSTEM.PRCR.WORD = 0xA502;
    MSTP( CMT1 ) = 0;
    CMT.CMSTR0.BIT.STR1 = 0;
    SYSTEM.PRCR.WORD = 0xA500;
    CMT1.CMCR.WORD = 0x00C0; 
    CMT1.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ )) / 8 - 1);
    CMT1.CMCNT = 0;
    IR(CMT1, CMI1)  = 0;
    IEN(CMT1, CMI1) = 1;
    IPR(CMT1, CMI1) = configKERNEL_INTERRUPT_PRIORITY;
    CMT.CMSTR0.BIT.STR1 = 1;
#endif 
#if (BSP_CFG_RTOS_SYSTEM_TIMER == 2)
    SYSTEM.PRCR.WORD = 0xA502;
    MSTP( CMT2 ) = 0;
    CMT.CMSTR1.BIT.STR2 = 0;
    SYSTEM.PRCR.WORD = 0xA500;
    CMT2.CMCR.WORD = 0x00C0; 
    CMT2.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ )) / 8 - 1);
    CMT2.CMCNT = 0;
    IR(CMT2, CMI2)  = 0;
    IEN(CMT2, CMI2) = 1;
    IPR(CMT2, CMI2) = configKERNEL_INTERRUPT_PRIORITY;
    CMT.CMSTR1.BIT.STR2 = 1;
#endif 
#if (BSP_CFG_RTOS_SYSTEM_TIMER == 3)
    SYSTEM.PRCR.WORD = 0xA502;
    MSTP( CMT3 ) = 0;
    CMT.CMSTR1.BIT.STR3 = 0;
    SYSTEM.PRCR.WORD = 0xA500;
    CMT3.CMCR.WORD = 0x00C0; 
    CMT3.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ )) / 8 - 1);
    CMT3.CMCNT = 0;
    IR(CMT3, CMI3)  = 0;
    IEN(CMT3, CMI3) = 1;
    IPR(CMT3, CMI3) = configKERNEL_INTERRUPT_PRIORITY;
    CMT.CMSTR1.BIT.STR3 = 1;
#endif 
}
void vApplicationSetupTimerInterrupt ( void ) { #if ( BSP_CFG_RTOS_SYSTEM_TIMER == 0 ) SYSTEM . PRCR . WORD = 0xA502 ; MSTP ( CMT0 ) = 0 ; CMT . CMSTR0 . BIT . STR0 = 0 ; SYSTEM . PRCR . WORD = 0xA500 ; CMT0 . CMCR . WORD = 0x00C0 ; CMT0 . CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) ) / 8 - 1 ) ; CMT0 . CMCNT = 0 ; IR ( CMT0 , CMI0 ) = 0 ; IEN ( CMT0 , CMI0 ) = 1 ; IPR ( CMT0 , CMI0 ) = configKERNEL_INTERRUPT_PRIORITY ; CMT . CMSTR0 . BIT . STR0 = 1 ; #endif #if ( BSP_CFG_RTOS_SYSTEM_TIMER == 1 ) SYSTEM . PRCR . WORD = 0xA502 ; MSTP ( CMT1 ) = 0 ; CMT . CMSTR0 . BIT . STR1 = 0 ; SYSTEM . PRCR . WORD = 0xA500 ; CMT1 . CMCR . WORD = 0x00C0 ; CMT1 . CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) ) / 8 - 1 ) ; CMT1 . CMCNT = 0 ; IR ( CMT1 , CMI1 ) = 0 ; IEN ( CMT1 , CMI1 ) = 1 ; IPR ( CMT1 , CMI1 ) = configKERNEL_INTERRUPT_PRIORITY ; CMT . CMSTR0 . BIT . STR1 = 1 ; #endif #if ( BSP_CFG_RTOS_SYSTEM_TIMER == 2 ) SYSTEM . PRCR . WORD = 0xA502 ; MSTP ( CMT2 ) = 0 ; CMT . CMSTR1 . BIT . STR2 = 0 ; SYSTEM . PRCR . WORD = 0xA500 ; CMT2 . CMCR . WORD = 0x00C0 ; CMT2 . CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) ) / 8 - 1 ) ; CMT2 . CMCNT = 0 ; IR ( CMT2 , CMI2 ) = 0 ; IEN ( CMT2 , CMI2 ) = 1 ; IPR ( CMT2 , CMI2 ) = configKERNEL_INTERRUPT_PRIORITY ; CMT . CMSTR1 . BIT . STR2 = 1 ; #endif #if ( BSP_CFG_RTOS_SYSTEM_TIMER == 3 ) SYSTEM . PRCR . WORD = 0xA502 ; MSTP ( CMT3 ) = 0 ; CMT . CMSTR1 . BIT . STR3 = 0 ; SYSTEM . PRCR . WORD = 0xA500 ; CMT3 . CMCR . WORD = 0x00C0 ; CMT3 . CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) ) / 8 - 1 ) ; CMT3 . CMCNT = 0 ; IR ( CMT3 , CMI3 ) = 0 ; IEN ( CMT3 , CMI3 ) = 1 ; IPR ( CMT3 , CMI3 ) = configKERNEL_INTERRUPT_PRIORITY ; CMT . CMSTR1 . BIT . STR3 = 1 ; #endif }
Function Name: vApplicationSetupTimerInterrupt
Description  : Initialize system timer for FreeRTOS with tick interrupt 1ms.
Function Name : vApplicationSetupTimerInterrupt Description : Initialize system timer for FreeRTOS with tick interrupt 1ms .
/* CMT channel 0 is configured as RTOS's system timer. */ /* Protect off. */ /* Enable compare match timer 0. */ /* Stop counter. */ /* Protect on. */ /* Enable interrupt on compare match.
     * Divide the PCLK by 8. */ // CKS=00b,CMIE=1; PCLK/8,Compare match interrupt (CMIn) enabled @60MHz /* Set the compare match value. */ /* Clear counter. */ /* Clear any previously pending interrupts. */ /* Enable the interrupt. */ /* Set its priority to the application defined kernel priority. */ /* Start the timer 0. */ /* (BSP_CFG_RTOS_SYSTEM_TIMER == 0) */ /* CMT channel 1 is configured as RTOS's system timer. */ /* Protect off. */ /* Enable compare match timer 1. */ /* Stop counter. */ /* Protect on. */ /* Enable interrupt on compare match.
     * Divide the PCLK by 8. */ // CKS=00b,CMIE=1; PCLK/8,Compare match interrupt (CMIn) enabled @60MHz /* Set the compare match value. */ /* Clear counter. */ /* Clear any previously pending interrupts. */ /* Enable the interrupt. */ /* Set its priority to the application defined kernel priority. */ /* Start the timer 1. */ /* (BSP_CFG_RTOS_SYSTEM_TIMER == 1) */ /* CMT channel 2 is configured as RTOS's system timer. */ /* Protect off. */ /* Enable compare match timer 2. */ /* Stop counter. */ /* Protect on. */ /* Enable interrupt on compare match.
     * Divide the PCLK by 8. */ // CKS=00b,CMIE=1; PCLK/8,Compare match interrupt (CMIn) enabled @60MHz /* Set the compare match value. */ /* Clear counter. */ /* Clear any previously pending interrupts. */ /* Enable the interrupt. */ /* Set its priority to the application defined kernel priority. */ /* Start the timer 2. */ /* (BSP_CFG_RTOS_SYSTEM_TIMER == 2) */ /* CMT channel 3 is configured as RTOS's system timer. */ /* Protect off. */ /* Enable compare match timer 3. */ /* Stop counter. */ /* Protect on. */ /* Enable interrupt on compare match.
     * Divide the PCLK by 8. */ // CKS=00b,CMIE=1; PCLK/8,Compare match interrupt (CMIn) enabled @60MHz /* Set the compare match value. */ /* Clear counter. */ /* Clear any previously pending interrupts. */ /* Enable the interrupt. */ /* Set its priority to the application defined kernel priority. */ /* Start the timer 3. */ /* (BSP_CFG_RTOS_SYSTEM_TIMER == 3) */