target/linux/at91/image/dfboot/src/include/lib_AT91RM9200.h
//*----------------------------------------------------------------------------
//* \fn    AT91F_SDRC_CfgPIO
//* \brief Configure PIO controllers to drive SDRC signals
//*----------------------------------------------------------------------------
\fn    AT91F_SDRC_CfgPIO
\brief Configure PIO controllers to drive SDRC signals
\ fn AT91F_SDRC_CfgPIO \ brief Configure PIO controllers to drive SDRC signals
static inline void AT91F_SDRC_CfgPIO (void)
{
	AT91F_PIO_CfgPeriph(
		AT91C_BASE_PIOC, 
		((unsigned int) AT91C_PC20_D20     ) |
		((unsigned int) AT91C_PC21_D21     ) |
		((unsigned int) AT91C_PC30_D30     ) |
		((unsigned int) AT91C_PC22_D22     ) |
		((unsigned int) AT91C_PC31_D31     ) |
		((unsigned int) AT91C_PC23_D23     ) |
		((unsigned int) AT91C_PC16_D16     ) |
		((unsigned int) AT91C_PC24_D24     ) |
		((unsigned int) AT91C_PC17_D17     ) |
		((unsigned int) AT91C_PC25_D25     ) |
		((unsigned int) AT91C_PC18_D18     ) |
		((unsigned int) AT91C_PC26_D26     ) |
		((unsigned int) AT91C_PC19_D19     ) |
		((unsigned int) AT91C_PC27_D27     ) |
		((unsigned int) AT91C_PC28_D28     ) |
		((unsigned int) AT91C_PC29_D29     ), 
		0); 
}
static inline void AT91F_SDRC_CfgPIO ( void ) { AT91F_PIO_CfgPeriph ( AT91C_BASE_PIOC , ( ( unsigned int ) AT91C_PC20_D20 ) | ( ( unsigned int ) AT91C_PC21_D21 ) | ( ( unsigned int ) AT91C_PC30_D30 ) | ( ( unsigned int ) AT91C_PC22_D22 ) | ( ( unsigned int ) AT91C_PC31_D31 ) | ( ( unsigned int ) AT91C_PC23_D23 ) | ( ( unsigned int ) AT91C_PC16_D16 ) | ( ( unsigned int ) AT91C_PC24_D24 ) | ( ( unsigned int ) AT91C_PC17_D17 ) | ( ( unsigned int ) AT91C_PC25_D25 ) | ( ( unsigned int ) AT91C_PC18_D18 ) | ( ( unsigned int ) AT91C_PC26_D26 ) | ( ( unsigned int ) AT91C_PC19_D19 ) | ( ( unsigned int ) AT91C_PC27_D27 ) | ( ( unsigned int ) AT91C_PC28_D28 ) | ( ( unsigned int ) AT91C_PC29_D29 ) , 0 ) ; }
\fn    AT91F_SDRC_CfgPIO
\brief Configure PIO controllers to drive SDRC signals
\ fn AT91F_SDRC_CfgPIO \ brief Configure PIO controllers to drive SDRC signals
// Configure PIO controllers to periph mode // PIO controller base address // Peripheral A // Peripheral B