libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rcc.c
/**
  * @brief  Configures the PREDIV1 division factor.
  * @note 
  *   - This function must be used only when the PLL is disabled.
  *   - This function applies only to STM32 Connectivity line and Value line 
  *     devices.
  * @param  RCC_PREDIV1_Source: specifies the PREDIV1 clock source.
  *   This parameter can be one of the following values:
  *     @arg RCC_PREDIV1_Source_HSE: HSE selected as PREDIV1 clock
  *     @arg RCC_PREDIV1_Source_PLL2: PLL2 selected as PREDIV1 clock
  * @note 
  *   For @b STM32_Value_line_devices this parameter is always RCC_PREDIV1_Source_HSE  
  * @param  RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor.
  *   This parameter can be RCC_PREDIV1_Divx where x:[1,16]
  * @retval None
  */
@brief  Configures the PREDIV1 division factor.
@note
- This function must be used only when the PLL is disabled.
- This function applies only to STM32 Connectivity line and Value line
devices.
@param  RCC_PREDIV1_Source: specifies the PREDIV1 clock source.
@brief Configures the PREDIV1 division factor . @note - This function must be used only when the PLL is disabled . - This function applies only to STM32 Connectivity line and Value line devices . @param RCC_PREDIV1_Source : specifies the PREDIV1 clock source .
void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div)
{
  uint32_t tmpreg = 0;
  assert_param(IS_RCC_PREDIV1_SOURCE(RCC_PREDIV1_Source));
  assert_param(IS_RCC_PREDIV1(RCC_PREDIV1_Div));
  tmpreg = RCC->CFGR2;
  tmpreg &= ~(CFGR2_PREDIV1 | CFGR2_PREDIV1SRC);
  tmpreg |= RCC_PREDIV1_Source | RCC_PREDIV1_Div ;
  RCC->CFGR2 = tmpreg;
}
void RCC_PREDIV1Config ( uint32_t RCC_PREDIV1_Source , uint32_t RCC_PREDIV1_Div ) { uint32_t tmpreg = 0 ; assert_param ( IS_RCC_PREDIV1_SOURCE ( RCC_PREDIV1_Source ) ) ; assert_param ( IS_RCC_PREDIV1 ( RCC_PREDIV1_Div ) ) ; tmpreg = RCC -> CFGR2 ; tmpreg &= ~ ( CFGR2_PREDIV1 | CFGR2_PREDIV1SRC ) ; tmpreg |= RCC_PREDIV1_Source | RCC_PREDIV1_Div ; RCC -> CFGR2 = tmpreg ; }
@brief  Configures the PREDIV1 division factor.
@brief Configures the PREDIV1 division factor .
/* Check the parameters */ /* Clear PREDIV1[3:0] and PREDIV1SRC bits */ /* Set the PREDIV1 clock source and division factor */ /* Store the new value */