FreeBSD/sys/dev/esp/esp_pci.c
/*
 * Attach this instance, and then all the sub-devices
 */
Attach this instance, and then all the sub-devices
Attach this instance and then all the sub - devices
static int
esp_pci_attach(device_t dev)
{
	struct esp_pci_softc *esc;
	struct ncr53c9x_softc *sc;
	int error;
	esc = device_get_softc(dev);
	sc = &esc->sc_ncr53c9x;
	NCR_LOCK_INIT(sc);
	esc->sc_dev = dev;
	sc->sc_glue = &esp_pci_glue;
	pci_enable_busmaster(dev);
	error = bus_alloc_resources(dev, esp_pci_res_spec, esc->sc_res);
	if (error != 0) {
		device_printf(dev, "failed to allocate resources\n");
		bus_release_resources(dev, esp_pci_res_spec, esc->sc_res);
		return (error);
	}
	error = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0,
	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
	    BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED,
	    BUS_SPACE_MAXSIZE_32BIT, 0, NULL, NULL, &esc->sc_pdmat);
	if (error != 0) {
		device_printf(dev, "cannot create parent DMA tag\n");
		goto fail_res;
	}
	sc->sc_id = 7;
	sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
	sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_FE;
	sc->sc_cfg3 = NCRAMDCFG3_IDM | NCRAMDCFG3_FCLK;
	sc->sc_cfg4 = NCRAMDCFG4_GE12NS | NCRAMDCFG4_RADE;
	sc->sc_rev = NCR_VARIANT_AM53C974;
	sc->sc_features = NCR_F_FASTSCSI | NCR_F_DMASELECT;
	sc->sc_cfg3_fscsi = NCRAMDCFG3_FSCSI;
	sc->sc_freq = 40; 
	sc->sc_minsync = 1000 / sc->sc_freq;
	sc->sc_maxxfer = DFLTPHYS;	
	sc->sc_maxoffset = 15;
	sc->sc_extended_geom = 1;
#define	MDL_SEG_SIZE	0x1000	/* 4kbyte per segment */
	error = bus_dma_tag_create(esc->sc_pdmat, PAGE_SIZE, 0,
	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
	    MDL_SEG_SIZE, 1, MDL_SEG_SIZE, BUS_DMA_ALLOCNOW,
	    busdma_lock_mutex, &sc->sc_lock, &esc->sc_xferdmat);
	if (error != 0) {
		device_printf(dev, "cannot create transfer DMA tag\n");
		goto fail_pdmat;
	}
	error = bus_dmamap_create(esc->sc_xferdmat, 0, &esc->sc_xferdmam);
	if (error != 0) {
		device_printf(dev, "cannot create transfer DMA map\n");
		goto fail_xferdmat;
	}
	error = bus_setup_intr(dev, esc->sc_res[ESP_PCI_RES_INTR],
	    INTR_MPSAFE | INTR_TYPE_CAM, NULL, ncr53c9x_intr, sc,
	    &esc->sc_ih);
	if (error != 0) {
		device_printf(dev, "cannot set up interrupt\n");
		goto fail_xferdmam;
	}
	sc->sc_dev = esc->sc_dev;
	error = ncr53c9x_attach(sc);
	if (error != 0) {
		device_printf(esc->sc_dev, "ncr53c9x_attach failed\n");
		goto fail_intr;
	}
	return (0);
 fail_intr:
	 bus_teardown_intr(esc->sc_dev, esc->sc_res[ESP_PCI_RES_INTR],
	    esc->sc_ih);
 fail_xferdmam:
	bus_dmamap_destroy(esc->sc_xferdmat, esc->sc_xferdmam);
 fail_xferdmat:
	bus_dma_tag_destroy(esc->sc_xferdmat);
 fail_pdmat:
	bus_dma_tag_destroy(esc->sc_pdmat);
 fail_res:
	bus_release_resources(dev, esp_pci_res_spec, esc->sc_res);
	NCR_LOCK_DESTROY(sc);
	return (error);
}
static int esp_pci_attach ( device_t dev ) { struct esp_pci_softc * esc ; struct ncr53c9x_softc * sc ; int error ; esc = device_get_softc ( dev ) ; sc = & esc -> sc_ncr53c9x ; NCR_LOCK_INIT ( sc ) ; esc -> sc_dev = dev ; sc -> sc_glue = & esp_pci_glue ; pci_enable_busmaster ( dev ) ; error = bus_alloc_resources ( dev , esp_pci_res_spec , esc -> sc_res ) ; if ( error != 0 ) { device_printf ( dev , " \n " ) ; bus_release_resources ( dev , esp_pci_res_spec , esc -> sc_res ) ; return ( error ) ; } error = bus_dma_tag_create ( bus_get_dma_tag ( dev ) , 1 , 0 , BUS_SPACE_MAXADDR_32BIT , BUS_SPACE_MAXADDR , NULL , NULL , BUS_SPACE_MAXSIZE_32BIT , BUS_SPACE_UNRESTRICTED , BUS_SPACE_MAXSIZE_32BIT , 0 , NULL , NULL , & esc -> sc_pdmat ) ; if ( error != 0 ) { device_printf ( dev , " \n " ) ; goto fail_res ; } sc -> sc_id = 7 ; sc -> sc_cfg1 = sc -> sc_id | NCRCFG1_PARENB ; sc -> sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_FE ; sc -> sc_cfg3 = NCRAMDCFG3_IDM | NCRAMDCFG3_FCLK ; sc -> sc_cfg4 = NCRAMDCFG4_GE12NS | NCRAMDCFG4_RADE ; sc -> sc_rev = NCR_VARIANT_AM53C974 ; sc -> sc_features = NCR_F_FASTSCSI | NCR_F_DMASELECT ; sc -> sc_cfg3_fscsi = NCRAMDCFG3_FSCSI ; sc -> sc_freq = 40 ; sc -> sc_minsync = 1000 / sc -> sc_freq ; sc -> sc_maxxfer = DFLTPHYS ; sc -> sc_maxoffset = 15 ; sc -> sc_extended_geom = 1 ; #define MDL_SEG_SIZE 	0x1000	/* 4kbyte per segment */ error = bus_dma_tag_create ( esc -> sc_pdmat , PAGE_SIZE , 0 , BUS_SPACE_MAXADDR_32BIT , BUS_SPACE_MAXADDR , NULL , NULL , MDL_SEG_SIZE , 1 , MDL_SEG_SIZE , BUS_DMA_ALLOCNOW , busdma_lock_mutex , & sc -> sc_lock , & esc -> sc_xferdmat ) ; if ( error != 0 ) { device_printf ( dev , " \n " ) ; goto fail_pdmat ; } error = bus_dmamap_create ( esc -> sc_xferdmat , 0 , & esc -> sc_xferdmam ) ; if ( error != 0 ) { device_printf ( dev , " \n " ) ; goto fail_xferdmat ; } error = bus_setup_intr ( dev , esc -> sc_res [ ESP_PCI_RES_INTR ] , INTR_MPSAFE | INTR_TYPE_CAM , NULL , ncr53c9x_intr , sc , & esc -> sc_ih ) ; if ( error != 0 ) { device_printf ( dev , " \n " ) ; goto fail_xferdmam ; } sc -> sc_dev = esc -> sc_dev ; error = ncr53c9x_attach ( sc ) ; if ( error != 0 ) { device_printf ( esc -> sc_dev , " \n " ) ; goto fail_intr ; } return ( 0 ) ; fail_intr : bus_teardown_intr ( esc -> sc_dev , esc -> sc_res [ ESP_PCI_RES_INTR ] , esc -> sc_ih ) ; fail_xferdmam : bus_dmamap_destroy ( esc -> sc_xferdmat , esc -> sc_xferdmam ) ; fail_xferdmat : bus_dma_tag_destroy ( esc -> sc_xferdmat ) ; fail_pdmat : bus_dma_tag_destroy ( esc -> sc_pdmat ) ; fail_res : bus_release_resources ( dev , esp_pci_res_spec , esc -> sc_res ) ; NCR_LOCK_DESTROY ( sc ) ; return ( error ) ; }
Attach this instance, and then all the sub-devices
Attach this instance and then all the sub - devices
/*
	 * XXX More of this should be in ncr53c9x_attach(), but
	 * XXX should we really poke around the chip that much in
	 * XXX the MI code?  Think about this more...
	 */ /*
	 * Set up static configuration info.
	 *
	 * XXX we should read the configuration from the EEPROM.
	 */ /* MHz */ /*
	 * This is the value used to start sync negotiations
	 * Note that the NCR register "SYNCTP" is programmed
	 * in "clocks per byte", and has a minimum value of 4.
	 * The SCSI period used in negotiation is one-fourth
	 * of the time (in nanoseconds) needed to transfer one byte.
	 * Since the chip's clock is given in MHz, we have the following
	 * formula: 4 * period = (1000 / freq) * 4
	 */ /* see below */ /*
	 * Create the DMA tag and map for the data transfers.
	 *
	 * Note: given that bus_dma(9) only adheres to the requested alignment
	 * for the first segment (and that also only for bus_dmamem_alloc()ed
	 * DMA maps) we can't use the Memory Descriptor List.  However, also
	 * when not using the MDL, the maximum transfer size apparently is
	 * limited to 4k so we have to split transfers up, which plain sucks.
	 */ /* Do the common parts of attachment. */