kernels/linux-2.4.0/include/asm-ia64/pgalloc.h
/*
 * IA-64 doesn't have any external MMU info: the page tables contain all the necessary
 * information.  However, we use this macro to take care of any (delayed) i-cache flushing
 * that may be necessary.
 */
IA-64 doesn't have any external MMU info: the page tables contain all the necessary
information.  However, we use this macro to take care of any (delayed) i-cache flushing
that may be necessary.
IA - 64 doesn ' t have any external MMU info : the page tables contain all the necessary information . However we use this macro to take care of any ( delayed ) i - cache flushing that may be necessary .
static inline void
update_mmu_cache (struct vm_area_struct *vma, unsigned long address, pte_t pte)
{
	struct page *page;
	if (!pte_exec(pte))
		return;				
	page = pte_page(pte);
	address &= PAGE_MASK;
	if (test_bit(PG_arch_1, &page->flags))
		return;				
	flush_icache_range(address, address + PAGE_SIZE);
	set_bit(PG_arch_1, &page->flags);	
}
static inline void update_mmu_cache ( struct vm_area_struct * vma , unsigned long address , pte_t pte ) { struct page * page ; if ( ! pte_exec ( pte ) ) return ; page = pte_page ( pte ) ; address &= PAGE_MASK ; if ( test_bit ( PG_arch_1 , & page -> flags ) ) return ; flush_icache_range ( address , address + PAGE_SIZE ) ; set_bit ( PG_arch_1 , & page -> flags ) ; }
IA-64 doesn't have any external MMU info: the page tables contain all the necessary
 information.
IA - 64 doesn ' t have any external MMU info : the page tables contain all the necessary information .
/* not an executable page... */ /* i-cache is already coherent with d-cache */ /* mark page as clean */