FreeBSD/sys/dev/cxgb/common/cxgb_xgmac.c
/**
 *	t3_mac_init - initialize a MAC
 *	@mac: the MAC to initialize
 *
 *	Initialize the given MAC.
 */
initialize a MAC
@mac: the MAC to initialize

Initialize the given MAC.
initialize a MAC @mac : the MAC to initialize Initialize the given MAC .
int t3_mac_init(struct cmac *mac)
{
	static struct addr_val_pair mac_reset_avp[] = {
		{ A_XGM_TX_CTRL, 0 },
		{ A_XGM_RX_CTRL, 0 },
		{ A_XGM_RX_CFG, F_DISPAUSEFRAMES | F_EN1536BFRAMES |
		                F_RMFCS | F_ENJUMBO | F_ENHASHMCAST },
		{ A_XGM_RX_HASH_LOW, 0 },
		{ A_XGM_RX_HASH_HIGH, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_1, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_2, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_3, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_4, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_5, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_6, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_7, 0 },
		{ A_XGM_RX_EXACT_MATCH_LOW_8, 0 },
		{ A_XGM_STAT_CTRL, F_CLRSTATS }
	};
	u32 val;
	adapter_t *adap = mac->adapter;
	unsigned int oft = mac->offset;
	t3_write_reg(adap, A_XGM_RESET_CTRL + oft, F_MAC_RESET_);
	(void) t3_read_reg(adap, A_XGM_RESET_CTRL + oft);    
	t3_write_regs(adap, mac_reset_avp, ARRAY_SIZE(mac_reset_avp), oft);
	t3_set_reg_field(adap, A_XGM_RXFIFO_CFG + oft,
			 F_RXSTRFRWRD | F_DISERRFRAMES,
			 uses_xaui(adap) ? 0 : F_RXSTRFRWRD);
	t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + oft, 0, F_UNDERUNFIX);
	if (uses_xaui(adap)) {
		if (adap->params.rev == 0) {
			t3_set_reg_field(adap, A_XGM_SERDES_CTRL + oft, 0,
					 F_RXENABLE | F_TXENABLE);
			if (t3_wait_op_done(adap, A_XGM_SERDES_STATUS1 + oft,
					    F_CMULOCK, 1, 5, 2)) {
				CH_ERR(adap,
				       "MAC %d XAUI SERDES CMU lock failed\n",
				       macidx(mac));
				return -1;
			}
			t3_set_reg_field(adap, A_XGM_SERDES_CTRL + oft, 0,
					 F_SERDESRESET_);
		} else
			xaui_serdes_reset(mac);
	}
	if (mac->multiport) {
		t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + oft,
			     V_RXMAXPKTSIZE(MAX_FRAME_SIZE - 4));
		t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + oft, 0,
				 F_DISPREAMBLE);
		t3_set_reg_field(adap, A_XGM_RX_CFG + oft, 0, F_COPYPREAMBLE |
				 F_ENNON802_3PREAMBLE);
		t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + oft,
				 V_TXFIFOTHRESH(M_TXFIFOTHRESH),
				 V_TXFIFOTHRESH(64));
		t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
		t3_write_reg(adap, A_XGM_RX_CTRL + oft, F_RXEN);
	}
	t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + oft,
			 V_RXMAXFRAMERSIZE(M_RXMAXFRAMERSIZE),
			 V_RXMAXFRAMERSIZE(MAX_FRAME_SIZE) | F_RXENFRAMER);
	val = xgm_reset_ctrl(mac);
	t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);
	(void) t3_read_reg(adap, A_XGM_RESET_CTRL + oft);  
	if ((val & F_PCS_RESET_) && adap->params.rev) {
		msleep(1);
		t3b_pcs_reset(mac);
	}
	memset(&mac->stats, 0, sizeof(mac->stats));
	return 0;
}
int t3_mac_init ( struct cmac * mac ) { static struct addr_val_pair mac_reset_avp [ ] = { { A_XGM_TX_CTRL , 0 } , { A_XGM_RX_CTRL , 0 } , { A_XGM_RX_CFG , F_DISPAUSEFRAMES | F_EN1536BFRAMES | F_RMFCS | F_ENJUMBO | F_ENHASHMCAST } , { A_XGM_RX_HASH_LOW , 0 } , { A_XGM_RX_HASH_HIGH , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_1 , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_2 , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_3 , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_4 , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_5 , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_6 , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_7 , 0 } , { A_XGM_RX_EXACT_MATCH_LOW_8 , 0 } , { A_XGM_STAT_CTRL , F_CLRSTATS } } ; u32 val ; adapter_t * adap = mac -> adapter ; unsigned int oft = mac -> offset ; t3_write_reg ( adap , A_XGM_RESET_CTRL + oft , F_MAC_RESET_ ) ; ( void ) t3_read_reg ( adap , A_XGM_RESET_CTRL + oft ) ; t3_write_regs ( adap , mac_reset_avp , ARRAY_SIZE ( mac_reset_avp ) , oft ) ; t3_set_reg_field ( adap , A_XGM_RXFIFO_CFG + oft , F_RXSTRFRWRD | F_DISERRFRAMES , uses_xaui ( adap ) ? 0 : F_RXSTRFRWRD ) ; t3_set_reg_field ( adap , A_XGM_TXFIFO_CFG + oft , 0 , F_UNDERUNFIX ) ; if ( uses_xaui ( adap ) ) { if ( adap -> params . rev == 0 ) { t3_set_reg_field ( adap , A_XGM_SERDES_CTRL + oft , 0 , F_RXENABLE | F_TXENABLE ) ; if ( t3_wait_op_done ( adap , A_XGM_SERDES_STATUS1 + oft , F_CMULOCK , 1 , 5 , 2 ) ) { CH_ERR ( adap , " \n " , macidx ( mac ) ) ; return -1 ; } t3_set_reg_field ( adap , A_XGM_SERDES_CTRL + oft , 0 , F_SERDESRESET_ ) ; } else xaui_serdes_reset ( mac ) ; } if ( mac -> multiport ) { t3_write_reg ( adap , A_XGM_RX_MAX_PKT_SIZE + oft , V_RXMAXPKTSIZE ( MAX_FRAME_SIZE - 4 ) ) ; t3_set_reg_field ( adap , A_XGM_TXFIFO_CFG + oft , 0 , F_DISPREAMBLE ) ; t3_set_reg_field ( adap , A_XGM_RX_CFG + oft , 0 , F_COPYPREAMBLE | F_ENNON802_3PREAMBLE ) ; t3_set_reg_field ( adap , A_XGM_TXFIFO_CFG + oft , V_TXFIFOTHRESH ( M_TXFIFOTHRESH ) , V_TXFIFOTHRESH ( 64 ) ) ; t3_write_reg ( adap , A_XGM_TX_CTRL + oft , F_TXEN ) ; t3_write_reg ( adap , A_XGM_RX_CTRL + oft , F_RXEN ) ; } t3_set_reg_field ( adap , A_XGM_RX_MAX_PKT_SIZE + oft , V_RXMAXFRAMERSIZE ( M_RXMAXFRAMERSIZE ) , V_RXMAXFRAMERSIZE ( MAX_FRAME_SIZE ) | F_RXENFRAMER ) ; val = xgm_reset_ctrl ( mac ) ; t3_write_reg ( adap , A_XGM_RESET_CTRL + oft , val ) ; ( void ) t3_read_reg ( adap , A_XGM_RESET_CTRL + oft ) ; if ( ( val & F_PCS_RESET_ ) && adap -> params . rev ) { msleep ( 1 ) ; t3b_pcs_reset ( mac ) ; } memset ( & mac -> stats , 0 , sizeof ( mac -> stats ) ) ; return 0 ; }
t3_mac_init - initialize a MAC
      @mac: the MAC to initialize
t3_mac_init - initialize a MAC @mac : the MAC to initialize
/* flush */ /* flush */