src/occ_405/pss/avsbus.c
// Initiate read for error status bits (over-current)
Initiate read for error status bits (over-current)
Initiate read for error status bits ( over - current )
void initiate_avsbus_read_status()
{
    if (isSafeStateRequested())
    {
        return;
    }
#ifdef AVSDEBUG
    static uint32_t L_trace_count = 0;
#endif
    unsigned int index;
    for (index = 0; index < AVSBUS_TYPE_MAX; ++index)
    {
        uint8_t bus = 0xFF;
        if ((index == 0) && G_avsbus_vdd_monitoring)
        {
            bus = G_sysConfigData.avsbus_vdd.bus;
        }
        else if ((index == 1) && G_avsbus_vdn_monitoring)
        {
            bus = G_sysConfigData.avsbus_vdn.bus;
        }
        if (bus != 0xFF)
        {
#ifdef AVSDEBUG
            if (L_trace_count < DEBUG_TRACE_MAX)
            {
                TRAC_INFO("initiate_avsbus_read_status: read Status - bus[%d], rail[broadcast]", bus);
            }
#endif
            uint32_t value = 0x40000000;
            DEBUG_OUT32(OCB_O2SCMDxB[bus], value, "OCB_O2SCMDxB");
            out32(OCB_O2SCMDxB[bus], value);
            value = 0x777FFFF8;
            value |= avs_crc_calculate(value);
            DEBUG_OUT32(OCB_O2SWDxB[bus], value, "OCB_O2SWDxB");
            out32(OCB_O2SWDxB[bus], value);
        }
    }
#ifdef AVSDEBUG
    ++L_trace_count;
#endif
}
void initiate_avsbus_read_status ( ) { if ( isSafeStateRequested ( ) ) { return ; } #ifdef AVSDEBUG static uint32_t L_trace_count = 0 ; #endif unsigned int index ; for ( index = 0 ; index < AVSBUS_TYPE_MAX ; ++ index ) { uint8_t bus = 0xFF ; if ( ( index == 0 ) && G_avsbus_vdd_monitoring ) { bus = G_sysConfigData . avsbus_vdd . bus ; } else if ( ( index == 1 ) && G_avsbus_vdn_monitoring ) { bus = G_sysConfigData . avsbus_vdn . bus ; } if ( bus != 0xFF ) { #ifdef AVSDEBUG if ( L_trace_count < DEBUG_TRACE_MAX ) { TRAC_INFO ( " " , bus ) ; } #endif uint32_t value = 0x40000000 ; DEBUG_OUT32 ( OCB_O2SCMDxB [ bus ] , value , " " ) ; out32 ( OCB_O2SCMDxB [ bus ] , value ) ; value = 0x777FFFF8 ; value |= avs_crc_calculate ( value ) ; DEBUG_OUT32 ( OCB_O2SWDxB [ bus ] , value , " " ) ; out32 ( OCB_O2SWDxB [ bus ] , value ) ; } } #ifdef AVSDEBUG ++ L_trace_count ; #endif }
Initiate read for error status bits (over-current)
Initiate read for error status bits ( over - current )
// No need to attempt read if OCC will be reset // Determine busses that are being monitored // Write O2SCMD[a][n] //   o2s_clear_sticky_bits = 1 // Write O2SWD[a][n] - write commands and initiate hardware operation //   o2s_wdata with content // AVS Bus command (read staus): //   0:1   StartCode = 0b01 //   2:3   Cmd = 0b11 (read) //   4     CmdGroup = 0b0 (AVSBus) //   5:8   CmdDataType (STATUS = 01110b) //   9:12  Select (All rails / broadcast = 01111b ) //   13:28 CmdData (reserved / must be 1s) //   29:31 CRC //   01110DDD DRRRR111 11111111 11111CCC //   01110111 01111111 11111111 11111CCC // Calculate/add CRC // Read has been started so now just wait for HW to complete // HW: Wait for bus op to complete // HW: arbitration between two bridges // HW: o2s_ongoing: 0 -> 1 // HW: execution completes // HW: o2s_ongoing 1 -> 0