Platform/ECM3532/M3/hw/hal/ecm3532/spi_slave/src/spi_slave_hal.c
/**
 * Push in Tx Fifo based on curr Fifo level
 */
Push in Tx Fifo based on curr Fifo level
Push in Tx Fifo based on curr Fifo level
static void SpiSlaveXmit(struct sDevSpiSlv *sDev)
{
    uint8_t ui8CurrLevel, ui8Avail;
    if (sDev->ui32TxByteCnt)
    {
        ui8CurrLevel = MEMIO8(REG_SPI_TX_FIFO_DEBUG_ADDR(sDev->ui8Spi)) &
                    BM_SPI_TX_FIFO_DEBUG_ENTRIES;
        ui8Avail = SPI_FIFO_DEPTH - ui8CurrLevel;
        while(ui8Avail && sDev->ui32TxByteCnt)
        {
            REG_SPI_TXRX_1BYTE_FIFO_DATA(sDev->ui8Spi).V =
                *sDev->ui8TxBuf++;
            sDev->ui32TxByteCnt--;
            ui8Avail--;
        }
    }
}
static void SpiSlaveXmit ( struct sDevSpiSlv * sDev ) { uint8_t ui8CurrLevel , ui8Avail ; if ( sDev -> ui32TxByteCnt ) { ui8CurrLevel = MEMIO8 ( REG_SPI_TX_FIFO_DEBUG_ADDR ( sDev -> ui8Spi ) ) & BM_SPI_TX_FIFO_DEBUG_ENTRIES ; ui8Avail = SPI_FIFO_DEPTH - ui8CurrLevel ; while ( ui8Avail && sDev -> ui32TxByteCnt ) { REG_SPI_TXRX_1BYTE_FIFO_DATA ( sDev -> ui8Spi ) . V = * sDev -> ui8TxBuf ++ ; sDev -> ui32TxByteCnt -- ; ui8Avail -- ; } } }
Push in Tx Fifo based on curr Fifo level
Push in Tx Fifo based on curr Fifo level