Platform/ECM3532/DSP/hw/csp/ecm3532/src/eta_csp_i2s.c
/***************************************************************************/
/**
 *
 *  Initialize the I2S module.
 *
 *  @param sI2sConfig is a union. To access the field: enable, for example,
 *  use sI2sConfig.fields.enable.
 *
 *  This function initializes the I2S. It configures and/or enables it.
 *  User may do both in a single call or 2 seperate calls.
 *
 *  @return Returns the configuration status. eI2sConfigGood if no errors.
 *
 ******************************************************************************/
Initialize the I2S module.
@param sI2sConfig is a union. To access the field: enable, for example,
use sI2sConfig.fields.enable.

This function initializes the I2S. It configures and/or enables it.
User may do both in a single call or 2 seperate calls.

@return Returns the configuration status. eI2sConfigGood if no errors.
Initialize the I2S module . @param sI2sConfig is a union . To access the field : enable for example use sI2sConfig . fields . enable . This function initializes the I2S . It configures and / or enables it . User may do both in a single call or 2 seperate calls . @return Returns the configuration status . eI2sConfigGood if no errors .
tI2sConfigRetVal
EtaCspI2sConfig(tI2sConfig sI2sConfig)
{
    uint32_t ui32TempData0;
    uint32_t ui32MboxWord;
     Form mbox word
    ui32MboxWord = ((((uint32_t)sI2sConfig.fields.enable_rx)       << BP_ETA_CSP_COMMON_I2S_RX_ENBLE) |
                    (((uint32_t)sI2sConfig.fields.enable_tx)       << BP_ETA_CSP_COMMON_I2S_TX_ENBLE) |
                    (((uint32_t)sI2sConfig.fields.swap_chan_tx)    << BP_ETA_CSP_COMMON_I2S_TX_SWP_C) |
                    (((uint32_t)sI2sConfig.fields.swap_chan_rx)    << BP_ETA_CSP_COMMON_I2S_RX_SWP_C) |
                    (((uint32_t)sI2sConfig.fields.mode_64bit)      << BP_ETA_CSP_COMMON_I2S_64B_MODE) |
                    (((uint32_t)sI2sConfig.fields.edge_tx_trig)    << BP_ETA_CSP_COMMON_I2S_TX_ED_TR) |
                    (((uint32_t)sI2sConfig.fields.edge_rx_trig)    << BP_ETA_CSP_COMMON_I2S_RX_ED_TR) |
                    (((uint32_t)sI2sConfig.fields.clock_src)       << BP_ETA_CSP_COMMON_I2S_CLCK_SRC) |
                    (((uint32_t)sI2sConfig.fields.sample_freq)     << BP_ETA_CSP_COMMON_I2S_SMPL_FRQ) |
                    (((uint32_t)sI2sConfig.fields.chan_tx_config)  << BP_ETA_CSP_COMMON_I2S_TX_CONFG) |
                    (((uint32_t)sI2sConfig.fields.chan_rx_config)  << BP_ETA_CSP_COMMON_I2S_RX_CONFG) |
                    (((uint32_t)sI2sConfig.fields.chan_tx_upscale) << BP_ETA_CSP_COMMON_I2S_TX_UPSCL) |
                    (((uint32_t)sI2sConfig.fields.chan_rx_upscale) << BP_ETA_CSP_COMMON_I2S_RX_UPSCL) |
                    (((uint32_t)sI2sConfig.fields.int_mode)        << BP_ETA_CSP_COMMON_I2S_INT_MODE));
    /
     Configure Actual I2S
     Trigger gratuitous Soft Reset
     REG_I2S_DSP_CSR = BM_I2S_DSP_CSR_SOFT_RST ;
     while (REG_I2S_DSP_CSR == BM_I2S_DSP_CSR_SOFT_RST);
    REG_I2S_DSP_CSR2 =
        (sI2sConfig.fields.chan_tx_upscale << BP_I2S_DSP_CSR2_TX_UPSCALE) |
        (sI2sConfig.fields.chan_rx_upscale <<
    BP_I2S_DSP_CSR2_RX_UPSCALE);
    ui32TempData0 =
        (sI2sConfig.fields.mode_64bit << BP_I2S_DSP_CSR_BIT64_MODE)       |
        (sI2sConfig.fields.chan_tx_config <<
    BP_I2S_DSP_CSR_TX_CH_MODE)       |
        (sI2sConfig.fields.chan_rx_config <<
    BP_I2S_DSP_CSR_RX_CH_MODE)       |
        (sI2sConfig.fields.int_mode << BP_I2S_DSP_CSR_INT_MODE)         |
        (sI2sConfig.fields.edge_tx_trig <<
    BP_I2S_DSP_CSR_DSTRDY_EDGE_TRIG) |
        (sI2sConfig.fields.edge_rx_trig <<
    BP_I2S_DSP_CSR_SRSRDY_EDGE_TRIG) |
        (sI2sConfig.fields.swap_chan_tx <<
    BP_I2S_DSP_CSR_SWAP_WR_CHNL)     |
        (sI2sConfig.fields.swap_chan_rx << BP_I2S_DSP_CSR_SWAP_RD_CHNL);
    REG_I2S_DSP_CSR =  ui32TempData0;
     Perform enable after rest of configuration is stable
    if(sI2sConfig.fields.enable_rx || sI2sConfig.fields.enable_tx)
    {
        REG_I2S_DSP_CSR = ui32TempData0 | (0x1 << BP_I2S_DSP_CSR_I2S_EN);
    }
     Tell M3 To Enable / Config I2S
    EtaCspMboxDsp2M3(MAILBOX_DSP2M3CMD_I2S_CFG, sI2sConfig.packed_config);
    EtaCspMboxDsp2M3(MAILBOX_DSP2M3CMD_I2S_CFG, ui32MboxWord);
     Configure Actual I2S
    /
    return(eI2sConfigGood);
}
tI2sConfigRetVal EtaCspI2sConfig ( tI2sConfig sI2sConfig ) { uint32_t ui32TempData0 ; uint32_t ui32MboxWord ; ui32MboxWord = ( ( ( ( uint32_t ) sI2sConfig . fields . enable_rx ) << BP_ETA_CSP_COMMON_I2S_RX_ENBLE ) | ( ( ( uint32_t ) sI2sConfig . fields . enable_tx ) << BP_ETA_CSP_COMMON_I2S_TX_ENBLE ) | ( ( ( uint32_t ) sI2sConfig . fields . swap_chan_tx ) << BP_ETA_CSP_COMMON_I2S_TX_SWP_C ) | ( ( ( uint32_t ) sI2sConfig . fields . swap_chan_rx ) << BP_ETA_CSP_COMMON_I2S_RX_SWP_C ) | ( ( ( uint32_t ) sI2sConfig . fields . mode_64bit ) << BP_ETA_CSP_COMMON_I2S_64B_MODE ) | ( ( ( uint32_t ) sI2sConfig . fields . edge_tx_trig ) << BP_ETA_CSP_COMMON_I2S_TX_ED_TR ) | ( ( ( uint32_t ) sI2sConfig . fields . edge_rx_trig ) << BP_ETA_CSP_COMMON_I2S_RX_ED_TR ) | ( ( ( uint32_t ) sI2sConfig . fields . clock_src ) << BP_ETA_CSP_COMMON_I2S_CLCK_SRC ) | ( ( ( uint32_t ) sI2sConfig . fields . sample_freq ) << BP_ETA_CSP_COMMON_I2S_SMPL_FRQ ) | ( ( ( uint32_t ) sI2sConfig . fields . chan_tx_config ) << BP_ETA_CSP_COMMON_I2S_TX_CONFG ) | ( ( ( uint32_t ) sI2sConfig . fields . chan_rx_config ) << BP_ETA_CSP_COMMON_I2S_RX_CONFG ) | ( ( ( uint32_t ) sI2sConfig . fields . chan_tx_upscale ) << BP_ETA_CSP_COMMON_I2S_TX_UPSCL ) | ( ( ( uint32_t ) sI2sConfig . fields . chan_rx_upscale ) << BP_ETA_CSP_COMMON_I2S_RX_UPSCL ) | ( ( ( uint32_t ) sI2sConfig . fields . int_mode ) << BP_ETA_CSP_COMMON_I2S_INT_MODE ) ) ; REG_I2S_DSP_CSR2 = ( sI2sConfig . fields . chan_tx_upscale << BP_I2S_DSP_CSR2_TX_UPSCALE ) | ( sI2sConfig . fields . chan_rx_upscale << BP_I2S_DSP_CSR2_RX_UPSCALE ) ; ui32TempData0 = ( sI2sConfig . fields . mode_64bit << BP_I2S_DSP_CSR_BIT64_MODE ) | ( sI2sConfig . fields . chan_tx_config << BP_I2S_DSP_CSR_TX_CH_MODE ) | ( sI2sConfig . fields . chan_rx_config << BP_I2S_DSP_CSR_RX_CH_MODE ) | ( sI2sConfig . fields . int_mode << BP_I2S_DSP_CSR_INT_MODE ) | ( sI2sConfig . fields . edge_tx_trig << BP_I2S_DSP_CSR_DSTRDY_EDGE_TRIG ) | ( sI2sConfig . fields . edge_rx_trig << BP_I2S_DSP_CSR_SRSRDY_EDGE_TRIG ) | ( sI2sConfig . fields . swap_chan_tx << BP_I2S_DSP_CSR_SWAP_WR_CHNL ) | ( sI2sConfig . fields . swap_chan_rx << BP_I2S_DSP_CSR_SWAP_RD_CHNL ) ; REG_I2S_DSP_CSR = ui32TempData0 ; if ( sI2sConfig . fields . enable_rx || sI2sConfig . fields . enable_tx ) { REG_I2S_DSP_CSR = ui32TempData0 | ( 0x1 << BP_I2S_DSP_CSR_I2S_EN ) ; } EtaCspMboxDsp2M3 ( MAILBOX_DSP2M3CMD_I2S_CFG , ui32MboxWord ) ; return ( eI2sConfigGood ) ; }
Initialize the I2S module.
Initialize the I2S module .
// // Form mbox word // /////////////////////////////////////////////// // Configure Actual I2S //// Trigger gratuitous Soft Reset // REG_I2S_DSP_CSR = BM_I2S_DSP_CSR_SOFT_RST ; // while (REG_I2S_DSP_CSR == BM_I2S_DSP_CSR_SOFT_RST); // Perform enable after rest of configuration is stable // Tell M3 To Enable / Config I2S //EtaCspMboxDsp2M3(MAILBOX_DSP2M3CMD_I2S_CFG, sI2sConfig.packed_config); // Configure Actual I2S ///////////////////////////////////////////////