arch/arm/src/lpc17xx/lpc176x_clockconfig.c
/************************************************************************************
 * Name: lpc17_clockconfig
 *
 * Description:
 *   Called to initialize the LPC176x.  This does whatever setup is needed to put the
 *   SoC in a usable state.  This includes the initialization of clocking using the
 *   settings in board.h.
 *
 *   The LPC176x and LPC178x system control block is *nearly* identical but we have
 *   found that the LPC178x is more sensitive to the ordering of certain operations.
 *   So, although the hardware seems very similar, the safer thing to do is to
 *   separate the LPC176x and LPC178x into separate files.
 *
 ************************************************************************************/
lpc17_clockconfig
Description:
Called to initialize the LPC176x.  This does whatever setup is needed to put the
SoC in a usable state.  This includes the initialization of clocking using the
settings in board.h.

The LPC176x and LPC178x system control block is *nearly* identical but we have
found that the LPC178x is more sensitive to the ordering of certain operations.
So, although the hardware seems very similar, the safer thing to do is to
separate the LPC176x and LPC178x into separate files.
lpc17_clockconfig Description : Called to initialize the LPC176x . This does whatever setup is needed to put the SoC in a usable state . This includes the initialization of clocking using the settings in board . h . The LPC176x and LPC178x system control block is * nearly * identical but we have found that the LPC178x is more sensitive to the ordering of certain operations . So although the hardware seems very similar the safer thing to do is to separate the LPC176x and LPC178x into separate files .
void lpc17_clockconfig(void)
{
  putreg32(BOARD_SCS_VALUE, LPC17_SYSCON_SCS);
#ifdef CONFIG_LPC17_MAINOSC
  while ((getreg32(LPC17_SYSCON_SCS) & SYSCON_SCS_OSCSTAT) == 0);
#endif
  putreg32(BOARD_CCLKCFG_VALUE, LPC17_SYSCON_CCLKCFG);
#ifdef CONFIG_LPC17_PLL0
  putreg32(BOARD_CLKSRCSEL_VALUE, LPC17_SYSCON_CLKSRCSEL);
  putreg32(BOARD_PLL0CFG_VALUE, LPC17_SYSCON_PLL0CFG);
  putreg32(0xaa, LPC17_SYSCON_PLL0FEED);
  putreg32(0x55, LPC17_SYSCON_PLL0FEED);
  putreg32(SYSCON_PLLCON_PLLE, LPC17_SYSCON_PLL0CON);
  putreg32(0xaa, LPC17_SYSCON_PLL0FEED);
  putreg32(0x55, LPC17_SYSCON_PLL0FEED);
  while ((getreg32(LPC17_SYSCON_PLL0STAT) & SYSCON_PLL0STAT_PLOCK) == 0);
  putreg32(SYSCON_PLLCON_PLLE|SYSCON_PLLCON_PLLC, LPC17_SYSCON_PLL0CON);
  putreg32(0xaa, LPC17_SYSCON_PLL0FEED);
  putreg32(0x55, LPC17_SYSCON_PLL0FEED);
  while ((getreg32(LPC17_SYSCON_PLL0STAT) & (SYSCON_PLL0STAT_PLLE|SYSCON_PLL0STAT_PLLC))
          != (SYSCON_PLL0STAT_PLLE|SYSCON_PLL0STAT_PLLC));
#endif 
#ifdef CONFIG_LPC17_PLL1
  putreg32(BOARD_PLL1CFG_VALUE, LPC17_SYSCON_PLL1CFG);
  putreg32(0xaa, LPC17_SYSCON_PLL1FEED);
  putreg32(0x55, LPC17_SYSCON_PLL1FEED);
  putreg32(SYSCON_PLLCON_PLLE, LPC17_SYSCON_PLL1CON);
  putreg32(0xaa, LPC17_SYSCON_PLL1FEED);
  putreg32(0x55, LPC17_SYSCON_PLL1FEED);
  while ((getreg32(LPC17_SYSCON_PLL1STAT) & SYSCON_PLL1STAT_PLOCK) == 0);
  putreg32(SYSCON_PLLCON_PLLE|SYSCON_PLLCON_PLLC, LPC17_SYSCON_PLL1CON);
  putreg32(0xaa, LPC17_SYSCON_PLL1FEED);
  putreg32(0x55, LPC17_SYSCON_PLL1FEED);
  while ((getreg32(LPC17_SYSCON_PLL1STAT) & (SYSCON_PLL1STAT_PLLE|SYSCON_PLL1STAT_PLLC))
         != (SYSCON_PLL1STAT_PLLE|SYSCON_PLL1STAT_PLLC));
#else 
  putreg32(BOARD_USBCLKCFG_VALUE, LPC17_SYSCON_USBCLKCFG);
#endif 
  putreg32(0, LPC17_SYSCON_PCLKSEL0);
  putreg32(0, LPC17_SYSCON_PCLKSEL1);
  putreg32(SYSCON_PCONP_PCGPIO, LPC17_SYSCON_PCONP);
  putreg32(0, LPC17_SYSCON_CLKOUTCFG);
#ifdef CONFIG_LPC17_FLASH
  putreg32(BOARD_FLASHCFG_VALUE, LPC17_SYSCON_FLASHCFG);
#endif
}
void lpc17_clockconfig ( void ) { putreg32 ( BOARD_SCS_VALUE , LPC17_SYSCON_SCS ) ; #ifdef CONFIG_LPC17_MAINOSC while ( ( getreg32 ( LPC17_SYSCON_SCS ) & SYSCON_SCS_OSCSTAT ) == 0 ) ; #endif putreg32 ( BOARD_CCLKCFG_VALUE , LPC17_SYSCON_CCLKCFG ) ; #ifdef CONFIG_LPC17_PLL0 putreg32 ( BOARD_CLKSRCSEL_VALUE , LPC17_SYSCON_CLKSRCSEL ) ; putreg32 ( BOARD_PLL0CFG_VALUE , LPC17_SYSCON_PLL0CFG ) ; putreg32 ( 0xaa , LPC17_SYSCON_PLL0FEED ) ; putreg32 ( 0x55 , LPC17_SYSCON_PLL0FEED ) ; putreg32 ( SYSCON_PLLCON_PLLE , LPC17_SYSCON_PLL0CON ) ; putreg32 ( 0xaa , LPC17_SYSCON_PLL0FEED ) ; putreg32 ( 0x55 , LPC17_SYSCON_PLL0FEED ) ; while ( ( getreg32 ( LPC17_SYSCON_PLL0STAT ) & SYSCON_PLL0STAT_PLOCK ) == 0 ) ; putreg32 ( SYSCON_PLLCON_PLLE | SYSCON_PLLCON_PLLC , LPC17_SYSCON_PLL0CON ) ; putreg32 ( 0xaa , LPC17_SYSCON_PLL0FEED ) ; putreg32 ( 0x55 , LPC17_SYSCON_PLL0FEED ) ; while ( ( getreg32 ( LPC17_SYSCON_PLL0STAT ) & ( SYSCON_PLL0STAT_PLLE | SYSCON_PLL0STAT_PLLC ) ) != ( SYSCON_PLL0STAT_PLLE | SYSCON_PLL0STAT_PLLC ) ) ; #endif #ifdef CONFIG_LPC17_PLL1 putreg32 ( BOARD_PLL1CFG_VALUE , LPC17_SYSCON_PLL1CFG ) ; putreg32 ( 0xaa , LPC17_SYSCON_PLL1FEED ) ; putreg32 ( 0x55 , LPC17_SYSCON_PLL1FEED ) ; putreg32 ( SYSCON_PLLCON_PLLE , LPC17_SYSCON_PLL1CON ) ; putreg32 ( 0xaa , LPC17_SYSCON_PLL1FEED ) ; putreg32 ( 0x55 , LPC17_SYSCON_PLL1FEED ) ; while ( ( getreg32 ( LPC17_SYSCON_PLL1STAT ) & SYSCON_PLL1STAT_PLOCK ) == 0 ) ; putreg32 ( SYSCON_PLLCON_PLLE | SYSCON_PLLCON_PLLC , LPC17_SYSCON_PLL1CON ) ; putreg32 ( 0xaa , LPC17_SYSCON_PLL1FEED ) ; putreg32 ( 0x55 , LPC17_SYSCON_PLL1FEED ) ; while ( ( getreg32 ( LPC17_SYSCON_PLL1STAT ) & ( SYSCON_PLL1STAT_PLLE | SYSCON_PLL1STAT_PLLC ) ) != ( SYSCON_PLL1STAT_PLLE | SYSCON_PLL1STAT_PLLC ) ) ; #else putreg32 ( BOARD_USBCLKCFG_VALUE , LPC17_SYSCON_USBCLKCFG ) ; #endif putreg32 ( 0 , LPC17_SYSCON_PCLKSEL0 ) ; putreg32 ( 0 , LPC17_SYSCON_PCLKSEL1 ) ; putreg32 ( SYSCON_PCONP_PCGPIO , LPC17_SYSCON_PCONP ) ; putreg32 ( 0 , LPC17_SYSCON_CLKOUTCFG ) ; #ifdef CONFIG_LPC17_FLASH putreg32 ( BOARD_FLASHCFG_VALUE , LPC17_SYSCON_FLASHCFG ) ; #endif }
Name: lpc17_clockconfig
 Description:
   Called to initialize the LPC176x.
Name : lpc17_clockconfig Description : Called to initialize the LPC176x .
/* Enable the main oscillator (or not) and the frequency range of the main oscillator */ /* Wait for the main oscillator to be ready. */ /* Setup up the divider value for the CPU clock.  The output of the divider is CCLK.
   * The input to the divider (PLLCLK) is equal to SYSCLK unless PLL0 is enabled. CCLK
   * will be further divided to produce peripheral clocks, but that peripheral clock
   * setup is performed in the peripheral device drivers.  Here only CCLK is
   * configured.
   */ /* PLL0 is used to generate the CPU clock divider input (PLLCLK). */ /* Select the PLL0 source clock, multiplier, and pre-divider values.  NOTE that
   * a special "feed" sequence must be written to the PLL0FEED register in order
   * for changes to the PLL0CFG register to take effect.
   */ /* Enable the PLL. NOTE that a special "feed" sequence must be written to the
   * PLL0FEED register in order for changes to the PLL0CON register to take effect.
   */ /* Wait for PLL0 to lock */ /* Enable and connect PLL0 */ /* Wait for PLL to report that it is connected and enabled */ /* CONFIG_LPC17_PLL0 */ /* PLL1 receives its clock input from the main oscillator only and can be used to
   * provide a fixed 48 MHz clock only to the USB subsystem (if that clock cannot be
   * obtained from PLL0).
   */ /* Select the PLL1 multiplier, and pre-divider values.  NOTE that a special "feed"
   * sequence must be written to the PLL1FEED register in order for changes to the
   * PLL1CFG register to take effect.
   */ /* Enable the PLL. NOTE that a special "feed" sequence must be written to the
   * PLL1FEED register in order for changes to the PLL1CON register to take effect.
   */ /* Wait for PLL1 to lock */ /* Enable and connect PLL1 */ /* Wait for PLL to report that it is connected and enabled */ /* CONFIG_LPC17_PLL1 */ /* Otherwise, setup up the USB clock divider to generate the USB clock from PLL0 */ /* CONFIG_LPC17_PLL1 */ /* Disable all peripheral clocks.  They must be configured by each device driver
   * when the device driver is initialized.
   */ /* Disable power to all peripherals (execpt GPIO).  Peripherals must be re-powered
   * one at a time by each device driver when the driver is initialized.
   */ /* Disable CLKOUT */ /* Configure FLASH */