FreeBSD/sys/dev/nxge/xgehal/xgehal-device.c
/*
 * __hal_device_xaui_configure
 * @hldev: HAL device handle.
 *
 * Configure XAUI Interface of Xena.
 *
 * To Configure the Xena's XAUI, one has to write a series
 * of 64 bit values into two registers in a particular
 * sequence. Hence a macro 'SWITCH_SIGN' has been defined
 * which will be defined in the array of configuration values
 * (default_dtx_cfg & default_mdio_cfg) at appropriate places
 * to switch writing from one regsiter to another. We continue
 * writing these values until we encounter the 'END_SIGN' macro.
 * For example, After making a series of 21 writes into
 * dtx_control register the 'SWITCH_SIGN' appears and hence we
 * start writing into mdio_control until we encounter END_SIGN.
 */
hal_device_xaui_configure
@hldev: HAL device handle.

Configure XAUI Interface of Xena.

To Configure the Xena's XAUI, one has to write a series
of 64 bit values into two registers in a particular
sequence. Hence a macro 'SWITCH_SIGN' has been defined
which will be defined in the array of configuration values
(default_dtx_cfg & default_mdio_cfg) at appropriate places
to switch writing from one regsiter to another. We continue
writing these values until we encounter the 'END_SIGN' macro.
For example, After making a series of 21 writes into
dtx_control register the 'SWITCH_SIGN' appears and hence we
start writing into mdio_control until we encounter END_SIGN.
hal_device_xaui_configure @hldev : HAL device handle . Configure XAUI Interface of Xena . To Configure the Xena ' s XAUI one has to write a series of 64 bit values into two registers in a particular sequence . Hence a macro ' SWITCH_SIGN ' has been defined which will be defined in the array of configuration values ( default_dtx_cfg & default_mdio_cfg ) at appropriate places to switch writing from one regsiter to another . We continue writing these values until we encounter the ' END_SIGN ' macro . For example After making a series of 21 writes into dtx_control register the ' SWITCH_SIGN ' appears and hence we start writing into mdio_control until we encounter END_SIGN .
static void
__hal_device_xaui_configure(xge_hal_device_t *hldev)
{
	xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
	int mdio_cnt = 0, dtx_cnt = 0;
	u64 *default_dtx_cfg = NULL, *default_mdio_cfg = NULL;
	if (xge_hal_device_check_id(hldev) == XGE_HAL_CARD_XENA) {
	    default_dtx_cfg = default_xena_dtx_cfg;
	    default_mdio_cfg = default_xena_mdio_cfg;
	} else if (xge_hal_device_check_id(hldev) == XGE_HAL_CARD_HERC) {
	    default_dtx_cfg = default_herc_dtx_cfg;
	    default_mdio_cfg = default_herc_mdio_cfg;
	} else {
	    xge_assert(default_dtx_cfg);
	return;
  }
	do {
	    dtx_cfg:
	    while (default_dtx_cfg[dtx_cnt] != END_SIGN) {
	        if (default_dtx_cfg[dtx_cnt] == SWITCH_SIGN) {
	            dtx_cnt++;
	            goto mdio_cfg;
	        }
	        __hal_serial_mem_write64(hldev, default_dtx_cfg[dtx_cnt],
	                       &bar0->dtx_control);
	        dtx_cnt++;
	    }
	    mdio_cfg:
	    while (default_mdio_cfg[mdio_cnt] != END_SIGN) {
	        if (default_mdio_cfg[mdio_cnt] == SWITCH_SIGN) {
	            mdio_cnt++;
	            goto dtx_cfg;
	        }
	        __hal_serial_mem_write64(hldev, default_mdio_cfg[mdio_cnt],
	            &bar0->mdio_control);
	        mdio_cnt++;
	    }
	} while ( !((default_dtx_cfg[dtx_cnt] == END_SIGN) &&
	        (default_mdio_cfg[mdio_cnt] == END_SIGN)) );
	xge_debug_device(XGE_TRACE, "%s", "XAUI interface configured");
}
static void __hal_device_xaui_configure ( xge_hal_device_t * hldev ) { xge_hal_pci_bar0_t * bar0 = ( xge_hal_pci_bar0_t * ) ( void * ) hldev -> bar0 ; int mdio_cnt = 0 , dtx_cnt = 0 ; u64 * default_dtx_cfg = NULL , * default_mdio_cfg = NULL ; if ( xge_hal_device_check_id ( hldev ) == XGE_HAL_CARD_XENA ) { default_dtx_cfg = default_xena_dtx_cfg ; default_mdio_cfg = default_xena_mdio_cfg ; } else if ( xge_hal_device_check_id ( hldev ) == XGE_HAL_CARD_HERC ) { default_dtx_cfg = default_herc_dtx_cfg ; default_mdio_cfg = default_herc_mdio_cfg ; } else { xge_assert ( default_dtx_cfg ) ; return ; } do { dtx_cfg : while ( default_dtx_cfg [ dtx_cnt ] != END_SIGN ) { if ( default_dtx_cfg [ dtx_cnt ] == SWITCH_SIGN ) { dtx_cnt ++ ; goto mdio_cfg ; } __hal_serial_mem_write64 ( hldev , default_dtx_cfg [ dtx_cnt ] , & bar0 -> dtx_control ) ; dtx_cnt ++ ; } mdio_cfg : while ( default_mdio_cfg [ mdio_cnt ] != END_SIGN ) { if ( default_mdio_cfg [ mdio_cnt ] == SWITCH_SIGN ) { mdio_cnt ++ ; goto dtx_cfg ; } __hal_serial_mem_write64 ( hldev , default_mdio_cfg [ mdio_cnt ] , & bar0 -> mdio_control ) ; mdio_cnt ++ ; } } while ( ! ( ( default_dtx_cfg [ dtx_cnt ] == END_SIGN ) && ( default_mdio_cfg [ mdio_cnt ] == END_SIGN ) ) ) ; xge_debug_device ( XGE_TRACE , " " , " " ) ; }
__hal_device_xaui_configure
 @hldev: HAL device handle.
__hal_device_xaui_configure @hldev : HAL device handle .