FreeBSD/sys/dev/cxgbe/common/t4_hw.c
/**
 *      t4_init_tp_params - initialize adap->params.tp
 *      @adap: the adapter
 *
 *      Initialize various fields of the adapter's TP Parameters structure.
 */
initialize adap->params.tp
@adap: the adapter

Initialize various fields of the adapter's TP Parameters structure.
initialize adap - > params . tp @adap : the adapter Initialize various fields of the adapter ' s TP Parameters structure .
int t4_init_tp_params(struct adapter *adap)
{
	int chan;
	u32 v;
	struct tp_params *tpp = &adap->params.tp;
	v = t4_read_reg(adap, A_TP_TIMER_RESOLUTION);
	tpp->tre = G_TIMERRESOLUTION(v);
	tpp->dack_re = G_DELAYEDACKRESOLUTION(v);
	for (chan = 0; chan < MAX_NCHAN; chan++)
		tpp->tx_modq[chan] = chan;
	read_filter_mode_and_ingress_config(adap);
	if (chip_id(adap) > CHELSIO_T5) {
		v = t4_read_reg(adap, A_TP_OUT_CONFIG);
		tpp->rx_pkt_encap = (v & F_CRXPKTENC) ? 1 : 0;
	}
	return 0;
}
int t4_init_tp_params ( struct adapter * adap ) { int chan ; u32 v ; struct tp_params * tpp = & adap -> params . tp ; v = t4_read_reg ( adap , A_TP_TIMER_RESOLUTION ) ; tpp -> tre = G_TIMERRESOLUTION ( v ) ; tpp -> dack_re = G_DELAYEDACKRESOLUTION ( v ) ; for ( chan = 0 ; chan < MAX_NCHAN ; chan ++ ) tpp -> tx_modq [ chan ] = chan ; read_filter_mode_and_ingress_config ( adap ) ; if ( chip_id ( adap ) > CHELSIO_T5 ) { v = t4_read_reg ( adap , A_TP_OUT_CONFIG ) ; tpp -> rx_pkt_encap = ( v & F_CRXPKTENC ) ? 1 : 0 ; } return 0 ; }
t4_init_tp_params - initialize adap->params.tp
      @adap: the adapter
t4_init_tp_params - initialize adap - > params . tp @adap : the adapter
/* MODQ_REQ_MAP defaults to setting queues 0-3 to chan 0-3 */ /*
	 * For T6, cache the adapter's compressed error vector
	 * and passing outer header info for encapsulated packets.
	 */