FreeBSD/sys/dev/cxgbe/common/t4_hw.c
/**
 *	t4_set_trace_filter - configure one of the tracing filters
 *	@adap: the adapter
 *	@tp: the desired trace filter parameters
 *	@idx: which filter to configure
 *	@enable: whether to enable or disable the filter
 *
 *	Configures one of the tracing filters available in HW.  If @tp is %NULL
 *	it indicates that the filter is already written in the register and it
 *	just needs to be enabled or disabled.
 */
configure one of the tracing filters
@adap: the adapter
@tp: the desired trace filter parameters
@idx: which filter to configure
@enable: whether to enable or disable the filter

Configures one of the tracing filters available in HW.  If @tp is %NULL
it indicates that the filter is already written in the register and it
just needs to be enabled or disabled.
configure one of the tracing filters @adap : the adapter @tp : the desired trace filter parameters @idx : which filter to configure @enable : whether to enable or disable the filter Configures one of the tracing filters available in HW . If @tp is %NULL it indicates that the filter is already written in the register and it just needs to be enabled or disabled .
int t4_set_trace_filter(struct adapter *adap, const struct trace_params *tp,
    int idx, int enable)
{
	int i, ofst = idx * 4;
	u32 data_reg, mask_reg, cfg;
	u32 multitrc = F_TRCMULTIFILTER;
	u32 en = is_t4(adap) ? F_TFEN : F_T5_TFEN;
	if (idx < 0 || idx >= NTRACE)
		return -EINVAL;
	if (tp == NULL || !enable) {
		t4_set_reg_field(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst, en,
		    enable ? en : 0);
		return 0;
	}
	cfg = t4_read_reg(adap, A_MPS_TRC_CFG);
	if (cfg & F_TRCMULTIFILTER) {
		if (tp->snap_len > ((10 * 1024 / 4) - (2 * 8)))
			return -EINVAL;
	} else {
		multitrc = 0;
		if (tp->snap_len > 9600 || idx)
			return -EINVAL;
	}
	if (tp->port > (is_t4(adap) ? 11 : 19) || tp->invert > 1 ||
	    tp->skip_len > M_TFLENGTH || tp->skip_ofst > M_TFOFFSET ||
	    tp->min_len > M_TFMINPKTSIZE)
		return -EINVAL;
	t4_set_reg_field(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst, en, 0);
	idx *= (A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH);
	data_reg = A_MPS_TRC_FILTER0_MATCH + idx;
	mask_reg = A_MPS_TRC_FILTER0_DONT_CARE + idx;
	for (i = 0; i < TRACE_LEN / 4; i++, data_reg += 4, mask_reg += 4) {
		t4_write_reg(adap, data_reg, tp->data[i]);
		t4_write_reg(adap, mask_reg, ~tp->mask[i]);
	}
	t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_B + ofst,
		     V_TFCAPTUREMAX(tp->snap_len) |
		     V_TFMINPKTSIZE(tp->min_len));
	t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst,
		     V_TFOFFSET(tp->skip_ofst) | V_TFLENGTH(tp->skip_len) | en |
		     (is_t4(adap) ?
		     V_TFPORT(tp->port) | V_TFINVERTMATCH(tp->invert) :
		     V_T5_TFPORT(tp->port) | V_T5_TFINVERTMATCH(tp->invert)));
	return 0;
}
int t4_set_trace_filter ( struct adapter * adap , const struct trace_params * tp , int idx , int enable ) { int i , ofst = idx * 4 ; u32 data_reg , mask_reg , cfg ; u32 multitrc = F_TRCMULTIFILTER ; u32 en = is_t4 ( adap ) ? F_TFEN : F_T5_TFEN ; if ( idx < 0 || idx >= NTRACE ) return - EINVAL ; if ( tp == NULL || ! enable ) { t4_set_reg_field ( adap , A_MPS_TRC_FILTER_MATCH_CTL_A + ofst , en , enable ? en : 0 ) ; return 0 ; } cfg = t4_read_reg ( adap , A_MPS_TRC_CFG ) ; if ( cfg & F_TRCMULTIFILTER ) { if ( tp -> snap_len > ( ( 10 * 1024 / 4 ) - ( 2 * 8 ) ) ) return - EINVAL ; } else { multitrc = 0 ; if ( tp -> snap_len > 9600 || idx ) return - EINVAL ; } if ( tp -> port > ( is_t4 ( adap ) ? 11 : 19 ) || tp -> invert > 1 || tp -> skip_len > M_TFLENGTH || tp -> skip_ofst > M_TFOFFSET || tp -> min_len > M_TFMINPKTSIZE ) return - EINVAL ; t4_set_reg_field ( adap , A_MPS_TRC_FILTER_MATCH_CTL_A + ofst , en , 0 ) ; idx *= ( A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH ) ; data_reg = A_MPS_TRC_FILTER0_MATCH + idx ; mask_reg = A_MPS_TRC_FILTER0_DONT_CARE + idx ; for ( i = 0 ; i < TRACE_LEN / 4 ; i ++ , data_reg += 4 , mask_reg += 4 ) { t4_write_reg ( adap , data_reg , tp -> data [ i ] ) ; t4_write_reg ( adap , mask_reg , ~ tp -> mask [ i ] ) ; } t4_write_reg ( adap , A_MPS_TRC_FILTER_MATCH_CTL_B + ofst , V_TFCAPTUREMAX ( tp -> snap_len ) | V_TFMINPKTSIZE ( tp -> min_len ) ) ; t4_write_reg ( adap , A_MPS_TRC_FILTER_MATCH_CTL_A + ofst , V_TFOFFSET ( tp -> skip_ofst ) | V_TFLENGTH ( tp -> skip_len ) | en | ( is_t4 ( adap ) ? V_TFPORT ( tp -> port ) | V_TFINVERTMATCH ( tp -> invert ) : V_T5_TFPORT ( tp -> port ) | V_T5_TFINVERTMATCH ( tp -> invert ) ) ) ; return 0 ; }
t4_set_trace_filter - configure one of the tracing filters
      @adap: the adapter
      @tp: the desired trace filter parameters
      @idx: which filter to configure
      @enable: whether to enable or disable the filter
t4_set_trace_filter - configure one of the tracing filters @adap : the adapter @tp : the desired trace filter parameters @idx : which filter to configure @enable : whether to enable or disable the filter
/*
	 * TODO - After T4 data book is updated, specify the exact
	 * section below.
	 *
	 * See T4 data book - MPS section for a complete description
	 * of the below if..else handling of A_MPS_TRC_CFG register
	 * value.
	 */ /*
		 * If multiple tracers are enabled, then maximum
		 * capture size is 2.5KB (FIFO size of a single channel)
		 * minus 2 flits for CPL_TRACE_PKT header.
		 */ /*
		 * If multiple tracers are disabled, to avoid deadlocks
		 * maximum packet capture size of 9600 bytes is recommended.
		 * Also in this mode, only trace0 can be enabled and running.
		 */ /* stop the tracer we'll be changing */