kernels/linux-2.4.0/drivers/scsi/cpqfcTSinit.c
/* local function to load our per-HBA (local) data for chip
   registers, FC link state, all FC exchanges, etc.

   We allocate space and compute address offsets for the
   most frequently accessed addresses; others (like World Wide
   Name) are not necessary.
   
*/
local function to load our per-HBA (local) data for chip
registers, FC link state, all FC exchanges, etc.

We allocate space and compute address offsets for the
most frequently accessed addresses; others (like World Wide
Name) are not necessary.
local function to load our per - HBA ( local ) data for chip registers FC link state all FC exchanges etc . We allocate space and compute address offsets for the most frequently accessed addresses ; others ( like World Wide Name ) are not necessary .
static void Cpqfc_initHBAdata( CPQFCHBA *cpqfcHBAdata, struct pci_dev *PciDev )
{
  cpqfcHBAdata->PciDev = PciDev; 
  cpqfcHBAdata->fcChip.Registers.IOBaseL = 
    PciDev->base_address[1] & PCI_BASE_ADDRESS_IO_MASK;
  cpqfcHBAdata->fcChip.Registers.IOBaseU = 
    PciDev->base_address[2] & PCI_BASE_ADDRESS_IO_MASK;
  cpqfcHBAdata->fcChip.Registers.MemBase = 
    PciDev->base_address[3] & PCI_BASE_ADDRESS_MEM_MASK;
  cpqfcHBAdata->fcChip.Registers.ReMapMemBase = 
    ioremap( PciDev->base_address[3] & PCI_BASE_ADDRESS_MEM_MASK,
             0x200);
  cpqfcHBAdata->fcChip.Registers.RAMBase = 
    PciDev->base_address[4];
  cpqfcHBAdata->fcChip.Registers.SROMBase =  
    PciDev->base_address[5];
  cpqfcHBAdata->fcChip.Registers.SFQconsumerIndex.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_SFQ_CONSUMER_INDEX;
  cpqfcHBAdata->fcChip.Registers.ERQproducerIndex.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_ERQ_PRODUCER_INDEX;
  cpqfcHBAdata->fcChip.Registers.FMconfig.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_CONFIG;
  cpqfcHBAdata->fcChip.Registers.FMcontrol.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_CONTROL;
  cpqfcHBAdata->fcChip.Registers.FMstatus.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_STATUS;
  cpqfcHBAdata->fcChip.Registers.FMLinkStatus1.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_LINK_STAT1;
  cpqfcHBAdata->fcChip.Registers.FMLinkStatus2.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_LINK_STAT2;
  cpqfcHBAdata->fcChip.Registers.FMBB_CreditZero.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_BB_CREDIT0;
  cpqfcHBAdata->fcChip.Registers.TYconfig.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_TACH_CONFIG;
  cpqfcHBAdata->fcChip.Registers.TYcontrol.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_TACH_CONTROL;
  cpqfcHBAdata->fcChip.Registers.TYstatus.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_TACH_STATUS;
  cpqfcHBAdata->fcChip.Registers.rcv_al_pa.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_RCV_AL_PA;
  cpqfcHBAdata->fcChip.Registers.ed_tov.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + TL_MEM_FM_ED_TOV;
  cpqfcHBAdata->fcChip.Registers.INTEN.address = 
	        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + IINTEN;
  cpqfcHBAdata->fcChip.Registers.INTPEND.address = 
	        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + IINTPEND;
  cpqfcHBAdata->fcChip.Registers.INTSTAT.address = 
        cpqfcHBAdata->fcChip.Registers.ReMapMemBase + IINTSTAT;
  DEBUG_PCI(printk("  cpqfcHBAdata->fcChip.Registers. :\n"));
  DEBUG_PCI(printk("    IOBaseL = %x\n", 
    cpqfcHBAdata->fcChip.Registers.IOBaseL));
  DEBUG_PCI(printk("    IOBaseU = %x\n", 
    cpqfcHBAdata->fcChip.Registers.IOBaseU));
  printk(" ioremap'd Membase: %p\n", cpqfcHBAdata->fcChip.Registers.ReMapMemBase);
  DEBUG_PCI(printk("    SFQconsumerIndex.address = %p\n", 
    cpqfcHBAdata->fcChip.Registers.SFQconsumerIndex.address));
  DEBUG_PCI(printk("    ERQproducerIndex.address = %p\n", 
    cpqfcHBAdata->fcChip.Registers.ERQproducerIndex.address));
  DEBUG_PCI(printk("    TYconfig.address = %p\n", 
    cpqfcHBAdata->fcChip.Registers.TYconfig.address));
  DEBUG_PCI(printk("    FMconfig.address = %p\n", 
    cpqfcHBAdata->fcChip.Registers.FMconfig.address));
  DEBUG_PCI(printk("    FMcontrol.address = %p\n", 
    cpqfcHBAdata->fcChip.Registers.FMcontrol.address));
  cpqfcHBAdata->fcChip.Options.initiator = 1;  
  cpqfcHBAdata->fcChip.Options.target = 0;     
  cpqfcHBAdata->fcChip.Options.extLoopback = 0;
  cpqfcHBAdata->fcChip.Options.intLoopback = 0;
  cpqfcHBAdata->fcChip.highest_FCPH_ver = FC_PH3;
  cpqfcHBAdata->fcChip.lowest_FCPH_ver = FC_PH43;
  cpqfcHBAdata->fcChip.ResetTachyon = CpqTsResetTachLite;
  cpqfcHBAdata->fcChip.FreezeTachyon = CpqTsFreezeTachlite;
  cpqfcHBAdata->fcChip.UnFreezeTachyon = CpqTsUnFreezeTachlite;
  cpqfcHBAdata->fcChip.CreateTachyonQues = CpqTsCreateTachLiteQues;
  cpqfcHBAdata->fcChip.DestroyTachyonQues = CpqTsDestroyTachLiteQues;
  cpqfcHBAdata->fcChip.InitializeTachyon = CpqTsInitializeTachLite;  
  cpqfcHBAdata->fcChip.LaserControl = CpqTsLaserControl;  
  cpqfcHBAdata->fcChip.ProcessIMQEntry = CpqTsProcessIMQEntry;
  cpqfcHBAdata->fcChip.InitializeFrameManager = CpqTsInitializeFrameManager;;  
  cpqfcHBAdata->fcChip.ReadWriteWWN = CpqTsReadWriteWWN;
  cpqfcHBAdata->fcChip.ReadWriteNVRAM = CpqTsReadWriteNVRAM;
}
static void Cpqfc_initHBAdata ( CPQFCHBA * cpqfcHBAdata , struct pci_dev * PciDev ) { cpqfcHBAdata -> PciDev = PciDev ; cpqfcHBAdata -> fcChip . Registers . IOBaseL = PciDev -> base_address [ 1 ] & PCI_BASE_ADDRESS_IO_MASK ; cpqfcHBAdata -> fcChip . Registers . IOBaseU = PciDev -> base_address [ 2 ] & PCI_BASE_ADDRESS_IO_MASK ; cpqfcHBAdata -> fcChip . Registers . MemBase = PciDev -> base_address [ 3 ] & PCI_BASE_ADDRESS_MEM_MASK ; cpqfcHBAdata -> fcChip . Registers . ReMapMemBase = ioremap ( PciDev -> base_address [ 3 ] & PCI_BASE_ADDRESS_MEM_MASK , 0x200 ) ; cpqfcHBAdata -> fcChip . Registers . RAMBase = PciDev -> base_address [ 4 ] ; cpqfcHBAdata -> fcChip . Registers . SROMBase = PciDev -> base_address [ 5 ] ; cpqfcHBAdata -> fcChip . Registers . SFQconsumerIndex . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_SFQ_CONSUMER_INDEX ; cpqfcHBAdata -> fcChip . Registers . ERQproducerIndex . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_ERQ_PRODUCER_INDEX ; cpqfcHBAdata -> fcChip . Registers . FMconfig . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_CONFIG ; cpqfcHBAdata -> fcChip . Registers . FMcontrol . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_CONTROL ; cpqfcHBAdata -> fcChip . Registers . FMstatus . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_STATUS ; cpqfcHBAdata -> fcChip . Registers . FMLinkStatus1 . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_LINK_STAT1 ; cpqfcHBAdata -> fcChip . Registers . FMLinkStatus2 . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_LINK_STAT2 ; cpqfcHBAdata -> fcChip . Registers . FMBB_CreditZero . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_BB_CREDIT0 ; cpqfcHBAdata -> fcChip . Registers . TYconfig . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_TACH_CONFIG ; cpqfcHBAdata -> fcChip . Registers . TYcontrol . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_TACH_CONTROL ; cpqfcHBAdata -> fcChip . Registers . TYstatus . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_TACH_STATUS ; cpqfcHBAdata -> fcChip . Registers . rcv_al_pa . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_RCV_AL_PA ; cpqfcHBAdata -> fcChip . Registers . ed_tov . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + TL_MEM_FM_ED_TOV ; cpqfcHBAdata -> fcChip . Registers . INTEN . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + IINTEN ; cpqfcHBAdata -> fcChip . Registers . INTPEND . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + IINTPEND ; cpqfcHBAdata -> fcChip . Registers . INTSTAT . address = cpqfcHBAdata -> fcChip . Registers . ReMapMemBase + IINTSTAT ; DEBUG_PCI ( printk ( " \n " ) ) ; DEBUG_PCI ( printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . IOBaseL ) ) ; DEBUG_PCI ( printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . IOBaseU ) ) ; printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . ReMapMemBase ) ; DEBUG_PCI ( printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . SFQconsumerIndex . address ) ) ; DEBUG_PCI ( printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . ERQproducerIndex . address ) ) ; DEBUG_PCI ( printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . TYconfig . address ) ) ; DEBUG_PCI ( printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . FMconfig . address ) ) ; DEBUG_PCI ( printk ( " \n " , cpqfcHBAdata -> fcChip . Registers . FMcontrol . address ) ) ; cpqfcHBAdata -> fcChip . Options . initiator = 1 ; cpqfcHBAdata -> fcChip . Options . target = 0 ; cpqfcHBAdata -> fcChip . Options . extLoopback = 0 ; cpqfcHBAdata -> fcChip . Options . intLoopback = 0 ; cpqfcHBAdata -> fcChip . highest_FCPH_ver = FC_PH3 ; cpqfcHBAdata -> fcChip . lowest_FCPH_ver = FC_PH43 ; cpqfcHBAdata -> fcChip . ResetTachyon = CpqTsResetTachLite ; cpqfcHBAdata -> fcChip . FreezeTachyon = CpqTsFreezeTachlite ; cpqfcHBAdata -> fcChip . UnFreezeTachyon = CpqTsUnFreezeTachlite ; cpqfcHBAdata -> fcChip . CreateTachyonQues = CpqTsCreateTachLiteQues ; cpqfcHBAdata -> fcChip . DestroyTachyonQues = CpqTsDestroyTachLiteQues ; cpqfcHBAdata -> fcChip . InitializeTachyon = CpqTsInitializeTachLite ; cpqfcHBAdata -> fcChip . LaserControl = CpqTsLaserControl ; cpqfcHBAdata -> fcChip . ProcessIMQEntry = CpqTsProcessIMQEntry ; cpqfcHBAdata -> fcChip . InitializeFrameManager = CpqTsInitializeFrameManager ; ; cpqfcHBAdata -> fcChip . ReadWriteWWN = CpqTsReadWriteWWN ; cpqfcHBAdata -> fcChip . ReadWriteNVRAM = CpqTsReadWriteNVRAM ; }
local function to load our per-HBA (local) data for chip
registers, FC link state, all FC exchanges, etc.
local function to load our per - HBA ( local ) data for chip registers FC link state all FC exchanges etc .
// copy PCI info ptr // since x86 port space is 64k, we only need the lower 16 bits // 32-bit memory addresses // NULL for HP TS adapter // now the Tachlite chip registers // the REGISTER struct holds both the physical address & last // written value (some TL registers are WRITE ONLY) // TL Frame Manager // TL Control Regs // set default options for FC controller (chip) // default: SCSI initiator // default: SCSI target // default: no loopback @GBIC // default: no loopback inside chip // set highest and lowest FC-PH version the adapter/driver supports // (NOT strict compliance) // set function points for this controller / adapter