Platform/ECM3532/DSP/hw/csp/ecm3532/src/eta_csp_spi.c
/***************************************************************************/
/**
 *
 * EtaCspSpiInit - Initialize the SPI module.
 *
 * @param tSpiConfig is the SPI Configurtation struct
 *
 * The function takes the parameters set in the struct and initializes the
 * SPI module. The source clock to SPI has to be set at 8MHz. Note that the
 * source clock speed configurable, and can be set to either 8MHz (default),
 * 4MHz, or 2MHz. SPI will function correctly only when the source clock is
 * 8MHz.
 *
 * > The source clock has to be 8MHz. Make sure you set this correctly before
 *   initializing the SPI. Don't change the source clock after initializing the
 *   SPI.
 *
 * @return Returns eEtaSuccess if initialization was successful.
 *
 ******************************************************************************/
Initialize the SPI module.
@param tSpiConfig is the SPI Configurtation struct

The function takes the parameters set in the struct and initializes the
SPI module. The source clock to SPI has to be set at 8MHz. Note that the
source clock speed configurable, and can be set to either 8MHz (default),
4MHz, or 2MHz. SPI will function correctly only when the source clock is
8MHz.

> The source clock has to be 8MHz. Make sure you set this correctly before
initializing the SPI. Don't change the source clock after initializing the
SPI.

@return Returns eEtaSuccess if initialization was successful.
Initialize the SPI module . @param tSpiConfig is the SPI Configurtation struct The function takes the parameters set in the struct and initializes the SPI module . The source clock to SPI has to be set at 8MHz . Note that the source clock speed configurable and can be set to either 8MHz ( default ) 4MHz or 2MHz . SPI will function correctly only when the source clock is 8MHz . > The source clock has to be 8MHz . Make sure you set this correctly before initializing the SPI . Don ' t change the source clock after initializing the SPI . @return Returns eEtaSuccess if initialization was successful .
tEtaStatus
EtaCspSpiInit(tSpiConfig iSpiConfig)
{
    uint16_t spi_config;
    uint16_t spi_config2;
    uint16_t spi_divclk;
    uint16_t hfo_freq;
    uint16_t spi_clk_freq;
    spi_config = (iSpiConfig.ui8IntSize << BP_SPI2_CONFIG_FIFO_LEVEL_TRIG) |
                 (iSpiConfig.spiBitEndian << BP_SPI2_CONFIG_END)           |
                 (iSpiConfig.spiClkPhase << BP_SPI2_CONFIG_CPHA)           |
                 (iSpiConfig.spiClkPol << BP_SPI2_CONFIG_CPOL);
    spi_config2 =
        (iSpiConfig.spiByteEndian << BP_SPI2_CONFIG2_RX_BYTE2_END) |
        (iSpiConfig.spiByteEndian << BP_SPI2_CONFIG2_TX_BYTE2_END) |
        (0x1 << BP_SPI2_CONFIG2_AGGR_CLK_GATING)                   |
        (0x1 << BP_SPI2_CONFIG2_STALL_IF_RXFULL);
    hfo_freq = 8000;
    spi_clk_freq = iSpiConfig.spiClkFreq;
    if((spi_clk_freq * 2) > hfo_freq) 
    {
        return(eEtaSpiInvalidConfig);
    }
    if((spi_clk_freq << 4) < hfo_freq) 
    {
        return(eEtaSpiInvalidConfig);
    }
    spi_divclk = ((hfo_freq / spi_clk_freq) - 1) & BM_SPI2_CLKDIV_CLKDIV;
    switch(spi_divclk)
    {
        case (0):
        {
            return(eEtaSpiInvalidConfig);
            break; 
        }
        case (1):
        {
            spi_config2 |= (1 << BP_SPI2_CONFIG2_RX_SAMPLE_TIME) |
                           BM_SPI2_CONFIG2_DISABLE_MISO_METAFLOP;
            break;
        }
        case (2):
        {
            spi_config2 |= (2 << BP_SPI2_CONFIG2_RX_SAMPLE_TIME);
            break;
        }
        default:
        { }
        break;
    }
    if(iSpiConfig.ui8ICG == 0xff)
    {
        spi_divclk |= (spi_divclk & BM_SPI2_CLKDIV_CLKDIV) <<
                      BP_SPI2_CLKDIV_ICG;
    }
    else
    {
        spi_divclk |= (iSpiConfig.ui8ICG & BM_SPI2_CLKDIV_ICG) <<
                      BP_SPI2_CLKDIV_ICG;
    }
    if(iSpiConfig.ui8IBG == 0xff)
    {
        spi_divclk |= (spi_divclk & BM_SPI2_CLKDIV_CLKDIV) <<
                      BP_SPI2_CLKDIV_IBG;
    }
    else
    {
        spi_divclk |= (iSpiConfig.ui8IBG & BM_SPI2_CLKDIV_IBG) <<
                      BP_SPI2_CLKDIV_IBG;
    }
    REG_SPI2_CONFIG = spi_config;
    REG_SPI2_CONFIG2 = spi_config2;
    REG_SPI2_CLKDIV = spi_divclk;
    return(eEtaSuccess);
}
tEtaStatus EtaCspSpiInit ( tSpiConfig iSpiConfig ) { uint16_t spi_config ; uint16_t spi_config2 ; uint16_t spi_divclk ; uint16_t hfo_freq ; uint16_t spi_clk_freq ; spi_config = ( iSpiConfig . ui8IntSize << BP_SPI2_CONFIG_FIFO_LEVEL_TRIG ) | ( iSpiConfig . spiBitEndian << BP_SPI2_CONFIG_END ) | ( iSpiConfig . spiClkPhase << BP_SPI2_CONFIG_CPHA ) | ( iSpiConfig . spiClkPol << BP_SPI2_CONFIG_CPOL ) ; spi_config2 = ( iSpiConfig . spiByteEndian << BP_SPI2_CONFIG2_RX_BYTE2_END ) | ( iSpiConfig . spiByteEndian << BP_SPI2_CONFIG2_TX_BYTE2_END ) | ( 0x1 << BP_SPI2_CONFIG2_AGGR_CLK_GATING ) | ( 0x1 << BP_SPI2_CONFIG2_STALL_IF_RXFULL ) ; hfo_freq = 8000 ; spi_clk_freq = iSpiConfig . spiClkFreq ; if ( ( spi_clk_freq * 2 ) > hfo_freq ) { return ( eEtaSpiInvalidConfig ) ; } if ( ( spi_clk_freq << 4 ) < hfo_freq ) { return ( eEtaSpiInvalidConfig ) ; } spi_divclk = ( ( hfo_freq / spi_clk_freq ) - 1 ) & BM_SPI2_CLKDIV_CLKDIV ; switch ( spi_divclk ) { case ( 0 ) : { return ( eEtaSpiInvalidConfig ) ; break ; } case ( 1 ) : { spi_config2 |= ( 1 << BP_SPI2_CONFIG2_RX_SAMPLE_TIME ) | BM_SPI2_CONFIG2_DISABLE_MISO_METAFLOP ; break ; } case ( 2 ) : { spi_config2 |= ( 2 << BP_SPI2_CONFIG2_RX_SAMPLE_TIME ) ; break ; } default : { } break ; } if ( iSpiConfig . ui8ICG == 0xff ) { spi_divclk |= ( spi_divclk & BM_SPI2_CLKDIV_CLKDIV ) << BP_SPI2_CLKDIV_ICG ; } else { spi_divclk |= ( iSpiConfig . ui8ICG & BM_SPI2_CLKDIV_ICG ) << BP_SPI2_CLKDIV_ICG ; } if ( iSpiConfig . ui8IBG == 0xff ) { spi_divclk |= ( spi_divclk & BM_SPI2_CLKDIV_CLKDIV ) << BP_SPI2_CLKDIV_IBG ; } else { spi_divclk |= ( iSpiConfig . ui8IBG & BM_SPI2_CLKDIV_IBG ) << BP_SPI2_CLKDIV_IBG ; } REG_SPI2_CONFIG = spi_config ; REG_SPI2_CONFIG2 = spi_config2 ; REG_SPI2_CLKDIV = spi_divclk ; return ( eEtaSuccess ) ; }
EtaCspSpiInit - Initialize the SPI module.
EtaCspSpiInit - Initialize the SPI module .
// Configurations // assume 8MHz, this may not be true at all times and could be 4Mhz (maybe // 2MHz too?) // FIXME (need much more complex config with M3 sending literally one word // to make this work // or some kind of compile option) // Check if desired close is within range // Cannot achieve freq (max) // Cannot achieve freq (min) // Add some subtle tweaks for corner cases // Illegal // Add in inter command gap // Add in inter byte gap