Platform/ECM3532/M3/hw/csp/ecm3532/m3/csp/src/eta_csp_spi.c
/***************************************************************************/
/**
 *
 *  EtaCspSpiProcessIntTxData - Process SPI Interrupt for TX Space Available
 *
 *  @param iNum the SPI number.
 *
 ******************************************************************************/
Process SPI Interrupt for TX Space Available
@param iNum the SPI number.
Process SPI Interrupt for TX Space Available @param iNum the SPI number .
tEtaStatus EtaCspSpiProcessIntTxData (tSpiNum iNum)
{
  uint8_t ui8SpaceInFifo;
  if ((g_pEtaCspSpiCmd[iNum]->bCmdActive == 0) || (g_pEtaCspSpiCmd[iNum]->ui32TxLen == 0))
  {
#ifdef ETA_CSP_SPI_DEBUG
    ETA_DIAGS_PRINTF("ERROR: received spi_int_tx but command is done. bCmdActive=%x  ui32TxLen=%x\r\n", g_pEtaCspSpiCmd[iNum]->bCmdActive, g_pEtaCspSpiCmd[iNum]->ui32TxLen);
#endif
    return eEtaSpiCmdSequenceErr;
  }
  if (ETA_CSP_SPI_EN_GREEDY_INT) 
  {
    ui8SpaceInFifo = 16-(MEMIO8(REG_SPI_TX_FIFO_DEBUG_ADDR (iNum)) & BM_SPI_TX_FIFO_DEBUG_ENTRIES);
  }
  else
  {
    ui8SpaceInFifo = g_pEtaCspSpiCmd[iNum]->ui8TxIntSize; 
  }
#ifdef ETA_CSP_SPI_DETAILED_DEBUG
  ETA_DIAGS_PRINTF("DETAILED_SPI:SPI TX interrupt: Space for %d bytes starting with %x\r\n", ui8SpaceInFifo, *g_pEtaCspSpiCmd[iNum]->pui8TxData);
#endif
  do
  {
    MEMIO8(REG_SPI_TXRX_1BYTE_FIFO_DATA_ADDR (iNum)) = *g_pEtaCspSpiCmd[iNum]->pui8TxData++;
    g_pEtaCspSpiCmd[iNum]->ui32TxLen--;
    if (g_pEtaCspSpiCmd[iNum]->ui32TxLen == 0)
    {
      break; 
    }
  }
  while (--ui8SpaceInFifo);
  if (g_pEtaCspSpiCmd[iNum]->ui32TxLen == 0) 
  {
    REG_SPI_TX_DUMMY_BYTE_CNT(iNum).V = g_pEtaCspSpiCmd[iNum]->ui32RxLen;
    if (g_pEtaCspSpiCmd[iNum]->iSpiSequence & eSpiSequenceLastOnly)
    {
      REG_SPI_STATUS(iNum).V = 0;
    }
    REGN_M1(iNum, SPI_INT_EN, TXFIFO_HAS_LEVEL_SPACE_EN0, 0);
    REG_SPI_CONFIG(iNum).BF.FIFO_LEVEL_TRIG = g_pEtaCspSpiCmd[iNum]->ui8RxIntSize;
#ifdef ETA_CSP_SPI_DETAILED_DEBUG
    ETA_DIAGS_PRINTF("DETAILED_SPI:Last SPI TX data interrupt\r\n");
#endif
  }
  return eEtaSuccess;
}
tEtaStatus EtaCspSpiProcessIntTxData ( tSpiNum iNum ) { uint8_t ui8SpaceInFifo ; if ( ( g_pEtaCspSpiCmd [ iNum ] -> bCmdActive == 0 ) || ( g_pEtaCspSpiCmd [ iNum ] -> ui32TxLen == 0 ) ) { #ifdef ETA_CSP_SPI_DEBUG ETA_DIAGS_PRINTF ( " \r \n " , g_pEtaCspSpiCmd [ iNum ] -> bCmdActive , g_pEtaCspSpiCmd [ iNum ] -> ui32TxLen ) ; #endif return eEtaSpiCmdSequenceErr ; } if ( ETA_CSP_SPI_EN_GREEDY_INT ) { ui8SpaceInFifo = 16 - ( MEMIO8 ( REG_SPI_TX_FIFO_DEBUG_ADDR ( iNum ) ) & BM_SPI_TX_FIFO_DEBUG_ENTRIES ) ; } else { ui8SpaceInFifo = g_pEtaCspSpiCmd [ iNum ] -> ui8TxIntSize ; } #ifdef ETA_CSP_SPI_DETAILED_DEBUG ETA_DIAGS_PRINTF ( " \r \n " , ui8SpaceInFifo , * g_pEtaCspSpiCmd [ iNum ] -> pui8TxData ) ; #endif do { MEMIO8 ( REG_SPI_TXRX_1BYTE_FIFO_DATA_ADDR ( iNum ) ) = * g_pEtaCspSpiCmd [ iNum ] -> pui8TxData ++ ; g_pEtaCspSpiCmd [ iNum ] -> ui32TxLen -- ; if ( g_pEtaCspSpiCmd [ iNum ] -> ui32TxLen == 0 ) { break ; } } while ( -- ui8SpaceInFifo ) ; if ( g_pEtaCspSpiCmd [ iNum ] -> ui32TxLen == 0 ) { REG_SPI_TX_DUMMY_BYTE_CNT ( iNum ) . V = g_pEtaCspSpiCmd [ iNum ] -> ui32RxLen ; if ( g_pEtaCspSpiCmd [ iNum ] -> iSpiSequence & eSpiSequenceLastOnly ) { REG_SPI_STATUS ( iNum ) . V = 0 ; } REGN_M1 ( iNum , SPI_INT_EN , TXFIFO_HAS_LEVEL_SPACE_EN0 , 0 ) ; REG_SPI_CONFIG ( iNum ) . BF . FIFO_LEVEL_TRIG = g_pEtaCspSpiCmd [ iNum ] -> ui8RxIntSize ; #ifdef ETA_CSP_SPI_DETAILED_DEBUG ETA_DIAGS_PRINTF ( " \r \n " ) ; #endif } return eEtaSuccess ; }
EtaCspSpiProcessIntTxData - Process SPI Interrupt for TX Space Available
  @param iNum the SPI number.
EtaCspSpiProcessIntTxData - Process SPI Interrupt for TX Space Available @param iNum the SPI number .
// This allows for burst writes, which is more efficient, but not requires an extra read. // Do work that interrupt said we have space for // Exit loop, we're done. // Just sent last byte. Lets turn off TX has space interrupt and send dummy bytes // If it is Last, end command // At this point, all TX is in the queue. Remove hold