kernels/linux-2.4.0/arch/arm/nwfpe/softfloat.c
/*
-------------------------------------------------------------------------------
Returns the result of converting the quadruple-precision floating-point
value `a' to the 32-bit two's complement integer format.  The conversion
is performed according to the IEC/IEEE Standard for Binary Floating-point
Arithmetic, except that the conversion is always rounded toward zero.  If
`a' is a NaN, the largest positive integer is returned.  Otherwise, if the
conversion overflows, the largest integer with the same sign as `a' is
returned.
-------------------------------------------------------------------------------
*/
Returns the result of converting the quadruple-precision floating-point
value `a' to the 32-bit two's complement integer format.  The conversion
is performed according to the IEC/IEEE Standard for Binary Floating-point
Arithmetic, except that the conversion is always rounded toward zero.  If
`a' is a NaN, the largest positive integer is returned.  Otherwise, if the
conversion overflows, the largest integer with the same sign as `a' is
returned.
Returns the result of converting the quadruple - precision floating - point value ` a ' to the 32 - bit two ' s complement integer format . The conversion is performed according to the IEC / IEEE Standard for Binary Floating - point Arithmetic except that the conversion is always rounded toward zero . If ` a ' is a NaN the largest positive integer is returned . Otherwise if the conversion overflows the largest integer with the same sign as ` a ' is returned .
int32 float128_to_int32_round_to_zero( float128 a )
{
    flag aSign;
    int32 aExp, shiftCount;
    bits64 aSig0, aSig1, savedASig;
    int32 z;
    aSig1 = extractFloat128Frac1( a );
    aSig0 = extractFloat128Frac0( a );
    aExp = extractFloat128Exp( a );
    aSign = extractFloat128Sign( a );
    aSig0 |= ( aSig1 != 0 );
    shiftCount = 0x402F - aExp;
    if ( shiftCount < 17 ) {
        if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
        goto invalid;
    }
    else if ( 48 < shiftCount ) {
        if ( aExp || aSig0 ) float_exception_flags |= float_flag_inexact;
        return 0;
    }
    aSig0 |= LIT64( 0x0001000000000000 );
    savedASig = aSig0;
    aSig0 >>= shiftCount;
    z = aSig0;
    if ( aSign ) z = - z;
    if ( ( z < 0 ) ^ aSign ) {
 invalid:
        float_exception_flags |= float_flag_invalid;
        return aSign ? 0x80000000 : 0x7FFFFFFF;
    }
    if ( ( aSig0<<shiftCount ) != savedASig ) {
        float_exception_flags |= float_flag_inexact;
    }
    return z;
}
int32 float128_to_int32_round_to_zero ( float128 a ) { flag aSign ; int32 aExp , shiftCount ; bits64 aSig0 , aSig1 , savedASig ; int32 z ; aSig1 = extractFloat128Frac1 ( a ) ; aSig0 = extractFloat128Frac0 ( a ) ; aExp = extractFloat128Exp ( a ) ; aSign = extractFloat128Sign ( a ) ; aSig0 |= ( aSig1 != 0 ) ; shiftCount = 0x402F - aExp ; if ( shiftCount < 17 ) { if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0 ; goto invalid ; } else if ( 48 < shiftCount ) { if ( aExp || aSig0 ) float_exception_flags |= float_flag_inexact ; return 0 ; } aSig0 |= LIT64 ( 0x0001000000000000 ) ; savedASig = aSig0 ; aSig0 >>= shiftCount ; z = aSig0 ; if ( aSign ) z = - z ; if ( ( z < 0 ) ^ aSign ) { invalid : float_exception_flags |= float_flag_invalid ; return aSign ? 0x80000000 : 0x7FFFFFFF ; } if ( ( aSig0 << shiftCount ) != savedASig ) { float_exception_flags |= float_flag_inexact ; } return z ; }
Returns the result of converting the quadruple-precision floating-point
value `a' to the 32-bit two's complement integer format.
Returns the result of converting the quadruple - precision floating - point value ` a ' to the 32 - bit two ' s complement integer format .