FreeBSD/sys/dev/nxge/xgehal/xgehal-device.c
/*
 * __hal_device_handle_rxdma - Handle RxDMA interrupt reason
 * @hldev: HAL device handle.
 * @reason: interrupt reason
 */
Handle RxDMA interrupt reason
@hldev: HAL device handle.
@reason: interrupt reason
Handle RxDMA interrupt reason @hldev : HAL device handle . @reason : interrupt reason
xge_hal_status_e
__hal_device_handle_rxdma(xge_hal_device_t *hldev, u64 reason)
{
	xge_hal_pci_bar0_t *isrbar0 =
	        (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
	u64 val64, err, temp64;
	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->rxdma_int_status);
	if (val64 & XGE_HAL_RXDMA_RC_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->rc_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->rc_err_reg);
	    hldev->stats.sw_dev_info_stats.rc_err_cnt++;
	    temp64 = XGE_HAL_RC_PRCn_ECC_DB_ERR|XGE_HAL_RC_FTC_ECC_DB_ERR
	        |XGE_HAL_RC_PRCn_SM_ERR_ALARM
	        |XGE_HAL_RC_FTC_SM_ERR_ALARM;
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_RXDMA_RPA_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->rpa_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->rpa_err_reg);
	    hldev->stats.sw_dev_info_stats.rpa_err_cnt++;
	    temp64 = XGE_HAL_RPA_SM_ERR_ALARM|XGE_HAL_RPA_CREDIT_ERR; 
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_RXDMA_RDA_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->rda_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->rda_err_reg);
	    hldev->stats.sw_dev_info_stats.rda_err_cnt++;
	    temp64 = XGE_HAL_RDA_RXDn_ECC_DB_ERR
	        |XGE_HAL_RDA_FRM_ECC_DB_N_AERR
	        |XGE_HAL_RDA_SM1_ERR_ALARM|XGE_HAL_RDA_SM0_ERR_ALARM
	        |XGE_HAL_RDA_RXD_ECC_DB_SERR;
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_RXDMA_RTI_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->rti_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->rti_err_reg);
	    hldev->stats.sw_dev_info_stats.rti_err_cnt++;
	    temp64 = XGE_HAL_RTI_SM_ERR_ALARM; 
	    if (val64 & temp64)
	        goto reset;
	}
	return XGE_HAL_OK;
reset : xge_hal_device_reset(hldev);
	xge_hal_device_enable(hldev);
	xge_hal_device_intr_enable(hldev);
	return XGE_HAL_OK;
}
xge_hal_status_e __hal_device_handle_rxdma ( xge_hal_device_t * hldev , u64 reason ) { xge_hal_pci_bar0_t * isrbar0 = ( xge_hal_pci_bar0_t * ) ( void * ) hldev -> isrbar0 ; u64 val64 , err , temp64 ; val64 = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> rxdma_int_status ) ; if ( val64 & XGE_HAL_RXDMA_RC_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> rc_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> rc_err_reg ) ; hldev -> stats . sw_dev_info_stats . rc_err_cnt ++ ; temp64 = XGE_HAL_RC_PRCn_ECC_DB_ERR | XGE_HAL_RC_FTC_ECC_DB_ERR | XGE_HAL_RC_PRCn_SM_ERR_ALARM | XGE_HAL_RC_FTC_SM_ERR_ALARM ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_RXDMA_RPA_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> rpa_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> rpa_err_reg ) ; hldev -> stats . sw_dev_info_stats . rpa_err_cnt ++ ; temp64 = XGE_HAL_RPA_SM_ERR_ALARM | XGE_HAL_RPA_CREDIT_ERR ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_RXDMA_RDA_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> rda_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> rda_err_reg ) ; hldev -> stats . sw_dev_info_stats . rda_err_cnt ++ ; temp64 = XGE_HAL_RDA_RXDn_ECC_DB_ERR | XGE_HAL_RDA_FRM_ECC_DB_N_AERR | XGE_HAL_RDA_SM1_ERR_ALARM | XGE_HAL_RDA_SM0_ERR_ALARM | XGE_HAL_RDA_RXD_ECC_DB_SERR ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_RXDMA_RTI_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> rti_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> rti_err_reg ) ; hldev -> stats . sw_dev_info_stats . rti_err_cnt ++ ; temp64 = XGE_HAL_RTI_SM_ERR_ALARM ; if ( val64 & temp64 ) goto reset ; } return XGE_HAL_OK ; reset : xge_hal_device_reset ( hldev ) ; xge_hal_device_enable ( hldev ) ; xge_hal_device_intr_enable ( hldev ) ; return XGE_HAL_OK ; }
__hal_device_handle_rxdma - Handle RxDMA interrupt reason
 @hldev: HAL device handle.
__hal_device_handle_rxdma - Handle RxDMA interrupt reason @hldev : HAL device handle .