KugleFirmware/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c
/**
  * @brief  Returns the SYSCLK frequency
  *        
  * @note   The system frequency computed by this function is not the real 
  *         frequency in the chip. It is calculated based on the predefined 
  *         constant and the selected clock source:
  * @note     If SYSCLK source is CSI, function returns values based on CSI_VALUE(*)
  * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
  * @note     If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
  * @note     If SYSCLK source is PLL, function returns values based on CSI_VALUE(*), 
  *           HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.         
  * @note     (*) CSI_VALUE is a constant defined in stm32h7xx_hal_conf.h file (default value
  *               4 MHz) but the real value may vary depending on the variations
  *               in voltage and temperature.
  * @note     (**) HSI_VALUE is a constant defined in stm32h7xx_hal_conf.h file (default value
  *               64 MHz) but the real value may vary depending on the variations
  *               in voltage and temperature.
  * @note     (***) HSE_VALUE is a constant defined in stm32h7xx_hal_conf.h file (default value
  *                25 MHz), user has to ensure that HSE_VALUE is same as the real
  *                frequency of the crystal used. Otherwise, this function may
  *                have wrong result.
  *                  
  * @note   The result of this function could be not correct when using fractional
  *         value for HSE crystal.
  *           
  * @note   This function can be used by the user application to compute the 
  *         baud rate for the communication peripherals or configure other parameters.
  *           
  * @note   Each time SYSCLK changes, this function must be called to update the
  *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
  *         
  *               
  * @retval SYSCLK frequency
  */
@brief  Returns the SYSCLK frequency

@note   The system frequency computed by this function is not the real
frequency in the chip.

@note   The result of this function could be not correct when using fractional
value for HSE crystal.

@note   This function can be used by the user application to compute the
baud rate for the communication peripherals or configure other parameters.

@note   Each time SYSCLK changes, this function must be called to update the
right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.

@retval SYSCLK frequency
@brief Returns the SYSCLK frequency @note The system frequency computed by this function is not the real frequency in the chip . @note The result of this function could be not correct when using fractional value for HSE crystal . @note This function can be used by the user application to compute the baud rate for the communication peripherals or configure other parameters . @note Each time SYSCLK changes this function must be called to update the right SYSCLK value . Otherwise any configuration based on this function will be incorrect . @retval SYSCLK frequency
uint32_t HAL_RCC_GetSysClockFreq(void)
{
 uint32_t pllp = 1, pllsource = 0, pllm = 1 ,pllfracen =0 , hsivalue = 0;
 float fracn1=0, pllvco = 0;
 uint32_t sysclockfreq = 0;
  switch (RCC->CFGR & RCC_CFGR_SWS)
  {
  case 0x00:  
   if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
      {
        sysclockfreq = (uint32_t) (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3));
      }
      else
      {
        sysclockfreq = (uint32_t) HSI_VALUE;
      }
    break;
  case 0x08:  
    sysclockfreq = CSI_VALUE;
    break;
  case 0x10:  
    sysclockfreq = HSE_VALUE;
    break;
  case 0x18:  
    pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
    pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4)  ;
    pllfracen = RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN;
    fracn1 = (pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
    switch (pllsource)
    {
    case 0x00:  
     if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
      {
        hsivalue= (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3));
        pllvco = ( hsivalue / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
      }
      else
      {
        pllvco = (HSI_VALUE / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
      }
      break;
    case 0x01:  
      pllvco = (CSI_VALUE / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
      break;
    case 0x02:  
      pllvco = (HSE_VALUE / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
      break;
    default:
      pllvco = (CSI_VALUE / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
      break;
    }
    pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1 ) ;
    sysclockfreq =  (uint32_t)(pllvco/pllp);
    break;
  default:
    sysclockfreq = CSI_VALUE;
    break;
  }
  return sysclockfreq;
}
uint32_t HAL_RCC_GetSysClockFreq ( void ) { uint32_t pllp = 1 , pllsource = 0 , pllm = 1 , pllfracen = 0 , hsivalue = 0 ; float fracn1 = 0 , pllvco = 0 ; uint32_t sysclockfreq = 0 ; switch ( RCC -> CFGR & RCC_CFGR_SWS ) { case 0x00 : if ( __HAL_RCC_GET_FLAG ( RCC_FLAG_HSIDIV ) != 0U ) { sysclockfreq = ( uint32_t ) ( HSI_VALUE >> ( __HAL_RCC_GET_HSI_DIVIDER ( ) >> 3 ) ) ; } else { sysclockfreq = ( uint32_t ) HSI_VALUE ; } break ; case 0x08 : sysclockfreq = CSI_VALUE ; break ; case 0x10 : sysclockfreq = HSE_VALUE ; break ; case 0x18 : pllsource = ( RCC -> PLLCKSELR & RCC_PLLCKSELR_PLLSRC ) ; pllm = ( ( RCC -> PLLCKSELR & RCC_PLLCKSELR_DIVM1 ) >> 4 ) ; pllfracen = RCC -> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN ; fracn1 = ( pllfracen * ( ( RCC -> PLL1FRACR & RCC_PLL1FRACR_FRACN1 ) >> 3 ) ) ; switch ( pllsource ) { case 0x00 : if ( __HAL_RCC_GET_FLAG ( RCC_FLAG_HSIDIV ) != 0U ) { hsivalue = ( HSI_VALUE >> ( __HAL_RCC_GET_HSI_DIVIDER ( ) >> 3 ) ) ; pllvco = ( hsivalue / pllm ) * ( ( RCC -> PLL1DIVR & RCC_PLL1DIVR_N1 ) + ( fracn1 / 0x2000 ) + 1 ) ; } else { pllvco = ( HSI_VALUE / pllm ) * ( ( RCC -> PLL1DIVR & RCC_PLL1DIVR_N1 ) + ( fracn1 / 0x2000 ) + 1 ) ; } break ; case 0x01 : pllvco = ( CSI_VALUE / pllm ) * ( ( RCC -> PLL1DIVR & RCC_PLL1DIVR_N1 ) + ( fracn1 / 0x2000 ) + 1 ) ; break ; case 0x02 : pllvco = ( HSE_VALUE / pllm ) * ( ( RCC -> PLL1DIVR & RCC_PLL1DIVR_N1 ) + ( fracn1 / 0x2000 ) + 1 ) ; break ; default : pllvco = ( CSI_VALUE / pllm ) * ( ( RCC -> PLL1DIVR & RCC_PLL1DIVR_N1 ) + ( fracn1 / 0x2000 ) + 1 ) ; break ; } pllp = ( ( ( RCC -> PLL1DIVR & RCC_PLL1DIVR_P1 ) >> 9 ) + 1 ) ; sysclockfreq = ( uint32_t ) ( pllvco / pllp ) ; break ; default : sysclockfreq = CSI_VALUE ; break ; } return sysclockfreq ; }
@brief  Returns the SYSCLK frequency
@brief Returns the SYSCLK frequency
/* Get SYSCLK source -------------------------------------------------------*/ /* HSI used as system clock source */ /* CSI used as system clock  source */ /* HSE used as system clock  source */ /* PLL1 used as system clock  source */ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
    SYSCLK = PLL_VCO / PLLR
    */ /* HSI used as PLL clock source */ /* CSI used as PLL clock source */ /* HSE used as PLL clock source */