drivers/clock_control/stm32f107xx_clock.c
/**
 * @brief map AHB prescaler setting to register value
 */
@brief map AHB prescaler setting to register value
@brief map AHB prescaler setting to register value
static int ahb_prescaler(int prescaler)
{
	if (prescaler == 0) {
		return STM32F10X_RCC_CFG_SYSCLK_DIV_0;
	}
	const struct regval_map map[] = {
		{0,	STM32F10X_RCC_CFG_SYSCLK_DIV_0},
		{2,	STM32F10X_RCC_CFG_SYSCLK_DIV_2},
		{4,	STM32F10X_RCC_CFG_SYSCLK_DIV_4},
		{8,	STM32F10X_RCC_CFG_SYSCLK_DIV_8},
		{16,	STM32F10X_RCC_CFG_SYSCLK_DIV_16},
		{64,	STM32F10X_RCC_CFG_SYSCLK_DIV_64},
		{128,	STM32F10X_RCC_CFG_SYSCLK_DIV_128},
		{256,	STM32F10X_RCC_CFG_SYSCLK_DIV_256},
		{512,	STM32F10X_RCC_CFG_SYSCLK_DIV_512},
	};
	return map_reg_val(map, ARRAY_SIZE(map), prescaler);
}
static int ahb_prescaler ( int prescaler ) { if ( prescaler == 0 ) { return STM32F10X_RCC_CFG_SYSCLK_DIV_0 ; } const struct regval_map map [ ] = { { 0 , STM32F10X_RCC_CFG_SYSCLK_DIV_0 } , { 2 , STM32F10X_RCC_CFG_SYSCLK_DIV_2 } , { 4 , STM32F10X_RCC_CFG_SYSCLK_DIV_4 } , { 8 , STM32F10X_RCC_CFG_SYSCLK_DIV_8 } , { 16 , STM32F10X_RCC_CFG_SYSCLK_DIV_16 } , { 64 , STM32F10X_RCC_CFG_SYSCLK_DIV_64 } , { 128 , STM32F10X_RCC_CFG_SYSCLK_DIV_128 } , { 256 , STM32F10X_RCC_CFG_SYSCLK_DIV_256 } , { 512 , STM32F10X_RCC_CFG_SYSCLK_DIV_512 } , } ; return map_reg_val ( map , ARRAY_SIZE ( map ) , prescaler ) ; }
@brief map AHB prescaler setting to register value
@brief map AHB prescaler setting to register value