FreeRTOS/Demo/CORTEX_STM32L152_Discovery_IAR/ST_Code/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_tim.c
/**
  * @brief  Configures the TIMx channel 4 polarity.
  * @param  TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
  * @param  TIM_OCPolarity: specifies the OC4 Polarity.
  *   This parameter can be one of the following values:
  *     @arg TIM_OCPolarity_High: Output Compare active high.
  *     @arg TIM_OCPolarity_Low: Output Compare active low.
  * @retval None
  */
@brief  Configures the TIMx channel 4 polarity.
@param  TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
@param  TIM_OCPolarity: specifies the OC4 Polarity.
This parameter can be one of the following values:
@arg TIM_OCPolarity_High: Output Compare active high.
@arg TIM_OCPolarity_Low: Output Compare active low.
@retval None
@brief Configures the TIMx channel 4 polarity . @param TIMx : where x can be 2 3 4 or 5 to select the TIM peripheral . @param TIM_OCPolarity : specifies the OC4 Polarity . This parameter can be one of the following values : @arg TIM_OCPolarity_High : Output Compare active high . @arg TIM_OCPolarity_Low : Output Compare active low . @retval None
void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
{
  uint16_t tmpccer = 0;
  assert_param(IS_TIM_LIST3_PERIPH(TIMx));
  assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
  tmpccer = TIMx->CCER;
  tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P);
  tmpccer |= (uint16_t)(TIM_OCPolarity << 12);
  TIMx->CCER = tmpccer;
}
void TIM_OC4PolarityConfig ( TIM_TypeDef * TIMx , uint16_t TIM_OCPolarity ) { uint16_t tmpccer = 0 ; assert_param ( IS_TIM_LIST3_PERIPH ( TIMx ) ) ; assert_param ( IS_TIM_OC_POLARITY ( TIM_OCPolarity ) ) ; tmpccer = TIMx -> CCER ; tmpccer &= ( uint16_t ) ~ ( ( uint16_t ) TIM_CCER_CC4P ) ; tmpccer |= ( uint16_t ) ( TIM_OCPolarity << 12 ) ; TIMx -> CCER = tmpccer ; }
@brief  Configures the TIMx channel 4 polarity.
@brief Configures the TIMx channel 4 polarity .
/* Check the parameters */ /* Set or Reset the CC4P Bit */ /* Write to TIMx CCER register */