FreeBSD/sys/dev/nxge/xgehal/xgehal-device.c
/*
 * __hal_device_handle_txpic - Handle TxPIC interrupt reason
 * @hldev: HAL device handle.
 * @reason: interrupt reason
 */
Handle TxPIC interrupt reason
@hldev: HAL device handle.
@reason: interrupt reason
Handle TxPIC interrupt reason @hldev : HAL device handle . @reason : interrupt reason
xge_hal_status_e
__hal_device_handle_txpic(xge_hal_device_t *hldev, u64 reason)
{
	xge_hal_status_e status = XGE_HAL_OK;
	xge_hal_pci_bar0_t *isrbar0 =
	        (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
	volatile u64 val64;
	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->pic_int_status);
	if ( val64 & (XGE_HAL_PIC_INT_FLSH |
	          XGE_HAL_PIC_INT_MDIO |
	          XGE_HAL_PIC_INT_IIC |
	          XGE_HAL_PIC_INT_MISC) ) {
	    status =  __hal_device_handle_pic(hldev, val64);
	    xge_os_wmb();
	}
	if (!(val64 & XGE_HAL_PIC_INT_TX))
	    return status;
	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->txpic_int_reg);
	xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	               val64, &isrbar0->txpic_int_reg);
	xge_os_wmb();
	if (val64 & XGE_HAL_TXPIC_INT_SCHED_INTR) {
	    int i;
	    if (g_xge_hal_driver->uld_callbacks.sched_timer != NULL)
	        g_xge_hal_driver->uld_callbacks.sched_timer(
	                  hldev, hldev->upper_layer_info);
	    if (hldev->config.rxufca_lo_lim !=
	            hldev->config.rxufca_hi_lim &&
	        hldev->config.rxufca_lo_lim != 0) {
	        for (i = 0; i < XGE_HAL_MAX_RING_NUM; i++) {
	            if (!hldev->config.ring.queue[i].configured)
	                continue;
	            if (hldev->config.ring.queue[i].rti.urange_a)
	                __hal_update_rxufca(hldev, i);
	        }
	    }
	    if (hldev->config.bimodal_interrupts) {
	        for (i = 0; i < XGE_HAL_MAX_RING_NUM; i++) {
	            if (!hldev->config.ring.queue[i].configured)
	                continue;
	            if (hldev->bimodal_tti[i].enabled)
	                __hal_update_bimodal(hldev, i);
	        }
	    }
	}
	return XGE_HAL_OK;
}
xge_hal_status_e __hal_device_handle_txpic ( xge_hal_device_t * hldev , u64 reason ) { xge_hal_status_e status = XGE_HAL_OK ; xge_hal_pci_bar0_t * isrbar0 = ( xge_hal_pci_bar0_t * ) ( void * ) hldev -> isrbar0 ; volatile u64 val64 ; val64 = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> pic_int_status ) ; if ( val64 & ( XGE_HAL_PIC_INT_FLSH | XGE_HAL_PIC_INT_MDIO | XGE_HAL_PIC_INT_IIC | XGE_HAL_PIC_INT_MISC ) ) { status = __hal_device_handle_pic ( hldev , val64 ) ; xge_os_wmb ( ) ; } if ( ! ( val64 & XGE_HAL_PIC_INT_TX ) ) return status ; val64 = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> txpic_int_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , val64 , & isrbar0 -> txpic_int_reg ) ; xge_os_wmb ( ) ; if ( val64 & XGE_HAL_TXPIC_INT_SCHED_INTR ) { int i ; if ( g_xge_hal_driver -> uld_callbacks . sched_timer != NULL ) g_xge_hal_driver -> uld_callbacks . sched_timer ( hldev , hldev -> upper_layer_info ) ; if ( hldev -> config . rxufca_lo_lim != hldev -> config . rxufca_hi_lim && hldev -> config . rxufca_lo_lim != 0 ) { for ( i = 0 ; i < XGE_HAL_MAX_RING_NUM ; i ++ ) { if ( ! hldev -> config . ring . queue [ i ] . configured ) continue ; if ( hldev -> config . ring . queue [ i ] . rti . urange_a ) __hal_update_rxufca ( hldev , i ) ; } } if ( hldev -> config . bimodal_interrupts ) { for ( i = 0 ; i < XGE_HAL_MAX_RING_NUM ; i ++ ) { if ( ! hldev -> config . ring . queue [ i ] . configured ) continue ; if ( hldev -> bimodal_tti [ i ] . enabled ) __hal_update_bimodal ( hldev , i ) ; } } } return XGE_HAL_OK ; }
__hal_device_handle_txpic - Handle TxPIC interrupt reason
 @hldev: HAL device handle.
__hal_device_handle_txpic - Handle TxPIC interrupt reason @hldev : HAL device handle .
/*
	     * This feature implements adaptive receive interrupt
	     * coalecing. It is disabled by default. To enable it
	     * set hldev->config.rxufca_lo_lim to be not equal to
	     * hldev->config.rxufca_hi_lim.
	     *
	     * We are using HW timer for this feature, so
	     * use needs to configure hldev->config.rxufca_lbolt_period
	     * which is essentially a time slice of timer.
	     *
	     * For those who familiar with Linux, lbolt means jiffies
	     * of this timer. I.e. timer tick.
	     */ /*
	     * This feature implements adaptive TTI timer re-calculation
	     * based on host utilization, number of interrupt processed,
	     * number of RXD per tick and avarage length of packets per
	     * tick.
	     */