lapic.c
// Start additional processor running bootstrap code at addr.
// See Appendix B of MultiProcessor Specification.
Start additional processor running bootstrap code at addr.
See Appendix B of MultiProcessor Specification.
Start additional processor running bootstrap code at addr . See Appendix B of MultiProcessor Specification .
void
lapic_startap(uchar apicid, uint addr)
{
  int i;
  volatile int j = 0;
  lapic[ICRHI] = apicid<<24;
  lapic[ICRLO] = INIT | LEVEL;
  microdelay(10);
  for(i = 0; i < 2; i++){
    lapic[ICRHI] = apicid<<24;
    lapic[ICRLO] = STARTUP | (addr>>12);
    for(j=0; j<10000; j++);  
  }
}
void lapic_startap ( uchar apicid , uint addr ) { int i ; volatile int j = 0 ; lapic [ ICRHI ] = apicid << 24 ; lapic [ ICRLO ] = INIT | LEVEL ; microdelay ( 10 ) ; for ( i = 0 ; i < 2 ; i ++ ) { lapic [ ICRHI ] = apicid << 24 ; lapic [ ICRLO ] = STARTUP | ( addr >> 12 ) ; for ( j = 0 ; j < 10000 ; j ++ ) ; } }
Start additional processor running bootstrap code at addr.
Start additional processor running bootstrap code at addr .
// Send INIT interrupt to reset other CPU. // Send startup IPI (twice!) to enter bootstrap code. // 200us