plat/marvell/a8k/common/plat_pm.c
/*
 * Power down CPU:
 * Used to reduce power consumption, and avoid SoC unnecessary temperature rise.
 */
Power down CPU:
Used to reduce power consumption, and avoid SoC unnecessary temperature rise.
Power down CPU : Used to reduce power consumption and avoid SoC unnecessary temperature rise .
static int plat_marvell_cpu_powerdown(int cpu_id)
{
	uint32_t	reg_val;
	int		exit_loop = REG_WR_VALIDATE_TIMEOUT;
	INFO("Powering down CPU%d\n", cpu_id);
	reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id));
	reg_val |= 0x1 << PWRC_CPUN_CR_ISO_ENABLE_OFFSET;
	mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val);
	do {
		reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id));
		exit_loop--;
	} while (!(reg_val & (0x1 << PWRC_CPUN_CR_ISO_ENABLE_OFFSET)) && exit_loop > 0);
	reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id));
	reg_val &= ~PWRC_CPUN_CR_PWR_DN_RQ_MASK;
	mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val);
	exit_loop = REG_WR_VALIDATE_TIMEOUT;
	do {
		reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id));
		exit_loop--;
	} while (reg_val & PWRC_CPUN_CR_PWR_DN_RQ_MASK && exit_loop > 0);
	if (exit_loop <= 0)
		goto cpu_poweroff_error;
	reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id));
	reg_val &= ~PWRC_CPUN_CR_LDO_BYPASS_RDY_MASK;
	mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val);
	reg_val = mmio_read_32(CCU_B_PRCRN_REG(cpu_id));
	reg_val &= ~CCU_B_PRCRN_CPUPORESET_STATIC_MASK;
	mmio_write_32(CCU_B_PRCRN_REG(cpu_id), reg_val);
	exit_loop = REG_WR_VALIDATE_TIMEOUT;
	do {
		reg_val = mmio_read_32(CCU_B_PRCRN_REG(cpu_id));
		exit_loop--;
	} while (reg_val & CCU_B_PRCRN_CPUPORESET_STATIC_MASK && exit_loop > 0);
	if (exit_loop <= 0)
		goto cpu_poweroff_error;
	INFO("Successfully powered down CPU%d\n", cpu_id);
	return 0;
cpu_poweroff_error:
	ERROR("ERROR: Can't power down CPU%d\n" , cpu_id);
	return -1;
}
static int plat_marvell_cpu_powerdown ( int cpu_id ) { uint32_t reg_val ; int exit_loop = REG_WR_VALIDATE_TIMEOUT ; INFO ( " \n " , cpu_id ) ; reg_val = mmio_read_32 ( PWRC_CPUN_CR_REG ( cpu_id ) ) ; reg_val |= 0x1 << PWRC_CPUN_CR_ISO_ENABLE_OFFSET ; mmio_write_32 ( PWRC_CPUN_CR_REG ( cpu_id ) , reg_val ) ; do { reg_val = mmio_read_32 ( PWRC_CPUN_CR_REG ( cpu_id ) ) ; exit_loop -- ; } while ( ! ( reg_val & ( 0x1 << PWRC_CPUN_CR_ISO_ENABLE_OFFSET ) ) && exit_loop > 0 ) ; reg_val = mmio_read_32 ( PWRC_CPUN_CR_REG ( cpu_id ) ) ; reg_val &= ~ PWRC_CPUN_CR_PWR_DN_RQ_MASK ; mmio_write_32 ( PWRC_CPUN_CR_REG ( cpu_id ) , reg_val ) ; exit_loop = REG_WR_VALIDATE_TIMEOUT ; do { reg_val = mmio_read_32 ( PWRC_CPUN_CR_REG ( cpu_id ) ) ; exit_loop -- ; } while ( reg_val & PWRC_CPUN_CR_PWR_DN_RQ_MASK && exit_loop > 0 ) ; if ( exit_loop <= 0 ) goto cpu_poweroff_error ; reg_val = mmio_read_32 ( PWRC_CPUN_CR_REG ( cpu_id ) ) ; reg_val &= ~ PWRC_CPUN_CR_LDO_BYPASS_RDY_MASK ; mmio_write_32 ( PWRC_CPUN_CR_REG ( cpu_id ) , reg_val ) ; reg_val = mmio_read_32 ( CCU_B_PRCRN_REG ( cpu_id ) ) ; reg_val &= ~ CCU_B_PRCRN_CPUPORESET_STATIC_MASK ; mmio_write_32 ( CCU_B_PRCRN_REG ( cpu_id ) , reg_val ) ; exit_loop = REG_WR_VALIDATE_TIMEOUT ; do { reg_val = mmio_read_32 ( CCU_B_PRCRN_REG ( cpu_id ) ) ; exit_loop -- ; } while ( reg_val & CCU_B_PRCRN_CPUPORESET_STATIC_MASK && exit_loop > 0 ) ; if ( exit_loop <= 0 ) goto cpu_poweroff_error ; INFO ( " \n " , cpu_id ) ; return 0 ; cpu_poweroff_error : ERROR ( " \n " , cpu_id ) ; return -1 ; }
Power down CPU:
 Used to reduce power consumption, and avoid SoC unnecessary temperature rise.
Power down CPU : Used to reduce power consumption and avoid SoC unnecessary temperature rise .
/* 1. Isolation enable */ /* 2. Read and check Isolation enabled - verify bit set to 1 */ /* 3. Switch off CPU power */ /* 4. Read and check Switch Off - verify bit set to 0 */ /* 5. De-Assert power ready */ /* 6. Assert CPU POR reset */ /* 7. Read and poll on Validate the CPU is out of reset */