head/sys/cddl/dev/dtrace/mips/dtrace_subr.c
/* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */
Function to handle DTrace traps during probes.
Function to handle DTrace traps during probes .
int
dtrace_trap(struct trapframe *frame, u_int type)
{
	if ((cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0) {
		switch (type) {
		case T_TLB_ST_MISS:
		case T_ADDR_ERR_ST:
		case T_TLB_LD_MISS:
		case T_ADDR_ERR_LD:
		case T_BUS_ERR_IFETCH:
			cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR;
			cpu_core[curcpu].cpuc_dtrace_illval = frame->badvaddr;
			if (DELAYBRANCH(frame->cause))	 
			{
				panic("%s: delay slot at %jx, badvaddr = %jx\n",
				    __func__,
				    (intmax_t)frame->pc, (intmax_t)frame->badvaddr);
			}
			else
				frame->pc += sizeof(int);
			return (1);
		default:
			break;
		}
	}
	return (0);
}
int dtrace_trap ( struct trapframe * frame , u_int type ) { if ( ( cpu_core [ curcpu ] . cpuc_dtrace_flags & CPU_DTRACE_NOFAULT ) != 0 ) { switch ( type ) { case T_TLB_ST_MISS : case T_ADDR_ERR_ST : case T_TLB_LD_MISS : case T_ADDR_ERR_LD : case T_BUS_ERR_IFETCH : cpu_core [ curcpu ] . cpuc_dtrace_flags |= CPU_DTRACE_BADADDR ; cpu_core [ curcpu ] . cpuc_dtrace_illval = frame -> badvaddr ; if ( DELAYBRANCH ( frame -> cause ) ) { panic ( " \n " , __func__ , ( intmax_t ) frame -> pc , ( intmax_t ) frame -> badvaddr ) ; } else frame -> pc += sizeof ( int ) ; return ( 1 ) ; default : break ; } } return ( 0 ) ; }
Function to handle DTrace traps during probes.
Function to handle DTrace traps during probes .
/*
	 * A trap can occur while DTrace executes a probe. Before
	 * executing the probe, DTrace blocks re-scheduling and sets
	 * a flag in it's per-cpu flags to indicate that it doesn't
	 * want to fault. On returning from the probe, the no-fault
	 * flag is cleared and finally re-scheduling is enabled.
	 *
	 * Check if DTrace has enabled 'no-fault' mode:
	 *
	 */ /*
		 * There are only a couple of trap types that are expected.
		 * All the rest will be handled in the usual way.
		 */ /* Page fault. */ /* Flag a bad address. */ /*
			 * Offset the instruction pointer to the instruction
			 * following the one causing the fault.
			 */ /* Check BD bit */ /* XXX: check MipsEmulateBranch on MIPS64
				frame->pc = MipsEmulateBranch(frame, frame->pc,
				    0, 0);
 				*/ /* Handle all other traps in the usual way. */ /* Handle the trap in the usual way. */