Labs/Watkins_William_Lab5.c
/******************************************************************************
 * Initial()
 *
 * This subroutine performs all initializations of variables and registers.
 * It enables TMR0 and sets CCP0 for compare if desired, and enables LoPri 
 * interrupts for both.
 ******************************************************************************/
Initial()
This subroutine performs all initializations of variables and registers.
It enables TMR0 and sets CCP0 for compare if desired, and enables LoPri
interrupts for both.
Initial () This subroutine performs all initializations of variables and registers . It enables TMR0 and sets CCP0 for compare if desired and enables LoPri interrupts for both .
void Initial() {
    TRISD  = 0b11101111;
    LATD = 0b00000000;
    T0CON = 0b00000100;
    TMR0H = 0x0B;                      
    TMR0L = 0xDC;                      Setting TMR0 regs for 0.5s (Loading 3036)
    Configuring Interrupts
    RCONbits.IPEN = 1;              Enable priority levels
    INTCON2bits.TMR0IP = 0;         Assign low priority to TMR0 interrupt
    INTCONbits.TMR0IE = 1;          Enable TMR0 interrupts
    INTCONbits.GIEL = 1;            Enable low-priority interrupts to CPU
    INTCONbits.GIEH = 1;            Enable all interrupts
    T0CONbits.TMR0ON = 1;           Turning on TMR0
}
void Initial ( ) { TRISD = 0b11101111 ; LATD = 0b00000000 ; T0CON = 0b00000100 ; TMR0H = 0x0B ; TMR0L = 0xDC ; RCONbits . IPEN = 1 ; INTCON2bits . TMR0IP = 0 ; INTCONbits . TMR0IE = 1 ; INTCONbits . GIEL = 1 ; INTCONbits . GIEH = 1 ; T0CONbits . TMR0ON = 1 ; }
Initial()
 This subroutine performs all initializations of variables and registers.
Initial () This subroutine performs all initializations of variables and registers .
// Configure the IO ports // Initializing TMR0 //  // Setting TMR0 regs for 0.5s (Loading 3036) // Configuring Interrupts // Enable priority levels // Assign low priority to TMR0 interrupt // Enable TMR0 interrupts // Enable low-priority interrupts to CPU // Enable all interrupts // Turning on TMR0