FreeBSD/sys/x86/iommu/intel_utils.c
/*
 * Flush the chipset write buffers.  See 11.1 "Write Buffer Flushing"
 * in the architecture specification.
 */
Flush the chipset write buffers.  See 11.1 "Write Buffer Flushing"
in the architecture specification.
Flush the chipset write buffers . See 11 . 1 " Write Buffer Flushing " in the architecture specification .
int
dmar_flush_write_bufs(struct dmar_unit *unit)
{
	DMAR_ASSERT_LOCKED(unit);
	KASSERT((unit->hw_cap & DMAR_CAP_RWBF) != 0,
	    ("dmar%d: no RWBF", unit->unit));
	dmar_write4(unit, DMAR_GCMD_REG, unit->hw_gcmd | DMAR_GCMD_WBF);
	while ((dmar_read4(unit, DMAR_GSTS_REG) & DMAR_GSTS_WBFS) == 0)
		cpu_spinwait();
	return (0);
}
int dmar_flush_write_bufs ( struct dmar_unit * unit ) { DMAR_ASSERT_LOCKED ( unit ) ; KASSERT ( ( unit -> hw_cap & DMAR_CAP_RWBF ) != 0 , ( " " , unit -> unit ) ) ; dmar_write4 ( unit , DMAR_GCMD_REG , unit -> hw_gcmd | DMAR_GCMD_WBF ) ; while ( ( dmar_read4 ( unit , DMAR_GSTS_REG ) & DMAR_GSTS_WBFS ) == 0 ) cpu_spinwait ( ) ; return ( 0 ) ; }
Flush the chipset write buffers.
Flush the chipset write buffers .
/*
	 * DMAR_GCMD_WBF is only valid when CAP_RWBF is reported.
	 */ /* XXXKIB should have a timeout */