FreeBSD/sys/arm/at91/board_tsc4370.c
/*
 * Allow the master clock frequency to be changed from whatever the bootloader
 * set up, because sometimes it's harder to change/update a bootloader than it
 * is to change/update the kernel once a product is in the field.
 */
Allow the master clock frequency to be changed from whatever the bootloader
set up, because sometimes it's harder to change/update a bootloader than it
is to change/update the kernel once a product is in the field.
Allow the master clock frequency to be changed from whatever the bootloader set up because sometimes it ' s harder to change / update a bootloader than it is to change / update the kernel once a product is in the field .
static void
master_clock_init(void)
{
	uint32_t mckr = RD4HW(AT91RM92_PMC_BASE, PMC_MCKR);
	int hintvalue = 0;
	int newmckr = 0;
	if (resource_int_value("at91", 0, "mckr", &hintvalue) == 0) {
		newmckr = hintvalue;
	} else {
		hintvalue = 90; 
		resource_int_value("at91", 0, "mckfreq", &hintvalue);
		if (hintvalue != 0) {
			if (hintvalue < 1000)
				hintvalue *= 1000000;
			if (hintvalue != at91_master_clock) {
				uint32_t divider;
				struct at91_pmc_clock * cpuclk;
				cpuclk = at91_pmc_clock_ref("cpu");
				divider = (cpuclk->hz / hintvalue) - 1;
				newmckr = (mckr & 0xFFFFFCFF) | ((divider & 0x03) << 8);
				at91_pmc_clock_deref(cpuclk);
			}
		}
	}
	if (newmckr != 0 && newmckr != mckr) {
		if (mckr & 0x03)
			change_mckr(mckr & ~0x03);
		change_mckr(newmckr);
		at91_pmc_init_clock();
		WR4HW(AT91RM92_DBGU_BASE, USART_BRGR, BAUD2DIVISOR(115200));
	}
}
static void master_clock_init ( void ) { uint32_t mckr = RD4HW ( AT91RM92_PMC_BASE , PMC_MCKR ) ; int hintvalue = 0 ; int newmckr = 0 ; if ( resource_int_value ( " " , 0 , " " , & hintvalue ) == 0 ) { newmckr = hintvalue ; } else { hintvalue = 90 ; resource_int_value ( " " , 0 , " " , & hintvalue ) ; if ( hintvalue != 0 ) { if ( hintvalue < 1000 ) hintvalue *= 1000000 ; if ( hintvalue != at91_master_clock ) { uint32_t divider ; struct at91_pmc_clock * cpuclk ; cpuclk = at91_pmc_clock_ref ( " " ) ; divider = ( cpuclk -> hz / hintvalue ) - 1 ; newmckr = ( mckr & 0xFFFFFCFF ) | ( ( divider & 0x03 ) << 8 ) ; at91_pmc_clock_deref ( cpuclk ) ; } } } if ( newmckr != 0 && newmckr != mckr ) { if ( mckr & 0x03 ) change_mckr ( mckr & ~ 0x03 ) ; change_mckr ( newmckr ) ; at91_pmc_init_clock ( ) ; WR4HW ( AT91RM92_DBGU_BASE , USART_BRGR , BAUD2DIVISOR ( 115200 ) ) ; } }
Allow the master clock frequency to be changed from whatever the bootloader
 set up, because sometimes it's harder to change/update a bootloader than it
 is to change/update the kernel once a product is in the field.
Allow the master clock frequency to be changed from whatever the bootloader set up because sometimes it ' s harder to change / update a bootloader than it is to change / update the kernel once a product is in the field .
/*
	 * If there's a hint that specifies the contents of MCKR, use it
	 * without question (it had better be right).
	 *
	 * If there's a "mckfreq" hint it might be in hertz or mhz (convert the
	 * latter to hz).  Calculate the new MCK divider.  If the CPU frequency
	 * is not a sane multiple of the hinted MCK frequency this is likely to
	 * behave badly.  The moral is: don't hint at impossibilities.
	 */ /* Default to 90mhz if not specified. */ /* If the new mckr value is different than what's in the register now,
	 * make the change and wait for the clocks to settle (MCKRDY status).
	 *
	 * MCKRDY will never be asserted unless either the selected clock or the
	 * prescaler value changes (but not both at once) [this is detailed in
	 * the rm9200 errata]. This code assumes the prescaler value is always
	 * zero and that by time we get to here we're running on something other
	 * than the slow clock, so to change the mckr divider we first change
	 * back to the slow clock (keeping prescaler and divider unchanged),
	 * then go back to the original selected clock with the new divider.
	 *
	 * After changing MCK, go re-init everything clock-related, and reset
	 * the baud rate generator for the console (doing this here is kind of a
	 * rude hack, but hey, you do what you have to to run MCK faster).
	 */