Platform/ECM3532/DSP/hw/csp/ecm3532/src/eta_csp_i2c.c
/***************************************************************************/
/**
 *
 *  EtaCspI2cProcessIntTxData - Process I2C Interrupt for TX Space Available
 *
 *
 ******************************************************************************/
Process I2C Interrupt for TX Space Available
Process I2C Interrupt for TX Space Available
tEtaStatus
EtaCspI2cProcessIntTxData(void)
{
    uint8_t space_in_fifo;
    if((gsI2cCmd.bCmdActive == 0) ||
       (gsI2cCmd.ui16TxLen == 0))
    {
        return(eEtaI2cCmdSequenceErr);
    }
    if(ETA_CSP_I2C_EN_GREEDY_INT) 
    {
        space_in_fifo = 16 -
                        (REG_I2C2_TX_FIFO_DEBUG &
                         BM_I2C2_TX_FIFO_DEBUG_ENTRIES);
    }
    else
    {
        space_in_fifo = gsI2cCmd.ui8TxIntSize; 
    }
    do
    {
        if(gsI2cCmd.ui16RestartAfterByte != 0)
        {
            if(gsI2cCmd.ui32CurrByteCount ==
               gsI2cCmd.ui16RestartAfterByte)
            {
                gsI2cCmd.ui16RestartAfterByte = 0; 
                REG_I2C2_CMD_FIFO_DATA = I2C_CMD_RESTART;
                break; 
            }
        }
        gsI2cCmd.ui32CurrByteCount =
            gsI2cCmd.ui32CurrByteCount + 1;
        if(gsI2cCmd.ui16TxLen > 4) 
        {
            REG_I2C2_TXRX_1BYTE_FIFO_DATA = *gsI2cCmd.pui8TxData++;
            gsI2cCmd.ui16TxLen--;
            if(gsI2cCmd.ui16TxLen == 0) 
            {
                REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN |
                                  BM_I2C2_INT_EN_UNACK_EN;
                REG_I2C2_CONFIG =
                    (REG_I2C2_CONFIG & ~BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL) |
                    (gsI2cCmd.ui8RxIntSize <<
                        BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL);
            }
        }
        else if((gsI2cCmd.bRxLenIs0 == 1) &&
                (gsI2cCmd.ui16TxLen == 1))
        {
            REG_I2C2_CMD_FIFO_DATA = I2C_CMD_END_WRITE;
            REG_I2C2_INT_EN = BM_I2C2_INT_EN_CMD_DONE | BM_I2C2_INT_EN_UNACK_EN;
            gsI2cCmd.ui16TxLen--;
            REG_I2C2_CONFIG =
                (REG_I2C2_CONFIG & ~BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL) |
                (gsI2cCmd.ui8RxIntSize <<
                    BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL);
            break; 
        }
        else if((gsI2cCmd.bRxLenIs1 == 1) &&
                (gsI2cCmd.ui16TxLen == 2))
        {
            REG_I2C2_TXRX_1BYTE_FIFO_DATA = 0xff;
            gsI2cCmd.ui16TxLen--;
        }
        else if((gsI2cCmd.bRxLenIs1 == 1) &&
                (gsI2cCmd.ui16TxLen == 1))
        {
            REG_I2C2_CMD_FIFO_DATA = I2C_CMD_BEGIN_READ | I2C_CMD_END_READ;
            gsI2cCmd.ui16TxLen--;
            REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN |
                              BM_I2C2_INT_EN_UNACK_EN; 
                                                        Go
                                                        to
                                                        RX
            REG_I2C2_CONFIG =
                (REG_I2C2_CONFIG & ~BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL) |
                (gsI2cCmd.ui8RxIntSize <<
                    BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL);
            break; 
        }
         Cases where RX Length >1
        else if((gsI2cCmd.bRxLenIsGt1 == 1) &&
                (gsI2cCmd.ui16TxLen == 4))
        {
            REG_I2C2_TXRX_1BYTE_FIFO_DATA = 0xff;
            gsI2cCmd.ui16TxLen--;
        }
        else if((gsI2cCmd.bRxLenIsGt1 == 1) &&
                (gsI2cCmd.ui16TxLen == 3))
        {
            REG_I2C2_CMD_FIFO_DATA = I2C_CMD_BEGIN_READ;
            gsI2cCmd.ui16TxLen--;
        }
        else if((gsI2cCmd.bRxLenIsGt1 == 1) &&
                (gsI2cCmd.ui16TxLen == 2))
        {
            REG_I2C2_CMD_FIFO_DATA = I2C_CMD_DUMMYBYTE;
            gsI2cCmd.ui16TxLen--;
        }
        else if((gsI2cCmd.bRxLenIsGt1 == 1) &&
                (gsI2cCmd.ui16TxLen == 1))
        {
            REG_I2C2_CMD_FIFO_DATA = I2C_CMD_END_READ;
            gsI2cCmd.ui16TxLen--;
            REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN |
                              BM_I2C2_INT_EN_UNACK_EN; 
                                                        Go
                                                        to
                                                        RX
            REG_I2C2_CONFIG =
                (REG_I2C2_CONFIG & ~BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL) |
                (gsI2cCmd.ui8RxIntSize <<
                    BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL);
            break; 
        }
        else
        {
            REG_I2C2_TXRX_1BYTE_FIFO_DATA = *gsI2cCmd.pui8TxData++;
            gsI2cCmd.ui16TxLen--;
            if(gsI2cCmd.ui16TxLen == 0) 
            {
                REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN |
                                  BM_I2C2_INT_EN_UNACK_EN;
                REG_I2C2_CONFIG =
                    (REG_I2C2_CONFIG & ~BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL) |
                    (gsI2cCmd.ui8RxIntSize <<
                        BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL);
                break; 
            }
        }
    }
    while(--space_in_fifo);
    return(eEtaSuccess);
}
tEtaStatus EtaCspI2cProcessIntTxData ( void ) { uint8_t space_in_fifo ; if ( ( gsI2cCmd . bCmdActive == 0 ) || ( gsI2cCmd . ui16TxLen == 0 ) ) { return ( eEtaI2cCmdSequenceErr ) ; } if ( ETA_CSP_I2C_EN_GREEDY_INT ) { space_in_fifo = 16 - ( REG_I2C2_TX_FIFO_DEBUG & BM_I2C2_TX_FIFO_DEBUG_ENTRIES ) ; } else { space_in_fifo = gsI2cCmd . ui8TxIntSize ; } do { if ( gsI2cCmd . ui16RestartAfterByte != 0 ) { if ( gsI2cCmd . ui32CurrByteCount == gsI2cCmd . ui16RestartAfterByte ) { gsI2cCmd . ui16RestartAfterByte = 0 ; REG_I2C2_CMD_FIFO_DATA = I2C_CMD_RESTART ; break ; } } gsI2cCmd . ui32CurrByteCount = gsI2cCmd . ui32CurrByteCount + 1 ; if ( gsI2cCmd . ui16TxLen > 4 ) { REG_I2C2_TXRX_1BYTE_FIFO_DATA = * gsI2cCmd . pui8TxData ++ ; gsI2cCmd . ui16TxLen -- ; if ( gsI2cCmd . ui16TxLen == 0 ) { REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN | BM_I2C2_INT_EN_UNACK_EN ; REG_I2C2_CONFIG = ( REG_I2C2_CONFIG & ~ BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) | ( gsI2cCmd . ui8RxIntSize << BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) ; } } else if ( ( gsI2cCmd . bRxLenIs0 == 1 ) && ( gsI2cCmd . ui16TxLen == 1 ) ) { REG_I2C2_CMD_FIFO_DATA = I2C_CMD_END_WRITE ; REG_I2C2_INT_EN = BM_I2C2_INT_EN_CMD_DONE | BM_I2C2_INT_EN_UNACK_EN ; gsI2cCmd . ui16TxLen -- ; REG_I2C2_CONFIG = ( REG_I2C2_CONFIG & ~ BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) | ( gsI2cCmd . ui8RxIntSize << BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) ; break ; } else if ( ( gsI2cCmd . bRxLenIs1 == 1 ) && ( gsI2cCmd . ui16TxLen == 2 ) ) { REG_I2C2_TXRX_1BYTE_FIFO_DATA = 0xff ; gsI2cCmd . ui16TxLen -- ; } else if ( ( gsI2cCmd . bRxLenIs1 == 1 ) && ( gsI2cCmd . ui16TxLen == 1 ) ) { REG_I2C2_CMD_FIFO_DATA = I2C_CMD_BEGIN_READ | I2C_CMD_END_READ ; gsI2cCmd . ui16TxLen -- ; REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN | BM_I2C2_INT_EN_UNACK_EN ; REG_I2C2_CONFIG = ( REG_I2C2_CONFIG & ~ BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) | ( gsI2cCmd . ui8RxIntSize << BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) ; break ; } else if ( ( gsI2cCmd . bRxLenIsGt1 == 1 ) && ( gsI2cCmd . ui16TxLen == 4 ) ) { REG_I2C2_TXRX_1BYTE_FIFO_DATA = 0xff ; gsI2cCmd . ui16TxLen -- ; } else if ( ( gsI2cCmd . bRxLenIsGt1 == 1 ) && ( gsI2cCmd . ui16TxLen == 3 ) ) { REG_I2C2_CMD_FIFO_DATA = I2C_CMD_BEGIN_READ ; gsI2cCmd . ui16TxLen -- ; } else if ( ( gsI2cCmd . bRxLenIsGt1 == 1 ) && ( gsI2cCmd . ui16TxLen == 2 ) ) { REG_I2C2_CMD_FIFO_DATA = I2C_CMD_DUMMYBYTE ; gsI2cCmd . ui16TxLen -- ; } else if ( ( gsI2cCmd . bRxLenIsGt1 == 1 ) && ( gsI2cCmd . ui16TxLen == 1 ) ) { REG_I2C2_CMD_FIFO_DATA = I2C_CMD_END_READ ; gsI2cCmd . ui16TxLen -- ; REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN | BM_I2C2_INT_EN_UNACK_EN ; REG_I2C2_CONFIG = ( REG_I2C2_CONFIG & ~ BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) | ( gsI2cCmd . ui8RxIntSize << BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) ; break ; } else { REG_I2C2_TXRX_1BYTE_FIFO_DATA = * gsI2cCmd . pui8TxData ++ ; gsI2cCmd . ui16TxLen -- ; if ( gsI2cCmd . ui16TxLen == 0 ) { REG_I2C2_INT_EN = BM_I2C2_INT_EN_RX_HIT_LEVEL_EN | BM_I2C2_INT_EN_UNACK_EN ; REG_I2C2_CONFIG = ( REG_I2C2_CONFIG & ~ BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) | ( gsI2cCmd . ui8RxIntSize << BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) ; break ; } } } while ( -- space_in_fifo ) ; return ( eEtaSuccess ) ; }
EtaCspI2cProcessIntTxData - Process I2C Interrupt for TX Space Available
EtaCspI2cProcessIntTxData - Process I2C Interrupt for TX Space Available
// This allows for burst writes, which is more // efficient, but not requires an extra read. // Do work that // interrupt said we // have space for // Deal with restart // First we check if we have a restart, then we check if it is ours. If // not, continue with transactions. // This should // "disable" // restart since 0 // is illegal for // restart // position // Exit loop if we entered here. // This is the more common case, so we'll check this first and only go // to the exceptions if this common case is not true. // These are various exceptions // Note, this is the same as the // "else" clause at the bottom // below. // Just sent last byte. // Case where RX Length == 0 // Exit loop, we're done. // Cases where RX Length == 1 // // Go // to // RX // Exit loop, we're done. // Cases where RX Length >1 // // Go // to // RX // Exit loop, we're done. // Just sent last byte. // Exit loop, we're done.