abc/src/base/bac/bacReadVer.c
// check if it is a Verilog predefined module
check if it is a Verilog predefined module
check if it is a Verilog predefined module
static inline int Psr_ManIsVerilogModule( Psr_Man_t * p, char * pName )
{
    int i;
    for ( i = 0; s_VerilogModules[i]; i++ )
        if ( !strcmp(pName, s_VerilogModules[i]) )
            return BAC_BOX_CF + i;
    return 0;
}
static inline int Psr_ManIsVerilogModule ( Psr_Man_t * p , char * pName ) { int i ; for ( i = 0 ; s_VerilogModules [ i ] ; i ++ ) if ( ! strcmp ( pName , s_VerilogModules [ i ] ) ) return BAC_BOX_CF + i ; return 0 ; }
check if it is a Verilog predefined module
check if it is a Verilog predefined module