Platform/ECM3532/DSP/hw/csp/ecm3532/src/eta_csp_i2c.c
/***************************************************************************/
/**
 *
 *  EtaCspI2cProcessIntRxData - Process I2C Interrupt for RX Data Available
 *
 *
 ******************************************************************************/
Process I2C Interrupt for RX Data Available
Process I2C Interrupt for RX Data Available
tEtaStatus
EtaCspI2cProcessIntRxData(void)
{
    uint8_t space_in_fifo;
    uint16_t rx_word;
    if((gsI2cCmd.bCmdActive == 0) ||
       (gsI2cCmd.ui16RxLen == 0))
    {
        return(eEtaI2cCmdSequenceErr);
    }
    if(ETA_CSP_I2C_EN_GREEDY_INT) 
    {
        space_in_fifo =
            (REG_I2C2_RX_FIFO_DEBUG & BM_I2C2_RX_FIFO_DEBUG_ENTRIES);
    }
    else
    {
        space_in_fifo = gsI2cCmd.ui8RxIntSize; 
        if(space_in_fifo > gsI2cCmd.ui16RxLen)
        {
            space_in_fifo = gsI2cCmd.ui16RxLen;
        }
    }
    do
    {
        if(space_in_fifo >= 2)
        {
            rx_word = REG_I2C2_RX_2BYTE_FIFO_DATA;
            *gsI2cCmd.pui8RxData++ = ((rx_word >> 0) & 0xff);
            *gsI2cCmd.pui8RxData++ = ((rx_word >> 8) & 0xff);
            gsI2cCmd.ui16RxLen -= 2;
            space_in_fifo -= 2;
        }
        else
        {
            rx_word = REG_I2C2_TXRX_1BYTE_FIFO_DATA;
            *gsI2cCmd.pui8RxData++ = ((rx_word >> 0) & 0xff);
            gsI2cCmd.ui16RxLen--;
            space_in_fifo--;
        }
        if(gsI2cCmd.ui16RxLen == 0) 
        {
            REG_I2C2_INT_EN = BM_I2C2_INT_EN_CMD_DONE | BM_I2C2_INT_EN_UNACK_EN;
        }
        if((space_in_fifo < 2) & (gsI2cCmd.ui16RxLen >= 2))
        {
            break; 
        }
        if(gsI2cCmd.ui16RxLen == 0)
        {
            break; 
        }
    }
    while(space_in_fifo);
    if(gsI2cCmd.ui8RxIntSize > gsI2cCmd.ui16RxLen)
    {
        REG_I2C2_CONFIG =
            (REG_I2C2_CONFIG & ~BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL) |
            (gsI2cCmd.ui16RxLen << BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL);
    }
    return(eEtaSuccess);
}
tEtaStatus EtaCspI2cProcessIntRxData ( void ) { uint8_t space_in_fifo ; uint16_t rx_word ; if ( ( gsI2cCmd . bCmdActive == 0 ) || ( gsI2cCmd . ui16RxLen == 0 ) ) { return ( eEtaI2cCmdSequenceErr ) ; } if ( ETA_CSP_I2C_EN_GREEDY_INT ) { space_in_fifo = ( REG_I2C2_RX_FIFO_DEBUG & BM_I2C2_RX_FIFO_DEBUG_ENTRIES ) ; } else { space_in_fifo = gsI2cCmd . ui8RxIntSize ; if ( space_in_fifo > gsI2cCmd . ui16RxLen ) { space_in_fifo = gsI2cCmd . ui16RxLen ; } } do { if ( space_in_fifo >= 2 ) { rx_word = REG_I2C2_RX_2BYTE_FIFO_DATA ; * gsI2cCmd . pui8RxData ++ = ( ( rx_word >> 0 ) & 0xff ) ; * gsI2cCmd . pui8RxData ++ = ( ( rx_word >> 8 ) & 0xff ) ; gsI2cCmd . ui16RxLen -= 2 ; space_in_fifo -= 2 ; } else { rx_word = REG_I2C2_TXRX_1BYTE_FIFO_DATA ; * gsI2cCmd . pui8RxData ++ = ( ( rx_word >> 0 ) & 0xff ) ; gsI2cCmd . ui16RxLen -- ; space_in_fifo -- ; } if ( gsI2cCmd . ui16RxLen == 0 ) { REG_I2C2_INT_EN = BM_I2C2_INT_EN_CMD_DONE | BM_I2C2_INT_EN_UNACK_EN ; } if ( ( space_in_fifo < 2 ) & ( gsI2cCmd . ui16RxLen >= 2 ) ) { break ; } if ( gsI2cCmd . ui16RxLen == 0 ) { break ; } } while ( space_in_fifo ) ; if ( gsI2cCmd . ui8RxIntSize > gsI2cCmd . ui16RxLen ) { REG_I2C2_CONFIG = ( REG_I2C2_CONFIG & ~ BM_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) | ( gsI2cCmd . ui16RxLen << BP_I2C2_CONFIG_RX_FIFO_INT_LEVEL ) ; } return ( eEtaSuccess ) ; }
EtaCspI2cProcessIntRxData - Process I2C Interrupt for RX Data Available
EtaCspI2cProcessIntRxData - Process I2C Interrupt for RX Data Available
// This allows for burst writes, which is more // efficient, but not requires an extra read. // Do work that // interrupt said we // have space for // If we have data to send, ignore receive data. // Just received last byte. // If we drop low enough that we cannot bulk transfer, exit // loop, wait for next int. // Exit loop, we're done.