FreeBSD/sys/dev/cxgb/common/cxgb_t3_hw.c
/**
 *	t3_slow_intr_handler - control path interrupt handler
 *	@adapter: the adapter
 *
 *	T3 interrupt handler for non-data interrupt events, e.g., errors.
 *	The designation 'slow' is because it involves register reads, while
 *	data interrupts typically don't involve any MMIOs.
 */
control path interrupt handler
@adapter: the adapter

T3 interrupt handler for non-data interrupt events, e.g., errors.
The designation 'slow' is because it involves register reads, while
data interrupts typically don't involve any MMIOs.
control path interrupt handler @adapter : the adapter T3 interrupt handler for non - data interrupt events e . g . errors . The designation ' slow ' is because it involves register reads while data interrupts typically don ' t involve any MMIOs .
int t3_slow_intr_handler(adapter_t *adapter)
{
	u32 cause = t3_read_reg(adapter, A_PL_INT_CAUSE0);
	cause &= adapter->slow_intr_mask;
	if (!cause)
		return 0;
	if (cause & F_PCIM0) {
		if (is_pcie(adapter))
			pcie_intr_handler(adapter);
		else
			pci_intr_handler(adapter);
	}
	if (cause & F_SGE3)
		t3_sge_err_intr_handler(adapter);
	if (cause & F_MC7_PMRX)
		mc7_intr_handler(&adapter->pmrx);
	if (cause & F_MC7_PMTX)
		mc7_intr_handler(&adapter->pmtx);
	if (cause & F_MC7_CM)
		mc7_intr_handler(&adapter->cm);
	if (cause & F_CIM)
		cim_intr_handler(adapter);
	if (cause & F_TP1)
		tp_intr_handler(adapter);
	if (cause & F_ULP2_RX)
		ulprx_intr_handler(adapter);
	if (cause & F_ULP2_TX)
		ulptx_intr_handler(adapter);
	if (cause & F_PM1_RX)
		pmrx_intr_handler(adapter);
	if (cause & F_PM1_TX)
		pmtx_intr_handler(adapter);
	if (cause & F_CPL_SWITCH)
		cplsw_intr_handler(adapter);
	if (cause & F_MPS0)
		mps_intr_handler(adapter);
	if (cause & F_MC5A)
		t3_mc5_intr_handler(&adapter->mc5);
	if (cause & F_XGMAC0_0)
		mac_intr_handler(adapter, 0);
	if (cause & F_XGMAC0_1)
		mac_intr_handler(adapter, 1);
	if (cause & F_T3DBG)
		phy_intr_handler(adapter);
	t3_write_reg(adapter, A_PL_INT_CAUSE0, cause);
	(void) t3_read_reg(adapter, A_PL_INT_CAUSE0); 
	return 1;
}
int t3_slow_intr_handler ( adapter_t * adapter ) { u32 cause = t3_read_reg ( adapter , A_PL_INT_CAUSE0 ) ; cause &= adapter -> slow_intr_mask ; if ( ! cause ) return 0 ; if ( cause & F_PCIM0 ) { if ( is_pcie ( adapter ) ) pcie_intr_handler ( adapter ) ; else pci_intr_handler ( adapter ) ; } if ( cause & F_SGE3 ) t3_sge_err_intr_handler ( adapter ) ; if ( cause & F_MC7_PMRX ) mc7_intr_handler ( & adapter -> pmrx ) ; if ( cause & F_MC7_PMTX ) mc7_intr_handler ( & adapter -> pmtx ) ; if ( cause & F_MC7_CM ) mc7_intr_handler ( & adapter -> cm ) ; if ( cause & F_CIM ) cim_intr_handler ( adapter ) ; if ( cause & F_TP1 ) tp_intr_handler ( adapter ) ; if ( cause & F_ULP2_RX ) ulprx_intr_handler ( adapter ) ; if ( cause & F_ULP2_TX ) ulptx_intr_handler ( adapter ) ; if ( cause & F_PM1_RX ) pmrx_intr_handler ( adapter ) ; if ( cause & F_PM1_TX ) pmtx_intr_handler ( adapter ) ; if ( cause & F_CPL_SWITCH ) cplsw_intr_handler ( adapter ) ; if ( cause & F_MPS0 ) mps_intr_handler ( adapter ) ; if ( cause & F_MC5A ) t3_mc5_intr_handler ( & adapter -> mc5 ) ; if ( cause & F_XGMAC0_0 ) mac_intr_handler ( adapter , 0 ) ; if ( cause & F_XGMAC0_1 ) mac_intr_handler ( adapter , 1 ) ; if ( cause & F_T3DBG ) phy_intr_handler ( adapter ) ; t3_write_reg ( adapter , A_PL_INT_CAUSE0 , cause ) ; ( void ) t3_read_reg ( adapter , A_PL_INT_CAUSE0 ) ; return 1 ; }
t3_slow_intr_handler - control path interrupt handler
      @adapter: the adapter
t3_slow_intr_handler - control path interrupt handler @adapter : the adapter
/* Clear the interrupts just processed. */ /* flush */