kernels/linux-2.4.0/arch/mips/cobalt/cobaltscc.c
/*
 * Function: SccInit
 *
 * Description: Initialize all the SCC registers for 19200 baud, asynchronous,
 *		8 bit, 1 stop bit, no parity communication (Channel A)
 *
 * In: none
 *
 * Out: none
 */
SccInit
Description: Initialize all the SCC registers for 19200 baud, asynchronous,
8 bit, 1 stop bit, no parity communication (Channel A)

none

none
SccInit Description : Initialize all the SCC registers for 19200 baud asynchronous 8 bit 1 stop bit no parity communication ( Channel A ) none none
void InitScc(void)
{
	Write8530(kSCC_ChanA | kSCC_Command, R9 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, FHWRES);
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R4 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, X16CLK | SB1);
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R3 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, Rx8);
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R5 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, Tx8 | DTR | RTS);
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R9 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, 0x0);
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R10 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, NRZ);
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R11 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, TCBR | RCBR | TRxCBR | TRxCOI); 
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R12 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, kSCC_115200 ); 
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R13 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, 0x00); 
	RegisterDelay();
	Write8530(kSCC_ChanA | kSCC_Command, R14 | NULLCODE);
	RegisterDelay();
	Write8530(kSCC_ChanA, LOOPBAK | BRSRC); 
	RegisterDelay();
}
void InitScc ( void ) { Write8530 ( kSCC_ChanA | kSCC_Command , R9 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , FHWRES ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R4 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , X16CLK | SB1 ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R3 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , Rx8 ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R5 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , Tx8 | DTR | RTS ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R9 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , 0x0 ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R10 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , NRZ ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R11 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , TCBR | RCBR | TRxCBR | TRxCOI ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R12 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , kSCC_115200 ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R13 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , 0x00 ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA | kSCC_Command , R14 | NULLCODE ) ; RegisterDelay ( ) ; Write8530 ( kSCC_ChanA , LOOPBAK | BRSRC ) ; RegisterDelay ( ) ; }
Function: SccInit
 Description: Initialize all the SCC registers for 19200 baud, asynchronous,
              8 bit, 1 stop bit, no parity communication (Channel A)
Function : SccInit Description : Initialize all the SCC registers for 19200 baud asynchronous 8 bit 1 stop bit no parity communication ( Channel A )
/* Force hardware reset */ /* x32 clock, 1 stop bit, no parity */ /* Rx 8 bits, Rx disabled */ /* Tx 8 bits, DTR, RTS, Tx off */ /* Int. Disabled */ /* NRZ */ /* Tx & Rx = BRG out, TRxC = BRG out */ /* Time constant = 0x01 */ /* Time constant high = 0x00 */ /* BRG in = ~RTxC, BRG off, loopback */