FreeBSD/sys/arm/arm/pmap-v6.c
/*
 *  Set TEX remapping registers in current CPU.
 */
Set TEX remapping registers in current CPU.
Set TEX remapping registers in current CPU .
void
pmap_set_tex(void)
{
	uint32_t prrr, nmrr;
	uint32_t type, inner, outer, nos;
	int i;
#ifdef PMAP_PTE_NOCACHE
	if (cpuinfo.coherent_walk) {
		pt_memattr = VM_MEMATTR_WB_WA;
		ttb_flags = encode_ttb_flags(0);
	}
	else {
		pt_memattr = VM_MEMATTR_NOCACHE;
		ttb_flags = encode_ttb_flags(1);
	}
#else
	pt_memattr = VM_MEMATTR_WB_WA;
	ttb_flags = encode_ttb_flags(0);
#endif
	prrr = 0;
	nmrr = 0;
	for (i = 0; i < 8; i++) {
		type = (tex_class[i] >> TEXDEF_TYPE_SHIFT) &
			TEXDEF_TYPE_MASK;
		inner = (tex_class[i] >> TEXDEF_INNER_SHIFT) &
			TEXDEF_INNER_MASK;
		outer = (tex_class[i] >> TEXDEF_OUTER_SHIFT) &
			TEXDEF_OUTER_MASK;
		nos = (tex_class[i] >> TEXDEF_NOS_SHIFT) &
			TEXDEF_NOS_MASK;
		prrr |= type  << (i * 2);
		prrr |= nos   << (i + 24);
		nmrr |= inner << (i * 2);
		nmrr |= outer << (i * 2 + 16);
	}
	prrr |= PRRR_DS0 | PRRR_DS1;
#ifdef SMP
	prrr |= PRRR_NS1;
#endif
	cp15_prrr_set(prrr);
	cp15_nmrr_set(nmrr);
	tlb_flush_all_local();
}
void pmap_set_tex ( void ) { uint32_t prrr , nmrr ; uint32_t type , inner , outer , nos ; int i ; #ifdef PMAP_PTE_NOCACHE if ( cpuinfo . coherent_walk ) { pt_memattr = VM_MEMATTR_WB_WA ; ttb_flags = encode_ttb_flags ( 0 ) ; } else { pt_memattr = VM_MEMATTR_NOCACHE ; ttb_flags = encode_ttb_flags ( 1 ) ; } #else pt_memattr = VM_MEMATTR_WB_WA ; ttb_flags = encode_ttb_flags ( 0 ) ; #endif prrr = 0 ; nmrr = 0 ; for ( i = 0 ; i < 8 ; i ++ ) { type = ( tex_class [ i ] >> TEXDEF_TYPE_SHIFT ) & TEXDEF_TYPE_MASK ; inner = ( tex_class [ i ] >> TEXDEF_INNER_SHIFT ) & TEXDEF_INNER_MASK ; outer = ( tex_class [ i ] >> TEXDEF_OUTER_SHIFT ) & TEXDEF_OUTER_MASK ; nos = ( tex_class [ i ] >> TEXDEF_NOS_SHIFT ) & TEXDEF_NOS_MASK ; prrr |= type << ( i * 2 ) ; prrr |= nos << ( i + 24 ) ; nmrr |= inner << ( i * 2 ) ; nmrr |= outer << ( i * 2 + 16 ) ; } prrr |= PRRR_DS0 | PRRR_DS1 ; #ifdef SMP prrr |= PRRR_NS1 ; #endif cp15_prrr_set ( prrr ) ; cp15_nmrr_set ( nmrr ) ; tlb_flush_all_local ( ) ; }
Set TEX remapping registers in current CPU.
Set TEX remapping registers in current CPU .
/* XXX fixme */ /* Build remapping register from TEX classes. */ /* Add shareable bits for device memory. */ /* Add shareable bits for normal memory in SMP case. */ /* Caches are disabled, so full TLB flush should be enough. */