FreeBSD/sys/dev/utopia/idtphy.c
/*
 * Update statistics from a IDT77155
 * This appears to be the same as for the Suni/Lite and Ultra. IDT however
 * makes no assessment about the transfer time. Assume 7us.
 */
Update statistics from a IDT77155
This appears to be the same as for the Suni/Lite and Ultra. IDT however
makes no assessment about the transfer time. Assume 7us.
Update statistics from a IDT77155 This appears to be the same as for the Suni / Lite and Ultra . IDT however makes no assessment about the transfer time . Assume 7us .
static void
idt77155_update_stats(struct utopia *utp)
{
	int err;
	if (!(utp->flags & UTP_FL_NORESET)) {
		err = UTP_WRITEREG(utp, IDTPHY_REGO_MRID, 0, 0);
	} else {
		err = UTP_WRITEREG(utp, IDTPHY_REGO_BIPC, 0, 0);
		err |= UTP_WRITEREG(utp, IDTPHY_REGO_B2EC, 0, 0);
		err |= UTP_WRITEREG(utp, IDTPHY_REGO_B3EC, 0, 0);
		err |= UTP_WRITEREG(utp, IDTPHY_REGO_CEC, 0, 0);
		err |= UTP_WRITEREG(utp, IDTPHY_REGO_TXCNT, 0, 0);
	}
	if (err) {
#ifdef DIAGNOSTIC
		printf("%s: register write error %s: %d\n", __func__,
		    utp->chip->name, err);
#endif
		return;
	}
	DELAY(8);
	utp->stats.rx_sbip += utopia_update(utp,
	    IDTPHY_REGO_BIPC, 2, 0xffff);
	utp->stats.rx_lbip += utopia_update(utp,
	    IDTPHY_REGO_B2EC, 3, 0xfffff);
	utp->stats.rx_lfebe += utopia_update(utp,
	    IDTPHY_REGO_FEBEC, 3, 0xfffff);
	utp->stats.rx_pbip += utopia_update(utp,
	    IDTPHY_REGO_B3EC, 2, 0xffff);
	utp->stats.rx_pfebe += utopia_update(utp,
	    IDTPHY_REGO_PFEBEC, 2, 0xffff);
	utp->stats.rx_corr += utopia_update(utp,
	    IDTPHY_REGO_CEC, 1, 0xff);
	utp->stats.rx_uncorr += utopia_update(utp,
	    IDTPHY_REGO_UEC, 1, 0xff);
	utp->stats.rx_cells += utopia_update(utp,
	    IDTPHY_REGO_RCCNT, 3, 0x7ffff);
	utp->stats.tx_cells += utopia_update(utp,
	    IDTPHY_REGO_TXCNT, 3, 0x7ffff);
}
static void idt77155_update_stats ( struct utopia * utp ) { int err ; if ( ! ( utp -> flags & UTP_FL_NORESET ) ) { err = UTP_WRITEREG ( utp , IDTPHY_REGO_MRID , 0 , 0 ) ; } else { err = UTP_WRITEREG ( utp , IDTPHY_REGO_BIPC , 0 , 0 ) ; err |= UTP_WRITEREG ( utp , IDTPHY_REGO_B2EC , 0 , 0 ) ; err |= UTP_WRITEREG ( utp , IDTPHY_REGO_B3EC , 0 , 0 ) ; err |= UTP_WRITEREG ( utp , IDTPHY_REGO_CEC , 0 , 0 ) ; err |= UTP_WRITEREG ( utp , IDTPHY_REGO_TXCNT , 0 , 0 ) ; } if ( err ) { #ifdef DIAGNOSTIC printf ( " \n " , __func__ , utp -> chip -> name , err ) ; #endif return ; } DELAY ( 8 ) ; utp -> stats . rx_sbip += utopia_update ( utp , IDTPHY_REGO_BIPC , 2 , 0xffff ) ; utp -> stats . rx_lbip += utopia_update ( utp , IDTPHY_REGO_B2EC , 3 , 0xfffff ) ; utp -> stats . rx_lfebe += utopia_update ( utp , IDTPHY_REGO_FEBEC , 3 , 0xfffff ) ; utp -> stats . rx_pbip += utopia_update ( utp , IDTPHY_REGO_B3EC , 2 , 0xffff ) ; utp -> stats . rx_pfebe += utopia_update ( utp , IDTPHY_REGO_PFEBEC , 2 , 0xffff ) ; utp -> stats . rx_corr += utopia_update ( utp , IDTPHY_REGO_CEC , 1 , 0xff ) ; utp -> stats . rx_uncorr += utopia_update ( utp , IDTPHY_REGO_UEC , 1 , 0xff ) ; utp -> stats . rx_cells += utopia_update ( utp , IDTPHY_REGO_RCCNT , 3 , 0x7ffff ) ; utp -> stats . tx_cells += utopia_update ( utp , IDTPHY_REGO_TXCNT , 3 , 0x7ffff ) ; }
Update statistics from a IDT77155
 This appears to be the same as for the Suni/Lite and Ultra.
Update statistics from a IDT77155 This appears to be the same as for the Suni / Lite and Ultra .
/* write to the master if we can */