qemu/target/hppa/translate.c
/* Emit a conditional branch to a direct target.  If the branch itself
   is nullified, we should have already used nullify_over.  */
Emit a conditional branch to a direct target.  If the branch itself
is nullified, we should have already used nullify_over.
Emit a conditional branch to a direct target . If the branch itself is nullified we should have already used nullify_over .
static DisasJumpType do_cbranch(DisasContext *ctx, target_sreg disp, bool is_n,
                                DisasCond *cond)
{
    target_ureg dest = iaoq_dest(ctx, disp);
    TCGLabel *taken = NULL;
    TCGCond c = cond->c;
    bool n;
    assert(ctx->null_cond.c == TCG_COND_NEVER);
    if (c == TCG_COND_ALWAYS) {
        return do_dbranch(ctx, dest, 0, is_n && disp >= 0);
    }
    if (c == TCG_COND_NEVER) {
        return do_dbranch(ctx, ctx->iaoq_n, 0, is_n && disp < 0);
    }
    taken = gen_new_label();
    cond_prep(cond);
    tcg_gen_brcond_reg(c, cond->a0, cond->a1, taken);
    cond_free(cond);
    n = is_n && disp < 0;
    if (n && use_nullify_skip(ctx)) {
        nullify_set(ctx, 0);
        gen_goto_tb(ctx, 0, ctx->iaoq_n, ctx->iaoq_n + 4);
    } else {
        if (!n && ctx->null_lab) {
            gen_set_label(ctx->null_lab);
            ctx->null_lab = NULL;
        }
        nullify_set(ctx, n);
        if (ctx->iaoq_n == -1) {
            tcg_gen_addi_reg(ctx->iaoq_n_var, cpu_iaoq_b, 4);
        }
        gen_goto_tb(ctx, 0, ctx->iaoq_b, ctx->iaoq_n);
    }
    gen_set_label(taken);
    n = is_n && disp >= 0;
    if (n && use_nullify_skip(ctx)) {
        nullify_set(ctx, 0);
        gen_goto_tb(ctx, 1, dest, dest + 4);
    } else {
        nullify_set(ctx, n);
        gen_goto_tb(ctx, 1, ctx->iaoq_b, dest);
    }
    if (ctx->null_lab) {
        gen_set_label(ctx->null_lab);
        ctx->null_lab = NULL;
        return DISAS_IAQ_N_STALE;
    } else {
        return DISAS_NORETURN;
    }
}
static DisasJumpType do_cbranch ( DisasContext * ctx , target_sreg disp , bool is_n , DisasCond * cond ) { target_ureg dest = iaoq_dest ( ctx , disp ) ; TCGLabel * taken = NULL ; TCGCond c = cond -> c ; bool n ; assert ( ctx -> null_cond . c == TCG_COND_NEVER ) ; if ( c == TCG_COND_ALWAYS ) { return do_dbranch ( ctx , dest , 0 , is_n && disp >= 0 ) ; } if ( c == TCG_COND_NEVER ) { return do_dbranch ( ctx , ctx -> iaoq_n , 0 , is_n && disp < 0 ) ; } taken = gen_new_label ( ) ; cond_prep ( cond ) ; tcg_gen_brcond_reg ( c , cond -> a0 , cond -> a1 , taken ) ; cond_free ( cond ) ; n = is_n && disp < 0 ; if ( n && use_nullify_skip ( ctx ) ) { nullify_set ( ctx , 0 ) ; gen_goto_tb ( ctx , 0 , ctx -> iaoq_n , ctx -> iaoq_n + 4 ) ; } else { if ( ! n && ctx -> null_lab ) { gen_set_label ( ctx -> null_lab ) ; ctx -> null_lab = NULL ; } nullify_set ( ctx , n ) ; if ( ctx -> iaoq_n == -1 ) { tcg_gen_addi_reg ( ctx -> iaoq_n_var , cpu_iaoq_b , 4 ) ; } gen_goto_tb ( ctx , 0 , ctx -> iaoq_b , ctx -> iaoq_n ) ; } gen_set_label ( taken ) ; n = is_n && disp >= 0 ; if ( n && use_nullify_skip ( ctx ) ) { nullify_set ( ctx , 0 ) ; gen_goto_tb ( ctx , 1 , dest , dest + 4 ) ; } else { nullify_set ( ctx , n ) ; gen_goto_tb ( ctx , 1 , ctx -> iaoq_b , dest ) ; } if ( ctx -> null_lab ) { gen_set_label ( ctx -> null_lab ) ; ctx -> null_lab = NULL ; return DISAS_IAQ_N_STALE ; } else { return DISAS_NORETURN ; } }
Emit a conditional branch to a direct target.
Emit a conditional branch to a direct target .
/* Handle TRUE and NEVER as direct branches.  */ /* Not taken: Condition not satisfied; nullify on backward branches. */ /* The temporary iaoq_n_var died at the branch above.
               Regenerate it here instead of saving it.  */ /* Taken: Condition satisfied; nullify on forward branches.  */ /* Not taken: the branch itself was nullified.  */