FreeBSD/sys/dev/pci/pci_pci.c
/*
 * Initialize I/O windows.
 */
Initialize I/O windows.
Initialize I / O windows .
static void
pcib_probe_windows(struct pcib_softc *sc)
{
	pci_addr_t max;
	device_t dev;
	uint32_t val;
	dev = sc->dev;
	if (pci_clear_pcib) {
		pcib_bridge_init(dev);
	}
	val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
	if (val == 0) {
		pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
		if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
			sc->io.valid = 1;
			pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
		}
	} else
		sc->io.valid = 1;
	if (sc->io.valid) {
		sc->io.reg = PCIR_IOBASEL_1;
		sc->io.step = 12;
		sc->io.mask = WIN_IO;
		sc->io.name = "I/O port";
		if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
			sc->io.base = PCI_PPBIOBASE(
			    pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
			sc->io.limit = PCI_PPBIOLIMIT(
			    pci_read_config(dev, PCIR_IOLIMITH_1, 2),
			    pci_read_config(dev, PCIR_IOLIMITL_1, 1));
			max = 0xffffffff;
		} else {
			sc->io.base = PCI_PPBIOBASE(0, val);
			sc->io.limit = PCI_PPBIOLIMIT(0,
			    pci_read_config(dev, PCIR_IOLIMITL_1, 1));
			max = 0xffff;
		}
		pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
	}
	sc->mem.valid = 1;
	sc->mem.reg = PCIR_MEMBASE_1;
	sc->mem.step = 20;
	sc->mem.mask = WIN_MEM;
	sc->mem.name = "memory";
	sc->mem.base = PCI_PPBMEMBASE(0,
	    pci_read_config(dev, PCIR_MEMBASE_1, 2));
	sc->mem.limit = PCI_PPBMEMLIMIT(0,
	    pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
	pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
	val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
	if (val == 0) {
		pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
		if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
			sc->pmem.valid = 1;
			pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
		}
	} else
		sc->pmem.valid = 1;
	if (sc->pmem.valid) {
		sc->pmem.reg = PCIR_PMBASEL_1;
		sc->pmem.step = 20;
		sc->pmem.mask = WIN_PMEM;
		sc->pmem.name = "prefetch";
		if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
			sc->pmem.base = PCI_PPBMEMBASE(
			    pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
			sc->pmem.limit = PCI_PPBMEMLIMIT(
			    pci_read_config(dev, PCIR_PMLIMITH_1, 4),
			    pci_read_config(dev, PCIR_PMLIMITL_1, 2));
			max = 0xffffffffffffffff;
		} else {
			sc->pmem.base = PCI_PPBMEMBASE(0, val);
			sc->pmem.limit = PCI_PPBMEMLIMIT(0,
			    pci_read_config(dev, PCIR_PMLIMITL_1, 2));
			max = 0xffffffff;
		}
		pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
		    RF_PREFETCHABLE, max);
	}
}
static void pcib_probe_windows ( struct pcib_softc * sc ) { pci_addr_t max ; device_t dev ; uint32_t val ; dev = sc -> dev ; if ( pci_clear_pcib ) { pcib_bridge_init ( dev ) ; } val = pci_read_config ( dev , PCIR_IOBASEL_1 , 1 ) ; if ( val == 0 ) { pci_write_config ( dev , PCIR_IOBASEL_1 , 0xff , 1 ) ; if ( pci_read_config ( dev , PCIR_IOBASEL_1 , 1 ) != 0 ) { sc -> io . valid = 1 ; pci_write_config ( dev , PCIR_IOBASEL_1 , 0 , 1 ) ; } } else sc -> io . valid = 1 ; if ( sc -> io . valid ) { sc -> io . reg = PCIR_IOBASEL_1 ; sc -> io . step = 12 ; sc -> io . mask = WIN_IO ; sc -> io . name = " " ; if ( ( val & PCIM_BRIO_MASK ) == PCIM_BRIO_32 ) { sc -> io . base = PCI_PPBIOBASE ( pci_read_config ( dev , PCIR_IOBASEH_1 , 2 ) , val ) ; sc -> io . limit = PCI_PPBIOLIMIT ( pci_read_config ( dev , PCIR_IOLIMITH_1 , 2 ) , pci_read_config ( dev , PCIR_IOLIMITL_1 , 1 ) ) ; max = 0xffffffff ; } else { sc -> io . base = PCI_PPBIOBASE ( 0 , val ) ; sc -> io . limit = PCI_PPBIOLIMIT ( 0 , pci_read_config ( dev , PCIR_IOLIMITL_1 , 1 ) ) ; max = 0xffff ; } pcib_alloc_window ( sc , & sc -> io , SYS_RES_IOPORT , 0 , max ) ; } sc -> mem . valid = 1 ; sc -> mem . reg = PCIR_MEMBASE_1 ; sc -> mem . step = 20 ; sc -> mem . mask = WIN_MEM ; sc -> mem . name = " " ; sc -> mem . base = PCI_PPBMEMBASE ( 0 , pci_read_config ( dev , PCIR_MEMBASE_1 , 2 ) ) ; sc -> mem . limit = PCI_PPBMEMLIMIT ( 0 , pci_read_config ( dev , PCIR_MEMLIMIT_1 , 2 ) ) ; pcib_alloc_window ( sc , & sc -> mem , SYS_RES_MEMORY , 0 , 0xffffffff ) ; val = pci_read_config ( dev , PCIR_PMBASEL_1 , 2 ) ; if ( val == 0 ) { pci_write_config ( dev , PCIR_PMBASEL_1 , 0xffff , 2 ) ; if ( pci_read_config ( dev , PCIR_PMBASEL_1 , 2 ) != 0 ) { sc -> pmem . valid = 1 ; pci_write_config ( dev , PCIR_PMBASEL_1 , 0 , 2 ) ; } } else sc -> pmem . valid = 1 ; if ( sc -> pmem . valid ) { sc -> pmem . reg = PCIR_PMBASEL_1 ; sc -> pmem . step = 20 ; sc -> pmem . mask = WIN_PMEM ; sc -> pmem . name = " " ; if ( ( val & PCIM_BRPM_MASK ) == PCIM_BRPM_64 ) { sc -> pmem . base = PCI_PPBMEMBASE ( pci_read_config ( dev , PCIR_PMBASEH_1 , 4 ) , val ) ; sc -> pmem . limit = PCI_PPBMEMLIMIT ( pci_read_config ( dev , PCIR_PMLIMITH_1 , 4 ) , pci_read_config ( dev , PCIR_PMLIMITL_1 , 2 ) ) ; max = 0xffffffffffffffff ; } else { sc -> pmem . base = PCI_PPBMEMBASE ( 0 , val ) ; sc -> pmem . limit = PCI_PPBMEMLIMIT ( 0 , pci_read_config ( dev , PCIR_PMLIMITL_1 , 2 ) ) ; max = 0xffffffff ; } pcib_alloc_window ( sc , & sc -> pmem , SYS_RES_MEMORY , RF_PREFETCHABLE , max ) ; } }
Initialize I/O windows.
Initialize I / O windows .
/* Determine if the I/O port window is implemented. */ /*
		 * If 'val' is zero, then only 16-bits of I/O space
		 * are supported.
		 */ /* Read the existing I/O port window. */ /* Read the existing memory window. */ /* Determine if the prefetchable memory window is implemented. */ /*
		 * If 'val' is zero, then only 32-bits of memory space
		 * are supported.
		 */ /* Read the existing prefetchable memory window. */