sources/common/libs/STM32Cube_F4/Middlewares/ST/STM32_USB_Device_Library/Class/CCID/Src/usbd_ccid_cmd.c
/**
  * @brief  PC_TO_RDR_SetDataRateAndClockFrequency
  *         Set the required Card Frequency and Data rate from the host.
  *         Response to this command message is the
  *         RDR_to_PC_DataRateAndClockFrequency
  * @param  pdev: device instance
  * @retval status of the command execution
  */
@brief  PC_TO_RDR_SetDataRateAndClockFrequency
Set the required Card Frequency and Data rate from the host.
Response to this command message is the
RDR_to_PC_DataRateAndClockFrequency
@param  pdev: device instance
@retval status of the command execution
@brief PC_TO_RDR_SetDataRateAndClockFrequency Set the required Card Frequency and Data rate from the host . Response to this command message is the RDR_to_PC_DataRateAndClockFrequency @param pdev : device instance @retval status of the command execution
uint8_t  PC_TO_RDR_SetDataRateAndClockFrequency(USBD_HandleTypeDef *pdev)
{
  USBD_CCID_HandleTypeDef  *hccid = (USBD_CCID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
  uint8_t error;
  uint32_t clockFrequency;
  uint32_t dataRate;
  uint32_t temp;
  error = CCID_CheckCommandParams(pdev, CHK_PARAM_SLOT | CHK_PARAM_CARD_PRESENT |
                                  CHK_PARAM_ABRFU3);
  if (error != 0U)
  {
    return error;
  }
  if (hccid->UsbBlkOutData.dwLength != 0x08U)
  {
    CCID_UpdateCommandStatus(pdev, (BM_COMMAND_STATUS_FAILED), (BM_ICC_PRESENT_ACTIVE));
    return SLOTERROR_BAD_LENTGH;
  }
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[0]) & 0x000000FFU;
  clockFrequency = temp;
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[1]) & 0x000000FFU;
  clockFrequency |= temp << 8;
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[2]) & 0x000000FFU;
  clockFrequency |= temp << 16;
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[3]) & 0x000000FFU;
  clockFrequency |= temp << 24;
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[4]) & 0x000000FFU;
  dataRate = temp;
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[5]) & 0x000000FFU;
  dataRate |= temp << 8;
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[6]) & 0x000000FFU;
  dataRate |= temp << 16;
  temp = (uint32_t)(hccid->UsbBlkOutData.abData[7]) & 0x000000FFU;
  dataRate |= temp << 24;
  error = SC_Itf_SetDataRateAndClockFrequency(clockFrequency, dataRate);
  hccid->UsbBlkInData.bError = error;
  if (error != SLOT_NO_ERROR)
  {
    hccid->UsbBlkInData.dwLength = 0;
    CCID_UpdateCommandStatus(pdev, (BM_COMMAND_STATUS_FAILED), (BM_ICC_PRESENT_ACTIVE));
  }
  else
  {
    hccid->UsbBlkInData.dwLength = 8;
    (hccid->UsbBlkInData.abData[0])  = (uint8_t)(clockFrequency & 0x000000FFU) ;
    (hccid->UsbBlkInData.abData[1])  = (uint8_t)((clockFrequency & 0x0000FF00U) >> 8);
    (hccid->UsbBlkInData.abData[2])  = (uint8_t)((clockFrequency & 0x00FF0000U) >> 16);
    (hccid->UsbBlkInData.abData[3])  = (uint8_t)((clockFrequency & 0xFF000000U) >> 24);
    (hccid->UsbBlkInData.abData[4])  = (uint8_t)(dataRate & 0x000000FFU) ;
    (hccid->UsbBlkInData.abData[5])  = (uint8_t)((dataRate & 0x0000FF00U) >> 8);
    (hccid->UsbBlkInData.abData[6])  = (uint8_t)((dataRate & 0x00FF0000U) >> 16);
    (hccid->UsbBlkInData.abData[7])  = (uint8_t)((dataRate & 0xFF000000U) >> 24);
    CCID_UpdateCommandStatus(pdev, (BM_COMMAND_STATUS_NO_ERROR), (BM_ICC_PRESENT_ACTIVE));
  }
  return error;
}
uint8_t PC_TO_RDR_SetDataRateAndClockFrequency ( USBD_HandleTypeDef * pdev ) { USBD_CCID_HandleTypeDef * hccid = ( USBD_CCID_HandleTypeDef * ) pdev -> pClassDataCmsit [ pdev -> classId ] ; uint8_t error ; uint32_t clockFrequency ; uint32_t dataRate ; uint32_t temp ; error = CCID_CheckCommandParams ( pdev , CHK_PARAM_SLOT | CHK_PARAM_CARD_PRESENT | CHK_PARAM_ABRFU3 ) ; if ( error != 0U ) { return error ; } if ( hccid -> UsbBlkOutData . dwLength != 0x08U ) { CCID_UpdateCommandStatus ( pdev , ( BM_COMMAND_STATUS_FAILED ) , ( BM_ICC_PRESENT_ACTIVE ) ) ; return SLOTERROR_BAD_LENTGH ; } temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 0 ] ) & 0x000000FFU ; clockFrequency = temp ; temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 1 ] ) & 0x000000FFU ; clockFrequency |= temp << 8 ; temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 2 ] ) & 0x000000FFU ; clockFrequency |= temp << 16 ; temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 3 ] ) & 0x000000FFU ; clockFrequency |= temp << 24 ; temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 4 ] ) & 0x000000FFU ; dataRate = temp ; temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 5 ] ) & 0x000000FFU ; dataRate |= temp << 8 ; temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 6 ] ) & 0x000000FFU ; dataRate |= temp << 16 ; temp = ( uint32_t ) ( hccid -> UsbBlkOutData . abData [ 7 ] ) & 0x000000FFU ; dataRate |= temp << 24 ; error = SC_Itf_SetDataRateAndClockFrequency ( clockFrequency , dataRate ) ; hccid -> UsbBlkInData . bError = error ; if ( error != SLOT_NO_ERROR ) { hccid -> UsbBlkInData . dwLength = 0 ; CCID_UpdateCommandStatus ( pdev , ( BM_COMMAND_STATUS_FAILED ) , ( BM_ICC_PRESENT_ACTIVE ) ) ; } else { hccid -> UsbBlkInData . dwLength = 8 ; ( hccid -> UsbBlkInData . abData [ 0 ] ) = ( uint8_t ) ( clockFrequency & 0x000000FFU ) ; ( hccid -> UsbBlkInData . abData [ 1 ] ) = ( uint8_t ) ( ( clockFrequency & 0x0000FF00U ) >> 8 ) ; ( hccid -> UsbBlkInData . abData [ 2 ] ) = ( uint8_t ) ( ( clockFrequency & 0x00FF0000U ) >> 16 ) ; ( hccid -> UsbBlkInData . abData [ 3 ] ) = ( uint8_t ) ( ( clockFrequency & 0xFF000000U ) >> 24 ) ; ( hccid -> UsbBlkInData . abData [ 4 ] ) = ( uint8_t ) ( dataRate & 0x000000FFU ) ; ( hccid -> UsbBlkInData . abData [ 5 ] ) = ( uint8_t ) ( ( dataRate & 0x0000FF00U ) >> 8 ) ; ( hccid -> UsbBlkInData . abData [ 6 ] ) = ( uint8_t ) ( ( dataRate & 0x00FF0000U ) >> 16 ) ; ( hccid -> UsbBlkInData . abData [ 7 ] ) = ( uint8_t ) ( ( dataRate & 0xFF000000U ) >> 24 ) ; CCID_UpdateCommandStatus ( pdev , ( BM_COMMAND_STATUS_NO_ERROR ) , ( BM_ICC_PRESENT_ACTIVE ) ) ; } return error ; }
@brief  PC_TO_RDR_SetDataRateAndClockFrequency
         Set the required Card Frequency and Data rate from the host.
@brief PC_TO_RDR_SetDataRateAndClockFrequency Set the required Card Frequency and Data rate from the host .
/* HERE we avoiding to an unaligned memory access*/