FreeBSD/sys/dev/drm2/i915/intel_iic.c
/*
 * The gmbus controller can combine a 1 or 2 byte write with a read that
 * immediately follows it by using an "INDEX" cycle.
 */
The gmbus controller can combine a 1 or 2 byte write with a read that
immediately follows it by using an "INDEX" cycle.
The gmbus controller can combine a 1 or 2 byte write with a read that immediately follows it by using an " INDEX " cycle .
static bool
gmbus_is_index_read(struct iic_msg *msgs, int i, int num)
{
	return (i + 1 < num &&
		!(msgs[i].flags & I2C_M_RD) && msgs[i].len <= 2 &&
		(msgs[i + 1].flags & I2C_M_RD));
}
static bool gmbus_is_index_read ( struct iic_msg * msgs , int i , int num ) { return ( i + 1 < num && ! ( msgs [ i ] . flags & I2C_M_RD ) && msgs [ i ] . len <= 2 && ( msgs [ i + 1 ] . flags & I2C_M_RD ) ) ; }
The gmbus controller can combine a 1 or 2 byte write with a read that
 immediately follows it by using an "INDEX" cycle.
The gmbus controller can combine a 1 or 2 byte write with a read that immediately follows it by using an " INDEX " cycle .