FreeBSD/sys/mips/mips/tlb.c
/*
 * Invalidates any TLB entries that map a virtual page from the specified
 * address range.  If "end" is zero, then every virtual page is considered to
 * be within the address range's upper bound.
 */
Invalidates any TLB entries that map a virtual page from the specified
address range.  If "end" is zero, then every virtual page is considered to
be within the address range's upper bound.
Invalidates any TLB entries that map a virtual page from the specified address range . If " end " is zero then every virtual page is considered to be within the address range ' s upper bound .
void
tlb_invalidate_range(pmap_t pmap, vm_offset_t start, vm_offset_t end)
{
	register_t asid, end_hi, hi, hi_pagemask, s, save_asid, start_hi;
	int i;
	KASSERT(start < end || (end == 0 && start > 0),
	    ("tlb_invalidate_range: invalid range"));
	start &= ~((1 << TLBMASK_SHIFT) - 1);
	end = roundup2(end, 1 << TLBMASK_SHIFT);
	s = intr_disable();
	save_asid = mips_rd_entryhi() & TLBHI_ASID_MASK;
	asid = pmap_asid(pmap);
	start_hi = TLBHI_ENTRY(start, asid);
	end_hi = TLBHI_ENTRY(end, asid);
	if (end - start < num_tlbentries << TLBMASK_SHIFT || (end == 0 &&
	    start >= -(num_tlbentries << TLBMASK_SHIFT))) {
		for (hi = start_hi; hi != end_hi; hi += 1 << TLBMASK_SHIFT) {
			mips_wr_pagemask(0);
			mips_wr_entryhi(hi);
			tlb_probe();
			i = mips_rd_index();
			if (i >= 0)
				tlb_invalidate_one(i);
		}
	} else {
		for (i = mips_rd_wired(); i < num_tlbentries; i++) {
			mips_wr_index(i);
			tlb_read();
			hi = mips_rd_entryhi();
			if ((hi & TLBHI_ASID_MASK) == asid && (hi < end_hi ||
			    end == 0)) {
				hi_pagemask = mips_rd_pagemask();
				if (hi >= (start_hi & ~(hi_pagemask <<
				    TLBMASK_SHIFT)))
					tlb_invalidate_one(i);
			}
		}
	}
	mips_wr_entryhi(save_asid);
	intr_restore(s);
}
void tlb_invalidate_range ( pmap_t pmap , vm_offset_t start , vm_offset_t end ) { register_t asid , end_hi , hi , hi_pagemask , s , save_asid , start_hi ; int i ; KASSERT ( start < end || ( end == 0 && start > 0 ) , ( " " ) ) ; start &= ~ ( ( 1 << TLBMASK_SHIFT ) - 1 ) ; end = roundup2 ( end , 1 << TLBMASK_SHIFT ) ; s = intr_disable ( ) ; save_asid = mips_rd_entryhi ( ) & TLBHI_ASID_MASK ; asid = pmap_asid ( pmap ) ; start_hi = TLBHI_ENTRY ( start , asid ) ; end_hi = TLBHI_ENTRY ( end , asid ) ; if ( end - start < num_tlbentries << TLBMASK_SHIFT || ( end == 0 && start >= - ( num_tlbentries << TLBMASK_SHIFT ) ) ) { for ( hi = start_hi ; hi != end_hi ; hi += 1 << TLBMASK_SHIFT ) { mips_wr_pagemask ( 0 ) ; mips_wr_entryhi ( hi ) ; tlb_probe ( ) ; i = mips_rd_index ( ) ; if ( i >= 0 ) tlb_invalidate_one ( i ) ; } } else { for ( i = mips_rd_wired ( ) ; i < num_tlbentries ; i ++ ) { mips_wr_index ( i ) ; tlb_read ( ) ; hi = mips_rd_entryhi ( ) ; if ( ( hi & TLBHI_ASID_MASK ) == asid && ( hi < end_hi || end == 0 ) ) { hi_pagemask = mips_rd_pagemask ( ) ; if ( hi >= ( start_hi & ~ ( hi_pagemask << TLBMASK_SHIFT ) ) ) tlb_invalidate_one ( i ) ; } } } mips_wr_entryhi ( save_asid ) ; intr_restore ( s ) ; }
Invalidates any TLB entries that map a virtual page from the specified
 address range.
Invalidates any TLB entries that map a virtual page from the specified address range .
/*
	 * Truncate the virtual address "start" to an even page frame number,
	 * and round the virtual address "end" to an even page frame number.
	 */ /*
	 * Select the fastest method for invalidating the TLB entries.
	 */ /*
		 * The virtual address range is small compared to the size of
		 * the TLB.  Probe the TLB for each even numbered page frame
		 * within the virtual address range.
		 */ /*
		 * The virtual address range is large compared to the size of
		 * the TLB.  Test every non-wired TLB entry.
		 */ /*
				 * If "hi" is a large page that spans
				 * "start_hi", then it must be invalidated.
				 */