FreeBSD/sys/dev/rp/rp.c
/***************************************************************************
Function: sInitChan
Purpose:  Initialization of a channel and channel structure
Call:	  sInitChan(CtlP,ChP,AiopNum,ChanNum)
	  CONTROLLER_T *CtlP; Ptr to controller structure
	  CHANNEL_T *ChP; Ptr to channel structure
	  int AiopNum; AIOP number within controller
	  int ChanNum; Channel number within AIOP
Return:   int: TRUE if initialization succeeded, FALSE if it fails because channel
	       number exceeds number of channels available in AIOP.
Comments: This function must be called before a channel can be used.
Warnings: No range checking on any of the parameters is done.

	  No context switches are allowed while executing this function.
*/
sInitChan
Purpose:  Initialization of a channel and channel structure
Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
CONTROLLER_T *CtlP; Ptr to controller structure
CHANNEL_T *ChP; Ptr to channel structure
int AiopNum; AIOP number within controller
int ChanNum; Channel number within AIOP
Return:   int: TRUE if initialization succeeded, FALSE if it fails because channel
number exceeds number of channels available in AIOP.
Comments: This function must be called before a channel can be used.
Warnings: No range checking on any of the parameters is done.

No context switches are allowed while executing this function.
sInitChan Purpose : Initialization of a channel and channel structure Call : sInitChan ( CtlP ChP AiopNum ChanNum ) CONTROLLER_T * CtlP ; Ptr to controller structure CHANNEL_T * ChP ; Ptr to channel structure int AiopNum ; AIOP number within controller int ChanNum ; Channel number within AIOP Return : int : TRUE if initialization succeeded FALSE if it fails because channel number exceeds number of channels available in AIOP . Comments : This function must be called before a channel can be used . Warnings : No range checking on any of the parameters is done . No context switches are allowed while executing this function .
int sInitChan(	CONTROLLER_T *CtlP,
		CHANNEL_T *ChP,
		int AiopNum,
		int ChanNum)
{
   int i, ChOff;
   Byte_t *ChR;
   static Byte_t R[4];
   if(ChanNum >= CtlP->AiopNumChan[AiopNum])
      return(FALSE);		       
   ChP->CtlP = CtlP;
   ChP->ChanID = CtlP->AiopID[AiopNum];
   ChP->AiopNum = AiopNum;
   ChP->ChanNum = ChanNum;
   for(i=0; i < RDATASIZE; i+=4)
   {
      R[0] = RData[i];
      R[1] = RData[i+1] + 0x10 * ChanNum;
      R[2] = RData[i+2];
      R[3] = RData[i+3];
      rp_writech4(ChP,_INDX_ADDR,le32dec(R));
   }
   ChR = ChP->R;
   for(i=0; i < RREGDATASIZE; i+=4)
   {
      ChR[i] = RRegData[i];
      ChR[i+1] = RRegData[i+1] + 0x10 * ChanNum;
      ChR[i+2] = RRegData[i+2];
      ChR[i+3] = RRegData[i+3];
   }
   ChOff = (Word_t)ChanNum * 0x1000;
   ChP->BaudDiv[0] = (Byte_t)(ChOff + _BAUD);
   ChP->BaudDiv[1] = (Byte_t)((ChOff + _BAUD) >> 8);
   ChP->BaudDiv[2] = (Byte_t)BRD9600;
   ChP->BaudDiv[3] = (Byte_t)(BRD9600 >> 8);
   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->BaudDiv));
   ChP->TxControl[0] = (Byte_t)(ChOff + _TX_CTRL);
   ChP->TxControl[1] = (Byte_t)((ChOff + _TX_CTRL) >> 8);
   ChP->TxControl[2] = 0;
   ChP->TxControl[3] = 0;
   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxControl));
   ChP->RxControl[0] = (Byte_t)(ChOff + _RX_CTRL);
   ChP->RxControl[1] = (Byte_t)((ChOff + _RX_CTRL) >> 8);
   ChP->RxControl[2] = 0;
   ChP->RxControl[3] = 0;
   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->RxControl));
   ChP->TxEnables[0] = (Byte_t)(ChOff + _TX_ENBLS);
   ChP->TxEnables[1] = (Byte_t)((ChOff + _TX_ENBLS) >> 8);
   ChP->TxEnables[2] = 0;
   ChP->TxEnables[3] = 0;
   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxEnables));
   ChP->TxCompare[0] = (Byte_t)(ChOff + _TXCMP1);
   ChP->TxCompare[1] = (Byte_t)((ChOff + _TXCMP1) >> 8);
   ChP->TxCompare[2] = 0;
   ChP->TxCompare[3] = 0;
   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxCompare));
   ChP->TxReplace1[0] = (Byte_t)(ChOff + _TXREP1B1);
   ChP->TxReplace1[1] = (Byte_t)((ChOff + _TXREP1B1) >> 8);
   ChP->TxReplace1[2] = 0;
   ChP->TxReplace1[3] = 0;
   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxReplace1));
   ChP->TxReplace2[0] = (Byte_t)(ChOff + _TXREP2);
   ChP->TxReplace2[1] = (Byte_t)((ChOff + _TXREP2) >> 8);
   ChP->TxReplace2[2] = 0;
   ChP->TxReplace2[3] = 0;
   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxReplace2));
   ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
   ChP->TxFIFO = ChOff + _TX_FIFO;
   rp_writech1(ChP,_CMD_REG,(Byte_t)ChanNum | RESTXFCNT); 
   rp_writech1(ChP,_CMD_REG,(Byte_t)ChanNum);  
   rp_writech2(ChP,_INDX_ADDR,ChP->TxFIFOPtrs); 
   rp_writech2(ChP,_INDX_DATA,0);
   ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
   ChP->RxFIFO = ChOff + _RX_FIFO;
   rp_writech1(ChP,_CMD_REG,(Byte_t)ChanNum | RESRXFCNT); 
   rp_writech1(ChP,_CMD_REG,(Byte_t)ChanNum);  
   rp_writech2(ChP,_INDX_ADDR,ChP->RxFIFOPtrs); 
   rp_writech2(ChP,_INDX_DATA,0);
   rp_writech2(ChP,_INDX_ADDR,ChP->RxFIFOPtrs + 2); 
   rp_writech2(ChP,_INDX_DATA,0);
   ChP->TxPrioCnt = ChOff + _TXP_CNT;
   rp_writech2(ChP,_INDX_ADDR,ChP->TxPrioCnt);
   rp_writech1(ChP,_INDX_DATA,0);
   ChP->TxPrioPtr = ChOff + _TXP_PNTR;
   rp_writech2(ChP,_INDX_ADDR,ChP->TxPrioPtr);
   rp_writech1(ChP,_INDX_DATA,0);
   ChP->TxPrioBuf = ChOff + _TXP_BUF;
   sEnRxProcessor(ChP); 	       
   return(TRUE);
}
int sInitChan ( CONTROLLER_T * CtlP , CHANNEL_T * ChP , int AiopNum , int ChanNum ) { int i , ChOff ; Byte_t * ChR ; static Byte_t R [ 4 ] ; if ( ChanNum >= CtlP -> AiopNumChan [ AiopNum ] ) return ( FALSE ) ; ChP -> CtlP = CtlP ; ChP -> ChanID = CtlP -> AiopID [ AiopNum ] ; ChP -> AiopNum = AiopNum ; ChP -> ChanNum = ChanNum ; for ( i = 0 ; i < RDATASIZE ; i += 4 ) { R [ 0 ] = RData [ i ] ; R [ 1 ] = RData [ i + 1 ] + 0x10 * ChanNum ; R [ 2 ] = RData [ i + 2 ] ; R [ 3 ] = RData [ i + 3 ] ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( R ) ) ; } ChR = ChP -> R ; for ( i = 0 ; i < RREGDATASIZE ; i += 4 ) { ChR [ i ] = RRegData [ i ] ; ChR [ i + 1 ] = RRegData [ i + 1 ] + 0x10 * ChanNum ; ChR [ i + 2 ] = RRegData [ i + 2 ] ; ChR [ i + 3 ] = RRegData [ i + 3 ] ; } ChOff = ( Word_t ) ChanNum * 0x1000 ; ChP -> BaudDiv [ 0 ] = ( Byte_t ) ( ChOff + _BAUD ) ; ChP -> BaudDiv [ 1 ] = ( Byte_t ) ( ( ChOff + _BAUD ) >> 8 ) ; ChP -> BaudDiv [ 2 ] = ( Byte_t ) BRD9600 ; ChP -> BaudDiv [ 3 ] = ( Byte_t ) ( BRD9600 >> 8 ) ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( ChP -> BaudDiv ) ) ; ChP -> TxControl [ 0 ] = ( Byte_t ) ( ChOff + _TX_CTRL ) ; ChP -> TxControl [ 1 ] = ( Byte_t ) ( ( ChOff + _TX_CTRL ) >> 8 ) ; ChP -> TxControl [ 2 ] = 0 ; ChP -> TxControl [ 3 ] = 0 ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( ChP -> TxControl ) ) ; ChP -> RxControl [ 0 ] = ( Byte_t ) ( ChOff + _RX_CTRL ) ; ChP -> RxControl [ 1 ] = ( Byte_t ) ( ( ChOff + _RX_CTRL ) >> 8 ) ; ChP -> RxControl [ 2 ] = 0 ; ChP -> RxControl [ 3 ] = 0 ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( ChP -> RxControl ) ) ; ChP -> TxEnables [ 0 ] = ( Byte_t ) ( ChOff + _TX_ENBLS ) ; ChP -> TxEnables [ 1 ] = ( Byte_t ) ( ( ChOff + _TX_ENBLS ) >> 8 ) ; ChP -> TxEnables [ 2 ] = 0 ; ChP -> TxEnables [ 3 ] = 0 ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( ChP -> TxEnables ) ) ; ChP -> TxCompare [ 0 ] = ( Byte_t ) ( ChOff + _TXCMP1 ) ; ChP -> TxCompare [ 1 ] = ( Byte_t ) ( ( ChOff + _TXCMP1 ) >> 8 ) ; ChP -> TxCompare [ 2 ] = 0 ; ChP -> TxCompare [ 3 ] = 0 ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( ChP -> TxCompare ) ) ; ChP -> TxReplace1 [ 0 ] = ( Byte_t ) ( ChOff + _TXREP1B1 ) ; ChP -> TxReplace1 [ 1 ] = ( Byte_t ) ( ( ChOff + _TXREP1B1 ) >> 8 ) ; ChP -> TxReplace1 [ 2 ] = 0 ; ChP -> TxReplace1 [ 3 ] = 0 ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( ChP -> TxReplace1 ) ) ; ChP -> TxReplace2 [ 0 ] = ( Byte_t ) ( ChOff + _TXREP2 ) ; ChP -> TxReplace2 [ 1 ] = ( Byte_t ) ( ( ChOff + _TXREP2 ) >> 8 ) ; ChP -> TxReplace2 [ 2 ] = 0 ; ChP -> TxReplace2 [ 3 ] = 0 ; rp_writech4 ( ChP , _INDX_ADDR , le32dec ( ChP -> TxReplace2 ) ) ; ChP -> TxFIFOPtrs = ChOff + _TXF_OUTP ; ChP -> TxFIFO = ChOff + _TX_FIFO ; rp_writech1 ( ChP , _CMD_REG , ( Byte_t ) ChanNum | RESTXFCNT ) ; rp_writech1 ( ChP , _CMD_REG , ( Byte_t ) ChanNum ) ; rp_writech2 ( ChP , _INDX_ADDR , ChP -> TxFIFOPtrs ) ; rp_writech2 ( ChP , _INDX_DATA , 0 ) ; ChP -> RxFIFOPtrs = ChOff + _RXF_OUTP ; ChP -> RxFIFO = ChOff + _RX_FIFO ; rp_writech1 ( ChP , _CMD_REG , ( Byte_t ) ChanNum | RESRXFCNT ) ; rp_writech1 ( ChP , _CMD_REG , ( Byte_t ) ChanNum ) ; rp_writech2 ( ChP , _INDX_ADDR , ChP -> RxFIFOPtrs ) ; rp_writech2 ( ChP , _INDX_DATA , 0 ) ; rp_writech2 ( ChP , _INDX_ADDR , ChP -> RxFIFOPtrs + 2 ) ; rp_writech2 ( ChP , _INDX_DATA , 0 ) ; ChP -> TxPrioCnt = ChOff + _TXP_CNT ; rp_writech2 ( ChP , _INDX_ADDR , ChP -> TxPrioCnt ) ; rp_writech1 ( ChP , _INDX_DATA , 0 ) ; ChP -> TxPrioPtr = ChOff + _TXP_PNTR ; rp_writech2 ( ChP , _INDX_ADDR , ChP -> TxPrioPtr ) ; rp_writech1 ( ChP , _INDX_DATA , 0 ) ; ChP -> TxPrioBuf = ChOff + _TXP_BUF ; sEnRxProcessor ( ChP ) ; return ( TRUE ) ; }
Function: sInitChan
Purpose:  Initialization of a channel and channel structure
Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
CONTROLLER_T *CtlP; Ptr to controller structure
CHANNEL_T *ChP; Ptr to channel structure
int AiopNum; AIOP number within controller
int ChanNum; Channel number within AIOP
Return:   int: TRUE if initialization succeeded, FALSE if it fails because channel
number exceeds number of channels available in AIOP.
Function : sInitChan Purpose : Initialization of a channel and channel structure Call : sInitChan ( CtlP ChP AiopNum ChanNum ) CONTROLLER_T * CtlP ; Ptr to controller structure CHANNEL_T * ChP ; Ptr to channel structure int AiopNum ; AIOP number within controller int ChanNum ; Channel number within AIOP Return : int : TRUE if initialization succeeded FALSE if it fails because channel number exceeds number of channels available in AIOP .
/* exceeds num chans in AIOP */ /* Channel, AIOP, and controller identifiers */ /* Initialize the channel from the RData array */ /* Indexed registers */ /* apply reset Tx FIFO count */ /* remove reset Tx FIFO count */ /* clear Tx in/out ptrs */ /* apply reset Rx FIFO count */ /* remove reset Rx FIFO count */ /* clear Rx out ptr */ /* clear Rx in ptr */ /* start the Rx processor */