core/x86/instr.c
/* 
   opnd_uses_reg is now changed so that it does consider 8/16 bit
   register overlaps.  i think this change is OK and correct, but not
   sure.  as far as I'm aware, only my optimization stuff and the
   register stealing code (which is now not used, right?) relies on
   this code ==> but we now export it via CI API */
opnd_uses_reg is now changed so that it does consider 8/16 bit
register overlaps.  i think this change is OK and correct, but not
sure.  as far as I'm aware, only my optimization stuff and the
register stealing code (which is now not used, right?) relies on
this code ==> but we now export it via CI API
opnd_uses_reg is now changed so that it does consider 8 / 16 bit register overlaps . i think this change is OK and correct but not sure . as far as I ' m aware only my optimization stuff and the register stealing code ( which is now not used right? ) relies on this code == > but we now export it via CI API
bool 
opnd_uses_reg(opnd_t opnd, reg_id_t reg)
{
    if (reg == REG_NULL)
        return false;
    switch (opnd.kind) {
    case NULL_kind:
    case IMMED_INTEGER_kind:
    case IMMED_FLOAT_kind:
    case PC_kind:
    case FAR_PC_kind:
    case INSTR_kind:
    case FAR_INSTR_kind:
        return false;
    case REG_kind: 
        return (reg_fixer[reg] == reg_fixer[opnd_get_reg(opnd)]);
    case BASE_DISP_kind: 
        return (reg_fixer[reg] == reg_fixer[opnd_get_base(opnd)] || 
                reg_fixer[reg] == reg_fixer[opnd_get_index(opnd)] ||
                reg_fixer[reg] == reg_fixer[opnd_get_segment(opnd)]);
#ifdef X64
    case REL_ADDR_kind:
    case ABS_ADDR_kind:
        return (reg_fixer[reg] == reg_fixer[opnd_get_segment(opnd)]);
#endif
    default: 
        CLIENT_ASSERT(false, "opnd_uses_reg: unknown opnd type"); 
        return false;
    }    
}
bool opnd_uses_reg ( opnd_t opnd , reg_id_t reg ) { if ( reg == REG_NULL ) return false ; switch ( opnd . kind ) { case NULL_kind : case IMMED_INTEGER_kind : case IMMED_FLOAT_kind : case PC_kind : case FAR_PC_kind : case INSTR_kind : case FAR_INSTR_kind : return false ; case REG_kind : return ( reg_fixer [ reg ] == reg_fixer [ opnd_get_reg ( opnd ) ] ) ; case BASE_DISP_kind : return ( reg_fixer [ reg ] == reg_fixer [ opnd_get_base ( opnd ) ] || reg_fixer [ reg ] == reg_fixer [ opnd_get_index ( opnd ) ] || reg_fixer [ reg ] == reg_fixer [ opnd_get_segment ( opnd ) ] ) ; #ifdef X64 case REL_ADDR_kind : case ABS_ADDR_kind : return ( reg_fixer [ reg ] == reg_fixer [ opnd_get_segment ( opnd ) ] ) ; #endif default : CLIENT_ASSERT ( false , " " ) ; return false ; } }
opnd_uses_reg is now changed so that it does consider 8/16 bit
register overlaps.
opnd_uses_reg is now changed so that it does consider 8 / 16 bit register overlaps .