FreeBSD/usr.sbin/bhyvectl/bhyvectl.c
/*
 * Reference APM vol2, section 15.11 MSR Intercepts.
 */
Reference APM vol2, section 15.11 MSR Intercepts.
Reference APM vol2 section 15 . 11 MSR Intercepts .
static void
dump_amd_msr_pm(const char *bitmap, int vcpu)
{
	int byte, bit, readable, writeable;
	uint32_t msr;
	for (msr = 0; msr < 0x2000; msr++) {
		byte = msr / 4;
		bit = (msr % 4) * 2;
		readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
		writeable = (bitmap[byte] & (2 << bit)) ?  0 : 1;
		print_msr_pm(msr, vcpu, readable, writeable);
		byte += 2048;
		readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
		writeable = (bitmap[byte] & (2 << bit)) ?  0 : 1;
		print_msr_pm(msr + MSR_AMD6TH_START, vcpu, readable,
				writeable);
		byte += 4096;
		readable = (bitmap[byte] & (1 << bit)) ? 0 : 1;
		writeable = (bitmap[byte] & (2 << bit)) ?  0 : 1;
		print_msr_pm(msr + MSR_AMD7TH_START, vcpu, readable,
				writeable);
	}
}
static void dump_amd_msr_pm ( const char * bitmap , int vcpu ) { int byte , bit , readable , writeable ; uint32_t msr ; for ( msr = 0 ; msr < 0x2000 ; msr ++ ) { byte = msr / 4 ; bit = ( msr % 4 ) * 2 ; readable = ( bitmap [ byte ] & ( 1 << bit ) ) ? 0 : 1 ; writeable = ( bitmap [ byte ] & ( 2 << bit ) ) ? 0 : 1 ; print_msr_pm ( msr , vcpu , readable , writeable ) ; byte += 2048 ; readable = ( bitmap [ byte ] & ( 1 << bit ) ) ? 0 : 1 ; writeable = ( bitmap [ byte ] & ( 2 << bit ) ) ? 0 : 1 ; print_msr_pm ( msr + MSR_AMD6TH_START , vcpu , readable , writeable ) ; byte += 4096 ; readable = ( bitmap [ byte ] & ( 1 << bit ) ) ? 0 : 1 ; writeable = ( bitmap [ byte ] & ( 2 << bit ) ) ? 0 : 1 ; print_msr_pm ( msr + MSR_AMD7TH_START , vcpu , readable , writeable ) ; } }
Reference APM vol2, section 15.11 MSR Intercepts.
Reference APM vol2 section 15 . 11 MSR Intercepts .
/* Look at MSRs in the range 0x00000000 to 0x00001FFF */ /* Look at MSRs in the range 0xC0000000 to 0xC0001FFF */ /* MSR 0xC0010000 to 0xC0011FF is only for AMD */