FreeBSD/sys/dev/ixl/if_ixlv.c
/*
** Allocate and setup the interface queues
*/
Allocate and setup the interface queues
Allocate and setup the interface queues
static int
ixlv_setup_queues(struct ixlv_sc *sc)
{
	device_t		dev = sc->dev;
	struct ixl_vsi		*vsi;
	struct ixl_queue	*que;
	struct tx_ring		*txr;
	struct rx_ring		*rxr;
	int 			rsize, tsize;
	int			error = I40E_SUCCESS;
	vsi = &sc->vsi;
	vsi->back = (void *)sc;
	vsi->hw = &sc->hw;
	vsi->num_vlans = 0;
	if (!(vsi->queues =
		(struct ixl_queue *) malloc(sizeof(struct ixl_queue) *
		vsi->num_queues, M_DEVBUF, M_NOWAIT | M_ZERO))) {
			device_printf(dev, "Unable to allocate queue memory\n");
			error = ENOMEM;
			goto early;
	}
	for (int i = 0; i < vsi->num_queues; i++) {
		que = &vsi->queues[i];
		que->num_desc = ixlv_ringsz;
		que->me = i;
		que->vsi = vsi;
		vsi->active_queues |= (u64)1 << que->me;
		txr = &que->txr;
		txr->que = que;
		txr->tail = I40E_QTX_TAIL1(que->me);
		snprintf(txr->mtx_name, sizeof(txr->mtx_name), "%s:tx(%d)",
		    device_get_nameunit(dev), que->me);
		mtx_init(&txr->mtx, txr->mtx_name, NULL, MTX_DEF);
		tsize = roundup2((que->num_desc *
		    sizeof(struct i40e_tx_desc)) +
		    sizeof(u32), DBA_ALIGN);
		if (i40e_allocate_dma_mem(&sc->hw,
		    &txr->dma, i40e_mem_reserved, tsize, DBA_ALIGN)) {
			device_printf(dev,
			    "Unable to allocate TX Descriptor memory\n");
			error = ENOMEM;
			goto fail;
		}
		txr->base = (struct i40e_tx_desc *)txr->dma.va;
		bzero((void *)txr->base, tsize);
		if (ixl_allocate_tx_data(que)) {
			device_printf(dev,
			    "Critical Failure setting up TX structures\n");
			error = ENOMEM;
			goto fail;
		}
		txr->br = buf_ring_alloc(ixlv_txbrsz, M_DEVBUF,
		    M_WAITOK, &txr->mtx);
		if (txr->br == NULL) {
			device_printf(dev,
			    "Critical Failure setting up TX buf ring\n");
			error = ENOMEM;
			goto fail;
		}
		rsize = roundup2(que->num_desc *
		    sizeof(union i40e_rx_desc), DBA_ALIGN);
		rxr = &que->rxr;
		rxr->que = que;
		rxr->tail = I40E_QRX_TAIL1(que->me);
		snprintf(rxr->mtx_name, sizeof(rxr->mtx_name), "%s:rx(%d)",
		    device_get_nameunit(dev), que->me);
		mtx_init(&rxr->mtx, rxr->mtx_name, NULL, MTX_DEF);
		if (i40e_allocate_dma_mem(&sc->hw,
		    &rxr->dma, i40e_mem_reserved, rsize, 4096)) { 
			device_printf(dev,
			    "Unable to allocate RX Descriptor memory\n");
			error = ENOMEM;
			goto fail;
		}
		rxr->base = (union i40e_rx_desc *)rxr->dma.va;
		bzero((void *)rxr->base, rsize);
		if (ixl_allocate_rx_data(que)) {
			device_printf(dev,
			    "Critical Failure setting up receive structs\n");
			error = ENOMEM;
			goto fail;
		}
	}
	return (0);
fail:
	for (int i = 0; i < vsi->num_queues; i++) {
		que = &vsi->queues[i];
		rxr = &que->rxr;
		txr = &que->txr;
		if (rxr->base)
			i40e_free_dma_mem(&sc->hw, &rxr->dma);
		if (txr->base)
			i40e_free_dma_mem(&sc->hw, &txr->dma);
	}
	free(vsi->queues, M_DEVBUF);
early:
	return (error);
}
static int ixlv_setup_queues ( struct ixlv_sc * sc ) { device_t dev = sc -> dev ; struct ixl_vsi * vsi ; struct ixl_queue * que ; struct tx_ring * txr ; struct rx_ring * rxr ; int rsize , tsize ; int error = I40E_SUCCESS ; vsi = & sc -> vsi ; vsi -> back = ( void * ) sc ; vsi -> hw = & sc -> hw ; vsi -> num_vlans = 0 ; if ( ! ( vsi -> queues = ( struct ixl_queue * ) malloc ( sizeof ( struct ixl_queue ) * vsi -> num_queues , M_DEVBUF , M_NOWAIT | M_ZERO ) ) ) { device_printf ( dev , " \n " ) ; error = ENOMEM ; goto early ; } for ( int i = 0 ; i < vsi -> num_queues ; i ++ ) { que = & vsi -> queues [ i ] ; que -> num_desc = ixlv_ringsz ; que -> me = i ; que -> vsi = vsi ; vsi -> active_queues |= ( u64 ) 1 << que -> me ; txr = & que -> txr ; txr -> que = que ; txr -> tail = I40E_QTX_TAIL1 ( que -> me ) ; snprintf ( txr -> mtx_name , sizeof ( txr -> mtx_name ) , " " , device_get_nameunit ( dev ) , que -> me ) ; mtx_init ( & txr -> mtx , txr -> mtx_name , NULL , MTX_DEF ) ; tsize = roundup2 ( ( que -> num_desc * sizeof ( struct i40e_tx_desc ) ) + sizeof ( u32 ) , DBA_ALIGN ) ; if ( i40e_allocate_dma_mem ( & sc -> hw , & txr -> dma , i40e_mem_reserved , tsize , DBA_ALIGN ) ) { device_printf ( dev , " \n " ) ; error = ENOMEM ; goto fail ; } txr -> base = ( struct i40e_tx_desc * ) txr -> dma . va ; bzero ( ( void * ) txr -> base , tsize ) ; if ( ixl_allocate_tx_data ( que ) ) { device_printf ( dev , " \n " ) ; error = ENOMEM ; goto fail ; } txr -> br = buf_ring_alloc ( ixlv_txbrsz , M_DEVBUF , M_WAITOK , & txr -> mtx ) ; if ( txr -> br == NULL ) { device_printf ( dev , " \n " ) ; error = ENOMEM ; goto fail ; } rsize = roundup2 ( que -> num_desc * sizeof ( union i40e_rx_desc ) , DBA_ALIGN ) ; rxr = & que -> rxr ; rxr -> que = que ; rxr -> tail = I40E_QRX_TAIL1 ( que -> me ) ; snprintf ( rxr -> mtx_name , sizeof ( rxr -> mtx_name ) , " " , device_get_nameunit ( dev ) , que -> me ) ; mtx_init ( & rxr -> mtx , rxr -> mtx_name , NULL , MTX_DEF ) ; if ( i40e_allocate_dma_mem ( & sc -> hw , & rxr -> dma , i40e_mem_reserved , rsize , 4096 ) ) { device_printf ( dev , " \n " ) ; error = ENOMEM ; goto fail ; } rxr -> base = ( union i40e_rx_desc * ) rxr -> dma . va ; bzero ( ( void * ) rxr -> base , rsize ) ; if ( ixl_allocate_rx_data ( que ) ) { device_printf ( dev , " \n " ) ; error = ENOMEM ; goto fail ; } } return ( 0 ) ; fail : for ( int i = 0 ; i < vsi -> num_queues ; i ++ ) { que = & vsi -> queues [ i ] ; rxr = & que -> rxr ; txr = & que -> txr ; if ( rxr -> base ) i40e_free_dma_mem ( & sc -> hw , & rxr -> dma ) ; if ( txr -> base ) i40e_free_dma_mem ( & sc -> hw , & txr -> dma ) ; } free ( vsi -> queues , M_DEVBUF ) ; early : return ( error ) ; }
Allocate and setup the interface queues
Allocate and setup the interface queues
/* Get memory for the station queues */ /* mark the queue as active */ /* Initialize the TX lock */ /*
		** Create the TX descriptor ring, the extra int is
		** added as the location for HEAD WB.
		*/ /* Now allocate transmit soft structs for the ring */ /* Allocate a buf ring */ /*
		 * Next the RX queues...
		 */ /* Initialize the RX side lock */ //JFV - should this be DBA? /* Allocate receive soft structs for the ring */