Platform/ECM3532/M3/hw/csp/ecm3532/m3/csp/src/eta_csp_i2c.c
/***************************************************************************/
/**
 *
 *  EtaCspI2cProcessIntEntry - Entry for Interrupts for I2C
 *
 *  @param iNum the I2C number.
 *
 ******************************************************************************/
Entry for Interrupts for I2C
@param iNum the I2C number.
Entry for Interrupts for I2C @param iNum the I2C number .
tEtaStatus EtaCspI2cProcessIntEntry (tI2cNum iNum)
{
  uint32_t bCmdActive_interrupt;
  tEtaStatus i2cStatus = eEtaSuccess;
  bCmdActive_interrupt = MEMIO16(REG_I2C_INT_ACT_ADDR (iNum));
  if (bCmdActive_interrupt & BM_I2C_INT_EN_UNACK_EN                  ) i2cStatus |= EtaCspI2cProcessIntNack(iNum) ;
  if (bCmdActive_interrupt & BM_I2C_INT_EN_TXFIFO_HAS_LEVEL_SPACE_EN ) i2cStatus |= EtaCspI2cProcessIntTxData(iNum) ;
  if (bCmdActive_interrupt & BM_I2C_INT_EN_RX_HIT_LEVEL_EN           ) i2cStatus |= EtaCspI2cProcessIntRxData(iNum) ;
  if (bCmdActive_interrupt & BM_I2C_INT_EN_CMD_DONE                  ) i2cStatus |= EtaCspI2cProcessIntCmdDone(iNum) ;
  REG_GPIO_DEBUG1_READ_ONLY.V = REG_I2C_CONFIG(iNum).V;
  return i2cStatus;
}
tEtaStatus EtaCspI2cProcessIntEntry ( tI2cNum iNum ) { uint32_t bCmdActive_interrupt ; tEtaStatus i2cStatus = eEtaSuccess ; bCmdActive_interrupt = MEMIO16 ( REG_I2C_INT_ACT_ADDR ( iNum ) ) ; if ( bCmdActive_interrupt & BM_I2C_INT_EN_UNACK_EN ) i2cStatus |= EtaCspI2cProcessIntNack ( iNum ) ; if ( bCmdActive_interrupt & BM_I2C_INT_EN_TXFIFO_HAS_LEVEL_SPACE_EN ) i2cStatus |= EtaCspI2cProcessIntTxData ( iNum ) ; if ( bCmdActive_interrupt & BM_I2C_INT_EN_RX_HIT_LEVEL_EN ) i2cStatus |= EtaCspI2cProcessIntRxData ( iNum ) ; if ( bCmdActive_interrupt & BM_I2C_INT_EN_CMD_DONE ) i2cStatus |= EtaCspI2cProcessIntCmdDone ( iNum ) ; REG_GPIO_DEBUG1_READ_ONLY . V = REG_I2C_CONFIG ( iNum ) . V ; return i2cStatus ; }
EtaCspI2cProcessIntEntry - Entry for Interrupts for I2C
  @param iNum the I2C number.
EtaCspI2cProcessIntEntry - Entry for Interrupts for I2C @param iNum the I2C number .
// Do one read per interrupt. The INT_ACT field may change during the interrupt // FENCE TO MAKE SURE ALL WRITES GET FLUSHED