FreeBSD/sys/arm/at91/at91_machdep.c
/*
 * Read the SoC ID from the CIDR register and try to match it against the
 * values we know.  If we find a good one, we return true.  If not, we
 * return false.  When we find a good one, we also find the subtype
 * and CPU family.
 */
Read the SoC ID from the CIDR register and try to match it against the
values we know.  If we find a good one, we return true.  If not, we
return false.  When we find a good one, we also find the subtype
and CPU family.
Read the SoC ID from the CIDR register and try to match it against the values we know . If we find a good one we return true . If not we return false . When we find a good one we also find the subtype and CPU family .
static int
at91_try_id(uint32_t dbgu_base)
{
	uint32_t socid;
	soc_info.cidr = *(volatile uint32_t *)(AT91_BASE + dbgu_base +
	    DBGU_C1R);
	socid = soc_info.cidr & ~AT91_CPU_VERSION_MASK;
	soc_info.type = AT91_T_NONE;
	soc_info.subtype = AT91_ST_NONE;
	soc_info.family = (soc_info.cidr & AT91_CPU_FAMILY_MASK) >> 20;
	soc_info.exid = *(volatile uint32_t *)(AT91_BASE + dbgu_base +
	    DBGU_C2R);
	switch (socid) {
	case AT91_CPU_CAP9:
		soc_info.type = AT91_T_CAP9;
		break;
	case AT91_CPU_RM9200:
		soc_info.type = AT91_T_RM9200;
		break;
	case AT91_CPU_SAM9XE128:
	case AT91_CPU_SAM9XE256:
	case AT91_CPU_SAM9XE512:
	case AT91_CPU_SAM9260:
		soc_info.type = AT91_T_SAM9260;
		if (soc_info.family == AT91_FAMILY_SAM9XE)
			soc_info.subtype = AT91_ST_SAM9XE;
		break;
	case AT91_CPU_SAM9261:
		soc_info.type = AT91_T_SAM9261;
		break;
	case AT91_CPU_SAM9263:
		soc_info.type = AT91_T_SAM9263;
		break;
	case AT91_CPU_SAM9G10:
		soc_info.type = AT91_T_SAM9G10;
		break;
	case AT91_CPU_SAM9G20:
		soc_info.type = AT91_T_SAM9G20;
		break;
	case AT91_CPU_SAM9G45:
		soc_info.type = AT91_T_SAM9G45;
		break;
	case AT91_CPU_SAM9N12:
		soc_info.type = AT91_T_SAM9N12;
		break;
	case AT91_CPU_SAM9RL64:
		soc_info.type = AT91_T_SAM9RL;
		break;
	case AT91_CPU_SAM9X5:
		soc_info.type = AT91_T_SAM9X5;
		break;
	default:
		return (0);
	}
	switch (soc_info.type) {
	case AT91_T_SAM9G45:
		switch (soc_info.exid) {
		case AT91_EXID_SAM9G45:
			soc_info.subtype = AT91_ST_SAM9G45;
			break;
		case AT91_EXID_SAM9G46:
			soc_info.subtype = AT91_ST_SAM9G46;
			break;
		case AT91_EXID_SAM9M10:
			soc_info.subtype = AT91_ST_SAM9M10;
			break;
		case AT91_EXID_SAM9M11:
			soc_info.subtype = AT91_ST_SAM9M11;
			break;
		}
		break;
	case AT91_T_SAM9X5:
		switch (soc_info.exid) {
		case AT91_EXID_SAM9G15:
			soc_info.subtype = AT91_ST_SAM9G15;
			break;
		case AT91_EXID_SAM9G25:
			soc_info.subtype = AT91_ST_SAM9G25;
			break;
		case AT91_EXID_SAM9G35:
			soc_info.subtype = AT91_ST_SAM9G35;
			break;
		case AT91_EXID_SAM9X25:
			soc_info.subtype = AT91_ST_SAM9X25;
			break;
		case AT91_EXID_SAM9X35:
			soc_info.subtype = AT91_ST_SAM9X35;
			break;
		}
		break;
	default:
		break;
	}
	*(volatile uint32_t *)(AT91_BASE + dbgu_base + USART_IDR) = 0xffffffff;
	snprintf(soc_info.name, sizeof(soc_info.name), "%s%s%s",
	    soc_type_name[soc_info.type],
	    soc_info.subtype == AT91_ST_NONE ? "" : " subtype ",
	    soc_info.subtype == AT91_ST_NONE ? "" :
	    soc_subtype_name[soc_info.subtype]);
        soc_info.soc_data = at91_match_soc(soc_info.type, soc_info.subtype);
        soc_info.dbgu_base = AT91_BASE + dbgu_base;
	return (1);
}
static int at91_try_id ( uint32_t dbgu_base ) { uint32_t socid ; soc_info . cidr = * ( volatile uint32_t * ) ( AT91_BASE + dbgu_base + DBGU_C1R ) ; socid = soc_info . cidr & ~ AT91_CPU_VERSION_MASK ; soc_info . type = AT91_T_NONE ; soc_info . subtype = AT91_ST_NONE ; soc_info . family = ( soc_info . cidr & AT91_CPU_FAMILY_MASK ) >> 20 ; soc_info . exid = * ( volatile uint32_t * ) ( AT91_BASE + dbgu_base + DBGU_C2R ) ; switch ( socid ) { case AT91_CPU_CAP9 : soc_info . type = AT91_T_CAP9 ; break ; case AT91_CPU_RM9200 : soc_info . type = AT91_T_RM9200 ; break ; case AT91_CPU_SAM9XE128 : case AT91_CPU_SAM9XE256 : case AT91_CPU_SAM9XE512 : case AT91_CPU_SAM9260 : soc_info . type = AT91_T_SAM9260 ; if ( soc_info . family == AT91_FAMILY_SAM9XE ) soc_info . subtype = AT91_ST_SAM9XE ; break ; case AT91_CPU_SAM9261 : soc_info . type = AT91_T_SAM9261 ; break ; case AT91_CPU_SAM9263 : soc_info . type = AT91_T_SAM9263 ; break ; case AT91_CPU_SAM9G10 : soc_info . type = AT91_T_SAM9G10 ; break ; case AT91_CPU_SAM9G20 : soc_info . type = AT91_T_SAM9G20 ; break ; case AT91_CPU_SAM9G45 : soc_info . type = AT91_T_SAM9G45 ; break ; case AT91_CPU_SAM9N12 : soc_info . type = AT91_T_SAM9N12 ; break ; case AT91_CPU_SAM9RL64 : soc_info . type = AT91_T_SAM9RL ; break ; case AT91_CPU_SAM9X5 : soc_info . type = AT91_T_SAM9X5 ; break ; default : return ( 0 ) ; } switch ( soc_info . type ) { case AT91_T_SAM9G45 : switch ( soc_info . exid ) { case AT91_EXID_SAM9G45 : soc_info . subtype = AT91_ST_SAM9G45 ; break ; case AT91_EXID_SAM9G46 : soc_info . subtype = AT91_ST_SAM9G46 ; break ; case AT91_EXID_SAM9M10 : soc_info . subtype = AT91_ST_SAM9M10 ; break ; case AT91_EXID_SAM9M11 : soc_info . subtype = AT91_ST_SAM9M11 ; break ; } break ; case AT91_T_SAM9X5 : switch ( soc_info . exid ) { case AT91_EXID_SAM9G15 : soc_info . subtype = AT91_ST_SAM9G15 ; break ; case AT91_EXID_SAM9G25 : soc_info . subtype = AT91_ST_SAM9G25 ; break ; case AT91_EXID_SAM9G35 : soc_info . subtype = AT91_ST_SAM9G35 ; break ; case AT91_EXID_SAM9X25 : soc_info . subtype = AT91_ST_SAM9X25 ; break ; case AT91_EXID_SAM9X35 : soc_info . subtype = AT91_ST_SAM9X35 ; break ; } break ; default : break ; } * ( volatile uint32_t * ) ( AT91_BASE + dbgu_base + USART_IDR ) = 0xffffffff ; snprintf ( soc_info . name , sizeof ( soc_info . name ) , " " , soc_type_name [ soc_info . type ] , soc_info . subtype == AT91_ST_NONE ? " " : " " , soc_info . subtype == AT91_ST_NONE ? " " : soc_subtype_name [ soc_info . subtype ] ) ; soc_info . soc_data = at91_match_soc ( soc_info . type , soc_info . subtype ) ; soc_info . dbgu_base = AT91_BASE + dbgu_base ; return ( 1 ) ; }
Read the SoC ID from the CIDR register and try to match it against the
 values we know.
Read the SoC ID from the CIDR register and try to match it against the values we know .
/*
	 * Disable interrupts in the DBGU unit...
	 */ /*
	 * Save the name for later...
	 */ /*
         * try to get the matching CPU support.
         */