FreeRTOS/Demo/RISC-V_RV64_PolarFire_SoftConsole/polarfire_hal/platform/mpfs_hal/common/mss_l2_cache.c
/*==============================================================================
 * This code should only be executed from E51 to be functional.
 * Configure the L2 cache memory:
 *  - Set the number of cache ways used as cache based on the MSS Configurator
 *    settings.
 *  - Configure some of the enabled ways as scratchpad based on linker
 *    configuration and space allocated by configurator.
 */
This code should only be executed from E51 to be functional.
Configure the L2 cache memory:
- Set the number of cache ways used as cache based on the MSS Configurator
settings.
- Configure some of the enabled ways as scratchpad based on linker
configuration and space allocated by configurator.
This code should only be executed from E51 to be functional . Configure the L2 cache memory : - Set the number of cache ways used as cache based on the MSS Configurator settings . - Configure some of the enabled ways as scratchpad based on linker configuration and space allocated by configurator .
__attribute__((weak)) void config_l2_cache(void)
{
    ASSERT(LIBERO_SETTING_WAY_ENABLE < 16U);
    CACHE_CTRL->WAY_ENABLE = LIBERO_SETTING_WAY_ENABLE;
    SYSREG->L2_SHUTDOWN_CR = LIBERO_SETTING_L2_SHUTDOWN_CR;
    check_config_l2_scratchpad();
    ASSERT(LIBERO_SETTING_WAY_ENABLE >= LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS);
    uint32_t scratchpad_ways_mask = 0U;
#if (LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS != 0)
    uint32_t inc;
    uint32_t seed_ways_mask = 0x1U << LIBERO_SETTING_WAY_ENABLE;
    for(inc = 0; inc < LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS; ++inc)
    {
        scratchpad_ways_mask |= (seed_ways_mask >> inc) ;
    }
#else
    (void)scratchpad_ways_mask;
#endif
    ASSERT((LIBERO_SETTING_WAY_MASK_DMA & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_E51_DCACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_E51_ICACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_1_DCACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_2_DCACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_3_DCACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_4_DCACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_1_ICACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_2_ICACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_3_ICACHE & scratchpad_ways_mask) == 0UL);
    ASSERT((LIBERO_SETTING_WAY_MASK_U54_4_ICACHE & scratchpad_ways_mask) == 0UL);
    CACHE_CTRL->WAY_MASK_DMA = LIBERO_SETTING_WAY_MASK_DMA;
    CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_0 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_0;
    CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_1 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_1;
    CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_2 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_2;
    CACHE_CTRL->WAY_MASK_AXI4_SLAVE_PORT_3 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_3;
    CACHE_CTRL->WAY_MASK_E51_ICACHE = LIBERO_SETTING_WAY_MASK_E51_ICACHE;
    CACHE_CTRL->WAY_MASK_U54_1_DCACHE = LIBERO_SETTING_WAY_MASK_U54_1_DCACHE;
    CACHE_CTRL->WAY_MASK_U54_1_ICACHE = LIBERO_SETTING_WAY_MASK_U54_1_ICACHE;
    CACHE_CTRL->WAY_MASK_U54_2_DCACHE = LIBERO_SETTING_WAY_MASK_U54_2_DCACHE;
    CACHE_CTRL->WAY_MASK_U54_2_ICACHE = LIBERO_SETTING_WAY_MASK_U54_2_ICACHE;
    CACHE_CTRL->WAY_MASK_U54_3_DCACHE = LIBERO_SETTING_WAY_MASK_U54_3_DCACHE;
    CACHE_CTRL->WAY_MASK_U54_3_ICACHE = LIBERO_SETTING_WAY_MASK_U54_3_ICACHE;
    CACHE_CTRL->WAY_MASK_U54_4_DCACHE = LIBERO_SETTING_WAY_MASK_U54_4_DCACHE;
    CACHE_CTRL->WAY_MASK_U54_4_ICACHE = LIBERO_SETTING_WAY_MASK_U54_4_ICACHE;
#if (LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS != 0)
    uint64_t * p_scratchpad = (uint64_t *)ZERO_DEVICE_BOTTOM;
    uint32_t ways_inc;
    uint64_t current_way = 0x1U << (((LIBERO_SETTING_WAY_ENABLE + 1U) - LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS) );
    for(ways_inc = 0; ways_inc < LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS; ++ways_inc)
    {
        CACHE_CTRL->WAY_MASK_E51_DCACHE = current_way;
        mb();
        for(inc = 0; inc < (WAY_BYTE_LENGTH / CACHE_BLOCK_BYTE_LENGTH); ++inc)
        {
            *p_scratchpad = g_init_marker + inc;
            p_scratchpad += CACHE_BLOCK_BYTE_LENGTH / UINT64_BYTE_LENGTH;
        }
        current_way = current_way << 1U;
        mb();
    }
#endif  
    CACHE_CTRL->WAY_MASK_E51_DCACHE = LIBERO_SETTING_WAY_MASK_E51_DCACHE;
    mb();
}
__attribute__ ( ( weak ) ) void config_l2_cache ( void ) { ASSERT ( LIBERO_SETTING_WAY_ENABLE < 16U ) ; CACHE_CTRL -> WAY_ENABLE = LIBERO_SETTING_WAY_ENABLE ; SYSREG -> L2_SHUTDOWN_CR = LIBERO_SETTING_L2_SHUTDOWN_CR ; check_config_l2_scratchpad ( ) ; ASSERT ( LIBERO_SETTING_WAY_ENABLE >= LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS ) ; uint32_t scratchpad_ways_mask = 0U ; #if ( LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS != 0 ) uint32_t inc ; uint32_t seed_ways_mask = 0x1U << LIBERO_SETTING_WAY_ENABLE ; for ( inc = 0 ; inc < LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS ; ++ inc ) { scratchpad_ways_mask |= ( seed_ways_mask >> inc ) ; } #else ( void ) scratchpad_ways_mask ; #endif ASSERT ( ( LIBERO_SETTING_WAY_MASK_DMA & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_E51_DCACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_E51_ICACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_1_DCACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_2_DCACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_3_DCACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_4_DCACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_1_ICACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_2_ICACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_3_ICACHE & scratchpad_ways_mask ) == 0UL ) ; ASSERT ( ( LIBERO_SETTING_WAY_MASK_U54_4_ICACHE & scratchpad_ways_mask ) == 0UL ) ; CACHE_CTRL -> WAY_MASK_DMA = LIBERO_SETTING_WAY_MASK_DMA ; CACHE_CTRL -> WAY_MASK_AXI4_SLAVE_PORT_0 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_0 ; CACHE_CTRL -> WAY_MASK_AXI4_SLAVE_PORT_1 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_1 ; CACHE_CTRL -> WAY_MASK_AXI4_SLAVE_PORT_2 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_2 ; CACHE_CTRL -> WAY_MASK_AXI4_SLAVE_PORT_3 = LIBERO_SETTING_WAY_MASK_AXI4_PORT_3 ; CACHE_CTRL -> WAY_MASK_E51_ICACHE = LIBERO_SETTING_WAY_MASK_E51_ICACHE ; CACHE_CTRL -> WAY_MASK_U54_1_DCACHE = LIBERO_SETTING_WAY_MASK_U54_1_DCACHE ; CACHE_CTRL -> WAY_MASK_U54_1_ICACHE = LIBERO_SETTING_WAY_MASK_U54_1_ICACHE ; CACHE_CTRL -> WAY_MASK_U54_2_DCACHE = LIBERO_SETTING_WAY_MASK_U54_2_DCACHE ; CACHE_CTRL -> WAY_MASK_U54_2_ICACHE = LIBERO_SETTING_WAY_MASK_U54_2_ICACHE ; CACHE_CTRL -> WAY_MASK_U54_3_DCACHE = LIBERO_SETTING_WAY_MASK_U54_3_DCACHE ; CACHE_CTRL -> WAY_MASK_U54_3_ICACHE = LIBERO_SETTING_WAY_MASK_U54_3_ICACHE ; CACHE_CTRL -> WAY_MASK_U54_4_DCACHE = LIBERO_SETTING_WAY_MASK_U54_4_DCACHE ; CACHE_CTRL -> WAY_MASK_U54_4_ICACHE = LIBERO_SETTING_WAY_MASK_U54_4_ICACHE ; #if ( LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS != 0 ) uint64_t * p_scratchpad = ( uint64_t * ) ZERO_DEVICE_BOTTOM ; uint32_t ways_inc ; uint64_t current_way = 0x1U << ( ( ( LIBERO_SETTING_WAY_ENABLE + 1U ) - LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS ) ) ; for ( ways_inc = 0 ; ways_inc < LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS ; ++ ways_inc ) { CACHE_CTRL -> WAY_MASK_E51_DCACHE = current_way ; mb ( ) ; for ( inc = 0 ; inc < ( WAY_BYTE_LENGTH / CACHE_BLOCK_BYTE_LENGTH ) ; ++ inc ) { * p_scratchpad = g_init_marker + inc ; p_scratchpad += CACHE_BLOCK_BYTE_LENGTH / UINT64_BYTE_LENGTH ; } current_way = current_way << 1U ; mb ( ) ; } #endif CACHE_CTRL -> WAY_MASK_E51_DCACHE = LIBERO_SETTING_WAY_MASK_E51_DCACHE ; mb ( ) ; }
This code should only be executed from E51 to be functional.
This code should only be executed from E51 to be functional .
/*
     * Set the number of ways that will be shared between cache and scratchpad.
     */ /*
     * shutdown L2 as directed
     */ /* The scratchpad has already been set-up, first check enough space before copying */ /* If you are not using scratchpad, no need to include the following code */ /*
     * Compute the mask used to specify ways that will be used by the
     * scratchpad.
     */ /*
     * Make sure ways are masked if being used as scratchpad
     */ /*
     * Setup all masters, apart from one we are using to setup scratch
     */ /*
     * Assign ways to Zero Device
     */ /*
         * Populate the scratchpad memory one way at a time.
         */ /*
         * Write to the first 64-bit location of each cache block.
         */ /* (LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS != 0) */ /*
     * Prevent E51 from evicting from scratchpad ways.
     */