libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/stm32f10x_rcc.c
/**
  * @brief  Configures the PLL clock source and multiplication factor.
  * @note   This function must be used only when the PLL is disabled.
  * @param  RCC_PLLSource: specifies the PLL entry clock source.
  *   For @b STM32_Connectivity_line_devices or @b STM32_Value_line_devices, 
  *   this parameter can be one of the following values:
  *     @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry
  *     @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry
  *   For @b other_STM32_devices, this parameter can be one of the following values:
  *     @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry
  *     @arg RCC_PLLSource_HSE_Div1: HSE oscillator clock selected as PLL clock entry
  *     @arg RCC_PLLSource_HSE_Div2: HSE oscillator clock divided by 2 selected as PLL clock entry 
  * @param  RCC_PLLMul: specifies the PLL multiplication factor.
  *   For @b STM32_Connectivity_line_devices, this parameter can be RCC_PLLMul_x where x:{[4,9], 6_5}
  *   For @b other_STM32_devices, this parameter can be RCC_PLLMul_x where x:[2,16]  
  * @retval None
  */
@brief  Configures the PLL clock source and multiplication factor.
@note   This function must be used only when the PLL is disabled.
@param  RCC_PLLSource: specifies the PLL entry clock source.
@brief Configures the PLL clock source and multiplication factor . @note This function must be used only when the PLL is disabled . @param RCC_PLLSource : specifies the PLL entry clock source .
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
{
  uint32_t tmpreg = 0;
  assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource));
  assert_param(IS_RCC_PLL_MUL(RCC_PLLMul));
  tmpreg = RCC->CFGR;
  tmpreg &= CFGR_PLL_Mask;
  tmpreg |= RCC_PLLSource | RCC_PLLMul;
  RCC->CFGR = tmpreg;
}
void RCC_PLLConfig ( uint32_t RCC_PLLSource , uint32_t RCC_PLLMul ) { uint32_t tmpreg = 0 ; assert_param ( IS_RCC_PLL_SOURCE ( RCC_PLLSource ) ) ; assert_param ( IS_RCC_PLL_MUL ( RCC_PLLMul ) ) ; tmpreg = RCC -> CFGR ; tmpreg &= CFGR_PLL_Mask ; tmpreg |= RCC_PLLSource | RCC_PLLMul ; RCC -> CFGR = tmpreg ; }
@brief  Configures the PLL clock source and multiplication factor.
@brief Configures the PLL clock source and multiplication factor .
/* Check the parameters */ /* Clear PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ /* Set the PLL configuration bits */ /* Store the new value */