FreeBSD/sys/dev/etherswitch/arswitch/arswitch_phy.c
/*
 * Access PHYs integrated into the switch chip through the switch's MDIO
 * control register.
 */
Access PHYs integrated into the switch chip through the switch's MDIO
control register.
Access PHYs integrated into the switch chip through the switch ' s MDIO control register .
int
arswitch_readphy_internal(device_t dev, int phy, int reg)
{
	struct arswitch_softc *sc;
	uint32_t data = 0, ctrl;
	int err, timeout;
	uint32_t a;
	sc = device_get_softc(dev);
	ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
	if (phy < 0 || phy >= 32)
		return (ENXIO);
	if (reg < 0 || reg >= 32)
		return (ENXIO);
	if (AR8X16_IS_SWITCH(sc, AR8327))
		a = AR8327_REG_MDIO_CTRL;
	else
		a = AR8X16_REG_MDIO_CTRL;
	ARSWITCH_LOCK(sc);
	err = arswitch_writereg_msb(dev, a,
	    AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN |
	    AR8X16_MDIO_CTRL_CMD_READ |
	    (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
	    (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT));
	DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg);
	if (err != 0)
		goto fail;
	for (timeout = 100; timeout--; ) {
		ctrl = arswitch_readreg_msb(dev, a);
		if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
			break;
	}
	if (timeout < 0) {
		DPRINTF(dev, "arswitch_readphy(): phy=%d.%02x; timeout=%d\n", phy, reg, timeout);
		goto fail;
	}
	data = arswitch_readreg_lsb(dev, a) &
	    AR8X16_MDIO_CTRL_DATA_MASK;
	ARSWITCH_UNLOCK(sc);
	return (data);
fail:
	ARSWITCH_UNLOCK(sc);
	return (-1);
}
int arswitch_readphy_internal ( device_t dev , int phy , int reg ) { struct arswitch_softc * sc ; uint32_t data = 0 , ctrl ; int err , timeout ; uint32_t a ; sc = device_get_softc ( dev ) ; ARSWITCH_LOCK_ASSERT ( sc , MA_NOTOWNED ) ; if ( phy < 0 || phy >= 32 ) return ( ENXIO ) ; if ( reg < 0 || reg >= 32 ) return ( ENXIO ) ; if ( AR8X16_IS_SWITCH ( sc , AR8327 ) ) a = AR8327_REG_MDIO_CTRL ; else a = AR8X16_REG_MDIO_CTRL ; ARSWITCH_LOCK ( sc ) ; err = arswitch_writereg_msb ( dev , a , AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN | AR8X16_MDIO_CTRL_CMD_READ | ( phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT ) | ( reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT ) ) ; DEVERR ( dev , err , " \n " , phy , reg ) ; if ( err != 0 ) goto fail ; for ( timeout = 100 ; timeout -- ; ) { ctrl = arswitch_readreg_msb ( dev , a ) ; if ( ( ctrl & AR8X16_MDIO_CTRL_BUSY ) == 0 ) break ; } if ( timeout < 0 ) { DPRINTF ( dev , " \n " , phy , reg , timeout ) ; goto fail ; } data = arswitch_readreg_lsb ( dev , a ) & AR8X16_MDIO_CTRL_DATA_MASK ; ARSWITCH_UNLOCK ( sc ) ; return ( data ) ; fail : ARSWITCH_UNLOCK ( sc ) ; return ( -1 ) ; }
Access PHYs integrated into the switch chip through the switch's MDIO
 control register.
Access PHYs integrated into the switch chip through the switch ' s MDIO control register .