project_1/project_1.sdk/test_bsp/microblaze_0/libsrc/standalone_v6_7/src/microblaze_sleep.c
/*****************************************************************************/
/**
 *
 * @brief   This API starts the Axi Timer only when the timer is not enabled.
 *
 * @param	None.
 *
 * @return	None.
 *
 * @note    Instruction cache should be enabled for this to work.
 *
  ******************************************************************************/
@brief   This API starts the Axi Timer only when the timer is not enabled.
@param       None.

@return      None.

@note    Instruction cache should be enabled for this to work.
@brief This API starts the Axi Timer only when the timer is not enabled . @param None . @return None . @note Instruction cache should be enabled for this to work .
static void XTime_StartAxiTimer()
  {
	u32 ControlStatusReg;
	if(Xil_In32(SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_AXITIMER_TCSR0_OFFSET) &&
	                                   XSLEEP_TIMER_AXITIMER_CSR_ENABLE_TMR_MASK)
	{
		return;
	}
	ControlStatusReg = Xil_In32(SLEEP_TIMER_BASEADDR +
			                          XSLEEP_TIMER_AXITIMER_TCSR0_OFFSET);
	Xil_Out32((SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_AXITIMER_TCSR0_OFFSET),
			(ControlStatusReg | XSLEEP_TIMER_AXITIMER_CSR_ENABLE_TMR_MASK |
				       XSLEEP_TIMER_AXITIMER_CSR_AUTO_RELOAD_MASK));
  }
static void XTime_StartAxiTimer ( ) { u32 ControlStatusReg ; if ( Xil_In32 ( SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_AXITIMER_TCSR0_OFFSET ) && XSLEEP_TIMER_AXITIMER_CSR_ENABLE_TMR_MASK ) { return ; } ControlStatusReg = Xil_In32 ( SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_AXITIMER_TCSR0_OFFSET ) ; Xil_Out32 ( ( SLEEP_TIMER_BASEADDR + XSLEEP_TIMER_AXITIMER_TCSR0_OFFSET ) , ( ControlStatusReg | XSLEEP_TIMER_AXITIMER_CSR_ENABLE_TMR_MASK | XSLEEP_TIMER_AXITIMER_CSR_AUTO_RELOAD_MASK ) ) ; }
@brief   This API starts the Axi Timer only when the timer is not enabled.
@brief This API starts the Axi Timer only when the timer is not enabled .
/*  Checking if the timer is enabled  */ /*
	 * Read the current register contents such that only the necessary bits
	 * of the register are modified in the following operations
	 */ /*
	 * Remove the reset condition such that the timer counter starts running
	 * with the value loaded from the compare register
	 */