plat/xilinx/zynqmp/pm_service/pm_api_clock.c
/**
 * pm_api_clock_setparent - Set the clock parent for given id
 * @clock_id	Id of the clock
 * @parent_id	parent id
 *
 * This function is used by master to set parent for any clock.
 *
 * Return: Returns status, either success or error+reason.
 */
Set the clock parent for given id
@clock_id    Id of the clock
@parent_id   parent id

This function is used by master to set parent for any clock.

Returns status, either success or error+reason.
Set the clock parent for given id @clock_id Id of the clock @parent_id parent id This function is used by master to set parent for any clock . Returns status either success or error + reason .
enum pm_ret_status pm_api_clock_setparent(unsigned int clock_id,
					  unsigned int parent_idx)
{
	enum pm_ret_status ret = PM_RET_SUCCESS;
	struct pm_clock_node *nodes;
	uint8_t num_nodes;
	unsigned int reg, val;
	int32_t *clk_parents;
	unsigned int i = 0;
	uint8_t  offset = NA_SHIFT, width = NA_WIDTH;
	if (!pm_clock_valid(clock_id))
		return PM_RET_ERROR_ARGS;
	if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT)
		return PM_RET_ERROR_NOTSUPPORTED;
	clk_parents = *clocks[clock_id].parents;
	for (i = 0; i <= parent_idx; i++)
		if (clk_parents[i] == CLK_NA_PARENT)
			return PM_RET_ERROR_ARGS;
	nodes = *clocks[clock_id].nodes;
	num_nodes = clocks[clock_id].num_nodes;
	for (i = 0; i < num_nodes; i++) {
		if (nodes->type == TYPE_MUX) {
			offset = nodes->offset;
			width = nodes->width;
		}
		nodes++;
	}
	if (width == NA_WIDTH)
		return PM_RET_ERROR_NOTSUPPORTED;
	reg = clocks[clock_id].control_reg;
	val = parent_idx << offset;
	ret = pm_mmio_write(reg, BIT_MASK(offset, width), val);
	return ret;
}
enum pm_ret_status pm_api_clock_setparent ( unsigned int clock_id , unsigned int parent_idx ) { enum pm_ret_status ret = PM_RET_SUCCESS ; struct pm_clock_node * nodes ; uint8_t num_nodes ; unsigned int reg , val ; int32_t * clk_parents ; unsigned int i = 0 ; uint8_t offset = NA_SHIFT , width = NA_WIDTH ; if ( ! pm_clock_valid ( clock_id ) ) return PM_RET_ERROR_ARGS ; if ( pm_clock_type ( clock_id ) != CLK_TYPE_OUTPUT ) return PM_RET_ERROR_NOTSUPPORTED ; clk_parents = * clocks [ clock_id ] . parents ; for ( i = 0 ; i <= parent_idx ; i ++ ) if ( clk_parents [ i ] == CLK_NA_PARENT ) return PM_RET_ERROR_ARGS ; nodes = * clocks [ clock_id ] . nodes ; num_nodes = clocks [ clock_id ] . num_nodes ; for ( i = 0 ; i < num_nodes ; i ++ ) { if ( nodes -> type == TYPE_MUX ) { offset = nodes -> offset ; width = nodes -> width ; } nodes ++ ; } if ( width == NA_WIDTH ) return PM_RET_ERROR_NOTSUPPORTED ; reg = clocks [ clock_id ] . control_reg ; val = parent_idx << offset ; ret = pm_mmio_write ( reg , BIT_MASK ( offset , width ) , val ) ; return ret ; }
pm_api_clock_setparent - Set the clock parent for given id
 @clock_id    Id of the clock
 @parent_id   parent id
pm_api_clock_setparent - Set the clock parent for given id @clock_id Id of the clock @parent_id parent id