FreeBSD/sys/x86/x86/mca.c
/*
 * See if we should monitor CMCI for this bank.  If CMCI_EN is already
 * set in MC_CTL2, then another CPU is responsible for this bank, so
 * ignore it.  If CMCI_EN returns zero after being set, then this bank
 * does not support CMCI_EN.  If this CPU sets CMCI_EN, then it should
 * now monitor this bank.
 */
See if we should monitor CMCI for this bank.  If CMCI_EN is already
set in MC_CTL2, then another CPU is responsible for this bank, so
ignore it.  If CMCI_EN returns zero after being set, then this bank
does not support CMCI_EN.  If this CPU sets CMCI_EN, then it should
now monitor this bank.
See if we should monitor CMCI for this bank . If CMCI_EN is already set in MC_CTL2 then another CPU is responsible for this bank so ignore it . If CMCI_EN returns zero after being set then this bank does not support CMCI_EN . If this CPU sets CMCI_EN then it should now monitor this bank .
static void
cmci_monitor(int i)
{
	struct cmc_state *cc;
	uint64_t ctl;
	KASSERT(i < mca_banks, ("CPU %d has more MC banks", PCPU_GET(cpuid)));
	ctl = rdmsr(MSR_MC_CTL2(i));
	if (ctl & MC_CTL2_CMCI_EN)
		return;
	ctl &= ~MC_CTL2_THRESHOLD;
	ctl |= MC_CTL2_CMCI_EN | 1;
	wrmsr(MSR_MC_CTL2(i), ctl);
	ctl = rdmsr(MSR_MC_CTL2(i));
	if (!(ctl & MC_CTL2_CMCI_EN))
		return;
	cc = &cmc_state[PCPU_GET(cpuid)][i];
	ctl &= ~MC_CTL2_THRESHOLD;
	ctl |= 0x7fff;
	wrmsr(MSR_MC_CTL2(i), ctl);
	ctl = rdmsr(MSR_MC_CTL2(i));
	cc->max_threshold = ctl & MC_CTL2_THRESHOLD;
	ctl &= ~MC_CTL2_THRESHOLD;
	ctl |= 1;
	wrmsr(MSR_MC_CTL2(i), ctl);
	PCPU_SET(cmci_mask, PCPU_GET(cmci_mask) | 1 << i);
}
static void cmci_monitor ( int i ) { struct cmc_state * cc ; uint64_t ctl ; KASSERT ( i < mca_banks , ( " " , PCPU_GET ( cpuid ) ) ) ; ctl = rdmsr ( MSR_MC_CTL2 ( i ) ) ; if ( ctl & MC_CTL2_CMCI_EN ) return ; ctl &= ~ MC_CTL2_THRESHOLD ; ctl |= MC_CTL2_CMCI_EN | 1 ; wrmsr ( MSR_MC_CTL2 ( i ) , ctl ) ; ctl = rdmsr ( MSR_MC_CTL2 ( i ) ) ; if ( ! ( ctl & MC_CTL2_CMCI_EN ) ) return ; cc = & cmc_state [ PCPU_GET ( cpuid ) ] [ i ] ; ctl &= ~ MC_CTL2_THRESHOLD ; ctl |= 0x7fff ; wrmsr ( MSR_MC_CTL2 ( i ) , ctl ) ; ctl = rdmsr ( MSR_MC_CTL2 ( i ) ) ; cc -> max_threshold = ctl & MC_CTL2_THRESHOLD ; ctl &= ~ MC_CTL2_THRESHOLD ; ctl |= 1 ; wrmsr ( MSR_MC_CTL2 ( i ) , ctl ) ; PCPU_SET ( cmci_mask , PCPU_GET ( cmci_mask ) | 1 << i ) ; }
See if we should monitor CMCI for this bank.
See if we should monitor CMCI for this bank .
/* Already monitored by another CPU. */ /* Set the threshold to one event for now. */ /* This bank does not support CMCI. */ /* Determine maximum threshold. */ /* Start off with a threshold of 1. */ /* Mark this bank as monitored. */