qemu/target/microblaze/translate.c
/*
 * write_carry sets the carry bits in MSR based on bit 0 of v.
 * v[31:1] are ignored.
 */
write_carry sets the carry bits in MSR based on bit 0 of v.
write_carry sets the carry bits in MSR based on bit 0 of v .
static void write_carry(DisasContext *dc, TCGv_i32 v)
{
    TCGv_i64 t0 = tcg_temp_new_i64();
    tcg_gen_extu_i32_i64(t0, v);
    tcg_gen_deposit_i64(cpu_SR[SR_MSR], cpu_SR[SR_MSR], t0, 2, 1);
    tcg_gen_deposit_i64(cpu_SR[SR_MSR], cpu_SR[SR_MSR], t0, 31, 1);
    tcg_temp_free_i64(t0);
}
static void write_carry ( DisasContext * dc , TCGv_i32 v ) { TCGv_i64 t0 = tcg_temp_new_i64 ( ) ; tcg_gen_extu_i32_i64 ( t0 , v ) ; tcg_gen_deposit_i64 ( cpu_SR [ SR_MSR ] , cpu_SR [ SR_MSR ] , t0 , 2 , 1 ) ; tcg_gen_deposit_i64 ( cpu_SR [ SR_MSR ] , cpu_SR [ SR_MSR ] , t0 , 31 , 1 ) ; tcg_temp_free_i64 ( t0 ) ; }
write_carry sets the carry bits in MSR based on bit 0 of v.
 v[31:1] are ignored.
write_carry sets the carry bits in MSR based on bit 0 of v . v [ 31 : 1 ] are ignored .
/* Deposit bit 0 into MSR_C and the alias MSR_CC.  */