FreeBSD/sys/dev/nxge/xgehal/xgehal-device.c
/*
 * __hal_device_handle_txdma - Handle TxDMA interrupt reason
 * @hldev: HAL device handle.
 * @reason: interrupt reason
 */
Handle TxDMA interrupt reason
@hldev: HAL device handle.
@reason: interrupt reason
Handle TxDMA interrupt reason @hldev : HAL device handle . @reason : interrupt reason
xge_hal_status_e
__hal_device_handle_txdma(xge_hal_device_t *hldev, u64 reason)
{
	xge_hal_pci_bar0_t *isrbar0 =
	        (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
	u64 val64, temp64, err;
	val64 = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->txdma_int_status);
	if (val64 & XGE_HAL_TXDMA_PFC_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->pfc_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->pfc_err_reg);
	    hldev->stats.sw_dev_info_stats.pfc_err_cnt++;
	    temp64 = XGE_HAL_PFC_ECC_DB_ERR|XGE_HAL_PFC_SM_ERR_ALARM
	        |XGE_HAL_PFC_MISC_0_ERR|XGE_HAL_PFC_MISC_1_ERR
	        |XGE_HAL_PFC_PCIX_ERR;
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_TXDMA_TDA_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->tda_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->tda_err_reg);
	    hldev->stats.sw_dev_info_stats.tda_err_cnt++;
	    temp64 = XGE_HAL_TDA_Fn_ECC_DB_ERR|XGE_HAL_TDA_SM0_ERR_ALARM 
	        |XGE_HAL_TDA_SM1_ERR_ALARM; 
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_TXDMA_PCC_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->pcc_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->pcc_err_reg);
	    hldev->stats.sw_dev_info_stats.pcc_err_cnt++;
	    temp64 = XGE_HAL_PCC_FB_ECC_DB_ERR|XGE_HAL_PCC_TXB_ECC_DB_ERR
	        |XGE_HAL_PCC_SM_ERR_ALARM|XGE_HAL_PCC_WR_ERR_ALARM
	        |XGE_HAL_PCC_N_SERR|XGE_HAL_PCC_6_COF_OV_ERR
	        |XGE_HAL_PCC_7_COF_OV_ERR|XGE_HAL_PCC_6_LSO_OV_ERR
	        |XGE_HAL_PCC_7_LSO_OV_ERR;
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_TXDMA_TTI_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->tti_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->tti_err_reg);
	    hldev->stats.sw_dev_info_stats.tti_err_cnt++;
	    temp64 = XGE_HAL_TTI_SM_ERR_ALARM; 
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_TXDMA_LSO_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->lso_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->lso_err_reg);
	    hldev->stats.sw_dev_info_stats.lso_err_cnt++;
	    temp64 = XGE_HAL_LSO6_ABORT|XGE_HAL_LSO7_ABORT
	        |XGE_HAL_LSO6_SM_ERR_ALARM|XGE_HAL_LSO7_SM_ERR_ALARM; 
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_TXDMA_TPA_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->tpa_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->tpa_err_reg);
	    hldev->stats.sw_dev_info_stats.tpa_err_cnt++;
	    temp64 = XGE_HAL_TPA_SM_ERR_ALARM; 
	    if (val64 & temp64)
	        goto reset;
	}
	if (val64 & XGE_HAL_TXDMA_SM_INT) {
	    err = xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
	            &isrbar0->sm_err_reg);
	    xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
	            err, &isrbar0->sm_err_reg);
	    hldev->stats.sw_dev_info_stats.sm_err_cnt++;
	    temp64 = XGE_HAL_SM_SM_ERR_ALARM; 
	    if (val64 & temp64)
	        goto reset;
	}
	return XGE_HAL_OK;
reset : xge_hal_device_reset(hldev);
	xge_hal_device_enable(hldev);
	xge_hal_device_intr_enable(hldev);
	return XGE_HAL_OK;
}
xge_hal_status_e __hal_device_handle_txdma ( xge_hal_device_t * hldev , u64 reason ) { xge_hal_pci_bar0_t * isrbar0 = ( xge_hal_pci_bar0_t * ) ( void * ) hldev -> isrbar0 ; u64 val64 , temp64 , err ; val64 = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> txdma_int_status ) ; if ( val64 & XGE_HAL_TXDMA_PFC_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> pfc_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> pfc_err_reg ) ; hldev -> stats . sw_dev_info_stats . pfc_err_cnt ++ ; temp64 = XGE_HAL_PFC_ECC_DB_ERR | XGE_HAL_PFC_SM_ERR_ALARM | XGE_HAL_PFC_MISC_0_ERR | XGE_HAL_PFC_MISC_1_ERR | XGE_HAL_PFC_PCIX_ERR ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_TXDMA_TDA_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> tda_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> tda_err_reg ) ; hldev -> stats . sw_dev_info_stats . tda_err_cnt ++ ; temp64 = XGE_HAL_TDA_Fn_ECC_DB_ERR | XGE_HAL_TDA_SM0_ERR_ALARM | XGE_HAL_TDA_SM1_ERR_ALARM ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_TXDMA_PCC_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> pcc_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> pcc_err_reg ) ; hldev -> stats . sw_dev_info_stats . pcc_err_cnt ++ ; temp64 = XGE_HAL_PCC_FB_ECC_DB_ERR | XGE_HAL_PCC_TXB_ECC_DB_ERR | XGE_HAL_PCC_SM_ERR_ALARM | XGE_HAL_PCC_WR_ERR_ALARM | XGE_HAL_PCC_N_SERR | XGE_HAL_PCC_6_COF_OV_ERR | XGE_HAL_PCC_7_COF_OV_ERR | XGE_HAL_PCC_6_LSO_OV_ERR | XGE_HAL_PCC_7_LSO_OV_ERR ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_TXDMA_TTI_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> tti_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> tti_err_reg ) ; hldev -> stats . sw_dev_info_stats . tti_err_cnt ++ ; temp64 = XGE_HAL_TTI_SM_ERR_ALARM ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_TXDMA_LSO_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> lso_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> lso_err_reg ) ; hldev -> stats . sw_dev_info_stats . lso_err_cnt ++ ; temp64 = XGE_HAL_LSO6_ABORT | XGE_HAL_LSO7_ABORT | XGE_HAL_LSO6_SM_ERR_ALARM | XGE_HAL_LSO7_SM_ERR_ALARM ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_TXDMA_TPA_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> tpa_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> tpa_err_reg ) ; hldev -> stats . sw_dev_info_stats . tpa_err_cnt ++ ; temp64 = XGE_HAL_TPA_SM_ERR_ALARM ; if ( val64 & temp64 ) goto reset ; } if ( val64 & XGE_HAL_TXDMA_SM_INT ) { err = xge_os_pio_mem_read64 ( hldev -> pdev , hldev -> regh0 , & isrbar0 -> sm_err_reg ) ; xge_os_pio_mem_write64 ( hldev -> pdev , hldev -> regh0 , err , & isrbar0 -> sm_err_reg ) ; hldev -> stats . sw_dev_info_stats . sm_err_cnt ++ ; temp64 = XGE_HAL_SM_SM_ERR_ALARM ; if ( val64 & temp64 ) goto reset ; } return XGE_HAL_OK ; reset : xge_hal_device_reset ( hldev ) ; xge_hal_device_enable ( hldev ) ; xge_hal_device_intr_enable ( hldev ) ; return XGE_HAL_OK ; }
__hal_device_handle_txdma - Handle TxDMA interrupt reason
 @hldev: HAL device handle.
__hal_device_handle_txdma - Handle TxDMA interrupt reason @hldev : HAL device handle .