FreeBSD/sys/mips/sibyte/sb_zbpci.c
/*
 * The CPU correctly deals with the big-endian to little-endian swap if
 * we are accessing 4 bytes at a time. However if we want to read 1 or 2
 * bytes then we need to fudge the address generated by the CPU such that
 * it generates the right byte enables on the PCI bus.
 */
The CPU correctly deals with the big-endian to little-endian swap if
we are accessing 4 bytes at a time. However if we want to read 1 or 2
bytes then we need to fudge the address generated by the CPU such that
it generates the right byte enables on the PCI bus.
The CPU correctly deals with the big - endian to little - endian swap if we are accessing 4 bytes at a time . However if we want to read 1 or 2 bytes then we need to fudge the address generated by the CPU such that it generates the right byte enables on the PCI bus .
static bus_addr_t
sb_match_bit_lane_addr(bus_addr_t addr, int bytes)
{
	vm_offset_t pa;
	pa = vtophys(addr);
	if (pa >= PCI_MATCH_BIT_LANES_START && pa <= PCI_MATCH_BIT_LANES_END)
		return (addr ^ (4 - bytes));
	else
		return (addr);
}
static bus_addr_t sb_match_bit_lane_addr ( bus_addr_t addr , int bytes ) { vm_offset_t pa ; pa = vtophys ( addr ) ; if ( pa >= PCI_MATCH_BIT_LANES_START && pa <= PCI_MATCH_BIT_LANES_END ) return ( addr ^ ( 4 - bytes ) ) ; else return ( addr ) ; }
The CPU correctly deals with the big-endian to little-endian swap if
 we are accessing 4 bytes at a time.
The CPU correctly deals with the big - endian to little - endian swap if we are accessing 4 bytes at a time .