src/occ_gpe0/apss_init.c
/*
 * Function Specification
 *
 * Name: apss_init_mode
 *
 * Description: Initialize the APSS mode
 *
 * End Function Specification
 */
Function Specification
Name: apss_init_mode

Initialize the APSS mode

End Function Specification
Function Specification Name : apss_init_mode Initialize the APSS mode End Function Specification
void apss_init_mode(ipc_msg_t* cmd, void* arg)
{
    uint32_t                rc = GPE_RC_SUCCESS;
    uint32_t                ipc_rc = IPC_RC_SUCCESS;
    uint32_t                ipc_send_rc;
    ipc_async_cmd_t         *async_cmd = (ipc_async_cmd_t*)cmd;
    setApssModeArgs_t       *args = (setApssModeArgs_t*)async_cmd->cmd_data;
    uint64_t                regValue = 0;
    PK_TRACE("apss_init_mode: started.");
    do
    {
        rc = wait_spi_completion(&(args->error), SPIPSS_P2S_STATUS_REG, 10);
        if (rc)
        {
            PK_TRACE("apss_init_mode: Timed out waiting for ops to complete. rc = 0x%08x", rc);
            break;
        }
        regValue = 0x4100000000000000;
        rc = putscom_abs(SPIPSS_P2S_CTRL_REG0, regValue);
        if (rc)
        {
            PK_TRACE("apss_init_mode: SPIPSS_P2S_CTRL_REG0 putscom failed. rc = 0x%08x", rc);
            gpe_set_ffdc(&(args->error), SPIPSS_P2S_CTRL_REG0, rc, regValue);
            break;
        }
        regValue = 0x8090000000000000;
        rc = putscom_abs(SPIPSS_P2S_CTRL_REG1, regValue);
        if (rc)
        {
            PK_TRACE("apss_init_mode: SPIPSS_P2S_CTRL_REG1 putscom failed. rc = 0x%08x", rc);
            gpe_set_ffdc(&(args->error), SPIPSS_P2S_CTRL_REG1, rc, regValue);
            break;
        }
        regValue = 0x0019000000000000;
        rc = putscom_abs(SPIPSS_P2S_CTRL_REG2, regValue);
        if (rc)
        {
            PK_TRACE("apss_init_mode: SPIPSS_P2S_CTRL_REG2 putscom failed. rc = 0x%08x", rc);
            gpe_set_ffdc(&(args->error), SPIPSS_P2S_CTRL_REG2, rc, regValue);
            break;
        }
        if (args->config.mode == APSS_MODE_COMPOSITE)
        {
            regValue = args->config.numAdcChannelsToRead - 1;  
            regValue = regValue << 6;                   
            regValue |= (args->config.numGpioPortsToRead) & 0x03;   
            regValue = (regValue << 48) | 0x8C00000000000000; 
            G_apss_mode = APSS_MODE_COMPOSITE;
        }
        else if (args->config.mode == APSS_MODE_AUTO2)
        {
            regValue = 0x3FC0000000000000;
            G_apss_mode = APSS_MODE_AUTO2;
        }
        else
        {
            PK_TRACE("apss_init_mode: Given invalid APSS Mode. Mode:0x%X", args->config.mode);
            rc = GPE_RC_INVALID_APSS_MODE;
            gpe_set_ffdc(&(args->error), 0x00, rc, args->config.mode);
            ipc_rc = IPC_RC_CMD_FAILED;
            break;
        }
        rc = putscom_abs(SPIPSS_P2S_WDATA_REG, regValue);
        if (rc)
        {
            PK_TRACE("apss_init_mode: SPIPSS_P2S_WDATA_REG putscom to set MODE failed. value:0x%X. rc = 0x%08x",
                     regValue, rc);
            gpe_set_ffdc(&(args->error), SPIPSS_P2S_WDATA_REG, rc, regValue);
            break;
        }
        regValue = 0x8000000000000000;
        rc = putscom_abs(SPIPSS_P2S_COMMAND_REG, regValue);
        if (rc)
        {
            PK_TRACE("apss_init_mode: SPIPSS_P2S_COMMAND_REG putscom failed. rc = 0x%08x",
                     rc);
            gpe_set_ffdc(&(args->error), SPIPSS_P2S_COMMAND_REG, rc, 0x8000000000000000);
        }
    }while(0);
    PK_TRACE("apss_init_mode: Sending APSS response ReturnCode:0x%X. APSSrc:0x%X (0 = Success)",
             ipc_rc, rc);
    ipc_send_rc = ipc_send_rsp(cmd, ipc_rc);
    if(ipc_send_rc)
    {
        PK_TRACE("apss_init_mode: Failed to send response back to mode initialization. Halting GPE0",
                 ipc_send_rc);
        gpe_set_ffdc(&(args->error), 0x00, ipc_send_rc, regValue);
        pk_halt();
    }
    if(rc == 0 && ipc_rc == IPC_RC_SUCCESS) 
    {
        PK_TRACE("apss_init_mode: completed successfully.");
    }
}
void apss_init_mode ( ipc_msg_t * cmd , void * arg ) { uint32_t rc = GPE_RC_SUCCESS ; uint32_t ipc_rc = IPC_RC_SUCCESS ; uint32_t ipc_send_rc ; ipc_async_cmd_t * async_cmd = ( ipc_async_cmd_t * ) cmd ; setApssModeArgs_t * args = ( setApssModeArgs_t * ) async_cmd -> cmd_data ; uint64_t regValue = 0 ; PK_TRACE ( " " ) ; do { rc = wait_spi_completion ( & ( args -> error ) , SPIPSS_P2S_STATUS_REG , 10 ) ; if ( rc ) { PK_TRACE ( " " , rc ) ; break ; } regValue = 0x4100000000000000 ; rc = putscom_abs ( SPIPSS_P2S_CTRL_REG0 , regValue ) ; if ( rc ) { PK_TRACE ( " " , rc ) ; gpe_set_ffdc ( & ( args -> error ) , SPIPSS_P2S_CTRL_REG0 , rc , regValue ) ; break ; } regValue = 0x8090000000000000 ; rc = putscom_abs ( SPIPSS_P2S_CTRL_REG1 , regValue ) ; if ( rc ) { PK_TRACE ( " " , rc ) ; gpe_set_ffdc ( & ( args -> error ) , SPIPSS_P2S_CTRL_REG1 , rc , regValue ) ; break ; } regValue = 0x0019000000000000 ; rc = putscom_abs ( SPIPSS_P2S_CTRL_REG2 , regValue ) ; if ( rc ) { PK_TRACE ( " " , rc ) ; gpe_set_ffdc ( & ( args -> error ) , SPIPSS_P2S_CTRL_REG2 , rc , regValue ) ; break ; } if ( args -> config . mode == APSS_MODE_COMPOSITE ) { regValue = args -> config . numAdcChannelsToRead - 1 ; regValue = regValue << 6 ; regValue |= ( args -> config . numGpioPortsToRead ) & 0x03 ; regValue = ( regValue << 48 ) | 0x8C00000000000000 ; G_apss_mode = APSS_MODE_COMPOSITE ; } else if ( args -> config . mode == APSS_MODE_AUTO2 ) { regValue = 0x3FC0000000000000 ; G_apss_mode = APSS_MODE_AUTO2 ; } else { PK_TRACE ( " " , args -> config . mode ) ; rc = GPE_RC_INVALID_APSS_MODE ; gpe_set_ffdc ( & ( args -> error ) , 0x00 , rc , args -> config . mode ) ; ipc_rc = IPC_RC_CMD_FAILED ; break ; } rc = putscom_abs ( SPIPSS_P2S_WDATA_REG , regValue ) ; if ( rc ) { PK_TRACE ( " " , regValue , rc ) ; gpe_set_ffdc ( & ( args -> error ) , SPIPSS_P2S_WDATA_REG , rc , regValue ) ; break ; } regValue = 0x8000000000000000 ; rc = putscom_abs ( SPIPSS_P2S_COMMAND_REG , regValue ) ; if ( rc ) { PK_TRACE ( " " , rc ) ; gpe_set_ffdc ( & ( args -> error ) , SPIPSS_P2S_COMMAND_REG , rc , 0x8000000000000000 ) ; } } while ( 0 ) ; PK_TRACE ( " " , ipc_rc , rc ) ; ipc_send_rc = ipc_send_rsp ( cmd , ipc_rc ) ; if ( ipc_send_rc ) { PK_TRACE ( " " , ipc_send_rc ) ; gpe_set_ffdc ( & ( args -> error ) , 0x00 , ipc_send_rc , regValue ) ; pk_halt ( ) ; } if ( rc == 0 && ipc_rc == IPC_RC_SUCCESS ) { PK_TRACE ( " " ) ; } }
Function Specification
 Name: apss_init_mode
Function Specification Name : apss_init_mode
//Note: arg was set to 0 in ipc func table (ipc_func_tables.c), so don't use it // Wait for SPI operations to be complete (up to 10usec timeout) //FFDC set in wait_spi_completion //////////////////////////// // Setup the control regs // frame_size=16, out_count1=16 // bridge_enable, clock_divider=36, 1 frames // inter_frame_delay=50 (5usec) //Check for requested APSS mode. // APSS command to set composite data streaming mode (APSS cmd 0x8xxx, reserved bits are 1) // binary: 100011aaaa0000gg000000000000000000000000000000000000000000000000 //aaaa => Address of last ADC channel (countOfADCChannels - 1) //Make space for GPIO port count //gg => Num of GPIO ports //Add Command at D15-D12 // Set Auto2 mode to scan all 16 ADC channels //Invalid mode. // Start SPI transaction // send back a response //If we fail to send ipc response, then this error takes prescedence over any other error. //TODO: See if there's another space to write the error out to. // if ipc_send_rc, wont reach this instruction (pk_halt)