FreeBSD/sys/dev/pci/pci.c
/*
 * For ATA devices we need to decide early what addressing mode to use.
 * Legacy demands that the primary and secondary ATA ports sits on the
 * same addresses that old ISA hardware did. This dictates that we use
 * those addresses and ignore the BAR's if we cannot set PCI native
 * addressing mode.
 */
For ATA devices we need to decide early what addressing mode to use.
Legacy demands that the primary and secondary ATA ports sits on the
same addresses that old ISA hardware did. This dictates that we use
those addresses and ignore the BAR's if we cannot set PCI native
addressing mode.
For ATA devices we need to decide early what addressing mode to use . Legacy demands that the primary and secondary ATA ports sits on the same addresses that old ISA hardware did . This dictates that we use those addresses and ignore the BAR ' s if we cannot set PCI native addressing mode .
static void
pci_ata_maps(device_t bus, device_t dev, struct resource_list *rl, int force,
    uint32_t prefetchmask)
{
	int rid, type, progif;
#if 0
	progif = pci_read_config(dev, PCIR_PROGIF, 1);
	if ((progif & 0x8a) == 0x8a) {
		if (pci_mapbase(pci_read_config(dev, PCIR_BAR(0), 4)) &&
		    pci_mapbase(pci_read_config(dev, PCIR_BAR(2), 4))) {
			printf("Trying ATA native PCI addressing mode\n");
			pci_write_config(dev, PCIR_PROGIF, progif | 0x05, 1);
		}
	}
#endif
	progif = pci_read_config(dev, PCIR_PROGIF, 1);
	type = SYS_RES_IOPORT;
	if (progif & PCIP_STORAGE_IDE_MODEPRIM) {
		pci_add_map(bus, dev, PCIR_BAR(0), rl, force,
		    prefetchmask & (1 << 0));
		pci_add_map(bus, dev, PCIR_BAR(1), rl, force,
		    prefetchmask & (1 << 1));
	} else {
		rid = PCIR_BAR(0);
		resource_list_add(rl, type, rid, 0x1f0, 0x1f7, 8);
		(void)resource_list_reserve(rl, bus, dev, type, &rid, 0x1f0,
		    0x1f7, 8, 0);
		rid = PCIR_BAR(1);
		resource_list_add(rl, type, rid, 0x3f6, 0x3f6, 1);
		(void)resource_list_reserve(rl, bus, dev, type, &rid, 0x3f6,
		    0x3f6, 1, 0);
	}
	if (progif & PCIP_STORAGE_IDE_MODESEC) {
		pci_add_map(bus, dev, PCIR_BAR(2), rl, force,
		    prefetchmask & (1 << 2));
		pci_add_map(bus, dev, PCIR_BAR(3), rl, force,
		    prefetchmask & (1 << 3));
	} else {
		rid = PCIR_BAR(2);
		resource_list_add(rl, type, rid, 0x170, 0x177, 8);
		(void)resource_list_reserve(rl, bus, dev, type, &rid, 0x170,
		    0x177, 8, 0);
		rid = PCIR_BAR(3);
		resource_list_add(rl, type, rid, 0x376, 0x376, 1);
		(void)resource_list_reserve(rl, bus, dev, type, &rid, 0x376,
		    0x376, 1, 0);
	}
	pci_add_map(bus, dev, PCIR_BAR(4), rl, force,
	    prefetchmask & (1 << 4));
	pci_add_map(bus, dev, PCIR_BAR(5), rl, force,
	    prefetchmask & (1 << 5));
}
static void pci_ata_maps ( device_t bus , device_t dev , struct resource_list * rl , int force , uint32_t prefetchmask ) { int rid , type , progif ; #if 0 progif = pci_read_config ( dev , PCIR_PROGIF , 1 ) ; if ( ( progif & 0x8a ) == 0x8a ) { if ( pci_mapbase ( pci_read_config ( dev , PCIR_BAR ( 0 ) , 4 ) ) && pci_mapbase ( pci_read_config ( dev , PCIR_BAR ( 2 ) , 4 ) ) ) { printf ( " \n " ) ; pci_write_config ( dev , PCIR_PROGIF , progif | 0x05 , 1 ) ; } } #endif progif = pci_read_config ( dev , PCIR_PROGIF , 1 ) ; type = SYS_RES_IOPORT ; if ( progif & PCIP_STORAGE_IDE_MODEPRIM ) { pci_add_map ( bus , dev , PCIR_BAR ( 0 ) , rl , force , prefetchmask & ( 1 << 0 ) ) ; pci_add_map ( bus , dev , PCIR_BAR ( 1 ) , rl , force , prefetchmask & ( 1 << 1 ) ) ; } else { rid = PCIR_BAR ( 0 ) ; resource_list_add ( rl , type , rid , 0x1f0 , 0x1f7 , 8 ) ; ( void ) resource_list_reserve ( rl , bus , dev , type , & rid , 0x1f0 , 0x1f7 , 8 , 0 ) ; rid = PCIR_BAR ( 1 ) ; resource_list_add ( rl , type , rid , 0x3f6 , 0x3f6 , 1 ) ; ( void ) resource_list_reserve ( rl , bus , dev , type , & rid , 0x3f6 , 0x3f6 , 1 , 0 ) ; } if ( progif & PCIP_STORAGE_IDE_MODESEC ) { pci_add_map ( bus , dev , PCIR_BAR ( 2 ) , rl , force , prefetchmask & ( 1 << 2 ) ) ; pci_add_map ( bus , dev , PCIR_BAR ( 3 ) , rl , force , prefetchmask & ( 1 << 3 ) ) ; } else { rid = PCIR_BAR ( 2 ) ; resource_list_add ( rl , type , rid , 0x170 , 0x177 , 8 ) ; ( void ) resource_list_reserve ( rl , bus , dev , type , & rid , 0x170 , 0x177 , 8 , 0 ) ; rid = PCIR_BAR ( 3 ) ; resource_list_add ( rl , type , rid , 0x376 , 0x376 , 1 ) ; ( void ) resource_list_reserve ( rl , bus , dev , type , & rid , 0x376 , 0x376 , 1 , 0 ) ; } pci_add_map ( bus , dev , PCIR_BAR ( 4 ) , rl , force , prefetchmask & ( 1 << 4 ) ) ; pci_add_map ( bus , dev , PCIR_BAR ( 5 ) , rl , force , prefetchmask & ( 1 << 5 ) ) ; }
For ATA devices we need to decide early what addressing mode to use.
For ATA devices we need to decide early what addressing mode to use .
/* if this device supports PCI native addressing use it */