FreeBSD/sys/dev/nxge/xgehal/xgehal-mgmt.c
/**
 * xge_hal_read_eeprom - Read 4 bytes of data from user given offset.
 * @devh: HAL device handle.
 * @off: offset at which the data must be written
 * @data: output parameter where the data is stored.
 *
 * Read 4 bytes of data from the user given offset and return the
 * read data.
 * Note: will allow to read only part of the EEPROM visible through the
 * I2C bus.
 * Returns: -1 on failure, 0 on success.
 */
Read 4 bytes of data from user given offset.
@devh: HAL device handle.
@off: offset at which the data must be written
@data: output parameter where the data is stored.

Read 4 bytes of data from the user given offset and return the
read data.
Note: will allow to read only part of the EEPROM visible through the
I2C bus.
Returns: -1 on failure, 0 on success.
Read 4 bytes of data from user given offset . @devh : HAL device handle . @off : offset at which the data must be written @data : output parameter where the data is stored . Read 4 bytes of data from the user given offset and return the read data . Note : will allow to read only part of the EEPROM visible through the I2C bus . Returns : - 1 on failure 0 on success .
xge_hal_status_e
xge_hal_read_eeprom(xge_hal_device_h devh, int off, u32* data)
{
	xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
	xge_hal_status_e ret = XGE_HAL_FAIL;
	u32 exit_cnt = 0;
	u64 val64;
	xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
	val64 = XGE_HAL_I2C_CONTROL_DEV_ID(XGE_DEV_ID) |
	    XGE_HAL_I2C_CONTROL_ADDR(off) |
	    XGE_HAL_I2C_CONTROL_BYTE_CNT(0x3) |
	    XGE_HAL_I2C_CONTROL_READ | XGE_HAL_I2C_CONTROL_CNTL_START;
	__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
	while (exit_cnt < 5) {
	    val64 = __hal_serial_mem_read64(hldev, &bar0->i2c_control);
	    if (XGE_HAL_I2C_CONTROL_CNTL_END(val64)) {
	        *data = XGE_HAL_I2C_CONTROL_GET_DATA(val64);
	        ret = XGE_HAL_OK;
	        break;
	    }
	    exit_cnt++;
	}
	return ret;
}
xge_hal_status_e xge_hal_read_eeprom ( xge_hal_device_h devh , int off , u32 * data ) { xge_hal_device_t * hldev = ( xge_hal_device_t * ) devh ; xge_hal_status_e ret = XGE_HAL_FAIL ; u32 exit_cnt = 0 ; u64 val64 ; xge_hal_pci_bar0_t * bar0 = ( xge_hal_pci_bar0_t * ) hldev -> bar0 ; val64 = XGE_HAL_I2C_CONTROL_DEV_ID ( XGE_DEV_ID ) | XGE_HAL_I2C_CONTROL_ADDR ( off ) | XGE_HAL_I2C_CONTROL_BYTE_CNT ( 0x3 ) | XGE_HAL_I2C_CONTROL_READ | XGE_HAL_I2C_CONTROL_CNTL_START ; __hal_serial_mem_write64 ( hldev , val64 , & bar0 -> i2c_control ) ; while ( exit_cnt < 5 ) { val64 = __hal_serial_mem_read64 ( hldev , & bar0 -> i2c_control ) ; if ( XGE_HAL_I2C_CONTROL_CNTL_END ( val64 ) ) { * data = XGE_HAL_I2C_CONTROL_GET_DATA ( val64 ) ; ret = XGE_HAL_OK ; break ; } exit_cnt ++ ; } return ret ; }
xge_hal_read_eeprom - Read 4 bytes of data from user given offset.
xge_hal_read_eeprom - Read 4 bytes of data from user given offset .