drivers/c/timers.c
//*****************************************************************************
// Configure a general purpose timer to be a 32-bit timer.  
//
// Paramters
//  base_address          The base address of a general purpose timer
//
//  mode                  bit mask for Periodic, One-Shot, or Capture
//
//  count_up              When true, the timer counts up.  When false, it counts
//                        down
//
//  enable_interrupts     When set to true, the timer generates and interrupt
//                        when the timer expires.  When set to false, the timer
//                        does not generate interrupts.
//
//The function returns true if the base_addr is a valid general purpose timer
//*****************************************************************************
Configure a general purpose timer to be a 32-bit timer.
Paramters
base_address          The base address of a general purpose timer

mode                  bit mask for Periodic, One-Shot, or Capture

count_up              When true, the timer counts up.  When false, it counts
down

enable_interrupts     When set to true, the timer generates and interrupt
when the timer expires.  When set to false, the timer
does not generate interrupts.

The function returns true if the base_addr is a valid general purpose timer
Configure a general purpose timer to be a 32 - bit timer . Paramters base_address The base address of a general purpose timer mode bit mask for Periodic One - Shot or Capture count_up When true the timer counts up . When false it counts down enable_interrupts When set to true the timer generates and interrupt when the timer expires . When set to false the timer does not generate interrupts . The function returns true if the base_addr is a valid general purpose timer
bool gp_timer_config_32(uint32_t base_addr, uint32_t mode, bool count_up, bool enable_interrupts)
{
  uint32_t timer_rcgc_mask;
  uint32_t timer_pr_mask;
  TIMER0_Type *gp_timer;
  if ( ! verify_base_addr(base_addr) )
  {
    return false;
  }
  get_clock_masks(base_addr, &timer_rcgc_mask, &timer_pr_mask);
  SYSCTL->RCGCTIMER |= timer_rcgc_mask;
  while( (SYSCTL->PRTIMER & timer_pr_mask) == 0) {};
  gp_timer = (TIMER0_Type *)base_addr;
  gp_timer->CTL &= ~(TIMER_CTL_TAEN | TIMER_CTL_TBEN);
	gp_timer->CFG = TIMER_CFG_32_BIT_TIMER;
	gp_timer->TAMR &= 0x0;
	gp_timer->TAMR |= mode;
	gp_timer->TAMR |= (count_up << 4);
	gp_timer->TAILR = 15000000; 
	gp_timer->ICR |= TIMER_ICR_TATOCINT;
	if (enable_interrupts) {
	  gp_timer->IMR = TIMER_IMR_TATOIM;
		NVIC_SetPriority(TIMER0A_IRQn, 1);
		NVIC_EnableIRQ(TIMER0A_IRQn);
	}
	gp_timer->CTL |= (TIMER_CTL_TAEN | TIMER_CTL_TBEN);
  return true;  
}
bool gp_timer_config_32 ( uint32_t base_addr , uint32_t mode , bool count_up , bool enable_interrupts ) { uint32_t timer_rcgc_mask ; uint32_t timer_pr_mask ; TIMER0_Type * gp_timer ; if ( ! verify_base_addr ( base_addr ) ) { return false ; } get_clock_masks ( base_addr , & timer_rcgc_mask , & timer_pr_mask ) ; SYSCTL -> RCGCTIMER |= timer_rcgc_mask ; while ( ( SYSCTL -> PRTIMER & timer_pr_mask ) == 0 ) { } ; gp_timer = ( TIMER0_Type * ) base_addr ; gp_timer -> CTL &= ~ ( TIMER_CTL_TAEN | TIMER_CTL_TBEN ) ; gp_timer -> CFG = TIMER_CFG_32_BIT_TIMER ; gp_timer -> TAMR &= 0x0 ; gp_timer -> TAMR |= mode ; gp_timer -> TAMR |= ( count_up << 4 ) ; gp_timer -> TAILR = 15000000 ; gp_timer -> ICR |= TIMER_ICR_TATOCINT ; if ( enable_interrupts ) { gp_timer -> IMR = TIMER_IMR_TATOIM ; NVIC_SetPriority ( TIMER0A_IRQn , 1 ) ; NVIC_EnableIRQ ( TIMER0A_IRQn ) ; } gp_timer -> CTL |= ( TIMER_CTL_TAEN | TIMER_CTL_TBEN ) ; return true ; }
Configure a general purpose timer to be a 32-bit timer.
Configure a general purpose timer to be a 32 - bit timer .
// Verify the base address. // get the correct RCGC and PR masks for the base address // Turn on the clock for the timer // Wait for the timer to turn on // Type cast the base address to a TIMER0_Type struct //*********************     // ADD CODE //********************* //.3 seconds, arbitrary, but it is calibrated with our speed and multiplier //enable interrupts //reenable