src/occ_405/gpu/gpu.c
// Function Specification
//
// Name:  gpu_read_temp_sm
//
// Description: Called from gpu_task_sm to read GPU core temperature of G_current_gpu_id
//              This function should only return that complete is TRUE when the temperature
//              read is complete (or determined failed) and ready to start reading a different GPU
//
// Pre-Req:     Caller must have G_current_gpu_id set for GPU to read and
//              verified G_gpu_op_request is idle to allow scheduling
// End Function Specification
Function Specification
Name:  gpu_read_temp_sm

Called from gpu_task_sm to read GPU core temperature of G_current_gpu_id
This function should only return that complete is TRUE when the temperature
read is complete (or determined failed) and ready to start reading a different GPU

Pre-Req:     Caller must have G_current_gpu_id set for GPU to read and
verified G_gpu_op_request is idle to allow scheduling
End Function Specification
Function Specification Name : gpu_read_temp_sm Called from gpu_task_sm to read GPU core temperature of G_current_gpu_id This function should only return that complete is TRUE when the temperature read is complete ( or determined failed ) and ready to start reading a different GPU Pre - Req : Caller must have G_current_gpu_id set for GPU to read and verified G_gpu_op_request is idle to allow scheduling End Function Specification
bool gpu_read_temp_sm()
{
    bool l_complete = FALSE;   
    uint16_t l_temp = 0;
    static bool L_scheduled = FALSE;  
    static uint8_t L_read_failure_count = 0; 
    static bool L_trace_success = FALSE;
    static gpuReadTempState_e L_read_temp_state = GPU_STATE_READ_TEMP_NEW;  
    static uint32_t L_num_ticks = 0;
    L_num_ticks++;
    if (async_request_is_idle(&G_gpu_op_request.request))
    {
        if( (L_read_temp_state != GPU_STATE_READ_TEMP_NEW) &&
             (!L_scheduled || (GPE_RC_SUCCESS != G_gpu_op_req_args.error.rc)) )
        {
            if( (L_read_failure_count > MAX_GPU_READ_ATTEMPT) ||
                (GPE_RC_I2C_ERROR == G_gpu_op_req_args.error.rc) )
            {
                mark_gpu_failed(&G_gpu_op_req_args);
                L_read_temp_state = GPU_STATE_READ_TEMP_NEW;
                L_read_failure_count = 0;
                return TRUE;  
            }
            else
            {
                L_read_failure_count++;
            }
        }
        else 
        {
            L_read_failure_count = 0;
            L_read_temp_state++;
        }
        L_scheduled = FALSE;  
        switch (L_read_temp_state)
        {
            case GPU_STATE_READ_TEMP_START:
                L_num_ticks = 1;
                L_scheduled = schedule_gpu_req(GPU_REQ_READ_TEMP_START, G_new_gpu_req_args);
                break;
            case GPU_STATE_READ_TEMP_FINISH:
                L_scheduled = schedule_gpu_req(GPU_REQ_READ_TEMP_FINISH, G_new_gpu_req_args);
                break;
            case GPU_STATE_READ_TEMP_COMPLETE:
                update_gpu_tick_sensor(&G_gpu_tick_times.coretemp[G_current_gpu_id], L_num_ticks);
                if( (!g_amec->gpu[G_current_gpu_id].status.readOnce) &&
                    (0 != G_gpu_op_req_args.data[0]) )
                {
                    g_amec->gpu[G_current_gpu_id].status.readOnce = true;
                    if(FALSE == L_trace_success)
                    {
                        TRAC_INFO("First successful attempt to read temp from GPU%d was on tick %d",
                                   G_current_gpu_id, CURRENT_TICK);
                        L_trace_success = TRUE;
                    }
                    g_amec->gpu[G_current_gpu_id].status.checkDriverLoaded = TRUE;
                }
                l_temp = G_gpu_op_req_args.data[0];
                sensor_update(AMECSENSOR_PTR(TEMPGPU0 + G_current_gpu_id), l_temp);
                g_amec->gpu[G_current_gpu_id].status.coreTempFailure = false;
                g_amec->gpu[G_current_gpu_id].status.coreTempNotAvailable = false;
                g_amec->gpu[G_current_gpu_id].status.errorCount = 0;
                g_amec->gpu[G_current_gpu_id].status.retryCount = 0;
                if((G_data_cnfg->thrm_thresh.data[DATA_FRU_GPU].error) &&
                   (l_temp > G_data_cnfg->thrm_thresh.data[DATA_FRU_GPU].error) &&
                   (!g_amec->gpu[G_current_gpu_id].status.overtempError) )
                {
                    g_amec->gpu[G_current_gpu_id].status.overtempError = TRUE;
                    INTR_TRAC_ERR("gpu_read_temp: GPU%d OT! temp[%d]",
                                   G_current_gpu_id, l_temp);
                    errlHndl_t l_err = createErrl(GPU_MID_GPU_READ_TEMP,
                                                  GPU_ERROR_TEMP,
                                                  OCC_NO_EXTENDED_RC,
                                                  ERRL_SEV_PREDICTIVE,
                                                  NULL,
                                                  DEFAULT_TRACE_SIZE,
                                                  G_current_gpu_id,
                                                  l_temp);
                    addCalloutToErrl(l_err,
                                     ERRL_CALLOUT_TYPE_COMPONENT_ID,
                                     ERRL_COMPONENT_ID_OVER_TEMPERATURE,
                                     ERRL_CALLOUT_PRIORITY_HIGH);
                    if(G_sysConfigData.gpu_sensor_ids[G_current_gpu_id])
                    {
                        addCalloutToErrl(l_err,
                                         ERRL_CALLOUT_TYPE_GPU_ID,
                                         G_sysConfigData.gpu_sensor_ids[G_current_gpu_id],
                                         ERRL_CALLOUT_PRIORITY_MED);
                    }
                    commitErrl(&l_err);
                } 
                L_read_temp_state = GPU_STATE_READ_TEMP_NEW;
                l_complete = TRUE;
                break;
            default:
                INTR_TRAC_ERR("gpu_read_temp_sm: INVALID STATE: 0x%02X", L_read_temp_state);
                L_read_temp_state = GPU_STATE_READ_TEMP_NEW;
                l_complete = TRUE;
               break;
        } 
        if(L_scheduled)
        {
            GPU_DBG("gpu_read_temp_sm: Scheduled read temp state 0x%02X at tick %d",
                    L_read_temp_state, GPU_TICK);
        }
        else if(!l_complete)  
        {
            INTR_TRAC_ERR("gpu_read_temp_sm: failed to schedule state 0x%02X", L_read_temp_state);
        }
    } 
    else
    {
        INTR_TRAC_ERR("gpu_read_temp_sm: NOT idle for state 0x%02X", L_read_temp_state);
    }
    return l_complete;
}
bool gpu_read_temp_sm ( ) { bool l_complete = FALSE ; uint16_t l_temp = 0 ; static bool L_scheduled = FALSE ; static uint8_t L_read_failure_count = 0 ; static bool L_trace_success = FALSE ; static gpuReadTempState_e L_read_temp_state = GPU_STATE_READ_TEMP_NEW ; static uint32_t L_num_ticks = 0 ; L_num_ticks ++ ; if ( async_request_is_idle ( & G_gpu_op_request . request ) ) { if ( ( L_read_temp_state != GPU_STATE_READ_TEMP_NEW ) && ( ! L_scheduled || ( GPE_RC_SUCCESS != G_gpu_op_req_args . error . rc ) ) ) { if ( ( L_read_failure_count > MAX_GPU_READ_ATTEMPT ) || ( GPE_RC_I2C_ERROR == G_gpu_op_req_args . error . rc ) ) { mark_gpu_failed ( & G_gpu_op_req_args ) ; L_read_temp_state = GPU_STATE_READ_TEMP_NEW ; L_read_failure_count = 0 ; return TRUE ; } else { L_read_failure_count ++ ; } } else { L_read_failure_count = 0 ; L_read_temp_state ++ ; } L_scheduled = FALSE ; switch ( L_read_temp_state ) { case GPU_STATE_READ_TEMP_START : L_num_ticks = 1 ; L_scheduled = schedule_gpu_req ( GPU_REQ_READ_TEMP_START , G_new_gpu_req_args ) ; break ; case GPU_STATE_READ_TEMP_FINISH : L_scheduled = schedule_gpu_req ( GPU_REQ_READ_TEMP_FINISH , G_new_gpu_req_args ) ; break ; case GPU_STATE_READ_TEMP_COMPLETE : update_gpu_tick_sensor ( & G_gpu_tick_times . coretemp [ G_current_gpu_id ] , L_num_ticks ) ; if ( ( ! g_amec -> gpu [ G_current_gpu_id ] . status . readOnce ) && ( 0 != G_gpu_op_req_args . data [ 0 ] ) ) { g_amec -> gpu [ G_current_gpu_id ] . status . readOnce = true ; if ( FALSE == L_trace_success ) { TRAC_INFO ( " " , G_current_gpu_id , CURRENT_TICK ) ; L_trace_success = TRUE ; } g_amec -> gpu [ G_current_gpu_id ] . status . checkDriverLoaded = TRUE ; } l_temp = G_gpu_op_req_args . data [ 0 ] ; sensor_update ( AMECSENSOR_PTR ( TEMPGPU0 + G_current_gpu_id ) , l_temp ) ; g_amec -> gpu [ G_current_gpu_id ] . status . coreTempFailure = false ; g_amec -> gpu [ G_current_gpu_id ] . status . coreTempNotAvailable = false ; g_amec -> gpu [ G_current_gpu_id ] . status . errorCount = 0 ; g_amec -> gpu [ G_current_gpu_id ] . status . retryCount = 0 ; if ( ( G_data_cnfg -> thrm_thresh . data [ DATA_FRU_GPU ] . error ) && ( l_temp > G_data_cnfg -> thrm_thresh . data [ DATA_FRU_GPU ] . error ) && ( ! g_amec -> gpu [ G_current_gpu_id ] . status . overtempError ) ) { g_amec -> gpu [ G_current_gpu_id ] . status . overtempError = TRUE ; INTR_TRAC_ERR ( " " , G_current_gpu_id , l_temp ) ; errlHndl_t l_err = createErrl ( GPU_MID_GPU_READ_TEMP , GPU_ERROR_TEMP , OCC_NO_EXTENDED_RC , ERRL_SEV_PREDICTIVE , NULL , DEFAULT_TRACE_SIZE , G_current_gpu_id , l_temp ) ; addCalloutToErrl ( l_err , ERRL_CALLOUT_TYPE_COMPONENT_ID , ERRL_COMPONENT_ID_OVER_TEMPERATURE , ERRL_CALLOUT_PRIORITY_HIGH ) ; if ( G_sysConfigData . gpu_sensor_ids [ G_current_gpu_id ] ) { addCalloutToErrl ( l_err , ERRL_CALLOUT_TYPE_GPU_ID , G_sysConfigData . gpu_sensor_ids [ G_current_gpu_id ] , ERRL_CALLOUT_PRIORITY_MED ) ; } commitErrl ( & l_err ) ; } L_read_temp_state = GPU_STATE_READ_TEMP_NEW ; l_complete = TRUE ; break ; default : INTR_TRAC_ERR ( " " , L_read_temp_state ) ; L_read_temp_state = GPU_STATE_READ_TEMP_NEW ; l_complete = TRUE ; break ; } if ( L_scheduled ) { GPU_DBG ( " " , L_read_temp_state , GPU_TICK ) ; } else if ( ! l_complete ) { INTR_TRAC_ERR ( " " , L_read_temp_state ) ; } } else { INTR_TRAC_ERR ( " " , L_read_temp_state ) ; } return l_complete ; }
Function Specification
Name:  gpu_read_temp_sm
Function Specification Name : gpu_read_temp_sm
// only return TRUE when the read is complete or failed // indicates if a GPU GPE request was scheduled // Used for I2C errors // 1st state for reading temp // If not starting a new read then need to check status of current state before moving on // stay in current state if the schedule failed or the state isn't finished/failed // If reached retry count give up on this GPU // Done with this GPU, let GPU SM move to next // INC failure count and retry current state // success on last state go to next state and process it // default nothing scheduled // Only trace this once // comm is now established update for capability checking to take place // Update sensor // Clear all past errors // check if there is an overtemp that hasn't been reported // Log an OT error /* @
                     * @errortype
                     * @moduleid    GPU_MID_GPU_READ_TEMP
                     * @reasoncode  GPU_ERROR_TEMP
                     * @userdata1   GPU ID
                     * @userdata2   GPU memory temperature
                     * @userdata4   OCC_NO_EXTENDED_RC
                     * @devdesc     GPU memory has reached error temperature
                     *
                     */ // Callout the over temperature procedure // Callout the GPU if have sensor ID for it // Commit Error // if OT error // Done with this GPU ready to move to new one // switch L_read_temp_state // if not complete there must have been a failure on the schedule // if async_request_is_idle