qAutoStereo_20190430/qas/src/main/cpp/btk/b_BasicEm/MathSSE2.c
/** Using full register (128-bit) in SSE2 to calculate dot product (non aligned version).
 *  Dependencies: memory does not need to be 16-bit aligned
 *  Return Value: int32 containing dot product
 */
Using full register (128-bit) in SSE2 to calculate dot product (non aligned version).
Dependencies: memory does not need to be 16-bit aligned
Return Value: int32 containing dot product
Using full register ( 128 - bit ) in SSE2 to calculate dot product ( non aligned version ) . Dependencies : memory does not need to be 16 - bit aligned Return Value : int32 containing dot product
int32 bbs_dotProduct_u128SSE2( const int16* vec1A, const int16* vec2A, uint32 sizeA )
{
	__m128i m_XMM0, m_XMM2, m_XMM3, m_XMM5, m_XMM6;
	int16* vec1L = ( int16* )vec1A;
	int16* vec2L = ( int16* )vec2A;
	int32 resultL = 0;
	uint32 alignOffSetL = 0;
	m_XMM5 = _mm_xor_si128( m_XMM5, m_XMM5 );
	m_XMM6 = _mm_xor_si128( m_XMM6, m_XMM6 );
	alignOffSetL = sizeA % 16;
	sizeA >>= 4;
	if( sizeA )
	{
		while( sizeA > 0 )
		{
			m_XMM0 = _mm_loadu_si128( (__m128i *)&0[vec1L] );
			m_XMM5 = _mm_add_epi32( m_XMM5, m_XMM6 );
			m_XMM2 = _mm_loadu_si128( (__m128i *)&0[vec2L] );
			m_XMM6 = _mm_loadu_si128( (__m128i *)&8[vec1L] );
			m_XMM0 = _mm_madd_epi16( m_XMM0, m_XMM2 );
			m_XMM5 = _mm_add_epi32( m_XMM5, m_XMM0 );
			m_XMM3 = _mm_loadu_si128( (__m128i *)&8[vec2L] );
			m_XMM6 = _mm_madd_epi16( m_XMM6, m_XMM3 );
			vec1L += 16;
			vec2L += 16;
			sizeA--;
		}
		m_XMM5 = _mm_add_epi32( m_XMM5, m_XMM6 );
		m_XMM0 = _mm_loadu_si128( (__m128i *)&m_XMM5 );
		resultL = _mm_cvtsi128_si32( m_XMM0 );	
		m_XMM0 = _mm_srli_si128( m_XMM0, 4 );
		resultL += _mm_cvtsi128_si32( m_XMM0 );	
		m_XMM0 = _mm_srli_si128( m_XMM0, 4 );
		resultL += _mm_cvtsi128_si32( m_XMM0 );	
		m_XMM0 = _mm_srli_si128( m_XMM0, 4 );
		resultL += _mm_cvtsi128_si32( m_XMM0 );	
	}
	switch( alignOffSetL )
	{
		case 15:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 14:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 13:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 12:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 11:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 10:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 9:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 8:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 7:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 6:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 5:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 4:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 3:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 2:
			resultL += ( int32 )*vec1L++ * *vec2L++;
		case 1:
			resultL += ( int32 )*vec1L++ * *vec2L++;
	}
	return resultL;
}
int32 bbs_dotProduct_u128SSE2 ( const int16 * vec1A , const int16 * vec2A , uint32 sizeA ) { __m128i m_XMM0 , m_XMM2 , m_XMM3 , m_XMM5 , m_XMM6 ; int16 * vec1L = ( int16 * ) vec1A ; int16 * vec2L = ( int16 * ) vec2A ; int32 resultL = 0 ; uint32 alignOffSetL = 0 ; m_XMM5 = _mm_xor_si128 ( m_XMM5 , m_XMM5 ) ; m_XMM6 = _mm_xor_si128 ( m_XMM6 , m_XMM6 ) ; alignOffSetL = sizeA % 16 ; sizeA >>= 4 ; if ( sizeA ) { while ( sizeA > 0 ) { m_XMM0 = _mm_loadu_si128 ( ( __m128i * ) & 0 [ vec1L ] ) ; m_XMM5 = _mm_add_epi32 ( m_XMM5 , m_XMM6 ) ; m_XMM2 = _mm_loadu_si128 ( ( __m128i * ) & 0 [ vec2L ] ) ; m_XMM6 = _mm_loadu_si128 ( ( __m128i * ) & 8 [ vec1L ] ) ; m_XMM0 = _mm_madd_epi16 ( m_XMM0 , m_XMM2 ) ; m_XMM5 = _mm_add_epi32 ( m_XMM5 , m_XMM0 ) ; m_XMM3 = _mm_loadu_si128 ( ( __m128i * ) & 8 [ vec2L ] ) ; m_XMM6 = _mm_madd_epi16 ( m_XMM6 , m_XMM3 ) ; vec1L += 16 ; vec2L += 16 ; sizeA -- ; } m_XMM5 = _mm_add_epi32 ( m_XMM5 , m_XMM6 ) ; m_XMM0 = _mm_loadu_si128 ( ( __m128i * ) & m_XMM5 ) ; resultL = _mm_cvtsi128_si32 ( m_XMM0 ) ; m_XMM0 = _mm_srli_si128 ( m_XMM0 , 4 ) ; resultL += _mm_cvtsi128_si32 ( m_XMM0 ) ; m_XMM0 = _mm_srli_si128 ( m_XMM0 , 4 ) ; resultL += _mm_cvtsi128_si32 ( m_XMM0 ) ; m_XMM0 = _mm_srli_si128 ( m_XMM0 , 4 ) ; resultL += _mm_cvtsi128_si32 ( m_XMM0 ) ; } switch ( alignOffSetL ) { case 15 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 14 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 13 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 12 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 11 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 10 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 9 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 8 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 7 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 6 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 5 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 4 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 3 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 2 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; case 1 : resultL += ( int32 ) * vec1L ++ * * vec2L ++ ; } return resultL ; }
Using full register (128-bit) in SSE2 to calculate dot product (non aligned version).
Using full register ( 128 - bit ) in SSE2 to calculate dot product ( non aligned version ) .
/* initialize registers to 0 */ /* sum up accumulators */ /* 1st 32bits */ /* 2nd 32bits */ /* 3rd 32bits */ /* 4th 32bits */