FreeBSD/sys/dev/cxgb/common/cxgb_t3_hw.c
/**
 * 	t3_init_hw - initialize and configure T3 HW modules
 * 	@adapter: the adapter
 * 	@fw_params: initial parameters to pass to firmware (optional)
 *
 *	Initialize and configure T3 HW modules.  This performs the
 *	initialization steps that need to be done once after a card is reset.
 *	MAC and PHY initialization is handled separarely whenever a port is
 *	enabled.
 *
 *	@fw_params are passed to FW and their value is platform dependent.
 *	Only the top 8 bits are available for use, the rest must be 0.
 */
initialize and configure T3 HW modules
@adapter: the adapter
@fw_params: initial parameters to pass to firmware (optional)

Initialize and configure T3 HW modules.  This performs the
initialization steps that need to be done once after a card is reset.
MAC and PHY initialization is handled separarely whenever a port is
enabled.

@fw_params are passed to FW and their value is platform dependent.
Only the top 8 bits are available for use, the rest must be 0.
initialize and configure T3 HW modules @adapter : the adapter @fw_params : initial parameters to pass to firmware ( optional ) Initialize and configure T3 HW modules . This performs the initialization steps that need to be done once after a card is reset . MAC and PHY initialization is handled separarely whenever a port is enabled . @fw_params are passed to FW and their value is platform dependent . Only the top 8 bits are available for use the rest must be 0 .
int t3_init_hw(adapter_t *adapter, u32 fw_params)
{
	int err = -EIO, attempts, i;
	const struct vpd_params *vpd = &adapter->params.vpd;
	if (adapter->params.rev > 0)
		calibrate_xgm_t3b(adapter);
	else if (calibrate_xgm(adapter))
		goto out_err;
	if (adapter->params.nports > 2)
		t3_mac_init(&adap2pinfo(adapter, 0)->mac);
	if (vpd->mclk) {
		partition_mem(adapter, &adapter->params.tp);
		if (mc7_init(&adapter->pmrx, vpd->mclk, vpd->mem_timing) ||
		    mc7_init(&adapter->pmtx, vpd->mclk, vpd->mem_timing) ||
		    mc7_init(&adapter->cm, vpd->mclk, vpd->mem_timing) ||
		    t3_mc5_init(&adapter->mc5, adapter->params.mc5.nservers,
			        adapter->params.mc5.nfilters,
			       	adapter->params.mc5.nroutes))
			goto out_err;
		for (i = 0; i < 32; i++)
			if (clear_sge_ctxt(adapter, i, F_CQ))
				goto out_err;
	}
	if (tp_init(adapter, &adapter->params.tp))
		goto out_err;
	t3_tp_set_coalescing_size(adapter,
				  min(adapter->params.sge.max_pkt_size,
				      MAX_RX_COALESCING_LEN), 1);
	t3_tp_set_max_rxsize(adapter,
			     min(adapter->params.sge.max_pkt_size, 16384U));
	ulp_config(adapter, &adapter->params.tp);
	if (is_pcie(adapter))
		config_pcie(adapter);
	else
		t3_set_reg_field(adapter, A_PCIX_CFG, 0,
				 F_DMASTOPEN | F_CLIDECEN);
	if (adapter->params.rev == T3_REV_C)
		t3_set_reg_field(adapter, A_ULPTX_CONFIG, 0,
				 F_CFG_CQE_SOP_MASK);
	t3_write_reg(adapter, A_PM1_RX_CFG, 0xffffffff);
	t3_write_reg(adapter, A_PM1_RX_MODE, 0);
	t3_write_reg(adapter, A_PM1_TX_MODE, 0);
	chan_init_hw(adapter, adapter->params.chan_map);
	t3_sge_init(adapter, &adapter->params.sge);
	t3_set_reg_field(adapter, A_PL_RST, 0, F_FATALPERREN);
	t3_write_reg(adapter, A_T3DBG_GPIO_ACT_LOW, calc_gpio_intr(adapter));
	t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, vpd->uclk | fw_params);
	t3_write_reg(adapter, A_CIM_BOOT_CFG,
		     V_BOOTADDR(FW_FLASH_BOOT_ADDR >> 2));
	(void) t3_read_reg(adapter, A_CIM_BOOT_CFG);    
	attempts = 100;
	do {                          
		msleep(20);
	} while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts);
	if (!attempts) {
		CH_ERR(adapter, "uP initialization timed out\n");
		goto out_err;
	}
	err = 0;
 out_err:
	return err;
}
int t3_init_hw ( adapter_t * adapter , u32 fw_params ) { int err = - EIO , attempts , i ; const struct vpd_params * vpd = & adapter -> params . vpd ; if ( adapter -> params . rev > 0 ) calibrate_xgm_t3b ( adapter ) ; else if ( calibrate_xgm ( adapter ) ) goto out_err ; if ( adapter -> params . nports > 2 ) t3_mac_init ( & adap2pinfo ( adapter , 0 ) -> mac ) ; if ( vpd -> mclk ) { partition_mem ( adapter , & adapter -> params . tp ) ; if ( mc7_init ( & adapter -> pmrx , vpd -> mclk , vpd -> mem_timing ) || mc7_init ( & adapter -> pmtx , vpd -> mclk , vpd -> mem_timing ) || mc7_init ( & adapter -> cm , vpd -> mclk , vpd -> mem_timing ) || t3_mc5_init ( & adapter -> mc5 , adapter -> params . mc5 . nservers , adapter -> params . mc5 . nfilters , adapter -> params . mc5 . nroutes ) ) goto out_err ; for ( i = 0 ; i < 32 ; i ++ ) if ( clear_sge_ctxt ( adapter , i , F_CQ ) ) goto out_err ; } if ( tp_init ( adapter , & adapter -> params . tp ) ) goto out_err ; t3_tp_set_coalescing_size ( adapter , min ( adapter -> params . sge . max_pkt_size , MAX_RX_COALESCING_LEN ) , 1 ) ; t3_tp_set_max_rxsize ( adapter , min ( adapter -> params . sge . max_pkt_size , 16384U ) ) ; ulp_config ( adapter , & adapter -> params . tp ) ; if ( is_pcie ( adapter ) ) config_pcie ( adapter ) ; else t3_set_reg_field ( adapter , A_PCIX_CFG , 0 , F_DMASTOPEN | F_CLIDECEN ) ; if ( adapter -> params . rev == T3_REV_C ) t3_set_reg_field ( adapter , A_ULPTX_CONFIG , 0 , F_CFG_CQE_SOP_MASK ) ; t3_write_reg ( adapter , A_PM1_RX_CFG , 0xffffffff ) ; t3_write_reg ( adapter , A_PM1_RX_MODE , 0 ) ; t3_write_reg ( adapter , A_PM1_TX_MODE , 0 ) ; chan_init_hw ( adapter , adapter -> params . chan_map ) ; t3_sge_init ( adapter , & adapter -> params . sge ) ; t3_set_reg_field ( adapter , A_PL_RST , 0 , F_FATALPERREN ) ; t3_write_reg ( adapter , A_T3DBG_GPIO_ACT_LOW , calc_gpio_intr ( adapter ) ) ; t3_write_reg ( adapter , A_CIM_HOST_ACC_DATA , vpd -> uclk | fw_params ) ; t3_write_reg ( adapter , A_CIM_BOOT_CFG , V_BOOTADDR ( FW_FLASH_BOOT_ADDR >> 2 ) ) ; ( void ) t3_read_reg ( adapter , A_CIM_BOOT_CFG ) ; attempts = 100 ; do { msleep ( 20 ) ; } while ( t3_read_reg ( adapter , A_CIM_HOST_ACC_DATA ) && -- attempts ) ; if ( ! attempts ) { CH_ERR ( adapter , " \n " ) ; goto out_err ; } err = 0 ; out_err : return err ; }
t3_init_hw - initialize and configure T3 HW modules
      @adapter: the adapter
      @fw_params: initial parameters to pass to firmware (optional)
t3_init_hw - initialize and configure T3 HW modules @adapter : the adapter @fw_params : initial parameters to pass to firmware ( optional )
/* flush */ /* wait for uP to initialize */