linux/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
/**
 * amdgpu_gem_map_attach - &dma_buf_ops.attach implementation
 * @dma_buf: shared DMA buffer
 * @attach: DMA-buf attachment
 *
 * Makes sure that the shared DMA buffer can be accessed by the target device.
 * For now, simply pins it to the GTT domain, where it should be accessible by
 * all DMA devices.
 *
 * Returns:
 * 0 on success or negative error code.
 */
&dma_buf_ops.attach implementation
@dma_buf: shared DMA buffer
@attach: DMA-buf attachment

Makes sure that the shared DMA buffer can be accessed by the target device.
For now, simply pins it to the GTT domain, where it should be accessible by
all DMA devices.

0 on success or negative error code.
&dma_buf_ops . attach implementation @dma_buf : shared DMA buffer @attach : DMA - buf attachment Makes sure that the shared DMA buffer can be accessed by the target device . For now simply pins it to the GTT domain where it should be accessible by all DMA devices . 0 on success or negative error code .
static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
				 struct dma_buf_attachment *attach)
{
	struct drm_gem_object *obj = dma_buf->priv;
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
	long r;
	r = drm_gem_map_attach(dma_buf, attach);
	if (r)
		return r;
	r = amdgpu_bo_reserve(bo, false);
	if (unlikely(r != 0))
		goto error_detach;
	if (attach->dev->driver != adev->dev->driver) {
		r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
							true, false,
							MAX_SCHEDULE_TIMEOUT);
		if (unlikely(r < 0)) {
			DRM_DEBUG_PRIME("Fence wait failed: %li\n", r);
			goto error_unreserve;
		}
	}
	r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);
	if (r)
		goto error_unreserve;
	if (attach->dev->driver != adev->dev->driver)
		bo->prime_shared_count++;
error_unreserve:
	amdgpu_bo_unreserve(bo);
error_detach:
	if (r)
		drm_gem_map_detach(dma_buf, attach);
	return r;
}
static int amdgpu_gem_map_attach ( struct dma_buf * dma_buf , struct dma_buf_attachment * attach ) { struct drm_gem_object * obj = dma_buf -> priv ; struct amdgpu_bo * bo = gem_to_amdgpu_bo ( obj ) ; struct amdgpu_device * adev = amdgpu_ttm_adev ( bo -> tbo . bdev ) ; long r ; r = drm_gem_map_attach ( dma_buf , attach ) ; if ( r ) return r ; r = amdgpu_bo_reserve ( bo , false ) ; if ( unlikely ( r != 0 ) ) goto error_detach ; if ( attach -> dev -> driver != adev -> dev -> driver ) { r = reservation_object_wait_timeout_rcu ( bo -> tbo . resv , true , false , MAX_SCHEDULE_TIMEOUT ) ; if ( unlikely ( r < 0 ) ) { DRM_DEBUG_PRIME ( " \n " , r ) ; goto error_unreserve ; } } r = amdgpu_bo_pin ( bo , AMDGPU_GEM_DOMAIN_GTT ) ; if ( r ) goto error_unreserve ; if ( attach -> dev -> driver != adev -> dev -> driver ) bo -> prime_shared_count ++ ; error_unreserve : amdgpu_bo_unreserve ( bo ) ; error_detach : if ( r ) drm_gem_map_detach ( dma_buf , attach ) ; return r ; }
amdgpu_gem_map_attach - &dma_buf_ops.attach implementation
 @dma_buf: shared DMA buffer
 @attach: DMA-buf attachment
amdgpu_gem_map_attach - &dma_buf_ops . attach implementation @dma_buf : shared DMA buffer @attach : DMA - buf attachment
/*
		 * Wait for all shared fences to complete before we switch to future
		 * use of exclusive fence on this prime shared bo.
		 */ /* pin buffer into GTT */