abc/src/opt/sim/simSeq.c
/**Function*************************************************************

  Synopsis    [Simulates sequential circuit.]

  Description [Takes sequential circuit (pNtk). Simulates the given number
  (nFrames) of the circuit with the given model. The model is assumed to 
  contain values of PIs for each frame. The latches are initialized to
  the initial state. One word of data is simulated.]
               
  SideEffects []

  SeeAlso     []

***********************************************************************/
Function
Synopsis    [Simulates sequential circuit.]

Description [Takes sequential circuit (pNtk). Simulates the given number
(nFrames) of the circuit with the given model. The model is assumed to
contain values of PIs for each frame. The latches are initialized to
the initial state. One word of data is simulated.]




Function Synopsis [ Simulates sequential circuit . ] Description [ Takes sequential circuit ( pNtk ) . Simulates the given number ( nFrames ) of the circuit with the given model . The model is assumed to contain values of PIs for each frame . The latches are initialized to the initial state . One word of data is simulated . ]
Vec_Ptr_t * Sim_SimulateSeqModel( Abc_Ntk_t * pNtk, int nFrames, int * pModel )
{
    Vec_Ptr_t * vInfo;
    Abc_Obj_t * pNode;
    unsigned * pUnsigned;
    int i, k;
    vInfo = Sim_UtilInfoAlloc( Abc_NtkObjNumMax(pNtk), nFrames, 0 );
    pNode = Abc_AigConst1(pNtk);
    Sim_UtilSetConst( Sim_SimInfoGet(vInfo,pNode), nFrames, 1 );
    Abc_NtkForEachPi( pNtk, pNode, i )
    {
        pUnsigned = Sim_SimInfoGet(vInfo,pNode);
        for ( k = 0; k < nFrames; k++ )
            pUnsigned[k] = pModel[k * Abc_NtkPiNum(pNtk) + i] ? ~((unsigned)0) : 0;
    }
    Abc_NtkForEachLatch( pNtk, pNode, i )
    {
        pUnsigned = Sim_SimInfoGet(vInfo,pNode);
        if ( Abc_LatchIsInit0(pNode) )
            pUnsigned[0] = 0;
        else if ( Abc_LatchIsInit1(pNode) )
            pUnsigned[0] = ~((unsigned)0);
        else 
            pUnsigned[0] = SIM_RANDOM_UNSIGNED;
    }
    for ( i = 0; i < nFrames; i++ )
        Sim_SimulateSeqFrame( vInfo, pNtk, i, 1, (int)(i < nFrames-1) );
    return vInfo;
}
Vec_Ptr_t * Sim_SimulateSeqModel ( Abc_Ntk_t * pNtk , int nFrames , int * pModel ) { Vec_Ptr_t * vInfo ; Abc_Obj_t * pNode ; unsigned * pUnsigned ; int i , k ; vInfo = Sim_UtilInfoAlloc ( Abc_NtkObjNumMax ( pNtk ) , nFrames , 0 ) ; pNode = Abc_AigConst1 ( pNtk ) ; Sim_UtilSetConst ( Sim_SimInfoGet ( vInfo , pNode ) , nFrames , 1 ) ; Abc_NtkForEachPi ( pNtk , pNode , i ) { pUnsigned = Sim_SimInfoGet ( vInfo , pNode ) ; for ( k = 0 ; k < nFrames ; k ++ ) pUnsigned [ k ] = pModel [ k * Abc_NtkPiNum ( pNtk ) + i ] ? ~ ( ( unsigned ) 0 ) : 0 ; } Abc_NtkForEachLatch ( pNtk , pNode , i ) { pUnsigned = Sim_SimInfoGet ( vInfo , pNode ) ; if ( Abc_LatchIsInit0 ( pNode ) ) pUnsigned [ 0 ] = 0 ; else if ( Abc_LatchIsInit1 ( pNode ) ) pUnsigned [ 0 ] = ~ ( ( unsigned ) 0 ) ; else pUnsigned [ 0 ] = SIM_RANDOM_UNSIGNED ; } for ( i = 0 ; i < nFrames ; i ++ ) Sim_SimulateSeqFrame ( vInfo , pNtk , i , 1 , ( int ) ( i < nFrames - 1 ) ) ; return vInfo ; }
Function
Synopsis    [Simulates sequential circuit.]
Function Synopsis [ Simulates sequential circuit . ]
// set the constant data // set the random PI data // set the initial state data // simulate the nodes for the given number of timeframes /*
    // print the simulated values
    for ( i = 0; i < nFrames; i++ )
    {
        printf( "Frame %d : ", i+1 );
        Abc_NtkForEachPi( pNtk, pNode, k )
            printf( "%d", Sim_SimInfoGet(vInfo,pNode)[i] > 0 );
        printf( " " );
        Abc_NtkForEachLatch( pNtk, pNode, k )
            printf( "%d", Sim_SimInfoGet(vInfo,pNode)[i] > 0 );
        printf( " " );
        Abc_NtkForEachPo( pNtk, pNode, k )
            printf( "%d", Sim_SimInfoGet(vInfo,pNode)[i] > 0 );
        printf( "\n" );
    }
    printf( "\n" );
*/