package/boot/uboot-oxnas/src/board/ox820/ddr.c
// Function used to Setup DDR core
Function used to Setup DDR core
Function used to Setup DDR core
void ddr_setup(int mhz)
{
	static const T_DDR_TIMING_PARAMETERS *ddr_timing_parameters =
		&C_TP_DDR2_25_CL6_1GB;
	static const T_DDR_CONFIG_PARAMETERS *ddr_config_parameters =
		&C_CP_DDR2_25_CL6;
	*(volatile UINT *) C_DDR_BLKEN_REG = C_BLKEN_DDR_ON;
	ddr_timing_initialisation(ddr_timing_parameters);
	ddr_normal_initialisation(ddr_config_parameters, mhz);
	*(volatile UINT *) C_DDR_TRANSACTION_ROUTING = (0
		<< DDR_ROUTE_CPU0_INSTR_SHIFT)
		| (1 << DDR_ROUTE_CPU0_RDDATA_SHIFT)
		| (3 << DDR_ROUTE_CPU0_WRDATA_SHIFT)
		| (2 << DDR_ROUTE_CPU1_INSTR_SHIFT)
		| (3 << DDR_ROUTE_CPU1_RDDATA_SHIFT)
		| (3 << DDR_ROUTE_CPU1_WRDATA_SHIFT);
	*(volatile UINT *) C_DDR_BLKEN_REG = C_BLKEN_DDR_ON + 0x0000FFFF;
}
void ddr_setup ( int mhz ) { static const T_DDR_TIMING_PARAMETERS * ddr_timing_parameters = & C_TP_DDR2_25_CL6_1GB ; static const T_DDR_CONFIG_PARAMETERS * ddr_config_parameters = & C_CP_DDR2_25_CL6 ; * ( volatile UINT * ) C_DDR_BLKEN_REG = C_BLKEN_DDR_ON ; ddr_timing_initialisation ( ddr_timing_parameters ) ; ddr_normal_initialisation ( ddr_config_parameters , mhz ) ; * ( volatile UINT * ) C_DDR_TRANSACTION_ROUTING = ( 0 << DDR_ROUTE_CPU0_INSTR_SHIFT ) | ( 1 << DDR_ROUTE_CPU0_RDDATA_SHIFT ) | ( 3 << DDR_ROUTE_CPU0_WRDATA_SHIFT ) | ( 2 << DDR_ROUTE_CPU1_INSTR_SHIFT ) | ( 3 << DDR_ROUTE_CPU1_RDDATA_SHIFT ) | ( 3 << DDR_ROUTE_CPU1_WRDATA_SHIFT ) ; * ( volatile UINT * ) C_DDR_BLKEN_REG = C_BLKEN_DDR_ON + 0x0000FFFF ; }
Function used to Setup DDR core
Function used to Setup DDR core
//Bring core out of Reset //DDR TIMING INITIALISTION //DDR NORMAL INITIALISATION // route all writes through one client //Bring all clients out of reset