app/src/mcu_init.c
/**
  * @brief  Update SystemCoreClock variable according to Clock Register Values.
  *         The SystemCoreClock variable contains the core clock (HCLK), it can
  *         be used by the user application to setup the SysTick timer or configure
  *         other parameters.
  *           
  * @note   Each time the core clock (HCLK) changes, this function must be called
  *         to update SystemCoreClock variable value. Otherwise, any configuration
  *         based on this variable will be incorrect.         
  *     
  * @note   - The system frequency computed by this function is not the real 
  *           frequency in the chip. It is calculated based on the predefined 
  *           constant and the selected clock source:
  *             
  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
  *                                              
  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
  *                          
  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
  *             or HSI_VALUE(*) multiplied by the PLL factors.
  *         
  *         (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
  *             8 MHz) but the real value may vary depending on the variations
  *             in voltage and temperature.   
  *    
  *         (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
  *              8 MHz or 25 MHz, depending on the product used), user has to ensure
  *              that HSE_VALUE is same as the real frequency of the crystal used.
  *              Otherwise, this function may have wrong result.
  *                
  *         - The result of this function could be not correct when using fractional
  *           value for HSE crystal.
  * @param  None
  * @retval None
  */
@brief  Update SystemCoreClock variable according to Clock Register Values.
The SystemCoreClock variable contains the core clock (HCLK), it can
be used by the user application to setup the SysTick timer or configure
other parameters.

@note   Each time the core clock (HCLK) changes, this function must be called
to update SystemCoreClock variable value. Otherwise, any configuration
based on this variable will be incorrect.

@note   - The system frequency computed by this function is not the real
frequency in the chip. It is calculated based on the predefined
constant and the selected clock source.

- If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)

- If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)

- If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
or HSI_VALUE(*) multiplied by the PLL factors.

(*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
8 MHz) but the real value may vary depending on the variations
in voltage and temperature.

(**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
8 MHz or 25 MHz, depending on the product used), user has to ensure
that HSE_VALUE is same as the real frequency of the crystal used.
Otherwise, this function may have wrong result.

- The result of this function could be not correct when using fractional
value for HSE crystal.
@param  None
@retval None
@brief Update SystemCoreClock variable according to Clock Register Values . The SystemCoreClock variable contains the core clock ( HCLK ) it can be used by the user application to setup the SysTick timer or configure other parameters . @note Each time the core clock ( HCLK ) changes this function must be called to update SystemCoreClock variable value . Otherwise any configuration based on this variable will be incorrect . @note - The system frequency computed by this function is not the real frequency in the chip . It is calculated based on the predefined constant and the selected clock source . - If SYSCLK source is HSI SystemCoreClock will contain the HSI_VALUE ( * ) - If SYSCLK source is HSE SystemCoreClock will contain the HSE_VALUE ( ** ) - If SYSCLK source is PLL SystemCoreClock will contain the HSE_VALUE ( ** ) or HSI_VALUE ( * ) multiplied by the PLL factors . ( * ) HSI_VALUE is a constant defined in stm32f1xx . h file ( default value 8 MHz ) but the real value may vary depending on the variations in voltage and temperature . ( ** ) HSE_VALUE is a constant defined in stm32f1xx . h file ( default value 8 MHz or 25 MHz depending on the product used ) user has to ensure that HSE_VALUE is same as the real frequency of the crystal used . Otherwise this function may have wrong result . - The result of this function could be not correct when using fractional value for HSE crystal . @param None @retval None
void SystemCoreClockUpdate (void)
{
    uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
    uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif 
#if defined(STM32F100xB) || defined(STM32F100xE)
    uint32_t prediv1factor = 0U;
#endif 
    tmp = RCC->CFGR & RCC_CFGR_SWS;
    switch (tmp)
    {
        case 0x00U:  
        SystemCoreClock = HSI_VALUE;
        break;
        case 0x04U:  
        SystemCoreClock = HSE_VALUE;
        break;
        case 0x08U:  
        pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
        pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)      
        pllmull = ( pllmull >> 18U) + 2U;
        if (pllsource == 0x00U)
        {
            SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
        }
        else
        {
#if defined(STM32F100xB) || defined(STM32F100xE)
        prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
        SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; 
#else
            if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
            {
                SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
            }
            else
            {
                SystemCoreClock = HSE_VALUE * pllmull;
            }
#endif
        }
#else
        pllmull = pllmull >> 18U;
        if (pllmull != 0x0DU)
        {
            pllmull += 2U;
        }
        else
        { 
            pllmull = 13U / 2U; 
        }
        if (pllsource == 0x00U)
        {
            SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
        }
        else
        {
            prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
            prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
            if (prediv1source == 0U)
            { 
                SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;          
            }
            else
            {   
                prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
                pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U; 
                SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;                         
            }
        }
#endif  
        break;
        default:
        SystemCoreClock = HSI_VALUE;
        break;
    }
    tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
    SystemCoreClock >>= tmp;  
}
void SystemCoreClockUpdate ( void ) { uint32_t tmp = 0U , pllmull = 0U , pllsource = 0U ; #if defined ( STM32F105xC ) || defined ( STM32F107xC ) uint32_t prediv1source = 0U , prediv1factor = 0U , prediv2factor = 0U , pll2mull = 0U ; #endif #if defined ( STM32F100xB ) || defined ( STM32F100xE ) uint32_t prediv1factor = 0U ; #endif tmp = RCC -> CFGR & RCC_CFGR_SWS ; switch ( tmp ) { case 0x00U : SystemCoreClock = HSI_VALUE ; break ; case 0x04U : SystemCoreClock = HSE_VALUE ; break ; case 0x08U : pllmull = RCC -> CFGR & RCC_CFGR_PLLMULL ; pllsource = RCC -> CFGR & RCC_CFGR_PLLSRC ; #if ! defined ( STM32F105xC ) && ! defined ( STM32F107xC ) pllmull = ( pllmull >> 18U ) + 2U ; if ( pllsource == 0x00U ) { SystemCoreClock = ( HSI_VALUE >> 1U ) * pllmull ; } else { #if defined ( STM32F100xB ) || defined ( STM32F100xE ) prediv1factor = ( RCC -> CFGR2 & RCC_CFGR2_PREDIV1 ) + 1U ; SystemCoreClock = ( HSE_VALUE / prediv1factor ) * pllmull ; #else if ( ( RCC -> CFGR & RCC_CFGR_PLLXTPRE ) != ( uint32_t ) RESET ) { SystemCoreClock = ( HSE_VALUE >> 1U ) * pllmull ; } else { SystemCoreClock = HSE_VALUE * pllmull ; } #endif } #else pllmull = pllmull >> 18U ; if ( pllmull != 0x0DU ) { pllmull += 2U ; } else { pllmull = 13U / 2U ; } if ( pllsource == 0x00U ) { SystemCoreClock = ( HSI_VALUE >> 1U ) * pllmull ; } else { prediv1source = RCC -> CFGR2 & RCC_CFGR2_PREDIV1SRC ; prediv1factor = ( RCC -> CFGR2 & RCC_CFGR2_PREDIV1 ) + 1U ; if ( prediv1source == 0U ) { SystemCoreClock = ( HSE_VALUE / prediv1factor ) * pllmull ; } else { prediv2factor = ( ( RCC -> CFGR2 & RCC_CFGR2_PREDIV2 ) >> 4U ) + 1U ; pll2mull = ( ( RCC -> CFGR2 & RCC_CFGR2_PLL2MUL ) >> 8U ) + 2U ; SystemCoreClock = ( ( ( HSE_VALUE / prediv2factor ) * pll2mull ) / prediv1factor ) * pllmull ; } } #endif break ; default : SystemCoreClock = HSI_VALUE ; break ; } tmp = AHBPrescTable [ ( ( RCC -> CFGR & RCC_CFGR_HPRE ) >> 4U ) ] ; SystemCoreClock >>= tmp ; }
@brief  Update SystemCoreClock variable according to Clock Register Values.
@brief Update SystemCoreClock variable according to Clock Register Values .
/* STM32F105xC */ /* STM32F100xB or STM32F100xE */ /* Get SYSCLK source -------------------------------------------------------*/ /* HSI used as system clock */ /* HSE used as system clock */ /* PLL used as system clock */ /* Get PLL clock source and multiplication factor ----------------------*/ /* HSI oscillator clock divided by 2 selected as PLL clock entry */ /* HSE oscillator clock selected as PREDIV1 clock entry */ /* HSE selected as PLL clock entry */ /* HSE oscillator clock divided by 2 */ /* PLL multiplication factor = PLL input clock * 6.5 */ /* HSI oscillator clock divided by 2 selected as PLL clock entry */ /* PREDIV1 selected as PLL clock entry */ /* Get PREDIV1 clock source and division factor */ /* HSE oscillator clock selected as PREDIV1 clock entry */ /* PLL2 clock selected as PREDIV1 clock entry */ /* Get PREDIV2 division factor and PLL2 multiplication factor */ /* STM32F105xC */ // Compute HCLK clock frequency /* Get HCLK prescaler */ /* HCLK clock frequency */