macsim/src/arch/riscv.c
// Check if the CSR number is valid.
// For some CSRs only reading is allowed. Check this, too.
Check if the CSR number is valid.
For some CSRs only reading is allowed. Check this, too.
Check if the CSR number is valid . For some CSRs only reading is allowed . Check this too .
static inline bool csr_valid(uint_fast32_t iw)
{
    unsigned no = (iw>>20) & 0xfff;
    switch (no) {
    case RISCV_CSR_CYCLE:
    case RISCV_CSR_TIME:
    case RISCV_CSR_INSTRET:
    case RISCV_CSR_CYCLEH:
    case RISCV_CSR_TIMEH:
    case RISCV_CSR_INSTRETH:
    case RISCV_CSR_MCPUID:
    case RISCV_CSR_MIMPID:
    case RISCV_CSR_MHARTID:
    case RISCV_CSR_MAXCID:
    case RISCV_CSR_CID:
    case RISCV_CSR_NOCDIM:
    case RISCV_CSR_SENDRDY:
    case RISCV_CSR_NEXTRECV:
        if ((iw&0x000ff000)==0x00002000) 
            return true;
    case RISCV_CSR_FFLAGS:
    case RISCV_CSR_FRM:
    case RISCV_CSR_FCSR:
    case RISCV_CSR_MSTATUS:
    case RISCV_CSR_MTVEC:
    case RISCV_CSR_MSCRATCH:
    case RISCV_CSR_MEPC:
    case RISCV_CSR_MCAUSE:
    case RISCV_CSR_MTOHOST:
    case RISCV_CSR_PUTCHAR:
        return true;
    }
    return false;
}
static inline bool csr_valid ( uint_fast32_t iw ) { unsigned no = ( iw >> 20 ) & 0xfff ; switch ( no ) { case RISCV_CSR_CYCLE : case RISCV_CSR_TIME : case RISCV_CSR_INSTRET : case RISCV_CSR_CYCLEH : case RISCV_CSR_TIMEH : case RISCV_CSR_INSTRETH : case RISCV_CSR_MCPUID : case RISCV_CSR_MIMPID : case RISCV_CSR_MHARTID : case RISCV_CSR_MAXCID : case RISCV_CSR_CID : case RISCV_CSR_NOCDIM : case RISCV_CSR_SENDRDY : case RISCV_CSR_NEXTRECV : if ( ( iw & 0x000ff000 ) == 0x00002000 ) return true ; case RISCV_CSR_FFLAGS : case RISCV_CSR_FRM : case RISCV_CSR_FCSR : case RISCV_CSR_MSTATUS : case RISCV_CSR_MTVEC : case RISCV_CSR_MSCRATCH : case RISCV_CSR_MEPC : case RISCV_CSR_MCAUSE : case RISCV_CSR_MTOHOST : case RISCV_CSR_PUTCHAR : return true ; } return false ; }
Check if the CSR number is valid.
Check if the CSR number is valid .
// rs1==0, funct3=2