FreeBSD/sys/dev/cxgbe/common/t4_hw.c
/**
 *	t4_prep_adapter - prepare SW and HW for operation
 *	@adapter: the adapter
 *	@buf: temporary space of at least VPD_LEN size provided by the caller.
 *
 *	Initialize adapter SW state for the various HW modules, set initial
 *	values for some adapter tunables, take PHYs out of reset, and
 *	initialize the MDIO interface.
 */
prepare SW and HW for operation
@adapter: the adapter
@buf: temporary space of at least VPD_LEN size provided by the caller.

Initialize adapter SW state for the various HW modules, set initial
values for some adapter tunables, take PHYs out of reset, and
initialize the MDIO interface.
prepare SW and HW for operation @adapter : the adapter @buf : temporary space of at least VPD_LEN size provided by the caller . Initialize adapter SW state for the various HW modules set initial values for some adapter tunables take PHYs out of reset and initialize the MDIO interface .
int t4_prep_adapter(struct adapter *adapter, u8 *buf)
{
	int ret;
	uint16_t device_id;
	uint32_t pl_rev;
	get_pci_mode(adapter, &adapter->params.pci);
	pl_rev = t4_read_reg(adapter, A_PL_REV);
	adapter->params.chipid = G_CHIPID(pl_rev);
	adapter->params.rev = G_REV(pl_rev);
	if (adapter->params.chipid == 0) {
		adapter->params.chipid = CHELSIO_T4;
		if (adapter->params.rev == 1) {
			CH_ALERT(adapter, "T4 rev 1 chip is not supported.\n");
			return -EINVAL;
		}
	}
	adapter->chip_params = get_chip_params(chip_id(adapter));
	if (adapter->chip_params == NULL)
		return -EINVAL;
	adapter->params.pci.vpd_cap_addr =
	    t4_os_find_pci_capability(adapter, PCI_CAP_ID_VPD);
	ret = t4_get_flash_params(adapter);
	if (ret < 0)
		return ret;
	ret = get_vpd_params(adapter, &adapter->params.vpd, buf);
	if (ret < 0)
		return ret;
	t4_os_pci_read_cfg2(adapter, PCI_DEVICE_ID, &device_id);
	if (device_id >> 12 == chip_id(adapter))
		adapter->params.cim_la_size = CIMLA_SIZE;
	else {
		adapter->params.fpga = 1;
		adapter->params.cim_la_size = 2 * CIMLA_SIZE;
	}
	init_cong_ctrl(adapter->params.a_wnd, adapter->params.b_wnd);
	adapter->params.nports = 1;
	adapter->params.portvec = 1;
	adapter->params.vpd.cclk = 50000;
	set_pcie_completion_timeout(adapter, 0xd);
	return 0;
}
int t4_prep_adapter ( struct adapter * adapter , u8 * buf ) { int ret ; uint16_t device_id ; uint32_t pl_rev ; get_pci_mode ( adapter , & adapter -> params . pci ) ; pl_rev = t4_read_reg ( adapter , A_PL_REV ) ; adapter -> params . chipid = G_CHIPID ( pl_rev ) ; adapter -> params . rev = G_REV ( pl_rev ) ; if ( adapter -> params . chipid == 0 ) { adapter -> params . chipid = CHELSIO_T4 ; if ( adapter -> params . rev == 1 ) { CH_ALERT ( adapter , " \n " ) ; return - EINVAL ; } } adapter -> chip_params = get_chip_params ( chip_id ( adapter ) ) ; if ( adapter -> chip_params == NULL ) return - EINVAL ; adapter -> params . pci . vpd_cap_addr = t4_os_find_pci_capability ( adapter , PCI_CAP_ID_VPD ) ; ret = t4_get_flash_params ( adapter ) ; if ( ret < 0 ) return ret ; ret = get_vpd_params ( adapter , & adapter -> params . vpd , buf ) ; if ( ret < 0 ) return ret ; t4_os_pci_read_cfg2 ( adapter , PCI_DEVICE_ID , & device_id ) ; if ( device_id >> 12 == chip_id ( adapter ) ) adapter -> params . cim_la_size = CIMLA_SIZE ; else { adapter -> params . fpga = 1 ; adapter -> params . cim_la_size = 2 * CIMLA_SIZE ; } init_cong_ctrl ( adapter -> params . a_wnd , adapter -> params . b_wnd ) ; adapter -> params . nports = 1 ; adapter -> params . portvec = 1 ; adapter -> params . vpd . cclk = 50000 ; set_pcie_completion_timeout ( adapter , 0xd ) ; return 0 ; }
t4_prep_adapter - prepare SW and HW for operation
      @adapter: the adapter
      @buf: temporary space of at least VPD_LEN size provided by the caller.
t4_prep_adapter - prepare SW and HW for operation @adapter : the adapter @buf : temporary space of at least VPD_LEN size provided by the caller .
/* T4 did not have chipid in PL_REV (T5 onwards do) */ /* T4A1 chip is not supported */ /* Cards with real ASICs have the chipid in the PCIe device id */ /* FPGA */ /*
	 * Default port and clock for debugging in case we can't reach FW.
	 */ /* Set pci completion timeout value to 4 seconds. */