pipeline executes the sequencing of instructions in the cpu.
pipeline executes the sequencing of instructions in the cpu.
what executes the sequencing of instructions in the cpu?
pipeline
Na
Na
the cdc 6000 series included four basic models, the cdc 6400, the cdc 6500, the cdc 6600, and the cdc 6700. the models of the 6000 series differed only in their cpus, which were of two kinds, the 6400 cpu and the 6600 cpu. the 6400 cpu had a unified arithmetic unit, rather than discrete "functional units". as such, it could not overlap instructions' execution times. for example, in a 6400 cpu, if an add instruction immediately followed a multiply instruction, the add instruction could not be started till the multiply instruction finished, so the net execution time of the two instructions would be the sum of their individual execution times. the 6600 cpu had multiple functional units which could operate simultaneously, "i.e.", "in parallel", allowing the cpu to overlap instructions' execution times. for example, a 6600 cpu could begin executing an add instruction in the next cpu cycle following the beginning of a multiply instruction (assuming, of course, that the result of the multiply instruction was not an operand of the add instruction), so the net execution time of the two instructions would simply be the (longer) execution time of the multiply instruction. the 6600 cpu also had an "instruction stack", a kind of "instruction cache", which helped increase cpu throughput by reducing the amount of cpu idle time caused by waiting for memory to respond to instruction fetch requests. the two kinds of cpus were instruction compatible, so that a program that ran on either of the kinds of cpus would run the same way on the other kind but would run faster on the 6600 cpu. indeed, all models of the 6000 series were fully inter-compatible. the cdc 6400 had one cpu (a 6400 cpu), the cdc 6500 had two cpus (both 6400 cpus), the cdc 6600 had one cpu (a 6600 cpu), and the cdc 6700 had two cpus (one 6600 cpu and one 6400 cpu).
cdc 6600