hwt/synthesizer/unit.py
def _toRtl(self, targetPlatform: DummyPlatform):
        """
        synthesize all subunits, make connections between them,
        build entity and component for this unit
        """
        assert not self._wasSynthetised()

        self._targetPlatform = targetPlatform
        if not hasattr(self, "_name"):
            self._name = self._getDefaultName()

        for proc in targetPlatform.beforeToRtl:
            proc(self)

        self._ctx.params = self._buildParams()
        self._externInterf = []

        # prepare subunits
        for u in self._units:
            yield from u._toRtl(targetPlatform)

        for u in self._units:
            subUnitName = u._name
            u._signalsForMyEntity(self._ctx, "sig_" + subUnitName)

        # prepare signals for interfaces
        for i in self._interfaces:
            signals = i._signalsForInterface(self._ctx)
            if i._isExtern:
                self._externInterf.extend(signals)

        for proc in targetPlatform.beforeToRtlImpl:
            proc(self)
        self._loadMyImplementations()
        yield from self._lazyLoaded

        if not self._externInterf:
            raise IntfLvlConfErr(
                "Can not find any external interface for unit %s"
                "- unit without interfaces are not allowed"
                % self._name)

        for proc in targetPlatform.afterToRtlImpl:
            proc(self)

        yield from self._synthetiseContext(self._externInterf)
        self._checkArchCompInstances()

        for proc in targetPlatform.afterToRtl:
            proc(self)
def _toRtl(self, targetPlatform: DummyPlatform):
        assert not self._wasSynthetised()

        self._targetPlatform = targetPlatform
        if not hasattr(self, "_name"):
            self._name = self._getDefaultName()

        for proc in targetPlatform.beforeToRtl:
            proc(self)

        self._ctx.params = self._buildParams()
        self._externInterf = []

        # prepare subunits
        for u in self._units:
            yield from u._toRtl(targetPlatform)

        for u in self._units:
            subUnitName = u._name
            u._signalsForMyEntity(self._ctx, "sig_" + subUnitName)

        # prepare signals for interfaces
        for i in self._interfaces:
            signals = i._signalsForInterface(self._ctx)
            if i._isExtern:
                self._externInterf.extend(signals)

        for proc in targetPlatform.beforeToRtlImpl:
            proc(self)
        self._loadMyImplementations()
        yield from self._lazyLoaded

        if not self._externInterf:
            raise IntfLvlConfErr(
                "Can not find any external interface for unit %s"
                "- unit without interfaces are not allowed"
                % self._name)

        for proc in targetPlatform.afterToRtlImpl:
            proc(self)

        yield from self._synthetiseContext(self._externInterf)
        self._checkArchCompInstances()

        for proc in targetPlatform.afterToRtl:
            proc(self)
def _toRtl ( self , targetPlatform : DummyPlatform ) : assert not self . _wasSynthetised ( ) self . _targetPlatform = targetPlatform if not hasattr ( self , "_name" ) : self . _name = self . _getDefaultName ( ) for proc in targetPlatform . beforeToRtl : proc ( self ) self . _ctx . params = self . _buildParams ( ) self . _externInterf = [ ] # prepare subunits for u in self . _units : yield from u . _toRtl ( targetPlatform ) for u in self . _units : subUnitName = u . _name u . _signalsForMyEntity ( self . _ctx , "sig_" + subUnitName ) # prepare signals for interfaces for i in self . _interfaces : signals = i . _signalsForInterface ( self . _ctx ) if i . _isExtern : self . _externInterf . extend ( signals ) for proc in targetPlatform . beforeToRtlImpl : proc ( self ) self . _loadMyImplementations ( ) yield from self . _lazyLoaded if not self . _externInterf : raise IntfLvlConfErr ( "Can not find any external interface for unit %s" "- unit without interfaces are not allowed" % self . _name ) for proc in targetPlatform . afterToRtlImpl : proc ( self ) yield from self . _synthetiseContext ( self . _externInterf ) self . _checkArchCompInstances ( ) for proc in targetPlatform . afterToRtl : proc ( self )
synthesize all subunits, make connections between them,
        build entity and component for this unit
synthesize all subunits make connections between them build entity and component for this unit