<s> import os <EOL> import subprocess <EOL> from migen . fhdl . structure import _Fragment <EOL> from migen . build import tools <EOL> from migen . build . generic_platform import * <EOL> def _build_tb ( platform , vns , serial , template ) : <EOL> def io_name ( resource , subsignal = None ) : <EOL> res = platform . lookup_request ( resource ) <EOL> if subsignal is not None : <EOL> res = getattr ( res , subsignal ) <EOL> return vns . get_name ( res ) <EOL> ios = """<STR_LIT>""" . format ( sys_clk = io_name ( "<STR_LIT>" ) ) <EOL> if serial == "<STR_LIT>" : <EOL> ios += "<STR_LIT>" <EOL> elif serial == "<STR_LIT>" : <EOL> pass <EOL> else : <EOL> raise ValueError <EOL> try : <EOL> ios += """<STR_LIT>""" . format ( <EOL> serial_source_stb = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> serial_source_ack = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> serial_source_data = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> serial_sink_stb = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> serial_sink_ack = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> serial_sink_data = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> ) <EOL> except : <EOL> pass <EOL> try : <EOL> ios += """<STR_LIT>""" . format ( <EOL> eth_source_stb = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> eth_source_ack = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> eth_source_data = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> eth_sink_stb = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> eth_sink_ack = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> eth_sink_data = io_name ( "<STR_LIT>" , "<STR_LIT>" ) , <EOL> ) <EOL> except : <EOL> pass <EOL> content = "<STR_LIT>" <EOL> f = open ( template , "<STR_LIT:r>" ) <EOL> done = False <EOL> for l in f : <EOL> content += l <EOL> if "<STR_LIT>" in l and not done : <EOL> content += ios <EOL> done = True <EOL> f . close ( ) <EOL> tools . write_to_file ( "<STR_LIT>" , content ) <EOL> def _build_sim ( platform , vns , build_name , include_paths , sim_path , serial , verbose ) : <EOL> include = "<STR_LIT>" <EOL> for path in include_paths : <EOL> include += "<STR_LIT>" + path + "<STR_LIT:U+0020>" <EOL> build_script_contents = """<STR_LIT>""" . format ( <EOL> disable_warnings = "<STR_LIT>" , <EOL> include = include ) <EOL> build_script_file = "<STR_LIT>" + build_name + "<STR_LIT>" <EOL> tools . write_to_file ( build_script_file , build_script_contents , force_unix = True ) <EOL> _build_tb ( platform , vns , serial , os . path . join ( "<STR_LIT:..>" , sim_path , "<STR_LIT>" ) ) <EOL> if verbose : <EOL> r = subprocess . call ( [ "<STR_LIT>" , build_script_file ] ) <EOL> else : <EOL> r = subprocess . call ( [ "<STR_LIT>" , build_script_file ] , stdout = subprocess . DEVNULL , stderr = subprocess . STDOUT ) <EOL> if r != <NUM_LIT:0> : <EOL> raise OSError ( "<STR_LIT>" ) <EOL> def _run_sim ( build_name ) : <EOL> run_script_contents = """<STR_LIT>""" <EOL> run_script_file = "<STR_LIT>" + build_name + "<STR_LIT>" <EOL> tools . write_to_file ( run_script_file , run_script_contents , force_unix = True ) <EOL> r = subprocess . call ( [ "<STR_LIT>" , run_script_file ] ) <EOL> if r != <NUM_LIT:0> : <EOL> raise OSError ( "<STR_LIT>" ) <EOL> class SimVerilatorToolchain : <EOL> def build ( self , platform , fragment , build_dir = "<STR_LIT>" , build_name = "<STR_LIT>" , <EOL> sim_path = "<STR_LIT>" , serial = "<STR_LIT>" , <EOL> run = True , verbose = False ) : <EOL> tools . mkdir_noerror ( build_dir ) <EOL> os . chdir ( build_dir ) <EOL> if not isinstance ( fragment , _Fragment ) : <EOL> fragment = fragment . get_fragment ( ) <EOL> platform . finalize ( fragment ) <EOL> v_output = platform . get_verilog ( fragment ) <EOL> named_sc , named_pc = platform . resolve_signals ( v_output . ns ) <EOL> v_output . write ( "<STR_LIT>" ) <EOL> include_paths = [ ] <EOL> for source in platform . sources : <EOL> path = os . path . dirname ( source [ <NUM_LIT:0> ] ) . replace ( "<STR_LIT:\\>" , "<STR_LIT>" ) <EOL> if path not in include_paths : <EOL> include_paths . append ( path ) <EOL> include_paths += platform . verilog_include_paths <EOL> _build_sim ( platform , v_output . ns , build_name , include_paths , sim_path , serial , verbose ) <EOL> if run : <EOL> _run_sim ( build_name ) <EOL> os . chdir ( "<STR_LIT:..>" ) <EOL> return v_output . ns </s>
